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authorSascha Hauer <sascha@saschahauer.de>2008-04-17 03:43:14 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-04-17 11:18:20 -0400
commit0d3c3938ff9855d8996db4083efd62e86b8987eb (patch)
tree508644741e30c68866fc414b64bb0e0eca51af03 /drivers
parent864eeed051b527c8081e2f85b51ba24823acaf71 (diff)
[ARM] 4995/1: <IMX UART>: Do not use URXD_CHARRDY for polling
Do not use the URXD_CHARRDY bit for polling for new characters. This works on i.MX1, but on MX31 the datasheet states that this bit should not be used for polling. On MX27 it is even worse, here we get a bus error when we access the read FIFO when no character is present. Instead, use USR2_RDR (receive data ready) bit. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/serial/imx.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c
index c637ae219126..f7596641f121 100644
--- a/drivers/serial/imx.c
+++ b/drivers/serial/imx.c
@@ -356,10 +356,12 @@ static irqreturn_t imx_rxint(int irq, void *dev_id)
356 356
357 spin_lock_irqsave(&sport->port.lock,flags); 357 spin_lock_irqsave(&sport->port.lock,flags);
358 358
359 while ((rx = readl(sport->port.membase + URXD0)) & URXD_CHARRDY) { 359 while (readl(sport->port.membase + USR2) & USR2_RDR) {
360 flg = TTY_NORMAL; 360 flg = TTY_NORMAL;
361 sport->port.icount.rx++; 361 sport->port.icount.rx++;
362 362
363 rx = readl(sport->port.membase + URXD0);
364
363 temp = readl(sport->port.membase + USR2); 365 temp = readl(sport->port.membase + USR2);
364 if (temp & USR2_BRCD) { 366 if (temp & USR2_BRCD) {
365 writel(temp | USR2_BRCD, sport->port.membase + USR2); 367 writel(temp | USR2_BRCD, sport->port.membase + USR2);