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authorFelipe Balbi <balbi@ti.com>2012-03-23 06:20:31 -0400
committerFelipe Balbi <balbi@ti.com>2012-04-11 06:12:17 -0400
commit07e7f47b6d8da3e290f90615c9a74dff0115709e (patch)
treef30921a337ef1a36fdd6fba5b1d17e79073637ba /drivers
parent1522d7034d739f2d348f4c544fe12ff9627c36a4 (diff)
usb: dwc3: workaround: metastability state on Run/Stop bit
All revisions prior to 2.20a have a known issue which causes metastability state on Run/Stop bit if we configure the core to work on any of the USB2-only speeds. The suggested workaround is just to never configure the core to anything other than SuperSpeed. Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/usb/dwc3/gadget.c19
1 files changed, 18 insertions, 1 deletions
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 5255fe975ea1..dda56b8f8617 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -1356,7 +1356,24 @@ static int dwc3_gadget_start(struct usb_gadget *g,
1356 1356
1357 reg = dwc3_readl(dwc->regs, DWC3_DCFG); 1357 reg = dwc3_readl(dwc->regs, DWC3_DCFG);
1358 reg &= ~(DWC3_DCFG_SPEED_MASK); 1358 reg &= ~(DWC3_DCFG_SPEED_MASK);
1359 reg |= dwc->maximum_speed; 1359
1360 /**
1361 * WORKAROUND: DWC3 revision < 2.20a have an issue
1362 * which would cause metastability state on Run/Stop
1363 * bit if we try to force the IP to USB2-only mode.
1364 *
1365 * Because of that, we cannot configure the IP to any
1366 * speed other than the SuperSpeed
1367 *
1368 * Refers to:
1369 *
1370 * STAR#9000525659: Clock Domain Crossing on DCTL in
1371 * USB 2.0 Mode
1372 */
1373 if (dwc->revision < DWC3_REVISION_220A)
1374 reg |= DWC3_DCFG_SUPERSPEED;
1375 else
1376 reg |= dwc->maximum_speed;
1360 dwc3_writel(dwc->regs, DWC3_DCFG, reg); 1377 dwc3_writel(dwc->regs, DWC3_DCFG, reg);
1361 1378
1362 dwc->start_config_issued = false; 1379 dwc->start_config_issued = false;