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authorChandrabhanu Mahapatra <cmahapatra@ti.com>2012-05-15 02:52:34 -0400
committerTomi Valkeinen <tomi.valkeinen@ti.com>2012-05-15 06:51:56 -0400
commit05dd0f5308213e169b02458a7f3a61362e581e14 (patch)
tree1f7248a3ea593ff33ea96dec723e5565e776c85a /drivers
parent037983e61b61e82fa28fea38d02e354d74c66bab (diff)
OMAPDSS: DISPC: Update Accumulator configuration for chroma plane
DISPC has two accumulator registers DISPC_VIDp_ACCU_0 and DISPC_VIDp_ACCU_1 each with horizontal and vertical bit fields. The bit fields can take values in the range of -1024 to 1023. Based on bit field values DISPC decides on which one out of 8 phases the filtering starts. DISPC_VIDp_ACCU_0 is used for progressive output and for interlaced output both DISPC_VIDp_ACCU_0 and DISPC_VIDp_ACCU_1 are used. The current accumulator values in DISPC scaling logic for chroma plane takes default values for all color modes and rotation types. So, the horizontal and vertical up and downsampling accumulator bit field values have been updated for better performance. Signed-off-by: Chandrabhanu Mahapatra <cmahapatra@ti.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/video/omap2/dss/dispc.c92
1 files changed, 89 insertions, 3 deletions
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index b509ca661e35..b81fafac35b8 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -1153,6 +1153,92 @@ static void dispc_ovl_set_scale_param(enum omap_plane plane,
1153 dispc_ovl_set_fir(plane, fir_hinc, fir_vinc, color_comp); 1153 dispc_ovl_set_fir(plane, fir_hinc, fir_vinc, color_comp);
1154} 1154}
1155 1155
1156static void dispc_ovl_set_accu_uv(enum omap_plane plane,
1157 u16 orig_width, u16 orig_height, u16 out_width, u16 out_height,
1158 bool ilace, enum omap_color_mode color_mode, u8 rotation)
1159{
1160 int h_accu2_0, h_accu2_1;
1161 int v_accu2_0, v_accu2_1;
1162 int chroma_hinc, chroma_vinc;
1163 int idx;
1164
1165 struct accu {
1166 s8 h0_m, h0_n;
1167 s8 h1_m, h1_n;
1168 s8 v0_m, v0_n;
1169 s8 v1_m, v1_n;
1170 };
1171
1172 const struct accu *accu_table;
1173 const struct accu *accu_val;
1174
1175 static const struct accu accu_nv12[4] = {
1176 { 0, 1, 0, 1 , -1, 2, 0, 1 },
1177 { 1, 2, -3, 4 , 0, 1, 0, 1 },
1178 { -1, 1, 0, 1 , -1, 2, 0, 1 },
1179 { -1, 2, -1, 2 , -1, 1, 0, 1 },
1180 };
1181
1182 static const struct accu accu_nv12_ilace[4] = {
1183 { 0, 1, 0, 1 , -3, 4, -1, 4 },
1184 { -1, 4, -3, 4 , 0, 1, 0, 1 },
1185 { -1, 1, 0, 1 , -1, 4, -3, 4 },
1186 { -3, 4, -3, 4 , -1, 1, 0, 1 },
1187 };
1188
1189 static const struct accu accu_yuv[4] = {
1190 { 0, 1, 0, 1, 0, 1, 0, 1 },
1191 { 0, 1, 0, 1, 0, 1, 0, 1 },
1192 { -1, 1, 0, 1, 0, 1, 0, 1 },
1193 { 0, 1, 0, 1, -1, 1, 0, 1 },
1194 };
1195
1196 switch (rotation) {
1197 case OMAP_DSS_ROT_0:
1198 idx = 0;
1199 break;
1200 case OMAP_DSS_ROT_90:
1201 idx = 1;
1202 break;
1203 case OMAP_DSS_ROT_180:
1204 idx = 2;
1205 break;
1206 case OMAP_DSS_ROT_270:
1207 idx = 3;
1208 break;
1209 default:
1210 BUG();
1211 }
1212
1213 switch (color_mode) {
1214 case OMAP_DSS_COLOR_NV12:
1215 if (ilace)
1216 accu_table = accu_nv12_ilace;
1217 else
1218 accu_table = accu_nv12;
1219 break;
1220 case OMAP_DSS_COLOR_YUV2:
1221 case OMAP_DSS_COLOR_UYVY:
1222 accu_table = accu_yuv;
1223 break;
1224 default:
1225 BUG();
1226 }
1227
1228 accu_val = &accu_table[idx];
1229
1230 chroma_hinc = 1024 * orig_width / out_width;
1231 chroma_vinc = 1024 * orig_height / out_height;
1232
1233 h_accu2_0 = (accu_val->h0_m * chroma_hinc / accu_val->h0_n) % 1024;
1234 h_accu2_1 = (accu_val->h1_m * chroma_hinc / accu_val->h1_n) % 1024;
1235 v_accu2_0 = (accu_val->v0_m * chroma_vinc / accu_val->v0_n) % 1024;
1236 v_accu2_1 = (accu_val->v1_m * chroma_vinc / accu_val->v1_n) % 1024;
1237
1238 dispc_ovl_set_vid_accu2_0(plane, h_accu2_0, v_accu2_0);
1239 dispc_ovl_set_vid_accu2_1(plane, h_accu2_1, v_accu2_1);
1240}
1241
1156static void dispc_ovl_set_scaling_common(enum omap_plane plane, 1242static void dispc_ovl_set_scaling_common(enum omap_plane plane,
1157 u16 orig_width, u16 orig_height, 1243 u16 orig_width, u16 orig_height,
1158 u16 out_width, u16 out_height, 1244 u16 out_width, u16 out_height,
@@ -1217,6 +1303,9 @@ static void dispc_ovl_set_scaling_uv(enum omap_plane plane,
1217 int scale_x = out_width != orig_width; 1303 int scale_x = out_width != orig_width;
1218 int scale_y = out_height != orig_height; 1304 int scale_y = out_height != orig_height;
1219 1305
1306 dispc_ovl_set_accu_uv(plane, orig_width, orig_height, out_width,
1307 out_height, ilace, color_mode, rotation);
1308
1220 if (!dss_has_feature(FEAT_HANDLE_UV_SEPARATE)) 1309 if (!dss_has_feature(FEAT_HANDLE_UV_SEPARATE))
1221 return; 1310 return;
1222 if ((color_mode != OMAP_DSS_COLOR_YUV2 && 1311 if ((color_mode != OMAP_DSS_COLOR_YUV2 &&
@@ -1265,9 +1354,6 @@ static void dispc_ovl_set_scaling_uv(enum omap_plane plane,
1265 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), scale_x ? 1 : 0, 5, 5); 1354 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), scale_x ? 1 : 0, 5, 5);
1266 /* set V scaling */ 1355 /* set V scaling */
1267 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), scale_y ? 1 : 0, 6, 6); 1356 REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), scale_y ? 1 : 0, 6, 6);
1268
1269 dispc_ovl_set_vid_accu2_0(plane, 0x80, 0);
1270 dispc_ovl_set_vid_accu2_1(plane, 0x80, 0);
1271} 1357}
1272 1358
1273static void dispc_ovl_set_scaling(enum omap_plane plane, 1359static void dispc_ovl_set_scaling(enum omap_plane plane,