diff options
author | Andy Walls <awalls@md.metrocast.net> | 2010-08-01 01:18:13 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2010-08-08 22:42:56 -0400 |
commit | c02e0d12a9a0a913dee5efd695603b73ee4b729a (patch) | |
tree | 124e8438dc79d6bcc9d964cb555dbe3747c21e3d /drivers | |
parent | 2560d94e330f35776e944b54256a526a19259429 (diff) |
V4L/DVB: cx23885, cx25840: Change IR measurment records to use struct ir_raw_event
The CX23885 and CX25840 modules were using their own simple
IR pulse width measurement record type which required conversion
when passing to the new IR core. This change makes that record type
consistent with the new IR core and removes a data conversion.
Signed-off-by: Andy Walls <awalls@md.metrocast.net>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/media/video/cx23885/cx23885-input.c | 18 | ||||
-rw-r--r-- | drivers/media/video/cx23885/cx23888-ir.c | 73 | ||||
-rw-r--r-- | drivers/media/video/cx25840/cx25840-ir.c | 71 |
3 files changed, 91 insertions, 71 deletions
diff --git a/drivers/media/video/cx23885/cx23885-input.c b/drivers/media/video/cx23885/cx23885-input.c index 252817acc35b..bb61870b8d6e 100644 --- a/drivers/media/video/cx23885/cx23885-input.c +++ b/drivers/media/video/cx23885/cx23885-input.c | |||
@@ -44,34 +44,26 @@ | |||
44 | 44 | ||
45 | #define MODULE_NAME "cx23885" | 45 | #define MODULE_NAME "cx23885" |
46 | 46 | ||
47 | static void convert_measurement(u32 x, struct ir_raw_event *y) | ||
48 | { | ||
49 | y->pulse = (x & V4L2_SUBDEV_IR_PULSE_LEVEL_MASK) ? true : false; | ||
50 | y->duration = x & V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS; | ||
51 | } | ||
52 | |||
53 | static void cx23885_input_process_measurements(struct cx23885_dev *dev, | 47 | static void cx23885_input_process_measurements(struct cx23885_dev *dev, |
54 | bool overrun) | 48 | bool overrun) |
55 | { | 49 | { |
56 | struct cx23885_kernel_ir *kernel_ir = dev->kernel_ir; | 50 | struct cx23885_kernel_ir *kernel_ir = dev->kernel_ir; |
57 | struct ir_raw_event kernel_ir_event; | ||
58 | 51 | ||
59 | u32 sd_ir_data[64]; | ||
60 | ssize_t num; | 52 | ssize_t num; |
61 | int count, i; | 53 | int count, i; |
62 | bool handle = false; | 54 | bool handle = false; |
55 | struct ir_raw_event ir_core_event[64]; | ||
63 | 56 | ||
64 | do { | 57 | do { |
65 | num = 0; | 58 | num = 0; |
66 | v4l2_subdev_call(dev->sd_ir, ir, rx_read, (u8 *) sd_ir_data, | 59 | v4l2_subdev_call(dev->sd_ir, ir, rx_read, (u8 *) ir_core_event, |
67 | sizeof(sd_ir_data), &num); | 60 | sizeof(ir_core_event), &num); |
68 | 61 | ||
69 | count = num / sizeof(u32); | 62 | count = num / sizeof(struct ir_raw_event); |
70 | 63 | ||
71 | for (i = 0; i < count; i++) { | 64 | for (i = 0; i < count; i++) { |
72 | convert_measurement(sd_ir_data[i], &kernel_ir_event); | ||
73 | ir_raw_event_store(kernel_ir->inp_dev, | 65 | ir_raw_event_store(kernel_ir->inp_dev, |
74 | &kernel_ir_event); | 66 | &ir_core_event[i]); |
75 | handle = true; | 67 | handle = true; |
76 | } | 68 | } |
77 | } while (num != 0); | 69 | } while (num != 0); |
diff --git a/drivers/media/video/cx23885/cx23888-ir.c b/drivers/media/video/cx23885/cx23888-ir.c index 684d23db98a7..2502a0a67097 100644 --- a/drivers/media/video/cx23885/cx23888-ir.c +++ b/drivers/media/video/cx23885/cx23888-ir.c | |||
@@ -26,6 +26,7 @@ | |||
26 | 26 | ||
27 | #include <media/v4l2-device.h> | 27 | #include <media/v4l2-device.h> |
28 | #include <media/v4l2-chip-ident.h> | 28 | #include <media/v4l2-chip-ident.h> |
29 | #include <media/ir-core.h> | ||
29 | 30 | ||
30 | #include "cx23885.h" | 31 | #include "cx23885.h" |
31 | 32 | ||
@@ -113,8 +114,18 @@ MODULE_PARM_DESC(ir_888_debug, "enable debug messages [CX23888 IR controller]"); | |||
113 | #define CX23888_VIDCLK_FREQ 108000000 /* 108 MHz, BT.656 */ | 114 | #define CX23888_VIDCLK_FREQ 108000000 /* 108 MHz, BT.656 */ |
114 | #define CX23888_IR_REFCLK_FREQ (CX23888_VIDCLK_FREQ / 2) | 115 | #define CX23888_IR_REFCLK_FREQ (CX23888_VIDCLK_FREQ / 2) |
115 | 116 | ||
116 | #define CX23888_IR_RX_KFIFO_SIZE (512 * sizeof(u32)) | 117 | /* |
117 | #define CX23888_IR_TX_KFIFO_SIZE (512 * sizeof(u32)) | 118 | * We use this union internally for convenience, but callers to tx_write |
119 | * and rx_read will be expecting records of type struct ir_raw_event. | ||
120 | * Always ensure the size of this union is dictated by struct ir_raw_event. | ||
121 | */ | ||
122 | union cx23888_ir_fifo_rec { | ||
123 | u32 hw_fifo_data; | ||
124 | struct ir_raw_event ir_core_data; | ||
125 | }; | ||
126 | |||
127 | #define CX23888_IR_RX_KFIFO_SIZE (256 * sizeof(union cx23888_ir_fifo_rec)) | ||
128 | #define CX23888_IR_TX_KFIFO_SIZE (256 * sizeof(union cx23888_ir_fifo_rec)) | ||
118 | 129 | ||
119 | struct cx23888_ir_state { | 130 | struct cx23888_ir_state { |
120 | struct v4l2_subdev sd; | 131 | struct v4l2_subdev sd; |
@@ -458,8 +469,8 @@ static u32 txclk_tx_s_max_pulse_width(struct cx23885_dev *dev, u32 ns, | |||
458 | { | 469 | { |
459 | u64 pulse_clocks; | 470 | u64 pulse_clocks; |
460 | 471 | ||
461 | if (ns > V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS) | 472 | if (ns > IR_MAX_DURATION) |
462 | ns = V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS; | 473 | ns = IR_MAX_DURATION; |
463 | pulse_clocks = ns_to_pulse_clocks(ns); | 474 | pulse_clocks = ns_to_pulse_clocks(ns); |
464 | *divider = pulse_clocks_to_clock_divider(pulse_clocks); | 475 | *divider = pulse_clocks_to_clock_divider(pulse_clocks); |
465 | cx23888_ir_write4(dev, CX23888_IR_TXCLK_REG, *divider); | 476 | cx23888_ir_write4(dev, CX23888_IR_TXCLK_REG, *divider); |
@@ -471,8 +482,8 @@ static u32 rxclk_rx_s_max_pulse_width(struct cx23885_dev *dev, u32 ns, | |||
471 | { | 482 | { |
472 | u64 pulse_clocks; | 483 | u64 pulse_clocks; |
473 | 484 | ||
474 | if (ns > V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS) | 485 | if (ns > IR_MAX_DURATION) |
475 | ns = V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS; | 486 | ns = IR_MAX_DURATION; |
476 | pulse_clocks = ns_to_pulse_clocks(ns); | 487 | pulse_clocks = ns_to_pulse_clocks(ns); |
477 | *divider = pulse_clocks_to_clock_divider(pulse_clocks); | 488 | *divider = pulse_clocks_to_clock_divider(pulse_clocks); |
478 | cx23888_ir_write4(dev, CX23888_IR_RXCLK_REG, *divider); | 489 | cx23888_ir_write4(dev, CX23888_IR_RXCLK_REG, *divider); |
@@ -535,8 +546,8 @@ static int cx23888_ir_irq_handler(struct v4l2_subdev *sd, u32 status, | |||
535 | u32 irqen = cx23888_ir_read4(dev, CX23888_IR_IRQEN_REG); | 546 | u32 irqen = cx23888_ir_read4(dev, CX23888_IR_IRQEN_REG); |
536 | u32 stats = cx23888_ir_read4(dev, CX23888_IR_STATS_REG); | 547 | u32 stats = cx23888_ir_read4(dev, CX23888_IR_STATS_REG); |
537 | 548 | ||
538 | u32 rx_data[FIFO_RX_DEPTH]; | 549 | union cx23888_ir_fifo_rec rx_data[FIFO_RX_DEPTH]; |
539 | int i, j, k; | 550 | unsigned int i, j, k; |
540 | u32 events, v; | 551 | u32 events, v; |
541 | int tsr, rsr, rto, ror, tse, rse, rte, roe, kror; | 552 | int tsr, rsr, rto, ror, tse, rse, rte, roe, kror; |
542 | 553 | ||
@@ -597,11 +608,12 @@ static int cx23888_ir_irq_handler(struct v4l2_subdev *sd, u32 status, | |||
597 | for (j = 0; | 608 | for (j = 0; |
598 | (v & FIFO_RX_NDV) && j < FIFO_RX_DEPTH; j++) { | 609 | (v & FIFO_RX_NDV) && j < FIFO_RX_DEPTH; j++) { |
599 | v = cx23888_ir_read4(dev, CX23888_IR_FIFO_REG); | 610 | v = cx23888_ir_read4(dev, CX23888_IR_FIFO_REG); |
600 | rx_data[i++] = v & ~FIFO_RX_NDV; | 611 | rx_data[i].hw_fifo_data = v & ~FIFO_RX_NDV; |
612 | i++; | ||
601 | } | 613 | } |
602 | if (i == 0) | 614 | if (i == 0) |
603 | break; | 615 | break; |
604 | j = i * sizeof(u32); | 616 | j = i * sizeof(union cx23888_ir_fifo_rec); |
605 | k = kfifo_in_locked(&state->rx_kfifo, | 617 | k = kfifo_in_locked(&state->rx_kfifo, |
606 | (unsigned char *) rx_data, j, | 618 | (unsigned char *) rx_data, j, |
607 | &state->rx_kfifo_lock); | 619 | &state->rx_kfifo_lock); |
@@ -660,10 +672,11 @@ static int cx23888_ir_rx_read(struct v4l2_subdev *sd, u8 *buf, size_t count, | |||
660 | u16 divider = (u16) atomic_read(&state->rxclk_divider); | 672 | u16 divider = (u16) atomic_read(&state->rxclk_divider); |
661 | 673 | ||
662 | unsigned int i, n; | 674 | unsigned int i, n; |
663 | u32 *p; | 675 | union cx23888_ir_fifo_rec *p; |
664 | u32 u, v; | 676 | unsigned u, v; |
665 | 677 | ||
666 | n = count / sizeof(u32) * sizeof(u32); | 678 | n = count / sizeof(union cx23888_ir_fifo_rec) |
679 | * sizeof(union cx23888_ir_fifo_rec); | ||
667 | if (n == 0) { | 680 | if (n == 0) { |
668 | *num = 0; | 681 | *num = 0; |
669 | return 0; | 682 | return 0; |
@@ -671,28 +684,28 @@ static int cx23888_ir_rx_read(struct v4l2_subdev *sd, u8 *buf, size_t count, | |||
671 | 684 | ||
672 | n = kfifo_out_locked(&state->rx_kfifo, buf, n, &state->rx_kfifo_lock); | 685 | n = kfifo_out_locked(&state->rx_kfifo, buf, n, &state->rx_kfifo_lock); |
673 | 686 | ||
674 | n /= sizeof(u32); | 687 | n /= sizeof(union cx23888_ir_fifo_rec); |
675 | *num = n * sizeof(u32); | 688 | *num = n * sizeof(union cx23888_ir_fifo_rec); |
676 | 689 | ||
677 | for (p = (u32 *) buf, i = 0; i < n; p++, i++) { | 690 | for (p = (union cx23888_ir_fifo_rec *) buf, i = 0; i < n; p++, i++) { |
678 | 691 | ||
679 | if ((*p & FIFO_RXTX_RTO) == FIFO_RXTX_RTO) { | 692 | if ((p->hw_fifo_data & FIFO_RXTX_RTO) == FIFO_RXTX_RTO) { |
680 | /* Assume RTO was because of no IR light input */ | 693 | /* Assume RTO was because of no IR light input */ |
681 | u = 0; | 694 | u = 0; |
682 | v4l2_dbg(2, ir_888_debug, sd, "rx read: end of rx\n"); | 695 | v4l2_dbg(2, ir_888_debug, sd, "rx read: end of rx\n"); |
683 | } else { | 696 | } else { |
684 | u = (*p & FIFO_RXTX_LVL) | 697 | u = (p->hw_fifo_data & FIFO_RXTX_LVL) ? 1 : 0; |
685 | ? V4L2_SUBDEV_IR_PULSE_LEVEL_MASK : 0; | ||
686 | if (invert) | 698 | if (invert) |
687 | u = u ? 0 : V4L2_SUBDEV_IR_PULSE_LEVEL_MASK; | 699 | u = u ? 0 : 1; |
688 | } | 700 | } |
689 | 701 | ||
690 | v = (u32) pulse_width_count_to_ns((u16) (*p & FIFO_RXTX), | 702 | v = (unsigned) pulse_width_count_to_ns( |
691 | divider); | 703 | (u16) (p->hw_fifo_data & FIFO_RXTX), divider); |
692 | if (v >= V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS) | 704 | if (v > IR_MAX_DURATION) |
693 | v = V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS - 1; | 705 | v = IR_MAX_DURATION; |
694 | 706 | ||
695 | *p = u | v; | 707 | p->ir_core_data.pulse = u; |
708 | p->ir_core_data.duration = v; | ||
696 | 709 | ||
697 | v4l2_dbg(2, ir_888_debug, sd, "rx read: %10u ns %s\n", | 710 | v4l2_dbg(2, ir_888_debug, sd, "rx read: %10u ns %s\n", |
698 | v, u ? "mark" : "space"); | 711 | v, u ? "mark" : "space"); |
@@ -751,7 +764,8 @@ static int cx23888_ir_rx_s_parameters(struct v4l2_subdev *sd, | |||
751 | 764 | ||
752 | o->mode = p->mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH; | 765 | o->mode = p->mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH; |
753 | 766 | ||
754 | o->bytes_per_data_element = p->bytes_per_data_element = sizeof(u32); | 767 | o->bytes_per_data_element = p->bytes_per_data_element |
768 | = sizeof(union cx23888_ir_fifo_rec); | ||
755 | 769 | ||
756 | /* Before we tweak the hardware, we have to disable the receiver */ | 770 | /* Before we tweak the hardware, we have to disable the receiver */ |
757 | irqenable_rx(dev, 0); | 771 | irqenable_rx(dev, 0); |
@@ -878,7 +892,8 @@ static int cx23888_ir_tx_s_parameters(struct v4l2_subdev *sd, | |||
878 | 892 | ||
879 | o->mode = p->mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH; | 893 | o->mode = p->mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH; |
880 | 894 | ||
881 | o->bytes_per_data_element = p->bytes_per_data_element = sizeof(u32); | 895 | o->bytes_per_data_element = p->bytes_per_data_element |
896 | = sizeof(union cx23888_ir_fifo_rec); | ||
882 | 897 | ||
883 | /* Before we tweak the hardware, we have to disable the transmitter */ | 898 | /* Before we tweak the hardware, we have to disable the transmitter */ |
884 | irqenable_tx(dev, 0); | 899 | irqenable_tx(dev, 0); |
@@ -1149,7 +1164,7 @@ static const struct v4l2_subdev_ops cx23888_ir_controller_ops = { | |||
1149 | }; | 1164 | }; |
1150 | 1165 | ||
1151 | static const struct v4l2_subdev_ir_parameters default_rx_params = { | 1166 | static const struct v4l2_subdev_ir_parameters default_rx_params = { |
1152 | .bytes_per_data_element = sizeof(u32), | 1167 | .bytes_per_data_element = sizeof(union cx23888_ir_fifo_rec), |
1153 | .mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH, | 1168 | .mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH, |
1154 | 1169 | ||
1155 | .enable = false, | 1170 | .enable = false, |
@@ -1168,7 +1183,7 @@ static const struct v4l2_subdev_ir_parameters default_rx_params = { | |||
1168 | }; | 1183 | }; |
1169 | 1184 | ||
1170 | static const struct v4l2_subdev_ir_parameters default_tx_params = { | 1185 | static const struct v4l2_subdev_ir_parameters default_tx_params = { |
1171 | .bytes_per_data_element = sizeof(u32), | 1186 | .bytes_per_data_element = sizeof(union cx23888_ir_fifo_rec), |
1172 | .mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH, | 1187 | .mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH, |
1173 | 1188 | ||
1174 | .enable = false, | 1189 | .enable = false, |
diff --git a/drivers/media/video/cx25840/cx25840-ir.c b/drivers/media/video/cx25840/cx25840-ir.c index be23c5b37a2f..34e284b06dfa 100644 --- a/drivers/media/video/cx25840/cx25840-ir.c +++ b/drivers/media/video/cx25840/cx25840-ir.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/slab.h> | 24 | #include <linux/slab.h> |
25 | #include <linux/kfifo.h> | 25 | #include <linux/kfifo.h> |
26 | #include <media/cx25840.h> | 26 | #include <media/cx25840.h> |
27 | #include <media/ir-core.h> | ||
27 | 28 | ||
28 | #include "cx25840-core.h" | 29 | #include "cx25840-core.h" |
29 | 30 | ||
@@ -94,8 +95,18 @@ MODULE_PARM_DESC(ir_debug, "enable integrated IR debug messages"); | |||
94 | #define CX25840_VIDCLK_FREQ 108000000 /* 108 MHz, BT.656 */ | 95 | #define CX25840_VIDCLK_FREQ 108000000 /* 108 MHz, BT.656 */ |
95 | #define CX25840_IR_REFCLK_FREQ (CX25840_VIDCLK_FREQ / 2) | 96 | #define CX25840_IR_REFCLK_FREQ (CX25840_VIDCLK_FREQ / 2) |
96 | 97 | ||
97 | #define CX25840_IR_RX_KFIFO_SIZE (512 * sizeof(u32)) | 98 | /* |
98 | #define CX25840_IR_TX_KFIFO_SIZE (512 * sizeof(u32)) | 99 | * We use this union internally for convenience, but callers to tx_write |
100 | * and rx_read will be expecting records of type struct ir_raw_event. | ||
101 | * Always ensure the size of this union is dictated by struct ir_raw_event. | ||
102 | */ | ||
103 | union cx25840_ir_fifo_rec { | ||
104 | u32 hw_fifo_data; | ||
105 | struct ir_raw_event ir_core_data; | ||
106 | }; | ||
107 | |||
108 | #define CX25840_IR_RX_KFIFO_SIZE (256 * sizeof(union cx25840_ir_fifo_rec)) | ||
109 | #define CX25840_IR_TX_KFIFO_SIZE (256 * sizeof(union cx25840_ir_fifo_rec)) | ||
99 | 110 | ||
100 | struct cx25840_ir_state { | 111 | struct cx25840_ir_state { |
101 | struct i2c_client *c; | 112 | struct i2c_client *c; |
@@ -435,8 +446,8 @@ static u32 txclk_tx_s_max_pulse_width(struct i2c_client *c, u32 ns, | |||
435 | { | 446 | { |
436 | u64 pulse_clocks; | 447 | u64 pulse_clocks; |
437 | 448 | ||
438 | if (ns > V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS) | 449 | if (ns > IR_MAX_DURATION) |
439 | ns = V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS; | 450 | ns = IR_MAX_DURATION; |
440 | pulse_clocks = ns_to_pulse_clocks(ns); | 451 | pulse_clocks = ns_to_pulse_clocks(ns); |
441 | *divider = pulse_clocks_to_clock_divider(pulse_clocks); | 452 | *divider = pulse_clocks_to_clock_divider(pulse_clocks); |
442 | cx25840_write4(c, CX25840_IR_TXCLK_REG, *divider); | 453 | cx25840_write4(c, CX25840_IR_TXCLK_REG, *divider); |
@@ -448,8 +459,8 @@ static u32 rxclk_rx_s_max_pulse_width(struct i2c_client *c, u32 ns, | |||
448 | { | 459 | { |
449 | u64 pulse_clocks; | 460 | u64 pulse_clocks; |
450 | 461 | ||
451 | if (ns > V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS) | 462 | if (ns > IR_MAX_DURATION) |
452 | ns = V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS; | 463 | ns = IR_MAX_DURATION; |
453 | pulse_clocks = ns_to_pulse_clocks(ns); | 464 | pulse_clocks = ns_to_pulse_clocks(ns); |
454 | *divider = pulse_clocks_to_clock_divider(pulse_clocks); | 465 | *divider = pulse_clocks_to_clock_divider(pulse_clocks); |
455 | cx25840_write4(c, CX25840_IR_RXCLK_REG, *divider); | 466 | cx25840_write4(c, CX25840_IR_RXCLK_REG, *divider); |
@@ -516,8 +527,8 @@ int cx25840_ir_irq_handler(struct v4l2_subdev *sd, u32 status, bool *handled) | |||
516 | struct i2c_client *c = NULL; | 527 | struct i2c_client *c = NULL; |
517 | unsigned long flags; | 528 | unsigned long flags; |
518 | 529 | ||
519 | u32 rx_data[FIFO_RX_DEPTH]; | 530 | union cx25840_ir_fifo_rec rx_data[FIFO_RX_DEPTH]; |
520 | int i, j, k; | 531 | unsigned int i, j, k; |
521 | u32 events, v; | 532 | u32 events, v; |
522 | int tsr, rsr, rto, ror, tse, rse, rte, roe, kror; | 533 | int tsr, rsr, rto, ror, tse, rse, rte, roe, kror; |
523 | u32 cntrl, irqen, stats; | 534 | u32 cntrl, irqen, stats; |
@@ -594,11 +605,12 @@ int cx25840_ir_irq_handler(struct v4l2_subdev *sd, u32 status, bool *handled) | |||
594 | for (j = 0; | 605 | for (j = 0; |
595 | (v & FIFO_RX_NDV) && j < FIFO_RX_DEPTH; j++) { | 606 | (v & FIFO_RX_NDV) && j < FIFO_RX_DEPTH; j++) { |
596 | v = cx25840_read4(c, CX25840_IR_FIFO_REG); | 607 | v = cx25840_read4(c, CX25840_IR_FIFO_REG); |
597 | rx_data[i++] = v & ~FIFO_RX_NDV; | 608 | rx_data[i].hw_fifo_data = v & ~FIFO_RX_NDV; |
609 | i++; | ||
598 | } | 610 | } |
599 | if (i == 0) | 611 | if (i == 0) |
600 | break; | 612 | break; |
601 | j = i * sizeof(u32); | 613 | j = i * sizeof(union cx25840_ir_fifo_rec); |
602 | k = kfifo_in_locked(&ir_state->rx_kfifo, | 614 | k = kfifo_in_locked(&ir_state->rx_kfifo, |
603 | (unsigned char *) rx_data, j, | 615 | (unsigned char *) rx_data, j, |
604 | &ir_state->rx_kfifo_lock); | 616 | &ir_state->rx_kfifo_lock); |
@@ -655,8 +667,8 @@ static int cx25840_ir_rx_read(struct v4l2_subdev *sd, u8 *buf, size_t count, | |||
655 | bool invert; | 667 | bool invert; |
656 | u16 divider; | 668 | u16 divider; |
657 | unsigned int i, n; | 669 | unsigned int i, n; |
658 | u32 *p; | 670 | union cx25840_ir_fifo_rec *p; |
659 | u32 u, v; | 671 | unsigned u, v; |
660 | 672 | ||
661 | if (ir_state == NULL) | 673 | if (ir_state == NULL) |
662 | return -ENODEV; | 674 | return -ENODEV; |
@@ -664,7 +676,8 @@ static int cx25840_ir_rx_read(struct v4l2_subdev *sd, u8 *buf, size_t count, | |||
664 | invert = (bool) atomic_read(&ir_state->rx_invert); | 676 | invert = (bool) atomic_read(&ir_state->rx_invert); |
665 | divider = (u16) atomic_read(&ir_state->rxclk_divider); | 677 | divider = (u16) atomic_read(&ir_state->rxclk_divider); |
666 | 678 | ||
667 | n = count / sizeof(u32) * sizeof(u32); | 679 | n = count / sizeof(union cx25840_ir_fifo_rec) |
680 | * sizeof(union cx25840_ir_fifo_rec); | ||
668 | if (n == 0) { | 681 | if (n == 0) { |
669 | *num = 0; | 682 | *num = 0; |
670 | return 0; | 683 | return 0; |
@@ -673,28 +686,28 @@ static int cx25840_ir_rx_read(struct v4l2_subdev *sd, u8 *buf, size_t count, | |||
673 | n = kfifo_out_locked(&ir_state->rx_kfifo, buf, n, | 686 | n = kfifo_out_locked(&ir_state->rx_kfifo, buf, n, |
674 | &ir_state->rx_kfifo_lock); | 687 | &ir_state->rx_kfifo_lock); |
675 | 688 | ||
676 | n /= sizeof(u32); | 689 | n /= sizeof(union cx25840_ir_fifo_rec); |
677 | *num = n * sizeof(u32); | 690 | *num = n * sizeof(union cx25840_ir_fifo_rec); |
678 | 691 | ||
679 | for (p = (u32 *) buf, i = 0; i < n; p++, i++) { | 692 | for (p = (union cx25840_ir_fifo_rec *) buf, i = 0; i < n; p++, i++) { |
680 | 693 | ||
681 | if ((*p & FIFO_RXTX_RTO) == FIFO_RXTX_RTO) { | 694 | if ((p->hw_fifo_data & FIFO_RXTX_RTO) == FIFO_RXTX_RTO) { |
682 | /* Assume RTO was because of no IR light input */ | 695 | /* Assume RTO was because of no IR light input */ |
683 | u = 0; | 696 | u = 0; |
684 | v4l2_dbg(2, ir_debug, sd, "rx read: end of rx\n"); | 697 | v4l2_dbg(2, ir_debug, sd, "rx read: end of rx\n"); |
685 | } else { | 698 | } else { |
686 | u = (*p & FIFO_RXTX_LVL) | 699 | u = (p->hw_fifo_data & FIFO_RXTX_LVL) ? 1 : 0; |
687 | ? V4L2_SUBDEV_IR_PULSE_LEVEL_MASK : 0; | ||
688 | if (invert) | 700 | if (invert) |
689 | u = u ? 0 : V4L2_SUBDEV_IR_PULSE_LEVEL_MASK; | 701 | u = u ? 0 : 1; |
690 | } | 702 | } |
691 | 703 | ||
692 | v = (u32) pulse_width_count_to_ns((u16) (*p & FIFO_RXTX), | 704 | v = (unsigned) pulse_width_count_to_ns( |
693 | divider); | 705 | (u16) (p->hw_fifo_data & FIFO_RXTX), divider); |
694 | if (v >= V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS) | 706 | if (v > IR_MAX_DURATION) |
695 | v = V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS - 1; | 707 | v = IR_MAX_DURATION; |
696 | 708 | ||
697 | *p = u | v; | 709 | p->ir_core_data.pulse = u; |
710 | p->ir_core_data.duration = v; | ||
698 | 711 | ||
699 | v4l2_dbg(2, ir_debug, sd, "rx read: %10u ns %s\n", | 712 | v4l2_dbg(2, ir_debug, sd, "rx read: %10u ns %s\n", |
700 | v, u ? "mark" : "space"); | 713 | v, u ? "mark" : "space"); |
@@ -769,7 +782,7 @@ static int cx25840_ir_rx_s_parameters(struct v4l2_subdev *sd, | |||
769 | p->mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH; | 782 | p->mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH; |
770 | o->mode = p->mode; | 783 | o->mode = p->mode; |
771 | 784 | ||
772 | p->bytes_per_data_element = sizeof(u32); | 785 | p->bytes_per_data_element = sizeof(union cx25840_ir_fifo_rec); |
773 | o->bytes_per_data_element = p->bytes_per_data_element; | 786 | o->bytes_per_data_element = p->bytes_per_data_element; |
774 | 787 | ||
775 | /* Before we tweak the hardware, we have to disable the receiver */ | 788 | /* Before we tweak the hardware, we have to disable the receiver */ |
@@ -958,7 +971,7 @@ static int cx25840_ir_tx_s_parameters(struct v4l2_subdev *sd, | |||
958 | p->mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH; | 971 | p->mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH; |
959 | o->mode = p->mode; | 972 | o->mode = p->mode; |
960 | 973 | ||
961 | p->bytes_per_data_element = sizeof(u32); | 974 | p->bytes_per_data_element = sizeof(union cx25840_ir_fifo_rec); |
962 | o->bytes_per_data_element = p->bytes_per_data_element; | 975 | o->bytes_per_data_element = p->bytes_per_data_element; |
963 | 976 | ||
964 | /* Before we tweak the hardware, we have to disable the transmitter */ | 977 | /* Before we tweak the hardware, we have to disable the transmitter */ |
@@ -1172,7 +1185,7 @@ const struct v4l2_subdev_ir_ops cx25840_ir_ops = { | |||
1172 | 1185 | ||
1173 | 1186 | ||
1174 | static const struct v4l2_subdev_ir_parameters default_rx_params = { | 1187 | static const struct v4l2_subdev_ir_parameters default_rx_params = { |
1175 | .bytes_per_data_element = sizeof(u32), | 1188 | .bytes_per_data_element = sizeof(union cx25840_ir_fifo_rec), |
1176 | .mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH, | 1189 | .mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH, |
1177 | 1190 | ||
1178 | .enable = false, | 1191 | .enable = false, |
@@ -1191,7 +1204,7 @@ static const struct v4l2_subdev_ir_parameters default_rx_params = { | |||
1191 | }; | 1204 | }; |
1192 | 1205 | ||
1193 | static const struct v4l2_subdev_ir_parameters default_tx_params = { | 1206 | static const struct v4l2_subdev_ir_parameters default_tx_params = { |
1194 | .bytes_per_data_element = sizeof(u32), | 1207 | .bytes_per_data_element = sizeof(union cx25840_ir_fifo_rec), |
1195 | .mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH, | 1208 | .mode = V4L2_SUBDEV_IR_MODE_PULSE_WIDTH, |
1196 | 1209 | ||
1197 | .enable = false, | 1210 | .enable = false, |