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authorDave Airlie <airlied@linux.ie>2009-11-02 23:54:36 -0500
committerDave Airlie <airlied@redhat.com>2009-11-03 21:12:44 -0500
commit4d357abb895ec51f1cbdebb1fbbf4d4576900a2e (patch)
treed97f2d4ba0ca341d8ac8815a46ccb05e2679df11 /drivers
parent8a9832e89ff1bc7a039c8f966f07101570be3d5e (diff)
drm/radeon/kms: stop putting VRAM at 0 in MC space on r600s.
The Lenovo W500 laptop hangs inside an SMI on brightness changes, I thought it just needed the VGA disable but it turned out to require slightly more work, setting the MC locations up just like the IGP chip requirements seems to make it all happy again and I can boot and play with brightness. We should probably just do this for all chips and give up the VRAM at 0x0 idea, it never seems to buy us anything but pain. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/radeon/r600.c44
1 files changed, 19 insertions, 25 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 60fbb236edfd..3e5703f324bd 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -409,35 +409,29 @@ int r600_mc_init(struct radeon_device *rdev)
409 rdev->mc.gtt_location = rdev->mc.mc_vram_size; 409 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
410 } 410 }
411 } else { 411 } else {
412 if (rdev->family == CHIP_RS780 || rdev->family == CHIP_RS880) { 412 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
413 rdev->mc.vram_location = (RREG32(MC_VM_FB_LOCATION) & 413 rdev->mc.vram_location = (RREG32(MC_VM_FB_LOCATION) &
414 0xFFFF) << 24; 414 0xFFFF) << 24;
415 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024; 415 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size;
416 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size; 416 if ((0xFFFFFFFFUL - tmp) >= rdev->mc.gtt_size) {
417 if ((0xFFFFFFFFUL - tmp) >= rdev->mc.gtt_size) { 417 /* Enough place after vram */
418 /* Enough place after vram */ 418 rdev->mc.gtt_location = tmp;
419 rdev->mc.gtt_location = tmp; 419 } else if (rdev->mc.vram_location >= rdev->mc.gtt_size) {
420 } else if (rdev->mc.vram_location >= rdev->mc.gtt_size) { 420 /* Enough place before vram */
421 /* Enough place before vram */ 421 rdev->mc.gtt_location = 0;
422 } else {
423 /* Not enough place after or before shrink
424 * gart size
425 */
426 if (rdev->mc.vram_location > (0xFFFFFFFFUL - tmp)) {
422 rdev->mc.gtt_location = 0; 427 rdev->mc.gtt_location = 0;
428 rdev->mc.gtt_size = rdev->mc.vram_location;
423 } else { 429 } else {
424 /* Not enough place after or before shrink 430 rdev->mc.gtt_location = tmp;
425 * gart size 431 rdev->mc.gtt_size = 0xFFFFFFFFUL - tmp;
426 */
427 if (rdev->mc.vram_location > (0xFFFFFFFFUL - tmp)) {
428 rdev->mc.gtt_location = 0;
429 rdev->mc.gtt_size = rdev->mc.vram_location;
430 } else {
431 rdev->mc.gtt_location = tmp;
432 rdev->mc.gtt_size = 0xFFFFFFFFUL - tmp;
433 }
434 } 432 }
435 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
436 } else {
437 rdev->mc.vram_location = 0x00000000UL;
438 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
439 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
440 } 433 }
434 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
441 } 435 }
442 rdev->mc.vram_start = rdev->mc.vram_location; 436 rdev->mc.vram_start = rdev->mc.vram_location;
443 rdev->mc.vram_end = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1; 437 rdev->mc.vram_end = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;