aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorDave Airlie <airlied@linux.ie>2009-06-03 17:08:13 -0400
committerDave Airlie <airlied@redhat.com>2009-06-03 19:14:28 -0400
commit9863871bd1bbf218b921af5e0bc48ca4f6ea9f12 (patch)
tree5e6c5a64fd48d4030fe10da7d541ecf93f6f3cf3 /drivers
parentb8da7de56ca0ad34726478a50d138a29a9ff76cb (diff)
drm/radeon: fix ring free alignment calculations
fd.o bz#21849 We were aligning to +16 dwords, instead of to the next 16dword boundary in the ring. Fix the calculation to go to the next 16dword boundary when space checking. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/radeon/radeon_cp.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.h5
2 files changed, 6 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
index 77a7a4d84650..aff90bb96488 100644
--- a/drivers/gpu/drm/radeon/radeon_cp.c
+++ b/drivers/gpu/drm/radeon/radeon_cp.c
@@ -2185,9 +2185,9 @@ void radeon_commit_ring(drm_radeon_private_t *dev_priv)
2185 2185
2186 /* check if the ring is padded out to 16-dword alignment */ 2186 /* check if the ring is padded out to 16-dword alignment */
2187 2187
2188 tail_aligned = dev_priv->ring.tail & 0xf; 2188 tail_aligned = dev_priv->ring.tail & (RADEON_RING_ALIGN-1);
2189 if (tail_aligned) { 2189 if (tail_aligned) {
2190 int num_p2 = 16 - tail_aligned; 2190 int num_p2 = RADEON_RING_ALIGN - tail_aligned;
2191 2191
2192 ring = dev_priv->ring.start; 2192 ring = dev_priv->ring.start;
2193 /* pad with some CP_PACKET2 */ 2193 /* pad with some CP_PACKET2 */
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index 8071d965f142..0c6bfc1de153 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -1964,11 +1964,14 @@ do { \
1964 1964
1965#define RING_LOCALS int write, _nr, _align_nr; unsigned int mask; u32 *ring; 1965#define RING_LOCALS int write, _nr, _align_nr; unsigned int mask; u32 *ring;
1966 1966
1967#define RADEON_RING_ALIGN 16
1968
1967#define BEGIN_RING( n ) do { \ 1969#define BEGIN_RING( n ) do { \
1968 if ( RADEON_VERBOSE ) { \ 1970 if ( RADEON_VERBOSE ) { \
1969 DRM_INFO( "BEGIN_RING( %d )\n", (n)); \ 1971 DRM_INFO( "BEGIN_RING( %d )\n", (n)); \
1970 } \ 1972 } \
1971 _align_nr = (n + 0xf) & ~0xf; \ 1973 _align_nr = RADEON_RING_ALIGN - ((dev_priv->ring.tail + n) & (RADEON_RING_ALIGN-1)); \
1974 _align_nr += n; \
1972 if (dev_priv->ring.space <= (_align_nr * sizeof(u32))) { \ 1975 if (dev_priv->ring.space <= (_align_nr * sizeof(u32))) { \
1973 COMMIT_RING(); \ 1976 COMMIT_RING(); \
1974 radeon_wait_ring( dev_priv, _align_nr * sizeof(u32)); \ 1977 radeon_wait_ring( dev_priv, _align_nr * sizeof(u32)); \