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authorBen Dooks <ben@simtec.co.uk>2009-08-18 17:11:16 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-08-18 19:31:13 -0400
commitb8978784544e8b4e8fbacb558df8580957d4f8a5 (patch)
treeecc74e896383a4203d0bdd679161bd419f4b430e /drivers
parentb2503a9408e44eb0531adc3436c513ea70f91c42 (diff)
spi_s3c24xx: fix clock rate calculation
Currently the clock rate calculation may round as pleased, which means that it is possible that we will round down and end up with a faster clock rate than intended. Change the calculation to use DIV_ROUND_UP() to ensure that we end up with a clock rate either the same as or lower than the user requested one. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/spi/spi_s3c24xx.c17
1 files changed, 7 insertions, 10 deletions
diff --git a/drivers/spi/spi_s3c24xx.c b/drivers/spi/spi_s3c24xx.c
index e0d44af4745a..590be85c8f3d 100644
--- a/drivers/spi/spi_s3c24xx.c
+++ b/drivers/spi/spi_s3c24xx.c
@@ -111,6 +111,7 @@ static int s3c24xx_spi_setupxfer(struct spi_device *spi,
111 unsigned int bpw; 111 unsigned int bpw;
112 unsigned int hz; 112 unsigned int hz;
113 unsigned int div; 113 unsigned int div;
114 unsigned long clk;
114 115
115 bpw = t ? t->bits_per_word : spi->bits_per_word; 116 bpw = t ? t->bits_per_word : spi->bits_per_word;
116 hz = t ? t->speed_hz : spi->max_speed_hz; 117 hz = t ? t->speed_hz : spi->max_speed_hz;
@@ -120,20 +121,16 @@ static int s3c24xx_spi_setupxfer(struct spi_device *spi,
120 return -EINVAL; 121 return -EINVAL;
121 } 122 }
122 123
123 div = clk_get_rate(hw->clk) / hz; 124 clk = clk_get_rate(hw->clk);
124 125 div = DIV_ROUND_UP(clk, hz * 2) - 1;
125 /* is clk = pclk / (2 * (pre+1)), or is it
126 * clk = (pclk * 2) / ( pre + 1) */
127
128 div /= 2;
129
130 if (div > 0)
131 div -= 1;
132 126
133 if (div > 255) 127 if (div > 255)
134 div = 255; 128 div = 255;
135 129
136 dev_dbg(&spi->dev, "setting pre-scaler to %d (hz %d)\n", div, hz); 130 dev_dbg(&spi->dev, "setting pre-scaler to %d (wanted %d, got %ld)\n",
131 div, hz, clk / (2 * (div + 1)));
132
133
137 writeb(div, hw->regs + S3C2410_SPPRE); 134 writeb(div, hw->regs + S3C2410_SPPRE);
138 135
139 spin_lock(&hw->bitbang.lock); 136 spin_lock(&hw->bitbang.lock);