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authorDmitry Kasatkin <dmitry.kasatkin@nokia.com>2010-11-30 03:13:30 -0500
committerHerbert Xu <herbert@gondor.apana.org.au>2010-12-02 03:37:06 -0500
commit67a730ce449561f6df838f0b38a2b72cbf4e3c4c (patch)
treeb4ef7c3a16500e9b47477bc9159000c771ef1a0a /drivers
parent21fe9767f3bd56fd9a271dc43b93cd4608d47f4a (diff)
crypto: omap-aes - unnecessary code removed
Key and IV should always be set before AES operation. So no need to check if it has changed or not. Signed-off-by: Dmitry Kasatkin <dmitry.kasatkin@nokia.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/crypto/omap-aes.c70
1 files changed, 17 insertions, 53 deletions
diff --git a/drivers/crypto/omap-aes.c b/drivers/crypto/omap-aes.c
index 704cc701ab42..0b21dcef0289 100644
--- a/drivers/crypto/omap-aes.c
+++ b/drivers/crypto/omap-aes.c
@@ -74,11 +74,9 @@
74#define FLAGS_CBC BIT(1) 74#define FLAGS_CBC BIT(1)
75#define FLAGS_GIV BIT(2) 75#define FLAGS_GIV BIT(2)
76 76
77#define FLAGS_NEW_KEY BIT(4) 77#define FLAGS_INIT BIT(4)
78#define FLAGS_NEW_IV BIT(5) 78#define FLAGS_FAST BIT(5)
79#define FLAGS_INIT BIT(6) 79#define FLAGS_BUSY BIT(6)
80#define FLAGS_FAST BIT(7)
81#define FLAGS_BUSY BIT(8)
82 80
83struct omap_aes_ctx { 81struct omap_aes_ctx {
84 struct omap_aes_dev *dd; 82 struct omap_aes_dev *dd;
@@ -105,9 +103,6 @@ struct omap_aes_dev {
105 unsigned long flags; 103 unsigned long flags;
106 int err; 104 int err;
107 105
108 u32 *iv;
109 u32 ctrl;
110
111 spinlock_t lock; 106 spinlock_t lock;
112 struct crypto_queue queue; 107 struct crypto_queue queue;
113 108
@@ -209,28 +204,13 @@ static int omap_aes_hw_init(struct omap_aes_dev *dd)
209static int omap_aes_write_ctrl(struct omap_aes_dev *dd) 204static int omap_aes_write_ctrl(struct omap_aes_dev *dd)
210{ 205{
211 unsigned int key32; 206 unsigned int key32;
212 int i, err, init = dd->flags & FLAGS_INIT; 207 int i, err;
213 u32 val, mask; 208 u32 val, mask;
214 209
215 err = omap_aes_hw_init(dd); 210 err = omap_aes_hw_init(dd);
216 if (err) 211 if (err)
217 return err; 212 return err;
218 213
219 val = FLD_VAL(((dd->ctx->keylen >> 3) - 1), 4, 3);
220 if (dd->flags & FLAGS_CBC)
221 val |= AES_REG_CTRL_CBC;
222 if (dd->flags & FLAGS_ENCRYPT)
223 val |= AES_REG_CTRL_DIRECTION;
224
225 /* check if hw state & mode have not changed */
226 if (init && dd->ctrl == val && !(dd->flags & FLAGS_NEW_IV) &&
227 !(dd->ctx->flags & FLAGS_NEW_KEY))
228 goto out;
229
230 /* only need to write control registers for new settings */
231
232 dd->ctrl = val;
233
234 val = 0; 214 val = 0;
235 if (dd->dma_lch_out >= 0) 215 if (dd->dma_lch_out >= 0)
236 val |= AES_REG_MASK_DMA_OUT_EN; 216 val |= AES_REG_MASK_DMA_OUT_EN;
@@ -241,27 +221,28 @@ static int omap_aes_write_ctrl(struct omap_aes_dev *dd)
241 221
242 omap_aes_write_mask(dd, AES_REG_MASK, val, mask); 222 omap_aes_write_mask(dd, AES_REG_MASK, val, mask);
243 223
244 pr_debug("Set key\n");
245 key32 = dd->ctx->keylen / sizeof(u32); 224 key32 = dd->ctx->keylen / sizeof(u32);
246 /* set a key */ 225
226 /* it seems a key should always be set even if it has not changed */
247 for (i = 0; i < key32; i++) { 227 for (i = 0; i < key32; i++) {
248 omap_aes_write(dd, AES_REG_KEY(i), 228 omap_aes_write(dd, AES_REG_KEY(i),
249 __le32_to_cpu(dd->ctx->key[i])); 229 __le32_to_cpu(dd->ctx->key[i]));
250 } 230 }
251 dd->ctx->flags &= ~FLAGS_NEW_KEY;
252 231
253 if (dd->flags & FLAGS_NEW_IV) { 232 if ((dd->flags & FLAGS_CBC) && dd->req->info)
254 pr_debug("Set IV\n"); 233 omap_aes_write_n(dd, AES_REG_IV(0), dd->req->info, 4);
255 omap_aes_write_n(dd, AES_REG_IV(0), dd->iv, 4); 234
256 dd->flags &= ~FLAGS_NEW_IV; 235 val = FLD_VAL(((dd->ctx->keylen >> 3) - 1), 4, 3);
257 } 236 if (dd->flags & FLAGS_CBC)
237 val |= AES_REG_CTRL_CBC;
238 if (dd->flags & FLAGS_ENCRYPT)
239 val |= AES_REG_CTRL_DIRECTION;
258 240
259 mask = AES_REG_CTRL_CBC | AES_REG_CTRL_DIRECTION | 241 mask = AES_REG_CTRL_CBC | AES_REG_CTRL_DIRECTION |
260 AES_REG_CTRL_KEY_SIZE; 242 AES_REG_CTRL_KEY_SIZE;
261 243
262 omap_aes_write_mask(dd, AES_REG_CTRL, dd->ctrl, mask); 244 omap_aes_write_mask(dd, AES_REG_CTRL, val, mask);
263 245
264out:
265 /* start DMA or disable idle mode */ 246 /* start DMA or disable idle mode */
266 omap_aes_write_mask(dd, AES_REG_MASK, AES_REG_MASK_START, 247 omap_aes_write_mask(dd, AES_REG_MASK, AES_REG_MASK_START,
267 AES_REG_MASK_START); 248 AES_REG_MASK_START);
@@ -561,16 +542,12 @@ static int omap_aes_crypt_dma_start(struct omap_aes_dev *dd)
561static void omap_aes_finish_req(struct omap_aes_dev *dd, int err) 542static void omap_aes_finish_req(struct omap_aes_dev *dd, int err)
562{ 543{
563 struct ablkcipher_request *req = dd->req; 544 struct ablkcipher_request *req = dd->req;
564 struct omap_aes_ctx *ctx;
565 545
566 pr_debug("err: %d\n", err); 546 pr_debug("err: %d\n", err);
567 547
568 dd->flags &= ~FLAGS_BUSY; 548 dd->flags &= ~FLAGS_BUSY;
569 549
570 ctx = crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req)); 550 req->base.complete(&req->base, err);
571
572 if (req->base.complete)
573 req->base.complete(&req->base, err);
574} 551}
575 552
576static int omap_aes_crypt_dma_stop(struct omap_aes_dev *dd) 553static int omap_aes_crypt_dma_stop(struct omap_aes_dev *dd)
@@ -636,8 +613,6 @@ static int omap_aes_handle_queue(struct omap_aes_dev *dd,
636 613
637 req = ablkcipher_request_cast(async_req); 614 req = ablkcipher_request_cast(async_req);
638 615
639 pr_debug("get new req\n");
640
641 /* assign new request to device */ 616 /* assign new request to device */
642 dd->req = req; 617 dd->req = req;
643 dd->total = req->nbytes; 618 dd->total = req->nbytes;
@@ -651,18 +626,8 @@ static int omap_aes_handle_queue(struct omap_aes_dev *dd,
651 rctx->mode &= FLAGS_MODE_MASK; 626 rctx->mode &= FLAGS_MODE_MASK;
652 dd->flags = (dd->flags & ~FLAGS_MODE_MASK) | rctx->mode; 627 dd->flags = (dd->flags & ~FLAGS_MODE_MASK) | rctx->mode;
653 628
654 dd->iv = req->info; 629 dd->ctx = ctx;
655 if ((dd->flags & FLAGS_CBC) && dd->iv)
656 dd->flags |= FLAGS_NEW_IV;
657 else
658 dd->flags &= ~FLAGS_NEW_IV;
659
660 ctx->dd = dd; 630 ctx->dd = dd;
661 if (dd->ctx != ctx) {
662 /* assign new context to device */
663 dd->ctx = ctx;
664 ctx->flags |= FLAGS_NEW_KEY;
665 }
666 631
667 err = omap_aes_crypt_dma_start(dd); 632 err = omap_aes_crypt_dma_start(dd);
668 if (err) { 633 if (err) {
@@ -744,7 +709,6 @@ static int omap_aes_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
744 709
745 memcpy(ctx->key, key, keylen); 710 memcpy(ctx->key, key, keylen);
746 ctx->keylen = keylen; 711 ctx->keylen = keylen;
747 ctx->flags |= FLAGS_NEW_KEY;
748 712
749 return 0; 713 return 0;
750} 714}