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authorPhilip, Avinash <avinashphilip@ti.com>2013-01-10 08:05:26 -0500
committerThierry Reding <thierry.reding@avionic-design.de>2013-01-14 02:12:27 -0500
commit0074b49b3fa0886047413dbca0508594b1d80c61 (patch)
tree036431ce26e24aaf66c44a075024685dc1ba3871 /drivers
parent3ccb1c1702ed4bb07006d20c8173899a69dae242 (diff)
pwm: pwm-tiehrpwm: Update the clock handling of pwm-tiehrpwm driver
The clock framework has changed and it's now better to invoke clock_prepare_enable() and clk_disable_unprepare() rather than the legacy clk_enable() and clk_disable() calls. This patch converts the pwm-tiehrpwm driver to the new framework. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pwm/pwm-tiehrpwm.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/pwm/pwm-tiehrpwm.c b/drivers/pwm/pwm-tiehrpwm.c
index 72a6dd40c9ec..4fcafbfba60e 100644
--- a/drivers/pwm/pwm-tiehrpwm.c
+++ b/drivers/pwm/pwm-tiehrpwm.c
@@ -318,6 +318,7 @@ static int ehrpwm_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
318{ 318{
319 struct ehrpwm_pwm_chip *pc = to_ehrpwm_pwm_chip(chip); 319 struct ehrpwm_pwm_chip *pc = to_ehrpwm_pwm_chip(chip);
320 unsigned short aqcsfrc_val, aqcsfrc_mask; 320 unsigned short aqcsfrc_val, aqcsfrc_mask;
321 int ret;
321 322
322 /* Leave clock enabled on enabling PWM */ 323 /* Leave clock enabled on enabling PWM */
323 pm_runtime_get_sync(chip->dev); 324 pm_runtime_get_sync(chip->dev);
@@ -341,7 +342,12 @@ static int ehrpwm_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
341 configure_polarity(pc, pwm->hwpwm); 342 configure_polarity(pc, pwm->hwpwm);
342 343
343 /* Enable TBCLK before enabling PWM device */ 344 /* Enable TBCLK before enabling PWM device */
344 clk_enable(pc->tbclk); 345 ret = clk_prepare_enable(pc->tbclk);
346 if (ret) {
347 pr_err("Failed to enable TBCLK for %s\n",
348 dev_name(pc->chip.dev));
349 return ret;
350 }
345 351
346 /* Enable time counter for free_run */ 352 /* Enable time counter for free_run */
347 ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_RUN_MASK, TBCTL_FREE_RUN); 353 ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_RUN_MASK, TBCTL_FREE_RUN);
@@ -372,7 +378,7 @@ static void ehrpwm_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
372 ehrpwm_modify(pc->mmio_base, AQCSFRC, aqcsfrc_mask, aqcsfrc_val); 378 ehrpwm_modify(pc->mmio_base, AQCSFRC, aqcsfrc_mask, aqcsfrc_val);
373 379
374 /* Disabling TBCLK on PWM disable */ 380 /* Disabling TBCLK on PWM disable */
375 clk_disable(pc->tbclk); 381 clk_disable_unprepare(pc->tbclk);
376 382
377 /* Stop Time base counter */ 383 /* Stop Time base counter */
378 ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_RUN_MASK, TBCTL_STOP_NEXT); 384 ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_RUN_MASK, TBCTL_STOP_NEXT);