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authorVitaly Bordug <vbordug@ru.mvista.com>2006-09-21 14:37:58 -0400
committerVitaly Bordug <vbordug@ru.mvista.com>2006-09-21 14:37:58 -0400
commitfc8e50e349aa722d9f97ed9ba30e324ede8fa408 (patch)
tree8ed14947a5c448f697240006efab77aac60281b7 /drivers
parent902f392d011d0a781ea4695c464345faa6664540 (diff)
POWERPC: Get rid of remapping the whole immr
The stuff below cleans up the code attempting to remap the whole cpm2_immr early, as well as places happily assuming that fact. This is more like the 2.4 legacy stuff, and is at least confusing and unclear now. To keep the world comfortable, a new mechanism is introduced: before accessing specific immr register/register set, one needs to map it, using cpm2_map(<reg>), for instance, access to CPM command register will look like volatile cpm_cpm2_t *cp = cpm2_map(im_cpm); keeping the code clear, yet without "already defined somewhere" cpm2_immr. So far, unmapping code is not implemented, but it's not a big deal to add it, if the whole idea makes sense. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/serial/cpm_uart/cpm_uart_cpm2.c130
-rw-r--r--drivers/serial/cpm_uart/cpm_uart_cpm2.h2
2 files changed, 88 insertions, 44 deletions
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
index 02b9ef9abd3f..b691d3e14754 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
@@ -51,8 +51,9 @@
51 51
52void cpm_line_cr_cmd(int line, int cmd) 52void cpm_line_cr_cmd(int line, int cmd)
53{ 53{
54 volatile cpm_cpm2_t *cp = cpmp;
55 ulong val; 54 ulong val;
55 volatile cpm_cpm2_t *cp = cpm2_map(im_cpm);
56
56 57
57 switch (line) { 58 switch (line) {
58 case UART_SMC1: 59 case UART_SMC1:
@@ -85,11 +86,14 @@ void cpm_line_cr_cmd(int line, int cmd)
85 } 86 }
86 cp->cp_cpcr = val; 87 cp->cp_cpcr = val;
87 while (cp->cp_cpcr & CPM_CR_FLG) ; 88 while (cp->cp_cpcr & CPM_CR_FLG) ;
89
90 cpm2_unmap(cp);
88} 91}
89 92
90void smc1_lineif(struct uart_cpm_port *pinfo) 93void smc1_lineif(struct uart_cpm_port *pinfo)
91{ 94{
92 volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; 95 volatile iop_cpm2_t *io = cpm2_map(im_ioport);
96 volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
93 97
94 /* SMC1 is only on port D */ 98 /* SMC1 is only on port D */
95 io->iop_ppard |= 0x00c00000; 99 io->iop_ppard |= 0x00c00000;
@@ -98,13 +102,17 @@ void smc1_lineif(struct uart_cpm_port *pinfo)
98 io->iop_psord &= ~0x00c00000; 102 io->iop_psord &= ~0x00c00000;
99 103
100 /* Wire BRG1 to SMC1 */ 104 /* Wire BRG1 to SMC1 */
101 cpm2_immr->im_cpmux.cmx_smr &= 0x0f; 105 cpmux->cmx_smr &= 0x0f;
102 pinfo->brg = 1; 106 pinfo->brg = 1;
107
108 cpm2_unmap(cpmux);
109 cpm2_unmap(io);
103} 110}
104 111
105void smc2_lineif(struct uart_cpm_port *pinfo) 112void smc2_lineif(struct uart_cpm_port *pinfo)
106{ 113{
107 volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; 114 volatile iop_cpm2_t *io = cpm2_map(im_ioport);
115 volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
108 116
109 /* SMC2 is only on port A */ 117 /* SMC2 is only on port A */
110 io->iop_ppara |= 0x00c00000; 118 io->iop_ppara |= 0x00c00000;
@@ -113,13 +121,17 @@ void smc2_lineif(struct uart_cpm_port *pinfo)
113 io->iop_psora &= ~0x00c00000; 121 io->iop_psora &= ~0x00c00000;
114 122
115 /* Wire BRG2 to SMC2 */ 123 /* Wire BRG2 to SMC2 */
116 cpm2_immr->im_cpmux.cmx_smr &= 0xf0; 124 cpmux->cmx_smr &= 0xf0;
117 pinfo->brg = 2; 125 pinfo->brg = 2;
126
127 cpm2_unmap(cpmux);
128 cpm2_unmap(io);
118} 129}
119 130
120void scc1_lineif(struct uart_cpm_port *pinfo) 131void scc1_lineif(struct uart_cpm_port *pinfo)
121{ 132{
122 volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; 133 volatile iop_cpm2_t *io = cpm2_map(im_ioport);
134 volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
123 135
124 /* Use Port D for SCC1 instead of other functions. */ 136 /* Use Port D for SCC1 instead of other functions. */
125 io->iop_ppard |= 0x00000003; 137 io->iop_ppard |= 0x00000003;
@@ -129,9 +141,12 @@ void scc1_lineif(struct uart_cpm_port *pinfo)
129 io->iop_pdird |= 0x00000002; /* Tx */ 141 io->iop_pdird |= 0x00000002; /* Tx */
130 142
131 /* Wire BRG1 to SCC1 */ 143 /* Wire BRG1 to SCC1 */
132 cpm2_immr->im_cpmux.cmx_scr &= 0x00ffffff; 144 cpmux->cmx_scr &= 0x00ffffff;
133 cpm2_immr->im_cpmux.cmx_scr |= 0x00000000; 145 cpmux->cmx_scr |= 0x00000000;
134 pinfo->brg = 1; 146 pinfo->brg = 1;
147
148 cpm2_unmap(cpmux);
149 cpm2_unmap(io);
135} 150}
136 151
137void scc2_lineif(struct uart_cpm_port *pinfo) 152void scc2_lineif(struct uart_cpm_port *pinfo)
@@ -144,43 +159,57 @@ void scc2_lineif(struct uart_cpm_port *pinfo)
144 * be supported in a sane fashion. 159 * be supported in a sane fashion.
145 */ 160 */
146#ifndef CONFIG_STX_GP3 161#ifndef CONFIG_STX_GP3
147 volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; 162 volatile iop_cpm2_t *io = cpm2_map(im_ioport);
163 volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
164
148 io->iop_pparb |= 0x008b0000; 165 io->iop_pparb |= 0x008b0000;
149 io->iop_pdirb |= 0x00880000; 166 io->iop_pdirb |= 0x00880000;
150 io->iop_psorb |= 0x00880000; 167 io->iop_psorb |= 0x00880000;
151 io->iop_pdirb &= ~0x00030000; 168 io->iop_pdirb &= ~0x00030000;
152 io->iop_psorb &= ~0x00030000; 169 io->iop_psorb &= ~0x00030000;
153#endif 170#endif
154 cpm2_immr->im_cpmux.cmx_scr &= 0xff00ffff; 171 cpmux->cmx_scr &= 0xff00ffff;
155 cpm2_immr->im_cpmux.cmx_scr |= 0x00090000; 172 cpmux->cmx_scr |= 0x00090000;
156 pinfo->brg = 2; 173 pinfo->brg = 2;
174
175 cpm2_unmap(cpmux);
176 cpm2_unmap(io);
157} 177}
158 178
159void scc3_lineif(struct uart_cpm_port *pinfo) 179void scc3_lineif(struct uart_cpm_port *pinfo)
160{ 180{
161 volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; 181 volatile iop_cpm2_t *io = cpm2_map(im_ioport);
182 volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
183
162 io->iop_pparb |= 0x008b0000; 184 io->iop_pparb |= 0x008b0000;
163 io->iop_pdirb |= 0x00880000; 185 io->iop_pdirb |= 0x00880000;
164 io->iop_psorb |= 0x00880000; 186 io->iop_psorb |= 0x00880000;
165 io->iop_pdirb &= ~0x00030000; 187 io->iop_pdirb &= ~0x00030000;
166 io->iop_psorb &= ~0x00030000; 188 io->iop_psorb &= ~0x00030000;
167 cpm2_immr->im_cpmux.cmx_scr &= 0xffff00ff; 189 cpmux->cmx_scr &= 0xffff00ff;
168 cpm2_immr->im_cpmux.cmx_scr |= 0x00001200; 190 cpmux->cmx_scr |= 0x00001200;
169 pinfo->brg = 3; 191 pinfo->brg = 3;
192
193 cpm2_unmap(cpmux);
194 cpm2_unmap(io);
170} 195}
171 196
172void scc4_lineif(struct uart_cpm_port *pinfo) 197void scc4_lineif(struct uart_cpm_port *pinfo)
173{ 198{
174 volatile iop_cpm2_t *io = &cpm2_immr->im_ioport; 199 volatile iop_cpm2_t *io = cpm2_map(im_ioport);
200 volatile cpmux_t *cpmux = cpm2_map(im_cpmux);
175 201
176 io->iop_ppard |= 0x00000600; 202 io->iop_ppard |= 0x00000600;
177 io->iop_psord &= ~0x00000600; /* Tx/Rx */ 203 io->iop_psord &= ~0x00000600; /* Tx/Rx */
178 io->iop_pdird &= ~0x00000200; /* Rx */ 204 io->iop_pdird &= ~0x00000200; /* Rx */
179 io->iop_pdird |= 0x00000400; /* Tx */ 205 io->iop_pdird |= 0x00000400; /* Tx */
180 206
181 cpm2_immr->im_cpmux.cmx_scr &= 0xffffff00; 207 cpmux->cmx_scr &= 0xffffff00;
182 cpm2_immr->im_cpmux.cmx_scr |= 0x0000001b; 208 cpmux->cmx_scr |= 0x0000001b;
183 pinfo->brg = 4; 209 pinfo->brg = 4;
210
211 cpm2_unmap(cpmux);
212 cpm2_unmap(io);
184} 213}
185 214
186/* 215/*
@@ -255,16 +284,23 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo)
255/* Setup any dynamic params in the uart desc */ 284/* Setup any dynamic params in the uart desc */
256int cpm_uart_init_portdesc(void) 285int cpm_uart_init_portdesc(void)
257{ 286{
287#if defined(CONFIG_SERIAL_CPM_SMC1) || defined(CONFIG_SERIAL_CPM_SMC2)
288 u32 addr;
289#endif
258 pr_debug("CPM uart[-]:init portdesc\n"); 290 pr_debug("CPM uart[-]:init portdesc\n");
259 291
260 cpm_uart_nr = 0; 292 cpm_uart_nr = 0;
261#ifdef CONFIG_SERIAL_CPM_SMC1 293#ifdef CONFIG_SERIAL_CPM_SMC1
262 cpm_uart_ports[UART_SMC1].smcp = (smc_t *) & cpm2_immr->im_smc[0]; 294 cpm_uart_ports[UART_SMC1].smcp = (smc_t *) cpm2_map(im_smc[0]);
263 cpm_uart_ports[UART_SMC1].smcup =
264 (smc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SMC1];
265 *(u16 *)(&cpm2_immr->im_dprambase[PROFF_SMC1_BASE]) = PROFF_SMC1;
266 cpm_uart_ports[UART_SMC1].port.mapbase = 295 cpm_uart_ports[UART_SMC1].port.mapbase =
267 (unsigned long)&cpm2_immr->im_smc[0]; 296 (unsigned long)cpm_uart_ports[UART_SMC1].smcp;
297
298 cpm_uart_ports[UART_SMC1].smcup =
299 (smc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SMC1], PROFF_SMC_SIZE);
300 addr = (u16 *)cpm2_map_size(im_dprambase[PROFF_SMC1_BASE], 2);
301 *addr = PROFF_SMC1;
302 cpm2_unmap(addr);
303
268 cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); 304 cpm_uart_ports[UART_SMC1].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
269 cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); 305 cpm_uart_ports[UART_SMC1].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
270 cpm_uart_ports[UART_SMC1].port.uartclk = uart_clock(); 306 cpm_uart_ports[UART_SMC1].port.uartclk = uart_clock();
@@ -272,12 +308,16 @@ int cpm_uart_init_portdesc(void)
272#endif 308#endif
273 309
274#ifdef CONFIG_SERIAL_CPM_SMC2 310#ifdef CONFIG_SERIAL_CPM_SMC2
275 cpm_uart_ports[UART_SMC2].smcp = (smc_t *) & cpm2_immr->im_smc[1]; 311 cpm_uart_ports[UART_SMC2].smcp = (smc_t *) cpm2_map(im_smc[1]);
276 cpm_uart_ports[UART_SMC2].smcup =
277 (smc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SMC2];
278 *(u16 *)(&cpm2_immr->im_dprambase[PROFF_SMC2_BASE]) = PROFF_SMC2;
279 cpm_uart_ports[UART_SMC2].port.mapbase = 312 cpm_uart_ports[UART_SMC2].port.mapbase =
280 (unsigned long)&cpm2_immr->im_smc[1]; 313 (unsigned long)cpm_uart_ports[UART_SMC2].smcp;
314
315 cpm_uart_ports[UART_SMC2].smcup =
316 (smc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SMC2], PROFF_SMC_SIZE);
317 addr = (u16 *)cpm2_map_size(im_dprambase[PROFF_SMC2_BASE], 2);
318 *addr = PROFF_SMC2;
319 cpm2_unmap(addr);
320
281 cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX); 321 cpm_uart_ports[UART_SMC2].smcp->smc_smcm |= (SMCM_RX | SMCM_TX);
282 cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN); 322 cpm_uart_ports[UART_SMC2].smcp->smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
283 cpm_uart_ports[UART_SMC2].port.uartclk = uart_clock(); 323 cpm_uart_ports[UART_SMC2].port.uartclk = uart_clock();
@@ -285,11 +325,12 @@ int cpm_uart_init_portdesc(void)
285#endif 325#endif
286 326
287#ifdef CONFIG_SERIAL_CPM_SCC1 327#ifdef CONFIG_SERIAL_CPM_SCC1
288 cpm_uart_ports[UART_SCC1].sccp = (scc_t *) & cpm2_immr->im_scc[0]; 328 cpm_uart_ports[UART_SCC1].sccp = (scc_t *) cpm2_map(im_scc[0]);
289 cpm_uart_ports[UART_SCC1].sccup =
290 (scc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SCC1];
291 cpm_uart_ports[UART_SCC1].port.mapbase = 329 cpm_uart_ports[UART_SCC1].port.mapbase =
292 (unsigned long)&cpm2_immr->im_scc[0]; 330 (unsigned long)cpm_uart_ports[UART_SCC1].sccp;
331 cpm_uart_ports[UART_SCC1].sccup =
332 (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC1], PROFF_SCC_SIZE);
333
293 cpm_uart_ports[UART_SCC1].sccp->scc_sccm &= 334 cpm_uart_ports[UART_SCC1].sccp->scc_sccm &=
294 ~(UART_SCCM_TX | UART_SCCM_RX); 335 ~(UART_SCCM_TX | UART_SCCM_RX);
295 cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &= 336 cpm_uart_ports[UART_SCC1].sccp->scc_gsmrl &=
@@ -299,11 +340,12 @@ int cpm_uart_init_portdesc(void)
299#endif 340#endif
300 341
301#ifdef CONFIG_SERIAL_CPM_SCC2 342#ifdef CONFIG_SERIAL_CPM_SCC2
302 cpm_uart_ports[UART_SCC2].sccp = (scc_t *) & cpm2_immr->im_scc[1]; 343 cpm_uart_ports[UART_SCC2].sccp = (scc_t *) cpm2_map(im_scc[1]);
303 cpm_uart_ports[UART_SCC2].sccup =
304 (scc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SCC2];
305 cpm_uart_ports[UART_SCC2].port.mapbase = 344 cpm_uart_ports[UART_SCC2].port.mapbase =
306 (unsigned long)&cpm2_immr->im_scc[1]; 345 (unsigned long)cpm_uart_ports[UART_SCC2].sccp;
346 cpm_uart_ports[UART_SCC2].sccup =
347 (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC2], PROFF_SCC_SIZE);
348
307 cpm_uart_ports[UART_SCC2].sccp->scc_sccm &= 349 cpm_uart_ports[UART_SCC2].sccp->scc_sccm &=
308 ~(UART_SCCM_TX | UART_SCCM_RX); 350 ~(UART_SCCM_TX | UART_SCCM_RX);
309 cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &= 351 cpm_uart_ports[UART_SCC2].sccp->scc_gsmrl &=
@@ -313,11 +355,12 @@ int cpm_uart_init_portdesc(void)
313#endif 355#endif
314 356
315#ifdef CONFIG_SERIAL_CPM_SCC3 357#ifdef CONFIG_SERIAL_CPM_SCC3
316 cpm_uart_ports[UART_SCC3].sccp = (scc_t *) & cpm2_immr->im_scc[2]; 358 cpm_uart_ports[UART_SCC3].sccp = (scc_t *) cpm2_map(im_scc[2]);
317 cpm_uart_ports[UART_SCC3].sccup =
318 (scc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SCC3];
319 cpm_uart_ports[UART_SCC3].port.mapbase = 359 cpm_uart_ports[UART_SCC3].port.mapbase =
320 (unsigned long)&cpm2_immr->im_scc[2]; 360 (unsigned long)cpm_uart_ports[UART_SCC3].sccp;
361 cpm_uart_ports[UART_SCC3].sccup =
362 (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC3], PROFF_SCC_SIZE);
363
321 cpm_uart_ports[UART_SCC3].sccp->scc_sccm &= 364 cpm_uart_ports[UART_SCC3].sccp->scc_sccm &=
322 ~(UART_SCCM_TX | UART_SCCM_RX); 365 ~(UART_SCCM_TX | UART_SCCM_RX);
323 cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &= 366 cpm_uart_ports[UART_SCC3].sccp->scc_gsmrl &=
@@ -327,11 +370,12 @@ int cpm_uart_init_portdesc(void)
327#endif 370#endif
328 371
329#ifdef CONFIG_SERIAL_CPM_SCC4 372#ifdef CONFIG_SERIAL_CPM_SCC4
330 cpm_uart_ports[UART_SCC4].sccp = (scc_t *) & cpm2_immr->im_scc[3]; 373 cpm_uart_ports[UART_SCC4].sccp = (scc_t *) cpm2_map(im_scc[3]);
331 cpm_uart_ports[UART_SCC4].sccup =
332 (scc_uart_t *) & cpm2_immr->im_dprambase[PROFF_SCC4];
333 cpm_uart_ports[UART_SCC4].port.mapbase = 374 cpm_uart_ports[UART_SCC4].port.mapbase =
334 (unsigned long)&cpm2_immr->im_scc[3]; 375 (unsigned long)cpm_uart_ports[UART_SCC4].sccp;
376 cpm_uart_ports[UART_SCC4].sccup =
377 (scc_uart_t *) cpm2_map_size(im_dprambase[PROFF_SCC4], PROFF_SCC_SIZE);
378
335 cpm_uart_ports[UART_SCC4].sccp->scc_sccm &= 379 cpm_uart_ports[UART_SCC4].sccp->scc_sccm &=
336 ~(UART_SCCM_TX | UART_SCCM_RX); 380 ~(UART_SCCM_TX | UART_SCCM_RX);
337 cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &= 381 cpm_uart_ports[UART_SCC4].sccp->scc_gsmrl &=
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.h b/drivers/serial/cpm_uart/cpm_uart_cpm2.h
index 4793fecf8ece..a663300d3476 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.h
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.h
@@ -40,6 +40,6 @@ static inline void cpm_set_smc_fcr(volatile smc_uart_t * up)
40 up->smc_tfcr = CPMFCR_GBL | CPMFCR_EB; 40 up->smc_tfcr = CPMFCR_GBL | CPMFCR_EB;
41} 41}
42 42
43#define DPRAM_BASE ((unsigned char *)&cpm2_immr->im_dprambase[0]) 43#define DPRAM_BASE ((unsigned char *)cpm_dpram_addr(0))
44 44
45#endif 45#endif