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authorRalf Baechle <ralf@linux-mips.org>2005-10-10 09:51:27 -0400
committerJeff Garzik <jgarzik@pobox.com>2005-10-18 18:03:48 -0400
commitdcbf8477567c312c9f0512545d07e05175d740a4 (patch)
treef3eab7df501b02de7bf09bc6b5c0b62cbabe27af /drivers
parent9cc975e00ddb291035bc4d2d49cdc8768ddf1cc3 (diff)
[PATCH] mipsnet: Virtual ethernet driver for MIPSsim.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org> drivers/net/Kconfig | 8 + drivers/net/Makefile | 1 drivers/net/mipsnet.c | 371 ++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/net/mipsnet.h | 127 +++++++++++++++++ 4 files changed, 507 insertions(+) Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/Kconfig8
-rw-r--r--drivers/net/Makefile1
-rw-r--r--drivers/net/mipsnet.c371
-rw-r--r--drivers/net/mipsnet.h127
4 files changed, 507 insertions, 0 deletions
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 0a30368d2efc..5148d47492a0 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -475,6 +475,14 @@ config SGI_IOC3_ETH_HW_TX_CSUM
475 the moment only acceleration of IPv4 is supported. This option 475 the moment only acceleration of IPv4 is supported. This option
476 enables offloading for checksums on transmit. If unsure, say Y. 476 enables offloading for checksums on transmit. If unsure, say Y.
477 477
478config MIPS_SIM_NET
479 tristate "MIPS simulator Network device (EXPERIMENTAL)"
480 depends on NETDEVICES && MIPS_SIM && EXPERIMENTAL
481 help
482 The MIPSNET device is a simple Ethernet network device which is
483 emulated by the MIPS Simulator.
484 If you are not using a MIPSsim or are unsure, say N.
485
478config SGI_O2MACE_ETH 486config SGI_O2MACE_ETH
479 tristate "SGI O2 MACE Fast Ethernet support" 487 tristate "SGI O2 MACE Fast Ethernet support"
480 depends on NET_ETHERNET && SGI_IP32=y 488 depends on NET_ETHERNET && SGI_IP32=y
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 4c9477cb2127..1a84e0435f64 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -167,6 +167,7 @@ obj-$(CONFIG_EQUALIZER) += eql.o
167obj-$(CONFIG_MIPS_JAZZ_SONIC) += jazzsonic.o 167obj-$(CONFIG_MIPS_JAZZ_SONIC) += jazzsonic.o
168obj-$(CONFIG_MIPS_GT96100ETH) += gt96100eth.o 168obj-$(CONFIG_MIPS_GT96100ETH) += gt96100eth.o
169obj-$(CONFIG_MIPS_AU1X00_ENET) += au1000_eth.o 169obj-$(CONFIG_MIPS_AU1X00_ENET) += au1000_eth.o
170obj-$(CONFIG_MIPS_SIM_NET) += mipsnet.o
170obj-$(CONFIG_SGI_IOC3_ETH) += ioc3-eth.o 171obj-$(CONFIG_SGI_IOC3_ETH) += ioc3-eth.o
171obj-$(CONFIG_DECLANCE) += declance.o 172obj-$(CONFIG_DECLANCE) += declance.o
172obj-$(CONFIG_ATARILANCE) += atarilance.o 173obj-$(CONFIG_ATARILANCE) += atarilance.o
diff --git a/drivers/net/mipsnet.c b/drivers/net/mipsnet.c
new file mode 100644
index 000000000000..f79f7ee72ab8
--- /dev/null
+++ b/drivers/net/mipsnet.c
@@ -0,0 +1,371 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 */
6
7#define DEBUG
8
9#include <linux/init.h>
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/netdevice.h>
13#include <linux/sched.h>
14#include <linux/etherdevice.h>
15#include <linux/netdevice.h>
16#include <asm/io.h>
17#include <asm/mips-boards/simint.h>
18
19#include "mipsnet.h" /* actual device IO mapping */
20
21#define MIPSNET_VERSION "2005-06-20"
22
23#define mipsnet_reg_address(dev, field) (dev->base_addr + field_offset(field))
24
25struct mipsnet_priv {
26 struct net_device_stats stats;
27};
28
29static struct platform_device *mips_plat_dev;
30
31static char mipsnet_string[] = "mipsnet";
32
33/*
34 * Copy data from the MIPSNET rx data port
35 */
36static int ioiocpy_frommipsnet(struct net_device *dev, unsigned char *kdata,
37 int len)
38{
39 uint32_t available_len = inl(mipsnet_reg_address(dev, rxDataCount));
40 if (available_len < len)
41 return -EFAULT;
42
43 for (; len > 0; len--, kdata++) {
44 *kdata = inb(mipsnet_reg_address(dev, rxDataBuffer));
45 }
46
47 return inl(mipsnet_reg_address(dev, rxDataCount));
48}
49
50static inline ssize_t mipsnet_put_todevice(struct net_device *dev,
51 struct sk_buff *skb)
52{
53 int count_to_go = skb->len;
54 char *buf_ptr = skb->data;
55 struct mipsnet_priv *mp = netdev_priv(dev);
56
57 pr_debug("%s: %s(): telling MIPSNET txDataCount(%d)\n",
58 dev->name, __FUNCTION__, skb->len);
59
60 outl(skb->len, mipsnet_reg_address(dev, txDataCount));
61
62 pr_debug("%s: %s(): sending data to MIPSNET txDataBuffer(%d)\n",
63 dev->name, __FUNCTION__, skb->len);
64
65 for (; count_to_go; buf_ptr++, count_to_go--) {
66 outb(*buf_ptr, mipsnet_reg_address(dev, txDataBuffer));
67 }
68
69 mp->stats.tx_packets++;
70 mp->stats.tx_bytes += skb->len;
71
72 return skb->len;
73}
74
75static int mipsnet_xmit(struct sk_buff *skb, struct net_device *dev)
76{
77 pr_debug("%s:%s(): transmitting %d bytes\n",
78 dev->name, __FUNCTION__, skb->len);
79
80 /* Only one packet at a time. Once TXDONE interrupt is serviced, the
81 * queue will be restarted.
82 */
83 netif_stop_queue(dev);
84 mipsnet_put_todevice(dev, skb);
85
86 return 0;
87}
88
89static inline ssize_t mipsnet_get_fromdev(struct net_device *dev, size_t count)
90{
91 struct sk_buff *skb;
92 size_t len = count;
93 struct mipsnet_priv *mp = netdev_priv(dev);
94
95 if (!(skb = alloc_skb(len + 2, GFP_KERNEL))) {
96 mp->stats.rx_dropped++;
97 return -ENOMEM;
98 }
99
100 skb_reserve(skb, 2);
101 if (ioiocpy_frommipsnet(dev, skb_put(skb, len), len))
102 return -EFAULT;
103
104 skb->dev = dev;
105 skb->protocol = eth_type_trans(skb, dev);
106 skb->ip_summed = CHECKSUM_UNNECESSARY;
107
108 pr_debug("%s:%s(): pushing RXed data to kernel\n",
109 dev->name, __FUNCTION__);
110 netif_rx(skb);
111
112 mp->stats.rx_packets++;
113 mp->stats.rx_bytes += len;
114
115 return count;
116}
117
118static irqreturn_t
119mipsnet_interrupt(int irq, void *dev_id, struct pt_regs *regs)
120{
121 struct net_device *dev = dev_id;
122
123 irqreturn_t retval = IRQ_NONE;
124 uint64_t interruptFlags;
125
126 if (irq == dev->irq) {
127 pr_debug("%s:%s(): irq %d for device\n",
128 dev->name, __FUNCTION__, irq);
129
130 retval = IRQ_HANDLED;
131
132 interruptFlags =
133 inl(mipsnet_reg_address(dev, interruptControl));
134 pr_debug("%s:%s(): intCtl=0x%016llx\n", dev->name,
135 __FUNCTION__, interruptFlags);
136
137 if (interruptFlags & MIPSNET_INTCTL_TXDONE) {
138 pr_debug("%s:%s(): got TXDone\n",
139 dev->name, __FUNCTION__);
140 outl(MIPSNET_INTCTL_TXDONE,
141 mipsnet_reg_address(dev, interruptControl));
142 // only one packet at a time, we are done.
143 netif_wake_queue(dev);
144 } else if (interruptFlags & MIPSNET_INTCTL_RXDONE) {
145 pr_debug("%s:%s(): got RX data\n",
146 dev->name, __FUNCTION__);
147 mipsnet_get_fromdev(dev,
148 inl(mipsnet_reg_address(dev, rxDataCount)));
149 pr_debug("%s:%s(): clearing RX int\n",
150 dev->name, __FUNCTION__);
151 outl(MIPSNET_INTCTL_RXDONE,
152 mipsnet_reg_address(dev, interruptControl));
153
154 } else if (interruptFlags & MIPSNET_INTCTL_TESTBIT) {
155 pr_debug("%s:%s(): got test interrupt\n",
156 dev->name, __FUNCTION__);
157 // TESTBIT is cleared on read.
158 // And takes effect after a write with 0
159 outl(0, mipsnet_reg_address(dev, interruptControl));
160 } else {
161 pr_debug("%s:%s(): no valid fags 0x%016llx\n",
162 dev->name, __FUNCTION__, interruptFlags);
163 // Maybe shared IRQ, just ignore, no clearing.
164 retval = IRQ_NONE;
165 }
166
167 } else {
168 printk(KERN_INFO "%s: %s(): irq %d for unknown device\n",
169 dev->name, __FUNCTION__, irq);
170 retval = IRQ_NONE;
171 }
172 return retval;
173} //mipsnet_interrupt()
174
175static int mipsnet_open(struct net_device *dev)
176{
177 int err;
178 pr_debug("%s: mipsnet_open\n", dev->name);
179
180 err = request_irq(dev->irq, &mipsnet_interrupt,
181 SA_SHIRQ, dev->name, (void *) dev);
182
183 if (err) {
184 pr_debug("%s: %s(): can't get irq %d\n",
185 dev->name, __FUNCTION__, dev->irq);
186 release_region(dev->base_addr, MIPSNET_IO_EXTENT);
187 return err;
188 }
189
190 pr_debug("%s: %s(): got IO region at 0x%04lx and irq %d for dev.\n",
191 dev->name, __FUNCTION__, dev->base_addr, dev->irq);
192
193
194 netif_start_queue(dev);
195
196 // test interrupt handler
197 outl(MIPSNET_INTCTL_TESTBIT,
198 mipsnet_reg_address(dev, interruptControl));
199
200
201 return 0;
202}
203
204static int mipsnet_close(struct net_device *dev)
205{
206 pr_debug("%s: %s()\n", dev->name, __FUNCTION__);
207 netif_stop_queue(dev);
208 return 0;
209}
210
211static struct net_device_stats *mipsnet_get_stats(struct net_device *dev)
212{
213 struct mipsnet_priv *mp = netdev_priv(dev);
214
215 return &mp->stats;
216}
217
218static void mipsnet_set_mclist(struct net_device *dev)
219{
220 // we don't do anything
221 return;
222}
223
224static int __init mipsnet_probe(struct device *dev)
225{
226 struct net_device *netdev;
227 int err;
228
229 netdev = alloc_etherdev(sizeof(struct mipsnet_priv));
230 if (!netdev) {
231 err = -ENOMEM;
232 goto out;
233 }
234
235 dev_set_drvdata(dev, netdev);
236
237 netdev->open = mipsnet_open;
238 netdev->stop = mipsnet_close;
239 netdev->hard_start_xmit = mipsnet_xmit;
240 netdev->get_stats = mipsnet_get_stats;
241 netdev->set_multicast_list = mipsnet_set_mclist;
242
243 /*
244 * TODO: probe for these or load them from PARAM
245 */
246 netdev->base_addr = 0x4200;
247 netdev->irq = MIPSCPU_INT_BASE + MIPSCPU_INT_MB0 +
248 inl(mipsnet_reg_address(netdev, interruptInfo));
249
250 // Get the io region now, get irq on open()
251 if (!request_region(netdev->base_addr, MIPSNET_IO_EXTENT, "mipsnet")) {
252 pr_debug("%s: %s(): IO region {start: 0x%04lux, len: %d} "
253 "for dev is not availble.\n", netdev->name,
254 __FUNCTION__, netdev->base_addr, MIPSNET_IO_EXTENT);
255 err = -EBUSY;
256 goto out_free_netdev;
257 }
258
259 /*
260 * Lacking any better mechanism to allocate a MAC address we use a
261 * random one ...
262 */
263 random_ether_addr(netdev->dev_addr);
264
265 err = register_netdev(netdev);
266 if (err) {
267 printk(KERN_ERR "MIPSNet: failed to register netdev.\n");
268 goto out_free_region;
269 }
270
271 return 0;
272
273out_free_region:
274 release_region(netdev->base_addr, MIPSNET_IO_EXTENT);
275
276out_free_netdev:
277 free_netdev(netdev);
278
279out:
280 return err;
281}
282
283static int __devexit mipsnet_device_remove(struct device *device)
284{
285 struct net_device *dev = dev_get_drvdata(device);
286
287 unregister_netdev(dev);
288 release_region(dev->base_addr, MIPSNET_IO_EXTENT);
289 free_netdev(dev);
290 dev_set_drvdata(device, NULL);
291
292 return 0;
293}
294
295static struct device_driver mipsnet_driver = {
296 .name = mipsnet_string,
297 .bus = &platform_bus_type,
298 .probe = mipsnet_probe,
299 .remove = __devexit_p(mipsnet_device_remove),
300};
301
302static void mipsnet_platform_release(struct device *device)
303{
304 struct platform_device *pldev;
305
306 /* free device */
307 pldev = to_platform_device(device);
308 kfree(pldev);
309}
310
311static int __init mipsnet_init_module(void)
312{
313 struct platform_device *pldev;
314 int err;
315
316 printk(KERN_INFO "MIPSNet Ethernet driver. Version: %s. "
317 "(c)2005 MIPS Technologies, Inc.\n", MIPSNET_VERSION);
318
319 if (driver_register(&mipsnet_driver)) {
320 printk(KERN_ERR "Driver registration failed\n");
321 err = -ENODEV;
322 goto out;
323 }
324
325 if (!(pldev = kmalloc (sizeof (*pldev), GFP_KERNEL))) {
326 err = -ENOMEM;
327 goto out_unregister_driver;
328 }
329
330 memset (pldev, 0, sizeof (*pldev));
331 pldev->name = mipsnet_string;
332 pldev->id = 0;
333 pldev->dev.release = mipsnet_platform_release;
334
335 if (platform_device_register(pldev)) {
336 err = -ENODEV;
337 goto out_free_pldev;
338 }
339
340 if (!pldev->dev.driver) {
341 /*
342 * The driver was not bound to this device, there was
343 * no hardware at this address. Unregister it, as the
344 * release fuction will take care of freeing the
345 * allocated structure
346 */
347 platform_device_unregister (pldev);
348 }
349
350 mips_plat_dev = pldev;
351
352 return 0;
353
354out_free_pldev:
355 kfree(pldev);
356
357out_unregister_driver:
358 driver_unregister(&mipsnet_driver);
359out:
360 return err;
361}
362
363static void __exit mipsnet_exit_module(void)
364{
365 pr_debug("MIPSNet Ethernet driver exiting\n");
366
367 driver_unregister(&mipsnet_driver);
368}
369
370module_init(mipsnet_init_module);
371module_exit(mipsnet_exit_module);
diff --git a/drivers/net/mipsnet.h b/drivers/net/mipsnet.h
new file mode 100644
index 000000000000..878535953cb1
--- /dev/null
+++ b/drivers/net/mipsnet.h
@@ -0,0 +1,127 @@
1//
2// <COPYRIGHT CLASS="1B" YEAR="2005">
3// Unpublished work (c) MIPS Technologies, Inc. All rights reserved.
4// Unpublished rights reserved under the copyright laws of the U.S.A. and
5// other countries.
6//
7// PROPRIETARY / SECRET CONFIDENTIAL INFORMATION OF MIPS TECHNOLOGIES, INC.
8// FOR INTERNAL USE ONLY.
9//
10// Under no circumstances (contract or otherwise) may this information be
11// disclosed to, or copied, modified or used by anyone other than employees
12// or contractors of MIPS Technologies having a need to know.
13// </COPYRIGHT>
14//
15//++
16// File: MIPS_Net.h
17//
18// Description:
19// The definition of the emulated MIPSNET device's interface.
20//
21// Notes: This include file needs to work from a Linux device drivers.
22//
23//--
24//
25
26#ifndef __MIPSNET_H
27#define __MIPSNET_H
28
29/*
30 * Id of this Net device, as seen by the core.
31 */
32#define MIPS_NET_DEV_ID ((uint64_t) \
33 ((uint64_t)'M'<< 0)| \
34 ((uint64_t)'I'<< 8)| \
35 ((uint64_t)'P'<<16)| \
36 ((uint64_t)'S'<<24)| \
37 ((uint64_t)'N'<<32)| \
38 ((uint64_t)'E'<<40)| \
39 ((uint64_t)'T'<<48)| \
40 ((uint64_t)'0'<<56))
41
42/*
43 * Net status/control block as seen by sw in the core.
44 * (Why not use bit fields? can't be bothered with cross-platform struct
45 * packing.)
46 */
47typedef struct _net_control_block {
48 /// dev info for probing
49 /// reads as MIPSNET%d where %d is some form of version
50 uint64_t devId; /*0x00 */
51
52 /*
53 * read only busy flag.
54 * Set and cleared by the Net Device to indicate that an rx or a tx
55 * is in progress.
56 */
57 uint32_t busy; /*0x08 */
58
59 /*
60 * Set by the Net Device.
61 * The device will set it once data has been received.
62 * The value is the number of bytes that should be read from
63 * rxDataBuffer. The value will decrease till 0 until all the data
64 * from rxDataBuffer has been read.
65 */
66 uint32_t rxDataCount; /*0x0c */
67#define MIPSNET_MAX_RXTX_DATACOUNT (1<<16)
68
69 /*
70 * Settable from the MIPS core, cleared by the Net Device.
71 * The core should set the number of bytes it wants to send,
72 * then it should write those bytes of data to txDataBuffer.
73 * The device will clear txDataCount has been processed (not necessarily sent).
74 */
75 uint32_t txDataCount; /*0x10 */
76
77 /*
78 * Interrupt control
79 *
80 * Used to clear the interrupted generated by this dev.
81 * Write a 1 to clear the interrupt. (except bit31).
82 *
83 * Bit0 is set if it was a tx-done interrupt.
84 * Bit1 is set when new rx-data is available.
85 * Until this bit is cleared there will be no other RXs.
86 *
87 * Bit31 is used for testing, it clears after a read.
88 * Writing 1 to this bit will cause an interrupt to be generated.
89 * To clear the test interrupt, write 0 to this register.
90 */
91 uint32_t interruptControl; /*0x14 */
92#define MIPSNET_INTCTL_TXDONE ((uint32_t)(1<< 0))
93#define MIPSNET_INTCTL_RXDONE ((uint32_t)(1<< 1))
94#define MIPSNET_INTCTL_TESTBIT ((uint32_t)(1<<31))
95#define MIPSNET_INTCTL_ALLSOURCES (MIPSNET_INTCTL_TXDONE|MIPSNET_INTCTL_RXDONE|MIPSNET_INTCTL_TESTBIT)
96
97 /*
98 * Readonly core-specific interrupt info for the device to signal the core.
99 * The meaning of the contents of this field might change.
100 */
101 /*###\todo: the whole memIntf interrupt scheme is messy: the device should have
102 * no control what so ever of what VPE/register set is being used.
103 * The MemIntf should only expose interrupt lines, and something in the
104 * config should be responsible for the line<->core/vpe bindings.
105 */
106 uint32_t interruptInfo; /*0x18 */
107
108 /*
109 * This is where the received data is read out.
110 * There is more data to read until rxDataReady is 0.
111 * Only 1 byte at this regs offset is used.
112 */
113 uint32_t rxDataBuffer; /*0x1c */
114
115 /*
116 * This is where the data to transmit is written.
117 * Data should be written for the amount specified in the txDataCount register.
118 * Only 1 byte at this regs offset is used.
119 */
120 uint32_t txDataBuffer; /*0x20 */
121} MIPS_T_NetControl;
122
123#define MIPSNET_IO_EXTENT 0x40 /* being generous */
124
125#define field_offset(field) ((int)&((MIPS_T_NetControl*)(0))->field)
126
127#endif /* __MIPSNET_H */