diff options
author | Jeff Garzik <jeff@garzik.org> | 2006-03-21 22:14:17 -0500 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2006-03-21 22:14:17 -0500 |
commit | 55cca65e1995ad604ee87e22c76c17d5cbceb9d0 (patch) | |
tree | 0a691ff7c1b9320e942e78f6f46bf65df5570d9f /drivers | |
parent | c962990a38167aacac91738501815deffa3afbd6 (diff) |
[libata sata_vsc, sata_svw] Convert #define'd constants to enums
Also, bump sata_vsc version.
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/scsi/sata_svw.c | 56 | ||||
-rw-r--r-- | drivers/scsi/sata_vsc.c | 95 |
2 files changed, 78 insertions, 73 deletions
diff --git a/drivers/scsi/sata_svw.c b/drivers/scsi/sata_svw.c index 4aaccd53e736..b023b6958487 100644 --- a/drivers/scsi/sata_svw.c +++ b/drivers/scsi/sata_svw.c | |||
@@ -56,33 +56,35 @@ | |||
56 | #define DRV_NAME "sata_svw" | 56 | #define DRV_NAME "sata_svw" |
57 | #define DRV_VERSION "1.07" | 57 | #define DRV_VERSION "1.07" |
58 | 58 | ||
59 | /* Taskfile registers offsets */ | 59 | enum { |
60 | #define K2_SATA_TF_CMD_OFFSET 0x00 | 60 | /* Taskfile registers offsets */ |
61 | #define K2_SATA_TF_DATA_OFFSET 0x00 | 61 | K2_SATA_TF_CMD_OFFSET = 0x00, |
62 | #define K2_SATA_TF_ERROR_OFFSET 0x04 | 62 | K2_SATA_TF_DATA_OFFSET = 0x00, |
63 | #define K2_SATA_TF_NSECT_OFFSET 0x08 | 63 | K2_SATA_TF_ERROR_OFFSET = 0x04, |
64 | #define K2_SATA_TF_LBAL_OFFSET 0x0c | 64 | K2_SATA_TF_NSECT_OFFSET = 0x08, |
65 | #define K2_SATA_TF_LBAM_OFFSET 0x10 | 65 | K2_SATA_TF_LBAL_OFFSET = 0x0c, |
66 | #define K2_SATA_TF_LBAH_OFFSET 0x14 | 66 | K2_SATA_TF_LBAM_OFFSET = 0x10, |
67 | #define K2_SATA_TF_DEVICE_OFFSET 0x18 | 67 | K2_SATA_TF_LBAH_OFFSET = 0x14, |
68 | #define K2_SATA_TF_CMDSTAT_OFFSET 0x1c | 68 | K2_SATA_TF_DEVICE_OFFSET = 0x18, |
69 | #define K2_SATA_TF_CTL_OFFSET 0x20 | 69 | K2_SATA_TF_CMDSTAT_OFFSET = 0x1c, |
70 | 70 | K2_SATA_TF_CTL_OFFSET = 0x20, | |
71 | /* DMA base */ | 71 | |
72 | #define K2_SATA_DMA_CMD_OFFSET 0x30 | 72 | /* DMA base */ |
73 | 73 | K2_SATA_DMA_CMD_OFFSET = 0x30, | |
74 | /* SCRs base */ | 74 | |
75 | #define K2_SATA_SCR_STATUS_OFFSET 0x40 | 75 | /* SCRs base */ |
76 | #define K2_SATA_SCR_ERROR_OFFSET 0x44 | 76 | K2_SATA_SCR_STATUS_OFFSET = 0x40, |
77 | #define K2_SATA_SCR_CONTROL_OFFSET 0x48 | 77 | K2_SATA_SCR_ERROR_OFFSET = 0x44, |
78 | 78 | K2_SATA_SCR_CONTROL_OFFSET = 0x48, | |
79 | /* Others */ | 79 | |
80 | #define K2_SATA_SICR1_OFFSET 0x80 | 80 | /* Others */ |
81 | #define K2_SATA_SICR2_OFFSET 0x84 | 81 | K2_SATA_SICR1_OFFSET = 0x80, |
82 | #define K2_SATA_SIM_OFFSET 0x88 | 82 | K2_SATA_SICR2_OFFSET = 0x84, |
83 | 83 | K2_SATA_SIM_OFFSET = 0x88, | |
84 | /* Port stride */ | 84 | |
85 | #define K2_SATA_PORT_OFFSET 0x100 | 85 | /* Port stride */ |
86 | K2_SATA_PORT_OFFSET = 0x100, | ||
87 | }; | ||
86 | 88 | ||
87 | static u8 k2_stat_check_status(struct ata_port *ap); | 89 | static u8 k2_stat_check_status(struct ata_port *ap); |
88 | 90 | ||
diff --git a/drivers/scsi/sata_vsc.c b/drivers/scsi/sata_vsc.c index b7b6c807346d..fbf0713f9aba 100644 --- a/drivers/scsi/sata_vsc.c +++ b/drivers/scsi/sata_vsc.c | |||
@@ -47,52 +47,55 @@ | |||
47 | #include <linux/libata.h> | 47 | #include <linux/libata.h> |
48 | 48 | ||
49 | #define DRV_NAME "sata_vsc" | 49 | #define DRV_NAME "sata_vsc" |
50 | #define DRV_VERSION "1.1" | 50 | #define DRV_VERSION "1.2" |
51 | 51 | ||
52 | /* Interrupt register offsets (from chip base address) */ | 52 | enum { |
53 | #define VSC_SATA_INT_STAT_OFFSET 0x00 | 53 | /* Interrupt register offsets (from chip base address) */ |
54 | #define VSC_SATA_INT_MASK_OFFSET 0x04 | 54 | VSC_SATA_INT_STAT_OFFSET = 0x00, |
55 | 55 | VSC_SATA_INT_MASK_OFFSET = 0x04, | |
56 | /* Taskfile registers offsets */ | 56 | |
57 | #define VSC_SATA_TF_CMD_OFFSET 0x00 | 57 | /* Taskfile registers offsets */ |
58 | #define VSC_SATA_TF_DATA_OFFSET 0x00 | 58 | VSC_SATA_TF_CMD_OFFSET = 0x00, |
59 | #define VSC_SATA_TF_ERROR_OFFSET 0x04 | 59 | VSC_SATA_TF_DATA_OFFSET = 0x00, |
60 | #define VSC_SATA_TF_FEATURE_OFFSET 0x06 | 60 | VSC_SATA_TF_ERROR_OFFSET = 0x04, |
61 | #define VSC_SATA_TF_NSECT_OFFSET 0x08 | 61 | VSC_SATA_TF_FEATURE_OFFSET = 0x06, |
62 | #define VSC_SATA_TF_LBAL_OFFSET 0x0c | 62 | VSC_SATA_TF_NSECT_OFFSET = 0x08, |
63 | #define VSC_SATA_TF_LBAM_OFFSET 0x10 | 63 | VSC_SATA_TF_LBAL_OFFSET = 0x0c, |
64 | #define VSC_SATA_TF_LBAH_OFFSET 0x14 | 64 | VSC_SATA_TF_LBAM_OFFSET = 0x10, |
65 | #define VSC_SATA_TF_DEVICE_OFFSET 0x18 | 65 | VSC_SATA_TF_LBAH_OFFSET = 0x14, |
66 | #define VSC_SATA_TF_STATUS_OFFSET 0x1c | 66 | VSC_SATA_TF_DEVICE_OFFSET = 0x18, |
67 | #define VSC_SATA_TF_COMMAND_OFFSET 0x1d | 67 | VSC_SATA_TF_STATUS_OFFSET = 0x1c, |
68 | #define VSC_SATA_TF_ALTSTATUS_OFFSET 0x28 | 68 | VSC_SATA_TF_COMMAND_OFFSET = 0x1d, |
69 | #define VSC_SATA_TF_CTL_OFFSET 0x29 | 69 | VSC_SATA_TF_ALTSTATUS_OFFSET = 0x28, |
70 | 70 | VSC_SATA_TF_CTL_OFFSET = 0x29, | |
71 | /* DMA base */ | 71 | |
72 | #define VSC_SATA_UP_DESCRIPTOR_OFFSET 0x64 | 72 | /* DMA base */ |
73 | #define VSC_SATA_UP_DATA_BUFFER_OFFSET 0x6C | 73 | VSC_SATA_UP_DESCRIPTOR_OFFSET = 0x64, |
74 | #define VSC_SATA_DMA_CMD_OFFSET 0x70 | 74 | VSC_SATA_UP_DATA_BUFFER_OFFSET = 0x6C, |
75 | 75 | VSC_SATA_DMA_CMD_OFFSET = 0x70, | |
76 | /* SCRs base */ | 76 | |
77 | #define VSC_SATA_SCR_STATUS_OFFSET 0x100 | 77 | /* SCRs base */ |
78 | #define VSC_SATA_SCR_ERROR_OFFSET 0x104 | 78 | VSC_SATA_SCR_STATUS_OFFSET = 0x100, |
79 | #define VSC_SATA_SCR_CONTROL_OFFSET 0x108 | 79 | VSC_SATA_SCR_ERROR_OFFSET = 0x104, |
80 | 80 | VSC_SATA_SCR_CONTROL_OFFSET = 0x108, | |
81 | /* Port stride */ | 81 | |
82 | #define VSC_SATA_PORT_OFFSET 0x200 | 82 | /* Port stride */ |
83 | 83 | VSC_SATA_PORT_OFFSET = 0x200, | |
84 | /* Error interrupt status bit offsets */ | 84 | |
85 | #define VSC_SATA_INT_ERROR_CRC 0x40 | 85 | /* Error interrupt status bit offsets */ |
86 | #define VSC_SATA_INT_ERROR_T 0x20 | 86 | VSC_SATA_INT_ERROR_CRC = 0x40, |
87 | #define VSC_SATA_INT_ERROR_P 0x10 | 87 | VSC_SATA_INT_ERROR_T = 0x20, |
88 | #define VSC_SATA_INT_ERROR_R 0x8 | 88 | VSC_SATA_INT_ERROR_P = 0x10, |
89 | #define VSC_SATA_INT_ERROR_E 0x4 | 89 | VSC_SATA_INT_ERROR_R = 0x8, |
90 | #define VSC_SATA_INT_ERROR_M 0x2 | 90 | VSC_SATA_INT_ERROR_E = 0x4, |
91 | #define VSC_SATA_INT_PHY_CHANGE 0x1 | 91 | VSC_SATA_INT_ERROR_M = 0x2, |
92 | #define VSC_SATA_INT_ERROR (VSC_SATA_INT_ERROR_CRC | VSC_SATA_INT_ERROR_T | \ | 92 | VSC_SATA_INT_PHY_CHANGE = 0x1, |
93 | VSC_SATA_INT_ERROR_P | VSC_SATA_INT_ERROR_R | \ | 93 | VSC_SATA_INT_ERROR = (VSC_SATA_INT_ERROR_CRC | VSC_SATA_INT_ERROR_T | \ |
94 | VSC_SATA_INT_ERROR_E | VSC_SATA_INT_ERROR_M | \ | 94 | VSC_SATA_INT_ERROR_P | VSC_SATA_INT_ERROR_R | \ |
95 | VSC_SATA_INT_PHY_CHANGE) | 95 | VSC_SATA_INT_ERROR_E | VSC_SATA_INT_ERROR_M | \ |
96 | VSC_SATA_INT_PHY_CHANGE), | ||
97 | }; | ||
98 | |||
96 | 99 | ||
97 | #define is_vsc_sata_int_err(port_idx, int_status) \ | 100 | #define is_vsc_sata_int_err(port_idx, int_status) \ |
98 | (int_status & (VSC_SATA_INT_ERROR << (8 * port_idx))) | 101 | (int_status & (VSC_SATA_INT_ERROR << (8 * port_idx))) |