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authorChuanxiao Dong <chuanxiao.dong@intel.com>2010-07-27 02:17:37 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-08-05 13:13:10 -0400
commiteda936ef17b921e56239ab4db2027d76abf8bebc (patch)
treeae2470a8e559a0ba5afa195fa5d88e6158859187 /drivers
parenta99d17966cfa65cd1767cbddb209166c18fedc74 (diff)
mtd: denali: rename functions which is named by using capitals
rename these functions' name and remove additional declarations in header file Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mtd/nand/denali.c22
-rw-r--r--drivers/mtd/nand/denali.h5
2 files changed, 11 insertions, 16 deletions
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 52278d839d08..0c76a16774c9 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -221,7 +221,7 @@ static void reset_bank(struct denali_nand_info *denali)
221} 221}
222 222
223/* Reset the flash controller */ 223/* Reset the flash controller */
224static uint16_t NAND_Flash_Reset(struct denali_nand_info *denali) 224static uint16_t denali_nand_reset(struct denali_nand_info *denali)
225{ 225{
226 uint32_t i; 226 uint32_t i;
227 227
@@ -256,7 +256,7 @@ static uint16_t NAND_Flash_Reset(struct denali_nand_info *denali)
256 * programs the clocking register accordingly. The mode is determined by 256 * programs the clocking register accordingly. The mode is determined by
257 * the get_onfi_nand_para routine. 257 * the get_onfi_nand_para routine.
258 */ 258 */
259static void NAND_ONFi_Timing_Mode(struct denali_nand_info *denali, 259static void nand_onfi_timing_set(struct denali_nand_info *denali,
260 uint16_t mode) 260 uint16_t mode)
261{ 261{
262 uint16_t Trea[6] = {40, 30, 25, 20, 20, 16}; 262 uint16_t Trea[6] = {40, 30, 25, 20, 20, 16};
@@ -487,7 +487,7 @@ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali)
487 break; 487 break;
488 } 488 }
489 489
490 NAND_ONFi_Timing_Mode(denali, i); 490 nand_onfi_timing_set(denali, i);
491 491
492 index_addr(denali, MODE_11 | 0, 0x90); 492 index_addr(denali, MODE_11 | 0, 0x90);
493 index_addr(denali, MODE_11 | 1, 0); 493 index_addr(denali, MODE_11 | 1, 0);
@@ -803,7 +803,7 @@ static void dump_device_info(struct denali_nand_info *denali)
803 denali->dev_info.nBitsInBlockDataSize); 803 denali->dev_info.nBitsInBlockDataSize);
804} 804}
805 805
806static uint16_t NAND_Read_Device_ID(struct denali_nand_info *denali) 806static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
807{ 807{
808 uint16_t status = PASS; 808 uint16_t status = PASS;
809 uint8_t no_of_planes; 809 uint8_t no_of_planes;
@@ -928,12 +928,12 @@ static uint16_t NAND_Read_Device_ID(struct denali_nand_info *denali)
928 * with a specific ONFI mode, we apply those changes here. 928 * with a specific ONFI mode, we apply those changes here.
929 */ 929 */
930 if (onfi_timing_mode != NAND_DEFAULT_TIMINGS) 930 if (onfi_timing_mode != NAND_DEFAULT_TIMINGS)
931 NAND_ONFi_Timing_Mode(denali, onfi_timing_mode); 931 nand_onfi_timing_set(denali, onfi_timing_mode);
932 932
933 return status; 933 return status;
934} 934}
935 935
936static void NAND_LLD_Enable_Disable_Interrupts(struct denali_nand_info *denali, 936static void denali_set_intr_modes(struct denali_nand_info *denali,
937 uint16_t INT_ENABLE) 937 uint16_t INT_ENABLE)
938{ 938{
939 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n", 939 nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n",
@@ -958,7 +958,7 @@ static void denali_irq_init(struct denali_nand_info *denali)
958 uint32_t int_mask = 0; 958 uint32_t int_mask = 0;
959 959
960 /* Disable global interrupts */ 960 /* Disable global interrupts */
961 NAND_LLD_Enable_Disable_Interrupts(denali, false); 961 denali_set_intr_modes(denali, false);
962 962
963 int_mask = DENALI_IRQ_ALL; 963 int_mask = DENALI_IRQ_ALL;
964 964
@@ -973,7 +973,7 @@ static void denali_irq_init(struct denali_nand_info *denali)
973 973
974static void denali_irq_cleanup(int irqnum, struct denali_nand_info *denali) 974static void denali_irq_cleanup(int irqnum, struct denali_nand_info *denali)
975{ 975{
976 NAND_LLD_Enable_Disable_Interrupts(denali, false); 976 denali_set_intr_modes(denali, false);
977 free_irq(irqnum, denali); 977 free_irq(irqnum, denali);
978} 978}
979 979
@@ -1797,7 +1797,7 @@ static void denali_ecc_hwctl(struct mtd_info *mtd, int mode)
1797static void denali_hw_init(struct denali_nand_info *denali) 1797static void denali_hw_init(struct denali_nand_info *denali)
1798{ 1798{
1799 denali_irq_init(denali); 1799 denali_irq_init(denali);
1800 NAND_Flash_Reset(denali); 1800 denali_nand_reset(denali);
1801 denali_write32(0x0F, denali->flash_reg + RB_PIN_ENABLED); 1801 denali_write32(0x0F, denali->flash_reg + RB_PIN_ENABLED);
1802 denali_write32(CHIP_EN_DONT_CARE__FLAG, 1802 denali_write32(CHIP_EN_DONT_CARE__FLAG,
1803 denali->flash_reg + CHIP_ENABLE_DONT_CARE); 1803 denali->flash_reg + CHIP_ENABLE_DONT_CARE);
@@ -1993,11 +1993,11 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
1993 } 1993 }
1994 1994
1995 /* now that our ISR is registered, we can enable interrupts */ 1995 /* now that our ISR is registered, we can enable interrupts */
1996 NAND_LLD_Enable_Disable_Interrupts(denali, true); 1996 denali_set_intr_modes(denali, true);
1997 1997
1998 pci_set_drvdata(dev, denali); 1998 pci_set_drvdata(dev, denali);
1999 1999
2000 NAND_Read_Device_ID(denali); 2000 denali_nand_timing_set(denali);
2001 2001
2002 /* MTD supported page sizes vary by kernel. We validate our 2002 /* MTD supported page sizes vary by kernel. We validate our
2003 * kernel supports the device here. 2003 * kernel supports the device here.
diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h
index b56fa3c7c166..626c915294da 100644
--- a/drivers/mtd/nand/denali.h
+++ b/drivers/mtd/nand/denali.h
@@ -804,9 +804,4 @@ struct denali_nand_info {
804 int idx; 804 int idx;
805}; 805};
806 806
807static uint16_t NAND_Flash_Reset(struct denali_nand_info *denali);
808static uint16_t NAND_Read_Device_ID(struct denali_nand_info *denali);
809static void NAND_LLD_Enable_Disable_Interrupts(struct denali_nand_info *denali,
810 uint16_t INT_ENABLE);
811
812#endif /*_LLD_NAND_*/ 807#endif /*_LLD_NAND_*/