diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-12-04 12:34:16 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-12-04 12:34:16 -0500 |
commit | 4567c4a89693416ccca02d32109bce967e9c1ade (patch) | |
tree | 9d77cf02ce269ed5fc4b6e2ebddb9ad7fd504ad1 /drivers | |
parent | 602fd7c36728a04e61a442c9755e7d454501266c (diff) | |
parent | 19d6c13b56a78b3757e747f469285c2a546d634a (diff) |
Merge branch 'devel' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into devel-stable
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/mmc/host/pxamci.c | 10 | ||||
-rw-r--r-- | drivers/mtd/nand/Kconfig | 2 | ||||
-rw-r--r-- | drivers/mtd/nand/pxa3xx_nand.c | 82 | ||||
-rw-r--r-- | drivers/video/backlight/da903x_bl.c | 7 | ||||
-rw-r--r-- | drivers/video/backlight/tdo24m.c | 1 | ||||
-rw-r--r-- | drivers/video/pxa168fb.c | 1 | ||||
-rw-r--r-- | drivers/video/pxafb.c | 23 |
7 files changed, 102 insertions, 24 deletions
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c index b00d67319058..c85f6166056e 100644 --- a/drivers/mmc/host/pxamci.c +++ b/drivers/mmc/host/pxamci.c | |||
@@ -43,6 +43,9 @@ | |||
43 | #define NR_SG 1 | 43 | #define NR_SG 1 |
44 | #define CLKRT_OFF (~0) | 44 | #define CLKRT_OFF (~0) |
45 | 45 | ||
46 | #define mmc_has_26MHz() (cpu_is_pxa300() || cpu_is_pxa310() \ | ||
47 | || cpu_is_pxa935()) | ||
48 | |||
46 | struct pxamci_host { | 49 | struct pxamci_host { |
47 | struct mmc_host *mmc; | 50 | struct mmc_host *mmc; |
48 | spinlock_t lock; | 51 | spinlock_t lock; |
@@ -457,7 +460,7 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
457 | clk_enable(host->clk); | 460 | clk_enable(host->clk); |
458 | 461 | ||
459 | if (ios->clock == 26000000) { | 462 | if (ios->clock == 26000000) { |
460 | /* to support 26MHz on pxa300/pxa310 */ | 463 | /* to support 26MHz */ |
461 | host->clkrt = 7; | 464 | host->clkrt = 7; |
462 | } else { | 465 | } else { |
463 | /* to handle (19.5MHz, 26MHz) */ | 466 | /* to handle (19.5MHz, 26MHz) */ |
@@ -608,8 +611,7 @@ static int pxamci_probe(struct platform_device *pdev) | |||
608 | * Calculate minimum clock rate, rounding up. | 611 | * Calculate minimum clock rate, rounding up. |
609 | */ | 612 | */ |
610 | mmc->f_min = (host->clkrate + 63) / 64; | 613 | mmc->f_min = (host->clkrate + 63) / 64; |
611 | mmc->f_max = (cpu_is_pxa300() || cpu_is_pxa310()) ? 26000000 | 614 | mmc->f_max = (mmc_has_26MHz()) ? 26000000 : host->clkrate; |
612 | : host->clkrate; | ||
613 | 615 | ||
614 | pxamci_init_ocr(host); | 616 | pxamci_init_ocr(host); |
615 | 617 | ||
@@ -618,7 +620,7 @@ static int pxamci_probe(struct platform_device *pdev) | |||
618 | if (!cpu_is_pxa25x()) { | 620 | if (!cpu_is_pxa25x()) { |
619 | mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ; | 621 | mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ; |
620 | host->cmdat |= CMDAT_SDIO_INT_EN; | 622 | host->cmdat |= CMDAT_SDIO_INT_EN; |
621 | if (cpu_is_pxa300() || cpu_is_pxa310()) | 623 | if (mmc_has_26MHz()) |
622 | mmc->caps |= MMC_CAP_MMC_HIGHSPEED | | 624 | mmc->caps |= MMC_CAP_MMC_HIGHSPEED | |
623 | MMC_CAP_SD_HIGHSPEED; | 625 | MMC_CAP_SD_HIGHSPEED; |
624 | } | 626 | } |
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 2fda0b615246..8f8e87b7ed64 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig | |||
@@ -358,7 +358,7 @@ endchoice | |||
358 | 358 | ||
359 | config MTD_NAND_PXA3xx | 359 | config MTD_NAND_PXA3xx |
360 | tristate "Support for NAND flash devices on PXA3xx" | 360 | tristate "Support for NAND flash devices on PXA3xx" |
361 | depends on MTD_NAND && PXA3xx | 361 | depends on MTD_NAND && (PXA3xx || ARCH_MMP) |
362 | help | 362 | help |
363 | This enables the driver for the NAND flash device found on | 363 | This enables the driver for the NAND flash device found on |
364 | PXA3xx processors | 364 | PXA3xx processors |
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index 6ea520ae2410..1a5a0365c983 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c | |||
@@ -9,6 +9,7 @@ | |||
9 | * published by the Free Software Foundation. | 9 | * published by the Free Software Foundation. |
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/kernel.h> | ||
12 | #include <linux/module.h> | 13 | #include <linux/module.h> |
13 | #include <linux/interrupt.h> | 14 | #include <linux/interrupt.h> |
14 | #include <linux/platform_device.h> | 15 | #include <linux/platform_device.h> |
@@ -22,7 +23,7 @@ | |||
22 | #include <linux/irq.h> | 23 | #include <linux/irq.h> |
23 | 24 | ||
24 | #include <mach/dma.h> | 25 | #include <mach/dma.h> |
25 | #include <mach/pxa3xx_nand.h> | 26 | #include <plat/pxa3xx_nand.h> |
26 | 27 | ||
27 | #define CHIP_DELAY_TIMEOUT (2 * HZ/10) | 28 | #define CHIP_DELAY_TIMEOUT (2 * HZ/10) |
28 | 29 | ||
@@ -84,10 +85,6 @@ | |||
84 | #define NDCB0_CMD1_MASK (0xff) | 85 | #define NDCB0_CMD1_MASK (0xff) |
85 | #define NDCB0_ADDR_CYC_SHIFT (16) | 86 | #define NDCB0_ADDR_CYC_SHIFT (16) |
86 | 87 | ||
87 | /* dma-able I/O address for the NAND data and commands */ | ||
88 | #define NDCB0_DMA_ADDR (0x43100048) | ||
89 | #define NDDB_DMA_ADDR (0x43100040) | ||
90 | |||
91 | /* macros for registers read/write */ | 88 | /* macros for registers read/write */ |
92 | #define nand_writel(info, off, val) \ | 89 | #define nand_writel(info, off, val) \ |
93 | __raw_writel((val), (info)->mmio_base + (off)) | 90 | __raw_writel((val), (info)->mmio_base + (off)) |
@@ -123,6 +120,7 @@ struct pxa3xx_nand_info { | |||
123 | 120 | ||
124 | struct clk *clk; | 121 | struct clk *clk; |
125 | void __iomem *mmio_base; | 122 | void __iomem *mmio_base; |
123 | unsigned long mmio_phys; | ||
126 | 124 | ||
127 | unsigned int buf_start; | 125 | unsigned int buf_start; |
128 | unsigned int buf_count; | 126 | unsigned int buf_count; |
@@ -228,13 +226,35 @@ static struct pxa3xx_nand_flash samsung512MbX16 = { | |||
228 | .chip_id = 0x46ec, | 226 | .chip_id = 0x46ec, |
229 | }; | 227 | }; |
230 | 228 | ||
229 | static struct pxa3xx_nand_flash samsung2GbX8 = { | ||
230 | .timing = &samsung512MbX16_timing, | ||
231 | .cmdset = &smallpage_cmdset, | ||
232 | .page_per_block = 64, | ||
233 | .page_size = 2048, | ||
234 | .flash_width = 8, | ||
235 | .dfc_width = 8, | ||
236 | .num_blocks = 2048, | ||
237 | .chip_id = 0xdaec, | ||
238 | }; | ||
239 | |||
240 | static struct pxa3xx_nand_flash samsung32GbX8 = { | ||
241 | .timing = &samsung512MbX16_timing, | ||
242 | .cmdset = &smallpage_cmdset, | ||
243 | .page_per_block = 128, | ||
244 | .page_size = 4096, | ||
245 | .flash_width = 8, | ||
246 | .dfc_width = 8, | ||
247 | .num_blocks = 8192, | ||
248 | .chip_id = 0xd7ec, | ||
249 | }; | ||
250 | |||
231 | static struct pxa3xx_nand_timing micron_timing = { | 251 | static struct pxa3xx_nand_timing micron_timing = { |
232 | .tCH = 10, | 252 | .tCH = 10, |
233 | .tCS = 25, | 253 | .tCS = 25, |
234 | .tWH = 15, | 254 | .tWH = 15, |
235 | .tWP = 25, | 255 | .tWP = 25, |
236 | .tRH = 15, | 256 | .tRH = 15, |
237 | .tRP = 25, | 257 | .tRP = 30, |
238 | .tR = 25000, | 258 | .tR = 25000, |
239 | .tWHR = 60, | 259 | .tWHR = 60, |
240 | .tAR = 10, | 260 | .tAR = 10, |
@@ -262,6 +282,28 @@ static struct pxa3xx_nand_flash micron1GbX16 = { | |||
262 | .chip_id = 0xb12c, | 282 | .chip_id = 0xb12c, |
263 | }; | 283 | }; |
264 | 284 | ||
285 | static struct pxa3xx_nand_flash micron4GbX8 = { | ||
286 | .timing = µn_timing, | ||
287 | .cmdset = &largepage_cmdset, | ||
288 | .page_per_block = 64, | ||
289 | .page_size = 2048, | ||
290 | .flash_width = 8, | ||
291 | .dfc_width = 8, | ||
292 | .num_blocks = 4096, | ||
293 | .chip_id = 0xdc2c, | ||
294 | }; | ||
295 | |||
296 | static struct pxa3xx_nand_flash micron4GbX16 = { | ||
297 | .timing = µn_timing, | ||
298 | .cmdset = &largepage_cmdset, | ||
299 | .page_per_block = 64, | ||
300 | .page_size = 2048, | ||
301 | .flash_width = 16, | ||
302 | .dfc_width = 16, | ||
303 | .num_blocks = 4096, | ||
304 | .chip_id = 0xcc2c, | ||
305 | }; | ||
306 | |||
265 | static struct pxa3xx_nand_timing stm2GbX16_timing = { | 307 | static struct pxa3xx_nand_timing stm2GbX16_timing = { |
266 | .tCH = 10, | 308 | .tCH = 10, |
267 | .tCS = 35, | 309 | .tCS = 35, |
@@ -287,8 +329,12 @@ static struct pxa3xx_nand_flash stm2GbX16 = { | |||
287 | 329 | ||
288 | static struct pxa3xx_nand_flash *builtin_flash_types[] = { | 330 | static struct pxa3xx_nand_flash *builtin_flash_types[] = { |
289 | &samsung512MbX16, | 331 | &samsung512MbX16, |
332 | &samsung2GbX8, | ||
333 | &samsung32GbX8, | ||
290 | µn1GbX8, | 334 | µn1GbX8, |
291 | µn1GbX16, | 335 | µn1GbX16, |
336 | µn4GbX8, | ||
337 | µn4GbX16, | ||
292 | &stm2GbX16, | 338 | &stm2GbX16, |
293 | }; | 339 | }; |
294 | #endif /* CONFIG_MTD_NAND_PXA3xx_BUILTIN */ | 340 | #endif /* CONFIG_MTD_NAND_PXA3xx_BUILTIN */ |
@@ -489,7 +535,7 @@ static int handle_data_pio(struct pxa3xx_nand_info *info) | |||
489 | switch (info->state) { | 535 | switch (info->state) { |
490 | case STATE_PIO_WRITING: | 536 | case STATE_PIO_WRITING: |
491 | __raw_writesl(info->mmio_base + NDDB, info->data_buff, | 537 | __raw_writesl(info->mmio_base + NDDB, info->data_buff, |
492 | info->data_size << 2); | 538 | DIV_ROUND_UP(info->data_size, 4)); |
493 | 539 | ||
494 | enable_int(info, NDSR_CS0_BBD | NDSR_CS0_CMDD); | 540 | enable_int(info, NDSR_CS0_BBD | NDSR_CS0_CMDD); |
495 | 541 | ||
@@ -501,7 +547,7 @@ static int handle_data_pio(struct pxa3xx_nand_info *info) | |||
501 | break; | 547 | break; |
502 | case STATE_PIO_READING: | 548 | case STATE_PIO_READING: |
503 | __raw_readsl(info->mmio_base + NDDB, info->data_buff, | 549 | __raw_readsl(info->mmio_base + NDDB, info->data_buff, |
504 | info->data_size << 2); | 550 | DIV_ROUND_UP(info->data_size, 4)); |
505 | break; | 551 | break; |
506 | default: | 552 | default: |
507 | printk(KERN_ERR "%s: invalid state %d\n", __func__, | 553 | printk(KERN_ERR "%s: invalid state %d\n", __func__, |
@@ -523,11 +569,11 @@ static void start_data_dma(struct pxa3xx_nand_info *info, int dir_out) | |||
523 | 569 | ||
524 | if (dir_out) { | 570 | if (dir_out) { |
525 | desc->dsadr = info->data_buff_phys; | 571 | desc->dsadr = info->data_buff_phys; |
526 | desc->dtadr = NDDB_DMA_ADDR; | 572 | desc->dtadr = info->mmio_phys + NDDB; |
527 | desc->dcmd |= DCMD_INCSRCADDR | DCMD_FLOWTRG; | 573 | desc->dcmd |= DCMD_INCSRCADDR | DCMD_FLOWTRG; |
528 | } else { | 574 | } else { |
529 | desc->dtadr = info->data_buff_phys; | 575 | desc->dtadr = info->data_buff_phys; |
530 | desc->dsadr = NDDB_DMA_ADDR; | 576 | desc->dsadr = info->mmio_phys + NDDB; |
531 | desc->dcmd |= DCMD_INCTRGADDR | DCMD_FLOWSRC; | 577 | desc->dcmd |= DCMD_INCTRGADDR | DCMD_FLOWSRC; |
532 | } | 578 | } |
533 | 579 | ||
@@ -669,6 +715,7 @@ static void pxa3xx_nand_cmdfunc(struct mtd_info *mtd, unsigned command, | |||
669 | /* disable HW ECC to get all the OOB data */ | 715 | /* disable HW ECC to get all the OOB data */ |
670 | info->buf_count = mtd->writesize + mtd->oobsize; | 716 | info->buf_count = mtd->writesize + mtd->oobsize; |
671 | info->buf_start = mtd->writesize + column; | 717 | info->buf_start = mtd->writesize + column; |
718 | memset(info->data_buff, 0xFF, info->buf_count); | ||
672 | 719 | ||
673 | if (prepare_read_prog_cmd(info, cmdset->read1, column, page_addr)) | 720 | if (prepare_read_prog_cmd(info, cmdset->read1, column, page_addr)) |
674 | break; | 721 | break; |
@@ -1239,13 +1286,17 @@ static int pxa3xx_nand_probe(struct platform_device *pdev) | |||
1239 | ret = -ENODEV; | 1286 | ret = -ENODEV; |
1240 | goto fail_free_res; | 1287 | goto fail_free_res; |
1241 | } | 1288 | } |
1289 | info->mmio_phys = r->start; | ||
1242 | 1290 | ||
1243 | ret = pxa3xx_nand_init_buff(info); | 1291 | ret = pxa3xx_nand_init_buff(info); |
1244 | if (ret) | 1292 | if (ret) |
1245 | goto fail_free_io; | 1293 | goto fail_free_io; |
1246 | 1294 | ||
1247 | ret = request_irq(IRQ_NAND, pxa3xx_nand_irq, IRQF_DISABLED, | 1295 | /* initialize all interrupts to be disabled */ |
1248 | pdev->name, info); | 1296 | disable_int(info, NDSR_MASK); |
1297 | |||
1298 | ret = request_irq(irq, pxa3xx_nand_irq, IRQF_DISABLED, | ||
1299 | pdev->name, info); | ||
1249 | if (ret < 0) { | 1300 | if (ret < 0) { |
1250 | dev_err(&pdev->dev, "failed to request IRQ\n"); | 1301 | dev_err(&pdev->dev, "failed to request IRQ\n"); |
1251 | goto fail_free_buf; | 1302 | goto fail_free_buf; |
@@ -1271,7 +1322,7 @@ static int pxa3xx_nand_probe(struct platform_device *pdev) | |||
1271 | return add_mtd_partitions(mtd, pdata->parts, pdata->nr_parts); | 1322 | return add_mtd_partitions(mtd, pdata->parts, pdata->nr_parts); |
1272 | 1323 | ||
1273 | fail_free_irq: | 1324 | fail_free_irq: |
1274 | free_irq(IRQ_NAND, info); | 1325 | free_irq(irq, info); |
1275 | fail_free_buf: | 1326 | fail_free_buf: |
1276 | if (use_dma) { | 1327 | if (use_dma) { |
1277 | pxa_free_dma(info->data_dma_ch); | 1328 | pxa_free_dma(info->data_dma_ch); |
@@ -1296,12 +1347,15 @@ static int pxa3xx_nand_remove(struct platform_device *pdev) | |||
1296 | struct mtd_info *mtd = platform_get_drvdata(pdev); | 1347 | struct mtd_info *mtd = platform_get_drvdata(pdev); |
1297 | struct pxa3xx_nand_info *info = mtd->priv; | 1348 | struct pxa3xx_nand_info *info = mtd->priv; |
1298 | struct resource *r; | 1349 | struct resource *r; |
1350 | int irq; | ||
1299 | 1351 | ||
1300 | platform_set_drvdata(pdev, NULL); | 1352 | platform_set_drvdata(pdev, NULL); |
1301 | 1353 | ||
1302 | del_mtd_device(mtd); | 1354 | del_mtd_device(mtd); |
1303 | del_mtd_partitions(mtd); | 1355 | del_mtd_partitions(mtd); |
1304 | free_irq(IRQ_NAND, info); | 1356 | irq = platform_get_irq(pdev, 0); |
1357 | if (irq >= 0) | ||
1358 | free_irq(irq, info); | ||
1305 | if (use_dma) { | 1359 | if (use_dma) { |
1306 | pxa_free_dma(info->data_dma_ch); | 1360 | pxa_free_dma(info->data_dma_ch); |
1307 | dma_free_writecombine(&pdev->dev, info->data_buff_size, | 1361 | dma_free_writecombine(&pdev->dev, info->data_buff_size, |
diff --git a/drivers/video/backlight/da903x_bl.c b/drivers/video/backlight/da903x_bl.c index 701a1081e199..7fcb0eb54c60 100644 --- a/drivers/video/backlight/da903x_bl.c +++ b/drivers/video/backlight/da903x_bl.c | |||
@@ -25,6 +25,7 @@ | |||
25 | 25 | ||
26 | #define DA9034_WLED_CONTROL1 0x3C | 26 | #define DA9034_WLED_CONTROL1 0x3C |
27 | #define DA9034_WLED_CONTROL2 0x3D | 27 | #define DA9034_WLED_CONTROL2 0x3D |
28 | #define DA9034_WLED_ISET(x) ((x) & 0x1f) | ||
28 | 29 | ||
29 | #define DA9034_WLED_BOOST_EN (1 << 5) | 30 | #define DA9034_WLED_BOOST_EN (1 << 5) |
30 | 31 | ||
@@ -101,6 +102,7 @@ static struct backlight_ops da903x_backlight_ops = { | |||
101 | 102 | ||
102 | static int da903x_backlight_probe(struct platform_device *pdev) | 103 | static int da903x_backlight_probe(struct platform_device *pdev) |
103 | { | 104 | { |
105 | struct da9034_backlight_pdata *pdata = pdev->dev.platform_data; | ||
104 | struct da903x_backlight_data *data; | 106 | struct da903x_backlight_data *data; |
105 | struct backlight_device *bl; | 107 | struct backlight_device *bl; |
106 | int max_brightness; | 108 | int max_brightness; |
@@ -127,6 +129,11 @@ static int da903x_backlight_probe(struct platform_device *pdev) | |||
127 | data->da903x_dev = pdev->dev.parent; | 129 | data->da903x_dev = pdev->dev.parent; |
128 | data->current_brightness = 0; | 130 | data->current_brightness = 0; |
129 | 131 | ||
132 | /* adjust the WLED output current */ | ||
133 | if (pdata) | ||
134 | da903x_write(data->da903x_dev, DA9034_WLED_CONTROL2, | ||
135 | DA9034_WLED_ISET(pdata->output_current)); | ||
136 | |||
130 | bl = backlight_device_register(pdev->name, data->da903x_dev, | 137 | bl = backlight_device_register(pdev->name, data->da903x_dev, |
131 | data, &da903x_backlight_ops); | 138 | data, &da903x_backlight_ops); |
132 | if (IS_ERR(bl)) { | 139 | if (IS_ERR(bl)) { |
diff --git a/drivers/video/backlight/tdo24m.c b/drivers/video/backlight/tdo24m.c index bbfb502add67..4a3d46e08016 100644 --- a/drivers/video/backlight/tdo24m.c +++ b/drivers/video/backlight/tdo24m.c | |||
@@ -367,6 +367,7 @@ static int __devinit tdo24m_probe(struct spi_device *spi) | |||
367 | 367 | ||
368 | spi_message_init(m); | 368 | spi_message_init(m); |
369 | 369 | ||
370 | x->cs_change = 1; | ||
370 | x->tx_buf = &lcd->buf[0]; | 371 | x->tx_buf = &lcd->buf[0]; |
371 | spi_message_add_tail(x, m); | 372 | spi_message_add_tail(x, m); |
372 | 373 | ||
diff --git a/drivers/video/pxa168fb.c b/drivers/video/pxa168fb.c index 84d8327e47db..75285d3f393c 100644 --- a/drivers/video/pxa168fb.c +++ b/drivers/video/pxa168fb.c | |||
@@ -687,6 +687,7 @@ static int __init pxa168fb_probe(struct platform_device *pdev) | |||
687 | } | 687 | } |
688 | 688 | ||
689 | info->fix.smem_start = (unsigned long)fbi->fb_start_dma; | 689 | info->fix.smem_start = (unsigned long)fbi->fb_start_dma; |
690 | set_graphics_start(info, 0, 0); | ||
690 | 691 | ||
691 | /* | 692 | /* |
692 | * Set video mode according to platform data. | 693 | * Set video mode according to platform data. |
diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c index 1820c4a24434..f58a3aae6ea6 100644 --- a/drivers/video/pxafb.c +++ b/drivers/video/pxafb.c | |||
@@ -80,7 +80,8 @@ | |||
80 | static int pxafb_activate_var(struct fb_var_screeninfo *var, | 80 | static int pxafb_activate_var(struct fb_var_screeninfo *var, |
81 | struct pxafb_info *); | 81 | struct pxafb_info *); |
82 | static void set_ctrlr_state(struct pxafb_info *fbi, u_int state); | 82 | static void set_ctrlr_state(struct pxafb_info *fbi, u_int state); |
83 | static void setup_base_frame(struct pxafb_info *fbi, int branch); | 83 | static void setup_base_frame(struct pxafb_info *fbi, |
84 | struct fb_var_screeninfo *var, int branch); | ||
84 | static int setup_frame_dma(struct pxafb_info *fbi, int dma, int pal, | 85 | static int setup_frame_dma(struct pxafb_info *fbi, int dma, int pal, |
85 | unsigned long offset, size_t size); | 86 | unsigned long offset, size_t size); |
86 | 87 | ||
@@ -397,6 +398,7 @@ static void pxafb_setmode(struct fb_var_screeninfo *var, | |||
397 | var->lower_margin = mode->lower_margin; | 398 | var->lower_margin = mode->lower_margin; |
398 | var->sync = mode->sync; | 399 | var->sync = mode->sync; |
399 | var->grayscale = mode->cmap_greyscale; | 400 | var->grayscale = mode->cmap_greyscale; |
401 | var->transp.length = mode->transparency; | ||
400 | 402 | ||
401 | /* set the initial RGBA bitfields */ | 403 | /* set the initial RGBA bitfields */ |
402 | pxafb_set_pixfmt(var, mode->depth); | 404 | pxafb_set_pixfmt(var, mode->depth); |
@@ -531,12 +533,22 @@ static int pxafb_pan_display(struct fb_var_screeninfo *var, | |||
531 | struct fb_info *info) | 533 | struct fb_info *info) |
532 | { | 534 | { |
533 | struct pxafb_info *fbi = (struct pxafb_info *)info; | 535 | struct pxafb_info *fbi = (struct pxafb_info *)info; |
536 | struct fb_var_screeninfo newvar; | ||
534 | int dma = DMA_MAX + DMA_BASE; | 537 | int dma = DMA_MAX + DMA_BASE; |
535 | 538 | ||
536 | if (fbi->state != C_ENABLE) | 539 | if (fbi->state != C_ENABLE) |
537 | return 0; | 540 | return 0; |
538 | 541 | ||
539 | setup_base_frame(fbi, 1); | 542 | /* Only take .xoffset, .yoffset and .vmode & FB_VMODE_YWRAP from what |
543 | * was passed in and copy the rest from the old screeninfo. | ||
544 | */ | ||
545 | memcpy(&newvar, &fbi->fb.var, sizeof(newvar)); | ||
546 | newvar.xoffset = var->xoffset; | ||
547 | newvar.yoffset = var->yoffset; | ||
548 | newvar.vmode &= ~FB_VMODE_YWRAP; | ||
549 | newvar.vmode |= var->vmode & FB_VMODE_YWRAP; | ||
550 | |||
551 | setup_base_frame(fbi, &newvar, 1); | ||
540 | 552 | ||
541 | if (fbi->lccr0 & LCCR0_SDS) | 553 | if (fbi->lccr0 & LCCR0_SDS) |
542 | lcd_writel(fbi, FBR1, fbi->fdadr[dma + 1] | 0x1); | 554 | lcd_writel(fbi, FBR1, fbi->fdadr[dma + 1] | 0x1); |
@@ -1052,9 +1064,10 @@ static int setup_frame_dma(struct pxafb_info *fbi, int dma, int pal, | |||
1052 | return 0; | 1064 | return 0; |
1053 | } | 1065 | } |
1054 | 1066 | ||
1055 | static void setup_base_frame(struct pxafb_info *fbi, int branch) | 1067 | static void setup_base_frame(struct pxafb_info *fbi, |
1068 | struct fb_var_screeninfo *var, | ||
1069 | int branch) | ||
1056 | { | 1070 | { |
1057 | struct fb_var_screeninfo *var = &fbi->fb.var; | ||
1058 | struct fb_fix_screeninfo *fix = &fbi->fb.fix; | 1071 | struct fb_fix_screeninfo *fix = &fbi->fb.fix; |
1059 | int nbytes, dma, pal, bpp = var->bits_per_pixel; | 1072 | int nbytes, dma, pal, bpp = var->bits_per_pixel; |
1060 | unsigned long offset; | 1073 | unsigned long offset; |
@@ -1332,7 +1345,7 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var, | |||
1332 | #endif | 1345 | #endif |
1333 | setup_parallel_timing(fbi, var); | 1346 | setup_parallel_timing(fbi, var); |
1334 | 1347 | ||
1335 | setup_base_frame(fbi, 0); | 1348 | setup_base_frame(fbi, var, 0); |
1336 | 1349 | ||
1337 | fbi->reg_lccr0 = fbi->lccr0 | | 1350 | fbi->reg_lccr0 = fbi->lccr0 | |
1338 | (LCCR0_LDM | LCCR0_SFM | LCCR0_IUM | LCCR0_EFM | | 1351 | (LCCR0_LDM | LCCR0_SFM | LCCR0_IUM | LCCR0_EFM | |