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authorAndres Salomon <dilinger@queued.net>2008-04-28 05:14:53 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-04-28 11:58:35 -0400
commit32bf87e3697cf2f730b8fbf47cad903ceef718a2 (patch)
tree6476a1f8796c28e7eb70deb7eaae75872f95fb6d /drivers
parent22af89aa0c0b4012a7431114a340efd3665a7617 (diff)
x86: geode: MSR cleanup
This cleans up a few MSR-using drivers in the following manner: - Ensures MSRs are all defined in asm/geode.h, rather than in misc places - Makes the naming consistent; cs553[56] ones begin with MSR_, GX-specific ones start with MSR_GX_, and LX-specific ones start with MSR_LX_. Also, make the names match the data sheet. - Use MSR names rather than numbers in source code - Document the fact that the LX's MSR_PADSEL has the wrong value in the data sheet. That's, uh, good to note. Signed-off-by: Andres Salomon <dilinger@debian.org> Acked-by: Jordan Crouse <jordan.crouse@amd.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/video/geode/display_gx.h1
-rw-r--r--drivers/video/geode/gxfb_core.c3
-rw-r--r--drivers/video/geode/lxfb.h8
-rw-r--r--drivers/video/geode/lxfb_ops.c19
-rw-r--r--drivers/video/geode/video_gx.c5
-rw-r--r--drivers/video/geode/video_gx.h3
6 files changed, 15 insertions, 24 deletions
diff --git a/drivers/video/geode/display_gx.h b/drivers/video/geode/display_gx.h
index 0af33f329e88..df94e4fc6626 100644
--- a/drivers/video/geode/display_gx.h
+++ b/drivers/video/geode/display_gx.h
@@ -17,7 +17,6 @@ int gx_line_delta(int xres, int bpp);
17extern struct geode_dc_ops gx_dc_ops; 17extern struct geode_dc_ops gx_dc_ops;
18 18
19/* MSR that tells us if a TFT or CRT is attached */ 19/* MSR that tells us if a TFT or CRT is attached */
20#define GLD_MSR_CONFIG 0xC0002001
21#define GLD_MSR_CONFIG_DM_FP 0x40 20#define GLD_MSR_CONFIG_DM_FP 0x40
22 21
23/* Display controller registers */ 22/* Display controller registers */
diff --git a/drivers/video/geode/gxfb_core.c b/drivers/video/geode/gxfb_core.c
index cf841efa229a..4e22ee0377e7 100644
--- a/drivers/video/geode/gxfb_core.c
+++ b/drivers/video/geode/gxfb_core.c
@@ -30,6 +30,7 @@
30#include <linux/fb.h> 30#include <linux/fb.h>
31#include <linux/init.h> 31#include <linux/init.h>
32#include <linux/pci.h> 32#include <linux/pci.h>
33#include <asm/geode.h>
33 34
34#include "geodefb.h" 35#include "geodefb.h"
35#include "display_gx.h" 36#include "display_gx.h"
@@ -326,7 +327,7 @@ static int __init gxfb_probe(struct pci_dev *pdev, const struct pci_device_id *i
326 327
327 /* Figure out if this is a TFT or CRT part */ 328 /* Figure out if this is a TFT or CRT part */
328 329
329 rdmsrl(GLD_MSR_CONFIG, val); 330 rdmsrl(MSR_GX_GLD_MSR_CONFIG, val);
330 331
331 if ((val & GLD_MSR_CONFIG_DM_FP) == GLD_MSR_CONFIG_DM_FP) 332 if ((val & GLD_MSR_CONFIG_DM_FP) == GLD_MSR_CONFIG_DM_FP)
332 par->enable_crt = 0; 333 par->enable_crt = 0;
diff --git a/drivers/video/geode/lxfb.h b/drivers/video/geode/lxfb.h
index ca13c48d19b0..8c83a1b4439b 100644
--- a/drivers/video/geode/lxfb.h
+++ b/drivers/video/geode/lxfb.h
@@ -31,14 +31,6 @@ void lx_set_palette_reg(struct fb_info *, unsigned int, unsigned int,
31 31
32/* MSRS */ 32/* MSRS */
33 33
34#define MSR_LX_GLD_CONFIG 0x48002001
35#define MSR_LX_GLCP_DOTPLL 0x4c000015
36#define MSR_LX_DF_PADSEL 0x48002011
37#define MSR_LX_DC_SPARE 0x80000011
38#define MSR_LX_DF_GLCONFIG 0x48002001
39
40#define MSR_LX_GLIU0_P2D_RO0 0x10000029
41
42#define GLCP_DOTPLL_RESET (1 << 0) 34#define GLCP_DOTPLL_RESET (1 << 0)
43#define GLCP_DOTPLL_BYPASS (1 << 15) 35#define GLCP_DOTPLL_BYPASS (1 << 15)
44#define GLCP_DOTPLL_HALFPIX (1 << 24) 36#define GLCP_DOTPLL_HALFPIX (1 << 24)
diff --git a/drivers/video/geode/lxfb_ops.c b/drivers/video/geode/lxfb_ops.c
index 4fbc99be96ef..a52c180062c8 100644
--- a/drivers/video/geode/lxfb_ops.c
+++ b/drivers/video/geode/lxfb_ops.c
@@ -13,6 +13,7 @@
13#include <linux/fb.h> 13#include <linux/fb.h>
14#include <linux/uaccess.h> 14#include <linux/uaccess.h>
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include <asm/geode.h>
16 17
17#include "lxfb.h" 18#include "lxfb.h"
18 19
@@ -101,7 +102,7 @@ static void lx_set_dotpll(u32 pllval)
101 u32 dotpll_lo, dotpll_hi; 102 u32 dotpll_lo, dotpll_hi;
102 int i; 103 int i;
103 104
104 rdmsr(MSR_LX_GLCP_DOTPLL, dotpll_lo, dotpll_hi); 105 rdmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
105 106
106 if ((dotpll_lo & GLCP_DOTPLL_LOCK) && (dotpll_hi == pllval)) 107 if ((dotpll_lo & GLCP_DOTPLL_LOCK) && (dotpll_hi == pllval))
107 return; 108 return;
@@ -110,7 +111,7 @@ static void lx_set_dotpll(u32 pllval)
110 dotpll_lo &= ~(GLCP_DOTPLL_BYPASS | GLCP_DOTPLL_HALFPIX); 111 dotpll_lo &= ~(GLCP_DOTPLL_BYPASS | GLCP_DOTPLL_HALFPIX);
111 dotpll_lo |= GLCP_DOTPLL_RESET; 112 dotpll_lo |= GLCP_DOTPLL_RESET;
112 113
113 wrmsr(MSR_LX_GLCP_DOTPLL, dotpll_lo, dotpll_hi); 114 wrmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
114 115
115 /* Wait 100us for the PLL to lock */ 116 /* Wait 100us for the PLL to lock */
116 117
@@ -119,7 +120,7 @@ static void lx_set_dotpll(u32 pllval)
119 /* Now, loop for the lock bit */ 120 /* Now, loop for the lock bit */
120 121
121 for (i = 0; i < 1000; i++) { 122 for (i = 0; i < 1000; i++) {
122 rdmsr(MSR_LX_GLCP_DOTPLL, dotpll_lo, dotpll_hi); 123 rdmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
123 if (dotpll_lo & GLCP_DOTPLL_LOCK) 124 if (dotpll_lo & GLCP_DOTPLL_LOCK)
124 break; 125 break;
125 } 126 }
@@ -127,7 +128,7 @@ static void lx_set_dotpll(u32 pllval)
127 /* Clear the reset bit */ 128 /* Clear the reset bit */
128 129
129 dotpll_lo &= ~GLCP_DOTPLL_RESET; 130 dotpll_lo &= ~GLCP_DOTPLL_RESET;
130 wrmsr(MSR_LX_GLCP_DOTPLL, dotpll_lo, dotpll_hi); 131 wrmsr(MSR_GLCP_DOTPLL, dotpll_lo, dotpll_hi);
131} 132}
132 133
133/* Set the clock based on the frequency specified by the current mode */ 134/* Set the clock based on the frequency specified by the current mode */
@@ -255,7 +256,7 @@ static void lx_graphics_enable(struct fb_info *info)
255 msrlo = DF_DEFAULT_TFT_PAD_SEL_LOW; 256 msrlo = DF_DEFAULT_TFT_PAD_SEL_LOW;
256 msrhi = DF_DEFAULT_TFT_PAD_SEL_HIGH; 257 msrhi = DF_DEFAULT_TFT_PAD_SEL_HIGH;
257 258
258 wrmsr(MSR_LX_DF_PADSEL, msrlo, msrhi); 259 wrmsr(MSR_LX_MSR_PADSEL, msrlo, msrhi);
259 } 260 }
260 261
261 if (par->output & OUTPUT_CRT) { 262 if (par->output & OUTPUT_CRT) {
@@ -321,7 +322,7 @@ void lx_set_mode(struct fb_info *info)
321 322
322 /* Set output mode */ 323 /* Set output mode */
323 324
324 rdmsrl(MSR_LX_DF_GLCONFIG, msrval); 325 rdmsrl(MSR_LX_GLD_MSR_CONFIG, msrval);
325 msrval &= ~DF_CONFIG_OUTPUT_MASK; 326 msrval &= ~DF_CONFIG_OUTPUT_MASK;
326 327
327 if (par->output & OUTPUT_PANEL) { 328 if (par->output & OUTPUT_PANEL) {
@@ -335,7 +336,7 @@ void lx_set_mode(struct fb_info *info)
335 msrval |= DF_OUTPUT_CRT; 336 msrval |= DF_OUTPUT_CRT;
336 } 337 }
337 338
338 wrmsrl(MSR_LX_DF_GLCONFIG, msrval); 339 wrmsrl(MSR_LX_GLD_MSR_CONFIG, msrval);
339 340
340 /* Clear the various buffers */ 341 /* Clear the various buffers */
341 /* FIXME: Adjust for panning here */ 342 /* FIXME: Adjust for panning here */
@@ -383,13 +384,13 @@ void lx_set_mode(struct fb_info *info)
383 384
384 /* Set default watermark values */ 385 /* Set default watermark values */
385 386
386 rdmsrl(MSR_LX_DC_SPARE, msrval); 387 rdmsrl(MSR_LX_SPARE_MSR, msrval);
387 388
388 msrval &= ~(DC_SPARE_DISABLE_CFIFO_HGO | DC_SPARE_VFIFO_ARB_SELECT | 389 msrval &= ~(DC_SPARE_DISABLE_CFIFO_HGO | DC_SPARE_VFIFO_ARB_SELECT |
389 DC_SPARE_LOAD_WM_LPEN_MASK | DC_SPARE_WM_LPEN_OVRD | 390 DC_SPARE_LOAD_WM_LPEN_MASK | DC_SPARE_WM_LPEN_OVRD |
390 DC_SPARE_DISABLE_INIT_VID_PRI | DC_SPARE_DISABLE_VFIFO_WM); 391 DC_SPARE_DISABLE_INIT_VID_PRI | DC_SPARE_DISABLE_VFIFO_WM);
391 msrval |= DC_SPARE_DISABLE_VFIFO_WM | DC_SPARE_DISABLE_INIT_VID_PRI; 392 msrval |= DC_SPARE_DISABLE_VFIFO_WM | DC_SPARE_DISABLE_INIT_VID_PRI;
392 wrmsrl(MSR_LX_DC_SPARE, msrval); 393 wrmsrl(MSR_LX_SPARE_MSR, msrval);
393 394
394 gcfg = DC_GCFG_DFLE; /* Display fifo enable */ 395 gcfg = DC_GCFG_DFLE; /* Display fifo enable */
395 gcfg |= 0xB600; /* Set default priority */ 396 gcfg |= 0xB600; /* Set default priority */
diff --git a/drivers/video/geode/video_gx.c b/drivers/video/geode/video_gx.c
index febf09c63492..d0885370675d 100644
--- a/drivers/video/geode/video_gx.c
+++ b/drivers/video/geode/video_gx.c
@@ -16,6 +16,7 @@
16#include <asm/io.h> 16#include <asm/io.h>
17#include <asm/delay.h> 17#include <asm/delay.h>
18#include <asm/msr.h> 18#include <asm/msr.h>
19#include <asm/geode.h>
19 20
20#include "geodefb.h" 21#include "geodefb.h"
21#include "video_gx.h" 22#include "video_gx.h"
@@ -184,10 +185,10 @@ gx_configure_tft(struct fb_info *info)
184 185
185 /* Set up the DF pad select MSR */ 186 /* Set up the DF pad select MSR */
186 187
187 rdmsrl(GX_VP_MSR_PAD_SELECT, val); 188 rdmsrl(MSR_GX_MSR_PADSEL, val);
188 val &= ~GX_VP_PAD_SELECT_MASK; 189 val &= ~GX_VP_PAD_SELECT_MASK;
189 val |= GX_VP_PAD_SELECT_TFT; 190 val |= GX_VP_PAD_SELECT_TFT;
190 wrmsrl(GX_VP_MSR_PAD_SELECT, val); 191 wrmsrl(MSR_GX_MSR_PADSEL, val);
191 192
192 /* Turn off the panel */ 193 /* Turn off the panel */
193 194
diff --git a/drivers/video/geode/video_gx.h b/drivers/video/geode/video_gx.h
index ce28d8f382dc..d21bca020594 100644
--- a/drivers/video/geode/video_gx.h
+++ b/drivers/video/geode/video_gx.h
@@ -14,7 +14,6 @@
14extern struct geode_vid_ops gx_vid_ops; 14extern struct geode_vid_ops gx_vid_ops;
15 15
16/* GX Flatpanel control MSR */ 16/* GX Flatpanel control MSR */
17#define GX_VP_MSR_PAD_SELECT 0xC0002011
18#define GX_VP_PAD_SELECT_MASK 0x3FFFFFFF 17#define GX_VP_PAD_SELECT_MASK 0x3FFFFFFF
19#define GX_VP_PAD_SELECT_TFT 0x1FFFFFFF 18#define GX_VP_PAD_SELECT_TFT 0x1FFFFFFF
20 19
@@ -59,12 +58,10 @@ extern struct geode_vid_ops gx_vid_ops;
59 58
60/* Geode GX clock control MSRs */ 59/* Geode GX clock control MSRs */
61 60
62#define MSR_GLCP_SYS_RSTPLL 0x4c000014
63# define MSR_GLCP_SYS_RSTPLL_DOTPREDIV2 (0x0000000000000002ull) 61# define MSR_GLCP_SYS_RSTPLL_DOTPREDIV2 (0x0000000000000002ull)
64# define MSR_GLCP_SYS_RSTPLL_DOTPREMULT2 (0x0000000000000004ull) 62# define MSR_GLCP_SYS_RSTPLL_DOTPREMULT2 (0x0000000000000004ull)
65# define MSR_GLCP_SYS_RSTPLL_DOTPOSTDIV3 (0x0000000000000008ull) 63# define MSR_GLCP_SYS_RSTPLL_DOTPOSTDIV3 (0x0000000000000008ull)
66 64
67#define MSR_GLCP_DOTPLL 0x4c000015
68# define MSR_GLCP_DOTPLL_DOTRESET (0x0000000000000001ull) 65# define MSR_GLCP_DOTPLL_DOTRESET (0x0000000000000001ull)
69# define MSR_GLCP_DOTPLL_BYPASS (0x0000000000008000ull) 66# define MSR_GLCP_DOTPLL_BYPASS (0x0000000000008000ull)
70# define MSR_GLCP_DOTPLL_LOCK (0x0000000002000000ull) 67# define MSR_GLCP_DOTPLL_LOCK (0x0000000002000000ull)