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authorMarkus Pietrek <Markus.Pietrek@emtrion.de>2010-02-01 21:29:15 -0500
committerPaul Mundt <lethal@linux-sh.org>2010-02-01 21:29:15 -0500
commite8708ef7e86a463b3a5b01d4a9abf16c8748b464 (patch)
tree38ef7ec68597da137f49a3e67886503afca82234 /drivers
parentab658321f32770b903a4426e2a6fae0392757755 (diff)
spi: spi_sh_msiof: Fixed data sampling on the correct edge
The spi_sh_msiof.c driver presently misconfigures REDG and TEDG. TEDG==0 outputs data at the **rising edge** of the clock and REDG==0 samples data at the **falling edge** of the clock. Therefore for SPI, TEDG must be equal to REDG, otherwise the last byte received is not sampled in SPI mode 3. This brings the driver in line with the SH7723 HW Reference Manual settings documented in Figures 20.20 and 20.21 ("SPI Clock and data timing"). Signed-off-by: Markus Pietrek <Markus.Pietrek@emtrion.de> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/spi/spi_sh_msiof.c15
1 files changed, 6 insertions, 9 deletions
diff --git a/drivers/spi/spi_sh_msiof.c b/drivers/spi/spi_sh_msiof.c
index 51e5e1dfa6e5..30973ec16a93 100644
--- a/drivers/spi/spi_sh_msiof.c
+++ b/drivers/spi/spi_sh_msiof.c
@@ -173,15 +173,12 @@ static void sh_msiof_spi_set_pin_regs(struct sh_msiof_spi_priv *p,
173 int edge; 173 int edge;
174 174
175 /* 175 /*
176 * CPOL CPHA TSCKIZ RSCKIZ TEDG REDG(!) 176 * CPOL CPHA TSCKIZ RSCKIZ TEDG REDG
177 * 0 0 10 10 1 0 177 * 0 0 10 10 1 1
178 * 0 1 10 10 0 1 178 * 0 1 10 10 0 0
179 * 1 0 11 11 0 1 179 * 1 0 11 11 0 0
180 * 1 1 11 11 1 0 180 * 1 1 11 11 1 1
181 *
182 * (!) Note: REDG is inverted recommended data sheet setting
183 */ 181 */
184
185 sh_msiof_write(p, FCTR, 0); 182 sh_msiof_write(p, FCTR, 0);
186 sh_msiof_write(p, TMDR1, 0xe2000005 | (lsb_first << 24)); 183 sh_msiof_write(p, TMDR1, 0xe2000005 | (lsb_first << 24));
187 sh_msiof_write(p, RMDR1, 0x22000005 | (lsb_first << 24)); 184 sh_msiof_write(p, RMDR1, 0x22000005 | (lsb_first << 24));
@@ -193,7 +190,7 @@ static void sh_msiof_spi_set_pin_regs(struct sh_msiof_spi_priv *p,
193 edge = cpol ? cpha : !cpha; 190 edge = cpol ? cpha : !cpha;
194 191
195 tmp |= edge << 27; /* TEDG */ 192 tmp |= edge << 27; /* TEDG */
196 tmp |= !edge << 26; /* REDG */ 193 tmp |= edge << 26; /* REDG */
197 tmp |= (tx_hi_z ? 2 : 0) << 22; /* TXDIZ */ 194 tmp |= (tx_hi_z ? 2 : 0) << 22; /* TXDIZ */
198 sh_msiof_write(p, CTR, tmp); 195 sh_msiof_write(p, CTR, tmp);
199} 196}