diff options
author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2012-05-18 04:47:02 -0400 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2012-05-22 03:59:14 -0400 |
commit | c6eee968d40d319f0ac7a8a63dcbc633d9e6a2ea (patch) | |
tree | 69c37f169f25f8fad858b032508d2a1c2cd5c8ea /drivers | |
parent | 36377357db00f8660039578ba57a2a19bfc9ad3d (diff) |
OMAPDSS: remove compiler warnings when CONFIG_BUG=n
If CONFIG_BUG is not enabled, BUG() does not stop the execution. Many
places in code expect the execution to stop, and this causes compiler
warnings about uninitialized variables and returning from a non-void
function without a return value.
This patch fixes the warnings by initializing the variables and
returning properly after BUG() lines. However, the behaviour is still
undefined after the BUG, but this is the choice the user makes when
using CONFIG_BUG=n.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/video/omap2/dss/dispc.c | 31 | ||||
-rw-r--r-- | drivers/video/omap2/dss/dispc.h | 72 | ||||
-rw-r--r-- | drivers/video/omap2/dss/display.c | 2 | ||||
-rw-r--r-- | drivers/video/omap2/dss/dsi.c | 9 | ||||
-rw-r--r-- | drivers/video/omap2/dss/dss.c | 3 | ||||
-rw-r--r-- | drivers/video/omap2/dss/venc.c | 1 |
6 files changed, 113 insertions, 5 deletions
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c index 0fa1c94e8c58..3d0576d1983c 100644 --- a/drivers/video/omap2/dss/dispc.c +++ b/drivers/video/omap2/dss/dispc.c | |||
@@ -407,6 +407,7 @@ u32 dispc_mgr_get_vsync_irq(enum omap_channel channel) | |||
407 | return DISPC_IRQ_EVSYNC_ODD | DISPC_IRQ_EVSYNC_EVEN; | 407 | return DISPC_IRQ_EVSYNC_ODD | DISPC_IRQ_EVSYNC_EVEN; |
408 | default: | 408 | default: |
409 | BUG(); | 409 | BUG(); |
410 | return 0; | ||
410 | } | 411 | } |
411 | } | 412 | } |
412 | 413 | ||
@@ -421,6 +422,7 @@ u32 dispc_mgr_get_framedone_irq(enum omap_channel channel) | |||
421 | return 0; | 422 | return 0; |
422 | default: | 423 | default: |
423 | BUG(); | 424 | BUG(); |
425 | return 0; | ||
424 | } | 426 | } |
425 | } | 427 | } |
426 | 428 | ||
@@ -739,7 +741,7 @@ static void dispc_ovl_set_color_mode(enum omap_plane plane, | |||
739 | case OMAP_DSS_COLOR_XRGB16_1555: | 741 | case OMAP_DSS_COLOR_XRGB16_1555: |
740 | m = 0xf; break; | 742 | m = 0xf; break; |
741 | default: | 743 | default: |
742 | BUG(); break; | 744 | BUG(); return; |
743 | } | 745 | } |
744 | } else { | 746 | } else { |
745 | switch (color_mode) { | 747 | switch (color_mode) { |
@@ -776,7 +778,7 @@ static void dispc_ovl_set_color_mode(enum omap_plane plane, | |||
776 | case OMAP_DSS_COLOR_XRGB16_1555: | 778 | case OMAP_DSS_COLOR_XRGB16_1555: |
777 | m = 0xf; break; | 779 | m = 0xf; break; |
778 | default: | 780 | default: |
779 | BUG(); break; | 781 | BUG(); return; |
780 | } | 782 | } |
781 | } | 783 | } |
782 | 784 | ||
@@ -820,6 +822,7 @@ void dispc_ovl_set_channel_out(enum omap_plane plane, enum omap_channel channel) | |||
820 | break; | 822 | break; |
821 | default: | 823 | default: |
822 | BUG(); | 824 | BUG(); |
825 | return; | ||
823 | } | 826 | } |
824 | 827 | ||
825 | val = FLD_MOD(val, chan, shift, shift); | 828 | val = FLD_MOD(val, chan, shift, shift); |
@@ -847,6 +850,7 @@ static enum omap_channel dispc_ovl_get_channel_out(enum omap_plane plane) | |||
847 | break; | 850 | break; |
848 | default: | 851 | default: |
849 | BUG(); | 852 | BUG(); |
853 | return 0; | ||
850 | } | 854 | } |
851 | 855 | ||
852 | val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); | 856 | val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane)); |
@@ -1209,6 +1213,7 @@ static void dispc_ovl_set_accu_uv(enum omap_plane plane, | |||
1209 | break; | 1213 | break; |
1210 | default: | 1214 | default: |
1211 | BUG(); | 1215 | BUG(); |
1216 | return; | ||
1212 | } | 1217 | } |
1213 | 1218 | ||
1214 | switch (color_mode) { | 1219 | switch (color_mode) { |
@@ -1224,6 +1229,7 @@ static void dispc_ovl_set_accu_uv(enum omap_plane plane, | |||
1224 | break; | 1229 | break; |
1225 | default: | 1230 | default: |
1226 | BUG(); | 1231 | BUG(); |
1232 | return; | ||
1227 | } | 1233 | } |
1228 | 1234 | ||
1229 | accu_val = &accu_table[idx]; | 1235 | accu_val = &accu_table[idx]; |
@@ -1339,6 +1345,7 @@ static void dispc_ovl_set_scaling_uv(enum omap_plane plane, | |||
1339 | break; | 1345 | break; |
1340 | default: | 1346 | default: |
1341 | BUG(); | 1347 | BUG(); |
1348 | return; | ||
1342 | } | 1349 | } |
1343 | 1350 | ||
1344 | if (out_width != orig_width) | 1351 | if (out_width != orig_width) |
@@ -1466,6 +1473,7 @@ static int color_mode_to_bpp(enum omap_color_mode color_mode) | |||
1466 | return 32; | 1473 | return 32; |
1467 | default: | 1474 | default: |
1468 | BUG(); | 1475 | BUG(); |
1476 | return 0; | ||
1469 | } | 1477 | } |
1470 | } | 1478 | } |
1471 | 1479 | ||
@@ -1479,6 +1487,7 @@ static s32 pixinc(int pixels, u8 ps) | |||
1479 | return 1 - (-pixels + 1) * ps; | 1487 | return 1 - (-pixels + 1) * ps; |
1480 | else | 1488 | else |
1481 | BUG(); | 1489 | BUG(); |
1490 | return 0; | ||
1482 | } | 1491 | } |
1483 | 1492 | ||
1484 | static void calc_vrfb_rotation_offset(u8 rotation, bool mirror, | 1493 | static void calc_vrfb_rotation_offset(u8 rotation, bool mirror, |
@@ -1562,6 +1571,7 @@ static void calc_vrfb_rotation_offset(u8 rotation, bool mirror, | |||
1562 | 1571 | ||
1563 | default: | 1572 | default: |
1564 | BUG(); | 1573 | BUG(); |
1574 | return; | ||
1565 | } | 1575 | } |
1566 | } | 1576 | } |
1567 | 1577 | ||
@@ -1717,6 +1727,7 @@ static void calc_dma_rotation_offset(u8 rotation, bool mirror, | |||
1717 | 1727 | ||
1718 | default: | 1728 | default: |
1719 | BUG(); | 1729 | BUG(); |
1730 | return; | ||
1720 | } | 1731 | } |
1721 | } | 1732 | } |
1722 | 1733 | ||
@@ -2106,6 +2117,11 @@ int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi, | |||
2106 | if (fieldmode) | 2117 | if (fieldmode) |
2107 | field_offset = 1; | 2118 | field_offset = 1; |
2108 | 2119 | ||
2120 | offset0 = 0; | ||
2121 | offset1 = 0; | ||
2122 | row_inc = 0; | ||
2123 | pix_inc = 0; | ||
2124 | |||
2109 | if (oi->rotation_type == OMAP_DSS_ROT_DMA) | 2125 | if (oi->rotation_type == OMAP_DSS_ROT_DMA) |
2110 | calc_dma_rotation_offset(oi->rotation, oi->mirror, | 2126 | calc_dma_rotation_offset(oi->rotation, oi->mirror, |
2111 | oi->screen_width, in_width, frame_height, | 2127 | oi->screen_width, in_width, frame_height, |
@@ -2316,8 +2332,10 @@ bool dispc_mgr_is_enabled(enum omap_channel channel) | |||
2316 | return !!REG_GET(DISPC_CONTROL, 1, 1); | 2332 | return !!REG_GET(DISPC_CONTROL, 1, 1); |
2317 | else if (channel == OMAP_DSS_CHANNEL_LCD2) | 2333 | else if (channel == OMAP_DSS_CHANNEL_LCD2) |
2318 | return !!REG_GET(DISPC_CONTROL2, 0, 0); | 2334 | return !!REG_GET(DISPC_CONTROL2, 0, 0); |
2319 | else | 2335 | else { |
2320 | BUG(); | 2336 | BUG(); |
2337 | return false; | ||
2338 | } | ||
2321 | } | 2339 | } |
2322 | 2340 | ||
2323 | void dispc_mgr_enable(enum omap_channel channel, bool enable) | 2341 | void dispc_mgr_enable(enum omap_channel channel, bool enable) |
@@ -2593,8 +2611,10 @@ void dispc_mgr_set_timings(enum omap_channel channel, | |||
2593 | DSSDBG("channel %d xres %u yres %u\n", channel, timings->x_res, | 2611 | DSSDBG("channel %d xres %u yres %u\n", channel, timings->x_res, |
2594 | timings->y_res); | 2612 | timings->y_res); |
2595 | 2613 | ||
2596 | if (!dispc_mgr_timings_ok(channel, timings)) | 2614 | if (!dispc_mgr_timings_ok(channel, timings)) { |
2597 | BUG(); | 2615 | BUG(); |
2616 | return; | ||
2617 | } | ||
2598 | 2618 | ||
2599 | if (dispc_mgr_is_lcd(channel)) { | 2619 | if (dispc_mgr_is_lcd(channel)) { |
2600 | _dispc_mgr_set_lcd_timings(channel, timings->hsw, timings->hfp, | 2620 | _dispc_mgr_set_lcd_timings(channel, timings->hsw, timings->hfp, |
@@ -2658,6 +2678,7 @@ unsigned long dispc_fclk_rate(void) | |||
2658 | break; | 2678 | break; |
2659 | default: | 2679 | default: |
2660 | BUG(); | 2680 | BUG(); |
2681 | return 0; | ||
2661 | } | 2682 | } |
2662 | 2683 | ||
2663 | return r; | 2684 | return r; |
@@ -2688,6 +2709,7 @@ unsigned long dispc_mgr_lclk_rate(enum omap_channel channel) | |||
2688 | break; | 2709 | break; |
2689 | default: | 2710 | default: |
2690 | BUG(); | 2711 | BUG(); |
2712 | return 0; | ||
2691 | } | 2713 | } |
2692 | 2714 | ||
2693 | return r / lcd; | 2715 | return r / lcd; |
@@ -2720,6 +2742,7 @@ unsigned long dispc_mgr_pclk_rate(enum omap_channel channel) | |||
2720 | return hdmi_get_pixel_clock(); | 2742 | return hdmi_get_pixel_clock(); |
2721 | default: | 2743 | default: |
2722 | BUG(); | 2744 | BUG(); |
2745 | return 0; | ||
2723 | } | 2746 | } |
2724 | } | 2747 | } |
2725 | } | 2748 | } |
diff --git a/drivers/video/omap2/dss/dispc.h b/drivers/video/omap2/dss/dispc.h index 5836bd1650f9..f278080e1063 100644 --- a/drivers/video/omap2/dss/dispc.h +++ b/drivers/video/omap2/dss/dispc.h | |||
@@ -120,6 +120,7 @@ static inline u16 DISPC_DEFAULT_COLOR(enum omap_channel channel) | |||
120 | return 0x03AC; | 120 | return 0x03AC; |
121 | default: | 121 | default: |
122 | BUG(); | 122 | BUG(); |
123 | return 0; | ||
123 | } | 124 | } |
124 | } | 125 | } |
125 | 126 | ||
@@ -134,6 +135,7 @@ static inline u16 DISPC_TRANS_COLOR(enum omap_channel channel) | |||
134 | return 0x03B0; | 135 | return 0x03B0; |
135 | default: | 136 | default: |
136 | BUG(); | 137 | BUG(); |
138 | return 0; | ||
137 | } | 139 | } |
138 | } | 140 | } |
139 | 141 | ||
@@ -144,10 +146,12 @@ static inline u16 DISPC_TIMING_H(enum omap_channel channel) | |||
144 | return 0x0064; | 146 | return 0x0064; |
145 | case OMAP_DSS_CHANNEL_DIGIT: | 147 | case OMAP_DSS_CHANNEL_DIGIT: |
146 | BUG(); | 148 | BUG(); |
149 | return 0; | ||
147 | case OMAP_DSS_CHANNEL_LCD2: | 150 | case OMAP_DSS_CHANNEL_LCD2: |
148 | return 0x0400; | 151 | return 0x0400; |
149 | default: | 152 | default: |
150 | BUG(); | 153 | BUG(); |
154 | return 0; | ||
151 | } | 155 | } |
152 | } | 156 | } |
153 | 157 | ||
@@ -158,10 +162,12 @@ static inline u16 DISPC_TIMING_V(enum omap_channel channel) | |||
158 | return 0x0068; | 162 | return 0x0068; |
159 | case OMAP_DSS_CHANNEL_DIGIT: | 163 | case OMAP_DSS_CHANNEL_DIGIT: |
160 | BUG(); | 164 | BUG(); |
165 | return 0; | ||
161 | case OMAP_DSS_CHANNEL_LCD2: | 166 | case OMAP_DSS_CHANNEL_LCD2: |
162 | return 0x0404; | 167 | return 0x0404; |
163 | default: | 168 | default: |
164 | BUG(); | 169 | BUG(); |
170 | return 0; | ||
165 | } | 171 | } |
166 | } | 172 | } |
167 | 173 | ||
@@ -172,10 +178,12 @@ static inline u16 DISPC_POL_FREQ(enum omap_channel channel) | |||
172 | return 0x006C; | 178 | return 0x006C; |
173 | case OMAP_DSS_CHANNEL_DIGIT: | 179 | case OMAP_DSS_CHANNEL_DIGIT: |
174 | BUG(); | 180 | BUG(); |
181 | return 0; | ||
175 | case OMAP_DSS_CHANNEL_LCD2: | 182 | case OMAP_DSS_CHANNEL_LCD2: |
176 | return 0x0408; | 183 | return 0x0408; |
177 | default: | 184 | default: |
178 | BUG(); | 185 | BUG(); |
186 | return 0; | ||
179 | } | 187 | } |
180 | } | 188 | } |
181 | 189 | ||
@@ -186,10 +194,12 @@ static inline u16 DISPC_DIVISORo(enum omap_channel channel) | |||
186 | return 0x0070; | 194 | return 0x0070; |
187 | case OMAP_DSS_CHANNEL_DIGIT: | 195 | case OMAP_DSS_CHANNEL_DIGIT: |
188 | BUG(); | 196 | BUG(); |
197 | return 0; | ||
189 | case OMAP_DSS_CHANNEL_LCD2: | 198 | case OMAP_DSS_CHANNEL_LCD2: |
190 | return 0x040C; | 199 | return 0x040C; |
191 | default: | 200 | default: |
192 | BUG(); | 201 | BUG(); |
202 | return 0; | ||
193 | } | 203 | } |
194 | } | 204 | } |
195 | 205 | ||
@@ -205,6 +215,7 @@ static inline u16 DISPC_SIZE_MGR(enum omap_channel channel) | |||
205 | return 0x03CC; | 215 | return 0x03CC; |
206 | default: | 216 | default: |
207 | BUG(); | 217 | BUG(); |
218 | return 0; | ||
208 | } | 219 | } |
209 | } | 220 | } |
210 | 221 | ||
@@ -215,10 +226,12 @@ static inline u16 DISPC_DATA_CYCLE1(enum omap_channel channel) | |||
215 | return 0x01D4; | 226 | return 0x01D4; |
216 | case OMAP_DSS_CHANNEL_DIGIT: | 227 | case OMAP_DSS_CHANNEL_DIGIT: |
217 | BUG(); | 228 | BUG(); |
229 | return 0; | ||
218 | case OMAP_DSS_CHANNEL_LCD2: | 230 | case OMAP_DSS_CHANNEL_LCD2: |
219 | return 0x03C0; | 231 | return 0x03C0; |
220 | default: | 232 | default: |
221 | BUG(); | 233 | BUG(); |
234 | return 0; | ||
222 | } | 235 | } |
223 | } | 236 | } |
224 | 237 | ||
@@ -229,10 +242,12 @@ static inline u16 DISPC_DATA_CYCLE2(enum omap_channel channel) | |||
229 | return 0x01D8; | 242 | return 0x01D8; |
230 | case OMAP_DSS_CHANNEL_DIGIT: | 243 | case OMAP_DSS_CHANNEL_DIGIT: |
231 | BUG(); | 244 | BUG(); |
245 | return 0; | ||
232 | case OMAP_DSS_CHANNEL_LCD2: | 246 | case OMAP_DSS_CHANNEL_LCD2: |
233 | return 0x03C4; | 247 | return 0x03C4; |
234 | default: | 248 | default: |
235 | BUG(); | 249 | BUG(); |
250 | return 0; | ||
236 | } | 251 | } |
237 | } | 252 | } |
238 | 253 | ||
@@ -243,10 +258,12 @@ static inline u16 DISPC_DATA_CYCLE3(enum omap_channel channel) | |||
243 | return 0x01DC; | 258 | return 0x01DC; |
244 | case OMAP_DSS_CHANNEL_DIGIT: | 259 | case OMAP_DSS_CHANNEL_DIGIT: |
245 | BUG(); | 260 | BUG(); |
261 | return 0; | ||
246 | case OMAP_DSS_CHANNEL_LCD2: | 262 | case OMAP_DSS_CHANNEL_LCD2: |
247 | return 0x03C8; | 263 | return 0x03C8; |
248 | default: | 264 | default: |
249 | BUG(); | 265 | BUG(); |
266 | return 0; | ||
250 | } | 267 | } |
251 | } | 268 | } |
252 | 269 | ||
@@ -257,10 +274,12 @@ static inline u16 DISPC_CPR_COEF_R(enum omap_channel channel) | |||
257 | return 0x0220; | 274 | return 0x0220; |
258 | case OMAP_DSS_CHANNEL_DIGIT: | 275 | case OMAP_DSS_CHANNEL_DIGIT: |
259 | BUG(); | 276 | BUG(); |
277 | return 0; | ||
260 | case OMAP_DSS_CHANNEL_LCD2: | 278 | case OMAP_DSS_CHANNEL_LCD2: |
261 | return 0x03BC; | 279 | return 0x03BC; |
262 | default: | 280 | default: |
263 | BUG(); | 281 | BUG(); |
282 | return 0; | ||
264 | } | 283 | } |
265 | } | 284 | } |
266 | 285 | ||
@@ -271,10 +290,12 @@ static inline u16 DISPC_CPR_COEF_G(enum omap_channel channel) | |||
271 | return 0x0224; | 290 | return 0x0224; |
272 | case OMAP_DSS_CHANNEL_DIGIT: | 291 | case OMAP_DSS_CHANNEL_DIGIT: |
273 | BUG(); | 292 | BUG(); |
293 | return 0; | ||
274 | case OMAP_DSS_CHANNEL_LCD2: | 294 | case OMAP_DSS_CHANNEL_LCD2: |
275 | return 0x03B8; | 295 | return 0x03B8; |
276 | default: | 296 | default: |
277 | BUG(); | 297 | BUG(); |
298 | return 0; | ||
278 | } | 299 | } |
279 | } | 300 | } |
280 | 301 | ||
@@ -285,10 +306,12 @@ static inline u16 DISPC_CPR_COEF_B(enum omap_channel channel) | |||
285 | return 0x0228; | 306 | return 0x0228; |
286 | case OMAP_DSS_CHANNEL_DIGIT: | 307 | case OMAP_DSS_CHANNEL_DIGIT: |
287 | BUG(); | 308 | BUG(); |
309 | return 0; | ||
288 | case OMAP_DSS_CHANNEL_LCD2: | 310 | case OMAP_DSS_CHANNEL_LCD2: |
289 | return 0x03B4; | 311 | return 0x03B4; |
290 | default: | 312 | default: |
291 | BUG(); | 313 | BUG(); |
314 | return 0; | ||
292 | } | 315 | } |
293 | } | 316 | } |
294 | 317 | ||
@@ -306,6 +329,7 @@ static inline u16 DISPC_OVL_BASE(enum omap_plane plane) | |||
306 | return 0x0300; | 329 | return 0x0300; |
307 | default: | 330 | default: |
308 | BUG(); | 331 | BUG(); |
332 | return 0; | ||
309 | } | 333 | } |
310 | } | 334 | } |
311 | 335 | ||
@@ -321,6 +345,7 @@ static inline u16 DISPC_BA0_OFFSET(enum omap_plane plane) | |||
321 | return 0x0008; | 345 | return 0x0008; |
322 | default: | 346 | default: |
323 | BUG(); | 347 | BUG(); |
348 | return 0; | ||
324 | } | 349 | } |
325 | } | 350 | } |
326 | 351 | ||
@@ -335,6 +360,7 @@ static inline u16 DISPC_BA1_OFFSET(enum omap_plane plane) | |||
335 | return 0x000C; | 360 | return 0x000C; |
336 | default: | 361 | default: |
337 | BUG(); | 362 | BUG(); |
363 | return 0; | ||
338 | } | 364 | } |
339 | } | 365 | } |
340 | 366 | ||
@@ -343,6 +369,7 @@ static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane plane) | |||
343 | switch (plane) { | 369 | switch (plane) { |
344 | case OMAP_DSS_GFX: | 370 | case OMAP_DSS_GFX: |
345 | BUG(); | 371 | BUG(); |
372 | return 0; | ||
346 | case OMAP_DSS_VIDEO1: | 373 | case OMAP_DSS_VIDEO1: |
347 | return 0x0544; | 374 | return 0x0544; |
348 | case OMAP_DSS_VIDEO2: | 375 | case OMAP_DSS_VIDEO2: |
@@ -351,6 +378,7 @@ static inline u16 DISPC_BA0_UV_OFFSET(enum omap_plane plane) | |||
351 | return 0x0310; | 378 | return 0x0310; |
352 | default: | 379 | default: |
353 | BUG(); | 380 | BUG(); |
381 | return 0; | ||
354 | } | 382 | } |
355 | } | 383 | } |
356 | 384 | ||
@@ -359,6 +387,7 @@ static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane plane) | |||
359 | switch (plane) { | 387 | switch (plane) { |
360 | case OMAP_DSS_GFX: | 388 | case OMAP_DSS_GFX: |
361 | BUG(); | 389 | BUG(); |
390 | return 0; | ||
362 | case OMAP_DSS_VIDEO1: | 391 | case OMAP_DSS_VIDEO1: |
363 | return 0x0548; | 392 | return 0x0548; |
364 | case OMAP_DSS_VIDEO2: | 393 | case OMAP_DSS_VIDEO2: |
@@ -367,6 +396,7 @@ static inline u16 DISPC_BA1_UV_OFFSET(enum omap_plane plane) | |||
367 | return 0x0314; | 396 | return 0x0314; |
368 | default: | 397 | default: |
369 | BUG(); | 398 | BUG(); |
399 | return 0; | ||
370 | } | 400 | } |
371 | } | 401 | } |
372 | 402 | ||
@@ -381,6 +411,7 @@ static inline u16 DISPC_POS_OFFSET(enum omap_plane plane) | |||
381 | return 0x009C; | 411 | return 0x009C; |
382 | default: | 412 | default: |
383 | BUG(); | 413 | BUG(); |
414 | return 0; | ||
384 | } | 415 | } |
385 | } | 416 | } |
386 | 417 | ||
@@ -395,6 +426,7 @@ static inline u16 DISPC_SIZE_OFFSET(enum omap_plane plane) | |||
395 | return 0x00A8; | 426 | return 0x00A8; |
396 | default: | 427 | default: |
397 | BUG(); | 428 | BUG(); |
429 | return 0; | ||
398 | } | 430 | } |
399 | } | 431 | } |
400 | 432 | ||
@@ -410,6 +442,7 @@ static inline u16 DISPC_ATTR_OFFSET(enum omap_plane plane) | |||
410 | return 0x0070; | 442 | return 0x0070; |
411 | default: | 443 | default: |
412 | BUG(); | 444 | BUG(); |
445 | return 0; | ||
413 | } | 446 | } |
414 | } | 447 | } |
415 | 448 | ||
@@ -418,6 +451,7 @@ static inline u16 DISPC_ATTR2_OFFSET(enum omap_plane plane) | |||
418 | switch (plane) { | 451 | switch (plane) { |
419 | case OMAP_DSS_GFX: | 452 | case OMAP_DSS_GFX: |
420 | BUG(); | 453 | BUG(); |
454 | return 0; | ||
421 | case OMAP_DSS_VIDEO1: | 455 | case OMAP_DSS_VIDEO1: |
422 | return 0x0568; | 456 | return 0x0568; |
423 | case OMAP_DSS_VIDEO2: | 457 | case OMAP_DSS_VIDEO2: |
@@ -426,6 +460,7 @@ static inline u16 DISPC_ATTR2_OFFSET(enum omap_plane plane) | |||
426 | return 0x032C; | 460 | return 0x032C; |
427 | default: | 461 | default: |
428 | BUG(); | 462 | BUG(); |
463 | return 0; | ||
429 | } | 464 | } |
430 | } | 465 | } |
431 | 466 | ||
@@ -441,6 +476,7 @@ static inline u16 DISPC_FIFO_THRESH_OFFSET(enum omap_plane plane) | |||
441 | return 0x008C; | 476 | return 0x008C; |
442 | default: | 477 | default: |
443 | BUG(); | 478 | BUG(); |
479 | return 0; | ||
444 | } | 480 | } |
445 | } | 481 | } |
446 | 482 | ||
@@ -456,6 +492,7 @@ static inline u16 DISPC_FIFO_SIZE_STATUS_OFFSET(enum omap_plane plane) | |||
456 | return 0x0088; | 492 | return 0x0088; |
457 | default: | 493 | default: |
458 | BUG(); | 494 | BUG(); |
495 | return 0; | ||
459 | } | 496 | } |
460 | } | 497 | } |
461 | 498 | ||
@@ -471,6 +508,7 @@ static inline u16 DISPC_ROW_INC_OFFSET(enum omap_plane plane) | |||
471 | return 0x00A4; | 508 | return 0x00A4; |
472 | default: | 509 | default: |
473 | BUG(); | 510 | BUG(); |
511 | return 0; | ||
474 | } | 512 | } |
475 | } | 513 | } |
476 | 514 | ||
@@ -486,6 +524,7 @@ static inline u16 DISPC_PIX_INC_OFFSET(enum omap_plane plane) | |||
486 | return 0x0098; | 524 | return 0x0098; |
487 | default: | 525 | default: |
488 | BUG(); | 526 | BUG(); |
527 | return 0; | ||
489 | } | 528 | } |
490 | } | 529 | } |
491 | 530 | ||
@@ -498,8 +537,10 @@ static inline u16 DISPC_WINDOW_SKIP_OFFSET(enum omap_plane plane) | |||
498 | case OMAP_DSS_VIDEO2: | 537 | case OMAP_DSS_VIDEO2: |
499 | case OMAP_DSS_VIDEO3: | 538 | case OMAP_DSS_VIDEO3: |
500 | BUG(); | 539 | BUG(); |
540 | return 0; | ||
501 | default: | 541 | default: |
502 | BUG(); | 542 | BUG(); |
543 | return 0; | ||
503 | } | 544 | } |
504 | } | 545 | } |
505 | 546 | ||
@@ -512,8 +553,10 @@ static inline u16 DISPC_TABLE_BA_OFFSET(enum omap_plane plane) | |||
512 | case OMAP_DSS_VIDEO2: | 553 | case OMAP_DSS_VIDEO2: |
513 | case OMAP_DSS_VIDEO3: | 554 | case OMAP_DSS_VIDEO3: |
514 | BUG(); | 555 | BUG(); |
556 | return 0; | ||
515 | default: | 557 | default: |
516 | BUG(); | 558 | BUG(); |
559 | return 0; | ||
517 | } | 560 | } |
518 | } | 561 | } |
519 | 562 | ||
@@ -522,6 +565,7 @@ static inline u16 DISPC_FIR_OFFSET(enum omap_plane plane) | |||
522 | switch (plane) { | 565 | switch (plane) { |
523 | case OMAP_DSS_GFX: | 566 | case OMAP_DSS_GFX: |
524 | BUG(); | 567 | BUG(); |
568 | return 0; | ||
525 | case OMAP_DSS_VIDEO1: | 569 | case OMAP_DSS_VIDEO1: |
526 | case OMAP_DSS_VIDEO2: | 570 | case OMAP_DSS_VIDEO2: |
527 | return 0x0024; | 571 | return 0x0024; |
@@ -529,6 +573,7 @@ static inline u16 DISPC_FIR_OFFSET(enum omap_plane plane) | |||
529 | return 0x0090; | 573 | return 0x0090; |
530 | default: | 574 | default: |
531 | BUG(); | 575 | BUG(); |
576 | return 0; | ||
532 | } | 577 | } |
533 | } | 578 | } |
534 | 579 | ||
@@ -537,6 +582,7 @@ static inline u16 DISPC_FIR2_OFFSET(enum omap_plane plane) | |||
537 | switch (plane) { | 582 | switch (plane) { |
538 | case OMAP_DSS_GFX: | 583 | case OMAP_DSS_GFX: |
539 | BUG(); | 584 | BUG(); |
585 | return 0; | ||
540 | case OMAP_DSS_VIDEO1: | 586 | case OMAP_DSS_VIDEO1: |
541 | return 0x0580; | 587 | return 0x0580; |
542 | case OMAP_DSS_VIDEO2: | 588 | case OMAP_DSS_VIDEO2: |
@@ -545,6 +591,7 @@ static inline u16 DISPC_FIR2_OFFSET(enum omap_plane plane) | |||
545 | return 0x0424; | 591 | return 0x0424; |
546 | default: | 592 | default: |
547 | BUG(); | 593 | BUG(); |
594 | return 0; | ||
548 | } | 595 | } |
549 | } | 596 | } |
550 | 597 | ||
@@ -553,6 +600,7 @@ static inline u16 DISPC_PIC_SIZE_OFFSET(enum omap_plane plane) | |||
553 | switch (plane) { | 600 | switch (plane) { |
554 | case OMAP_DSS_GFX: | 601 | case OMAP_DSS_GFX: |
555 | BUG(); | 602 | BUG(); |
603 | return 0; | ||
556 | case OMAP_DSS_VIDEO1: | 604 | case OMAP_DSS_VIDEO1: |
557 | case OMAP_DSS_VIDEO2: | 605 | case OMAP_DSS_VIDEO2: |
558 | return 0x0028; | 606 | return 0x0028; |
@@ -560,6 +608,7 @@ static inline u16 DISPC_PIC_SIZE_OFFSET(enum omap_plane plane) | |||
560 | return 0x0094; | 608 | return 0x0094; |
561 | default: | 609 | default: |
562 | BUG(); | 610 | BUG(); |
611 | return 0; | ||
563 | } | 612 | } |
564 | } | 613 | } |
565 | 614 | ||
@@ -569,6 +618,7 @@ static inline u16 DISPC_ACCU0_OFFSET(enum omap_plane plane) | |||
569 | switch (plane) { | 618 | switch (plane) { |
570 | case OMAP_DSS_GFX: | 619 | case OMAP_DSS_GFX: |
571 | BUG(); | 620 | BUG(); |
621 | return 0; | ||
572 | case OMAP_DSS_VIDEO1: | 622 | case OMAP_DSS_VIDEO1: |
573 | case OMAP_DSS_VIDEO2: | 623 | case OMAP_DSS_VIDEO2: |
574 | return 0x002C; | 624 | return 0x002C; |
@@ -576,6 +626,7 @@ static inline u16 DISPC_ACCU0_OFFSET(enum omap_plane plane) | |||
576 | return 0x0000; | 626 | return 0x0000; |
577 | default: | 627 | default: |
578 | BUG(); | 628 | BUG(); |
629 | return 0; | ||
579 | } | 630 | } |
580 | } | 631 | } |
581 | 632 | ||
@@ -584,6 +635,7 @@ static inline u16 DISPC_ACCU2_0_OFFSET(enum omap_plane plane) | |||
584 | switch (plane) { | 635 | switch (plane) { |
585 | case OMAP_DSS_GFX: | 636 | case OMAP_DSS_GFX: |
586 | BUG(); | 637 | BUG(); |
638 | return 0; | ||
587 | case OMAP_DSS_VIDEO1: | 639 | case OMAP_DSS_VIDEO1: |
588 | return 0x0584; | 640 | return 0x0584; |
589 | case OMAP_DSS_VIDEO2: | 641 | case OMAP_DSS_VIDEO2: |
@@ -592,6 +644,7 @@ static inline u16 DISPC_ACCU2_0_OFFSET(enum omap_plane plane) | |||
592 | return 0x0428; | 644 | return 0x0428; |
593 | default: | 645 | default: |
594 | BUG(); | 646 | BUG(); |
647 | return 0; | ||
595 | } | 648 | } |
596 | } | 649 | } |
597 | 650 | ||
@@ -600,6 +653,7 @@ static inline u16 DISPC_ACCU1_OFFSET(enum omap_plane plane) | |||
600 | switch (plane) { | 653 | switch (plane) { |
601 | case OMAP_DSS_GFX: | 654 | case OMAP_DSS_GFX: |
602 | BUG(); | 655 | BUG(); |
656 | return 0; | ||
603 | case OMAP_DSS_VIDEO1: | 657 | case OMAP_DSS_VIDEO1: |
604 | case OMAP_DSS_VIDEO2: | 658 | case OMAP_DSS_VIDEO2: |
605 | return 0x0030; | 659 | return 0x0030; |
@@ -607,6 +661,7 @@ static inline u16 DISPC_ACCU1_OFFSET(enum omap_plane plane) | |||
607 | return 0x0004; | 661 | return 0x0004; |
608 | default: | 662 | default: |
609 | BUG(); | 663 | BUG(); |
664 | return 0; | ||
610 | } | 665 | } |
611 | } | 666 | } |
612 | 667 | ||
@@ -615,6 +670,7 @@ static inline u16 DISPC_ACCU2_1_OFFSET(enum omap_plane plane) | |||
615 | switch (plane) { | 670 | switch (plane) { |
616 | case OMAP_DSS_GFX: | 671 | case OMAP_DSS_GFX: |
617 | BUG(); | 672 | BUG(); |
673 | return 0; | ||
618 | case OMAP_DSS_VIDEO1: | 674 | case OMAP_DSS_VIDEO1: |
619 | return 0x0588; | 675 | return 0x0588; |
620 | case OMAP_DSS_VIDEO2: | 676 | case OMAP_DSS_VIDEO2: |
@@ -623,6 +679,7 @@ static inline u16 DISPC_ACCU2_1_OFFSET(enum omap_plane plane) | |||
623 | return 0x042C; | 679 | return 0x042C; |
624 | default: | 680 | default: |
625 | BUG(); | 681 | BUG(); |
682 | return 0; | ||
626 | } | 683 | } |
627 | } | 684 | } |
628 | 685 | ||
@@ -632,6 +689,7 @@ static inline u16 DISPC_FIR_COEF_H_OFFSET(enum omap_plane plane, u16 i) | |||
632 | switch (plane) { | 689 | switch (plane) { |
633 | case OMAP_DSS_GFX: | 690 | case OMAP_DSS_GFX: |
634 | BUG(); | 691 | BUG(); |
692 | return 0; | ||
635 | case OMAP_DSS_VIDEO1: | 693 | case OMAP_DSS_VIDEO1: |
636 | case OMAP_DSS_VIDEO2: | 694 | case OMAP_DSS_VIDEO2: |
637 | return 0x0034 + i * 0x8; | 695 | return 0x0034 + i * 0x8; |
@@ -639,6 +697,7 @@ static inline u16 DISPC_FIR_COEF_H_OFFSET(enum omap_plane plane, u16 i) | |||
639 | return 0x0010 + i * 0x8; | 697 | return 0x0010 + i * 0x8; |
640 | default: | 698 | default: |
641 | BUG(); | 699 | BUG(); |
700 | return 0; | ||
642 | } | 701 | } |
643 | } | 702 | } |
644 | 703 | ||
@@ -648,6 +707,7 @@ static inline u16 DISPC_FIR_COEF_H2_OFFSET(enum omap_plane plane, u16 i) | |||
648 | switch (plane) { | 707 | switch (plane) { |
649 | case OMAP_DSS_GFX: | 708 | case OMAP_DSS_GFX: |
650 | BUG(); | 709 | BUG(); |
710 | return 0; | ||
651 | case OMAP_DSS_VIDEO1: | 711 | case OMAP_DSS_VIDEO1: |
652 | return 0x058C + i * 0x8; | 712 | return 0x058C + i * 0x8; |
653 | case OMAP_DSS_VIDEO2: | 713 | case OMAP_DSS_VIDEO2: |
@@ -656,6 +716,7 @@ static inline u16 DISPC_FIR_COEF_H2_OFFSET(enum omap_plane plane, u16 i) | |||
656 | return 0x0430 + i * 0x8; | 716 | return 0x0430 + i * 0x8; |
657 | default: | 717 | default: |
658 | BUG(); | 718 | BUG(); |
719 | return 0; | ||
659 | } | 720 | } |
660 | } | 721 | } |
661 | 722 | ||
@@ -665,6 +726,7 @@ static inline u16 DISPC_FIR_COEF_HV_OFFSET(enum omap_plane plane, u16 i) | |||
665 | switch (plane) { | 726 | switch (plane) { |
666 | case OMAP_DSS_GFX: | 727 | case OMAP_DSS_GFX: |
667 | BUG(); | 728 | BUG(); |
729 | return 0; | ||
668 | case OMAP_DSS_VIDEO1: | 730 | case OMAP_DSS_VIDEO1: |
669 | case OMAP_DSS_VIDEO2: | 731 | case OMAP_DSS_VIDEO2: |
670 | return 0x0038 + i * 0x8; | 732 | return 0x0038 + i * 0x8; |
@@ -672,6 +734,7 @@ static inline u16 DISPC_FIR_COEF_HV_OFFSET(enum omap_plane plane, u16 i) | |||
672 | return 0x0014 + i * 0x8; | 734 | return 0x0014 + i * 0x8; |
673 | default: | 735 | default: |
674 | BUG(); | 736 | BUG(); |
737 | return 0; | ||
675 | } | 738 | } |
676 | } | 739 | } |
677 | 740 | ||
@@ -681,6 +744,7 @@ static inline u16 DISPC_FIR_COEF_HV2_OFFSET(enum omap_plane plane, u16 i) | |||
681 | switch (plane) { | 744 | switch (plane) { |
682 | case OMAP_DSS_GFX: | 745 | case OMAP_DSS_GFX: |
683 | BUG(); | 746 | BUG(); |
747 | return 0; | ||
684 | case OMAP_DSS_VIDEO1: | 748 | case OMAP_DSS_VIDEO1: |
685 | return 0x0590 + i * 8; | 749 | return 0x0590 + i * 8; |
686 | case OMAP_DSS_VIDEO2: | 750 | case OMAP_DSS_VIDEO2: |
@@ -689,6 +753,7 @@ static inline u16 DISPC_FIR_COEF_HV2_OFFSET(enum omap_plane plane, u16 i) | |||
689 | return 0x0434 + i * 0x8; | 753 | return 0x0434 + i * 0x8; |
690 | default: | 754 | default: |
691 | BUG(); | 755 | BUG(); |
756 | return 0; | ||
692 | } | 757 | } |
693 | } | 758 | } |
694 | 759 | ||
@@ -698,12 +763,14 @@ static inline u16 DISPC_CONV_COEF_OFFSET(enum omap_plane plane, u16 i) | |||
698 | switch (plane) { | 763 | switch (plane) { |
699 | case OMAP_DSS_GFX: | 764 | case OMAP_DSS_GFX: |
700 | BUG(); | 765 | BUG(); |
766 | return 0; | ||
701 | case OMAP_DSS_VIDEO1: | 767 | case OMAP_DSS_VIDEO1: |
702 | case OMAP_DSS_VIDEO2: | 768 | case OMAP_DSS_VIDEO2: |
703 | case OMAP_DSS_VIDEO3: | 769 | case OMAP_DSS_VIDEO3: |
704 | return 0x0074 + i * 0x4; | 770 | return 0x0074 + i * 0x4; |
705 | default: | 771 | default: |
706 | BUG(); | 772 | BUG(); |
773 | return 0; | ||
707 | } | 774 | } |
708 | } | 775 | } |
709 | 776 | ||
@@ -713,6 +780,7 @@ static inline u16 DISPC_FIR_COEF_V_OFFSET(enum omap_plane plane, u16 i) | |||
713 | switch (plane) { | 780 | switch (plane) { |
714 | case OMAP_DSS_GFX: | 781 | case OMAP_DSS_GFX: |
715 | BUG(); | 782 | BUG(); |
783 | return 0; | ||
716 | case OMAP_DSS_VIDEO1: | 784 | case OMAP_DSS_VIDEO1: |
717 | return 0x0124 + i * 0x4; | 785 | return 0x0124 + i * 0x4; |
718 | case OMAP_DSS_VIDEO2: | 786 | case OMAP_DSS_VIDEO2: |
@@ -721,6 +789,7 @@ static inline u16 DISPC_FIR_COEF_V_OFFSET(enum omap_plane plane, u16 i) | |||
721 | return 0x0050 + i * 0x4; | 789 | return 0x0050 + i * 0x4; |
722 | default: | 790 | default: |
723 | BUG(); | 791 | BUG(); |
792 | return 0; | ||
724 | } | 793 | } |
725 | } | 794 | } |
726 | 795 | ||
@@ -730,6 +799,7 @@ static inline u16 DISPC_FIR_COEF_V2_OFFSET(enum omap_plane plane, u16 i) | |||
730 | switch (plane) { | 799 | switch (plane) { |
731 | case OMAP_DSS_GFX: | 800 | case OMAP_DSS_GFX: |
732 | BUG(); | 801 | BUG(); |
802 | return 0; | ||
733 | case OMAP_DSS_VIDEO1: | 803 | case OMAP_DSS_VIDEO1: |
734 | return 0x05CC + i * 0x4; | 804 | return 0x05CC + i * 0x4; |
735 | case OMAP_DSS_VIDEO2: | 805 | case OMAP_DSS_VIDEO2: |
@@ -738,6 +808,7 @@ static inline u16 DISPC_FIR_COEF_V2_OFFSET(enum omap_plane plane, u16 i) | |||
738 | return 0x0470 + i * 0x4; | 808 | return 0x0470 + i * 0x4; |
739 | default: | 809 | default: |
740 | BUG(); | 810 | BUG(); |
811 | return 0; | ||
741 | } | 812 | } |
742 | } | 813 | } |
743 | 814 | ||
@@ -754,6 +825,7 @@ static inline u16 DISPC_PRELOAD_OFFSET(enum omap_plane plane) | |||
754 | return 0x00A0; | 825 | return 0x00A0; |
755 | default: | 826 | default: |
756 | BUG(); | 827 | BUG(); |
828 | return 0; | ||
757 | } | 829 | } |
758 | } | 830 | } |
759 | #endif | 831 | #endif |
diff --git a/drivers/video/omap2/dss/display.c b/drivers/video/omap2/dss/display.c index faf7d91c4a84..249010630370 100644 --- a/drivers/video/omap2/dss/display.c +++ b/drivers/video/omap2/dss/display.c | |||
@@ -304,6 +304,7 @@ int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev) | |||
304 | return 24; | 304 | return 24; |
305 | default: | 305 | default: |
306 | BUG(); | 306 | BUG(); |
307 | return 0; | ||
307 | } | 308 | } |
308 | } | 309 | } |
309 | EXPORT_SYMBOL(omapdss_default_get_recommended_bpp); | 310 | EXPORT_SYMBOL(omapdss_default_get_recommended_bpp); |
@@ -347,6 +348,7 @@ bool dss_use_replication(struct omap_dss_device *dssdev, | |||
347 | break; | 348 | break; |
348 | default: | 349 | default: |
349 | BUG(); | 350 | BUG(); |
351 | return false; | ||
350 | } | 352 | } |
351 | 353 | ||
352 | return bpp > 16; | 354 | return bpp > 16; |
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index f2d835fc4dc3..ec363d8390ed 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c | |||
@@ -446,6 +446,7 @@ u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt) | |||
446 | return 16; | 446 | return 16; |
447 | default: | 447 | default: |
448 | BUG(); | 448 | BUG(); |
449 | return 0; | ||
449 | } | 450 | } |
450 | } | 451 | } |
451 | 452 | ||
@@ -2003,6 +2004,7 @@ static unsigned dsi_get_line_buf_size(struct platform_device *dsidev) | |||
2003 | return 1365 * 3; /* 1365x24 bits */ | 2004 | return 1365 * 3; /* 1365x24 bits */ |
2004 | default: | 2005 | default: |
2005 | BUG(); | 2006 | BUG(); |
2007 | return 0; | ||
2006 | } | 2008 | } |
2007 | } | 2009 | } |
2008 | 2010 | ||
@@ -2415,6 +2417,7 @@ static void dsi_config_tx_fifo(struct platform_device *dsidev, | |||
2415 | if (add + size > 4) { | 2417 | if (add + size > 4) { |
2416 | DSSERR("Illegal FIFO configuration\n"); | 2418 | DSSERR("Illegal FIFO configuration\n"); |
2417 | BUG(); | 2419 | BUG(); |
2420 | return; | ||
2418 | } | 2421 | } |
2419 | 2422 | ||
2420 | v = FLD_VAL(add, 2, 0) | FLD_VAL(size, 7, 4); | 2423 | v = FLD_VAL(add, 2, 0) | FLD_VAL(size, 7, 4); |
@@ -2447,6 +2450,7 @@ static void dsi_config_rx_fifo(struct platform_device *dsidev, | |||
2447 | if (add + size > 4) { | 2450 | if (add + size > 4) { |
2448 | DSSERR("Illegal FIFO configuration\n"); | 2451 | DSSERR("Illegal FIFO configuration\n"); |
2449 | BUG(); | 2452 | BUG(); |
2453 | return; | ||
2450 | } | 2454 | } |
2451 | 2455 | ||
2452 | v = FLD_VAL(add, 2, 0) | FLD_VAL(size, 7, 4); | 2456 | v = FLD_VAL(add, 2, 0) | FLD_VAL(size, 7, 4); |
@@ -2588,6 +2592,7 @@ static int dsi_sync_vc(struct platform_device *dsidev, int channel) | |||
2588 | return dsi_sync_vc_l4(dsidev, channel); | 2592 | return dsi_sync_vc_l4(dsidev, channel); |
2589 | default: | 2593 | default: |
2590 | BUG(); | 2594 | BUG(); |
2595 | return -EINVAL; | ||
2591 | } | 2596 | } |
2592 | } | 2597 | } |
2593 | 2598 | ||
@@ -3156,6 +3161,7 @@ static int dsi_vc_generic_send_read_request(struct omap_dss_device *dssdev, | |||
3156 | data = reqdata[0] | (reqdata[1] << 8); | 3161 | data = reqdata[0] | (reqdata[1] << 8); |
3157 | } else { | 3162 | } else { |
3158 | BUG(); | 3163 | BUG(); |
3164 | return -EINVAL; | ||
3159 | } | 3165 | } |
3160 | 3166 | ||
3161 | r = dsi_vc_send_short(dsidev, channel, data_type, data, 0); | 3167 | r = dsi_vc_send_short(dsidev, channel, data_type, data, 0); |
@@ -3270,7 +3276,6 @@ static int dsi_vc_read_rx_fifo(struct platform_device *dsidev, int channel, | |||
3270 | goto err; | 3276 | goto err; |
3271 | } | 3277 | } |
3272 | 3278 | ||
3273 | BUG(); | ||
3274 | err: | 3279 | err: |
3275 | DSSERR("dsi_vc_read_rx_fifo(ch %d type %s) failed\n", channel, | 3280 | DSSERR("dsi_vc_read_rx_fifo(ch %d type %s) failed\n", channel, |
3276 | type == DSS_DSI_CONTENT_GENERIC ? "GENERIC" : "DCS"); | 3281 | type == DSS_DSI_CONTENT_GENERIC ? "GENERIC" : "DCS"); |
@@ -3879,6 +3884,7 @@ static int dsi_proto_config(struct omap_dss_device *dssdev) | |||
3879 | break; | 3884 | break; |
3880 | default: | 3885 | default: |
3881 | BUG(); | 3886 | BUG(); |
3887 | return -EINVAL; | ||
3882 | } | 3888 | } |
3883 | 3889 | ||
3884 | r = dsi_read_reg(dsidev, DSI_CTRL); | 3890 | r = dsi_read_reg(dsidev, DSI_CTRL); |
@@ -4119,6 +4125,7 @@ int dsi_enable_video_output(struct omap_dss_device *dssdev, int channel) | |||
4119 | break; | 4125 | break; |
4120 | default: | 4126 | default: |
4121 | BUG(); | 4127 | BUG(); |
4128 | return -EINVAL; | ||
4122 | }; | 4129 | }; |
4123 | 4130 | ||
4124 | dsi_if_enable(dsidev, false); | 4131 | dsi_if_enable(dsidev, false); |
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c index 2183f840a7ac..6ea1ff149f6f 100644 --- a/drivers/video/omap2/dss/dss.c +++ b/drivers/video/omap2/dss/dss.c | |||
@@ -325,6 +325,7 @@ void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src) | |||
325 | break; | 325 | break; |
326 | default: | 326 | default: |
327 | BUG(); | 327 | BUG(); |
328 | return; | ||
328 | } | 329 | } |
329 | 330 | ||
330 | dss_feat_get_reg_field(FEAT_REG_DISPC_CLK_SWITCH, &start, &end); | 331 | dss_feat_get_reg_field(FEAT_REG_DISPC_CLK_SWITCH, &start, &end); |
@@ -358,6 +359,7 @@ void dss_select_dsi_clk_source(int dsi_module, | |||
358 | break; | 359 | break; |
359 | default: | 360 | default: |
360 | BUG(); | 361 | BUG(); |
362 | return; | ||
361 | } | 363 | } |
362 | 364 | ||
363 | pos = dsi_module == 0 ? 1 : 10; | 365 | pos = dsi_module == 0 ? 1 : 10; |
@@ -393,6 +395,7 @@ void dss_select_lcd_clk_source(enum omap_channel channel, | |||
393 | break; | 395 | break; |
394 | default: | 396 | default: |
395 | BUG(); | 397 | BUG(); |
398 | return; | ||
396 | } | 399 | } |
397 | 400 | ||
398 | pos = channel == OMAP_DSS_CHANNEL_LCD ? 0 : 12; | 401 | pos = channel == OMAP_DSS_CHANNEL_LCD ? 0 : 12; |
diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c index 178c40d3312e..1dbf1550773e 100644 --- a/drivers/video/omap2/dss/venc.c +++ b/drivers/video/omap2/dss/venc.c | |||
@@ -415,6 +415,7 @@ static const struct venc_config *venc_timings_to_config( | |||
415 | return &venc_config_ntsc_trm; | 415 | return &venc_config_ntsc_trm; |
416 | 416 | ||
417 | BUG(); | 417 | BUG(); |
418 | return NULL; | ||
418 | } | 419 | } |
419 | 420 | ||
420 | static int venc_power_on(struct omap_dss_device *dssdev) | 421 | static int venc_power_on(struct omap_dss_device *dssdev) |