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authorAxel Lin <axel.lin@ingics.com>2014-02-19 04:30:52 -0500
committerMark Brown <broonie@linaro.org>2014-03-02 22:59:45 -0500
commit85fe414d3228bdecc52366692c6f70c750f687aa (patch)
tree051111959a4184530090f2885aa22bc5a50a0cde /drivers
parent0fd73763350fee019cd35d8d4c3c384f6ee493a1 (diff)
spi: octeon: Remove struct octeon_spi_setup usage
Current code uses struct octeon_spi_setup to store max_speed_hz, chip_select and mode settings of current spi device. We can always get the same settings in octeon_spi_do_transfer() by msg->spi. So this patch removes struct octeon_spi_setup and octeon_spi_setup, octeon_spi_cleanup functions. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/spi/spi-octeon.c69
1 files changed, 7 insertions, 62 deletions
diff --git a/drivers/spi/spi-octeon.c b/drivers/spi/spi-octeon.c
index 31b41445a85e..a51458985ccf 100644
--- a/drivers/spi/spi-octeon.c
+++ b/drivers/spi/spi-octeon.c
@@ -33,12 +33,6 @@ struct octeon_spi {
33 u64 cs_enax; 33 u64 cs_enax;
34}; 34};
35 35
36struct octeon_spi_setup {
37 u32 max_speed_hz;
38 u8 chip_select;
39 u8 mode;
40};
41
42static void octeon_spi_wait_ready(struct octeon_spi *p) 36static void octeon_spi_wait_ready(struct octeon_spi *p)
43{ 37{
44 union cvmx_mpi_sts mpi_sts; 38 union cvmx_mpi_sts mpi_sts;
@@ -56,6 +50,7 @@ static int octeon_spi_do_transfer(struct octeon_spi *p,
56 struct spi_transfer *xfer, 50 struct spi_transfer *xfer,
57 bool last_xfer) 51 bool last_xfer)
58{ 52{
53 struct spi_device *spi = msg->spi;
59 union cvmx_mpi_cfg mpi_cfg; 54 union cvmx_mpi_cfg mpi_cfg;
60 union cvmx_mpi_tx mpi_tx; 55 union cvmx_mpi_tx mpi_tx;
61 unsigned int clkdiv; 56 unsigned int clkdiv;
@@ -67,16 +62,11 @@ static int octeon_spi_do_transfer(struct octeon_spi *p,
67 int len; 62 int len;
68 int i; 63 int i;
69 64
70 struct octeon_spi_setup *msg_setup = spi_get_ctldata(msg->spi); 65 mode = spi->mode;
71
72 speed_hz = msg_setup->max_speed_hz;
73 mode = msg_setup->mode;
74 cpha = mode & SPI_CPHA; 66 cpha = mode & SPI_CPHA;
75 cpol = mode & SPI_CPOL; 67 cpol = mode & SPI_CPOL;
76 68
77 if (xfer->speed_hz) 69 speed_hz = xfer->speed_hz ? : spi->max_speed_hz;
78 speed_hz = xfer->speed_hz;
79
80 if (speed_hz > OCTEON_SPI_MAX_CLOCK_HZ) 70 if (speed_hz > OCTEON_SPI_MAX_CLOCK_HZ)
81 speed_hz = OCTEON_SPI_MAX_CLOCK_HZ; 71 speed_hz = OCTEON_SPI_MAX_CLOCK_HZ;
82 72
@@ -92,8 +82,8 @@ static int octeon_spi_do_transfer(struct octeon_spi *p,
92 mpi_cfg.s.cslate = cpha ? 1 : 0; 82 mpi_cfg.s.cslate = cpha ? 1 : 0;
93 mpi_cfg.s.enable = 1; 83 mpi_cfg.s.enable = 1;
94 84
95 if (msg_setup->chip_select < 4) 85 if (spi->chip_select < 4)
96 p->cs_enax |= 1ull << (12 + msg_setup->chip_select); 86 p->cs_enax |= 1ull << (12 + spi->chip_select);
97 mpi_cfg.u64 |= p->cs_enax; 87 mpi_cfg.u64 |= p->cs_enax;
98 88
99 if (mpi_cfg.u64 != p->last_cfg) { 89 if (mpi_cfg.u64 != p->last_cfg) {
@@ -113,7 +103,7 @@ static int octeon_spi_do_transfer(struct octeon_spi *p,
113 cvmx_write_csr(p->register_base + OCTEON_SPI_DAT0 + (8 * i), d); 103 cvmx_write_csr(p->register_base + OCTEON_SPI_DAT0 + (8 * i), d);
114 } 104 }
115 mpi_tx.u64 = 0; 105 mpi_tx.u64 = 0;
116 mpi_tx.s.csid = msg_setup->chip_select; 106 mpi_tx.s.csid = spi->chip_select;
117 mpi_tx.s.leavecs = 1; 107 mpi_tx.s.leavecs = 1;
118 mpi_tx.s.txnum = tx_buf ? OCTEON_SPI_MAX_BYTES : 0; 108 mpi_tx.s.txnum = tx_buf ? OCTEON_SPI_MAX_BYTES : 0;
119 mpi_tx.s.totnum = OCTEON_SPI_MAX_BYTES; 109 mpi_tx.s.totnum = OCTEON_SPI_MAX_BYTES;
@@ -138,7 +128,7 @@ static int octeon_spi_do_transfer(struct octeon_spi *p,
138 } 128 }
139 129
140 mpi_tx.u64 = 0; 130 mpi_tx.u64 = 0;
141 mpi_tx.s.csid = msg_setup->chip_select; 131 mpi_tx.s.csid = spi->chip_select;
142 if (last_xfer) 132 if (last_xfer)
143 mpi_tx.s.leavecs = xfer->cs_change; 133 mpi_tx.s.leavecs = xfer->cs_change;
144 else 134 else
@@ -168,15 +158,6 @@ static int octeon_spi_transfer_one_message(struct spi_master *master,
168 int status = 0; 158 int status = 0;
169 struct spi_transfer *xfer; 159 struct spi_transfer *xfer;
170 160
171 /*
172 * We better have set the configuration via a call to .setup
173 * before we get here.
174 */
175 if (spi_get_ctldata(msg->spi) == NULL) {
176 status = -EINVAL;
177 goto err;
178 }
179
180 list_for_each_entry(xfer, &msg->transfers, transfer_list) { 161 list_for_each_entry(xfer, &msg->transfers, transfer_list) {
181 bool last_xfer = list_is_last(&xfer->transfer_list, 162 bool last_xfer = list_is_last(&xfer->transfer_list,
182 &msg->transfers); 163 &msg->transfers);
@@ -194,40 +175,6 @@ err:
194 return status; 175 return status;
195} 176}
196 177
197static struct octeon_spi_setup *octeon_spi_new_setup(struct spi_device *spi)
198{
199 struct octeon_spi_setup *setup = kzalloc(sizeof(*setup), GFP_KERNEL);
200 if (!setup)
201 return NULL;
202
203 setup->max_speed_hz = spi->max_speed_hz;
204 setup->chip_select = spi->chip_select;
205 setup->mode = spi->mode;
206 return setup;
207}
208
209static int octeon_spi_setup(struct spi_device *spi)
210{
211 struct octeon_spi_setup *new_setup;
212 struct octeon_spi_setup *old_setup = spi_get_ctldata(spi);
213
214 new_setup = octeon_spi_new_setup(spi);
215 if (!new_setup)
216 return -ENOMEM;
217
218 spi_set_ctldata(spi, new_setup);
219 kfree(old_setup);
220
221 return 0;
222}
223
224static void octeon_spi_cleanup(struct spi_device *spi)
225{
226 struct octeon_spi_setup *old_setup = spi_get_ctldata(spi);
227 spi_set_ctldata(spi, NULL);
228 kfree(old_setup);
229}
230
231static int octeon_spi_probe(struct platform_device *pdev) 178static int octeon_spi_probe(struct platform_device *pdev)
232{ 179{
233 struct resource *res_mem; 180 struct resource *res_mem;
@@ -265,8 +212,6 @@ static int octeon_spi_probe(struct platform_device *pdev)
265 SPI_LSB_FIRST | 212 SPI_LSB_FIRST |
266 SPI_3WIRE; 213 SPI_3WIRE;
267 214
268 master->setup = octeon_spi_setup;
269 master->cleanup = octeon_spi_cleanup;
270 master->transfer_one_message = octeon_spi_transfer_one_message; 215 master->transfer_one_message = octeon_spi_transfer_one_message;
271 master->bits_per_word_mask = SPI_BPW_MASK(8); 216 master->bits_per_word_mask = SPI_BPW_MASK(8);
272 217