diff options
author | Ira Snyder <iws@ovro.caltech.edu> | 2009-09-08 20:53:04 -0400 |
---|---|---|
committer | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 20:53:04 -0400 |
commit | e6c7ecb64e08ef346cb7062b4a5421f00bc602bd (patch) | |
tree | 73424d223391302a9a16df65378d78f25fd05929 /drivers | |
parent | 162b96e63e518aa6ff029ce23de12d7f027483bf (diff) |
fsldma: split apart external pause and request count features
When using the Freescale DMA controller in external control mode, both the
request count and external pause bits need to be setup correctly. This was
being done with the same function.
The 83xx controller lacks the external pause feature, but has a similar
feature called external start. This feature requires that the request count
bits be setup correctly.
Split the function into two parts, to make it possible to use the external
start feature on the 83xx controller.
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/dma/fsldma.c | 45 | ||||
-rw-r--r-- | drivers/dma/fsldma.h | 3 |
2 files changed, 31 insertions, 17 deletions
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c index 73dd74823195..7a0cb6064f83 100644 --- a/drivers/dma/fsldma.c +++ b/drivers/dma/fsldma.c | |||
@@ -280,28 +280,40 @@ static void fsl_chan_set_dest_loop_size(struct fsl_dma_chan *fsl_chan, int size) | |||
280 | } | 280 | } |
281 | 281 | ||
282 | /** | 282 | /** |
283 | * fsl_chan_toggle_ext_pause - Toggle channel external pause status | 283 | * fsl_chan_set_request_count - Set DMA Request Count for external control |
284 | * @fsl_chan : Freescale DMA channel | 284 | * @fsl_chan : Freescale DMA channel |
285 | * @size : Pause control size, 0 for disable external pause control. | 285 | * @size : Number of bytes to transfer in a single request |
286 | * The maximum is 1024. | 286 | * |
287 | * The Freescale DMA channel can be controlled by the external signal DREQ#. | ||
288 | * The DMA request count is how many bytes are allowed to transfer before | ||
289 | * pausing the channel, after which a new assertion of DREQ# resumes channel | ||
290 | * operation. | ||
287 | * | 291 | * |
288 | * The Freescale DMA channel can be controlled by the external | 292 | * A size of 0 disables external pause control. The maximum size is 1024. |
289 | * signal DREQ#. The pause control size is how many bytes are allowed | ||
290 | * to transfer before pausing the channel, after which a new assertion | ||
291 | * of DREQ# resumes channel operation. | ||
292 | */ | 293 | */ |
293 | static void fsl_chan_toggle_ext_pause(struct fsl_dma_chan *fsl_chan, int size) | 294 | static void fsl_chan_set_request_count(struct fsl_dma_chan *fsl_chan, int size) |
294 | { | 295 | { |
295 | if (size > 1024) | 296 | BUG_ON(size > 1024); |
296 | return; | 297 | DMA_OUT(fsl_chan, &fsl_chan->reg_base->mr, |
298 | DMA_IN(fsl_chan, &fsl_chan->reg_base->mr, 32) | ||
299 | | ((__ilog2(size) << 24) & 0x0f000000), | ||
300 | 32); | ||
301 | } | ||
297 | 302 | ||
298 | if (size) { | 303 | /** |
299 | DMA_OUT(fsl_chan, &fsl_chan->reg_base->mr, | 304 | * fsl_chan_toggle_ext_pause - Toggle channel external pause status |
300 | DMA_IN(fsl_chan, &fsl_chan->reg_base->mr, 32) | 305 | * @fsl_chan : Freescale DMA channel |
301 | | ((__ilog2(size) << 24) & 0x0f000000), | 306 | * @enable : 0 is disabled, 1 is enabled. |
302 | 32); | 307 | * |
308 | * The Freescale DMA channel can be controlled by the external signal DREQ#. | ||
309 | * The DMA Request Count feature should be used in addition to this feature | ||
310 | * to set the number of bytes to transfer before pausing the channel. | ||
311 | */ | ||
312 | static void fsl_chan_toggle_ext_pause(struct fsl_dma_chan *fsl_chan, int enable) | ||
313 | { | ||
314 | if (enable) | ||
303 | fsl_chan->feature |= FSL_DMA_CHAN_PAUSE_EXT; | 315 | fsl_chan->feature |= FSL_DMA_CHAN_PAUSE_EXT; |
304 | } else | 316 | else |
305 | fsl_chan->feature &= ~FSL_DMA_CHAN_PAUSE_EXT; | 317 | fsl_chan->feature &= ~FSL_DMA_CHAN_PAUSE_EXT; |
306 | } | 318 | } |
307 | 319 | ||
@@ -885,6 +897,7 @@ static int __devinit fsl_dma_chan_probe(struct fsl_dma_device *fdev, | |||
885 | new_fsl_chan->toggle_ext_start = fsl_chan_toggle_ext_start; | 897 | new_fsl_chan->toggle_ext_start = fsl_chan_toggle_ext_start; |
886 | new_fsl_chan->set_src_loop_size = fsl_chan_set_src_loop_size; | 898 | new_fsl_chan->set_src_loop_size = fsl_chan_set_src_loop_size; |
887 | new_fsl_chan->set_dest_loop_size = fsl_chan_set_dest_loop_size; | 899 | new_fsl_chan->set_dest_loop_size = fsl_chan_set_dest_loop_size; |
900 | new_fsl_chan->set_request_count = fsl_chan_set_request_count; | ||
888 | } | 901 | } |
889 | 902 | ||
890 | spin_lock_init(&new_fsl_chan->desc_lock); | 903 | spin_lock_init(&new_fsl_chan->desc_lock); |
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h index 4493afed53f0..0df14cbb8ca3 100644 --- a/drivers/dma/fsldma.h +++ b/drivers/dma/fsldma.h | |||
@@ -144,10 +144,11 @@ struct fsl_dma_chan { | |||
144 | struct tasklet_struct tasklet; | 144 | struct tasklet_struct tasklet; |
145 | u32 feature; | 145 | u32 feature; |
146 | 146 | ||
147 | void (*toggle_ext_pause)(struct fsl_dma_chan *fsl_chan, int size); | 147 | void (*toggle_ext_pause)(struct fsl_dma_chan *fsl_chan, int enable); |
148 | void (*toggle_ext_start)(struct fsl_dma_chan *fsl_chan, int enable); | 148 | void (*toggle_ext_start)(struct fsl_dma_chan *fsl_chan, int enable); |
149 | void (*set_src_loop_size)(struct fsl_dma_chan *fsl_chan, int size); | 149 | void (*set_src_loop_size)(struct fsl_dma_chan *fsl_chan, int size); |
150 | void (*set_dest_loop_size)(struct fsl_dma_chan *fsl_chan, int size); | 150 | void (*set_dest_loop_size)(struct fsl_dma_chan *fsl_chan, int size); |
151 | void (*set_request_count)(struct fsl_dma_chan *fsl_chan, int size); | ||
151 | }; | 152 | }; |
152 | 153 | ||
153 | #define to_fsl_chan(chan) container_of(chan, struct fsl_dma_chan, common) | 154 | #define to_fsl_chan(chan) container_of(chan, struct fsl_dma_chan, common) |