diff options
author | Roland Dreier <rolandd@cisco.com> | 2007-10-14 23:40:27 -0400 |
---|---|---|
committer | Roland Dreier <rolandd@cisco.com> | 2007-10-15 23:17:27 -0400 |
commit | ab8403c424a35364a3a2c753f7c5917fcbb4d809 (patch) | |
tree | 9cbcfbc4ae9f15b05272be1fbdc7e028b86f297e /drivers | |
parent | 744ea922c901b6557bffe8bff7af1ef18181f370 (diff) |
IB/mthca: Avoid alignment traps when writing doorbells
Architectures such as ia64 see alignment traps when doing a 64-bit
read from __be32 doorbell[2] arrays to do doorbell writes in
mthca_write64(). Fix this by just passing the two halves of the
doorbell value into mthca_write64(). This actually improves the
generated code by allowing the compiler to see what's going on better.
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_cq.c | 53 | ||||
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_doorbell.h | 13 | ||||
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_eq.c | 21 | ||||
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_qp.c | 45 | ||||
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_srq.c | 11 |
5 files changed, 47 insertions, 96 deletions
diff --git a/drivers/infiniband/hw/mthca/mthca_cq.c b/drivers/infiniband/hw/mthca/mthca_cq.c index be6e1e03bdab..6bd9f1393349 100644 --- a/drivers/infiniband/hw/mthca/mthca_cq.c +++ b/drivers/infiniband/hw/mthca/mthca_cq.c | |||
@@ -204,16 +204,11 @@ static void dump_cqe(struct mthca_dev *dev, void *cqe_ptr) | |||
204 | static inline void update_cons_index(struct mthca_dev *dev, struct mthca_cq *cq, | 204 | static inline void update_cons_index(struct mthca_dev *dev, struct mthca_cq *cq, |
205 | int incr) | 205 | int incr) |
206 | { | 206 | { |
207 | __be32 doorbell[2]; | ||
208 | |||
209 | if (mthca_is_memfree(dev)) { | 207 | if (mthca_is_memfree(dev)) { |
210 | *cq->set_ci_db = cpu_to_be32(cq->cons_index); | 208 | *cq->set_ci_db = cpu_to_be32(cq->cons_index); |
211 | wmb(); | 209 | wmb(); |
212 | } else { | 210 | } else { |
213 | doorbell[0] = cpu_to_be32(MTHCA_TAVOR_CQ_DB_INC_CI | cq->cqn); | 211 | mthca_write64(MTHCA_TAVOR_CQ_DB_INC_CI | cq->cqn, incr - 1, |
214 | doorbell[1] = cpu_to_be32(incr - 1); | ||
215 | |||
216 | mthca_write64(doorbell, | ||
217 | dev->kar + MTHCA_CQ_DOORBELL, | 212 | dev->kar + MTHCA_CQ_DOORBELL, |
218 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); | 213 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); |
219 | /* | 214 | /* |
@@ -731,17 +726,12 @@ repoll: | |||
731 | 726 | ||
732 | int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags) | 727 | int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags) |
733 | { | 728 | { |
734 | __be32 doorbell[2]; | 729 | u32 dbhi = ((flags & IB_CQ_SOLICITED_MASK) == IB_CQ_SOLICITED ? |
730 | MTHCA_TAVOR_CQ_DB_REQ_NOT_SOL : | ||
731 | MTHCA_TAVOR_CQ_DB_REQ_NOT) | | ||
732 | to_mcq(cq)->cqn; | ||
735 | 733 | ||
736 | doorbell[0] = cpu_to_be32(((flags & IB_CQ_SOLICITED_MASK) == | 734 | mthca_write64(dbhi, 0xffffffff, to_mdev(cq->device)->kar + MTHCA_CQ_DOORBELL, |
737 | IB_CQ_SOLICITED ? | ||
738 | MTHCA_TAVOR_CQ_DB_REQ_NOT_SOL : | ||
739 | MTHCA_TAVOR_CQ_DB_REQ_NOT) | | ||
740 | to_mcq(cq)->cqn); | ||
741 | doorbell[1] = (__force __be32) 0xffffffff; | ||
742 | |||
743 | mthca_write64(doorbell, | ||
744 | to_mdev(cq->device)->kar + MTHCA_CQ_DOORBELL, | ||
745 | MTHCA_GET_DOORBELL_LOCK(&to_mdev(cq->device)->doorbell_lock)); | 735 | MTHCA_GET_DOORBELL_LOCK(&to_mdev(cq->device)->doorbell_lock)); |
746 | 736 | ||
747 | return 0; | 737 | return 0; |
@@ -750,19 +740,16 @@ int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags) | |||
750 | int mthca_arbel_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags) | 740 | int mthca_arbel_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags) |
751 | { | 741 | { |
752 | struct mthca_cq *cq = to_mcq(ibcq); | 742 | struct mthca_cq *cq = to_mcq(ibcq); |
753 | __be32 doorbell[2]; | 743 | __be32 db_rec[2]; |
754 | u32 sn; | 744 | u32 dbhi; |
755 | __be32 ci; | 745 | u32 sn = cq->arm_sn & 3; |
756 | |||
757 | sn = cq->arm_sn & 3; | ||
758 | ci = cpu_to_be32(cq->cons_index); | ||
759 | 746 | ||
760 | doorbell[0] = ci; | 747 | db_rec[0] = cpu_to_be32(cq->cons_index); |
761 | doorbell[1] = cpu_to_be32((cq->cqn << 8) | (2 << 5) | (sn << 3) | | 748 | db_rec[1] = cpu_to_be32((cq->cqn << 8) | (2 << 5) | (sn << 3) | |
762 | ((flags & IB_CQ_SOLICITED_MASK) == | 749 | ((flags & IB_CQ_SOLICITED_MASK) == |
763 | IB_CQ_SOLICITED ? 1 : 2)); | 750 | IB_CQ_SOLICITED ? 1 : 2)); |
764 | 751 | ||
765 | mthca_write_db_rec(doorbell, cq->arm_db); | 752 | mthca_write_db_rec(db_rec, cq->arm_db); |
766 | 753 | ||
767 | /* | 754 | /* |
768 | * Make sure that the doorbell record in host memory is | 755 | * Make sure that the doorbell record in host memory is |
@@ -770,14 +757,12 @@ int mthca_arbel_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags) | |||
770 | */ | 757 | */ |
771 | wmb(); | 758 | wmb(); |
772 | 759 | ||
773 | doorbell[0] = cpu_to_be32((sn << 28) | | 760 | dbhi = (sn << 28) | |
774 | ((flags & IB_CQ_SOLICITED_MASK) == IB_CQ_SOLICITED ? | 761 | ((flags & IB_CQ_SOLICITED_MASK) == IB_CQ_SOLICITED ? |
775 | MTHCA_ARBEL_CQ_DB_REQ_NOT_SOL : | 762 | MTHCA_ARBEL_CQ_DB_REQ_NOT_SOL : |
776 | MTHCA_ARBEL_CQ_DB_REQ_NOT) | | 763 | MTHCA_ARBEL_CQ_DB_REQ_NOT) | cq->cqn; |
777 | cq->cqn); | ||
778 | doorbell[1] = ci; | ||
779 | 764 | ||
780 | mthca_write64(doorbell, | 765 | mthca_write64(dbhi, cq->cons_index, |
781 | to_mdev(ibcq->device)->kar + MTHCA_CQ_DOORBELL, | 766 | to_mdev(ibcq->device)->kar + MTHCA_CQ_DOORBELL, |
782 | MTHCA_GET_DOORBELL_LOCK(&to_mdev(ibcq->device)->doorbell_lock)); | 767 | MTHCA_GET_DOORBELL_LOCK(&to_mdev(ibcq->device)->doorbell_lock)); |
783 | 768 | ||
diff --git a/drivers/infiniband/hw/mthca/mthca_doorbell.h b/drivers/infiniband/hw/mthca/mthca_doorbell.h index dd9a44d170c9..b374dc395be1 100644 --- a/drivers/infiniband/hw/mthca/mthca_doorbell.h +++ b/drivers/infiniband/hw/mthca/mthca_doorbell.h | |||
@@ -58,10 +58,10 @@ static inline void mthca_write64_raw(__be64 val, void __iomem *dest) | |||
58 | __raw_writeq((__force u64) val, dest); | 58 | __raw_writeq((__force u64) val, dest); |
59 | } | 59 | } |
60 | 60 | ||
61 | static inline void mthca_write64(__be32 val[2], void __iomem *dest, | 61 | static inline void mthca_write64(u32 hi, u32 lo, void __iomem *dest, |
62 | spinlock_t *doorbell_lock) | 62 | spinlock_t *doorbell_lock) |
63 | { | 63 | { |
64 | __raw_writeq(*(u64 *) val, dest); | 64 | __raw_writeq((__force u64) cpu_to_be64((u64) hi << 32 | lo), dest); |
65 | } | 65 | } |
66 | 66 | ||
67 | static inline void mthca_write_db_rec(__be32 val[2], __be32 *db) | 67 | static inline void mthca_write_db_rec(__be32 val[2], __be32 *db) |
@@ -87,14 +87,17 @@ static inline void mthca_write64_raw(__be64 val, void __iomem *dest) | |||
87 | __raw_writel(((__force u32 *) &val)[1], dest + 4); | 87 | __raw_writel(((__force u32 *) &val)[1], dest + 4); |
88 | } | 88 | } |
89 | 89 | ||
90 | static inline void mthca_write64(__be32 val[2], void __iomem *dest, | 90 | static inline void mthca_write64(u32 hi, u32 lo, void __iomem *dest, |
91 | spinlock_t *doorbell_lock) | 91 | spinlock_t *doorbell_lock) |
92 | { | 92 | { |
93 | unsigned long flags; | 93 | unsigned long flags; |
94 | 94 | ||
95 | hi = (__force u32) cpu_to_be32(hi); | ||
96 | lo = (__force u32) cpu_to_be32(lo); | ||
97 | |||
95 | spin_lock_irqsave(doorbell_lock, flags); | 98 | spin_lock_irqsave(doorbell_lock, flags); |
96 | __raw_writel((__force u32) val[0], dest); | 99 | __raw_writel(hi, dest); |
97 | __raw_writel((__force u32) val[1], dest + 4); | 100 | __raw_writel(lo, dest + 4); |
98 | spin_unlock_irqrestore(doorbell_lock, flags); | 101 | spin_unlock_irqrestore(doorbell_lock, flags); |
99 | } | 102 | } |
100 | 103 | ||
diff --git a/drivers/infiniband/hw/mthca/mthca_eq.c b/drivers/infiniband/hw/mthca/mthca_eq.c index 8592b26dc4e1..b29de51b7f35 100644 --- a/drivers/infiniband/hw/mthca/mthca_eq.c +++ b/drivers/infiniband/hw/mthca/mthca_eq.c | |||
@@ -173,11 +173,6 @@ static inline u64 async_mask(struct mthca_dev *dev) | |||
173 | 173 | ||
174 | static inline void tavor_set_eq_ci(struct mthca_dev *dev, struct mthca_eq *eq, u32 ci) | 174 | static inline void tavor_set_eq_ci(struct mthca_dev *dev, struct mthca_eq *eq, u32 ci) |
175 | { | 175 | { |
176 | __be32 doorbell[2]; | ||
177 | |||
178 | doorbell[0] = cpu_to_be32(MTHCA_EQ_DB_SET_CI | eq->eqn); | ||
179 | doorbell[1] = cpu_to_be32(ci & (eq->nent - 1)); | ||
180 | |||
181 | /* | 176 | /* |
182 | * This barrier makes sure that all updates to ownership bits | 177 | * This barrier makes sure that all updates to ownership bits |
183 | * done by set_eqe_hw() hit memory before the consumer index | 178 | * done by set_eqe_hw() hit memory before the consumer index |
@@ -187,7 +182,7 @@ static inline void tavor_set_eq_ci(struct mthca_dev *dev, struct mthca_eq *eq, u | |||
187 | * having set_eqe_hw() overwrite the owner field. | 182 | * having set_eqe_hw() overwrite the owner field. |
188 | */ | 183 | */ |
189 | wmb(); | 184 | wmb(); |
190 | mthca_write64(doorbell, | 185 | mthca_write64(MTHCA_EQ_DB_SET_CI | eq->eqn, ci & (eq->nent - 1), |
191 | dev->kar + MTHCA_EQ_DOORBELL, | 186 | dev->kar + MTHCA_EQ_DOORBELL, |
192 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); | 187 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); |
193 | } | 188 | } |
@@ -212,12 +207,7 @@ static inline void set_eq_ci(struct mthca_dev *dev, struct mthca_eq *eq, u32 ci) | |||
212 | 207 | ||
213 | static inline void tavor_eq_req_not(struct mthca_dev *dev, int eqn) | 208 | static inline void tavor_eq_req_not(struct mthca_dev *dev, int eqn) |
214 | { | 209 | { |
215 | __be32 doorbell[2]; | 210 | mthca_write64(MTHCA_EQ_DB_REQ_NOT | eqn, 0, |
216 | |||
217 | doorbell[0] = cpu_to_be32(MTHCA_EQ_DB_REQ_NOT | eqn); | ||
218 | doorbell[1] = 0; | ||
219 | |||
220 | mthca_write64(doorbell, | ||
221 | dev->kar + MTHCA_EQ_DOORBELL, | 211 | dev->kar + MTHCA_EQ_DOORBELL, |
222 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); | 212 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); |
223 | } | 213 | } |
@@ -230,12 +220,7 @@ static inline void arbel_eq_req_not(struct mthca_dev *dev, u32 eqn_mask) | |||
230 | static inline void disarm_cq(struct mthca_dev *dev, int eqn, int cqn) | 220 | static inline void disarm_cq(struct mthca_dev *dev, int eqn, int cqn) |
231 | { | 221 | { |
232 | if (!mthca_is_memfree(dev)) { | 222 | if (!mthca_is_memfree(dev)) { |
233 | __be32 doorbell[2]; | 223 | mthca_write64(MTHCA_EQ_DB_DISARM_CQ | eqn, cqn, |
234 | |||
235 | doorbell[0] = cpu_to_be32(MTHCA_EQ_DB_DISARM_CQ | eqn); | ||
236 | doorbell[1] = cpu_to_be32(cqn); | ||
237 | |||
238 | mthca_write64(doorbell, | ||
239 | dev->kar + MTHCA_EQ_DOORBELL, | 224 | dev->kar + MTHCA_EQ_DOORBELL, |
240 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); | 225 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); |
241 | } | 226 | } |
diff --git a/drivers/infiniband/hw/mthca/mthca_qp.c b/drivers/infiniband/hw/mthca/mthca_qp.c index df01b2026a64..0e5461c65731 100644 --- a/drivers/infiniband/hw/mthca/mthca_qp.c +++ b/drivers/infiniband/hw/mthca/mthca_qp.c | |||
@@ -1799,15 +1799,11 @@ int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | |||
1799 | 1799 | ||
1800 | out: | 1800 | out: |
1801 | if (likely(nreq)) { | 1801 | if (likely(nreq)) { |
1802 | __be32 doorbell[2]; | ||
1803 | |||
1804 | doorbell[0] = cpu_to_be32(((qp->sq.next_ind << qp->sq.wqe_shift) + | ||
1805 | qp->send_wqe_offset) | f0 | op0); | ||
1806 | doorbell[1] = cpu_to_be32((qp->qpn << 8) | size0); | ||
1807 | |||
1808 | wmb(); | 1802 | wmb(); |
1809 | 1803 | ||
1810 | mthca_write64(doorbell, | 1804 | mthca_write64(((qp->sq.next_ind << qp->sq.wqe_shift) + |
1805 | qp->send_wqe_offset) | f0 | op0, | ||
1806 | (qp->qpn << 8) | size0, | ||
1811 | dev->kar + MTHCA_SEND_DOORBELL, | 1807 | dev->kar + MTHCA_SEND_DOORBELL, |
1812 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); | 1808 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); |
1813 | /* | 1809 | /* |
@@ -1829,7 +1825,6 @@ int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr, | |||
1829 | { | 1825 | { |
1830 | struct mthca_dev *dev = to_mdev(ibqp->device); | 1826 | struct mthca_dev *dev = to_mdev(ibqp->device); |
1831 | struct mthca_qp *qp = to_mqp(ibqp); | 1827 | struct mthca_qp *qp = to_mqp(ibqp); |
1832 | __be32 doorbell[2]; | ||
1833 | unsigned long flags; | 1828 | unsigned long flags; |
1834 | int err = 0; | 1829 | int err = 0; |
1835 | int nreq; | 1830 | int nreq; |
@@ -1907,13 +1902,10 @@ int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr, | |||
1907 | if (unlikely(nreq == MTHCA_TAVOR_MAX_WQES_PER_RECV_DB)) { | 1902 | if (unlikely(nreq == MTHCA_TAVOR_MAX_WQES_PER_RECV_DB)) { |
1908 | nreq = 0; | 1903 | nreq = 0; |
1909 | 1904 | ||
1910 | doorbell[0] = cpu_to_be32((qp->rq.next_ind << qp->rq.wqe_shift) | size0); | ||
1911 | doorbell[1] = cpu_to_be32(qp->qpn << 8); | ||
1912 | |||
1913 | wmb(); | 1905 | wmb(); |
1914 | 1906 | ||
1915 | mthca_write64(doorbell, | 1907 | mthca_write64((qp->rq.next_ind << qp->rq.wqe_shift) | size0, |
1916 | dev->kar + MTHCA_RECEIVE_DOORBELL, | 1908 | qp->qpn << 8, dev->kar + MTHCA_RECEIVE_DOORBELL, |
1917 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); | 1909 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); |
1918 | 1910 | ||
1919 | qp->rq.next_ind = ind; | 1911 | qp->rq.next_ind = ind; |
@@ -1923,13 +1915,10 @@ int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr, | |||
1923 | 1915 | ||
1924 | out: | 1916 | out: |
1925 | if (likely(nreq)) { | 1917 | if (likely(nreq)) { |
1926 | doorbell[0] = cpu_to_be32((qp->rq.next_ind << qp->rq.wqe_shift) | size0); | ||
1927 | doorbell[1] = cpu_to_be32((qp->qpn << 8) | nreq); | ||
1928 | |||
1929 | wmb(); | 1918 | wmb(); |
1930 | 1919 | ||
1931 | mthca_write64(doorbell, | 1920 | mthca_write64((qp->rq.next_ind << qp->rq.wqe_shift) | size0, |
1932 | dev->kar + MTHCA_RECEIVE_DOORBELL, | 1921 | qp->qpn << 8 | nreq, dev->kar + MTHCA_RECEIVE_DOORBELL, |
1933 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); | 1922 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); |
1934 | } | 1923 | } |
1935 | 1924 | ||
@@ -1951,7 +1940,7 @@ int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | |||
1951 | { | 1940 | { |
1952 | struct mthca_dev *dev = to_mdev(ibqp->device); | 1941 | struct mthca_dev *dev = to_mdev(ibqp->device); |
1953 | struct mthca_qp *qp = to_mqp(ibqp); | 1942 | struct mthca_qp *qp = to_mqp(ibqp); |
1954 | __be32 doorbell[2]; | 1943 | u32 dbhi; |
1955 | void *wqe; | 1944 | void *wqe; |
1956 | void *prev_wqe; | 1945 | void *prev_wqe; |
1957 | unsigned long flags; | 1946 | unsigned long flags; |
@@ -1981,10 +1970,8 @@ int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | |||
1981 | if (unlikely(nreq == MTHCA_ARBEL_MAX_WQES_PER_SEND_DB)) { | 1970 | if (unlikely(nreq == MTHCA_ARBEL_MAX_WQES_PER_SEND_DB)) { |
1982 | nreq = 0; | 1971 | nreq = 0; |
1983 | 1972 | ||
1984 | doorbell[0] = cpu_to_be32((MTHCA_ARBEL_MAX_WQES_PER_SEND_DB << 24) | | 1973 | dbhi = (MTHCA_ARBEL_MAX_WQES_PER_SEND_DB << 24) | |
1985 | ((qp->sq.head & 0xffff) << 8) | | 1974 | ((qp->sq.head & 0xffff) << 8) | f0 | op0; |
1986 | f0 | op0); | ||
1987 | doorbell[1] = cpu_to_be32((qp->qpn << 8) | size0); | ||
1988 | 1975 | ||
1989 | qp->sq.head += MTHCA_ARBEL_MAX_WQES_PER_SEND_DB; | 1976 | qp->sq.head += MTHCA_ARBEL_MAX_WQES_PER_SEND_DB; |
1990 | 1977 | ||
@@ -2000,7 +1987,8 @@ int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | |||
2000 | * write MMIO send doorbell. | 1987 | * write MMIO send doorbell. |
2001 | */ | 1988 | */ |
2002 | wmb(); | 1989 | wmb(); |
2003 | mthca_write64(doorbell, | 1990 | |
1991 | mthca_write64(dbhi, (qp->qpn << 8) | size0, | ||
2004 | dev->kar + MTHCA_SEND_DOORBELL, | 1992 | dev->kar + MTHCA_SEND_DOORBELL, |
2005 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); | 1993 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); |
2006 | } | 1994 | } |
@@ -2154,10 +2142,7 @@ int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | |||
2154 | 2142 | ||
2155 | out: | 2143 | out: |
2156 | if (likely(nreq)) { | 2144 | if (likely(nreq)) { |
2157 | doorbell[0] = cpu_to_be32((nreq << 24) | | 2145 | dbhi = (nreq << 24) | ((qp->sq.head & 0xffff) << 8) | f0 | op0; |
2158 | ((qp->sq.head & 0xffff) << 8) | | ||
2159 | f0 | op0); | ||
2160 | doorbell[1] = cpu_to_be32((qp->qpn << 8) | size0); | ||
2161 | 2146 | ||
2162 | qp->sq.head += nreq; | 2147 | qp->sq.head += nreq; |
2163 | 2148 | ||
@@ -2173,8 +2158,8 @@ out: | |||
2173 | * write MMIO send doorbell. | 2158 | * write MMIO send doorbell. |
2174 | */ | 2159 | */ |
2175 | wmb(); | 2160 | wmb(); |
2176 | mthca_write64(doorbell, | 2161 | |
2177 | dev->kar + MTHCA_SEND_DOORBELL, | 2162 | mthca_write64(dbhi, (qp->qpn << 8) | size0, dev->kar + MTHCA_SEND_DOORBELL, |
2178 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); | 2163 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); |
2179 | } | 2164 | } |
2180 | 2165 | ||
diff --git a/drivers/infiniband/hw/mthca/mthca_srq.c b/drivers/infiniband/hw/mthca/mthca_srq.c index 3f58c11a62b7..553d681f6813 100644 --- a/drivers/infiniband/hw/mthca/mthca_srq.c +++ b/drivers/infiniband/hw/mthca/mthca_srq.c | |||
@@ -491,7 +491,6 @@ int mthca_tavor_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr, | |||
491 | { | 491 | { |
492 | struct mthca_dev *dev = to_mdev(ibsrq->device); | 492 | struct mthca_dev *dev = to_mdev(ibsrq->device); |
493 | struct mthca_srq *srq = to_msrq(ibsrq); | 493 | struct mthca_srq *srq = to_msrq(ibsrq); |
494 | __be32 doorbell[2]; | ||
495 | unsigned long flags; | 494 | unsigned long flags; |
496 | int err = 0; | 495 | int err = 0; |
497 | int first_ind; | 496 | int first_ind; |
@@ -563,16 +562,13 @@ int mthca_tavor_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr, | |||
563 | if (unlikely(nreq == MTHCA_TAVOR_MAX_WQES_PER_RECV_DB)) { | 562 | if (unlikely(nreq == MTHCA_TAVOR_MAX_WQES_PER_RECV_DB)) { |
564 | nreq = 0; | 563 | nreq = 0; |
565 | 564 | ||
566 | doorbell[0] = cpu_to_be32(first_ind << srq->wqe_shift); | ||
567 | doorbell[1] = cpu_to_be32(srq->srqn << 8); | ||
568 | |||
569 | /* | 565 | /* |
570 | * Make sure that descriptors are written | 566 | * Make sure that descriptors are written |
571 | * before doorbell is rung. | 567 | * before doorbell is rung. |
572 | */ | 568 | */ |
573 | wmb(); | 569 | wmb(); |
574 | 570 | ||
575 | mthca_write64(doorbell, | 571 | mthca_write64(first_ind << srq->wqe_shift, srq->srqn << 8, |
576 | dev->kar + MTHCA_RECEIVE_DOORBELL, | 572 | dev->kar + MTHCA_RECEIVE_DOORBELL, |
577 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); | 573 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); |
578 | 574 | ||
@@ -581,16 +577,13 @@ int mthca_tavor_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr, | |||
581 | } | 577 | } |
582 | 578 | ||
583 | if (likely(nreq)) { | 579 | if (likely(nreq)) { |
584 | doorbell[0] = cpu_to_be32(first_ind << srq->wqe_shift); | ||
585 | doorbell[1] = cpu_to_be32((srq->srqn << 8) | nreq); | ||
586 | |||
587 | /* | 580 | /* |
588 | * Make sure that descriptors are written before | 581 | * Make sure that descriptors are written before |
589 | * doorbell is rung. | 582 | * doorbell is rung. |
590 | */ | 583 | */ |
591 | wmb(); | 584 | wmb(); |
592 | 585 | ||
593 | mthca_write64(doorbell, | 586 | mthca_write64(first_ind << srq->wqe_shift, (srq->srqn << 8) | nreq, |
594 | dev->kar + MTHCA_RECEIVE_DOORBELL, | 587 | dev->kar + MTHCA_RECEIVE_DOORBELL, |
595 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); | 588 | MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); |
596 | } | 589 | } |