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authorJay Estabrook <jay.estabrook@gmail.com>2011-06-09 18:19:12 -0400
committerDave Airlie <airlied@redhat.com>2011-06-13 19:32:56 -0400
commit83533c132a55aac735028f6fb9b956e8c078db1f (patch)
tree23702cdd20fe7da4fa6a7accb85bbf8a0f92f14b /drivers
parent82ba3fef67829813d0ed4c45231235084a07f081 (diff)
alpha, drm: Remove obsolete Alpha support in MGA DRM code
Remove an obsolete Alpha adjustment in the drm for MGA on Alpha. Signed-off-by: Jay Estabrook <jay.estabrook@gmail.com> Tested-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/mga/mga_drv.h19
1 files changed, 0 insertions, 19 deletions
diff --git a/drivers/gpu/drm/mga/mga_drv.h b/drivers/gpu/drm/mga/mga_drv.h
index 1084fa4d261b..54558a01969a 100644
--- a/drivers/gpu/drm/mga/mga_drv.h
+++ b/drivers/gpu/drm/mga/mga_drv.h
@@ -195,29 +195,10 @@ extern long mga_compat_ioctl(struct file *filp, unsigned int cmd,
195 195
196#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER() 196#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER()
197 197
198#if defined(__linux__) && defined(__alpha__)
199#define MGA_BASE(reg) ((unsigned long)(dev_priv->mmio->handle))
200#define MGA_ADDR(reg) (MGA_BASE(reg) + reg)
201
202#define MGA_DEREF(reg) (*(volatile u32 *)MGA_ADDR(reg))
203#define MGA_DEREF8(reg) (*(volatile u8 *)MGA_ADDR(reg))
204
205#define MGA_READ(reg) (_MGA_READ((u32 *)MGA_ADDR(reg)))
206#define MGA_READ8(reg) (_MGA_READ((u8 *)MGA_ADDR(reg)))
207#define MGA_WRITE(reg, val) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF(reg) = val; } while (0)
208#define MGA_WRITE8(reg, val) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8(reg) = val; } while (0)
209
210static inline u32 _MGA_READ(u32 *addr)
211{
212 DRM_MEMORYBARRIER();
213 return *(volatile u32 *)addr;
214}
215#else
216#define MGA_READ8(reg) DRM_READ8(dev_priv->mmio, (reg)) 198#define MGA_READ8(reg) DRM_READ8(dev_priv->mmio, (reg))
217#define MGA_READ(reg) DRM_READ32(dev_priv->mmio, (reg)) 199#define MGA_READ(reg) DRM_READ32(dev_priv->mmio, (reg))
218#define MGA_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val)) 200#define MGA_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val))
219#define MGA_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val)) 201#define MGA_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val))
220#endif
221 202
222#define DWGREG0 0x1c00 203#define DWGREG0 0x1c00
223#define DWGREG0_END 0x1dff 204#define DWGREG0_END 0x1dff