diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2005-08-29 13:03:46 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-08-29 13:03:46 -0400 |
commit | 5be1d85c208f135fc88f972f91b91a879b702b40 (patch) | |
tree | 6ca884e6cd58d596a64ef12fa62405524d6cd5f1 /drivers | |
parent | 69be8f189653cd81aae5a74e26615b12871bb72e (diff) | |
parent | 135932651fd1eeb95eb6c5d4f6652aae73fe2c24 (diff) |
Merge refs/heads/upstream from master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/scsi/ahci.c | 12 | ||||
-rw-r--r-- | drivers/scsi/ata_piix.c | 14 | ||||
-rw-r--r-- | drivers/scsi/libata-core.c | 247 | ||||
-rw-r--r-- | drivers/scsi/libata-scsi.c | 66 | ||||
-rw-r--r-- | drivers/scsi/libata.h | 2 | ||||
-rw-r--r-- | drivers/scsi/sata_nv.c | 24 | ||||
-rw-r--r-- | drivers/scsi/sata_promise.c | 12 | ||||
-rw-r--r-- | drivers/scsi/sata_qstor.c | 12 | ||||
-rw-r--r-- | drivers/scsi/sata_sil.c | 36 | ||||
-rw-r--r-- | drivers/scsi/sata_sis.c | 2 | ||||
-rw-r--r-- | drivers/scsi/sata_svw.c | 10 | ||||
-rw-r--r-- | drivers/scsi/sata_sx4.c | 146 | ||||
-rw-r--r-- | drivers/scsi/sata_uli.c | 2 | ||||
-rw-r--r-- | drivers/scsi/sata_via.c | 2 | ||||
-rw-r--r-- | drivers/scsi/sata_vsc.c | 5 |
15 files changed, 442 insertions, 150 deletions
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c index e3b9692b9688..841f4e2cfe08 100644 --- a/drivers/scsi/ahci.c +++ b/drivers/scsi/ahci.c | |||
@@ -269,6 +269,8 @@ static struct pci_device_id ahci_pci_tbl[] = { | |||
269 | board_ahci }, /* ESB2 */ | 269 | board_ahci }, /* ESB2 */ |
270 | { PCI_VENDOR_ID_INTEL, 0x2683, PCI_ANY_ID, PCI_ANY_ID, 0, 0, | 270 | { PCI_VENDOR_ID_INTEL, 0x2683, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
271 | board_ahci }, /* ESB2 */ | 271 | board_ahci }, /* ESB2 */ |
272 | { PCI_VENDOR_ID_INTEL, 0x27c6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, | ||
273 | board_ahci }, /* ICH7-M DH */ | ||
272 | { } /* terminate list */ | 274 | { } /* terminate list */ |
273 | }; | 275 | }; |
274 | 276 | ||
@@ -584,12 +586,16 @@ static void ahci_intr_error(struct ata_port *ap, u32 irq_stat) | |||
584 | 586 | ||
585 | static void ahci_eng_timeout(struct ata_port *ap) | 587 | static void ahci_eng_timeout(struct ata_port *ap) |
586 | { | 588 | { |
587 | void *mmio = ap->host_set->mmio_base; | 589 | struct ata_host_set *host_set = ap->host_set; |
590 | void *mmio = host_set->mmio_base; | ||
588 | void *port_mmio = ahci_port_base(mmio, ap->port_no); | 591 | void *port_mmio = ahci_port_base(mmio, ap->port_no); |
589 | struct ata_queued_cmd *qc; | 592 | struct ata_queued_cmd *qc; |
593 | unsigned long flags; | ||
590 | 594 | ||
591 | DPRINTK("ENTER\n"); | 595 | DPRINTK("ENTER\n"); |
592 | 596 | ||
597 | spin_lock_irqsave(&host_set->lock, flags); | ||
598 | |||
593 | ahci_intr_error(ap, readl(port_mmio + PORT_IRQ_STAT)); | 599 | ahci_intr_error(ap, readl(port_mmio + PORT_IRQ_STAT)); |
594 | 600 | ||
595 | qc = ata_qc_from_tag(ap, ap->active_tag); | 601 | qc = ata_qc_from_tag(ap, ap->active_tag); |
@@ -607,6 +613,7 @@ static void ahci_eng_timeout(struct ata_port *ap) | |||
607 | ata_qc_complete(qc, ATA_ERR); | 613 | ata_qc_complete(qc, ATA_ERR); |
608 | } | 614 | } |
609 | 615 | ||
616 | spin_unlock_irqrestore(&host_set->lock, flags); | ||
610 | } | 617 | } |
611 | 618 | ||
612 | static inline int ahci_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc) | 619 | static inline int ahci_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc) |
@@ -696,9 +703,6 @@ static int ahci_qc_issue(struct ata_queued_cmd *qc) | |||
696 | struct ata_port *ap = qc->ap; | 703 | struct ata_port *ap = qc->ap; |
697 | void *port_mmio = (void *) ap->ioaddr.cmd_addr; | 704 | void *port_mmio = (void *) ap->ioaddr.cmd_addr; |
698 | 705 | ||
699 | writel(1, port_mmio + PORT_SCR_ACT); | ||
700 | readl(port_mmio + PORT_SCR_ACT); /* flush */ | ||
701 | |||
702 | writel(1, port_mmio + PORT_CMD_ISSUE); | 706 | writel(1, port_mmio + PORT_CMD_ISSUE); |
703 | readl(port_mmio + PORT_CMD_ISSUE); /* flush */ | 707 | readl(port_mmio + PORT_CMD_ISSUE); /* flush */ |
704 | 708 | ||
diff --git a/drivers/scsi/ata_piix.c b/drivers/scsi/ata_piix.c index d96ebf9d2228..03695616e59e 100644 --- a/drivers/scsi/ata_piix.c +++ b/drivers/scsi/ata_piix.c | |||
@@ -629,13 +629,13 @@ static int piix_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
629 | port_info[1] = NULL; | 629 | port_info[1] = NULL; |
630 | 630 | ||
631 | if (port_info[0]->host_flags & PIIX_FLAG_AHCI) { | 631 | if (port_info[0]->host_flags & PIIX_FLAG_AHCI) { |
632 | u8 tmp; | 632 | u8 tmp; |
633 | pci_read_config_byte(pdev, PIIX_SCC, &tmp); | 633 | pci_read_config_byte(pdev, PIIX_SCC, &tmp); |
634 | if (tmp == PIIX_AHCI_DEVICE) { | 634 | if (tmp == PIIX_AHCI_DEVICE) { |
635 | int rc = piix_disable_ahci(pdev); | 635 | int rc = piix_disable_ahci(pdev); |
636 | if (rc) | 636 | if (rc) |
637 | return rc; | 637 | return rc; |
638 | } | 638 | } |
639 | } | 639 | } |
640 | 640 | ||
641 | if (port_info[0]->host_flags & PIIX_FLAG_COMBINED) { | 641 | if (port_info[0]->host_flags & PIIX_FLAG_COMBINED) { |
diff --git a/drivers/scsi/libata-core.c b/drivers/scsi/libata-core.c index f4e7dcb6492b..f15a07f9f471 100644 --- a/drivers/scsi/libata-core.c +++ b/drivers/scsi/libata-core.c | |||
@@ -1304,12 +1304,12 @@ static inline u8 ata_dev_knobble(struct ata_port *ap) | |||
1304 | /** | 1304 | /** |
1305 | * ata_dev_config - Run device specific handlers and check for | 1305 | * ata_dev_config - Run device specific handlers and check for |
1306 | * SATA->PATA bridges | 1306 | * SATA->PATA bridges |
1307 | * @ap: Bus | 1307 | * @ap: Bus |
1308 | * @i: Device | 1308 | * @i: Device |
1309 | * | 1309 | * |
1310 | * LOCKING: | 1310 | * LOCKING: |
1311 | */ | 1311 | */ |
1312 | 1312 | ||
1313 | void ata_dev_config(struct ata_port *ap, unsigned int i) | 1313 | void ata_dev_config(struct ata_port *ap, unsigned int i) |
1314 | { | 1314 | { |
1315 | /* limit bridge transfers to udma5, 200 sectors */ | 1315 | /* limit bridge transfers to udma5, 200 sectors */ |
@@ -2377,6 +2377,27 @@ static int ata_sg_setup(struct ata_queued_cmd *qc) | |||
2377 | } | 2377 | } |
2378 | 2378 | ||
2379 | /** | 2379 | /** |
2380 | * ata_poll_qc_complete - turn irq back on and finish qc | ||
2381 | * @qc: Command to complete | ||
2382 | * @drv_stat: ATA status register content | ||
2383 | * | ||
2384 | * LOCKING: | ||
2385 | * None. (grabs host lock) | ||
2386 | */ | ||
2387 | |||
2388 | void ata_poll_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat) | ||
2389 | { | ||
2390 | struct ata_port *ap = qc->ap; | ||
2391 | unsigned long flags; | ||
2392 | |||
2393 | spin_lock_irqsave(&ap->host_set->lock, flags); | ||
2394 | ap->flags &= ~ATA_FLAG_NOINTR; | ||
2395 | ata_irq_on(ap); | ||
2396 | ata_qc_complete(qc, drv_stat); | ||
2397 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | ||
2398 | } | ||
2399 | |||
2400 | /** | ||
2380 | * ata_pio_poll - | 2401 | * ata_pio_poll - |
2381 | * @ap: | 2402 | * @ap: |
2382 | * | 2403 | * |
@@ -2438,11 +2459,10 @@ static void ata_pio_complete (struct ata_port *ap) | |||
2438 | u8 drv_stat; | 2459 | u8 drv_stat; |
2439 | 2460 | ||
2440 | /* | 2461 | /* |
2441 | * This is purely hueristic. This is a fast path. | 2462 | * This is purely heuristic. This is a fast path. Sometimes when |
2442 | * Sometimes when we enter, BSY will be cleared in | 2463 | * we enter, BSY will be cleared in a chk-status or two. If not, |
2443 | * a chk-status or two. If not, the drive is probably seeking | 2464 | * the drive is probably seeking or something. Snooze for a couple |
2444 | * or something. Snooze for a couple msecs, then | 2465 | * msecs, then chk-status again. If still busy, fall back to |
2445 | * chk-status again. If still busy, fall back to | ||
2446 | * PIO_ST_POLL state. | 2466 | * PIO_ST_POLL state. |
2447 | */ | 2467 | */ |
2448 | drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10); | 2468 | drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10); |
@@ -2467,9 +2487,7 @@ static void ata_pio_complete (struct ata_port *ap) | |||
2467 | 2487 | ||
2468 | ap->pio_task_state = PIO_ST_IDLE; | 2488 | ap->pio_task_state = PIO_ST_IDLE; |
2469 | 2489 | ||
2470 | ata_irq_on(ap); | 2490 | ata_poll_qc_complete(qc, drv_stat); |
2471 | |||
2472 | ata_qc_complete(qc, drv_stat); | ||
2473 | } | 2491 | } |
2474 | 2492 | ||
2475 | 2493 | ||
@@ -2494,6 +2512,20 @@ void swap_buf_le16(u16 *buf, unsigned int buf_words) | |||
2494 | #endif /* __BIG_ENDIAN */ | 2512 | #endif /* __BIG_ENDIAN */ |
2495 | } | 2513 | } |
2496 | 2514 | ||
2515 | /** | ||
2516 | * ata_mmio_data_xfer - Transfer data by MMIO | ||
2517 | * @ap: port to read/write | ||
2518 | * @buf: data buffer | ||
2519 | * @buflen: buffer length | ||
2520 | * @do_write: read/write | ||
2521 | * | ||
2522 | * Transfer data from/to the device data register by MMIO. | ||
2523 | * | ||
2524 | * LOCKING: | ||
2525 | * Inherited from caller. | ||
2526 | * | ||
2527 | */ | ||
2528 | |||
2497 | static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, | 2529 | static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, |
2498 | unsigned int buflen, int write_data) | 2530 | unsigned int buflen, int write_data) |
2499 | { | 2531 | { |
@@ -2502,6 +2534,7 @@ static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, | |||
2502 | u16 *buf16 = (u16 *) buf; | 2534 | u16 *buf16 = (u16 *) buf; |
2503 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; | 2535 | void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr; |
2504 | 2536 | ||
2537 | /* Transfer multiple of 2 bytes */ | ||
2505 | if (write_data) { | 2538 | if (write_data) { |
2506 | for (i = 0; i < words; i++) | 2539 | for (i = 0; i < words; i++) |
2507 | writew(le16_to_cpu(buf16[i]), mmio); | 2540 | writew(le16_to_cpu(buf16[i]), mmio); |
@@ -2509,19 +2542,76 @@ static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf, | |||
2509 | for (i = 0; i < words; i++) | 2542 | for (i = 0; i < words; i++) |
2510 | buf16[i] = cpu_to_le16(readw(mmio)); | 2543 | buf16[i] = cpu_to_le16(readw(mmio)); |
2511 | } | 2544 | } |
2545 | |||
2546 | /* Transfer trailing 1 byte, if any. */ | ||
2547 | if (unlikely(buflen & 0x01)) { | ||
2548 | u16 align_buf[1] = { 0 }; | ||
2549 | unsigned char *trailing_buf = buf + buflen - 1; | ||
2550 | |||
2551 | if (write_data) { | ||
2552 | memcpy(align_buf, trailing_buf, 1); | ||
2553 | writew(le16_to_cpu(align_buf[0]), mmio); | ||
2554 | } else { | ||
2555 | align_buf[0] = cpu_to_le16(readw(mmio)); | ||
2556 | memcpy(trailing_buf, align_buf, 1); | ||
2557 | } | ||
2558 | } | ||
2512 | } | 2559 | } |
2513 | 2560 | ||
2561 | /** | ||
2562 | * ata_pio_data_xfer - Transfer data by PIO | ||
2563 | * @ap: port to read/write | ||
2564 | * @buf: data buffer | ||
2565 | * @buflen: buffer length | ||
2566 | * @do_write: read/write | ||
2567 | * | ||
2568 | * Transfer data from/to the device data register by PIO. | ||
2569 | * | ||
2570 | * LOCKING: | ||
2571 | * Inherited from caller. | ||
2572 | * | ||
2573 | */ | ||
2574 | |||
2514 | static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf, | 2575 | static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf, |
2515 | unsigned int buflen, int write_data) | 2576 | unsigned int buflen, int write_data) |
2516 | { | 2577 | { |
2517 | unsigned int dwords = buflen >> 1; | 2578 | unsigned int words = buflen >> 1; |
2518 | 2579 | ||
2580 | /* Transfer multiple of 2 bytes */ | ||
2519 | if (write_data) | 2581 | if (write_data) |
2520 | outsw(ap->ioaddr.data_addr, buf, dwords); | 2582 | outsw(ap->ioaddr.data_addr, buf, words); |
2521 | else | 2583 | else |
2522 | insw(ap->ioaddr.data_addr, buf, dwords); | 2584 | insw(ap->ioaddr.data_addr, buf, words); |
2585 | |||
2586 | /* Transfer trailing 1 byte, if any. */ | ||
2587 | if (unlikely(buflen & 0x01)) { | ||
2588 | u16 align_buf[1] = { 0 }; | ||
2589 | unsigned char *trailing_buf = buf + buflen - 1; | ||
2590 | |||
2591 | if (write_data) { | ||
2592 | memcpy(align_buf, trailing_buf, 1); | ||
2593 | outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); | ||
2594 | } else { | ||
2595 | align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr)); | ||
2596 | memcpy(trailing_buf, align_buf, 1); | ||
2597 | } | ||
2598 | } | ||
2523 | } | 2599 | } |
2524 | 2600 | ||
2601 | /** | ||
2602 | * ata_data_xfer - Transfer data from/to the data register. | ||
2603 | * @ap: port to read/write | ||
2604 | * @buf: data buffer | ||
2605 | * @buflen: buffer length | ||
2606 | * @do_write: read/write | ||
2607 | * | ||
2608 | * Transfer data from/to the device data register. | ||
2609 | * | ||
2610 | * LOCKING: | ||
2611 | * Inherited from caller. | ||
2612 | * | ||
2613 | */ | ||
2614 | |||
2525 | static void ata_data_xfer(struct ata_port *ap, unsigned char *buf, | 2615 | static void ata_data_xfer(struct ata_port *ap, unsigned char *buf, |
2526 | unsigned int buflen, int do_write) | 2616 | unsigned int buflen, int do_write) |
2527 | { | 2617 | { |
@@ -2531,6 +2621,16 @@ static void ata_data_xfer(struct ata_port *ap, unsigned char *buf, | |||
2531 | ata_pio_data_xfer(ap, buf, buflen, do_write); | 2621 | ata_pio_data_xfer(ap, buf, buflen, do_write); |
2532 | } | 2622 | } |
2533 | 2623 | ||
2624 | /** | ||
2625 | * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data. | ||
2626 | * @qc: Command on going | ||
2627 | * | ||
2628 | * Transfer ATA_SECT_SIZE of data from/to the ATA device. | ||
2629 | * | ||
2630 | * LOCKING: | ||
2631 | * Inherited from caller. | ||
2632 | */ | ||
2633 | |||
2534 | static void ata_pio_sector(struct ata_queued_cmd *qc) | 2634 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
2535 | { | 2635 | { |
2536 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | 2636 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); |
@@ -2569,6 +2669,18 @@ static void ata_pio_sector(struct ata_queued_cmd *qc) | |||
2569 | kunmap(page); | 2669 | kunmap(page); |
2570 | } | 2670 | } |
2571 | 2671 | ||
2672 | /** | ||
2673 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | ||
2674 | * @qc: Command on going | ||
2675 | * @bytes: number of bytes | ||
2676 | * | ||
2677 | * Transfer Transfer data from/to the ATAPI device. | ||
2678 | * | ||
2679 | * LOCKING: | ||
2680 | * Inherited from caller. | ||
2681 | * | ||
2682 | */ | ||
2683 | |||
2572 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) | 2684 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
2573 | { | 2685 | { |
2574 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | 2686 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); |
@@ -2578,10 +2690,33 @@ static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) | |||
2578 | unsigned char *buf; | 2690 | unsigned char *buf; |
2579 | unsigned int offset, count; | 2691 | unsigned int offset, count; |
2580 | 2692 | ||
2581 | if (qc->curbytes == qc->nbytes - bytes) | 2693 | if (qc->curbytes + bytes >= qc->nbytes) |
2582 | ap->pio_task_state = PIO_ST_LAST; | 2694 | ap->pio_task_state = PIO_ST_LAST; |
2583 | 2695 | ||
2584 | next_sg: | 2696 | next_sg: |
2697 | if (unlikely(qc->cursg >= qc->n_elem)) { | ||
2698 | /* | ||
2699 | * The end of qc->sg is reached and the device expects | ||
2700 | * more data to transfer. In order not to overrun qc->sg | ||
2701 | * and fulfill length specified in the byte count register, | ||
2702 | * - for read case, discard trailing data from the device | ||
2703 | * - for write case, padding zero data to the device | ||
2704 | */ | ||
2705 | u16 pad_buf[1] = { 0 }; | ||
2706 | unsigned int words = bytes >> 1; | ||
2707 | unsigned int i; | ||
2708 | |||
2709 | if (words) /* warning if bytes > 1 */ | ||
2710 | printk(KERN_WARNING "ata%u: %u bytes trailing data\n", | ||
2711 | ap->id, bytes); | ||
2712 | |||
2713 | for (i = 0; i < words; i++) | ||
2714 | ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write); | ||
2715 | |||
2716 | ap->pio_task_state = PIO_ST_LAST; | ||
2717 | return; | ||
2718 | } | ||
2719 | |||
2585 | sg = &qc->sg[qc->cursg]; | 2720 | sg = &qc->sg[qc->cursg]; |
2586 | 2721 | ||
2587 | page = sg->page; | 2722 | page = sg->page; |
@@ -2615,11 +2750,21 @@ next_sg: | |||
2615 | 2750 | ||
2616 | kunmap(page); | 2751 | kunmap(page); |
2617 | 2752 | ||
2618 | if (bytes) { | 2753 | if (bytes) |
2619 | goto next_sg; | 2754 | goto next_sg; |
2620 | } | ||
2621 | } | 2755 | } |
2622 | 2756 | ||
2757 | /** | ||
2758 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | ||
2759 | * @qc: Command on going | ||
2760 | * | ||
2761 | * Transfer Transfer data from/to the ATAPI device. | ||
2762 | * | ||
2763 | * LOCKING: | ||
2764 | * Inherited from caller. | ||
2765 | * | ||
2766 | */ | ||
2767 | |||
2623 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) | 2768 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
2624 | { | 2769 | { |
2625 | struct ata_port *ap = qc->ap; | 2770 | struct ata_port *ap = qc->ap; |
@@ -2692,9 +2837,7 @@ static void ata_pio_block(struct ata_port *ap) | |||
2692 | if ((status & ATA_DRQ) == 0) { | 2837 | if ((status & ATA_DRQ) == 0) { |
2693 | ap->pio_task_state = PIO_ST_IDLE; | 2838 | ap->pio_task_state = PIO_ST_IDLE; |
2694 | 2839 | ||
2695 | ata_irq_on(ap); | 2840 | ata_poll_qc_complete(qc, status); |
2696 | |||
2697 | ata_qc_complete(qc, status); | ||
2698 | return; | 2841 | return; |
2699 | } | 2842 | } |
2700 | 2843 | ||
@@ -2724,9 +2867,7 @@ static void ata_pio_error(struct ata_port *ap) | |||
2724 | 2867 | ||
2725 | ap->pio_task_state = PIO_ST_IDLE; | 2868 | ap->pio_task_state = PIO_ST_IDLE; |
2726 | 2869 | ||
2727 | ata_irq_on(ap); | 2870 | ata_poll_qc_complete(qc, drv_stat | ATA_ERR); |
2728 | |||
2729 | ata_qc_complete(qc, drv_stat | ATA_ERR); | ||
2730 | } | 2871 | } |
2731 | 2872 | ||
2732 | static void ata_pio_task(void *_data) | 2873 | static void ata_pio_task(void *_data) |
@@ -2832,8 +2973,10 @@ static void atapi_request_sense(struct ata_port *ap, struct ata_device *dev, | |||
2832 | static void ata_qc_timeout(struct ata_queued_cmd *qc) | 2973 | static void ata_qc_timeout(struct ata_queued_cmd *qc) |
2833 | { | 2974 | { |
2834 | struct ata_port *ap = qc->ap; | 2975 | struct ata_port *ap = qc->ap; |
2976 | struct ata_host_set *host_set = ap->host_set; | ||
2835 | struct ata_device *dev = qc->dev; | 2977 | struct ata_device *dev = qc->dev; |
2836 | u8 host_stat = 0, drv_stat; | 2978 | u8 host_stat = 0, drv_stat; |
2979 | unsigned long flags; | ||
2837 | 2980 | ||
2838 | DPRINTK("ENTER\n"); | 2981 | DPRINTK("ENTER\n"); |
2839 | 2982 | ||
@@ -2844,7 +2987,9 @@ static void ata_qc_timeout(struct ata_queued_cmd *qc) | |||
2844 | if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) { | 2987 | if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) { |
2845 | 2988 | ||
2846 | /* finish completing original command */ | 2989 | /* finish completing original command */ |
2990 | spin_lock_irqsave(&host_set->lock, flags); | ||
2847 | __ata_qc_complete(qc); | 2991 | __ata_qc_complete(qc); |
2992 | spin_unlock_irqrestore(&host_set->lock, flags); | ||
2848 | 2993 | ||
2849 | atapi_request_sense(ap, dev, cmd); | 2994 | atapi_request_sense(ap, dev, cmd); |
2850 | 2995 | ||
@@ -2855,6 +3000,8 @@ static void ata_qc_timeout(struct ata_queued_cmd *qc) | |||
2855 | } | 3000 | } |
2856 | } | 3001 | } |
2857 | 3002 | ||
3003 | spin_lock_irqsave(&host_set->lock, flags); | ||
3004 | |||
2858 | /* hack alert! We cannot use the supplied completion | 3005 | /* hack alert! We cannot use the supplied completion |
2859 | * function from inside the ->eh_strategy_handler() thread. | 3006 | * function from inside the ->eh_strategy_handler() thread. |
2860 | * libata is the only user of ->eh_strategy_handler() in | 3007 | * libata is the only user of ->eh_strategy_handler() in |
@@ -2870,7 +3017,7 @@ static void ata_qc_timeout(struct ata_queued_cmd *qc) | |||
2870 | host_stat = ap->ops->bmdma_status(ap); | 3017 | host_stat = ap->ops->bmdma_status(ap); |
2871 | 3018 | ||
2872 | /* before we do anything else, clear DMA-Start bit */ | 3019 | /* before we do anything else, clear DMA-Start bit */ |
2873 | ap->ops->bmdma_stop(ap); | 3020 | ap->ops->bmdma_stop(qc); |
2874 | 3021 | ||
2875 | /* fall through */ | 3022 | /* fall through */ |
2876 | 3023 | ||
@@ -2888,6 +3035,9 @@ static void ata_qc_timeout(struct ata_queued_cmd *qc) | |||
2888 | ata_qc_complete(qc, drv_stat); | 3035 | ata_qc_complete(qc, drv_stat); |
2889 | break; | 3036 | break; |
2890 | } | 3037 | } |
3038 | |||
3039 | spin_unlock_irqrestore(&host_set->lock, flags); | ||
3040 | |||
2891 | out: | 3041 | out: |
2892 | DPRINTK("EXIT\n"); | 3042 | DPRINTK("EXIT\n"); |
2893 | } | 3043 | } |
@@ -3061,9 +3211,14 @@ void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat) | |||
3061 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | 3211 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) |
3062 | ata_sg_clean(qc); | 3212 | ata_sg_clean(qc); |
3063 | 3213 | ||
3214 | /* atapi: mark qc as inactive to prevent the interrupt handler | ||
3215 | * from completing the command twice later, before the error handler | ||
3216 | * is called. (when rc != 0 and atapi request sense is needed) | ||
3217 | */ | ||
3218 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | ||
3219 | |||
3064 | /* call completion callback */ | 3220 | /* call completion callback */ |
3065 | rc = qc->complete_fn(qc, drv_stat); | 3221 | rc = qc->complete_fn(qc, drv_stat); |
3066 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | ||
3067 | 3222 | ||
3068 | /* if callback indicates not to complete command (non-zero), | 3223 | /* if callback indicates not to complete command (non-zero), |
3069 | * return immediately | 3224 | * return immediately |
@@ -3193,11 +3348,13 @@ int ata_qc_issue_prot(struct ata_queued_cmd *qc) | |||
3193 | break; | 3348 | break; |
3194 | 3349 | ||
3195 | case ATA_PROT_ATAPI_NODATA: | 3350 | case ATA_PROT_ATAPI_NODATA: |
3351 | ap->flags |= ATA_FLAG_NOINTR; | ||
3196 | ata_tf_to_host_nolock(ap, &qc->tf); | 3352 | ata_tf_to_host_nolock(ap, &qc->tf); |
3197 | queue_work(ata_wq, &ap->packet_task); | 3353 | queue_work(ata_wq, &ap->packet_task); |
3198 | break; | 3354 | break; |
3199 | 3355 | ||
3200 | case ATA_PROT_ATAPI_DMA: | 3356 | case ATA_PROT_ATAPI_DMA: |
3357 | ap->flags |= ATA_FLAG_NOINTR; | ||
3201 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ | 3358 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
3202 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | 3359 | ap->ops->bmdma_setup(qc); /* set up bmdma */ |
3203 | queue_work(ata_wq, &ap->packet_task); | 3360 | queue_work(ata_wq, &ap->packet_task); |
@@ -3242,7 +3399,7 @@ static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc) | |||
3242 | } | 3399 | } |
3243 | 3400 | ||
3244 | /** | 3401 | /** |
3245 | * ata_bmdma_start - Start a PCI IDE BMDMA transaction | 3402 | * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction |
3246 | * @qc: Info associated with this ATA transaction. | 3403 | * @qc: Info associated with this ATA transaction. |
3247 | * | 3404 | * |
3248 | * LOCKING: | 3405 | * LOCKING: |
@@ -3413,7 +3570,7 @@ u8 ata_bmdma_status(struct ata_port *ap) | |||
3413 | 3570 | ||
3414 | /** | 3571 | /** |
3415 | * ata_bmdma_stop - Stop PCI IDE BMDMA transfer | 3572 | * ata_bmdma_stop - Stop PCI IDE BMDMA transfer |
3416 | * @ap: Port associated with this ATA transaction. | 3573 | * @qc: Command we are ending DMA for |
3417 | * | 3574 | * |
3418 | * Clears the ATA_DMA_START flag in the dma control register | 3575 | * Clears the ATA_DMA_START flag in the dma control register |
3419 | * | 3576 | * |
@@ -3423,8 +3580,9 @@ u8 ata_bmdma_status(struct ata_port *ap) | |||
3423 | * spin_lock_irqsave(host_set lock) | 3580 | * spin_lock_irqsave(host_set lock) |
3424 | */ | 3581 | */ |
3425 | 3582 | ||
3426 | void ata_bmdma_stop(struct ata_port *ap) | 3583 | void ata_bmdma_stop(struct ata_queued_cmd *qc) |
3427 | { | 3584 | { |
3585 | struct ata_port *ap = qc->ap; | ||
3428 | if (ap->flags & ATA_FLAG_MMIO) { | 3586 | if (ap->flags & ATA_FLAG_MMIO) { |
3429 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; | 3587 | void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; |
3430 | 3588 | ||
@@ -3476,7 +3634,7 @@ inline unsigned int ata_host_intr (struct ata_port *ap, | |||
3476 | goto idle_irq; | 3634 | goto idle_irq; |
3477 | 3635 | ||
3478 | /* before we do anything else, clear DMA-Start bit */ | 3636 | /* before we do anything else, clear DMA-Start bit */ |
3479 | ap->ops->bmdma_stop(ap); | 3637 | ap->ops->bmdma_stop(qc); |
3480 | 3638 | ||
3481 | /* fall through */ | 3639 | /* fall through */ |
3482 | 3640 | ||
@@ -3551,7 +3709,8 @@ irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs) | |||
3551 | struct ata_port *ap; | 3709 | struct ata_port *ap; |
3552 | 3710 | ||
3553 | ap = host_set->ports[i]; | 3711 | ap = host_set->ports[i]; |
3554 | if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { | 3712 | if (ap && |
3713 | !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) { | ||
3555 | struct ata_queued_cmd *qc; | 3714 | struct ata_queued_cmd *qc; |
3556 | 3715 | ||
3557 | qc = ata_qc_from_tag(ap, ap->active_tag); | 3716 | qc = ata_qc_from_tag(ap, ap->active_tag); |
@@ -3603,19 +3762,27 @@ static void atapi_packet_task(void *_data) | |||
3603 | /* send SCSI cdb */ | 3762 | /* send SCSI cdb */ |
3604 | DPRINTK("send cdb\n"); | 3763 | DPRINTK("send cdb\n"); |
3605 | assert(ap->cdb_len >= 12); | 3764 | assert(ap->cdb_len >= 12); |
3606 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | ||
3607 | 3765 | ||
3608 | /* if we are DMA'ing, irq handler takes over from here */ | 3766 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA || |
3609 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA) | 3767 | qc->tf.protocol == ATA_PROT_ATAPI_NODATA) { |
3610 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | 3768 | unsigned long flags; |
3611 | 3769 | ||
3612 | /* non-data commands are also handled via irq */ | 3770 | /* Once we're done issuing command and kicking bmdma, |
3613 | else if (qc->tf.protocol == ATA_PROT_ATAPI_NODATA) { | 3771 | * irq handler takes over. To not lose irq, we need |
3614 | /* do nothing */ | 3772 | * to clear NOINTR flag before sending cdb, but |
3615 | } | 3773 | * interrupt handler shouldn't be invoked before we're |
3774 | * finished. Hence, the following locking. | ||
3775 | */ | ||
3776 | spin_lock_irqsave(&ap->host_set->lock, flags); | ||
3777 | ap->flags &= ~ATA_FLAG_NOINTR; | ||
3778 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | ||
3779 | if (qc->tf.protocol == ATA_PROT_ATAPI_DMA) | ||
3780 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | ||
3781 | spin_unlock_irqrestore(&ap->host_set->lock, flags); | ||
3782 | } else { | ||
3783 | ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1); | ||
3616 | 3784 | ||
3617 | /* PIO commands are handled by polling */ | 3785 | /* PIO commands are handled by polling */ |
3618 | else { | ||
3619 | ap->pio_task_state = PIO_ST; | 3786 | ap->pio_task_state = PIO_ST; |
3620 | queue_work(ata_wq, &ap->pio_task); | 3787 | queue_work(ata_wq, &ap->pio_task); |
3621 | } | 3788 | } |
@@ -3623,7 +3790,7 @@ static void atapi_packet_task(void *_data) | |||
3623 | return; | 3790 | return; |
3624 | 3791 | ||
3625 | err_out: | 3792 | err_out: |
3626 | ata_qc_complete(qc, ATA_ERR); | 3793 | ata_poll_qc_complete(qc, ATA_ERR); |
3627 | } | 3794 | } |
3628 | 3795 | ||
3629 | 3796 | ||
diff --git a/drivers/scsi/libata-scsi.c b/drivers/scsi/libata-scsi.c index 6a75ec2187fd..4074e7877ba3 100644 --- a/drivers/scsi/libata-scsi.c +++ b/drivers/scsi/libata-scsi.c | |||
@@ -392,6 +392,60 @@ int ata_scsi_error(struct Scsi_Host *host) | |||
392 | } | 392 | } |
393 | 393 | ||
394 | /** | 394 | /** |
395 | * ata_scsi_start_stop_xlat - Translate SCSI START STOP UNIT command | ||
396 | * @qc: Storage for translated ATA taskfile | ||
397 | * @scsicmd: SCSI command to translate | ||
398 | * | ||
399 | * Sets up an ATA taskfile to issue STANDBY (to stop) or READ VERIFY | ||
400 | * (to start). Perhaps these commands should be preceded by | ||
401 | * CHECK POWER MODE to see what power mode the device is already in. | ||
402 | * [See SAT revision 5 at www.t10.org] | ||
403 | * | ||
404 | * LOCKING: | ||
405 | * spin_lock_irqsave(host_set lock) | ||
406 | * | ||
407 | * RETURNS: | ||
408 | * Zero on success, non-zero on error. | ||
409 | */ | ||
410 | |||
411 | static unsigned int ata_scsi_start_stop_xlat(struct ata_queued_cmd *qc, | ||
412 | u8 *scsicmd) | ||
413 | { | ||
414 | struct ata_taskfile *tf = &qc->tf; | ||
415 | |||
416 | tf->flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR; | ||
417 | tf->protocol = ATA_PROT_NODATA; | ||
418 | if (scsicmd[1] & 0x1) { | ||
419 | ; /* ignore IMMED bit, violates sat-r05 */ | ||
420 | } | ||
421 | if (scsicmd[4] & 0x2) | ||
422 | return 1; /* LOEJ bit set not supported */ | ||
423 | if (((scsicmd[4] >> 4) & 0xf) != 0) | ||
424 | return 1; /* power conditions not supported */ | ||
425 | if (scsicmd[4] & 0x1) { | ||
426 | tf->nsect = 1; /* 1 sector, lba=0 */ | ||
427 | tf->lbah = 0x0; | ||
428 | tf->lbam = 0x0; | ||
429 | tf->lbal = 0x0; | ||
430 | tf->device |= ATA_LBA; | ||
431 | tf->command = ATA_CMD_VERIFY; /* READ VERIFY */ | ||
432 | } else { | ||
433 | tf->nsect = 0; /* time period value (0 implies now) */ | ||
434 | tf->command = ATA_CMD_STANDBY; | ||
435 | /* Consider: ATA STANDBY IMMEDIATE command */ | ||
436 | } | ||
437 | /* | ||
438 | * Standby and Idle condition timers could be implemented but that | ||
439 | * would require libata to implement the Power condition mode page | ||
440 | * and allow the user to change it. Changing mode pages requires | ||
441 | * MODE SELECT to be implemented. | ||
442 | */ | ||
443 | |||
444 | return 0; | ||
445 | } | ||
446 | |||
447 | |||
448 | /** | ||
395 | * ata_scsi_flush_xlat - Translate SCSI SYNCHRONIZE CACHE command | 449 | * ata_scsi_flush_xlat - Translate SCSI SYNCHRONIZE CACHE command |
396 | * @qc: Storage for translated ATA taskfile | 450 | * @qc: Storage for translated ATA taskfile |
397 | * @scsicmd: SCSI command to translate (ignored) | 451 | * @scsicmd: SCSI command to translate (ignored) |
@@ -576,11 +630,19 @@ static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc, u8 *scsicmd) | |||
576 | tf->lbah = scsicmd[3]; | 630 | tf->lbah = scsicmd[3]; |
577 | 631 | ||
578 | VPRINTK("ten-byte command\n"); | 632 | VPRINTK("ten-byte command\n"); |
633 | if (qc->nsect == 0) /* we don't support length==0 cmds */ | ||
634 | return 1; | ||
579 | return 0; | 635 | return 0; |
580 | } | 636 | } |
581 | 637 | ||
582 | if (scsicmd[0] == READ_6 || scsicmd[0] == WRITE_6) { | 638 | if (scsicmd[0] == READ_6 || scsicmd[0] == WRITE_6) { |
583 | qc->nsect = tf->nsect = scsicmd[4]; | 639 | qc->nsect = tf->nsect = scsicmd[4]; |
640 | if (!qc->nsect) { | ||
641 | qc->nsect = 256; | ||
642 | if (lba48) | ||
643 | tf->hob_nsect = 1; | ||
644 | } | ||
645 | |||
584 | tf->lbal = scsicmd[3]; | 646 | tf->lbal = scsicmd[3]; |
585 | tf->lbam = scsicmd[2]; | 647 | tf->lbam = scsicmd[2]; |
586 | tf->lbah = scsicmd[1] & 0x1f; /* mask out reserved bits */ | 648 | tf->lbah = scsicmd[1] & 0x1f; /* mask out reserved bits */ |
@@ -620,6 +682,8 @@ static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc, u8 *scsicmd) | |||
620 | tf->lbah = scsicmd[7]; | 682 | tf->lbah = scsicmd[7]; |
621 | 683 | ||
622 | VPRINTK("sixteen-byte command\n"); | 684 | VPRINTK("sixteen-byte command\n"); |
685 | if (qc->nsect == 0) /* we don't support length==0 cmds */ | ||
686 | return 1; | ||
623 | return 0; | 687 | return 0; |
624 | } | 688 | } |
625 | 689 | ||
@@ -1435,6 +1499,8 @@ static inline ata_xlat_func_t ata_get_xlat_func(struct ata_device *dev, u8 cmd) | |||
1435 | case VERIFY: | 1499 | case VERIFY: |
1436 | case VERIFY_16: | 1500 | case VERIFY_16: |
1437 | return ata_scsi_verify_xlat; | 1501 | return ata_scsi_verify_xlat; |
1502 | case START_STOP: | ||
1503 | return ata_scsi_start_stop_xlat; | ||
1438 | } | 1504 | } |
1439 | 1505 | ||
1440 | return NULL; | 1506 | return NULL; |
diff --git a/drivers/scsi/libata.h b/drivers/scsi/libata.h index 3e7f4843020f..620d21772bd6 100644 --- a/drivers/scsi/libata.h +++ b/drivers/scsi/libata.h | |||
@@ -72,7 +72,7 @@ extern unsigned int ata_scsiop_report_luns(struct ata_scsi_args *args, u8 *rbuf, | |||
72 | extern void ata_scsi_badcmd(struct scsi_cmnd *cmd, | 72 | extern void ata_scsi_badcmd(struct scsi_cmnd *cmd, |
73 | void (*done)(struct scsi_cmnd *), | 73 | void (*done)(struct scsi_cmnd *), |
74 | u8 asc, u8 ascq); | 74 | u8 asc, u8 ascq); |
75 | extern void ata_scsi_rbuf_fill(struct ata_scsi_args *args, | 75 | extern void ata_scsi_rbuf_fill(struct ata_scsi_args *args, |
76 | unsigned int (*actor) (struct ata_scsi_args *args, | 76 | unsigned int (*actor) (struct ata_scsi_args *args, |
77 | u8 *rbuf, unsigned int buflen)); | 77 | u8 *rbuf, unsigned int buflen)); |
78 | 78 | ||
diff --git a/drivers/scsi/sata_nv.c b/drivers/scsi/sata_nv.c index b0403ccd8a25..41a3421b02b4 100644 --- a/drivers/scsi/sata_nv.c +++ b/drivers/scsi/sata_nv.c | |||
@@ -20,6 +20,12 @@ | |||
20 | * If you do not delete the provisions above, a recipient may use your | 20 | * If you do not delete the provisions above, a recipient may use your |
21 | * version of this file under either the OSL or the GPL. | 21 | * version of this file under either the OSL or the GPL. |
22 | * | 22 | * |
23 | * 0.08 | ||
24 | * - Added support for MCP51 and MCP55. | ||
25 | * | ||
26 | * 0.07 | ||
27 | * - Added support for RAID class code. | ||
28 | * | ||
23 | * 0.06 | 29 | * 0.06 |
24 | * - Added generic SATA support by using a pci_device_id that filters on | 30 | * - Added generic SATA support by using a pci_device_id that filters on |
25 | * the IDE storage class code. | 31 | * the IDE storage class code. |
@@ -48,7 +54,7 @@ | |||
48 | #include <linux/libata.h> | 54 | #include <linux/libata.h> |
49 | 55 | ||
50 | #define DRV_NAME "sata_nv" | 56 | #define DRV_NAME "sata_nv" |
51 | #define DRV_VERSION "0.6" | 57 | #define DRV_VERSION "0.8" |
52 | 58 | ||
53 | #define NV_PORTS 2 | 59 | #define NV_PORTS 2 |
54 | #define NV_PIO_MASK 0x1f | 60 | #define NV_PIO_MASK 0x1f |
@@ -116,7 +122,9 @@ enum nv_host_type | |||
116 | GENERIC, | 122 | GENERIC, |
117 | NFORCE2, | 123 | NFORCE2, |
118 | NFORCE3, | 124 | NFORCE3, |
119 | CK804 | 125 | CK804, |
126 | MCP51, | ||
127 | MCP55 | ||
120 | }; | 128 | }; |
121 | 129 | ||
122 | static struct pci_device_id nv_pci_tbl[] = { | 130 | static struct pci_device_id nv_pci_tbl[] = { |
@@ -134,9 +142,18 @@ static struct pci_device_id nv_pci_tbl[] = { | |||
134 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 }, | 142 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 }, |
135 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2, | 143 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SATA2, |
136 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 }, | 144 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, CK804 }, |
145 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA, | ||
146 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, MCP51 }, | ||
147 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SATA2, | ||
148 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, MCP51 }, | ||
149 | { PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA, | ||
150 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, MCP55 }, | ||
137 | { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, | 151 | { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, |
138 | PCI_ANY_ID, PCI_ANY_ID, | 152 | PCI_ANY_ID, PCI_ANY_ID, |
139 | PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC }, | 153 | PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC }, |
154 | { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, | ||
155 | PCI_ANY_ID, PCI_ANY_ID, | ||
156 | PCI_CLASS_STORAGE_RAID<<8, 0xffff00, GENERIC }, | ||
140 | { 0, } /* terminate list */ | 157 | { 0, } /* terminate list */ |
141 | }; | 158 | }; |
142 | 159 | ||
@@ -274,7 +291,8 @@ static irqreturn_t nv_interrupt (int irq, void *dev_instance, | |||
274 | struct ata_port *ap; | 291 | struct ata_port *ap; |
275 | 292 | ||
276 | ap = host_set->ports[i]; | 293 | ap = host_set->ports[i]; |
277 | if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { | 294 | if (ap && |
295 | !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) { | ||
278 | struct ata_queued_cmd *qc; | 296 | struct ata_queued_cmd *qc; |
279 | 297 | ||
280 | qc = ata_qc_from_tag(ap, ap->active_tag); | 298 | qc = ata_qc_from_tag(ap, ap->active_tag); |
diff --git a/drivers/scsi/sata_promise.c b/drivers/scsi/sata_promise.c index 919fb314ad10..b8dc49fed769 100644 --- a/drivers/scsi/sata_promise.c +++ b/drivers/scsi/sata_promise.c | |||
@@ -181,6 +181,10 @@ static struct pci_device_id pdc_ata_pci_tbl[] = { | |||
181 | board_20319 }, | 181 | board_20319 }, |
182 | { PCI_VENDOR_ID_PROMISE, 0x3319, PCI_ANY_ID, PCI_ANY_ID, 0, 0, | 182 | { PCI_VENDOR_ID_PROMISE, 0x3319, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
183 | board_20319 }, | 183 | board_20319 }, |
184 | { PCI_VENDOR_ID_PROMISE, 0x3519, PCI_ANY_ID, PCI_ANY_ID, 0, 0, | ||
185 | board_20319 }, | ||
186 | { PCI_VENDOR_ID_PROMISE, 0x3d17, PCI_ANY_ID, PCI_ANY_ID, 0, 0, | ||
187 | board_20319 }, | ||
184 | { PCI_VENDOR_ID_PROMISE, 0x3d18, PCI_ANY_ID, PCI_ANY_ID, 0, 0, | 188 | { PCI_VENDOR_ID_PROMISE, 0x3d18, PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
185 | board_20319 }, | 189 | board_20319 }, |
186 | 190 | ||
@@ -321,11 +325,15 @@ static void pdc_qc_prep(struct ata_queued_cmd *qc) | |||
321 | 325 | ||
322 | static void pdc_eng_timeout(struct ata_port *ap) | 326 | static void pdc_eng_timeout(struct ata_port *ap) |
323 | { | 327 | { |
328 | struct ata_host_set *host_set = ap->host_set; | ||
324 | u8 drv_stat; | 329 | u8 drv_stat; |
325 | struct ata_queued_cmd *qc; | 330 | struct ata_queued_cmd *qc; |
331 | unsigned long flags; | ||
326 | 332 | ||
327 | DPRINTK("ENTER\n"); | 333 | DPRINTK("ENTER\n"); |
328 | 334 | ||
335 | spin_lock_irqsave(&host_set->lock, flags); | ||
336 | |||
329 | qc = ata_qc_from_tag(ap, ap->active_tag); | 337 | qc = ata_qc_from_tag(ap, ap->active_tag); |
330 | if (!qc) { | 338 | if (!qc) { |
331 | printk(KERN_ERR "ata%u: BUG: timeout without command\n", | 339 | printk(KERN_ERR "ata%u: BUG: timeout without command\n", |
@@ -359,6 +367,7 @@ static void pdc_eng_timeout(struct ata_port *ap) | |||
359 | } | 367 | } |
360 | 368 | ||
361 | out: | 369 | out: |
370 | spin_unlock_irqrestore(&host_set->lock, flags); | ||
362 | DPRINTK("EXIT\n"); | 371 | DPRINTK("EXIT\n"); |
363 | } | 372 | } |
364 | 373 | ||
@@ -441,7 +450,8 @@ static irqreturn_t pdc_interrupt (int irq, void *dev_instance, struct pt_regs *r | |||
441 | VPRINTK("port %u\n", i); | 450 | VPRINTK("port %u\n", i); |
442 | ap = host_set->ports[i]; | 451 | ap = host_set->ports[i]; |
443 | tmp = mask & (1 << (i + 1)); | 452 | tmp = mask & (1 << (i + 1)); |
444 | if (tmp && ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { | 453 | if (tmp && ap && |
454 | !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) { | ||
445 | struct ata_queued_cmd *qc; | 455 | struct ata_queued_cmd *qc; |
446 | 456 | ||
447 | qc = ata_qc_from_tag(ap, ap->active_tag); | 457 | qc = ata_qc_from_tag(ap, ap->active_tag); |
diff --git a/drivers/scsi/sata_qstor.c b/drivers/scsi/sata_qstor.c index 1383e8a28d72..93fd06fb4f15 100644 --- a/drivers/scsi/sata_qstor.c +++ b/drivers/scsi/sata_qstor.c | |||
@@ -117,7 +117,7 @@ static void qs_phy_reset(struct ata_port *ap); | |||
117 | static void qs_qc_prep(struct ata_queued_cmd *qc); | 117 | static void qs_qc_prep(struct ata_queued_cmd *qc); |
118 | static int qs_qc_issue(struct ata_queued_cmd *qc); | 118 | static int qs_qc_issue(struct ata_queued_cmd *qc); |
119 | static int qs_check_atapi_dma(struct ata_queued_cmd *qc); | 119 | static int qs_check_atapi_dma(struct ata_queued_cmd *qc); |
120 | static void qs_bmdma_stop(struct ata_port *ap); | 120 | static void qs_bmdma_stop(struct ata_queued_cmd *qc); |
121 | static u8 qs_bmdma_status(struct ata_port *ap); | 121 | static u8 qs_bmdma_status(struct ata_port *ap); |
122 | static void qs_irq_clear(struct ata_port *ap); | 122 | static void qs_irq_clear(struct ata_port *ap); |
123 | static void qs_eng_timeout(struct ata_port *ap); | 123 | static void qs_eng_timeout(struct ata_port *ap); |
@@ -198,7 +198,7 @@ static int qs_check_atapi_dma(struct ata_queued_cmd *qc) | |||
198 | return 1; /* ATAPI DMA not supported */ | 198 | return 1; /* ATAPI DMA not supported */ |
199 | } | 199 | } |
200 | 200 | ||
201 | static void qs_bmdma_stop(struct ata_port *ap) | 201 | static void qs_bmdma_stop(struct ata_queued_cmd *qc) |
202 | { | 202 | { |
203 | /* nothing */ | 203 | /* nothing */ |
204 | } | 204 | } |
@@ -386,7 +386,8 @@ static inline unsigned int qs_intr_pkt(struct ata_host_set *host_set) | |||
386 | DPRINTK("SFF=%08x%08x: sCHAN=%u sHST=%d sDST=%02x\n", | 386 | DPRINTK("SFF=%08x%08x: sCHAN=%u sHST=%d sDST=%02x\n", |
387 | sff1, sff0, port_no, sHST, sDST); | 387 | sff1, sff0, port_no, sHST, sDST); |
388 | handled = 1; | 388 | handled = 1; |
389 | if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { | 389 | if (ap && !(ap->flags & |
390 | (ATA_FLAG_PORT_DISABLED|ATA_FLAG_NOINTR))) { | ||
390 | struct ata_queued_cmd *qc; | 391 | struct ata_queued_cmd *qc; |
391 | struct qs_port_priv *pp = ap->private_data; | 392 | struct qs_port_priv *pp = ap->private_data; |
392 | if (!pp || pp->state != qs_state_pkt) | 393 | if (!pp || pp->state != qs_state_pkt) |
@@ -417,7 +418,8 @@ static inline unsigned int qs_intr_mmio(struct ata_host_set *host_set) | |||
417 | for (port_no = 0; port_no < host_set->n_ports; ++port_no) { | 418 | for (port_no = 0; port_no < host_set->n_ports; ++port_no) { |
418 | struct ata_port *ap; | 419 | struct ata_port *ap; |
419 | ap = host_set->ports[port_no]; | 420 | ap = host_set->ports[port_no]; |
420 | if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { | 421 | if (ap && |
422 | !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) { | ||
421 | struct ata_queued_cmd *qc; | 423 | struct ata_queued_cmd *qc; |
422 | struct qs_port_priv *pp = ap->private_data; | 424 | struct qs_port_priv *pp = ap->private_data; |
423 | if (!pp || pp->state != qs_state_mmio) | 425 | if (!pp || pp->state != qs_state_mmio) |
@@ -431,7 +433,7 @@ static inline unsigned int qs_intr_mmio(struct ata_host_set *host_set) | |||
431 | continue; | 433 | continue; |
432 | DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n", | 434 | DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n", |
433 | ap->id, qc->tf.protocol, status); | 435 | ap->id, qc->tf.protocol, status); |
434 | 436 | ||
435 | /* complete taskfile transaction */ | 437 | /* complete taskfile transaction */ |
436 | pp->state = qs_state_idle; | 438 | pp->state = qs_state_idle; |
437 | ata_qc_complete(qc, status); | 439 | ata_qc_complete(qc, status); |
diff --git a/drivers/scsi/sata_sil.c b/drivers/scsi/sata_sil.c index 49ed557a4b66..9d24d6c328b4 100644 --- a/drivers/scsi/sata_sil.c +++ b/drivers/scsi/sata_sil.c | |||
@@ -24,6 +24,11 @@ | |||
24 | * If you do not delete the provisions above, a recipient may use your | 24 | * If you do not delete the provisions above, a recipient may use your |
25 | * version of this file under either the OSL or the GPL. | 25 | * version of this file under either the OSL or the GPL. |
26 | * | 26 | * |
27 | * Documentation for SiI 3112: | ||
28 | * http://gkernel.sourceforge.net/specs/sii/3112A_SiI-DS-0095-B2.pdf.bz2 | ||
29 | * | ||
30 | * Other errata and documentation available under NDA. | ||
31 | * | ||
27 | */ | 32 | */ |
28 | 33 | ||
29 | #include <linux/kernel.h> | 34 | #include <linux/kernel.h> |
@@ -41,8 +46,11 @@ | |||
41 | #define DRV_VERSION "0.9" | 46 | #define DRV_VERSION "0.9" |
42 | 47 | ||
43 | enum { | 48 | enum { |
49 | SIL_FLAG_MOD15WRITE = (1 << 30), | ||
50 | |||
44 | sil_3112 = 0, | 51 | sil_3112 = 0, |
45 | sil_3114 = 1, | 52 | sil_3112_m15w = 1, |
53 | sil_3114 = 2, | ||
46 | 54 | ||
47 | SIL_FIFO_R0 = 0x40, | 55 | SIL_FIFO_R0 = 0x40, |
48 | SIL_FIFO_W0 = 0x41, | 56 | SIL_FIFO_W0 = 0x41, |
@@ -76,13 +84,13 @@ static void sil_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val); | |||
76 | static void sil_post_set_mode (struct ata_port *ap); | 84 | static void sil_post_set_mode (struct ata_port *ap); |
77 | 85 | ||
78 | static struct pci_device_id sil_pci_tbl[] = { | 86 | static struct pci_device_id sil_pci_tbl[] = { |
79 | { 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, | 87 | { 0x1095, 0x3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, |
80 | { 0x1095, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, | 88 | { 0x1095, 0x0240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, |
81 | { 0x1095, 0x3512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, | 89 | { 0x1095, 0x3512, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, |
82 | { 0x1095, 0x3114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3114 }, | 90 | { 0x1095, 0x3114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3114 }, |
83 | { 0x1002, 0x436e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, | 91 | { 0x1002, 0x436e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, |
84 | { 0x1002, 0x4379, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, | 92 | { 0x1002, 0x4379, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, |
85 | { 0x1002, 0x437a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112 }, | 93 | { 0x1002, 0x437a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, sil_3112_m15w }, |
86 | { } /* terminate list */ | 94 | { } /* terminate list */ |
87 | }; | 95 | }; |
88 | 96 | ||
@@ -174,6 +182,16 @@ static struct ata_port_info sil_port_info[] = { | |||
174 | .mwdma_mask = 0x07, /* mwdma0-2 */ | 182 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
175 | .udma_mask = 0x3f, /* udma0-5 */ | 183 | .udma_mask = 0x3f, /* udma0-5 */ |
176 | .port_ops = &sil_ops, | 184 | .port_ops = &sil_ops, |
185 | }, /* sil_3112_15w - keep it sync'd w/ sil_3112 */ | ||
186 | { | ||
187 | .sht = &sil_sht, | ||
188 | .host_flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | | ||
189 | ATA_FLAG_SRST | ATA_FLAG_MMIO | | ||
190 | SIL_FLAG_MOD15WRITE, | ||
191 | .pio_mask = 0x1f, /* pio0-4 */ | ||
192 | .mwdma_mask = 0x07, /* mwdma0-2 */ | ||
193 | .udma_mask = 0x3f, /* udma0-5 */ | ||
194 | .port_ops = &sil_ops, | ||
177 | }, /* sil_3114 */ | 195 | }, /* sil_3114 */ |
178 | { | 196 | { |
179 | .sht = &sil_sht, | 197 | .sht = &sil_sht, |
@@ -323,15 +341,15 @@ static void sil_dev_config(struct ata_port *ap, struct ata_device *dev) | |||
323 | while ((len > 0) && (s[len - 1] == ' ')) | 341 | while ((len > 0) && (s[len - 1] == ' ')) |
324 | len--; | 342 | len--; |
325 | 343 | ||
326 | for (n = 0; sil_blacklist[n].product; n++) | 344 | for (n = 0; sil_blacklist[n].product; n++) |
327 | if (!memcmp(sil_blacklist[n].product, s, | 345 | if (!memcmp(sil_blacklist[n].product, s, |
328 | strlen(sil_blacklist[n].product))) { | 346 | strlen(sil_blacklist[n].product))) { |
329 | quirks = sil_blacklist[n].quirk; | 347 | quirks = sil_blacklist[n].quirk; |
330 | break; | 348 | break; |
331 | } | 349 | } |
332 | 350 | ||
333 | /* limit requests to 15 sectors */ | 351 | /* limit requests to 15 sectors */ |
334 | if (quirks & SIL_QUIRK_MOD15WRITE) { | 352 | if ((ap->flags & SIL_FLAG_MOD15WRITE) && (quirks & SIL_QUIRK_MOD15WRITE)) { |
335 | printk(KERN_INFO "ata%u(%u): applying Seagate errata fix\n", | 353 | printk(KERN_INFO "ata%u(%u): applying Seagate errata fix\n", |
336 | ap->id, dev->devno); | 354 | ap->id, dev->devno); |
337 | ap->host->max_sectors = 15; | 355 | ap->host->max_sectors = 15; |
diff --git a/drivers/scsi/sata_sis.c b/drivers/scsi/sata_sis.c index e418b89c6b9d..b250ae0c7773 100644 --- a/drivers/scsi/sata_sis.c +++ b/drivers/scsi/sata_sis.c | |||
@@ -234,7 +234,7 @@ static int sis_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
234 | pci_read_config_dword(pdev, SIS_GENCTL, &genctl); | 234 | pci_read_config_dword(pdev, SIS_GENCTL, &genctl); |
235 | if ((genctl & GENCTL_IOMAPPED_SCR) == 0) | 235 | if ((genctl & GENCTL_IOMAPPED_SCR) == 0) |
236 | probe_ent->host_flags |= SIS_FLAG_CFGSCR; | 236 | probe_ent->host_flags |= SIS_FLAG_CFGSCR; |
237 | 237 | ||
238 | /* if hardware thinks SCRs are in IO space, but there are | 238 | /* if hardware thinks SCRs are in IO space, but there are |
239 | * no IO resources assigned, change to PCI cfg space. | 239 | * no IO resources assigned, change to PCI cfg space. |
240 | */ | 240 | */ |
diff --git a/drivers/scsi/sata_svw.c b/drivers/scsi/sata_svw.c index 858e07185dbd..6fd2ce1ffcd8 100644 --- a/drivers/scsi/sata_svw.c +++ b/drivers/scsi/sata_svw.c | |||
@@ -195,18 +195,18 @@ static void k2_bmdma_start_mmio (struct ata_queued_cmd *qc) | |||
195 | /* start host DMA transaction */ | 195 | /* start host DMA transaction */ |
196 | dmactl = readb(mmio + ATA_DMA_CMD); | 196 | dmactl = readb(mmio + ATA_DMA_CMD); |
197 | writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD); | 197 | writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD); |
198 | /* There is a race condition in certain SATA controllers that can | 198 | /* There is a race condition in certain SATA controllers that can |
199 | be seen when the r/w command is given to the controller before the | 199 | be seen when the r/w command is given to the controller before the |
200 | host DMA is started. On a Read command, the controller would initiate | 200 | host DMA is started. On a Read command, the controller would initiate |
201 | the command to the drive even before it sees the DMA start. When there | 201 | the command to the drive even before it sees the DMA start. When there |
202 | are very fast drives connected to the controller, or when the data request | 202 | are very fast drives connected to the controller, or when the data request |
203 | hits in the drive cache, there is the possibility that the drive returns a part | 203 | hits in the drive cache, there is the possibility that the drive returns a part |
204 | or all of the requested data to the controller before the DMA start is issued. | 204 | or all of the requested data to the controller before the DMA start is issued. |
205 | In this case, the controller would become confused as to what to do with the data. | 205 | In this case, the controller would become confused as to what to do with the data. |
206 | In the worst case when all the data is returned back to the controller, the | 206 | In the worst case when all the data is returned back to the controller, the |
207 | controller could hang. In other cases it could return partial data returning | 207 | controller could hang. In other cases it could return partial data returning |
208 | in data corruption. This problem has been seen in PPC systems and can also appear | 208 | in data corruption. This problem has been seen in PPC systems and can also appear |
209 | on an system with very fast disks, where the SATA controller is sitting behind a | 209 | on an system with very fast disks, where the SATA controller is sitting behind a |
210 | number of bridges, and hence there is significant latency between the r/w command | 210 | number of bridges, and hence there is significant latency between the r/w command |
211 | and the start command. */ | 211 | and the start command. */ |
212 | /* issue r/w command if the access is to ATA*/ | 212 | /* issue r/w command if the access is to ATA*/ |
@@ -214,7 +214,7 @@ static void k2_bmdma_start_mmio (struct ata_queued_cmd *qc) | |||
214 | ap->ops->exec_command(ap, &qc->tf); | 214 | ap->ops->exec_command(ap, &qc->tf); |
215 | } | 215 | } |
216 | 216 | ||
217 | 217 | ||
218 | static u8 k2_stat_check_status(struct ata_port *ap) | 218 | static u8 k2_stat_check_status(struct ata_port *ap) |
219 | { | 219 | { |
220 | return readl((void *) ap->ioaddr.status_addr); | 220 | return readl((void *) ap->ioaddr.status_addr); |
diff --git a/drivers/scsi/sata_sx4.c b/drivers/scsi/sata_sx4.c index efd7d7a61135..a20d4285090a 100644 --- a/drivers/scsi/sata_sx4.c +++ b/drivers/scsi/sata_sx4.c | |||
@@ -94,7 +94,7 @@ enum { | |||
94 | PDC_DIMM1_CONTROL_OFFSET = 0x84, | 94 | PDC_DIMM1_CONTROL_OFFSET = 0x84, |
95 | PDC_SDRAM_CONTROL_OFFSET = 0x88, | 95 | PDC_SDRAM_CONTROL_OFFSET = 0x88, |
96 | PDC_I2C_WRITE = 0x00000000, | 96 | PDC_I2C_WRITE = 0x00000000, |
97 | PDC_I2C_READ = 0x00000040, | 97 | PDC_I2C_READ = 0x00000040, |
98 | PDC_I2C_START = 0x00000080, | 98 | PDC_I2C_START = 0x00000080, |
99 | PDC_I2C_MASK_INT = 0x00000020, | 99 | PDC_I2C_MASK_INT = 0x00000020, |
100 | PDC_I2C_COMPLETE = 0x00010000, | 100 | PDC_I2C_COMPLETE = 0x00010000, |
@@ -105,16 +105,16 @@ enum { | |||
105 | PDC_DIMM_SPD_COLUMN_NUM = 4, | 105 | PDC_DIMM_SPD_COLUMN_NUM = 4, |
106 | PDC_DIMM_SPD_MODULE_ROW = 5, | 106 | PDC_DIMM_SPD_MODULE_ROW = 5, |
107 | PDC_DIMM_SPD_TYPE = 11, | 107 | PDC_DIMM_SPD_TYPE = 11, |
108 | PDC_DIMM_SPD_FRESH_RATE = 12, | 108 | PDC_DIMM_SPD_FRESH_RATE = 12, |
109 | PDC_DIMM_SPD_BANK_NUM = 17, | 109 | PDC_DIMM_SPD_BANK_NUM = 17, |
110 | PDC_DIMM_SPD_CAS_LATENCY = 18, | 110 | PDC_DIMM_SPD_CAS_LATENCY = 18, |
111 | PDC_DIMM_SPD_ATTRIBUTE = 21, | 111 | PDC_DIMM_SPD_ATTRIBUTE = 21, |
112 | PDC_DIMM_SPD_ROW_PRE_CHARGE = 27, | 112 | PDC_DIMM_SPD_ROW_PRE_CHARGE = 27, |
113 | PDC_DIMM_SPD_ROW_ACTIVE_DELAY = 28, | 113 | PDC_DIMM_SPD_ROW_ACTIVE_DELAY = 28, |
114 | PDC_DIMM_SPD_RAS_CAS_DELAY = 29, | 114 | PDC_DIMM_SPD_RAS_CAS_DELAY = 29, |
115 | PDC_DIMM_SPD_ACTIVE_PRECHARGE = 30, | 115 | PDC_DIMM_SPD_ACTIVE_PRECHARGE = 30, |
116 | PDC_DIMM_SPD_SYSTEM_FREQ = 126, | 116 | PDC_DIMM_SPD_SYSTEM_FREQ = 126, |
117 | PDC_CTL_STATUS = 0x08, | 117 | PDC_CTL_STATUS = 0x08, |
118 | PDC_DIMM_WINDOW_CTLR = 0x0C, | 118 | PDC_DIMM_WINDOW_CTLR = 0x0C, |
119 | PDC_TIME_CONTROL = 0x3C, | 119 | PDC_TIME_CONTROL = 0x3C, |
120 | PDC_TIME_PERIOD = 0x40, | 120 | PDC_TIME_PERIOD = 0x40, |
@@ -157,15 +157,15 @@ static void pdc_exec_command_mmio(struct ata_port *ap, struct ata_taskfile *tf); | |||
157 | static void pdc20621_host_stop(struct ata_host_set *host_set); | 157 | static void pdc20621_host_stop(struct ata_host_set *host_set); |
158 | static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe); | 158 | static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe); |
159 | static int pdc20621_detect_dimm(struct ata_probe_ent *pe); | 159 | static int pdc20621_detect_dimm(struct ata_probe_ent *pe); |
160 | static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, | 160 | static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, |
161 | u32 device, u32 subaddr, u32 *pdata); | 161 | u32 device, u32 subaddr, u32 *pdata); |
162 | static int pdc20621_prog_dimm0(struct ata_probe_ent *pe); | 162 | static int pdc20621_prog_dimm0(struct ata_probe_ent *pe); |
163 | static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe); | 163 | static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe); |
164 | #ifdef ATA_VERBOSE_DEBUG | 164 | #ifdef ATA_VERBOSE_DEBUG |
165 | static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, | 165 | static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, |
166 | void *psource, u32 offset, u32 size); | 166 | void *psource, u32 offset, u32 size); |
167 | #endif | 167 | #endif |
168 | static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, | 168 | static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, |
169 | void *psource, u32 offset, u32 size); | 169 | void *psource, u32 offset, u32 size); |
170 | static void pdc20621_irq_clear(struct ata_port *ap); | 170 | static void pdc20621_irq_clear(struct ata_port *ap); |
171 | static int pdc20621_qc_issue_prot(struct ata_queued_cmd *qc); | 171 | static int pdc20621_qc_issue_prot(struct ata_queued_cmd *qc); |
@@ -825,7 +825,8 @@ static irqreturn_t pdc20621_interrupt (int irq, void *dev_instance, struct pt_re | |||
825 | ap = host_set->ports[port_no]; | 825 | ap = host_set->ports[port_no]; |
826 | tmp = mask & (1 << i); | 826 | tmp = mask & (1 << i); |
827 | VPRINTK("seq %u, port_no %u, ap %p, tmp %x\n", i, port_no, ap, tmp); | 827 | VPRINTK("seq %u, port_no %u, ap %p, tmp %x\n", i, port_no, ap, tmp); |
828 | if (tmp && ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { | 828 | if (tmp && ap && |
829 | !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) { | ||
829 | struct ata_queued_cmd *qc; | 830 | struct ata_queued_cmd *qc; |
830 | 831 | ||
831 | qc = ata_qc_from_tag(ap, ap->active_tag); | 832 | qc = ata_qc_from_tag(ap, ap->active_tag); |
@@ -847,10 +848,14 @@ static irqreturn_t pdc20621_interrupt (int irq, void *dev_instance, struct pt_re | |||
847 | static void pdc_eng_timeout(struct ata_port *ap) | 848 | static void pdc_eng_timeout(struct ata_port *ap) |
848 | { | 849 | { |
849 | u8 drv_stat; | 850 | u8 drv_stat; |
851 | struct ata_host_set *host_set = ap->host_set; | ||
850 | struct ata_queued_cmd *qc; | 852 | struct ata_queued_cmd *qc; |
853 | unsigned long flags; | ||
851 | 854 | ||
852 | DPRINTK("ENTER\n"); | 855 | DPRINTK("ENTER\n"); |
853 | 856 | ||
857 | spin_lock_irqsave(&host_set->lock, flags); | ||
858 | |||
854 | qc = ata_qc_from_tag(ap, ap->active_tag); | 859 | qc = ata_qc_from_tag(ap, ap->active_tag); |
855 | if (!qc) { | 860 | if (!qc) { |
856 | printk(KERN_ERR "ata%u: BUG: timeout without command\n", | 861 | printk(KERN_ERR "ata%u: BUG: timeout without command\n", |
@@ -884,6 +889,7 @@ static void pdc_eng_timeout(struct ata_port *ap) | |||
884 | } | 889 | } |
885 | 890 | ||
886 | out: | 891 | out: |
892 | spin_unlock_irqrestore(&host_set->lock, flags); | ||
887 | DPRINTK("EXIT\n"); | 893 | DPRINTK("EXIT\n"); |
888 | } | 894 | } |
889 | 895 | ||
@@ -922,7 +928,7 @@ static void pdc_sata_setup_port(struct ata_ioports *port, unsigned long base) | |||
922 | 928 | ||
923 | 929 | ||
924 | #ifdef ATA_VERBOSE_DEBUG | 930 | #ifdef ATA_VERBOSE_DEBUG |
925 | static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource, | 931 | static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource, |
926 | u32 offset, u32 size) | 932 | u32 offset, u32 size) |
927 | { | 933 | { |
928 | u32 window_size; | 934 | u32 window_size; |
@@ -936,9 +942,9 @@ static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource, | |||
936 | /* hard-code chip #0 */ | 942 | /* hard-code chip #0 */ |
937 | mmio += PDC_CHIP0_OFS; | 943 | mmio += PDC_CHIP0_OFS; |
938 | 944 | ||
939 | page_mask = 0x00; | 945 | page_mask = 0x00; |
940 | window_size = 0x2000 * 4; /* 32K byte uchar size */ | 946 | window_size = 0x2000 * 4; /* 32K byte uchar size */ |
941 | idx = (u16) (offset / window_size); | 947 | idx = (u16) (offset / window_size); |
942 | 948 | ||
943 | writel(0x01, mmio + PDC_GENERAL_CTLR); | 949 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
944 | readl(mmio + PDC_GENERAL_CTLR); | 950 | readl(mmio + PDC_GENERAL_CTLR); |
@@ -947,19 +953,19 @@ static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource, | |||
947 | 953 | ||
948 | offset -= (idx * window_size); | 954 | offset -= (idx * window_size); |
949 | idx++; | 955 | idx++; |
950 | dist = ((long) (window_size - (offset + size))) >= 0 ? size : | 956 | dist = ((long) (window_size - (offset + size))) >= 0 ? size : |
951 | (long) (window_size - offset); | 957 | (long) (window_size - offset); |
952 | memcpy_fromio((char *) psource, (char *) (dimm_mmio + offset / 4), | 958 | memcpy_fromio((char *) psource, (char *) (dimm_mmio + offset / 4), |
953 | dist); | 959 | dist); |
954 | 960 | ||
955 | psource += dist; | 961 | psource += dist; |
956 | size -= dist; | 962 | size -= dist; |
957 | for (; (long) size >= (long) window_size ;) { | 963 | for (; (long) size >= (long) window_size ;) { |
958 | writel(0x01, mmio + PDC_GENERAL_CTLR); | 964 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
959 | readl(mmio + PDC_GENERAL_CTLR); | 965 | readl(mmio + PDC_GENERAL_CTLR); |
960 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); | 966 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
961 | readl(mmio + PDC_DIMM_WINDOW_CTLR); | 967 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
962 | memcpy_fromio((char *) psource, (char *) (dimm_mmio), | 968 | memcpy_fromio((char *) psource, (char *) (dimm_mmio), |
963 | window_size / 4); | 969 | window_size / 4); |
964 | psource += window_size; | 970 | psource += window_size; |
965 | size -= window_size; | 971 | size -= window_size; |
@@ -971,14 +977,14 @@ static void pdc20621_get_from_dimm(struct ata_probe_ent *pe, void *psource, | |||
971 | readl(mmio + PDC_GENERAL_CTLR); | 977 | readl(mmio + PDC_GENERAL_CTLR); |
972 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); | 978 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
973 | readl(mmio + PDC_DIMM_WINDOW_CTLR); | 979 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
974 | memcpy_fromio((char *) psource, (char *) (dimm_mmio), | 980 | memcpy_fromio((char *) psource, (char *) (dimm_mmio), |
975 | size / 4); | 981 | size / 4); |
976 | } | 982 | } |
977 | } | 983 | } |
978 | #endif | 984 | #endif |
979 | 985 | ||
980 | 986 | ||
981 | static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, | 987 | static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, |
982 | u32 offset, u32 size) | 988 | u32 offset, u32 size) |
983 | { | 989 | { |
984 | u32 window_size; | 990 | u32 window_size; |
@@ -989,16 +995,16 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, | |||
989 | struct pdc_host_priv *hpriv = pe->private_data; | 995 | struct pdc_host_priv *hpriv = pe->private_data; |
990 | void *dimm_mmio = hpriv->dimm_mmio; | 996 | void *dimm_mmio = hpriv->dimm_mmio; |
991 | 997 | ||
992 | /* hard-code chip #0 */ | 998 | /* hard-code chip #0 */ |
993 | mmio += PDC_CHIP0_OFS; | 999 | mmio += PDC_CHIP0_OFS; |
994 | 1000 | ||
995 | page_mask = 0x00; | 1001 | page_mask = 0x00; |
996 | window_size = 0x2000 * 4; /* 32K byte uchar size */ | 1002 | window_size = 0x2000 * 4; /* 32K byte uchar size */ |
997 | idx = (u16) (offset / window_size); | 1003 | idx = (u16) (offset / window_size); |
998 | 1004 | ||
999 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); | 1005 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
1000 | readl(mmio + PDC_DIMM_WINDOW_CTLR); | 1006 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
1001 | offset -= (idx * window_size); | 1007 | offset -= (idx * window_size); |
1002 | idx++; | 1008 | idx++; |
1003 | dist = ((long)(s32)(window_size - (offset + size))) >= 0 ? size : | 1009 | dist = ((long)(s32)(window_size - (offset + size))) >= 0 ? size : |
1004 | (long) (window_size - offset); | 1010 | (long) (window_size - offset); |
@@ -1006,12 +1012,12 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, | |||
1006 | writel(0x01, mmio + PDC_GENERAL_CTLR); | 1012 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
1007 | readl(mmio + PDC_GENERAL_CTLR); | 1013 | readl(mmio + PDC_GENERAL_CTLR); |
1008 | 1014 | ||
1009 | psource += dist; | 1015 | psource += dist; |
1010 | size -= dist; | 1016 | size -= dist; |
1011 | for (; (long) size >= (long) window_size ;) { | 1017 | for (; (long) size >= (long) window_size ;) { |
1012 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); | 1018 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
1013 | readl(mmio + PDC_DIMM_WINDOW_CTLR); | 1019 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
1014 | memcpy_toio((char *) (dimm_mmio), (char *) psource, | 1020 | memcpy_toio((char *) (dimm_mmio), (char *) psource, |
1015 | window_size / 4); | 1021 | window_size / 4); |
1016 | writel(0x01, mmio + PDC_GENERAL_CTLR); | 1022 | writel(0x01, mmio + PDC_GENERAL_CTLR); |
1017 | readl(mmio + PDC_GENERAL_CTLR); | 1023 | readl(mmio + PDC_GENERAL_CTLR); |
@@ -1019,7 +1025,7 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, | |||
1019 | size -= window_size; | 1025 | size -= window_size; |
1020 | idx ++; | 1026 | idx ++; |
1021 | } | 1027 | } |
1022 | 1028 | ||
1023 | if (size) { | 1029 | if (size) { |
1024 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); | 1030 | writel(((idx) << page_mask), mmio + PDC_DIMM_WINDOW_CTLR); |
1025 | readl(mmio + PDC_DIMM_WINDOW_CTLR); | 1031 | readl(mmio + PDC_DIMM_WINDOW_CTLR); |
@@ -1030,12 +1036,12 @@ static void pdc20621_put_to_dimm(struct ata_probe_ent *pe, void *psource, | |||
1030 | } | 1036 | } |
1031 | 1037 | ||
1032 | 1038 | ||
1033 | static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device, | 1039 | static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device, |
1034 | u32 subaddr, u32 *pdata) | 1040 | u32 subaddr, u32 *pdata) |
1035 | { | 1041 | { |
1036 | void *mmio = pe->mmio_base; | 1042 | void *mmio = pe->mmio_base; |
1037 | u32 i2creg = 0; | 1043 | u32 i2creg = 0; |
1038 | u32 status; | 1044 | u32 status; |
1039 | u32 count =0; | 1045 | u32 count =0; |
1040 | 1046 | ||
1041 | /* hard-code chip #0 */ | 1047 | /* hard-code chip #0 */ |
@@ -1049,7 +1055,7 @@ static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device, | |||
1049 | readl(mmio + PDC_I2C_ADDR_DATA_OFFSET); | 1055 | readl(mmio + PDC_I2C_ADDR_DATA_OFFSET); |
1050 | 1056 | ||
1051 | /* Write Control to perform read operation, mask int */ | 1057 | /* Write Control to perform read operation, mask int */ |
1052 | writel(PDC_I2C_READ | PDC_I2C_START | PDC_I2C_MASK_INT, | 1058 | writel(PDC_I2C_READ | PDC_I2C_START | PDC_I2C_MASK_INT, |
1053 | mmio + PDC_I2C_CONTROL_OFFSET); | 1059 | mmio + PDC_I2C_CONTROL_OFFSET); |
1054 | 1060 | ||
1055 | for (count = 0; count <= 1000; count ++) { | 1061 | for (count = 0; count <= 1000; count ++) { |
@@ -1062,26 +1068,26 @@ static unsigned int pdc20621_i2c_read(struct ata_probe_ent *pe, u32 device, | |||
1062 | } | 1068 | } |
1063 | 1069 | ||
1064 | *pdata = (status >> 8) & 0x000000ff; | 1070 | *pdata = (status >> 8) & 0x000000ff; |
1065 | return 1; | 1071 | return 1; |
1066 | } | 1072 | } |
1067 | 1073 | ||
1068 | 1074 | ||
1069 | static int pdc20621_detect_dimm(struct ata_probe_ent *pe) | 1075 | static int pdc20621_detect_dimm(struct ata_probe_ent *pe) |
1070 | { | 1076 | { |
1071 | u32 data=0 ; | 1077 | u32 data=0 ; |
1072 | if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, | 1078 | if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, |
1073 | PDC_DIMM_SPD_SYSTEM_FREQ, &data)) { | 1079 | PDC_DIMM_SPD_SYSTEM_FREQ, &data)) { |
1074 | if (data == 100) | 1080 | if (data == 100) |
1075 | return 100; | 1081 | return 100; |
1076 | } else | 1082 | } else |
1077 | return 0; | 1083 | return 0; |
1078 | 1084 | ||
1079 | if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 9, &data)) { | 1085 | if (pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, 9, &data)) { |
1080 | if(data <= 0x75) | 1086 | if(data <= 0x75) |
1081 | return 133; | 1087 | return 133; |
1082 | } else | 1088 | } else |
1083 | return 0; | 1089 | return 0; |
1084 | 1090 | ||
1085 | return 0; | 1091 | return 0; |
1086 | } | 1092 | } |
1087 | 1093 | ||
@@ -1091,15 +1097,15 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe) | |||
1091 | u32 spd0[50]; | 1097 | u32 spd0[50]; |
1092 | u32 data = 0; | 1098 | u32 data = 0; |
1093 | int size, i; | 1099 | int size, i; |
1094 | u8 bdimmsize; | 1100 | u8 bdimmsize; |
1095 | void *mmio = pe->mmio_base; | 1101 | void *mmio = pe->mmio_base; |
1096 | static const struct { | 1102 | static const struct { |
1097 | unsigned int reg; | 1103 | unsigned int reg; |
1098 | unsigned int ofs; | 1104 | unsigned int ofs; |
1099 | } pdc_i2c_read_data [] = { | 1105 | } pdc_i2c_read_data [] = { |
1100 | { PDC_DIMM_SPD_TYPE, 11 }, | 1106 | { PDC_DIMM_SPD_TYPE, 11 }, |
1101 | { PDC_DIMM_SPD_FRESH_RATE, 12 }, | 1107 | { PDC_DIMM_SPD_FRESH_RATE, 12 }, |
1102 | { PDC_DIMM_SPD_COLUMN_NUM, 4 }, | 1108 | { PDC_DIMM_SPD_COLUMN_NUM, 4 }, |
1103 | { PDC_DIMM_SPD_ATTRIBUTE, 21 }, | 1109 | { PDC_DIMM_SPD_ATTRIBUTE, 21 }, |
1104 | { PDC_DIMM_SPD_ROW_NUM, 3 }, | 1110 | { PDC_DIMM_SPD_ROW_NUM, 3 }, |
1105 | { PDC_DIMM_SPD_BANK_NUM, 17 }, | 1111 | { PDC_DIMM_SPD_BANK_NUM, 17 }, |
@@ -1108,7 +1114,7 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe) | |||
1108 | { PDC_DIMM_SPD_ROW_ACTIVE_DELAY, 28 }, | 1114 | { PDC_DIMM_SPD_ROW_ACTIVE_DELAY, 28 }, |
1109 | { PDC_DIMM_SPD_RAS_CAS_DELAY, 29 }, | 1115 | { PDC_DIMM_SPD_RAS_CAS_DELAY, 29 }, |
1110 | { PDC_DIMM_SPD_ACTIVE_PRECHARGE, 30 }, | 1116 | { PDC_DIMM_SPD_ACTIVE_PRECHARGE, 30 }, |
1111 | { PDC_DIMM_SPD_CAS_LATENCY, 18 }, | 1117 | { PDC_DIMM_SPD_CAS_LATENCY, 18 }, |
1112 | }; | 1118 | }; |
1113 | 1119 | ||
1114 | /* hard-code chip #0 */ | 1120 | /* hard-code chip #0 */ |
@@ -1116,17 +1122,17 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe) | |||
1116 | 1122 | ||
1117 | for(i=0; i<ARRAY_SIZE(pdc_i2c_read_data); i++) | 1123 | for(i=0; i<ARRAY_SIZE(pdc_i2c_read_data); i++) |
1118 | pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, | 1124 | pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, |
1119 | pdc_i2c_read_data[i].reg, | 1125 | pdc_i2c_read_data[i].reg, |
1120 | &spd0[pdc_i2c_read_data[i].ofs]); | 1126 | &spd0[pdc_i2c_read_data[i].ofs]); |
1121 | 1127 | ||
1122 | data |= (spd0[4] - 8) | ((spd0[21] != 0) << 3) | ((spd0[3]-11) << 4); | 1128 | data |= (spd0[4] - 8) | ((spd0[21] != 0) << 3) | ((spd0[3]-11) << 4); |
1123 | data |= ((spd0[17] / 4) << 6) | ((spd0[5] / 2) << 7) | | 1129 | data |= ((spd0[17] / 4) << 6) | ((spd0[5] / 2) << 7) | |
1124 | ((((spd0[27] + 9) / 10) - 1) << 8) ; | 1130 | ((((spd0[27] + 9) / 10) - 1) << 8) ; |
1125 | data |= (((((spd0[29] > spd0[28]) | 1131 | data |= (((((spd0[29] > spd0[28]) |
1126 | ? spd0[29] : spd0[28]) + 9) / 10) - 1) << 10; | 1132 | ? spd0[29] : spd0[28]) + 9) / 10) - 1) << 10; |
1127 | data |= ((spd0[30] - spd0[29] + 9) / 10 - 2) << 12; | 1133 | data |= ((spd0[30] - spd0[29] + 9) / 10 - 2) << 12; |
1128 | 1134 | ||
1129 | if (spd0[18] & 0x08) | 1135 | if (spd0[18] & 0x08) |
1130 | data |= ((0x03) << 14); | 1136 | data |= ((0x03) << 14); |
1131 | else if (spd0[18] & 0x04) | 1137 | else if (spd0[18] & 0x04) |
1132 | data |= ((0x02) << 14); | 1138 | data |= ((0x02) << 14); |
@@ -1135,7 +1141,7 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe) | |||
1135 | else | 1141 | else |
1136 | data |= (0 << 14); | 1142 | data |= (0 << 14); |
1137 | 1143 | ||
1138 | /* | 1144 | /* |
1139 | Calculate the size of bDIMMSize (power of 2) and | 1145 | Calculate the size of bDIMMSize (power of 2) and |
1140 | merge the DIMM size by program start/end address. | 1146 | merge the DIMM size by program start/end address. |
1141 | */ | 1147 | */ |
@@ -1145,9 +1151,9 @@ static int pdc20621_prog_dimm0(struct ata_probe_ent *pe) | |||
1145 | data |= (((size / 16) - 1) << 16); | 1151 | data |= (((size / 16) - 1) << 16); |
1146 | data |= (0 << 23); | 1152 | data |= (0 << 23); |
1147 | data |= 8; | 1153 | data |= 8; |
1148 | writel(data, mmio + PDC_DIMM0_CONTROL_OFFSET); | 1154 | writel(data, mmio + PDC_DIMM0_CONTROL_OFFSET); |
1149 | readl(mmio + PDC_DIMM0_CONTROL_OFFSET); | 1155 | readl(mmio + PDC_DIMM0_CONTROL_OFFSET); |
1150 | return size; | 1156 | return size; |
1151 | } | 1157 | } |
1152 | 1158 | ||
1153 | 1159 | ||
@@ -1167,12 +1173,12 @@ static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe) | |||
1167 | Refresh Enable (bit 17) | 1173 | Refresh Enable (bit 17) |
1168 | */ | 1174 | */ |
1169 | 1175 | ||
1170 | data = 0x022259F1; | 1176 | data = 0x022259F1; |
1171 | writel(data, mmio + PDC_SDRAM_CONTROL_OFFSET); | 1177 | writel(data, mmio + PDC_SDRAM_CONTROL_OFFSET); |
1172 | readl(mmio + PDC_SDRAM_CONTROL_OFFSET); | 1178 | readl(mmio + PDC_SDRAM_CONTROL_OFFSET); |
1173 | 1179 | ||
1174 | /* Turn on for ECC */ | 1180 | /* Turn on for ECC */ |
1175 | pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, | 1181 | pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, |
1176 | PDC_DIMM_SPD_TYPE, &spd0); | 1182 | PDC_DIMM_SPD_TYPE, &spd0); |
1177 | if (spd0 == 0x02) { | 1183 | if (spd0 == 0x02) { |
1178 | data |= (0x01 << 16); | 1184 | data |= (0x01 << 16); |
@@ -1186,22 +1192,22 @@ static unsigned int pdc20621_prog_dimm_global(struct ata_probe_ent *pe) | |||
1186 | data |= (1<<19); | 1192 | data |= (1<<19); |
1187 | writel(data, mmio + PDC_SDRAM_CONTROL_OFFSET); | 1193 | writel(data, mmio + PDC_SDRAM_CONTROL_OFFSET); |
1188 | 1194 | ||
1189 | error = 1; | 1195 | error = 1; |
1190 | for (i = 1; i <= 10; i++) { /* polling ~5 secs */ | 1196 | for (i = 1; i <= 10; i++) { /* polling ~5 secs */ |
1191 | data = readl(mmio + PDC_SDRAM_CONTROL_OFFSET); | 1197 | data = readl(mmio + PDC_SDRAM_CONTROL_OFFSET); |
1192 | if (!(data & (1<<19))) { | 1198 | if (!(data & (1<<19))) { |
1193 | error = 0; | 1199 | error = 0; |
1194 | break; | 1200 | break; |
1195 | } | 1201 | } |
1196 | msleep(i*100); | 1202 | msleep(i*100); |
1197 | } | 1203 | } |
1198 | return error; | 1204 | return error; |
1199 | } | 1205 | } |
1200 | 1206 | ||
1201 | 1207 | ||
1202 | static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) | 1208 | static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) |
1203 | { | 1209 | { |
1204 | int speed, size, length; | 1210 | int speed, size, length; |
1205 | u32 addr,spd0,pci_status; | 1211 | u32 addr,spd0,pci_status; |
1206 | u32 tmp=0; | 1212 | u32 tmp=0; |
1207 | u32 time_period=0; | 1213 | u32 time_period=0; |
@@ -1228,7 +1234,7 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) | |||
1228 | /* Wait 3 seconds */ | 1234 | /* Wait 3 seconds */ |
1229 | msleep(3000); | 1235 | msleep(3000); |
1230 | 1236 | ||
1231 | /* | 1237 | /* |
1232 | When timer is enabled, counter is decreased every internal | 1238 | When timer is enabled, counter is decreased every internal |
1233 | clock cycle. | 1239 | clock cycle. |
1234 | */ | 1240 | */ |
@@ -1236,24 +1242,24 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) | |||
1236 | tcount = readl(mmio + PDC_TIME_COUNTER); | 1242 | tcount = readl(mmio + PDC_TIME_COUNTER); |
1237 | VPRINTK("Time Counter Register (0x44): 0x%x\n", tcount); | 1243 | VPRINTK("Time Counter Register (0x44): 0x%x\n", tcount); |
1238 | 1244 | ||
1239 | /* | 1245 | /* |
1240 | If SX4 is on PCI-X bus, after 3 seconds, the timer counter | 1246 | If SX4 is on PCI-X bus, after 3 seconds, the timer counter |
1241 | register should be >= (0xffffffff - 3x10^8). | 1247 | register should be >= (0xffffffff - 3x10^8). |
1242 | */ | 1248 | */ |
1243 | if(tcount >= PCI_X_TCOUNT) { | 1249 | if(tcount >= PCI_X_TCOUNT) { |
1244 | ticks = (time_period - tcount); | 1250 | ticks = (time_period - tcount); |
1245 | VPRINTK("Num counters 0x%x (%d)\n", ticks, ticks); | 1251 | VPRINTK("Num counters 0x%x (%d)\n", ticks, ticks); |
1246 | 1252 | ||
1247 | clock = (ticks / 300000); | 1253 | clock = (ticks / 300000); |
1248 | VPRINTK("10 * Internal clk = 0x%x (%d)\n", clock, clock); | 1254 | VPRINTK("10 * Internal clk = 0x%x (%d)\n", clock, clock); |
1249 | 1255 | ||
1250 | clock = (clock * 33); | 1256 | clock = (clock * 33); |
1251 | VPRINTK("10 * Internal clk * 33 = 0x%x (%d)\n", clock, clock); | 1257 | VPRINTK("10 * Internal clk * 33 = 0x%x (%d)\n", clock, clock); |
1252 | 1258 | ||
1253 | /* PLL F Param (bit 22:16) */ | 1259 | /* PLL F Param (bit 22:16) */ |
1254 | fparam = (1400000 / clock) - 2; | 1260 | fparam = (1400000 / clock) - 2; |
1255 | VPRINTK("PLL F Param: 0x%x (%d)\n", fparam, fparam); | 1261 | VPRINTK("PLL F Param: 0x%x (%d)\n", fparam, fparam); |
1256 | 1262 | ||
1257 | /* OD param = 0x2 (bit 31:30), R param = 0x5 (bit 29:25) */ | 1263 | /* OD param = 0x2 (bit 31:30), R param = 0x5 (bit 29:25) */ |
1258 | pci_status = (0x8a001824 | (fparam << 16)); | 1264 | pci_status = (0x8a001824 | (fparam << 16)); |
1259 | } else | 1265 | } else |
@@ -1264,21 +1270,21 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) | |||
1264 | writel(pci_status, mmio + PDC_CTL_STATUS); | 1270 | writel(pci_status, mmio + PDC_CTL_STATUS); |
1265 | readl(mmio + PDC_CTL_STATUS); | 1271 | readl(mmio + PDC_CTL_STATUS); |
1266 | 1272 | ||
1267 | /* | 1273 | /* |
1268 | Read SPD of DIMM by I2C interface, | 1274 | Read SPD of DIMM by I2C interface, |
1269 | and program the DIMM Module Controller. | 1275 | and program the DIMM Module Controller. |
1270 | */ | 1276 | */ |
1271 | if (!(speed = pdc20621_detect_dimm(pe))) { | 1277 | if (!(speed = pdc20621_detect_dimm(pe))) { |
1272 | printk(KERN_ERR "Detect Local DIMM Fail\n"); | 1278 | printk(KERN_ERR "Detect Local DIMM Fail\n"); |
1273 | return 1; /* DIMM error */ | 1279 | return 1; /* DIMM error */ |
1274 | } | 1280 | } |
1275 | VPRINTK("Local DIMM Speed = %d\n", speed); | 1281 | VPRINTK("Local DIMM Speed = %d\n", speed); |
1276 | 1282 | ||
1277 | /* Programming DIMM0 Module Control Register (index_CID0:80h) */ | 1283 | /* Programming DIMM0 Module Control Register (index_CID0:80h) */ |
1278 | size = pdc20621_prog_dimm0(pe); | 1284 | size = pdc20621_prog_dimm0(pe); |
1279 | VPRINTK("Local DIMM Size = %dMB\n",size); | 1285 | VPRINTK("Local DIMM Size = %dMB\n",size); |
1280 | 1286 | ||
1281 | /* Programming DIMM Module Global Control Register (index_CID0:88h) */ | 1287 | /* Programming DIMM Module Global Control Register (index_CID0:88h) */ |
1282 | if (pdc20621_prog_dimm_global(pe)) { | 1288 | if (pdc20621_prog_dimm_global(pe)) { |
1283 | printk(KERN_ERR "Programming DIMM Module Global Control Register Fail\n"); | 1289 | printk(KERN_ERR "Programming DIMM Module Global Control Register Fail\n"); |
1284 | return 1; | 1290 | return 1; |
@@ -1297,30 +1303,30 @@ static unsigned int pdc20621_dimm_init(struct ata_probe_ent *pe) | |||
1297 | 1303 | ||
1298 | pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x10040, 40); | 1304 | pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x10040, 40); |
1299 | pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40); | 1305 | pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40); |
1300 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], | 1306 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], |
1301 | test_parttern2[1], &(test_parttern2[2])); | 1307 | test_parttern2[1], &(test_parttern2[2])); |
1302 | pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x10040, | 1308 | pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x10040, |
1303 | 40); | 1309 | 40); |
1304 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], | 1310 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], |
1305 | test_parttern2[1], &(test_parttern2[2])); | 1311 | test_parttern2[1], &(test_parttern2[2])); |
1306 | 1312 | ||
1307 | pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x40, 40); | 1313 | pdc20621_put_to_dimm(pe, (void *) test_parttern1, 0x40, 40); |
1308 | pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40); | 1314 | pdc20621_get_from_dimm(pe, (void *) test_parttern2, 0x40, 40); |
1309 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], | 1315 | printk(KERN_ERR "%x, %x, %s\n", test_parttern2[0], |
1310 | test_parttern2[1], &(test_parttern2[2])); | 1316 | test_parttern2[1], &(test_parttern2[2])); |
1311 | } | 1317 | } |
1312 | #endif | 1318 | #endif |
1313 | 1319 | ||
1314 | /* ECC initiliazation. */ | 1320 | /* ECC initiliazation. */ |
1315 | 1321 | ||
1316 | pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, | 1322 | pdc20621_i2c_read(pe, PDC_DIMM0_SPD_DEV_ADDRESS, |
1317 | PDC_DIMM_SPD_TYPE, &spd0); | 1323 | PDC_DIMM_SPD_TYPE, &spd0); |
1318 | if (spd0 == 0x02) { | 1324 | if (spd0 == 0x02) { |
1319 | VPRINTK("Start ECC initialization\n"); | 1325 | VPRINTK("Start ECC initialization\n"); |
1320 | addr = 0; | 1326 | addr = 0; |
1321 | length = size * 1024 * 1024; | 1327 | length = size * 1024 * 1024; |
1322 | while (addr < length) { | 1328 | while (addr < length) { |
1323 | pdc20621_put_to_dimm(pe, (void *) &tmp, addr, | 1329 | pdc20621_put_to_dimm(pe, (void *) &tmp, addr, |
1324 | sizeof(u32)); | 1330 | sizeof(u32)); |
1325 | addr += sizeof(u32); | 1331 | addr += sizeof(u32); |
1326 | } | 1332 | } |
diff --git a/drivers/scsi/sata_uli.c b/drivers/scsi/sata_uli.c index a71fb54eebd3..eb202a73bc0e 100644 --- a/drivers/scsi/sata_uli.c +++ b/drivers/scsi/sata_uli.c | |||
@@ -214,7 +214,7 @@ static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
214 | rc = -ENOMEM; | 214 | rc = -ENOMEM; |
215 | goto err_out_regions; | 215 | goto err_out_regions; |
216 | } | 216 | } |
217 | 217 | ||
218 | switch (board_idx) { | 218 | switch (board_idx) { |
219 | case uli_5287: | 219 | case uli_5287: |
220 | probe_ent->port[0].scr_addr = ULI5287_BASE; | 220 | probe_ent->port[0].scr_addr = ULI5287_BASE; |
diff --git a/drivers/scsi/sata_via.c b/drivers/scsi/sata_via.c index f43183c19a12..feff10980487 100644 --- a/drivers/scsi/sata_via.c +++ b/drivers/scsi/sata_via.c | |||
@@ -347,7 +347,7 @@ static int svia_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
347 | probe_ent = vt6420_init_probe_ent(pdev); | 347 | probe_ent = vt6420_init_probe_ent(pdev); |
348 | else | 348 | else |
349 | probe_ent = vt6421_init_probe_ent(pdev); | 349 | probe_ent = vt6421_init_probe_ent(pdev); |
350 | 350 | ||
351 | if (!probe_ent) { | 351 | if (!probe_ent) { |
352 | printk(KERN_ERR DRV_NAME "(%s): out of memory\n", | 352 | printk(KERN_ERR DRV_NAME "(%s): out of memory\n", |
353 | pci_name(pdev)); | 353 | pci_name(pdev)); |
diff --git a/drivers/scsi/sata_vsc.c b/drivers/scsi/sata_vsc.c index c5e09dc6f3de..6f2562171be0 100644 --- a/drivers/scsi/sata_vsc.c +++ b/drivers/scsi/sata_vsc.c | |||
@@ -173,7 +173,8 @@ static irqreturn_t vsc_sata_interrupt (int irq, void *dev_instance, | |||
173 | struct ata_port *ap; | 173 | struct ata_port *ap; |
174 | 174 | ||
175 | ap = host_set->ports[i]; | 175 | ap = host_set->ports[i]; |
176 | if (ap && (!(ap->flags & ATA_FLAG_PORT_DISABLED))) { | 176 | if (ap && !(ap->flags & |
177 | (ATA_FLAG_PORT_DISABLED|ATA_FLAG_NOINTR))) { | ||
177 | struct ata_queued_cmd *qc; | 178 | struct ata_queued_cmd *qc; |
178 | 179 | ||
179 | qc = ata_qc_from_tag(ap, ap->active_tag); | 180 | qc = ata_qc_from_tag(ap, ap->active_tag); |
@@ -342,7 +343,7 @@ static int __devinit vsc_sata_init_one (struct pci_dev *pdev, const struct pci_d | |||
342 | 343 | ||
343 | pci_set_master(pdev); | 344 | pci_set_master(pdev); |
344 | 345 | ||
345 | /* | 346 | /* |
346 | * Config offset 0x98 is "Extended Control and Status Register 0" | 347 | * Config offset 0x98 is "Extended Control and Status Register 0" |
347 | * Default value is (1 << 28). All bits except bit 28 are reserved in | 348 | * Default value is (1 << 28). All bits except bit 28 are reserved in |
348 | * DPA mode. If bit 28 is set, LED 0 reflects all ports' activity. | 349 | * DPA mode. If bit 28 is set, LED 0 reflects all ports' activity. |