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authorTomoya MORINAGA <tomoya-linux@dsn.okisemi.com>2011-01-28 04:00:01 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2011-02-03 17:18:33 -0500
commit4564e1ef219fa69ed827fe2613569543a6b26fbc (patch)
treeb95a06f61f99f3b645591ddab4cc87c41c13bfd4 /drivers
parentf094298bae5f5d0e1cb3bff4621aae7ef486812a (diff)
serial: pch_uart: support new device ML7213
Support ML7213 device of OKI SEMICONDUCTOR. ML7213 is companion chip of Intel Atom E6xx series for IVI(In-Vehicle Infotainment). ML7213 is completely compatible for Intel EG20T PCH. Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/tty/serial/Kconfig5
-rw-r--r--drivers/tty/serial/pch_uart.c27
2 files changed, 24 insertions, 8 deletions
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 2b8334601c8b..86e2c994d440 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1596,4 +1596,9 @@ config SERIAL_PCH_UART
1596 This driver is for PCH(Platform controller Hub) UART of Intel EG20T 1596 This driver is for PCH(Platform controller Hub) UART of Intel EG20T
1597 which is an IOH(Input/Output Hub) for x86 embedded processor. 1597 which is an IOH(Input/Output Hub) for x86 embedded processor.
1598 Enabling PCH_DMA, this PCH UART works as DMA mode. 1598 Enabling PCH_DMA, this PCH UART works as DMA mode.
1599
1600 This driver also can be used for OKI SEMICONDUCTOR ML7213 IOH(Input/
1601 Output Hub) which is for IVI(In-Vehicle Infotainment) use.
1602 ML7213 is companion chip for Intel Atom E6xx series.
1603 ML7213 is completely compatible for Intel EG20T PCH.
1599endmenu 1604endmenu
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 70a61458ec42..3b2fb93e1fa1 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -40,10 +40,11 @@ enum {
40 40
41#define PCH_UART_DRIVER_DEVICE "ttyPCH" 41#define PCH_UART_DRIVER_DEVICE "ttyPCH"
42 42
43#define PCH_UART_NR_GE_256FIFO 1 43/* Set the max number of UART port
44#define PCH_UART_NR_GE_64FIFO 3 44 * Intel EG20T PCH: 4 port
45#define PCH_UART_NR_GE (PCH_UART_NR_GE_256FIFO+PCH_UART_NR_GE_64FIFO) 45 * OKI SEMICONDUCTOR ML7213 IOH: 3 port
46#define PCH_UART_NR PCH_UART_NR_GE 46*/
47#define PCH_UART_NR 4
47 48
48#define PCH_UART_HANDLED_RX_INT (1<<((PCH_UART_HANDLED_RX_INT_SHIFT)<<1)) 49#define PCH_UART_HANDLED_RX_INT (1<<((PCH_UART_HANDLED_RX_INT_SHIFT)<<1))
49#define PCH_UART_HANDLED_TX_INT (1<<((PCH_UART_HANDLED_TX_INT_SHIFT)<<1)) 50#define PCH_UART_HANDLED_TX_INT (1<<((PCH_UART_HANDLED_TX_INT_SHIFT)<<1))
@@ -192,6 +193,8 @@ enum {
192#define PCH_UART_HAL_LOOP (PCH_UART_MCR_LOOP) 193#define PCH_UART_HAL_LOOP (PCH_UART_MCR_LOOP)
193#define PCH_UART_HAL_AFE (PCH_UART_MCR_AFE) 194#define PCH_UART_HAL_AFE (PCH_UART_MCR_AFE)
194 195
196#define PCI_VENDOR_ID_ROHM 0x10DB
197
195struct pch_uart_buffer { 198struct pch_uart_buffer {
196 unsigned char *buf; 199 unsigned char *buf;
197 int size; 200 int size;
@@ -1249,7 +1252,7 @@ static struct uart_driver pch_uart_driver = {
1249}; 1252};
1250 1253
1251static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev, 1254static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
1252 int port_type) 1255 const struct pci_device_id *id)
1253{ 1256{
1254 struct eg20t_port *priv; 1257 struct eg20t_port *priv;
1255 int ret; 1258 int ret;
@@ -1258,6 +1261,7 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
1258 unsigned char *rxbuf; 1261 unsigned char *rxbuf;
1259 int fifosize, base_baud; 1262 int fifosize, base_baud;
1260 static int num; 1263 static int num;
1264 int port_type = id->driver_data;
1261 1265
1262 priv = kzalloc(sizeof(struct eg20t_port), GFP_KERNEL); 1266 priv = kzalloc(sizeof(struct eg20t_port), GFP_KERNEL);
1263 if (priv == NULL) 1267 if (priv == NULL)
@@ -1269,11 +1273,11 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
1269 1273
1270 switch (port_type) { 1274 switch (port_type) {
1271 case PORT_UNKNOWN: 1275 case PORT_UNKNOWN:
1272 fifosize = 256; /* UART0 */ 1276 fifosize = 256; /* EG20T/ML7213: UART0 */
1273 base_baud = 1843200; /* 1.8432MHz */ 1277 base_baud = 1843200; /* 1.8432MHz */
1274 break; 1278 break;
1275 case PORT_8250: 1279 case PORT_8250:
1276 fifosize = 64; /* UART1~3 */ 1280 fifosize = 64; /* EG20T:UART1~3 ML7213: UART1~2*/
1277 base_baud = 1843200; /* 1.8432MHz */ 1281 base_baud = 1843200; /* 1.8432MHz */
1278 break; 1282 break;
1279 default: 1283 default:
@@ -1307,6 +1311,7 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
1307 1311
1308 pci_set_drvdata(pdev, priv); 1312 pci_set_drvdata(pdev, priv);
1309 pch_uart_hal_request(pdev, fifosize, base_baud); 1313 pch_uart_hal_request(pdev, fifosize, base_baud);
1314
1310 ret = uart_add_one_port(&pch_uart_driver, &priv->port); 1315 ret = uart_add_one_port(&pch_uart_driver, &priv->port);
1311 if (ret < 0) 1316 if (ret < 0)
1312 goto init_port_hal_free; 1317 goto init_port_hal_free;
@@ -1384,6 +1389,12 @@ static DEFINE_PCI_DEVICE_TABLE(pch_uart_pci_id) = {
1384 .driver_data = PCH_UART_2LINE}, 1389 .driver_data = PCH_UART_2LINE},
1385 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8814), 1390 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x8814),
1386 .driver_data = PCH_UART_2LINE}, 1391 .driver_data = PCH_UART_2LINE},
1392 {PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x8027),
1393 .driver_data = PCH_UART_8LINE},
1394 {PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x8028),
1395 .driver_data = PCH_UART_2LINE},
1396 {PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x8029),
1397 .driver_data = PCH_UART_2LINE},
1387 {0,}, 1398 {0,},
1388}; 1399};
1389 1400
@@ -1397,7 +1408,7 @@ static int __devinit pch_uart_pci_probe(struct pci_dev *pdev,
1397 if (ret < 0) 1408 if (ret < 0)
1398 goto probe_error; 1409 goto probe_error;
1399 1410
1400 priv = pch_uart_init_port(pdev, id->driver_data); 1411 priv = pch_uart_init_port(pdev, id);
1401 if (!priv) { 1412 if (!priv) {
1402 ret = -EBUSY; 1413 ret = -EBUSY;
1403 goto probe_disable_device; 1414 goto probe_disable_device;