diff options
author | Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-08-18 21:46:15 -0400 |
---|---|---|
committer | Eric Anholt <eric@anholt.net> | 2010-08-22 02:28:54 -0400 |
commit | 3fdef0205e69b80c4219f14b834cb85eb719039f (patch) | |
tree | 31f0fc0b6d48661bec5f165971b311a3521a8846 /drivers | |
parent | 877fdacf8291d7627f339885b5ae52c2f6061734 (diff) |
drm/i915: fix render pipe control notify on sandybridge
This one is missed in last pipe control fix for sandybridge,
that really unmask interrupt bit for notify in render engine IMR.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 69a36fc035dc..16861b800fee 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -1381,12 +1381,17 @@ static int ironlake_irq_postinstall(struct drm_device *dev) | |||
1381 | I915_WRITE(DEIER, dev_priv->de_irq_enable_reg); | 1381 | I915_WRITE(DEIER, dev_priv->de_irq_enable_reg); |
1382 | (void) I915_READ(DEIER); | 1382 | (void) I915_READ(DEIER); |
1383 | 1383 | ||
1384 | /* user interrupt should be enabled, but masked initial */ | 1384 | /* Gen6 only needs render pipe_control now */ |
1385 | if (IS_GEN6(dev)) | ||
1386 | render_mask = GT_PIPE_NOTIFY; | ||
1387 | |||
1385 | dev_priv->gt_irq_mask_reg = ~render_mask; | 1388 | dev_priv->gt_irq_mask_reg = ~render_mask; |
1386 | dev_priv->gt_irq_enable_reg = render_mask; | 1389 | dev_priv->gt_irq_enable_reg = render_mask; |
1387 | 1390 | ||
1388 | I915_WRITE(GTIIR, I915_READ(GTIIR)); | 1391 | I915_WRITE(GTIIR, I915_READ(GTIIR)); |
1389 | I915_WRITE(GTIMR, dev_priv->gt_irq_mask_reg); | 1392 | I915_WRITE(GTIMR, dev_priv->gt_irq_mask_reg); |
1393 | if (IS_GEN6(dev)) | ||
1394 | I915_WRITE(GEN6_RENDER_IMR, ~GEN6_RENDER_PIPE_CONTROL_NOTIFY_INTERRUPT); | ||
1390 | I915_WRITE(GTIER, dev_priv->gt_irq_enable_reg); | 1395 | I915_WRITE(GTIER, dev_priv->gt_irq_enable_reg); |
1391 | (void) I915_READ(GTIER); | 1396 | (void) I915_READ(GTIER); |
1392 | 1397 | ||