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authorAlex Deucher <alexdeucher@gmail.com>2010-03-08 17:10:41 -0500
committerDave Airlie <airlied@redhat.com>2010-03-14 19:57:12 -0400
commit267364ac17f6474c69b03034340f769b22f46105 (patch)
tree8b565b8691fd8621b6666b8b22b72e703843b11b /drivers
parent86cb2bbfda2cf402aee46779ee90bbb7d915482b (diff)
drm/radeon/kms: further spread spectrum fixes
Adjust modeset ordering to fix spread spectrum. The spread spectrum command table relies on the crtc routing to already be set in order to work properly on some asics. Should fix fdo bug 25741. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c8
-rw-r--r--drivers/gpu/drm/radeon/radeon_encoders.c25
2 files changed, 20 insertions, 13 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index a8cd637d92fa..7c30e2e74c85 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1127,9 +1127,6 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc,
1127 1127
1128 /* TODO color tiling */ 1128 /* TODO color tiling */
1129 1129
1130 /* pick pll */
1131 radeon_crtc->pll_id = radeon_atom_pick_pll(crtc);
1132
1133 atombios_disable_ss(crtc); 1130 atombios_disable_ss(crtc);
1134 /* always set DCPLL */ 1131 /* always set DCPLL */
1135 if (ASIC_IS_DCE4(rdev)) 1132 if (ASIC_IS_DCE4(rdev))
@@ -1164,6 +1161,11 @@ static bool atombios_crtc_mode_fixup(struct drm_crtc *crtc,
1164 1161
1165static void atombios_crtc_prepare(struct drm_crtc *crtc) 1162static void atombios_crtc_prepare(struct drm_crtc *crtc)
1166{ 1163{
1164 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
1165
1166 /* pick pll */
1167 radeon_crtc->pll_id = radeon_atom_pick_pll(crtc);
1168
1167 atombios_lock_crtc(crtc, ATOM_ENABLE); 1169 atombios_lock_crtc(crtc, ATOM_ENABLE);
1168 atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); 1170 atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
1169} 1171}
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index bc926ea0a530..4eae30cc5213 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -1216,6 +1216,9 @@ atombios_set_encoder_crtc_source(struct drm_encoder *encoder)
1216 } 1216 }
1217 1217
1218 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); 1218 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
1219
1220 /* update scratch regs with new routing */
1221 radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id);
1219} 1222}
1220 1223
1221static void 1224static void
@@ -1326,19 +1329,9 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
1326 struct drm_device *dev = encoder->dev; 1329 struct drm_device *dev = encoder->dev;
1327 struct radeon_device *rdev = dev->dev_private; 1330 struct radeon_device *rdev = dev->dev_private;
1328 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 1331 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1329 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
1330 1332
1331 if (radeon_encoder->active_device &
1332 (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) {
1333 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
1334 if (dig)
1335 dig->dig_encoder = radeon_atom_pick_dig_encoder(encoder);
1336 }
1337 radeon_encoder->pixel_clock = adjusted_mode->clock; 1333 radeon_encoder->pixel_clock = adjusted_mode->clock;
1338 1334
1339 radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id);
1340 atombios_set_encoder_crtc_source(encoder);
1341
1342 if (ASIC_IS_AVIVO(rdev)) { 1335 if (ASIC_IS_AVIVO(rdev)) {
1343 if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT | ATOM_DEVICE_TV_SUPPORT)) 1336 if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT | ATOM_DEVICE_TV_SUPPORT))
1344 atombios_yuv_setup(encoder, true); 1337 atombios_yuv_setup(encoder, true);
@@ -1492,8 +1485,20 @@ radeon_atom_dac_detect(struct drm_encoder *encoder, struct drm_connector *connec
1492 1485
1493static void radeon_atom_encoder_prepare(struct drm_encoder *encoder) 1486static void radeon_atom_encoder_prepare(struct drm_encoder *encoder)
1494{ 1487{
1488 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1489
1490 if (radeon_encoder->active_device &
1491 (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) {
1492 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
1493 if (dig)
1494 dig->dig_encoder = radeon_atom_pick_dig_encoder(encoder);
1495 }
1496
1495 radeon_atom_output_lock(encoder, true); 1497 radeon_atom_output_lock(encoder, true);
1496 radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); 1498 radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
1499
1500 /* this is needed for the pll/ss setup to work correctly in some cases */
1501 atombios_set_encoder_crtc_source(encoder);
1497} 1502}
1498 1503
1499static void radeon_atom_encoder_commit(struct drm_encoder *encoder) 1504static void radeon_atom_encoder_commit(struct drm_encoder *encoder)