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authorLinus Torvalds <torvalds@linux-foundation.org>2013-02-21 18:00:16 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-02-21 18:00:16 -0500
commit7ae1c76ee5b58fe5bd55a07f99a3359333270b86 (patch)
tree2e6907d46978dadebdef488c6b5f9bca34023a72 /drivers
parentb274776c54c320763bc12eb035c0e244f76ccb43 (diff)
parent62508a5d25e355cc19c3ade3c3b7dddc6d326cc5 (diff)
Merge tag 'sh-pinmux' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull sh-mobile pinctrl conversion from Arnd Bergmann: "This is another cleanup series, containing the move of the Renesas SH-Mobile pin controller code from arch/arm/mach-shmobile over to the generic pinctrl subsystem, changing it over to the common interfaces in the process. Based on agreement between Olof, Paul Mundt, Linus Walleij and Simon, we're merging this large branch of pinctrl conversion through arm-soc, even though it contains the corresponding conversions for arch/sh. Main reason for this is tight dependencies (that will now mostly be broken) between the arch/sh and mach-shmobile implementations. There will be more of this in 3.10 to do device-tree bindings, but this is the initial conversion." * tag 'sh-pinmux' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (81 commits) sh-pfc: sh_pfc_probe() sizeof() fix sh-pfc: Move sh_pfc.h from include/linux/ to driver directory sh-pfc: Remove pinmux_info definition sh: Remove unused sh_pfc_register_info() function sh: shx3: pinmux: Use driver-provided pinmux info sh: sh7786: pinmux: Use driver-provided pinmux info sh: sh7785: pinmux: Use driver-provided pinmux info sh: sh7757: pinmux: Use driver-provided pinmux info sh: sh7734: pinmux: Use driver-provided pinmux info sh: sh7724: pinmux: Use driver-provided pinmux info sh: sh7723: pinmux: Use driver-provided pinmux info sh: sh7722: pinmux: Use driver-provided pinmux info sh: sh7720: pinmux: Use driver-provided pinmux info sh: sh7269: pinmux: Use driver-provided pinmux info sh: sh7264: pinmux: Use driver-provided pinmux info sh: sh7203: pinmux: Use driver-provided pinmux info ARM: shmobile: sh73a0: Use driver-provided pinmux info ARM: shmobile: sh7372: Use driver-provided pinmux info ARM: shmobile: r8a7779: Use driver-provided pinmux info ARM: shmobile: r8a7740: Use driver-provided pinmux info ...
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pinctrl/Kconfig2
-rw-r--r--drivers/pinctrl/Makefile2
-rw-r--r--drivers/pinctrl/sh-pfc/Kconfig116
-rw-r--r--drivers/pinctrl/sh-pfc/Makefile21
-rw-r--r--drivers/pinctrl/sh-pfc/core.c (renamed from drivers/sh/pfc/core.c)355
-rw-r--r--drivers/pinctrl/sh-pfc/core.h72
-rw-r--r--drivers/pinctrl/sh-pfc/gpio.c (renamed from drivers/sh/pfc/gpio.c)114
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7740.c2612
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7779.c2624
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh7203.c1592
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh7264.c2131
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh7269.c2834
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh7372.c1658
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh73a0.c2798
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh7720.c1236
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh7722.c1779
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh7723.c1903
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh7724.c2225
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh7734.c2475
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh7757.c2282
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh7785.c1304
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-sh7786.c837
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-shx3.c582
-rw-r--r--drivers/pinctrl/sh-pfc/pinctrl.c (renamed from drivers/sh/pfc/pinctrl.c)164
-rw-r--r--drivers/pinctrl/sh-pfc/sh_pfc.h195
-rw-r--r--drivers/sh/Kconfig1
-rw-r--r--drivers/sh/Makefile1
-rw-r--r--drivers/sh/pfc/Kconfig26
-rw-r--r--drivers/sh/pfc/Makefile3
29 files changed, 31564 insertions, 380 deletions
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 393b0ecf4ca4..34f51d2d90d2 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -227,7 +227,7 @@ config PINCTRL_EXYNOS5440
227 select PINCONF 227 select PINCONF
228 228
229source "drivers/pinctrl/mvebu/Kconfig" 229source "drivers/pinctrl/mvebu/Kconfig"
230 230source "drivers/pinctrl/sh-pfc/Kconfig"
231source "drivers/pinctrl/spear/Kconfig" 231source "drivers/pinctrl/spear/Kconfig"
232 232
233config PINCTRL_XWAY 233config PINCTRL_XWAY
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 0fd5f57fcb57..f82cc5baf767 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -49,4 +49,6 @@ obj-$(CONFIG_PINCTRL_XWAY) += pinctrl-xway.o
49obj-$(CONFIG_PINCTRL_LANTIQ) += pinctrl-lantiq.o 49obj-$(CONFIG_PINCTRL_LANTIQ) += pinctrl-lantiq.o
50 50
51obj-$(CONFIG_PLAT_ORION) += mvebu/ 51obj-$(CONFIG_PLAT_ORION) += mvebu/
52obj-$(CONFIG_ARCH_SHMOBILE) += sh-pfc/
53obj-$(CONFIG_SUPERH) += sh-pfc/
52obj-$(CONFIG_PLAT_SPEAR) += spear/ 54obj-$(CONFIG_PLAT_SPEAR) += spear/
diff --git a/drivers/pinctrl/sh-pfc/Kconfig b/drivers/pinctrl/sh-pfc/Kconfig
new file mode 100644
index 000000000000..c3340f54d2ad
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/Kconfig
@@ -0,0 +1,116 @@
1#
2# Renesas SH and SH Mobile PINCTRL drivers
3#
4
5if ARCH_SHMOBILE || SUPERH
6
7config PINCTRL_SH_PFC
8 # XXX move off the gpio dependency
9 depends on GENERIC_GPIO
10 select GPIO_SH_PFC if ARCH_REQUIRE_GPIOLIB
11 select PINMUX
12 select PINCONF
13 def_bool y
14 help
15 This enables pin control drivers for SH and SH Mobile platforms
16
17config GPIO_SH_PFC
18 bool "SuperH PFC GPIO support"
19 depends on PINCTRL_SH_PFC && GPIOLIB
20 help
21 This enables support for GPIOs within the SoC's pin function
22 controller.
23
24config PINCTRL_PFC_R8A7740
25 def_bool y
26 depends on ARCH_R8A7740
27 select PINCTRL_SH_PFC
28
29config PINCTRL_PFC_R8A7779
30 def_bool y
31 depends on ARCH_R8A7779
32 select PINCTRL_SH_PFC
33
34config PINCTRL_PFC_SH7203
35 def_bool y
36 depends on CPU_SUBTYPE_SH7203
37 depends on GENERIC_GPIO
38 select PINCTRL_SH_PFC
39
40config PINCTRL_PFC_SH7264
41 def_bool y
42 depends on CPU_SUBTYPE_SH7264
43 depends on GENERIC_GPIO
44 select PINCTRL_SH_PFC
45
46config PINCTRL_PFC_SH7269
47 def_bool y
48 depends on CPU_SUBTYPE_SH7269
49 depends on GENERIC_GPIO
50 select PINCTRL_SH_PFC
51
52config PINCTRL_PFC_SH7372
53 def_bool y
54 depends on ARCH_SH7372
55 select PINCTRL_SH_PFC
56
57config PINCTRL_PFC_SH73A0
58 def_bool y
59 depends on ARCH_SH73A0
60 select PINCTRL_SH_PFC
61
62config PINCTRL_PFC_SH7720
63 def_bool y
64 depends on CPU_SUBTYPE_SH7720
65 depends on GENERIC_GPIO
66 select PINCTRL_SH_PFC
67
68config PINCTRL_PFC_SH7722
69 def_bool y
70 depends on CPU_SUBTYPE_SH7722
71 depends on GENERIC_GPIO
72 select PINCTRL_SH_PFC
73
74config PINCTRL_PFC_SH7723
75 def_bool y
76 depends on CPU_SUBTYPE_SH7723
77 depends on GENERIC_GPIO
78 select PINCTRL_SH_PFC
79
80config PINCTRL_PFC_SH7724
81 def_bool y
82 depends on CPU_SUBTYPE_SH7724
83 depends on GENERIC_GPIO
84 select PINCTRL_SH_PFC
85
86config PINCTRL_PFC_SH7734
87 def_bool y
88 depends on CPU_SUBTYPE_SH7734
89 depends on GENERIC_GPIO
90 select PINCTRL_SH_PFC
91
92config PINCTRL_PFC_SH7757
93 def_bool y
94 depends on CPU_SUBTYPE_SH7757
95 depends on GENERIC_GPIO
96 select PINCTRL_SH_PFC
97
98config PINCTRL_PFC_SH7785
99 def_bool y
100 depends on CPU_SUBTYPE_SH7785
101 depends on GENERIC_GPIO
102 select PINCTRL_SH_PFC
103
104config PINCTRL_PFC_SH7786
105 def_bool y
106 depends on CPU_SUBTYPE_SH7786
107 depends on GENERIC_GPIO
108 select PINCTRL_SH_PFC
109
110config PINCTRL_PFC_SHX3
111 def_bool y
112 depends on CPU_SUBTYPE_SHX3
113 depends on GENERIC_GPIO
114 select PINCTRL_SH_PFC
115
116endif
diff --git a/drivers/pinctrl/sh-pfc/Makefile b/drivers/pinctrl/sh-pfc/Makefile
new file mode 100644
index 000000000000..e8b9562c47e1
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/Makefile
@@ -0,0 +1,21 @@
1sh-pfc-objs = core.o pinctrl.o
2ifeq ($(CONFIG_GPIO_SH_PFC),y)
3sh-pfc-objs += gpio.o
4endif
5obj-$(CONFIG_PINCTRL_SH_PFC) += sh-pfc.o
6obj-$(CONFIG_PINCTRL_PFC_R8A7740) += pfc-r8a7740.o
7obj-$(CONFIG_PINCTRL_PFC_R8A7779) += pfc-r8a7779.o
8obj-$(CONFIG_PINCTRL_PFC_SH7203) += pfc-sh7203.o
9obj-$(CONFIG_PINCTRL_PFC_SH7264) += pfc-sh7264.o
10obj-$(CONFIG_PINCTRL_PFC_SH7269) += pfc-sh7269.o
11obj-$(CONFIG_PINCTRL_PFC_SH7372) += pfc-sh7372.o
12obj-$(CONFIG_PINCTRL_PFC_SH73A0) += pfc-sh73a0.o
13obj-$(CONFIG_PINCTRL_PFC_SH7720) += pfc-sh7720.o
14obj-$(CONFIG_PINCTRL_PFC_SH7722) += pfc-sh7722.o
15obj-$(CONFIG_PINCTRL_PFC_SH7723) += pfc-sh7723.o
16obj-$(CONFIG_PINCTRL_PFC_SH7724) += pfc-sh7724.o
17obj-$(CONFIG_PINCTRL_PFC_SH7734) += pfc-sh7734.o
18obj-$(CONFIG_PINCTRL_PFC_SH7757) += pfc-sh7757.o
19obj-$(CONFIG_PINCTRL_PFC_SH7785) += pfc-sh7785.o
20obj-$(CONFIG_PINCTRL_PFC_SH7786) += pfc-sh7786.o
21obj-$(CONFIG_PINCTRL_PFC_SHX3) += pfc-shx3.o
diff --git a/drivers/sh/pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
index 68169373c98b..970ddff2b0b6 100644
--- a/drivers/sh/pfc/core.c
+++ b/drivers/pinctrl/sh-pfc/core.c
@@ -8,78 +8,61 @@
8 * License. See the file "COPYING" in the main directory of this archive 8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details. 9 * for more details.
10 */ 10 */
11#define pr_fmt(fmt) "sh_pfc " KBUILD_MODNAME ": " fmt
12 11
13#include <linux/errno.h> 12#define DRV_NAME "sh-pfc"
14#include <linux/kernel.h> 13#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15#include <linux/sh_pfc.h> 14
16#include <linux/module.h> 15#include <linux/bitops.h>
17#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/errno.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/bitops.h>
20#include <linux/slab.h>
21#include <linux/ioport.h> 19#include <linux/ioport.h>
20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/pinctrl/machine.h> 22#include <linux/pinctrl/machine.h>
23#include <linux/platform_device.h>
24#include <linux/slab.h>
23 25
24static struct sh_pfc *sh_pfc __read_mostly; 26#include "core.h"
25
26static inline bool sh_pfc_initialized(void)
27{
28 return !!sh_pfc;
29}
30
31static void pfc_iounmap(struct sh_pfc *pfc)
32{
33 int k;
34
35 for (k = 0; k < pfc->num_resources; k++)
36 if (pfc->window[k].virt)
37 iounmap(pfc->window[k].virt);
38
39 kfree(pfc->window);
40 pfc->window = NULL;
41}
42 27
43static int pfc_ioremap(struct sh_pfc *pfc) 28static int sh_pfc_ioremap(struct sh_pfc *pfc, struct platform_device *pdev)
44{ 29{
45 struct resource *res; 30 struct resource *res;
46 int k; 31 int k;
47 32
48 if (!pfc->num_resources) 33 if (pdev->num_resources == 0) {
34 pfc->num_windows = 0;
49 return 0; 35 return 0;
36 }
50 37
51 pfc->window = kzalloc(pfc->num_resources * sizeof(*pfc->window), 38 pfc->window = devm_kzalloc(pfc->dev, pdev->num_resources *
52 GFP_NOWAIT); 39 sizeof(*pfc->window), GFP_NOWAIT);
53 if (!pfc->window) 40 if (!pfc->window)
54 goto err1; 41 return -ENOMEM;
55 42
56 for (k = 0; k < pfc->num_resources; k++) { 43 pfc->num_windows = pdev->num_resources;
57 res = pfc->resource + k; 44
45 for (k = 0, res = pdev->resource; k < pdev->num_resources; k++, res++) {
58 WARN_ON(resource_type(res) != IORESOURCE_MEM); 46 WARN_ON(resource_type(res) != IORESOURCE_MEM);
59 pfc->window[k].phys = res->start; 47 pfc->window[k].phys = res->start;
60 pfc->window[k].size = resource_size(res); 48 pfc->window[k].size = resource_size(res);
61 pfc->window[k].virt = ioremap_nocache(res->start, 49 pfc->window[k].virt = devm_ioremap_nocache(pfc->dev, res->start,
62 resource_size(res)); 50 resource_size(res));
63 if (!pfc->window[k].virt) 51 if (!pfc->window[k].virt)
64 goto err2; 52 return -ENOMEM;
65 } 53 }
66 54
67 return 0; 55 return 0;
68
69err2:
70 pfc_iounmap(pfc);
71err1:
72 return -1;
73} 56}
74 57
75static void __iomem *pfc_phys_to_virt(struct sh_pfc *pfc, 58static void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc,
76 unsigned long address) 59 unsigned long address)
77{ 60{
78 struct pfc_window *window; 61 struct sh_pfc_window *window;
79 int k; 62 int k;
80 63
81 /* scan through physical windows and convert address */ 64 /* scan through physical windows and convert address */
82 for (k = 0; k < pfc->num_resources; k++) { 65 for (k = 0; k < pfc->num_windows; k++) {
83 window = pfc->window + k; 66 window = pfc->window + k;
84 67
85 if (address < window->phys) 68 if (address < window->phys)
@@ -95,7 +78,7 @@ static void __iomem *pfc_phys_to_virt(struct sh_pfc *pfc,
95 return (void __iomem *)address; 78 return (void __iomem *)address;
96} 79}
97 80
98static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r) 81static int sh_pfc_enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
99{ 82{
100 if (enum_id < r->begin) 83 if (enum_id < r->begin)
101 return 0; 84 return 0;
@@ -106,8 +89,8 @@ static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
106 return 1; 89 return 1;
107} 90}
108 91
109static unsigned long gpio_read_raw_reg(void __iomem *mapped_reg, 92static unsigned long sh_pfc_read_raw_reg(void __iomem *mapped_reg,
110 unsigned long reg_width) 93 unsigned long reg_width)
111{ 94{
112 switch (reg_width) { 95 switch (reg_width) {
113 case 8: 96 case 8:
@@ -122,9 +105,8 @@ static unsigned long gpio_read_raw_reg(void __iomem *mapped_reg,
122 return 0; 105 return 0;
123} 106}
124 107
125static void gpio_write_raw_reg(void __iomem *mapped_reg, 108static void sh_pfc_write_raw_reg(void __iomem *mapped_reg,
126 unsigned long reg_width, 109 unsigned long reg_width, unsigned long data)
127 unsigned long data)
128{ 110{
129 switch (reg_width) { 111 switch (reg_width) {
130 case 8: 112 case 8:
@@ -150,9 +132,8 @@ int sh_pfc_read_bit(struct pinmux_data_reg *dr, unsigned long in_pos)
150 pr_debug("read_bit: addr = %lx, pos = %ld, " 132 pr_debug("read_bit: addr = %lx, pos = %ld, "
151 "r_width = %ld\n", dr->reg, pos, dr->reg_width); 133 "r_width = %ld\n", dr->reg, pos, dr->reg_width);
152 134
153 return (gpio_read_raw_reg(dr->mapped_reg, dr->reg_width) >> pos) & 1; 135 return (sh_pfc_read_raw_reg(dr->mapped_reg, dr->reg_width) >> pos) & 1;
154} 136}
155EXPORT_SYMBOL_GPL(sh_pfc_read_bit);
156 137
157void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos, 138void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
158 unsigned long value) 139 unsigned long value)
@@ -170,20 +151,19 @@ void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
170 else 151 else
171 clear_bit(pos, &dr->reg_shadow); 152 clear_bit(pos, &dr->reg_shadow);
172 153
173 gpio_write_raw_reg(dr->mapped_reg, dr->reg_width, dr->reg_shadow); 154 sh_pfc_write_raw_reg(dr->mapped_reg, dr->reg_width, dr->reg_shadow);
174} 155}
175EXPORT_SYMBOL_GPL(sh_pfc_write_bit); 156
176 157static void sh_pfc_config_reg_helper(struct sh_pfc *pfc,
177static void config_reg_helper(struct sh_pfc *pfc, 158 struct pinmux_cfg_reg *crp,
178 struct pinmux_cfg_reg *crp, 159 unsigned long in_pos,
179 unsigned long in_pos, 160 void __iomem **mapped_regp,
180 void __iomem **mapped_regp, 161 unsigned long *maskp,
181 unsigned long *maskp, 162 unsigned long *posp)
182 unsigned long *posp)
183{ 163{
184 int k; 164 int k;
185 165
186 *mapped_regp = pfc_phys_to_virt(pfc, crp->reg); 166 *mapped_regp = sh_pfc_phys_to_virt(pfc, crp->reg);
187 167
188 if (crp->field_width) { 168 if (crp->field_width) {
189 *maskp = (1 << crp->field_width) - 1; 169 *maskp = (1 << crp->field_width) - 1;
@@ -196,30 +176,30 @@ static void config_reg_helper(struct sh_pfc *pfc,
196 } 176 }
197} 177}
198 178
199static int read_config_reg(struct sh_pfc *pfc, 179static int sh_pfc_read_config_reg(struct sh_pfc *pfc,
200 struct pinmux_cfg_reg *crp, 180 struct pinmux_cfg_reg *crp,
201 unsigned long field) 181 unsigned long field)
202{ 182{
203 void __iomem *mapped_reg; 183 void __iomem *mapped_reg;
204 unsigned long mask, pos; 184 unsigned long mask, pos;
205 185
206 config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos); 186 sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
207 187
208 pr_debug("read_reg: addr = %lx, field = %ld, " 188 pr_debug("read_reg: addr = %lx, field = %ld, "
209 "r_width = %ld, f_width = %ld\n", 189 "r_width = %ld, f_width = %ld\n",
210 crp->reg, field, crp->reg_width, crp->field_width); 190 crp->reg, field, crp->reg_width, crp->field_width);
211 191
212 return (gpio_read_raw_reg(mapped_reg, crp->reg_width) >> pos) & mask; 192 return (sh_pfc_read_raw_reg(mapped_reg, crp->reg_width) >> pos) & mask;
213} 193}
214 194
215static void write_config_reg(struct sh_pfc *pfc, 195static void sh_pfc_write_config_reg(struct sh_pfc *pfc,
216 struct pinmux_cfg_reg *crp, 196 struct pinmux_cfg_reg *crp,
217 unsigned long field, unsigned long value) 197 unsigned long field, unsigned long value)
218{ 198{
219 void __iomem *mapped_reg; 199 void __iomem *mapped_reg;
220 unsigned long mask, pos, data; 200 unsigned long mask, pos, data;
221 201
222 config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos); 202 sh_pfc_config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
223 203
224 pr_debug("write_reg addr = %lx, value = %ld, field = %ld, " 204 pr_debug("write_reg addr = %lx, value = %ld, field = %ld, "
225 "r_width = %ld, f_width = %ld\n", 205 "r_width = %ld, f_width = %ld\n",
@@ -228,34 +208,35 @@ static void write_config_reg(struct sh_pfc *pfc,
228 mask = ~(mask << pos); 208 mask = ~(mask << pos);
229 value = value << pos; 209 value = value << pos;
230 210
231 data = gpio_read_raw_reg(mapped_reg, crp->reg_width); 211 data = sh_pfc_read_raw_reg(mapped_reg, crp->reg_width);
232 data &= mask; 212 data &= mask;
233 data |= value; 213 data |= value;
234 214
235 if (pfc->unlock_reg) 215 if (pfc->info->unlock_reg)
236 gpio_write_raw_reg(pfc_phys_to_virt(pfc, pfc->unlock_reg), 216 sh_pfc_write_raw_reg(
237 32, ~data); 217 sh_pfc_phys_to_virt(pfc, pfc->info->unlock_reg), 32,
218 ~data);
238 219
239 gpio_write_raw_reg(mapped_reg, crp->reg_width, data); 220 sh_pfc_write_raw_reg(mapped_reg, crp->reg_width, data);
240} 221}
241 222
242static int setup_data_reg(struct sh_pfc *pfc, unsigned gpio) 223static int sh_pfc_setup_data_reg(struct sh_pfc *pfc, unsigned gpio)
243{ 224{
244 struct pinmux_gpio *gpiop = &pfc->gpios[gpio]; 225 struct pinmux_gpio *gpiop = &pfc->info->gpios[gpio];
245 struct pinmux_data_reg *data_reg; 226 struct pinmux_data_reg *data_reg;
246 int k, n; 227 int k, n;
247 228
248 if (!enum_in_range(gpiop->enum_id, &pfc->data)) 229 if (!sh_pfc_enum_in_range(gpiop->enum_id, &pfc->info->data))
249 return -1; 230 return -1;
250 231
251 k = 0; 232 k = 0;
252 while (1) { 233 while (1) {
253 data_reg = pfc->data_regs + k; 234 data_reg = pfc->info->data_regs + k;
254 235
255 if (!data_reg->reg_width) 236 if (!data_reg->reg_width)
256 break; 237 break;
257 238
258 data_reg->mapped_reg = pfc_phys_to_virt(pfc, data_reg->reg); 239 data_reg->mapped_reg = sh_pfc_phys_to_virt(pfc, data_reg->reg);
259 240
260 for (n = 0; n < data_reg->reg_width; n++) { 241 for (n = 0; n < data_reg->reg_width; n++) {
261 if (data_reg->enum_ids[n] == gpiop->enum_id) { 242 if (data_reg->enum_ids[n] == gpiop->enum_id) {
@@ -274,23 +255,23 @@ static int setup_data_reg(struct sh_pfc *pfc, unsigned gpio)
274 return -1; 255 return -1;
275} 256}
276 257
277static void setup_data_regs(struct sh_pfc *pfc) 258static void sh_pfc_setup_data_regs(struct sh_pfc *pfc)
278{ 259{
279 struct pinmux_data_reg *drp; 260 struct pinmux_data_reg *drp;
280 int k; 261 int k;
281 262
282 for (k = pfc->first_gpio; k <= pfc->last_gpio; k++) 263 for (k = pfc->info->first_gpio; k <= pfc->info->last_gpio; k++)
283 setup_data_reg(pfc, k); 264 sh_pfc_setup_data_reg(pfc, k);
284 265
285 k = 0; 266 k = 0;
286 while (1) { 267 while (1) {
287 drp = pfc->data_regs + k; 268 drp = pfc->info->data_regs + k;
288 269
289 if (!drp->reg_width) 270 if (!drp->reg_width)
290 break; 271 break;
291 272
292 drp->reg_shadow = gpio_read_raw_reg(drp->mapped_reg, 273 drp->reg_shadow = sh_pfc_read_raw_reg(drp->mapped_reg,
293 drp->reg_width); 274 drp->reg_width);
294 k++; 275 k++;
295 } 276 }
296} 277}
@@ -298,24 +279,22 @@ static void setup_data_regs(struct sh_pfc *pfc)
298int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio, 279int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
299 struct pinmux_data_reg **drp, int *bitp) 280 struct pinmux_data_reg **drp, int *bitp)
300{ 281{
301 struct pinmux_gpio *gpiop = &pfc->gpios[gpio]; 282 struct pinmux_gpio *gpiop = &pfc->info->gpios[gpio];
302 int k, n; 283 int k, n;
303 284
304 if (!enum_in_range(gpiop->enum_id, &pfc->data)) 285 if (!sh_pfc_enum_in_range(gpiop->enum_id, &pfc->info->data))
305 return -1; 286 return -1;
306 287
307 k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT; 288 k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
308 n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT; 289 n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
309 *drp = pfc->data_regs + k; 290 *drp = pfc->info->data_regs + k;
310 *bitp = n; 291 *bitp = n;
311 return 0; 292 return 0;
312} 293}
313EXPORT_SYMBOL_GPL(sh_pfc_get_data_reg);
314 294
315static int get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id, 295static int sh_pfc_get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
316 struct pinmux_cfg_reg **crp, 296 struct pinmux_cfg_reg **crp, int *fieldp,
317 int *fieldp, int *valuep, 297 int *valuep, unsigned long **cntp)
318 unsigned long **cntp)
319{ 298{
320 struct pinmux_cfg_reg *config_reg; 299 struct pinmux_cfg_reg *config_reg;
321 unsigned long r_width, f_width, curr_width, ncomb; 300 unsigned long r_width, f_width, curr_width, ncomb;
@@ -323,7 +302,7 @@ static int get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
323 302
324 k = 0; 303 k = 0;
325 while (1) { 304 while (1) {
326 config_reg = pfc->cfg_regs + k; 305 config_reg = pfc->info->cfg_regs + k;
327 306
328 r_width = config_reg->reg_width; 307 r_width = config_reg->reg_width;
329 f_width = config_reg->field_width; 308 f_width = config_reg->field_width;
@@ -361,12 +340,12 @@ static int get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
361int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos, 340int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
362 pinmux_enum_t *enum_idp) 341 pinmux_enum_t *enum_idp)
363{ 342{
364 pinmux_enum_t enum_id = pfc->gpios[gpio].enum_id; 343 pinmux_enum_t enum_id = pfc->info->gpios[gpio].enum_id;
365 pinmux_enum_t *data = pfc->gpio_data; 344 pinmux_enum_t *data = pfc->info->gpio_data;
366 int k; 345 int k;
367 346
368 if (!enum_in_range(enum_id, &pfc->data)) { 347 if (!sh_pfc_enum_in_range(enum_id, &pfc->info->data)) {
369 if (!enum_in_range(enum_id, &pfc->mark)) { 348 if (!sh_pfc_enum_in_range(enum_id, &pfc->info->mark)) {
370 pr_err("non data/mark enum_id for gpio %d\n", gpio); 349 pr_err("non data/mark enum_id for gpio %d\n", gpio);
371 return -1; 350 return -1;
372 } 351 }
@@ -377,7 +356,7 @@ int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
377 return pos + 1; 356 return pos + 1;
378 } 357 }
379 358
380 for (k = 0; k < pfc->gpio_data_size; k++) { 359 for (k = 0; k < pfc->info->gpio_data_size; k++) {
381 if (data[k] == enum_id) { 360 if (data[k] == enum_id) {
382 *enum_idp = data[k + 1]; 361 *enum_idp = data[k + 1];
383 return k + 1; 362 return k + 1;
@@ -387,7 +366,6 @@ int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
387 pr_err("cannot locate data/mark enum_id for gpio %d\n", gpio); 366 pr_err("cannot locate data/mark enum_id for gpio %d\n", gpio);
388 return -1; 367 return -1;
389} 368}
390EXPORT_SYMBOL_GPL(sh_pfc_gpio_to_enum);
391 369
392int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type, 370int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
393 int cfg_mode) 371 int cfg_mode)
@@ -405,19 +383,19 @@ int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
405 break; 383 break;
406 384
407 case PINMUX_TYPE_OUTPUT: 385 case PINMUX_TYPE_OUTPUT:
408 range = &pfc->output; 386 range = &pfc->info->output;
409 break; 387 break;
410 388
411 case PINMUX_TYPE_INPUT: 389 case PINMUX_TYPE_INPUT:
412 range = &pfc->input; 390 range = &pfc->info->input;
413 break; 391 break;
414 392
415 case PINMUX_TYPE_INPUT_PULLUP: 393 case PINMUX_TYPE_INPUT_PULLUP:
416 range = &pfc->input_pu; 394 range = &pfc->info->input_pu;
417 break; 395 break;
418 396
419 case PINMUX_TYPE_INPUT_PULLDOWN: 397 case PINMUX_TYPE_INPUT_PULLDOWN:
420 range = &pfc->input_pd; 398 range = &pfc->info->input_pd;
421 break; 399 break;
422 400
423 default: 401 default:
@@ -437,7 +415,7 @@ int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
437 break; 415 break;
438 416
439 /* first check if this is a function enum */ 417 /* first check if this is a function enum */
440 in_range = enum_in_range(enum_id, &pfc->function); 418 in_range = sh_pfc_enum_in_range(enum_id, &pfc->info->function);
441 if (!in_range) { 419 if (!in_range) {
442 /* not a function enum */ 420 /* not a function enum */
443 if (range) { 421 if (range) {
@@ -449,7 +427,7 @@ int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
449 * for this case we only allow function enums 427 * for this case we only allow function enums
450 * and the enums that match the other range. 428 * and the enums that match the other range.
451 */ 429 */
452 in_range = enum_in_range(enum_id, range); 430 in_range = sh_pfc_enum_in_range(enum_id, range);
453 431
454 /* 432 /*
455 * special case pass through for fixed 433 * special case pass through for fixed
@@ -474,19 +452,19 @@ int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
474 if (!in_range) 452 if (!in_range)
475 continue; 453 continue;
476 454
477 if (get_config_reg(pfc, enum_id, &cr, 455 if (sh_pfc_get_config_reg(pfc, enum_id, &cr,
478 &field, &value, &cntp) != 0) 456 &field, &value, &cntp) != 0)
479 goto out_err; 457 goto out_err;
480 458
481 switch (cfg_mode) { 459 switch (cfg_mode) {
482 case GPIO_CFG_DRYRUN: 460 case GPIO_CFG_DRYRUN:
483 if (!*cntp || 461 if (!*cntp ||
484 (read_config_reg(pfc, cr, field) != value)) 462 (sh_pfc_read_config_reg(pfc, cr, field) != value))
485 continue; 463 continue;
486 break; 464 break;
487 465
488 case GPIO_CFG_REQ: 466 case GPIO_CFG_REQ:
489 write_config_reg(pfc, cr, field, value); 467 sh_pfc_write_config_reg(pfc, cr, field, value);
490 *cntp = *cntp + 1; 468 *cntp = *cntp + 1;
491 break; 469 break;
492 470
@@ -500,11 +478,11 @@ int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
500 out_err: 478 out_err:
501 return -1; 479 return -1;
502} 480}
503EXPORT_SYMBOL_GPL(sh_pfc_config_gpio);
504 481
505int register_sh_pfc(struct sh_pfc *pfc) 482static int sh_pfc_probe(struct platform_device *pdev)
506{ 483{
507 int (*initroutine)(struct sh_pfc *) = NULL; 484 struct sh_pfc_soc_info *info;
485 struct sh_pfc *pfc;
508 int ret; 486 int ret;
509 487
510 /* 488 /*
@@ -512,61 +490,146 @@ int register_sh_pfc(struct sh_pfc *pfc)
512 */ 490 */
513 BUILD_BUG_ON(PINMUX_FLAG_TYPE > ((1 << PINMUX_FLAG_DBIT_SHIFT) - 1)); 491 BUILD_BUG_ON(PINMUX_FLAG_TYPE > ((1 << PINMUX_FLAG_DBIT_SHIFT) - 1));
514 492
515 if (sh_pfc) 493 info = pdev->id_entry->driver_data
516 return -EBUSY; 494 ? (void *)pdev->id_entry->driver_data : pdev->dev.platform_data;
495 if (info == NULL)
496 return -ENODEV;
497
498 pfc = devm_kzalloc(&pdev->dev, sizeof(*pfc), GFP_KERNEL);
499 if (pfc == NULL)
500 return -ENOMEM;
501
502 pfc->info = info;
503 pfc->dev = &pdev->dev;
517 504
518 ret = pfc_ioremap(pfc); 505 ret = sh_pfc_ioremap(pfc, pdev);
519 if (unlikely(ret < 0)) 506 if (unlikely(ret < 0))
520 return ret; 507 return ret;
521 508
522 spin_lock_init(&pfc->lock); 509 spin_lock_init(&pfc->lock);
523 510
524 pinctrl_provide_dummies(); 511 pinctrl_provide_dummies();
525 setup_data_regs(pfc); 512 sh_pfc_setup_data_regs(pfc);
526
527 sh_pfc = pfc;
528 513
529 /* 514 /*
530 * Initialize pinctrl bindings first 515 * Initialize pinctrl bindings first
531 */ 516 */
532 initroutine = symbol_request(sh_pfc_register_pinctrl); 517 ret = sh_pfc_register_pinctrl(pfc);
533 if (initroutine) { 518 if (unlikely(ret != 0))
534 ret = (*initroutine)(pfc); 519 return ret;
535 symbol_put_addr(initroutine);
536
537 if (unlikely(ret != 0))
538 goto err;
539 } else {
540 pr_err("failed to initialize pinctrl bindings\n");
541 goto err;
542 }
543 520
521#ifdef CONFIG_GPIO_SH_PFC
544 /* 522 /*
545 * Then the GPIO chip 523 * Then the GPIO chip
546 */ 524 */
547 initroutine = symbol_request(sh_pfc_register_gpiochip); 525 ret = sh_pfc_register_gpiochip(pfc);
548 if (initroutine) { 526 if (unlikely(ret != 0)) {
549 ret = (*initroutine)(pfc);
550 symbol_put_addr(initroutine);
551
552 /* 527 /*
553 * If the GPIO chip fails to come up we still leave the 528 * If the GPIO chip fails to come up we still leave the
554 * PFC state as it is, given that there are already 529 * PFC state as it is, given that there are already
555 * extant users of it that have succeeded by this point. 530 * extant users of it that have succeeded by this point.
556 */ 531 */
557 if (unlikely(ret != 0)) { 532 pr_notice("failed to init GPIO chip, ignoring...\n");
558 pr_notice("failed to init GPIO chip, ignoring...\n");
559 ret = 0;
560 }
561 } 533 }
534#endif
535
536 platform_set_drvdata(pdev, pfc);
562 537
563 pr_info("%s support registered\n", pfc->name); 538 pr_info("%s support registered\n", info->name);
564 539
565 return 0; 540 return 0;
541}
566 542
567err: 543static int sh_pfc_remove(struct platform_device *pdev)
568 pfc_iounmap(pfc); 544{
569 sh_pfc = NULL; 545 struct sh_pfc *pfc = platform_get_drvdata(pdev);
546
547#ifdef CONFIG_GPIO_SH_PFC
548 sh_pfc_unregister_gpiochip(pfc);
549#endif
550 sh_pfc_unregister_pinctrl(pfc);
551
552 platform_set_drvdata(pdev, NULL);
570 553
571 return ret; 554 return 0;
572} 555}
556
557static const struct platform_device_id sh_pfc_id_table[] = {
558#ifdef CONFIG_PINCTRL_PFC_R8A7740
559 { "pfc-r8a7740", (kernel_ulong_t)&r8a7740_pinmux_info },
560#endif
561#ifdef CONFIG_PINCTRL_PFC_R8A7779
562 { "pfc-r8a7779", (kernel_ulong_t)&r8a7779_pinmux_info },
563#endif
564#ifdef CONFIG_PINCTRL_PFC_SH7203
565 { "pfc-sh7203", (kernel_ulong_t)&sh7203_pinmux_info },
566#endif
567#ifdef CONFIG_PINCTRL_PFC_SH7264
568 { "pfc-sh7264", (kernel_ulong_t)&sh7264_pinmux_info },
569#endif
570#ifdef CONFIG_PINCTRL_PFC_SH7269
571 { "pfc-sh7269", (kernel_ulong_t)&sh7269_pinmux_info },
572#endif
573#ifdef CONFIG_PINCTRL_PFC_SH7372
574 { "pfc-sh7372", (kernel_ulong_t)&sh7372_pinmux_info },
575#endif
576#ifdef CONFIG_PINCTRL_PFC_SH73A0
577 { "pfc-sh73a0", (kernel_ulong_t)&sh73a0_pinmux_info },
578#endif
579#ifdef CONFIG_PINCTRL_PFC_SH7720
580 { "pfc-sh7720", (kernel_ulong_t)&sh7720_pinmux_info },
581#endif
582#ifdef CONFIG_PINCTRL_PFC_SH7722
583 { "pfc-sh7722", (kernel_ulong_t)&sh7722_pinmux_info },
584#endif
585#ifdef CONFIG_PINCTRL_PFC_SH7723
586 { "pfc-sh7723", (kernel_ulong_t)&sh7723_pinmux_info },
587#endif
588#ifdef CONFIG_PINCTRL_PFC_SH7724
589 { "pfc-sh7724", (kernel_ulong_t)&sh7724_pinmux_info },
590#endif
591#ifdef CONFIG_PINCTRL_PFC_SH7734
592 { "pfc-sh7734", (kernel_ulong_t)&sh7734_pinmux_info },
593#endif
594#ifdef CONFIG_PINCTRL_PFC_SH7757
595 { "pfc-sh7757", (kernel_ulong_t)&sh7757_pinmux_info },
596#endif
597#ifdef CONFIG_PINCTRL_PFC_SH7785
598 { "pfc-sh7785", (kernel_ulong_t)&sh7785_pinmux_info },
599#endif
600#ifdef CONFIG_PINCTRL_PFC_SH7786
601 { "pfc-sh7786", (kernel_ulong_t)&sh7786_pinmux_info },
602#endif
603#ifdef CONFIG_PINCTRL_PFC_SHX3
604 { "pfc-shx3", (kernel_ulong_t)&shx3_pinmux_info },
605#endif
606 { "sh-pfc", 0 },
607 { },
608};
609MODULE_DEVICE_TABLE(platform, sh_pfc_id_table);
610
611static struct platform_driver sh_pfc_driver = {
612 .probe = sh_pfc_probe,
613 .remove = sh_pfc_remove,
614 .id_table = sh_pfc_id_table,
615 .driver = {
616 .name = DRV_NAME,
617 .owner = THIS_MODULE,
618 },
619};
620
621static int __init sh_pfc_init(void)
622{
623 return platform_driver_register(&sh_pfc_driver);
624}
625postcore_initcall(sh_pfc_init);
626
627static void __exit sh_pfc_exit(void)
628{
629 platform_driver_unregister(&sh_pfc_driver);
630}
631module_exit(sh_pfc_exit);
632
633MODULE_AUTHOR("Magnus Damm, Paul Mundt, Laurent Pinchart");
634MODULE_DESCRIPTION("Pin Control and GPIO driver for SuperH pin function controller");
635MODULE_LICENSE("GPL v2");
diff --git a/drivers/pinctrl/sh-pfc/core.h b/drivers/pinctrl/sh-pfc/core.h
new file mode 100644
index 000000000000..ba7c33c33599
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/core.h
@@ -0,0 +1,72 @@
1/*
2 * SuperH Pin Function Controller support.
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#ifndef __SH_PFC_CORE_H__
11#define __SH_PFC_CORE_H__
12
13#include <linux/compiler.h>
14#include <linux/types.h>
15
16#include "sh_pfc.h"
17
18struct sh_pfc_window {
19 phys_addr_t phys;
20 void __iomem *virt;
21 unsigned long size;
22};
23
24struct sh_pfc_chip;
25struct sh_pfc_pinctrl;
26
27struct sh_pfc {
28 struct device *dev;
29 struct sh_pfc_soc_info *info;
30 spinlock_t lock;
31
32 unsigned int num_windows;
33 struct sh_pfc_window *window;
34
35 struct sh_pfc_chip *gpio;
36 struct sh_pfc_pinctrl *pinctrl;
37};
38
39int sh_pfc_register_gpiochip(struct sh_pfc *pfc);
40int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc);
41
42int sh_pfc_register_pinctrl(struct sh_pfc *pfc);
43int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc);
44
45int sh_pfc_read_bit(struct pinmux_data_reg *dr, unsigned long in_pos);
46void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
47 unsigned long value);
48int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
49 struct pinmux_data_reg **drp, int *bitp);
50int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
51 pinmux_enum_t *enum_idp);
52int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
53 int cfg_mode);
54
55extern struct sh_pfc_soc_info r8a7740_pinmux_info;
56extern struct sh_pfc_soc_info r8a7779_pinmux_info;
57extern struct sh_pfc_soc_info sh7203_pinmux_info;
58extern struct sh_pfc_soc_info sh7264_pinmux_info;
59extern struct sh_pfc_soc_info sh7269_pinmux_info;
60extern struct sh_pfc_soc_info sh7372_pinmux_info;
61extern struct sh_pfc_soc_info sh73a0_pinmux_info;
62extern struct sh_pfc_soc_info sh7720_pinmux_info;
63extern struct sh_pfc_soc_info sh7722_pinmux_info;
64extern struct sh_pfc_soc_info sh7723_pinmux_info;
65extern struct sh_pfc_soc_info sh7724_pinmux_info;
66extern struct sh_pfc_soc_info sh7734_pinmux_info;
67extern struct sh_pfc_soc_info sh7757_pinmux_info;
68extern struct sh_pfc_soc_info sh7785_pinmux_info;
69extern struct sh_pfc_soc_info sh7786_pinmux_info;
70extern struct sh_pfc_soc_info shx3_pinmux_info;
71
72#endif /* __SH_PFC_CORE_H__ */
diff --git a/drivers/sh/pfc/gpio.c b/drivers/pinctrl/sh-pfc/gpio.c
index 6a24f07c2013..a535075c8b69 100644
--- a/drivers/sh/pfc/gpio.c
+++ b/drivers/pinctrl/sh-pfc/gpio.c
@@ -8,16 +8,18 @@
8 * License. See the file "COPYING" in the main directory of this archive 8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details. 9 * for more details.
10 */ 10 */
11#define pr_fmt(fmt) "sh_pfc " KBUILD_MODNAME ": " fmt
12 11
13#include <linux/init.h> 12#define pr_fmt(fmt) KBUILD_MODNAME " gpio: " fmt
13
14#include <linux/device.h>
14#include <linux/gpio.h> 15#include <linux/gpio.h>
15#include <linux/slab.h> 16#include <linux/init.h>
16#include <linux/spinlock.h>
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/platform_device.h>
19#include <linux/pinctrl/consumer.h> 18#include <linux/pinctrl/consumer.h>
20#include <linux/sh_pfc.h> 19#include <linux/slab.h>
20#include <linux/spinlock.h>
21
22#include "core.h"
21 23
22struct sh_pfc_chip { 24struct sh_pfc_chip {
23 struct sh_pfc *pfc; 25 struct sh_pfc *pfc;
@@ -49,7 +51,7 @@ static void sh_gpio_set_value(struct sh_pfc *pfc, unsigned gpio, int value)
49 struct pinmux_data_reg *dr = NULL; 51 struct pinmux_data_reg *dr = NULL;
50 int bit = 0; 52 int bit = 0;
51 53
52 if (!pfc || sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0) 54 if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0)
53 BUG(); 55 BUG();
54 else 56 else
55 sh_pfc_write_bit(dr, bit, value); 57 sh_pfc_write_bit(dr, bit, value);
@@ -60,7 +62,7 @@ static int sh_gpio_get_value(struct sh_pfc *pfc, unsigned gpio)
60 struct pinmux_data_reg *dr = NULL; 62 struct pinmux_data_reg *dr = NULL;
61 int bit = 0; 63 int bit = 0;
62 64
63 if (!pfc || sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0) 65 if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0)
64 return -EINVAL; 66 return -EINVAL;
65 67
66 return sh_pfc_read_bit(dr, bit); 68 return sh_pfc_read_bit(dr, bit);
@@ -103,11 +105,11 @@ static int sh_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
103 if (pos <= 0 || !enum_id) 105 if (pos <= 0 || !enum_id)
104 break; 106 break;
105 107
106 for (i = 0; i < pfc->gpio_irq_size; i++) { 108 for (i = 0; i < pfc->info->gpio_irq_size; i++) {
107 enum_ids = pfc->gpio_irq[i].enum_ids; 109 enum_ids = pfc->info->gpio_irq[i].enum_ids;
108 for (k = 0; enum_ids[k]; k++) { 110 for (k = 0; enum_ids[k]; k++) {
109 if (enum_ids[k] == enum_id) 111 if (enum_ids[k] == enum_id)
110 return pfc->gpio_irq[i].irq; 112 return pfc->info->gpio_irq[i].irq;
111 } 113 }
112 } 114 }
113 } 115 }
@@ -128,12 +130,12 @@ static void sh_pfc_gpio_setup(struct sh_pfc_chip *chip)
128 gc->set = sh_gpio_set; 130 gc->set = sh_gpio_set;
129 gc->to_irq = sh_gpio_to_irq; 131 gc->to_irq = sh_gpio_to_irq;
130 132
131 WARN_ON(pfc->first_gpio != 0); /* needs testing */ 133 WARN_ON(pfc->info->first_gpio != 0); /* needs testing */
132 134
133 gc->label = pfc->name; 135 gc->label = pfc->info->name;
134 gc->owner = THIS_MODULE; 136 gc->owner = THIS_MODULE;
135 gc->base = pfc->first_gpio; 137 gc->base = pfc->info->first_gpio;
136 gc->ngpio = (pfc->last_gpio - pfc->first_gpio) + 1; 138 gc->ngpio = (pfc->info->last_gpio - pfc->info->first_gpio) + 1;
137} 139}
138 140
139int sh_pfc_register_gpiochip(struct sh_pfc *pfc) 141int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
@@ -141,7 +143,7 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
141 struct sh_pfc_chip *chip; 143 struct sh_pfc_chip *chip;
142 int ret; 144 int ret;
143 145
144 chip = kzalloc(sizeof(struct sh_pfc_chip), GFP_KERNEL); 146 chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL);
145 if (unlikely(!chip)) 147 if (unlikely(!chip))
146 return -ENOMEM; 148 return -ENOMEM;
147 149
@@ -151,90 +153,26 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
151 153
152 ret = gpiochip_add(&chip->gpio_chip); 154 ret = gpiochip_add(&chip->gpio_chip);
153 if (unlikely(ret < 0)) 155 if (unlikely(ret < 0))
154 kfree(chip); 156 return ret;
155
156 pr_info("%s handling gpio %d -> %d\n",
157 pfc->name, pfc->first_gpio, pfc->last_gpio);
158
159 return ret;
160}
161EXPORT_SYMBOL_GPL(sh_pfc_register_gpiochip);
162
163static int sh_pfc_gpio_match(struct gpio_chip *gc, void *data)
164{
165 return !!strstr(gc->label, data);
166}
167
168static int sh_pfc_gpio_probe(struct platform_device *pdev)
169{
170 struct sh_pfc_chip *chip;
171 struct gpio_chip *gc;
172
173 gc = gpiochip_find("_pfc", sh_pfc_gpio_match);
174 if (unlikely(!gc)) {
175 pr_err("Cant find gpio chip\n");
176 return -ENODEV;
177 }
178 157
179 chip = gpio_to_pfc_chip(gc); 158 pfc->gpio = chip;
180 platform_set_drvdata(pdev, chip);
181 159
182 pr_info("attaching to GPIO chip %s\n", chip->pfc->name); 160 pr_info("%s handling gpio %d -> %d\n",
161 pfc->info->name, pfc->info->first_gpio,
162 pfc->info->last_gpio);
183 163
184 return 0; 164 return 0;
185} 165}
186 166
187static int sh_pfc_gpio_remove(struct platform_device *pdev) 167int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc)
188{ 168{
189 struct sh_pfc_chip *chip = platform_get_drvdata(pdev); 169 struct sh_pfc_chip *chip = pfc->gpio;
190 int ret; 170 int ret;
191 171
192 ret = gpiochip_remove(&chip->gpio_chip); 172 ret = gpiochip_remove(&chip->gpio_chip);
193 if (unlikely(ret < 0)) 173 if (unlikely(ret < 0))
194 return ret; 174 return ret;
195 175
196 kfree(chip); 176 pfc->gpio = NULL;
197 return 0; 177 return 0;
198} 178}
199
200static struct platform_driver sh_pfc_gpio_driver = {
201 .probe = sh_pfc_gpio_probe,
202 .remove = sh_pfc_gpio_remove,
203 .driver = {
204 .name = KBUILD_MODNAME,
205 .owner = THIS_MODULE,
206 },
207};
208
209static struct platform_device sh_pfc_gpio_device = {
210 .name = KBUILD_MODNAME,
211 .id = -1,
212};
213
214static int __init sh_pfc_gpio_init(void)
215{
216 int rc;
217
218 rc = platform_driver_register(&sh_pfc_gpio_driver);
219 if (likely(!rc)) {
220 rc = platform_device_register(&sh_pfc_gpio_device);
221 if (unlikely(rc))
222 platform_driver_unregister(&sh_pfc_gpio_driver);
223 }
224
225 return rc;
226}
227
228static void __exit sh_pfc_gpio_exit(void)
229{
230 platform_device_unregister(&sh_pfc_gpio_device);
231 platform_driver_unregister(&sh_pfc_gpio_driver);
232}
233
234module_init(sh_pfc_gpio_init);
235module_exit(sh_pfc_gpio_exit);
236
237MODULE_AUTHOR("Magnus Damm, Paul Mundt");
238MODULE_DESCRIPTION("GPIO driver for SuperH pin function controller");
239MODULE_LICENSE("GPL v2");
240MODULE_ALIAS("platform:pfc-gpio");
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7740.c b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
new file mode 100644
index 000000000000..214788c4a606
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7740.c
@@ -0,0 +1,2612 @@
1/*
2 * R8A7740 processor support
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Copyright (C) 2011 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; version 2 of the
10 * License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21#include <linux/kernel.h>
22#include <mach/r8a7740.h>
23#include <mach/irqs.h>
24
25#include "sh_pfc.h"
26
27#define CPU_ALL_PORT(fn, pfx, sfx) \
28 PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
29 PORT_10(fn, pfx##10, sfx), PORT_90(fn, pfx##1, sfx), \
30 PORT_10(fn, pfx##20, sfx), \
31 PORT_1(fn, pfx##210, sfx), PORT_1(fn, pfx##211, sfx)
32
33enum {
34 PINMUX_RESERVED = 0,
35
36 /* PORT0_DATA -> PORT211_DATA */
37 PINMUX_DATA_BEGIN,
38 PORT_ALL(DATA),
39 PINMUX_DATA_END,
40
41 /* PORT0_IN -> PORT211_IN */
42 PINMUX_INPUT_BEGIN,
43 PORT_ALL(IN),
44 PINMUX_INPUT_END,
45
46 /* PORT0_IN_PU -> PORT211_IN_PU */
47 PINMUX_INPUT_PULLUP_BEGIN,
48 PORT_ALL(IN_PU),
49 PINMUX_INPUT_PULLUP_END,
50
51 /* PORT0_IN_PD -> PORT211_IN_PD */
52 PINMUX_INPUT_PULLDOWN_BEGIN,
53 PORT_ALL(IN_PD),
54 PINMUX_INPUT_PULLDOWN_END,
55
56 /* PORT0_OUT -> PORT211_OUT */
57 PINMUX_OUTPUT_BEGIN,
58 PORT_ALL(OUT),
59 PINMUX_OUTPUT_END,
60
61 PINMUX_FUNCTION_BEGIN,
62 PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT211_FN_IN */
63 PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT211_FN_OUT */
64 PORT_ALL(FN0), /* PORT0_FN0 -> PORT211_FN0 */
65 PORT_ALL(FN1), /* PORT0_FN1 -> PORT211_FN1 */
66 PORT_ALL(FN2), /* PORT0_FN2 -> PORT211_FN2 */
67 PORT_ALL(FN3), /* PORT0_FN3 -> PORT211_FN3 */
68 PORT_ALL(FN4), /* PORT0_FN4 -> PORT211_FN4 */
69 PORT_ALL(FN5), /* PORT0_FN5 -> PORT211_FN5 */
70 PORT_ALL(FN6), /* PORT0_FN6 -> PORT211_FN6 */
71 PORT_ALL(FN7), /* PORT0_FN7 -> PORT211_FN7 */
72
73 MSEL1CR_31_0, MSEL1CR_31_1,
74 MSEL1CR_30_0, MSEL1CR_30_1,
75 MSEL1CR_29_0, MSEL1CR_29_1,
76 MSEL1CR_28_0, MSEL1CR_28_1,
77 MSEL1CR_27_0, MSEL1CR_27_1,
78 MSEL1CR_26_0, MSEL1CR_26_1,
79 MSEL1CR_16_0, MSEL1CR_16_1,
80 MSEL1CR_15_0, MSEL1CR_15_1,
81 MSEL1CR_14_0, MSEL1CR_14_1,
82 MSEL1CR_13_0, MSEL1CR_13_1,
83 MSEL1CR_12_0, MSEL1CR_12_1,
84 MSEL1CR_9_0, MSEL1CR_9_1,
85 MSEL1CR_7_0, MSEL1CR_7_1,
86 MSEL1CR_6_0, MSEL1CR_6_1,
87 MSEL1CR_5_0, MSEL1CR_5_1,
88 MSEL1CR_4_0, MSEL1CR_4_1,
89 MSEL1CR_3_0, MSEL1CR_3_1,
90 MSEL1CR_2_0, MSEL1CR_2_1,
91 MSEL1CR_0_0, MSEL1CR_0_1,
92
93 MSEL3CR_15_0, MSEL3CR_15_1, /* Trace / Debug ? */
94 MSEL3CR_6_0, MSEL3CR_6_1,
95
96 MSEL4CR_19_0, MSEL4CR_19_1,
97 MSEL4CR_18_0, MSEL4CR_18_1,
98 MSEL4CR_15_0, MSEL4CR_15_1,
99 MSEL4CR_10_0, MSEL4CR_10_1,
100 MSEL4CR_6_0, MSEL4CR_6_1,
101 MSEL4CR_4_0, MSEL4CR_4_1,
102 MSEL4CR_1_0, MSEL4CR_1_1,
103
104 MSEL5CR_31_0, MSEL5CR_31_1, /* irq/fiq output */
105 MSEL5CR_30_0, MSEL5CR_30_1,
106 MSEL5CR_29_0, MSEL5CR_29_1,
107 MSEL5CR_27_0, MSEL5CR_27_1,
108 MSEL5CR_25_0, MSEL5CR_25_1,
109 MSEL5CR_23_0, MSEL5CR_23_1,
110 MSEL5CR_21_0, MSEL5CR_21_1,
111 MSEL5CR_19_0, MSEL5CR_19_1,
112 MSEL5CR_17_0, MSEL5CR_17_1,
113 MSEL5CR_15_0, MSEL5CR_15_1,
114 MSEL5CR_14_0, MSEL5CR_14_1,
115 MSEL5CR_13_0, MSEL5CR_13_1,
116 MSEL5CR_12_0, MSEL5CR_12_1,
117 MSEL5CR_11_0, MSEL5CR_11_1,
118 MSEL5CR_10_0, MSEL5CR_10_1,
119 MSEL5CR_8_0, MSEL5CR_8_1,
120 MSEL5CR_7_0, MSEL5CR_7_1,
121 MSEL5CR_6_0, MSEL5CR_6_1,
122 MSEL5CR_5_0, MSEL5CR_5_1,
123 MSEL5CR_4_0, MSEL5CR_4_1,
124 MSEL5CR_3_0, MSEL5CR_3_1,
125 MSEL5CR_2_0, MSEL5CR_2_1,
126 MSEL5CR_0_0, MSEL5CR_0_1,
127 PINMUX_FUNCTION_END,
128
129 PINMUX_MARK_BEGIN,
130
131 /* IRQ */
132 IRQ0_PORT2_MARK, IRQ0_PORT13_MARK,
133 IRQ1_MARK,
134 IRQ2_PORT11_MARK, IRQ2_PORT12_MARK,
135 IRQ3_PORT10_MARK, IRQ3_PORT14_MARK,
136 IRQ4_PORT15_MARK, IRQ4_PORT172_MARK,
137 IRQ5_PORT0_MARK, IRQ5_PORT1_MARK,
138 IRQ6_PORT121_MARK, IRQ6_PORT173_MARK,
139 IRQ7_PORT120_MARK, IRQ7_PORT209_MARK,
140 IRQ8_MARK,
141 IRQ9_PORT118_MARK, IRQ9_PORT210_MARK,
142 IRQ10_MARK,
143 IRQ11_MARK,
144 IRQ12_PORT42_MARK, IRQ12_PORT97_MARK,
145 IRQ13_PORT64_MARK, IRQ13_PORT98_MARK,
146 IRQ14_PORT63_MARK, IRQ14_PORT99_MARK,
147 IRQ15_PORT62_MARK, IRQ15_PORT100_MARK,
148 IRQ16_PORT68_MARK, IRQ16_PORT211_MARK,
149 IRQ17_MARK,
150 IRQ18_MARK,
151 IRQ19_MARK,
152 IRQ20_MARK,
153 IRQ21_MARK,
154 IRQ22_MARK,
155 IRQ23_MARK,
156 IRQ24_MARK,
157 IRQ25_MARK,
158 IRQ26_PORT58_MARK, IRQ26_PORT81_MARK,
159 IRQ27_PORT57_MARK, IRQ27_PORT168_MARK,
160 IRQ28_PORT56_MARK, IRQ28_PORT169_MARK,
161 IRQ29_PORT50_MARK, IRQ29_PORT170_MARK,
162 IRQ30_PORT49_MARK, IRQ30_PORT171_MARK,
163 IRQ31_PORT41_MARK, IRQ31_PORT167_MARK,
164
165 /* Function */
166
167 /* DBGT */
168 DBGMDT2_MARK, DBGMDT1_MARK, DBGMDT0_MARK,
169 DBGMD10_MARK, DBGMD11_MARK, DBGMD20_MARK,
170 DBGMD21_MARK,
171
172 /* FSI-A */
173 FSIAISLD_PORT0_MARK, /* FSIAISLD Port 0/5 */
174 FSIAISLD_PORT5_MARK,
175 FSIASPDIF_PORT9_MARK, /* FSIASPDIF Port 9/18 */
176 FSIASPDIF_PORT18_MARK,
177 FSIAOSLD1_MARK, FSIAOSLD2_MARK, FSIAOLR_MARK,
178 FSIAOBT_MARK, FSIAOSLD_MARK, FSIAOMC_MARK,
179 FSIACK_MARK, FSIAILR_MARK, FSIAIBT_MARK,
180
181 /* FSI-B */
182 FSIBCK_MARK,
183
184 /* FMSI */
185 FMSISLD_PORT1_MARK, /* FMSISLD Port 1/6 */
186 FMSISLD_PORT6_MARK,
187 FMSIILR_MARK, FMSIIBT_MARK, FMSIOLR_MARK, FMSIOBT_MARK,
188 FMSICK_MARK, FMSOILR_MARK, FMSOIBT_MARK, FMSOOLR_MARK,
189 FMSOOBT_MARK, FMSOSLD_MARK, FMSOCK_MARK,
190
191 /* SCIFA0 */
192 SCIFA0_SCK_MARK, SCIFA0_CTS_MARK, SCIFA0_RTS_MARK,
193 SCIFA0_RXD_MARK, SCIFA0_TXD_MARK,
194
195 /* SCIFA1 */
196 SCIFA1_CTS_MARK, SCIFA1_SCK_MARK, SCIFA1_RXD_MARK,
197 SCIFA1_TXD_MARK, SCIFA1_RTS_MARK,
198
199 /* SCIFA2 */
200 SCIFA2_SCK_PORT22_MARK, /* SCIFA2_SCK Port 22/199 */
201 SCIFA2_SCK_PORT199_MARK,
202 SCIFA2_RXD_MARK, SCIFA2_TXD_MARK,
203 SCIFA2_CTS_MARK, SCIFA2_RTS_MARK,
204
205 /* SCIFA3 */
206 SCIFA3_RTS_PORT105_MARK, /* MSEL5CR_8_0 */
207 SCIFA3_SCK_PORT116_MARK,
208 SCIFA3_CTS_PORT117_MARK,
209 SCIFA3_RXD_PORT174_MARK,
210 SCIFA3_TXD_PORT175_MARK,
211
212 SCIFA3_RTS_PORT161_MARK, /* MSEL5CR_8_1 */
213 SCIFA3_SCK_PORT158_MARK,
214 SCIFA3_CTS_PORT162_MARK,
215 SCIFA3_RXD_PORT159_MARK,
216 SCIFA3_TXD_PORT160_MARK,
217
218 /* SCIFA4 */
219 SCIFA4_RXD_PORT12_MARK, /* MSEL5CR[12:11] = 00 */
220 SCIFA4_TXD_PORT13_MARK,
221
222 SCIFA4_RXD_PORT204_MARK, /* MSEL5CR[12:11] = 01 */
223 SCIFA4_TXD_PORT203_MARK,
224
225 SCIFA4_RXD_PORT94_MARK, /* MSEL5CR[12:11] = 10 */
226 SCIFA4_TXD_PORT93_MARK,
227
228 SCIFA4_SCK_PORT21_MARK, /* SCIFA4_SCK Port 21/205 */
229 SCIFA4_SCK_PORT205_MARK,
230
231 /* SCIFA5 */
232 SCIFA5_TXD_PORT20_MARK, /* MSEL5CR[15:14] = 00 */
233 SCIFA5_RXD_PORT10_MARK,
234
235 SCIFA5_RXD_PORT207_MARK, /* MSEL5CR[15:14] = 01 */
236 SCIFA5_TXD_PORT208_MARK,
237
238 SCIFA5_TXD_PORT91_MARK, /* MSEL5CR[15:14] = 10 */
239 SCIFA5_RXD_PORT92_MARK,
240
241 SCIFA5_SCK_PORT23_MARK, /* SCIFA5_SCK Port 23/206 */
242 SCIFA5_SCK_PORT206_MARK,
243
244 /* SCIFA6 */
245 SCIFA6_SCK_MARK, SCIFA6_RXD_MARK, SCIFA6_TXD_MARK,
246
247 /* SCIFA7 */
248 SCIFA7_TXD_MARK, SCIFA7_RXD_MARK,
249
250 /* SCIFAB */
251 SCIFB_SCK_PORT190_MARK, /* MSEL5CR_17_0 */
252 SCIFB_RXD_PORT191_MARK,
253 SCIFB_TXD_PORT192_MARK,
254 SCIFB_RTS_PORT186_MARK,
255 SCIFB_CTS_PORT187_MARK,
256
257 SCIFB_SCK_PORT2_MARK, /* MSEL5CR_17_1 */
258 SCIFB_RXD_PORT3_MARK,
259 SCIFB_TXD_PORT4_MARK,
260 SCIFB_RTS_PORT172_MARK,
261 SCIFB_CTS_PORT173_MARK,
262
263 /* LCD0 */
264 LCDC0_SELECT_MARK,
265
266 LCD0_D0_MARK, LCD0_D1_MARK, LCD0_D2_MARK, LCD0_D3_MARK,
267 LCD0_D4_MARK, LCD0_D5_MARK, LCD0_D6_MARK, LCD0_D7_MARK,
268 LCD0_D8_MARK, LCD0_D9_MARK, LCD0_D10_MARK, LCD0_D11_MARK,
269 LCD0_D12_MARK, LCD0_D13_MARK, LCD0_D14_MARK, LCD0_D15_MARK,
270 LCD0_D16_MARK, LCD0_D17_MARK,
271 LCD0_DON_MARK, LCD0_VCPWC_MARK, LCD0_VEPWC_MARK,
272 LCD0_DCK_MARK, LCD0_VSYN_MARK, /* for RGB */
273 LCD0_HSYN_MARK, LCD0_DISP_MARK, /* for RGB */
274 LCD0_WR_MARK, LCD0_RD_MARK, /* for SYS */
275 LCD0_CS_MARK, LCD0_RS_MARK, /* for SYS */
276
277 LCD0_D21_PORT158_MARK, LCD0_D23_PORT159_MARK, /* MSEL5CR_6_1 */
278 LCD0_D22_PORT160_MARK, LCD0_D20_PORT161_MARK,
279 LCD0_D19_PORT162_MARK, LCD0_D18_PORT163_MARK,
280 LCD0_LCLK_PORT165_MARK,
281
282 LCD0_D18_PORT40_MARK, LCD0_D22_PORT0_MARK, /* MSEL5CR_6_0 */
283 LCD0_D23_PORT1_MARK, LCD0_D21_PORT2_MARK,
284 LCD0_D20_PORT3_MARK, LCD0_D19_PORT4_MARK,
285 LCD0_LCLK_PORT102_MARK,
286
287 /* LCD1 */
288 LCDC1_SELECT_MARK,
289
290 LCD1_D0_MARK, LCD1_D1_MARK, LCD1_D2_MARK, LCD1_D3_MARK,
291 LCD1_D4_MARK, LCD1_D5_MARK, LCD1_D6_MARK, LCD1_D7_MARK,
292 LCD1_D8_MARK, LCD1_D9_MARK, LCD1_D10_MARK, LCD1_D11_MARK,
293 LCD1_D12_MARK, LCD1_D13_MARK, LCD1_D14_MARK, LCD1_D15_MARK,
294 LCD1_D16_MARK, LCD1_D17_MARK, LCD1_D18_MARK, LCD1_D19_MARK,
295 LCD1_D20_MARK, LCD1_D21_MARK, LCD1_D22_MARK, LCD1_D23_MARK,
296 LCD1_DON_MARK, LCD1_VCPWC_MARK,
297 LCD1_LCLK_MARK, LCD1_VEPWC_MARK,
298
299 LCD1_DCK_MARK, LCD1_VSYN_MARK, /* for RGB */
300 LCD1_HSYN_MARK, LCD1_DISP_MARK, /* for RGB */
301 LCD1_RS_MARK, LCD1_CS_MARK, /* for SYS */
302 LCD1_RD_MARK, LCD1_WR_MARK, /* for SYS */
303
304 /* RSPI */
305 RSPI_SSL0_A_MARK, RSPI_SSL1_A_MARK, RSPI_SSL2_A_MARK,
306 RSPI_SSL3_A_MARK, RSPI_CK_A_MARK, RSPI_MOSI_A_MARK,
307 RSPI_MISO_A_MARK,
308
309 /* VIO CKO */
310 VIO_CKO1_MARK, /* needs fixup */
311 VIO_CKO2_MARK,
312 VIO_CKO_1_MARK,
313 VIO_CKO_MARK,
314
315 /* VIO0 */
316 VIO0_D0_MARK, VIO0_D1_MARK, VIO0_D2_MARK, VIO0_D3_MARK,
317 VIO0_D4_MARK, VIO0_D5_MARK, VIO0_D6_MARK, VIO0_D7_MARK,
318 VIO0_D8_MARK, VIO0_D9_MARK, VIO0_D10_MARK, VIO0_D11_MARK,
319 VIO0_D12_MARK, VIO0_VD_MARK, VIO0_HD_MARK, VIO0_CLK_MARK,
320 VIO0_FIELD_MARK,
321
322 VIO0_D13_PORT26_MARK, /* MSEL5CR_27_0 */
323 VIO0_D14_PORT25_MARK,
324 VIO0_D15_PORT24_MARK,
325
326 VIO0_D13_PORT22_MARK, /* MSEL5CR_27_1 */
327 VIO0_D14_PORT95_MARK,
328 VIO0_D15_PORT96_MARK,
329
330 /* VIO1 */
331 VIO1_D0_MARK, VIO1_D1_MARK, VIO1_D2_MARK, VIO1_D3_MARK,
332 VIO1_D4_MARK, VIO1_D5_MARK, VIO1_D6_MARK, VIO1_D7_MARK,
333 VIO1_VD_MARK, VIO1_HD_MARK, VIO1_CLK_MARK, VIO1_FIELD_MARK,
334
335 /* TPU0 */
336 TPU0TO0_MARK, TPU0TO1_MARK, TPU0TO3_MARK,
337 TPU0TO2_PORT66_MARK, /* TPU0TO2 Port 66/202 */
338 TPU0TO2_PORT202_MARK,
339
340 /* SSP1 0 */
341 STP0_IPD0_MARK, STP0_IPD1_MARK, STP0_IPD2_MARK, STP0_IPD3_MARK,
342 STP0_IPD4_MARK, STP0_IPD5_MARK, STP0_IPD6_MARK, STP0_IPD7_MARK,
343 STP0_IPEN_MARK, STP0_IPCLK_MARK, STP0_IPSYNC_MARK,
344
345 /* SSP1 1 */
346 STP1_IPD1_MARK, STP1_IPD2_MARK, STP1_IPD3_MARK, STP1_IPD4_MARK,
347 STP1_IPD5_MARK, STP1_IPD6_MARK, STP1_IPD7_MARK, STP1_IPCLK_MARK,
348 STP1_IPSYNC_MARK,
349
350 STP1_IPD0_PORT186_MARK, /* MSEL5CR_23_0 */
351 STP1_IPEN_PORT187_MARK,
352
353 STP1_IPD0_PORT194_MARK, /* MSEL5CR_23_1 */
354 STP1_IPEN_PORT193_MARK,
355
356 /* SIM */
357 SIM_RST_MARK, SIM_CLK_MARK,
358 SIM_D_PORT22_MARK, /* SIM_D Port 22/199 */
359 SIM_D_PORT199_MARK,
360
361 /* SDHI0 */
362 SDHI0_D0_MARK, SDHI0_D1_MARK, SDHI0_D2_MARK, SDHI0_D3_MARK,
363 SDHI0_CD_MARK, SDHI0_WP_MARK, SDHI0_CMD_MARK, SDHI0_CLK_MARK,
364
365 /* SDHI1 */
366 SDHI1_D0_MARK, SDHI1_D1_MARK, SDHI1_D2_MARK, SDHI1_D3_MARK,
367 SDHI1_CD_MARK, SDHI1_WP_MARK, SDHI1_CMD_MARK, SDHI1_CLK_MARK,
368
369 /* SDHI2 */
370 SDHI2_D0_MARK, SDHI2_D1_MARK, SDHI2_D2_MARK, SDHI2_D3_MARK,
371 SDHI2_CLK_MARK, SDHI2_CMD_MARK,
372
373 SDHI2_CD_PORT24_MARK, /* MSEL5CR_19_0 */
374 SDHI2_WP_PORT25_MARK,
375
376 SDHI2_WP_PORT177_MARK, /* MSEL5CR_19_1 */
377 SDHI2_CD_PORT202_MARK,
378
379 /* MSIOF2 */
380 MSIOF2_TXD_MARK, MSIOF2_RXD_MARK, MSIOF2_TSCK_MARK,
381 MSIOF2_SS2_MARK, MSIOF2_TSYNC_MARK, MSIOF2_SS1_MARK,
382 MSIOF2_MCK1_MARK, MSIOF2_MCK0_MARK, MSIOF2_RSYNC_MARK,
383 MSIOF2_RSCK_MARK,
384
385 /* KEYSC */
386 KEYIN4_MARK, KEYIN5_MARK, KEYIN6_MARK, KEYIN7_MARK,
387 KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
388 KEYOUT4_MARK, KEYOUT5_MARK, KEYOUT6_MARK, KEYOUT7_MARK,
389
390 KEYIN0_PORT43_MARK, /* MSEL4CR_18_0 */
391 KEYIN1_PORT44_MARK,
392 KEYIN2_PORT45_MARK,
393 KEYIN3_PORT46_MARK,
394
395 KEYIN0_PORT58_MARK, /* MSEL4CR_18_1 */
396 KEYIN1_PORT57_MARK,
397 KEYIN2_PORT56_MARK,
398 KEYIN3_PORT55_MARK,
399
400 /* VOU */
401 DV_D0_MARK, DV_D1_MARK, DV_D2_MARK, DV_D3_MARK,
402 DV_D4_MARK, DV_D5_MARK, DV_D6_MARK, DV_D7_MARK,
403 DV_D8_MARK, DV_D9_MARK, DV_D10_MARK, DV_D11_MARK,
404 DV_D12_MARK, DV_D13_MARK, DV_D14_MARK, DV_D15_MARK,
405 DV_CLK_MARK, DV_VSYNC_MARK, DV_HSYNC_MARK,
406
407 /* MEMC */
408 MEMC_AD0_MARK, MEMC_AD1_MARK, MEMC_AD2_MARK, MEMC_AD3_MARK,
409 MEMC_AD4_MARK, MEMC_AD5_MARK, MEMC_AD6_MARK, MEMC_AD7_MARK,
410 MEMC_AD8_MARK, MEMC_AD9_MARK, MEMC_AD10_MARK, MEMC_AD11_MARK,
411 MEMC_AD12_MARK, MEMC_AD13_MARK, MEMC_AD14_MARK, MEMC_AD15_MARK,
412 MEMC_CS0_MARK, MEMC_INT_MARK, MEMC_NWE_MARK, MEMC_NOE_MARK,
413
414 MEMC_CS1_MARK, /* MSEL4CR_6_0 */
415 MEMC_ADV_MARK,
416 MEMC_WAIT_MARK,
417 MEMC_BUSCLK_MARK,
418
419 MEMC_A1_MARK, /* MSEL4CR_6_1 */
420 MEMC_DREQ0_MARK,
421 MEMC_DREQ1_MARK,
422 MEMC_A0_MARK,
423
424 /* MMC */
425 MMC0_D0_PORT68_MARK, MMC0_D1_PORT69_MARK, MMC0_D2_PORT70_MARK,
426 MMC0_D3_PORT71_MARK, MMC0_D4_PORT72_MARK, MMC0_D5_PORT73_MARK,
427 MMC0_D6_PORT74_MARK, MMC0_D7_PORT75_MARK, MMC0_CLK_PORT66_MARK,
428 MMC0_CMD_PORT67_MARK, /* MSEL4CR_15_0 */
429
430 MMC1_D0_PORT149_MARK, MMC1_D1_PORT148_MARK, MMC1_D2_PORT147_MARK,
431 MMC1_D3_PORT146_MARK, MMC1_D4_PORT145_MARK, MMC1_D5_PORT144_MARK,
432 MMC1_D6_PORT143_MARK, MMC1_D7_PORT142_MARK, MMC1_CLK_PORT103_MARK,
433 MMC1_CMD_PORT104_MARK, /* MSEL4CR_15_1 */
434
435 /* MSIOF0 */
436 MSIOF0_SS1_MARK, MSIOF0_SS2_MARK, MSIOF0_RXD_MARK,
437 MSIOF0_TXD_MARK, MSIOF0_MCK0_MARK, MSIOF0_MCK1_MARK,
438 MSIOF0_RSYNC_MARK, MSIOF0_RSCK_MARK, MSIOF0_TSCK_MARK,
439 MSIOF0_TSYNC_MARK,
440
441 /* MSIOF1 */
442 MSIOF1_RSCK_MARK, MSIOF1_RSYNC_MARK,
443 MSIOF1_MCK0_MARK, MSIOF1_MCK1_MARK,
444
445 MSIOF1_SS2_PORT116_MARK, MSIOF1_SS1_PORT117_MARK,
446 MSIOF1_RXD_PORT118_MARK, MSIOF1_TXD_PORT119_MARK,
447 MSIOF1_TSYNC_PORT120_MARK,
448 MSIOF1_TSCK_PORT121_MARK, /* MSEL4CR_10_0 */
449
450 MSIOF1_SS1_PORT67_MARK, MSIOF1_TSCK_PORT72_MARK,
451 MSIOF1_TSYNC_PORT73_MARK, MSIOF1_TXD_PORT74_MARK,
452 MSIOF1_RXD_PORT75_MARK,
453 MSIOF1_SS2_PORT202_MARK, /* MSEL4CR_10_1 */
454
455 /* GPIO */
456 GPO0_MARK, GPI0_MARK, GPO1_MARK, GPI1_MARK,
457
458 /* USB0 */
459 USB0_OCI_MARK, USB0_PPON_MARK, VBUS_MARK,
460
461 /* USB1 */
462 USB1_OCI_MARK, USB1_PPON_MARK,
463
464 /* BBIF1 */
465 BBIF1_RXD_MARK, BBIF1_TXD_MARK, BBIF1_TSYNC_MARK,
466 BBIF1_TSCK_MARK, BBIF1_RSCK_MARK, BBIF1_RSYNC_MARK,
467 BBIF1_FLOW_MARK, BBIF1_RX_FLOW_N_MARK,
468
469 /* BBIF2 */
470 BBIF2_TXD2_PORT5_MARK, /* MSEL5CR_0_0 */
471 BBIF2_RXD2_PORT60_MARK,
472 BBIF2_TSYNC2_PORT6_MARK,
473 BBIF2_TSCK2_PORT59_MARK,
474
475 BBIF2_RXD2_PORT90_MARK, /* MSEL5CR_0_1 */
476 BBIF2_TXD2_PORT183_MARK,
477 BBIF2_TSCK2_PORT89_MARK,
478 BBIF2_TSYNC2_PORT184_MARK,
479
480 /* BSC / FLCTL / PCMCIA */
481 CS0_MARK, CS2_MARK, CS4_MARK,
482 CS5B_MARK, CS6A_MARK,
483 CS5A_PORT105_MARK, /* CS5A PORT 19/105 */
484 CS5A_PORT19_MARK,
485 IOIS16_MARK, /* ? */
486
487 A0_MARK, A1_MARK, A2_MARK, A3_MARK,
488 A4_FOE_MARK, /* share with FLCTL */
489 A5_FCDE_MARK, /* share with FLCTL */
490 A6_MARK, A7_MARK, A8_MARK, A9_MARK,
491 A10_MARK, A11_MARK, A12_MARK, A13_MARK,
492 A14_MARK, A15_MARK, A16_MARK, A17_MARK,
493 A18_MARK, A19_MARK, A20_MARK, A21_MARK,
494 A22_MARK, A23_MARK, A24_MARK, A25_MARK,
495 A26_MARK,
496
497 D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, /* share with FLCTL */
498 D3_NAF3_MARK, D4_NAF4_MARK, D5_NAF5_MARK, /* share with FLCTL */
499 D6_NAF6_MARK, D7_NAF7_MARK, D8_NAF8_MARK, /* share with FLCTL */
500 D9_NAF9_MARK, D10_NAF10_MARK, D11_NAF11_MARK, /* share with FLCTL */
501 D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, /* share with FLCTL */
502 D15_NAF15_MARK, /* share with FLCTL */
503 D16_MARK, D17_MARK, D18_MARK, D19_MARK,
504 D20_MARK, D21_MARK, D22_MARK, D23_MARK,
505 D24_MARK, D25_MARK, D26_MARK, D27_MARK,
506 D28_MARK, D29_MARK, D30_MARK, D31_MARK,
507
508 WE0_FWE_MARK, /* share with FLCTL */
509 WE1_MARK,
510 WE2_ICIORD_MARK, /* share with PCMCIA */
511 WE3_ICIOWR_MARK, /* share with PCMCIA */
512 CKO_MARK, BS_MARK, RDWR_MARK,
513 RD_FSC_MARK, /* share with FLCTL */
514 WAIT_PORT177_MARK, /* WAIT Port 90/177 */
515 WAIT_PORT90_MARK,
516
517 FCE0_MARK, FCE1_MARK, FRB_MARK, /* FLCTL */
518
519 /* IRDA */
520 IRDA_FIRSEL_MARK, IRDA_IN_MARK, IRDA_OUT_MARK,
521
522 /* ATAPI */
523 IDE_D0_MARK, IDE_D1_MARK, IDE_D2_MARK, IDE_D3_MARK,
524 IDE_D4_MARK, IDE_D5_MARK, IDE_D6_MARK, IDE_D7_MARK,
525 IDE_D8_MARK, IDE_D9_MARK, IDE_D10_MARK, IDE_D11_MARK,
526 IDE_D12_MARK, IDE_D13_MARK, IDE_D14_MARK, IDE_D15_MARK,
527 IDE_A0_MARK, IDE_A1_MARK, IDE_A2_MARK, IDE_CS0_MARK,
528 IDE_CS1_MARK, IDE_IOWR_MARK, IDE_IORD_MARK, IDE_IORDY_MARK,
529 IDE_INT_MARK, IDE_RST_MARK, IDE_DIRECTION_MARK,
530 IDE_EXBUF_ENB_MARK, IDE_IODACK_MARK, IDE_IODREQ_MARK,
531
532 /* RMII */
533 RMII_CRS_DV_MARK, RMII_RX_ER_MARK, RMII_RXD0_MARK,
534 RMII_RXD1_MARK, RMII_TX_EN_MARK, RMII_TXD0_MARK,
535 RMII_MDC_MARK, RMII_TXD1_MARK, RMII_MDIO_MARK,
536 RMII_REF50CK_MARK, /* for RMII */
537 RMII_REF125CK_MARK, /* for GMII */
538
539 /* GEther */
540 ET_TX_CLK_MARK, ET_TX_EN_MARK, ET_ETXD0_MARK, ET_ETXD1_MARK,
541 ET_ETXD2_MARK, ET_ETXD3_MARK,
542 ET_ETXD4_MARK, ET_ETXD5_MARK, /* for GEther */
543 ET_ETXD6_MARK, ET_ETXD7_MARK, /* for GEther */
544 ET_COL_MARK, ET_TX_ER_MARK, ET_RX_CLK_MARK, ET_RX_DV_MARK,
545 ET_ERXD0_MARK, ET_ERXD1_MARK, ET_ERXD2_MARK, ET_ERXD3_MARK,
546 ET_ERXD4_MARK, ET_ERXD5_MARK, /* for GEther */
547 ET_ERXD6_MARK, ET_ERXD7_MARK, /* for GEther */
548 ET_RX_ER_MARK, ET_CRS_MARK, ET_MDC_MARK, ET_MDIO_MARK,
549 ET_LINK_MARK, ET_PHY_INT_MARK, ET_WOL_MARK, ET_GTX_CLK_MARK,
550
551 /* DMA0 */
552 DREQ0_MARK, DACK0_MARK,
553
554 /* DMA1 */
555 DREQ1_MARK, DACK1_MARK,
556
557 /* SYSC */
558 RESETOUTS_MARK, RESETP_PULLUP_MARK, RESETP_PLAIN_MARK,
559
560 /* IRREM */
561 IROUT_MARK,
562
563 /* SDENC */
564 SDENC_CPG_MARK, SDENC_DV_CLKI_MARK,
565
566 /* HDMI */
567 HDMI_HPD_MARK, HDMI_CEC_MARK,
568
569 /* DEBUG */
570 EDEBGREQ_PULLUP_MARK, /* for JTAG */
571 EDEBGREQ_PULLDOWN_MARK,
572
573 TRACEAUD_FROM_VIO_MARK, /* for TRACE/AUD */
574 TRACEAUD_FROM_LCDC0_MARK,
575 TRACEAUD_FROM_MEMC_MARK,
576
577 PINMUX_MARK_END,
578};
579
580static pinmux_enum_t pinmux_data[] = {
581 /* specify valid pin states for each pin in GPIO mode */
582
583 /* I/O and Pull U/D */
584 PORT_DATA_IO_PD(0), PORT_DATA_IO_PD(1),
585 PORT_DATA_IO_PD(2), PORT_DATA_IO_PD(3),
586 PORT_DATA_IO_PD(4), PORT_DATA_IO_PD(5),
587 PORT_DATA_IO_PD(6), PORT_DATA_IO(7),
588 PORT_DATA_IO(8), PORT_DATA_IO(9),
589
590 PORT_DATA_IO_PD(10), PORT_DATA_IO_PD(11),
591 PORT_DATA_IO_PD(12), PORT_DATA_IO_PU_PD(13),
592 PORT_DATA_IO_PD(14), PORT_DATA_IO_PD(15),
593 PORT_DATA_IO_PD(16), PORT_DATA_IO_PD(17),
594 PORT_DATA_IO(18), PORT_DATA_IO_PU(19),
595
596 PORT_DATA_IO_PU_PD(20), PORT_DATA_IO_PD(21),
597 PORT_DATA_IO_PU_PD(22), PORT_DATA_IO(23),
598 PORT_DATA_IO_PU(24), PORT_DATA_IO_PU(25),
599 PORT_DATA_IO_PU(26), PORT_DATA_IO_PU(27),
600 PORT_DATA_IO_PU(28), PORT_DATA_IO_PU(29),
601
602 PORT_DATA_IO_PU(30), PORT_DATA_IO_PD(31),
603 PORT_DATA_IO_PD(32), PORT_DATA_IO_PD(33),
604 PORT_DATA_IO_PD(34), PORT_DATA_IO_PU(35),
605 PORT_DATA_IO_PU(36), PORT_DATA_IO_PD(37),
606 PORT_DATA_IO_PU(38), PORT_DATA_IO_PD(39),
607
608 PORT_DATA_IO_PU_PD(40), PORT_DATA_IO_PD(41),
609 PORT_DATA_IO_PD(42), PORT_DATA_IO_PU_PD(43),
610 PORT_DATA_IO_PU_PD(44), PORT_DATA_IO_PU_PD(45),
611 PORT_DATA_IO_PU_PD(46), PORT_DATA_IO_PU_PD(47),
612 PORT_DATA_IO_PU_PD(48), PORT_DATA_IO_PU_PD(49),
613
614 PORT_DATA_IO_PU_PD(50), PORT_DATA_IO_PD(51),
615 PORT_DATA_IO_PD(52), PORT_DATA_IO_PD(53),
616 PORT_DATA_IO_PD(54), PORT_DATA_IO_PU_PD(55),
617 PORT_DATA_IO_PU_PD(56), PORT_DATA_IO_PU_PD(57),
618 PORT_DATA_IO_PU_PD(58), PORT_DATA_IO_PU_PD(59),
619
620 PORT_DATA_IO_PU_PD(60), PORT_DATA_IO_PD(61),
621 PORT_DATA_IO_PD(62), PORT_DATA_IO_PD(63),
622 PORT_DATA_IO_PD(64), PORT_DATA_IO_PD(65),
623 PORT_DATA_IO_PU_PD(66), PORT_DATA_IO_PU_PD(67),
624 PORT_DATA_IO_PU_PD(68), PORT_DATA_IO_PU_PD(69),
625
626 PORT_DATA_IO_PU_PD(70), PORT_DATA_IO_PU_PD(71),
627 PORT_DATA_IO_PU_PD(72), PORT_DATA_IO_PU_PD(73),
628 PORT_DATA_IO_PU_PD(74), PORT_DATA_IO_PU_PD(75),
629 PORT_DATA_IO_PU_PD(76), PORT_DATA_IO_PU_PD(77),
630 PORT_DATA_IO_PU_PD(78), PORT_DATA_IO_PU_PD(79),
631
632 PORT_DATA_IO_PU_PD(80), PORT_DATA_IO_PU_PD(81),
633 PORT_DATA_IO(82), PORT_DATA_IO_PU_PD(83),
634 PORT_DATA_IO(84), PORT_DATA_IO_PD(85),
635 PORT_DATA_IO_PD(86), PORT_DATA_IO_PD(87),
636 PORT_DATA_IO_PD(88), PORT_DATA_IO_PD(89),
637
638 PORT_DATA_IO_PD(90), PORT_DATA_IO_PU_PD(91),
639 PORT_DATA_IO_PU_PD(92), PORT_DATA_IO_PU_PD(93),
640 PORT_DATA_IO_PU_PD(94), PORT_DATA_IO_PU_PD(95),
641 PORT_DATA_IO_PU_PD(96), PORT_DATA_IO_PU_PD(97),
642 PORT_DATA_IO_PU_PD(98), PORT_DATA_IO_PU_PD(99),
643
644 PORT_DATA_IO_PU_PD(100), PORT_DATA_IO(101),
645 PORT_DATA_IO_PU(102), PORT_DATA_IO_PU_PD(103),
646 PORT_DATA_IO_PU(104), PORT_DATA_IO_PU(105),
647 PORT_DATA_IO_PU_PD(106), PORT_DATA_IO(107),
648 PORT_DATA_IO(108), PORT_DATA_IO(109),
649
650 PORT_DATA_IO(110), PORT_DATA_IO(111),
651 PORT_DATA_IO(112), PORT_DATA_IO(113),
652 PORT_DATA_IO_PU_PD(114), PORT_DATA_IO(115),
653 PORT_DATA_IO_PD(116), PORT_DATA_IO_PD(117),
654 PORT_DATA_IO_PD(118), PORT_DATA_IO_PD(119),
655
656 PORT_DATA_IO_PD(120), PORT_DATA_IO_PD(121),
657 PORT_DATA_IO_PD(122), PORT_DATA_IO_PD(123),
658 PORT_DATA_IO_PD(124), PORT_DATA_IO(125),
659 PORT_DATA_IO(126), PORT_DATA_IO(127),
660 PORT_DATA_IO(128), PORT_DATA_IO(129),
661
662 PORT_DATA_IO(130), PORT_DATA_IO(131),
663 PORT_DATA_IO(132), PORT_DATA_IO(133),
664 PORT_DATA_IO(134), PORT_DATA_IO(135),
665 PORT_DATA_IO(136), PORT_DATA_IO(137),
666 PORT_DATA_IO(138), PORT_DATA_IO(139),
667
668 PORT_DATA_IO(140), PORT_DATA_IO(141),
669 PORT_DATA_IO_PU(142), PORT_DATA_IO_PU(143),
670 PORT_DATA_IO_PU(144), PORT_DATA_IO_PU(145),
671 PORT_DATA_IO_PU(146), PORT_DATA_IO_PU(147),
672 PORT_DATA_IO_PU(148), PORT_DATA_IO_PU(149),
673
674 PORT_DATA_IO_PU(150), PORT_DATA_IO_PU(151),
675 PORT_DATA_IO_PU(152), PORT_DATA_IO_PU(153),
676 PORT_DATA_IO_PU(154), PORT_DATA_IO_PU(155),
677 PORT_DATA_IO_PU(156), PORT_DATA_IO_PU(157),
678 PORT_DATA_IO_PD(158), PORT_DATA_IO_PD(159),
679
680 PORT_DATA_IO_PU_PD(160), PORT_DATA_IO_PD(161),
681 PORT_DATA_IO_PD(162), PORT_DATA_IO_PD(163),
682 PORT_DATA_IO_PD(164), PORT_DATA_IO_PD(165),
683 PORT_DATA_IO_PU(166), PORT_DATA_IO_PU(167),
684 PORT_DATA_IO_PU(168), PORT_DATA_IO_PU(169),
685
686 PORT_DATA_IO_PU(170), PORT_DATA_IO_PU(171),
687 PORT_DATA_IO_PD(172), PORT_DATA_IO_PD(173),
688 PORT_DATA_IO_PD(174), PORT_DATA_IO_PD(175),
689 PORT_DATA_IO_PU(176), PORT_DATA_IO_PU_PD(177),
690 PORT_DATA_IO_PU(178), PORT_DATA_IO_PD(179),
691
692 PORT_DATA_IO_PD(180), PORT_DATA_IO_PU(181),
693 PORT_DATA_IO_PU(182), PORT_DATA_IO(183),
694 PORT_DATA_IO_PD(184), PORT_DATA_IO_PD(185),
695 PORT_DATA_IO_PD(186), PORT_DATA_IO_PD(187),
696 PORT_DATA_IO_PD(188), PORT_DATA_IO_PD(189),
697
698 PORT_DATA_IO_PD(190), PORT_DATA_IO_PD(191),
699 PORT_DATA_IO_PD(192), PORT_DATA_IO_PU_PD(193),
700 PORT_DATA_IO_PU_PD(194), PORT_DATA_IO_PD(195),
701 PORT_DATA_IO_PU_PD(196), PORT_DATA_IO_PD(197),
702 PORT_DATA_IO_PU_PD(198), PORT_DATA_IO_PU_PD(199),
703
704 PORT_DATA_IO_PU_PD(200), PORT_DATA_IO_PU(201),
705 PORT_DATA_IO_PU_PD(202), PORT_DATA_IO(203),
706 PORT_DATA_IO_PU_PD(204), PORT_DATA_IO_PU_PD(205),
707 PORT_DATA_IO_PU_PD(206), PORT_DATA_IO_PU_PD(207),
708 PORT_DATA_IO_PU_PD(208), PORT_DATA_IO_PD(209),
709
710 PORT_DATA_IO_PD(210), PORT_DATA_IO_PD(211),
711
712 /* Port0 */
713 PINMUX_DATA(DBGMDT2_MARK, PORT0_FN1),
714 PINMUX_DATA(FSIAISLD_PORT0_MARK, PORT0_FN2, MSEL5CR_3_0),
715 PINMUX_DATA(FSIAOSLD1_MARK, PORT0_FN3),
716 PINMUX_DATA(LCD0_D22_PORT0_MARK, PORT0_FN4, MSEL5CR_6_0),
717 PINMUX_DATA(SCIFA7_RXD_MARK, PORT0_FN6),
718 PINMUX_DATA(LCD1_D4_MARK, PORT0_FN7),
719 PINMUX_DATA(IRQ5_PORT0_MARK, PORT0_FN0, MSEL1CR_5_0),
720
721 /* Port1 */
722 PINMUX_DATA(DBGMDT1_MARK, PORT1_FN1),
723 PINMUX_DATA(FMSISLD_PORT1_MARK, PORT1_FN2, MSEL5CR_5_0),
724 PINMUX_DATA(FSIAOSLD2_MARK, PORT1_FN3),
725 PINMUX_DATA(LCD0_D23_PORT1_MARK, PORT1_FN4, MSEL5CR_6_0),
726 PINMUX_DATA(SCIFA7_TXD_MARK, PORT1_FN6),
727 PINMUX_DATA(LCD1_D3_MARK, PORT1_FN7),
728 PINMUX_DATA(IRQ5_PORT1_MARK, PORT1_FN0, MSEL1CR_5_1),
729
730 /* Port2 */
731 PINMUX_DATA(DBGMDT0_MARK, PORT2_FN1),
732 PINMUX_DATA(SCIFB_SCK_PORT2_MARK, PORT2_FN2, MSEL5CR_17_1),
733 PINMUX_DATA(LCD0_D21_PORT2_MARK, PORT2_FN4, MSEL5CR_6_0),
734 PINMUX_DATA(LCD1_D2_MARK, PORT2_FN7),
735 PINMUX_DATA(IRQ0_PORT2_MARK, PORT2_FN0, MSEL1CR_0_1),
736
737 /* Port3 */
738 PINMUX_DATA(DBGMD21_MARK, PORT3_FN1),
739 PINMUX_DATA(SCIFB_RXD_PORT3_MARK, PORT3_FN2, MSEL5CR_17_1),
740 PINMUX_DATA(LCD0_D20_PORT3_MARK, PORT3_FN4, MSEL5CR_6_0),
741 PINMUX_DATA(LCD1_D1_MARK, PORT3_FN7),
742
743 /* Port4 */
744 PINMUX_DATA(DBGMD20_MARK, PORT4_FN1),
745 PINMUX_DATA(SCIFB_TXD_PORT4_MARK, PORT4_FN2, MSEL5CR_17_1),
746 PINMUX_DATA(LCD0_D19_PORT4_MARK, PORT4_FN4, MSEL5CR_6_0),
747 PINMUX_DATA(LCD1_D0_MARK, PORT4_FN7),
748
749 /* Port5 */
750 PINMUX_DATA(DBGMD11_MARK, PORT5_FN1),
751 PINMUX_DATA(BBIF2_TXD2_PORT5_MARK, PORT5_FN2, MSEL5CR_0_0),
752 PINMUX_DATA(FSIAISLD_PORT5_MARK, PORT5_FN4, MSEL5CR_3_1),
753 PINMUX_DATA(RSPI_SSL0_A_MARK, PORT5_FN6),
754 PINMUX_DATA(LCD1_VCPWC_MARK, PORT5_FN7),
755
756 /* Port6 */
757 PINMUX_DATA(DBGMD10_MARK, PORT6_FN1),
758 PINMUX_DATA(BBIF2_TSYNC2_PORT6_MARK, PORT6_FN2, MSEL5CR_0_0),
759 PINMUX_DATA(FMSISLD_PORT6_MARK, PORT6_FN4, MSEL5CR_5_1),
760 PINMUX_DATA(RSPI_SSL1_A_MARK, PORT6_FN6),
761 PINMUX_DATA(LCD1_VEPWC_MARK, PORT6_FN7),
762
763 /* Port7 */
764 PINMUX_DATA(FSIAOLR_MARK, PORT7_FN1),
765
766 /* Port8 */
767 PINMUX_DATA(FSIAOBT_MARK, PORT8_FN1),
768
769 /* Port9 */
770 PINMUX_DATA(FSIAOSLD_MARK, PORT9_FN1),
771 PINMUX_DATA(FSIASPDIF_PORT9_MARK, PORT9_FN2, MSEL5CR_4_0),
772
773 /* Port10 */
774 PINMUX_DATA(FSIAOMC_MARK, PORT10_FN1),
775 PINMUX_DATA(SCIFA5_RXD_PORT10_MARK, PORT10_FN3, MSEL5CR_14_0, MSEL5CR_15_0),
776 PINMUX_DATA(IRQ3_PORT10_MARK, PORT10_FN0, MSEL1CR_3_0),
777
778 /* Port11 */
779 PINMUX_DATA(FSIACK_MARK, PORT11_FN1),
780 PINMUX_DATA(FSIBCK_MARK, PORT11_FN2),
781 PINMUX_DATA(IRQ2_PORT11_MARK, PORT11_FN0, MSEL1CR_2_0),
782
783 /* Port12 */
784 PINMUX_DATA(FSIAILR_MARK, PORT12_FN1),
785 PINMUX_DATA(SCIFA4_RXD_PORT12_MARK, PORT12_FN2, MSEL5CR_12_0, MSEL5CR_11_0),
786 PINMUX_DATA(LCD1_RS_MARK, PORT12_FN6),
787 PINMUX_DATA(LCD1_DISP_MARK, PORT12_FN7),
788 PINMUX_DATA(IRQ2_PORT12_MARK, PORT12_FN0, MSEL1CR_2_1),
789
790 /* Port13 */
791 PINMUX_DATA(FSIAIBT_MARK, PORT13_FN1),
792 PINMUX_DATA(SCIFA4_TXD_PORT13_MARK, PORT13_FN2, MSEL5CR_12_0, MSEL5CR_11_0),
793 PINMUX_DATA(LCD1_RD_MARK, PORT13_FN7),
794 PINMUX_DATA(IRQ0_PORT13_MARK, PORT13_FN0, MSEL1CR_0_0),
795
796 /* Port14 */
797 PINMUX_DATA(FMSOILR_MARK, PORT14_FN1),
798 PINMUX_DATA(FMSIILR_MARK, PORT14_FN2),
799 PINMUX_DATA(VIO_CKO1_MARK, PORT14_FN3),
800 PINMUX_DATA(LCD1_D23_MARK, PORT14_FN7),
801 PINMUX_DATA(IRQ3_PORT14_MARK, PORT14_FN0, MSEL1CR_3_1),
802
803 /* Port15 */
804 PINMUX_DATA(FMSOIBT_MARK, PORT15_FN1),
805 PINMUX_DATA(FMSIIBT_MARK, PORT15_FN2),
806 PINMUX_DATA(VIO_CKO2_MARK, PORT15_FN3),
807 PINMUX_DATA(LCD1_D22_MARK, PORT15_FN7),
808 PINMUX_DATA(IRQ4_PORT15_MARK, PORT15_FN0, MSEL1CR_4_0),
809
810 /* Port16 */
811 PINMUX_DATA(FMSOOLR_MARK, PORT16_FN1),
812 PINMUX_DATA(FMSIOLR_MARK, PORT16_FN2),
813
814 /* Port17 */
815 PINMUX_DATA(FMSOOBT_MARK, PORT17_FN1),
816 PINMUX_DATA(FMSIOBT_MARK, PORT17_FN2),
817
818 /* Port18 */
819 PINMUX_DATA(FMSOSLD_MARK, PORT18_FN1),
820 PINMUX_DATA(FSIASPDIF_PORT18_MARK, PORT18_FN2, MSEL5CR_4_1),
821
822 /* Port19 */
823 PINMUX_DATA(FMSICK_MARK, PORT19_FN1),
824 PINMUX_DATA(CS5A_PORT19_MARK, PORT19_FN7, MSEL5CR_2_1),
825 PINMUX_DATA(IRQ10_MARK, PORT19_FN0),
826
827 /* Port20 */
828 PINMUX_DATA(FMSOCK_MARK, PORT20_FN1),
829 PINMUX_DATA(SCIFA5_TXD_PORT20_MARK, PORT20_FN3, MSEL5CR_15_0, MSEL5CR_14_0),
830 PINMUX_DATA(IRQ1_MARK, PORT20_FN0),
831
832 /* Port21 */
833 PINMUX_DATA(SCIFA1_CTS_MARK, PORT21_FN1),
834 PINMUX_DATA(SCIFA4_SCK_PORT21_MARK, PORT21_FN2, MSEL5CR_10_0),
835 PINMUX_DATA(TPU0TO1_MARK, PORT21_FN4),
836 PINMUX_DATA(VIO1_FIELD_MARK, PORT21_FN5),
837 PINMUX_DATA(STP0_IPD5_MARK, PORT21_FN6),
838 PINMUX_DATA(LCD1_D10_MARK, PORT21_FN7),
839
840 /* Port22 */
841 PINMUX_DATA(SCIFA2_SCK_PORT22_MARK, PORT22_FN1, MSEL5CR_7_0),
842 PINMUX_DATA(SIM_D_PORT22_MARK, PORT22_FN4, MSEL5CR_21_0),
843 PINMUX_DATA(VIO0_D13_PORT22_MARK, PORT22_FN7, MSEL5CR_27_1),
844
845 /* Port23 */
846 PINMUX_DATA(SCIFA1_RTS_MARK, PORT23_FN1),
847 PINMUX_DATA(SCIFA5_SCK_PORT23_MARK, PORT23_FN3, MSEL5CR_13_0),
848 PINMUX_DATA(TPU0TO0_MARK, PORT23_FN4),
849 PINMUX_DATA(VIO_CKO_1_MARK, PORT23_FN5),
850 PINMUX_DATA(STP0_IPD2_MARK, PORT23_FN6),
851 PINMUX_DATA(LCD1_D7_MARK, PORT23_FN7),
852
853 /* Port24 */
854 PINMUX_DATA(VIO0_D15_PORT24_MARK, PORT24_FN1, MSEL5CR_27_0),
855 PINMUX_DATA(VIO1_D7_MARK, PORT24_FN5),
856 PINMUX_DATA(SCIFA6_SCK_MARK, PORT24_FN6),
857 PINMUX_DATA(SDHI2_CD_PORT24_MARK, PORT24_FN7, MSEL5CR_19_0),
858
859 /* Port25 */
860 PINMUX_DATA(VIO0_D14_PORT25_MARK, PORT25_FN1, MSEL5CR_27_0),
861 PINMUX_DATA(VIO1_D6_MARK, PORT25_FN5),
862 PINMUX_DATA(SCIFA6_RXD_MARK, PORT25_FN6),
863 PINMUX_DATA(SDHI2_WP_PORT25_MARK, PORT25_FN7, MSEL5CR_19_0),
864
865 /* Port26 */
866 PINMUX_DATA(VIO0_D13_PORT26_MARK, PORT26_FN1, MSEL5CR_27_0),
867 PINMUX_DATA(VIO1_D5_MARK, PORT26_FN5),
868 PINMUX_DATA(SCIFA6_TXD_MARK, PORT26_FN6),
869
870 /* Port27 - Port39 Function */
871 PINMUX_DATA(VIO0_D7_MARK, PORT27_FN1),
872 PINMUX_DATA(VIO0_D6_MARK, PORT28_FN1),
873 PINMUX_DATA(VIO0_D5_MARK, PORT29_FN1),
874 PINMUX_DATA(VIO0_D4_MARK, PORT30_FN1),
875 PINMUX_DATA(VIO0_D3_MARK, PORT31_FN1),
876 PINMUX_DATA(VIO0_D2_MARK, PORT32_FN1),
877 PINMUX_DATA(VIO0_D1_MARK, PORT33_FN1),
878 PINMUX_DATA(VIO0_D0_MARK, PORT34_FN1),
879 PINMUX_DATA(VIO0_CLK_MARK, PORT35_FN1),
880 PINMUX_DATA(VIO_CKO_MARK, PORT36_FN1),
881 PINMUX_DATA(VIO0_HD_MARK, PORT37_FN1),
882 PINMUX_DATA(VIO0_FIELD_MARK, PORT38_FN1),
883 PINMUX_DATA(VIO0_VD_MARK, PORT39_FN1),
884
885 /* Port38 IRQ */
886 PINMUX_DATA(IRQ25_MARK, PORT38_FN0),
887
888 /* Port40 */
889 PINMUX_DATA(LCD0_D18_PORT40_MARK, PORT40_FN4, MSEL5CR_6_0),
890 PINMUX_DATA(RSPI_CK_A_MARK, PORT40_FN6),
891 PINMUX_DATA(LCD1_LCLK_MARK, PORT40_FN7),
892
893 /* Port41 */
894 PINMUX_DATA(LCD0_D17_MARK, PORT41_FN1),
895 PINMUX_DATA(MSIOF2_SS1_MARK, PORT41_FN2),
896 PINMUX_DATA(IRQ31_PORT41_MARK, PORT41_FN0, MSEL1CR_31_1),
897
898 /* Port42 */
899 PINMUX_DATA(LCD0_D16_MARK, PORT42_FN1),
900 PINMUX_DATA(MSIOF2_MCK1_MARK, PORT42_FN2),
901 PINMUX_DATA(IRQ12_PORT42_MARK, PORT42_FN0, MSEL1CR_12_1),
902
903 /* Port43 */
904 PINMUX_DATA(LCD0_D15_MARK, PORT43_FN1),
905 PINMUX_DATA(MSIOF2_MCK0_MARK, PORT43_FN2),
906 PINMUX_DATA(KEYIN0_PORT43_MARK, PORT43_FN3, MSEL4CR_18_0),
907 PINMUX_DATA(DV_D15_MARK, PORT43_FN6),
908
909 /* Port44 */
910 PINMUX_DATA(LCD0_D14_MARK, PORT44_FN1),
911 PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT44_FN2),
912 PINMUX_DATA(KEYIN1_PORT44_MARK, PORT44_FN3, MSEL4CR_18_0),
913 PINMUX_DATA(DV_D14_MARK, PORT44_FN6),
914
915 /* Port45 */
916 PINMUX_DATA(LCD0_D13_MARK, PORT45_FN1),
917 PINMUX_DATA(MSIOF2_RSCK_MARK, PORT45_FN2),
918 PINMUX_DATA(KEYIN2_PORT45_MARK, PORT45_FN3, MSEL4CR_18_0),
919 PINMUX_DATA(DV_D13_MARK, PORT45_FN6),
920
921 /* Port46 */
922 PINMUX_DATA(LCD0_D12_MARK, PORT46_FN1),
923 PINMUX_DATA(KEYIN3_PORT46_MARK, PORT46_FN3, MSEL4CR_18_0),
924 PINMUX_DATA(DV_D12_MARK, PORT46_FN6),
925
926 /* Port47 */
927 PINMUX_DATA(LCD0_D11_MARK, PORT47_FN1),
928 PINMUX_DATA(KEYIN4_MARK, PORT47_FN3),
929 PINMUX_DATA(DV_D11_MARK, PORT47_FN6),
930
931 /* Port48 */
932 PINMUX_DATA(LCD0_D10_MARK, PORT48_FN1),
933 PINMUX_DATA(KEYIN5_MARK, PORT48_FN3),
934 PINMUX_DATA(DV_D10_MARK, PORT48_FN6),
935
936 /* Port49 */
937 PINMUX_DATA(LCD0_D9_MARK, PORT49_FN1),
938 PINMUX_DATA(KEYIN6_MARK, PORT49_FN3),
939 PINMUX_DATA(DV_D9_MARK, PORT49_FN6),
940 PINMUX_DATA(IRQ30_PORT49_MARK, PORT49_FN0, MSEL1CR_30_1),
941
942 /* Port50 */
943 PINMUX_DATA(LCD0_D8_MARK, PORT50_FN1),
944 PINMUX_DATA(KEYIN7_MARK, PORT50_FN3),
945 PINMUX_DATA(DV_D8_MARK, PORT50_FN6),
946 PINMUX_DATA(IRQ29_PORT50_MARK, PORT50_FN0, MSEL1CR_29_1),
947
948 /* Port51 */
949 PINMUX_DATA(LCD0_D7_MARK, PORT51_FN1),
950 PINMUX_DATA(KEYOUT0_MARK, PORT51_FN3),
951 PINMUX_DATA(DV_D7_MARK, PORT51_FN6),
952
953 /* Port52 */
954 PINMUX_DATA(LCD0_D6_MARK, PORT52_FN1),
955 PINMUX_DATA(KEYOUT1_MARK, PORT52_FN3),
956 PINMUX_DATA(DV_D6_MARK, PORT52_FN6),
957
958 /* Port53 */
959 PINMUX_DATA(LCD0_D5_MARK, PORT53_FN1),
960 PINMUX_DATA(KEYOUT2_MARK, PORT53_FN3),
961 PINMUX_DATA(DV_D5_MARK, PORT53_FN6),
962
963 /* Port54 */
964 PINMUX_DATA(LCD0_D4_MARK, PORT54_FN1),
965 PINMUX_DATA(KEYOUT3_MARK, PORT54_FN3),
966 PINMUX_DATA(DV_D4_MARK, PORT54_FN6),
967
968 /* Port55 */
969 PINMUX_DATA(LCD0_D3_MARK, PORT55_FN1),
970 PINMUX_DATA(KEYOUT4_MARK, PORT55_FN3),
971 PINMUX_DATA(KEYIN3_PORT55_MARK, PORT55_FN4, MSEL4CR_18_1),
972 PINMUX_DATA(DV_D3_MARK, PORT55_FN6),
973
974 /* Port56 */
975 PINMUX_DATA(LCD0_D2_MARK, PORT56_FN1),
976 PINMUX_DATA(KEYOUT5_MARK, PORT56_FN3),
977 PINMUX_DATA(KEYIN2_PORT56_MARK, PORT56_FN4, MSEL4CR_18_1),
978 PINMUX_DATA(DV_D2_MARK, PORT56_FN6),
979 PINMUX_DATA(IRQ28_PORT56_MARK, PORT56_FN0, MSEL1CR_28_1),
980
981 /* Port57 */
982 PINMUX_DATA(LCD0_D1_MARK, PORT57_FN1),
983 PINMUX_DATA(KEYOUT6_MARK, PORT57_FN3),
984 PINMUX_DATA(KEYIN1_PORT57_MARK, PORT57_FN4, MSEL4CR_18_1),
985 PINMUX_DATA(DV_D1_MARK, PORT57_FN6),
986 PINMUX_DATA(IRQ27_PORT57_MARK, PORT57_FN0, MSEL1CR_27_1),
987
988 /* Port58 */
989 PINMUX_DATA(LCD0_D0_MARK, PORT58_FN1),
990 PINMUX_DATA(KEYOUT7_MARK, PORT58_FN3),
991 PINMUX_DATA(KEYIN0_PORT58_MARK, PORT58_FN4, MSEL4CR_18_1),
992 PINMUX_DATA(DV_D0_MARK, PORT58_FN6),
993 PINMUX_DATA(IRQ26_PORT58_MARK, PORT58_FN0, MSEL1CR_26_1),
994
995 /* Port59 */
996 PINMUX_DATA(LCD0_VCPWC_MARK, PORT59_FN1),
997 PINMUX_DATA(BBIF2_TSCK2_PORT59_MARK, PORT59_FN2, MSEL5CR_0_0),
998 PINMUX_DATA(RSPI_MOSI_A_MARK, PORT59_FN6),
999
1000 /* Port60 */
1001 PINMUX_DATA(LCD0_VEPWC_MARK, PORT60_FN1),
1002 PINMUX_DATA(BBIF2_RXD2_PORT60_MARK, PORT60_FN2, MSEL5CR_0_0),
1003 PINMUX_DATA(RSPI_MISO_A_MARK, PORT60_FN6),
1004
1005 /* Port61 */
1006 PINMUX_DATA(LCD0_DON_MARK, PORT61_FN1),
1007 PINMUX_DATA(MSIOF2_TXD_MARK, PORT61_FN2),
1008
1009 /* Port62 */
1010 PINMUX_DATA(LCD0_DCK_MARK, PORT62_FN1),
1011 PINMUX_DATA(LCD0_WR_MARK, PORT62_FN4),
1012 PINMUX_DATA(DV_CLK_MARK, PORT62_FN6),
1013 PINMUX_DATA(IRQ15_PORT62_MARK, PORT62_FN0, MSEL1CR_15_1),
1014
1015 /* Port63 */
1016 PINMUX_DATA(LCD0_VSYN_MARK, PORT63_FN1),
1017 PINMUX_DATA(DV_VSYNC_MARK, PORT63_FN6),
1018 PINMUX_DATA(IRQ14_PORT63_MARK, PORT63_FN0, MSEL1CR_14_1),
1019
1020 /* Port64 */
1021 PINMUX_DATA(LCD0_HSYN_MARK, PORT64_FN1),
1022 PINMUX_DATA(LCD0_CS_MARK, PORT64_FN4),
1023 PINMUX_DATA(DV_HSYNC_MARK, PORT64_FN6),
1024 PINMUX_DATA(IRQ13_PORT64_MARK, PORT64_FN0, MSEL1CR_13_1),
1025
1026 /* Port65 */
1027 PINMUX_DATA(LCD0_DISP_MARK, PORT65_FN1),
1028 PINMUX_DATA(MSIOF2_TSCK_MARK, PORT65_FN2),
1029 PINMUX_DATA(LCD0_RS_MARK, PORT65_FN4),
1030
1031 /* Port66 */
1032 PINMUX_DATA(MEMC_INT_MARK, PORT66_FN1),
1033 PINMUX_DATA(TPU0TO2_PORT66_MARK, PORT66_FN3, MSEL5CR_25_0),
1034 PINMUX_DATA(MMC0_CLK_PORT66_MARK, PORT66_FN4, MSEL4CR_15_0),
1035 PINMUX_DATA(SDHI1_CLK_MARK, PORT66_FN6),
1036
1037 /* Port67 - Port73 Function1 */
1038 PINMUX_DATA(MEMC_CS0_MARK, PORT67_FN1),
1039 PINMUX_DATA(MEMC_AD8_MARK, PORT68_FN1),
1040 PINMUX_DATA(MEMC_AD9_MARK, PORT69_FN1),
1041 PINMUX_DATA(MEMC_AD10_MARK, PORT70_FN1),
1042 PINMUX_DATA(MEMC_AD11_MARK, PORT71_FN1),
1043 PINMUX_DATA(MEMC_AD12_MARK, PORT72_FN1),
1044 PINMUX_DATA(MEMC_AD13_MARK, PORT73_FN1),
1045
1046 /* Port67 - Port73 Function2 */
1047 PINMUX_DATA(MSIOF1_SS1_PORT67_MARK, PORT67_FN2, MSEL4CR_10_1),
1048 PINMUX_DATA(MSIOF1_RSCK_MARK, PORT68_FN2),
1049 PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT69_FN2),
1050 PINMUX_DATA(MSIOF1_MCK0_MARK, PORT70_FN2),
1051 PINMUX_DATA(MSIOF1_MCK1_MARK, PORT71_FN2),
1052 PINMUX_DATA(MSIOF1_TSCK_PORT72_MARK, PORT72_FN2, MSEL4CR_10_1),
1053 PINMUX_DATA(MSIOF1_TSYNC_PORT73_MARK, PORT73_FN2, MSEL4CR_10_1),
1054
1055 /* Port67 - Port73 Function4 */
1056 PINMUX_DATA(MMC0_CMD_PORT67_MARK, PORT67_FN4, MSEL4CR_15_0),
1057 PINMUX_DATA(MMC0_D0_PORT68_MARK, PORT68_FN4, MSEL4CR_15_0),
1058 PINMUX_DATA(MMC0_D1_PORT69_MARK, PORT69_FN4, MSEL4CR_15_0),
1059 PINMUX_DATA(MMC0_D2_PORT70_MARK, PORT70_FN4, MSEL4CR_15_0),
1060 PINMUX_DATA(MMC0_D3_PORT71_MARK, PORT71_FN4, MSEL4CR_15_0),
1061 PINMUX_DATA(MMC0_D4_PORT72_MARK, PORT72_FN4, MSEL4CR_15_0),
1062 PINMUX_DATA(MMC0_D5_PORT73_MARK, PORT73_FN4, MSEL4CR_15_0),
1063
1064 /* Port67 - Port73 Function6 */
1065 PINMUX_DATA(SDHI1_CMD_MARK, PORT67_FN6),
1066 PINMUX_DATA(SDHI1_D0_MARK, PORT68_FN6),
1067 PINMUX_DATA(SDHI1_D1_MARK, PORT69_FN6),
1068 PINMUX_DATA(SDHI1_D2_MARK, PORT70_FN6),
1069 PINMUX_DATA(SDHI1_D3_MARK, PORT71_FN6),
1070 PINMUX_DATA(SDHI1_CD_MARK, PORT72_FN6),
1071 PINMUX_DATA(SDHI1_WP_MARK, PORT73_FN6),
1072
1073 /* Port67 - Port71 IRQ */
1074 PINMUX_DATA(IRQ20_MARK, PORT67_FN0),
1075 PINMUX_DATA(IRQ16_PORT68_MARK, PORT68_FN0, MSEL1CR_16_0),
1076 PINMUX_DATA(IRQ17_MARK, PORT69_FN0),
1077 PINMUX_DATA(IRQ18_MARK, PORT70_FN0),
1078 PINMUX_DATA(IRQ19_MARK, PORT71_FN0),
1079
1080 /* Port74 */
1081 PINMUX_DATA(MEMC_AD14_MARK, PORT74_FN1),
1082 PINMUX_DATA(MSIOF1_TXD_PORT74_MARK, PORT74_FN2, MSEL4CR_10_1),
1083 PINMUX_DATA(MMC0_D6_PORT74_MARK, PORT74_FN4, MSEL4CR_15_0),
1084 PINMUX_DATA(STP1_IPD7_MARK, PORT74_FN6),
1085 PINMUX_DATA(LCD1_D21_MARK, PORT74_FN7),
1086
1087 /* Port75 */
1088 PINMUX_DATA(MEMC_AD15_MARK, PORT75_FN1),
1089 PINMUX_DATA(MSIOF1_RXD_PORT75_MARK, PORT75_FN2, MSEL4CR_10_1),
1090 PINMUX_DATA(MMC0_D7_PORT75_MARK, PORT75_FN4, MSEL4CR_15_0),
1091 PINMUX_DATA(STP1_IPD6_MARK, PORT75_FN6),
1092 PINMUX_DATA(LCD1_D20_MARK, PORT75_FN7),
1093
1094 /* Port76 - Port80 Function */
1095 PINMUX_DATA(SDHI0_CMD_MARK, PORT76_FN1),
1096 PINMUX_DATA(SDHI0_D0_MARK, PORT77_FN1),
1097 PINMUX_DATA(SDHI0_D1_MARK, PORT78_FN1),
1098 PINMUX_DATA(SDHI0_D2_MARK, PORT79_FN1),
1099 PINMUX_DATA(SDHI0_D3_MARK, PORT80_FN1),
1100
1101 /* Port81 */
1102 PINMUX_DATA(SDHI0_CD_MARK, PORT81_FN1),
1103 PINMUX_DATA(IRQ26_PORT81_MARK, PORT81_FN0, MSEL1CR_26_0),
1104
1105 /* Port82 - Port88 Function */
1106 PINMUX_DATA(SDHI0_CLK_MARK, PORT82_FN1),
1107 PINMUX_DATA(SDHI0_WP_MARK, PORT83_FN1),
1108 PINMUX_DATA(RESETOUTS_MARK, PORT84_FN1),
1109 PINMUX_DATA(USB0_PPON_MARK, PORT85_FN1),
1110 PINMUX_DATA(USB0_OCI_MARK, PORT86_FN1),
1111 PINMUX_DATA(USB1_PPON_MARK, PORT87_FN1),
1112 PINMUX_DATA(USB1_OCI_MARK, PORT88_FN1),
1113
1114 /* Port89 */
1115 PINMUX_DATA(DREQ0_MARK, PORT89_FN1),
1116 PINMUX_DATA(BBIF2_TSCK2_PORT89_MARK, PORT89_FN2, MSEL5CR_0_1),
1117 PINMUX_DATA(RSPI_SSL3_A_MARK, PORT89_FN6),
1118
1119 /* Port90 */
1120 PINMUX_DATA(DACK0_MARK, PORT90_FN1),
1121 PINMUX_DATA(BBIF2_RXD2_PORT90_MARK, PORT90_FN2, MSEL5CR_0_1),
1122 PINMUX_DATA(RSPI_SSL2_A_MARK, PORT90_FN6),
1123 PINMUX_DATA(WAIT_PORT90_MARK, PORT90_FN7, MSEL5CR_2_1),
1124
1125 /* Port91 */
1126 PINMUX_DATA(MEMC_AD0_MARK, PORT91_FN1),
1127 PINMUX_DATA(BBIF1_RXD_MARK, PORT91_FN2),
1128 PINMUX_DATA(SCIFA5_TXD_PORT91_MARK, PORT91_FN3, MSEL5CR_15_1, MSEL5CR_14_0),
1129 PINMUX_DATA(LCD1_D5_MARK, PORT91_FN7),
1130
1131 /* Port92 */
1132 PINMUX_DATA(MEMC_AD1_MARK, PORT92_FN1),
1133 PINMUX_DATA(BBIF1_TSYNC_MARK, PORT92_FN2),
1134 PINMUX_DATA(SCIFA5_RXD_PORT92_MARK, PORT92_FN3, MSEL5CR_15_1, MSEL5CR_14_0),
1135 PINMUX_DATA(STP0_IPD1_MARK, PORT92_FN6),
1136 PINMUX_DATA(LCD1_D6_MARK, PORT92_FN7),
1137
1138 /* Port93 */
1139 PINMUX_DATA(MEMC_AD2_MARK, PORT93_FN1),
1140 PINMUX_DATA(BBIF1_TSCK_MARK, PORT93_FN2),
1141 PINMUX_DATA(SCIFA4_TXD_PORT93_MARK, PORT93_FN3, MSEL5CR_12_1, MSEL5CR_11_0),
1142 PINMUX_DATA(STP0_IPD3_MARK, PORT93_FN6),
1143 PINMUX_DATA(LCD1_D8_MARK, PORT93_FN7),
1144
1145 /* Port94 */
1146 PINMUX_DATA(MEMC_AD3_MARK, PORT94_FN1),
1147 PINMUX_DATA(BBIF1_TXD_MARK, PORT94_FN2),
1148 PINMUX_DATA(SCIFA4_RXD_PORT94_MARK, PORT94_FN3, MSEL5CR_12_1, MSEL5CR_11_0),
1149 PINMUX_DATA(STP0_IPD4_MARK, PORT94_FN6),
1150 PINMUX_DATA(LCD1_D9_MARK, PORT94_FN7),
1151
1152 /* Port95 */
1153 PINMUX_DATA(MEMC_CS1_MARK, PORT95_FN1, MSEL4CR_6_0),
1154 PINMUX_DATA(MEMC_A1_MARK, PORT95_FN1, MSEL4CR_6_1),
1155
1156 PINMUX_DATA(SCIFA2_CTS_MARK, PORT95_FN2),
1157 PINMUX_DATA(SIM_RST_MARK, PORT95_FN4),
1158 PINMUX_DATA(VIO0_D14_PORT95_MARK, PORT95_FN7, MSEL5CR_27_1),
1159 PINMUX_DATA(IRQ22_MARK, PORT95_FN0),
1160
1161 /* Port96 */
1162 PINMUX_DATA(MEMC_ADV_MARK, PORT96_FN1, MSEL4CR_6_0),
1163 PINMUX_DATA(MEMC_DREQ0_MARK, PORT96_FN1, MSEL4CR_6_1),
1164
1165 PINMUX_DATA(SCIFA2_RTS_MARK, PORT96_FN2),
1166 PINMUX_DATA(SIM_CLK_MARK, PORT96_FN4),
1167 PINMUX_DATA(VIO0_D15_PORT96_MARK, PORT96_FN7, MSEL5CR_27_1),
1168 PINMUX_DATA(IRQ23_MARK, PORT96_FN0),
1169
1170 /* Port97 */
1171 PINMUX_DATA(MEMC_AD4_MARK, PORT97_FN1),
1172 PINMUX_DATA(BBIF1_RSCK_MARK, PORT97_FN2),
1173 PINMUX_DATA(LCD1_CS_MARK, PORT97_FN6),
1174 PINMUX_DATA(LCD1_HSYN_MARK, PORT97_FN7),
1175 PINMUX_DATA(IRQ12_PORT97_MARK, PORT97_FN0, MSEL1CR_12_0),
1176
1177 /* Port98 */
1178 PINMUX_DATA(MEMC_AD5_MARK, PORT98_FN1),
1179 PINMUX_DATA(BBIF1_RSYNC_MARK, PORT98_FN2),
1180 PINMUX_DATA(LCD1_VSYN_MARK, PORT98_FN7),
1181 PINMUX_DATA(IRQ13_PORT98_MARK, PORT98_FN0, MSEL1CR_13_0),
1182
1183 /* Port99 */
1184 PINMUX_DATA(MEMC_AD6_MARK, PORT99_FN1),
1185 PINMUX_DATA(BBIF1_FLOW_MARK, PORT99_FN2),
1186 PINMUX_DATA(LCD1_WR_MARK, PORT99_FN6),
1187 PINMUX_DATA(LCD1_DCK_MARK, PORT99_FN7),
1188 PINMUX_DATA(IRQ14_PORT99_MARK, PORT99_FN0, MSEL1CR_14_0),
1189
1190 /* Port100 */
1191 PINMUX_DATA(MEMC_AD7_MARK, PORT100_FN1),
1192 PINMUX_DATA(BBIF1_RX_FLOW_N_MARK, PORT100_FN2),
1193 PINMUX_DATA(LCD1_DON_MARK, PORT100_FN7),
1194 PINMUX_DATA(IRQ15_PORT100_MARK, PORT100_FN0, MSEL1CR_15_0),
1195
1196 /* Port101 */
1197 PINMUX_DATA(FCE0_MARK, PORT101_FN1),
1198
1199 /* Port102 */
1200 PINMUX_DATA(FRB_MARK, PORT102_FN1),
1201 PINMUX_DATA(LCD0_LCLK_PORT102_MARK, PORT102_FN4, MSEL5CR_6_0),
1202
1203 /* Port103 */
1204 PINMUX_DATA(CS5B_MARK, PORT103_FN1),
1205 PINMUX_DATA(FCE1_MARK, PORT103_FN2),
1206 PINMUX_DATA(MMC1_CLK_PORT103_MARK, PORT103_FN3, MSEL4CR_15_1),
1207
1208 /* Port104 */
1209 PINMUX_DATA(CS6A_MARK, PORT104_FN1),
1210 PINMUX_DATA(MMC1_CMD_PORT104_MARK, PORT104_FN3, MSEL4CR_15_1),
1211 PINMUX_DATA(IRQ11_MARK, PORT104_FN0),
1212
1213 /* Port105 */
1214 PINMUX_DATA(CS5A_PORT105_MARK, PORT105_FN1, MSEL5CR_2_0),
1215 PINMUX_DATA(SCIFA3_RTS_PORT105_MARK, PORT105_FN4, MSEL5CR_8_0),
1216
1217 /* Port106 */
1218 PINMUX_DATA(IOIS16_MARK, PORT106_FN1),
1219 PINMUX_DATA(IDE_EXBUF_ENB_MARK, PORT106_FN6),
1220
1221 /* Port107 - Port115 Function */
1222 PINMUX_DATA(WE3_ICIOWR_MARK, PORT107_FN1),
1223 PINMUX_DATA(WE2_ICIORD_MARK, PORT108_FN1),
1224 PINMUX_DATA(CS0_MARK, PORT109_FN1),
1225 PINMUX_DATA(CS2_MARK, PORT110_FN1),
1226 PINMUX_DATA(CS4_MARK, PORT111_FN1),
1227 PINMUX_DATA(WE1_MARK, PORT112_FN1),
1228 PINMUX_DATA(WE0_FWE_MARK, PORT113_FN1),
1229 PINMUX_DATA(RDWR_MARK, PORT114_FN1),
1230 PINMUX_DATA(RD_FSC_MARK, PORT115_FN1),
1231
1232 /* Port116 */
1233 PINMUX_DATA(A25_MARK, PORT116_FN1),
1234 PINMUX_DATA(MSIOF0_SS2_MARK, PORT116_FN2),
1235 PINMUX_DATA(MSIOF1_SS2_PORT116_MARK, PORT116_FN3, MSEL4CR_10_0),
1236 PINMUX_DATA(SCIFA3_SCK_PORT116_MARK, PORT116_FN4, MSEL5CR_8_0),
1237 PINMUX_DATA(GPO1_MARK, PORT116_FN5),
1238
1239 /* Port117 */
1240 PINMUX_DATA(A24_MARK, PORT117_FN1),
1241 PINMUX_DATA(MSIOF0_SS1_MARK, PORT117_FN2),
1242 PINMUX_DATA(MSIOF1_SS1_PORT117_MARK, PORT117_FN3, MSEL4CR_10_0),
1243 PINMUX_DATA(SCIFA3_CTS_PORT117_MARK, PORT117_FN4, MSEL5CR_8_0),
1244 PINMUX_DATA(GPO0_MARK, PORT117_FN5),
1245
1246 /* Port118 */
1247 PINMUX_DATA(A23_MARK, PORT118_FN1),
1248 PINMUX_DATA(MSIOF0_MCK1_MARK, PORT118_FN2),
1249 PINMUX_DATA(MSIOF1_RXD_PORT118_MARK, PORT118_FN3, MSEL4CR_10_0),
1250 PINMUX_DATA(GPI1_MARK, PORT118_FN5),
1251 PINMUX_DATA(IRQ9_PORT118_MARK, PORT118_FN0, MSEL1CR_9_0),
1252
1253 /* Port119 */
1254 PINMUX_DATA(A22_MARK, PORT119_FN1),
1255 PINMUX_DATA(MSIOF0_MCK0_MARK, PORT119_FN2),
1256 PINMUX_DATA(MSIOF1_TXD_PORT119_MARK, PORT119_FN3, MSEL4CR_10_0),
1257 PINMUX_DATA(GPI0_MARK, PORT119_FN5),
1258 PINMUX_DATA(IRQ8_MARK, PORT119_FN0),
1259
1260 /* Port120 */
1261 PINMUX_DATA(A21_MARK, PORT120_FN1),
1262 PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT120_FN2),
1263 PINMUX_DATA(MSIOF1_TSYNC_PORT120_MARK, PORT120_FN3, MSEL4CR_10_0),
1264 PINMUX_DATA(IRQ7_PORT120_MARK, PORT120_FN0, MSEL1CR_7_1),
1265
1266 /* Port121 */
1267 PINMUX_DATA(A20_MARK, PORT121_FN1),
1268 PINMUX_DATA(MSIOF0_RSCK_MARK, PORT121_FN2),
1269 PINMUX_DATA(MSIOF1_TSCK_PORT121_MARK, PORT121_FN3, MSEL4CR_10_0),
1270 PINMUX_DATA(IRQ6_PORT121_MARK, PORT121_FN0, MSEL1CR_6_0),
1271
1272 /* Port122 */
1273 PINMUX_DATA(A19_MARK, PORT122_FN1),
1274 PINMUX_DATA(MSIOF0_RXD_MARK, PORT122_FN2),
1275
1276 /* Port123 */
1277 PINMUX_DATA(A18_MARK, PORT123_FN1),
1278 PINMUX_DATA(MSIOF0_TSCK_MARK, PORT123_FN2),
1279
1280 /* Port124 */
1281 PINMUX_DATA(A17_MARK, PORT124_FN1),
1282 PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT124_FN2),
1283
1284 /* Port125 - Port141 Function */
1285 PINMUX_DATA(A16_MARK, PORT125_FN1),
1286 PINMUX_DATA(A15_MARK, PORT126_FN1),
1287 PINMUX_DATA(A14_MARK, PORT127_FN1),
1288 PINMUX_DATA(A13_MARK, PORT128_FN1),
1289 PINMUX_DATA(A12_MARK, PORT129_FN1),
1290 PINMUX_DATA(A11_MARK, PORT130_FN1),
1291 PINMUX_DATA(A10_MARK, PORT131_FN1),
1292 PINMUX_DATA(A9_MARK, PORT132_FN1),
1293 PINMUX_DATA(A8_MARK, PORT133_FN1),
1294 PINMUX_DATA(A7_MARK, PORT134_FN1),
1295 PINMUX_DATA(A6_MARK, PORT135_FN1),
1296 PINMUX_DATA(A5_FCDE_MARK, PORT136_FN1),
1297 PINMUX_DATA(A4_FOE_MARK, PORT137_FN1),
1298 PINMUX_DATA(A3_MARK, PORT138_FN1),
1299 PINMUX_DATA(A2_MARK, PORT139_FN1),
1300 PINMUX_DATA(A1_MARK, PORT140_FN1),
1301 PINMUX_DATA(CKO_MARK, PORT141_FN1),
1302
1303 /* Port142 - Port157 Function1 */
1304 PINMUX_DATA(D15_NAF15_MARK, PORT142_FN1),
1305 PINMUX_DATA(D14_NAF14_MARK, PORT143_FN1),
1306 PINMUX_DATA(D13_NAF13_MARK, PORT144_FN1),
1307 PINMUX_DATA(D12_NAF12_MARK, PORT145_FN1),
1308 PINMUX_DATA(D11_NAF11_MARK, PORT146_FN1),
1309 PINMUX_DATA(D10_NAF10_MARK, PORT147_FN1),
1310 PINMUX_DATA(D9_NAF9_MARK, PORT148_FN1),
1311 PINMUX_DATA(D8_NAF8_MARK, PORT149_FN1),
1312 PINMUX_DATA(D7_NAF7_MARK, PORT150_FN1),
1313 PINMUX_DATA(D6_NAF6_MARK, PORT151_FN1),
1314 PINMUX_DATA(D5_NAF5_MARK, PORT152_FN1),
1315 PINMUX_DATA(D4_NAF4_MARK, PORT153_FN1),
1316 PINMUX_DATA(D3_NAF3_MARK, PORT154_FN1),
1317 PINMUX_DATA(D2_NAF2_MARK, PORT155_FN1),
1318 PINMUX_DATA(D1_NAF1_MARK, PORT156_FN1),
1319 PINMUX_DATA(D0_NAF0_MARK, PORT157_FN1),
1320
1321 /* Port142 - Port149 Function3 */
1322 PINMUX_DATA(MMC1_D7_PORT142_MARK, PORT142_FN3, MSEL4CR_15_1),
1323 PINMUX_DATA(MMC1_D6_PORT143_MARK, PORT143_FN3, MSEL4CR_15_1),
1324 PINMUX_DATA(MMC1_D5_PORT144_MARK, PORT144_FN3, MSEL4CR_15_1),
1325 PINMUX_DATA(MMC1_D4_PORT145_MARK, PORT145_FN3, MSEL4CR_15_1),
1326 PINMUX_DATA(MMC1_D3_PORT146_MARK, PORT146_FN3, MSEL4CR_15_1),
1327 PINMUX_DATA(MMC1_D2_PORT147_MARK, PORT147_FN3, MSEL4CR_15_1),
1328 PINMUX_DATA(MMC1_D1_PORT148_MARK, PORT148_FN3, MSEL4CR_15_1),
1329 PINMUX_DATA(MMC1_D0_PORT149_MARK, PORT149_FN3, MSEL4CR_15_1),
1330
1331 /* Port158 */
1332 PINMUX_DATA(D31_MARK, PORT158_FN1),
1333 PINMUX_DATA(SCIFA3_SCK_PORT158_MARK, PORT158_FN2, MSEL5CR_8_1),
1334 PINMUX_DATA(RMII_REF125CK_MARK, PORT158_FN3),
1335 PINMUX_DATA(LCD0_D21_PORT158_MARK, PORT158_FN4, MSEL5CR_6_1),
1336 PINMUX_DATA(IRDA_FIRSEL_MARK, PORT158_FN5),
1337 PINMUX_DATA(IDE_D15_MARK, PORT158_FN6),
1338
1339 /* Port159 */
1340 PINMUX_DATA(D30_MARK, PORT159_FN1),
1341 PINMUX_DATA(SCIFA3_RXD_PORT159_MARK, PORT159_FN2, MSEL5CR_8_1),
1342 PINMUX_DATA(RMII_REF50CK_MARK, PORT159_FN3),
1343 PINMUX_DATA(LCD0_D23_PORT159_MARK, PORT159_FN4, MSEL5CR_6_1),
1344 PINMUX_DATA(IDE_D14_MARK, PORT159_FN6),
1345
1346 /* Port160 */
1347 PINMUX_DATA(D29_MARK, PORT160_FN1),
1348 PINMUX_DATA(SCIFA3_TXD_PORT160_MARK, PORT160_FN2, MSEL5CR_8_1),
1349 PINMUX_DATA(LCD0_D22_PORT160_MARK, PORT160_FN4, MSEL5CR_6_1),
1350 PINMUX_DATA(VIO1_HD_MARK, PORT160_FN5),
1351 PINMUX_DATA(IDE_D13_MARK, PORT160_FN6),
1352
1353 /* Port161 */
1354 PINMUX_DATA(D28_MARK, PORT161_FN1),
1355 PINMUX_DATA(SCIFA3_RTS_PORT161_MARK, PORT161_FN2, MSEL5CR_8_1),
1356 PINMUX_DATA(ET_RX_DV_MARK, PORT161_FN3),
1357 PINMUX_DATA(LCD0_D20_PORT161_MARK, PORT161_FN4, MSEL5CR_6_1),
1358 PINMUX_DATA(IRDA_IN_MARK, PORT161_FN5),
1359 PINMUX_DATA(IDE_D12_MARK, PORT161_FN6),
1360
1361 /* Port162 */
1362 PINMUX_DATA(D27_MARK, PORT162_FN1),
1363 PINMUX_DATA(SCIFA3_CTS_PORT162_MARK, PORT162_FN2, MSEL5CR_8_1),
1364 PINMUX_DATA(LCD0_D19_PORT162_MARK, PORT162_FN4, MSEL5CR_6_1),
1365 PINMUX_DATA(IRDA_OUT_MARK, PORT162_FN5),
1366 PINMUX_DATA(IDE_D11_MARK, PORT162_FN6),
1367
1368 /* Port163 */
1369 PINMUX_DATA(D26_MARK, PORT163_FN1),
1370 PINMUX_DATA(MSIOF2_SS2_MARK, PORT163_FN2),
1371 PINMUX_DATA(ET_COL_MARK, PORT163_FN3),
1372 PINMUX_DATA(LCD0_D18_PORT163_MARK, PORT163_FN4, MSEL5CR_6_1),
1373 PINMUX_DATA(IROUT_MARK, PORT163_FN5),
1374 PINMUX_DATA(IDE_D10_MARK, PORT163_FN6),
1375
1376 /* Port164 */
1377 PINMUX_DATA(D25_MARK, PORT164_FN1),
1378 PINMUX_DATA(MSIOF2_TSYNC_MARK, PORT164_FN2),
1379 PINMUX_DATA(ET_PHY_INT_MARK, PORT164_FN3),
1380 PINMUX_DATA(LCD0_RD_MARK, PORT164_FN4),
1381 PINMUX_DATA(IDE_D9_MARK, PORT164_FN6),
1382
1383 /* Port165 */
1384 PINMUX_DATA(D24_MARK, PORT165_FN1),
1385 PINMUX_DATA(MSIOF2_RXD_MARK, PORT165_FN2),
1386 PINMUX_DATA(LCD0_LCLK_PORT165_MARK, PORT165_FN4, MSEL5CR_6_1),
1387 PINMUX_DATA(IDE_D8_MARK, PORT165_FN6),
1388
1389 /* Port166 - Port171 Function1 */
1390 PINMUX_DATA(D21_MARK, PORT166_FN1),
1391 PINMUX_DATA(D20_MARK, PORT167_FN1),
1392 PINMUX_DATA(D19_MARK, PORT168_FN1),
1393 PINMUX_DATA(D18_MARK, PORT169_FN1),
1394 PINMUX_DATA(D17_MARK, PORT170_FN1),
1395 PINMUX_DATA(D16_MARK, PORT171_FN1),
1396
1397 /* Port166 - Port171 Function3 */
1398 PINMUX_DATA(ET_ETXD5_MARK, PORT166_FN3),
1399 PINMUX_DATA(ET_ETXD4_MARK, PORT167_FN3),
1400 PINMUX_DATA(ET_ETXD3_MARK, PORT168_FN3),
1401 PINMUX_DATA(ET_ETXD2_MARK, PORT169_FN3),
1402 PINMUX_DATA(ET_ETXD1_MARK, PORT170_FN3),
1403 PINMUX_DATA(ET_ETXD0_MARK, PORT171_FN3),
1404
1405 /* Port166 - Port171 Function6 */
1406 PINMUX_DATA(IDE_D5_MARK, PORT166_FN6),
1407 PINMUX_DATA(IDE_D4_MARK, PORT167_FN6),
1408 PINMUX_DATA(IDE_D3_MARK, PORT168_FN6),
1409 PINMUX_DATA(IDE_D2_MARK, PORT169_FN6),
1410 PINMUX_DATA(IDE_D1_MARK, PORT170_FN6),
1411 PINMUX_DATA(IDE_D0_MARK, PORT171_FN6),
1412
1413 /* Port167 - Port171 IRQ */
1414 PINMUX_DATA(IRQ31_PORT167_MARK, PORT167_FN0, MSEL1CR_31_0),
1415 PINMUX_DATA(IRQ27_PORT168_MARK, PORT168_FN0, MSEL1CR_27_0),
1416 PINMUX_DATA(IRQ28_PORT169_MARK, PORT169_FN0, MSEL1CR_28_0),
1417 PINMUX_DATA(IRQ29_PORT170_MARK, PORT170_FN0, MSEL1CR_29_0),
1418 PINMUX_DATA(IRQ30_PORT171_MARK, PORT171_FN0, MSEL1CR_30_0),
1419
1420 /* Port172 */
1421 PINMUX_DATA(D23_MARK, PORT172_FN1),
1422 PINMUX_DATA(SCIFB_RTS_PORT172_MARK, PORT172_FN2, MSEL5CR_17_1),
1423 PINMUX_DATA(ET_ETXD7_MARK, PORT172_FN3),
1424 PINMUX_DATA(IDE_D7_MARK, PORT172_FN6),
1425 PINMUX_DATA(IRQ4_PORT172_MARK, PORT172_FN0, MSEL1CR_4_1),
1426
1427 /* Port173 */
1428 PINMUX_DATA(D22_MARK, PORT173_FN1),
1429 PINMUX_DATA(SCIFB_CTS_PORT173_MARK, PORT173_FN2, MSEL5CR_17_1),
1430 PINMUX_DATA(ET_ETXD6_MARK, PORT173_FN3),
1431 PINMUX_DATA(IDE_D6_MARK, PORT173_FN6),
1432 PINMUX_DATA(IRQ6_PORT173_MARK, PORT173_FN0, MSEL1CR_6_1),
1433
1434 /* Port174 */
1435 PINMUX_DATA(A26_MARK, PORT174_FN1),
1436 PINMUX_DATA(MSIOF0_TXD_MARK, PORT174_FN2),
1437 PINMUX_DATA(ET_RX_CLK_MARK, PORT174_FN3),
1438 PINMUX_DATA(SCIFA3_RXD_PORT174_MARK, PORT174_FN4, MSEL5CR_8_0),
1439
1440 /* Port175 */
1441 PINMUX_DATA(A0_MARK, PORT175_FN1),
1442 PINMUX_DATA(BS_MARK, PORT175_FN2),
1443 PINMUX_DATA(ET_WOL_MARK, PORT175_FN3),
1444 PINMUX_DATA(SCIFA3_TXD_PORT175_MARK, PORT175_FN4, MSEL5CR_8_0),
1445
1446 /* Port176 */
1447 PINMUX_DATA(ET_GTX_CLK_MARK, PORT176_FN3),
1448
1449 /* Port177 */
1450 PINMUX_DATA(WAIT_PORT177_MARK, PORT177_FN1, MSEL5CR_2_0),
1451 PINMUX_DATA(ET_LINK_MARK, PORT177_FN3),
1452 PINMUX_DATA(IDE_IOWR_MARK, PORT177_FN6),
1453 PINMUX_DATA(SDHI2_WP_PORT177_MARK, PORT177_FN7, MSEL5CR_19_1),
1454
1455 /* Port178 */
1456 PINMUX_DATA(VIO0_D12_MARK, PORT178_FN1),
1457 PINMUX_DATA(VIO1_D4_MARK, PORT178_FN5),
1458 PINMUX_DATA(IDE_IORD_MARK, PORT178_FN6),
1459
1460 /* Port179 */
1461 PINMUX_DATA(VIO0_D11_MARK, PORT179_FN1),
1462 PINMUX_DATA(VIO1_D3_MARK, PORT179_FN5),
1463 PINMUX_DATA(IDE_IORDY_MARK, PORT179_FN6),
1464
1465 /* Port180 */
1466 PINMUX_DATA(VIO0_D10_MARK, PORT180_FN1),
1467 PINMUX_DATA(TPU0TO3_MARK, PORT180_FN4),
1468 PINMUX_DATA(VIO1_D2_MARK, PORT180_FN5),
1469 PINMUX_DATA(IDE_INT_MARK, PORT180_FN6),
1470 PINMUX_DATA(IRQ24_MARK, PORT180_FN0),
1471
1472 /* Port181 */
1473 PINMUX_DATA(VIO0_D9_MARK, PORT181_FN1),
1474 PINMUX_DATA(VIO1_D1_MARK, PORT181_FN5),
1475 PINMUX_DATA(IDE_RST_MARK, PORT181_FN6),
1476
1477 /* Port182 */
1478 PINMUX_DATA(VIO0_D8_MARK, PORT182_FN1),
1479 PINMUX_DATA(VIO1_D0_MARK, PORT182_FN5),
1480 PINMUX_DATA(IDE_DIRECTION_MARK, PORT182_FN6),
1481
1482 /* Port183 */
1483 PINMUX_DATA(DREQ1_MARK, PORT183_FN1),
1484 PINMUX_DATA(BBIF2_TXD2_PORT183_MARK, PORT183_FN2, MSEL5CR_0_1),
1485 PINMUX_DATA(ET_TX_EN_MARK, PORT183_FN3),
1486
1487 /* Port184 */
1488 PINMUX_DATA(DACK1_MARK, PORT184_FN1),
1489 PINMUX_DATA(BBIF2_TSYNC2_PORT184_MARK, PORT184_FN2, MSEL5CR_0_1),
1490 PINMUX_DATA(ET_TX_CLK_MARK, PORT184_FN3),
1491
1492 /* Port185 - Port192 Function1 */
1493 PINMUX_DATA(SCIFA1_SCK_MARK, PORT185_FN1),
1494 PINMUX_DATA(SCIFB_RTS_PORT186_MARK, PORT186_FN1, MSEL5CR_17_0),
1495 PINMUX_DATA(SCIFB_CTS_PORT187_MARK, PORT187_FN1, MSEL5CR_17_0),
1496 PINMUX_DATA(SCIFA0_SCK_MARK, PORT188_FN1),
1497 PINMUX_DATA(SCIFB_SCK_PORT190_MARK, PORT190_FN1, MSEL5CR_17_0),
1498 PINMUX_DATA(SCIFB_RXD_PORT191_MARK, PORT191_FN1, MSEL5CR_17_0),
1499 PINMUX_DATA(SCIFB_TXD_PORT192_MARK, PORT192_FN1, MSEL5CR_17_0),
1500
1501 /* Port185 - Port192 Function3 */
1502 PINMUX_DATA(ET_ERXD0_MARK, PORT185_FN3),
1503 PINMUX_DATA(ET_ERXD1_MARK, PORT186_FN3),
1504 PINMUX_DATA(ET_ERXD2_MARK, PORT187_FN3),
1505 PINMUX_DATA(ET_ERXD3_MARK, PORT188_FN3),
1506 PINMUX_DATA(ET_ERXD4_MARK, PORT189_FN3),
1507 PINMUX_DATA(ET_ERXD5_MARK, PORT190_FN3),
1508 PINMUX_DATA(ET_ERXD6_MARK, PORT191_FN3),
1509 PINMUX_DATA(ET_ERXD7_MARK, PORT192_FN3),
1510
1511 /* Port185 - Port192 Function6 */
1512 PINMUX_DATA(STP1_IPCLK_MARK, PORT185_FN6),
1513 PINMUX_DATA(STP1_IPD0_PORT186_MARK, PORT186_FN6, MSEL5CR_23_0),
1514 PINMUX_DATA(STP1_IPEN_PORT187_MARK, PORT187_FN6, MSEL5CR_23_0),
1515 PINMUX_DATA(STP1_IPSYNC_MARK, PORT188_FN6),
1516 PINMUX_DATA(STP0_IPCLK_MARK, PORT189_FN6),
1517 PINMUX_DATA(STP0_IPD0_MARK, PORT190_FN6),
1518 PINMUX_DATA(STP0_IPEN_MARK, PORT191_FN6),
1519 PINMUX_DATA(STP0_IPSYNC_MARK, PORT192_FN6),
1520
1521 /* Port193 */
1522 PINMUX_DATA(SCIFA0_CTS_MARK, PORT193_FN1),
1523 PINMUX_DATA(RMII_CRS_DV_MARK, PORT193_FN3),
1524 PINMUX_DATA(STP1_IPEN_PORT193_MARK, PORT193_FN6, MSEL5CR_23_1), /* ? */
1525 PINMUX_DATA(LCD1_D17_MARK, PORT193_FN7),
1526
1527 /* Port194 */
1528 PINMUX_DATA(SCIFA0_RTS_MARK, PORT194_FN1),
1529 PINMUX_DATA(RMII_RX_ER_MARK, PORT194_FN3),
1530 PINMUX_DATA(STP1_IPD0_PORT194_MARK, PORT194_FN6, MSEL5CR_23_1), /* ? */
1531 PINMUX_DATA(LCD1_D16_MARK, PORT194_FN7),
1532
1533 /* Port195 */
1534 PINMUX_DATA(SCIFA1_RXD_MARK, PORT195_FN1),
1535 PINMUX_DATA(RMII_RXD0_MARK, PORT195_FN3),
1536 PINMUX_DATA(STP1_IPD3_MARK, PORT195_FN6),
1537 PINMUX_DATA(LCD1_D15_MARK, PORT195_FN7),
1538
1539 /* Port196 */
1540 PINMUX_DATA(SCIFA1_TXD_MARK, PORT196_FN1),
1541 PINMUX_DATA(RMII_RXD1_MARK, PORT196_FN3),
1542 PINMUX_DATA(STP1_IPD2_MARK, PORT196_FN6),
1543 PINMUX_DATA(LCD1_D14_MARK, PORT196_FN7),
1544
1545 /* Port197 */
1546 PINMUX_DATA(SCIFA0_RXD_MARK, PORT197_FN1),
1547 PINMUX_DATA(VIO1_CLK_MARK, PORT197_FN5),
1548 PINMUX_DATA(STP1_IPD5_MARK, PORT197_FN6),
1549 PINMUX_DATA(LCD1_D19_MARK, PORT197_FN7),
1550
1551 /* Port198 */
1552 PINMUX_DATA(SCIFA0_TXD_MARK, PORT198_FN1),
1553 PINMUX_DATA(VIO1_VD_MARK, PORT198_FN5),
1554 PINMUX_DATA(STP1_IPD4_MARK, PORT198_FN6),
1555 PINMUX_DATA(LCD1_D18_MARK, PORT198_FN7),
1556
1557 /* Port199 */
1558 PINMUX_DATA(MEMC_NWE_MARK, PORT199_FN1),
1559 PINMUX_DATA(SCIFA2_SCK_PORT199_MARK, PORT199_FN2, MSEL5CR_7_1),
1560 PINMUX_DATA(RMII_TX_EN_MARK, PORT199_FN3),
1561 PINMUX_DATA(SIM_D_PORT199_MARK, PORT199_FN4, MSEL5CR_21_1),
1562 PINMUX_DATA(STP1_IPD1_MARK, PORT199_FN6),
1563 PINMUX_DATA(LCD1_D13_MARK, PORT199_FN7),
1564
1565 /* Port200 */
1566 PINMUX_DATA(MEMC_NOE_MARK, PORT200_FN1),
1567 PINMUX_DATA(SCIFA2_RXD_MARK, PORT200_FN2),
1568 PINMUX_DATA(RMII_TXD0_MARK, PORT200_FN3),
1569 PINMUX_DATA(STP0_IPD7_MARK, PORT200_FN6),
1570 PINMUX_DATA(LCD1_D12_MARK, PORT200_FN7),
1571
1572 /* Port201 */
1573 PINMUX_DATA(MEMC_WAIT_MARK, PORT201_FN1, MSEL4CR_6_0),
1574 PINMUX_DATA(MEMC_DREQ1_MARK, PORT201_FN1, MSEL4CR_6_1),
1575
1576 PINMUX_DATA(SCIFA2_TXD_MARK, PORT201_FN2),
1577 PINMUX_DATA(RMII_TXD1_MARK, PORT201_FN3),
1578 PINMUX_DATA(STP0_IPD6_MARK, PORT201_FN6),
1579 PINMUX_DATA(LCD1_D11_MARK, PORT201_FN7),
1580
1581 /* Port202 */
1582 PINMUX_DATA(MEMC_BUSCLK_MARK, PORT202_FN1, MSEL4CR_6_0),
1583 PINMUX_DATA(MEMC_A0_MARK, PORT202_FN1, MSEL4CR_6_1),
1584
1585 PINMUX_DATA(MSIOF1_SS2_PORT202_MARK, PORT202_FN2, MSEL4CR_10_1),
1586 PINMUX_DATA(RMII_MDC_MARK, PORT202_FN3),
1587 PINMUX_DATA(TPU0TO2_PORT202_MARK, PORT202_FN4, MSEL5CR_25_1),
1588 PINMUX_DATA(IDE_CS0_MARK, PORT202_FN6),
1589 PINMUX_DATA(SDHI2_CD_PORT202_MARK, PORT202_FN7, MSEL5CR_19_1),
1590 PINMUX_DATA(IRQ21_MARK, PORT202_FN0),
1591
1592 /* Port203 - Port208 Function1 */
1593 PINMUX_DATA(SDHI2_CLK_MARK, PORT203_FN1),
1594 PINMUX_DATA(SDHI2_CMD_MARK, PORT204_FN1),
1595 PINMUX_DATA(SDHI2_D0_MARK, PORT205_FN1),
1596 PINMUX_DATA(SDHI2_D1_MARK, PORT206_FN1),
1597 PINMUX_DATA(SDHI2_D2_MARK, PORT207_FN1),
1598 PINMUX_DATA(SDHI2_D3_MARK, PORT208_FN1),
1599
1600 /* Port203 - Port208 Function3 */
1601 PINMUX_DATA(ET_TX_ER_MARK, PORT203_FN3),
1602 PINMUX_DATA(ET_RX_ER_MARK, PORT204_FN3),
1603 PINMUX_DATA(ET_CRS_MARK, PORT205_FN3),
1604 PINMUX_DATA(ET_MDC_MARK, PORT206_FN3),
1605 PINMUX_DATA(ET_MDIO_MARK, PORT207_FN3),
1606 PINMUX_DATA(RMII_MDIO_MARK, PORT208_FN3),
1607
1608 /* Port203 - Port208 Function6 */
1609 PINMUX_DATA(IDE_A2_MARK, PORT203_FN6),
1610 PINMUX_DATA(IDE_A1_MARK, PORT204_FN6),
1611 PINMUX_DATA(IDE_A0_MARK, PORT205_FN6),
1612 PINMUX_DATA(IDE_IODACK_MARK, PORT206_FN6),
1613 PINMUX_DATA(IDE_IODREQ_MARK, PORT207_FN6),
1614 PINMUX_DATA(IDE_CS1_MARK, PORT208_FN6),
1615
1616 /* Port203 - Port208 Function7 */
1617 PINMUX_DATA(SCIFA4_TXD_PORT203_MARK, PORT203_FN7, MSEL5CR_12_0, MSEL5CR_11_1),
1618 PINMUX_DATA(SCIFA4_RXD_PORT204_MARK, PORT204_FN7, MSEL5CR_12_0, MSEL5CR_11_1),
1619 PINMUX_DATA(SCIFA4_SCK_PORT205_MARK, PORT205_FN7, MSEL5CR_10_1),
1620 PINMUX_DATA(SCIFA5_SCK_PORT206_MARK, PORT206_FN7, MSEL5CR_13_1),
1621 PINMUX_DATA(SCIFA5_RXD_PORT207_MARK, PORT207_FN7, MSEL5CR_15_0, MSEL5CR_14_1),
1622 PINMUX_DATA(SCIFA5_TXD_PORT208_MARK, PORT208_FN7, MSEL5CR_15_0, MSEL5CR_14_1),
1623
1624 /* Port209 */
1625 PINMUX_DATA(VBUS_MARK, PORT209_FN1),
1626 PINMUX_DATA(IRQ7_PORT209_MARK, PORT209_FN0, MSEL1CR_7_0),
1627
1628 /* Port210 */
1629 PINMUX_DATA(IRQ9_PORT210_MARK, PORT210_FN0, MSEL1CR_9_1),
1630 PINMUX_DATA(HDMI_HPD_MARK, PORT210_FN1),
1631
1632 /* Port211 */
1633 PINMUX_DATA(IRQ16_PORT211_MARK, PORT211_FN0, MSEL1CR_16_1),
1634 PINMUX_DATA(HDMI_CEC_MARK, PORT211_FN1),
1635
1636 /* LCDC select */
1637 PINMUX_DATA(LCDC0_SELECT_MARK, MSEL3CR_6_0),
1638 PINMUX_DATA(LCDC1_SELECT_MARK, MSEL3CR_6_1),
1639
1640 /* SDENC */
1641 PINMUX_DATA(SDENC_CPG_MARK, MSEL4CR_19_0),
1642 PINMUX_DATA(SDENC_DV_CLKI_MARK, MSEL4CR_19_1),
1643
1644 /* SYSC */
1645 PINMUX_DATA(RESETP_PULLUP_MARK, MSEL4CR_4_0),
1646 PINMUX_DATA(RESETP_PLAIN_MARK, MSEL4CR_4_1),
1647
1648 /* DEBUG */
1649 PINMUX_DATA(EDEBGREQ_PULLDOWN_MARK, MSEL4CR_1_0),
1650 PINMUX_DATA(EDEBGREQ_PULLUP_MARK, MSEL4CR_1_1),
1651
1652 PINMUX_DATA(TRACEAUD_FROM_VIO_MARK, MSEL5CR_30_0, MSEL5CR_29_0),
1653 PINMUX_DATA(TRACEAUD_FROM_LCDC0_MARK, MSEL5CR_30_0, MSEL5CR_29_1),
1654 PINMUX_DATA(TRACEAUD_FROM_MEMC_MARK, MSEL5CR_30_1, MSEL5CR_29_0),
1655};
1656
1657static struct pinmux_gpio pinmux_gpios[] = {
1658
1659 /* PORT */
1660 GPIO_PORT_ALL(),
1661
1662 /* IRQ */
1663 GPIO_FN(IRQ0_PORT2), GPIO_FN(IRQ0_PORT13),
1664 GPIO_FN(IRQ1),
1665 GPIO_FN(IRQ2_PORT11), GPIO_FN(IRQ2_PORT12),
1666 GPIO_FN(IRQ3_PORT10), GPIO_FN(IRQ3_PORT14),
1667 GPIO_FN(IRQ4_PORT15), GPIO_FN(IRQ4_PORT172),
1668 GPIO_FN(IRQ5_PORT0), GPIO_FN(IRQ5_PORT1),
1669 GPIO_FN(IRQ6_PORT121), GPIO_FN(IRQ6_PORT173),
1670 GPIO_FN(IRQ7_PORT120), GPIO_FN(IRQ7_PORT209),
1671 GPIO_FN(IRQ8),
1672 GPIO_FN(IRQ9_PORT118), GPIO_FN(IRQ9_PORT210),
1673 GPIO_FN(IRQ10),
1674 GPIO_FN(IRQ11),
1675 GPIO_FN(IRQ12_PORT42), GPIO_FN(IRQ12_PORT97),
1676 GPIO_FN(IRQ13_PORT64), GPIO_FN(IRQ13_PORT98),
1677 GPIO_FN(IRQ14_PORT63), GPIO_FN(IRQ14_PORT99),
1678 GPIO_FN(IRQ15_PORT62), GPIO_FN(IRQ15_PORT100),
1679 GPIO_FN(IRQ16_PORT68), GPIO_FN(IRQ16_PORT211),
1680 GPIO_FN(IRQ17),
1681 GPIO_FN(IRQ18),
1682 GPIO_FN(IRQ19),
1683 GPIO_FN(IRQ20),
1684 GPIO_FN(IRQ21),
1685 GPIO_FN(IRQ22),
1686 GPIO_FN(IRQ23),
1687 GPIO_FN(IRQ24),
1688 GPIO_FN(IRQ25),
1689 GPIO_FN(IRQ26_PORT58), GPIO_FN(IRQ26_PORT81),
1690 GPIO_FN(IRQ27_PORT57), GPIO_FN(IRQ27_PORT168),
1691 GPIO_FN(IRQ28_PORT56), GPIO_FN(IRQ28_PORT169),
1692 GPIO_FN(IRQ29_PORT50), GPIO_FN(IRQ29_PORT170),
1693 GPIO_FN(IRQ30_PORT49), GPIO_FN(IRQ30_PORT171),
1694 GPIO_FN(IRQ31_PORT41), GPIO_FN(IRQ31_PORT167),
1695
1696 /* Function */
1697
1698 /* DBGT */
1699 GPIO_FN(DBGMDT2), GPIO_FN(DBGMDT1), GPIO_FN(DBGMDT0),
1700 GPIO_FN(DBGMD10), GPIO_FN(DBGMD11), GPIO_FN(DBGMD20),
1701 GPIO_FN(DBGMD21),
1702
1703 /* FSI-A */
1704 GPIO_FN(FSIAISLD_PORT0), /* FSIAISLD Port 0/5 */
1705 GPIO_FN(FSIAISLD_PORT5),
1706 GPIO_FN(FSIASPDIF_PORT9), /* FSIASPDIF Port 9/18 */
1707 GPIO_FN(FSIASPDIF_PORT18),
1708 GPIO_FN(FSIAOSLD1), GPIO_FN(FSIAOSLD2), GPIO_FN(FSIAOLR),
1709 GPIO_FN(FSIAOBT), GPIO_FN(FSIAOSLD), GPIO_FN(FSIAOMC),
1710 GPIO_FN(FSIACK), GPIO_FN(FSIAILR), GPIO_FN(FSIAIBT),
1711
1712 /* FSI-B */
1713 GPIO_FN(FSIBCK),
1714
1715 /* FMSI */
1716 GPIO_FN(FMSISLD_PORT1), /* FMSISLD Port 1/6 */
1717 GPIO_FN(FMSISLD_PORT6),
1718 GPIO_FN(FMSIILR), GPIO_FN(FMSIIBT), GPIO_FN(FMSIOLR),
1719 GPIO_FN(FMSIOBT), GPIO_FN(FMSICK), GPIO_FN(FMSOILR),
1720 GPIO_FN(FMSOIBT), GPIO_FN(FMSOOLR), GPIO_FN(FMSOOBT),
1721 GPIO_FN(FMSOSLD), GPIO_FN(FMSOCK),
1722
1723 /* SCIFA0 */
1724 GPIO_FN(SCIFA0_SCK), GPIO_FN(SCIFA0_CTS), GPIO_FN(SCIFA0_RTS),
1725 GPIO_FN(SCIFA0_RXD), GPIO_FN(SCIFA0_TXD),
1726
1727 /* SCIFA1 */
1728 GPIO_FN(SCIFA1_CTS), GPIO_FN(SCIFA1_SCK),
1729 GPIO_FN(SCIFA1_RXD), GPIO_FN(SCIFA1_TXD), GPIO_FN(SCIFA1_RTS),
1730
1731 /* SCIFA2 */
1732 GPIO_FN(SCIFA2_SCK_PORT22), /* SCIFA2_SCK Port 22/199 */
1733 GPIO_FN(SCIFA2_SCK_PORT199),
1734 GPIO_FN(SCIFA2_RXD), GPIO_FN(SCIFA2_TXD),
1735 GPIO_FN(SCIFA2_CTS), GPIO_FN(SCIFA2_RTS),
1736
1737 /* SCIFA3 */
1738 GPIO_FN(SCIFA3_RTS_PORT105), /* MSEL5CR_8_0 */
1739 GPIO_FN(SCIFA3_SCK_PORT116),
1740 GPIO_FN(SCIFA3_CTS_PORT117),
1741 GPIO_FN(SCIFA3_RXD_PORT174),
1742 GPIO_FN(SCIFA3_TXD_PORT175),
1743
1744 GPIO_FN(SCIFA3_RTS_PORT161), /* MSEL5CR_8_1 */
1745 GPIO_FN(SCIFA3_SCK_PORT158),
1746 GPIO_FN(SCIFA3_CTS_PORT162),
1747 GPIO_FN(SCIFA3_RXD_PORT159),
1748 GPIO_FN(SCIFA3_TXD_PORT160),
1749
1750 /* SCIFA4 */
1751 GPIO_FN(SCIFA4_RXD_PORT12), /* MSEL5CR[12:11] = 00 */
1752 GPIO_FN(SCIFA4_TXD_PORT13),
1753
1754 GPIO_FN(SCIFA4_RXD_PORT204), /* MSEL5CR[12:11] = 01 */
1755 GPIO_FN(SCIFA4_TXD_PORT203),
1756
1757 GPIO_FN(SCIFA4_RXD_PORT94), /* MSEL5CR[12:11] = 10 */
1758 GPIO_FN(SCIFA4_TXD_PORT93),
1759
1760 GPIO_FN(SCIFA4_SCK_PORT21), /* SCIFA4_SCK Port 21/205 */
1761 GPIO_FN(SCIFA4_SCK_PORT205),
1762
1763 /* SCIFA5 */
1764 GPIO_FN(SCIFA5_TXD_PORT20), /* MSEL5CR[15:14] = 00 */
1765 GPIO_FN(SCIFA5_RXD_PORT10),
1766
1767 GPIO_FN(SCIFA5_RXD_PORT207), /* MSEL5CR[15:14] = 01 */
1768 GPIO_FN(SCIFA5_TXD_PORT208),
1769
1770 GPIO_FN(SCIFA5_TXD_PORT91), /* MSEL5CR[15:14] = 10 */
1771 GPIO_FN(SCIFA5_RXD_PORT92),
1772
1773 GPIO_FN(SCIFA5_SCK_PORT23), /* SCIFA5_SCK Port 23/206 */
1774 GPIO_FN(SCIFA5_SCK_PORT206),
1775
1776 /* SCIFA6 */
1777 GPIO_FN(SCIFA6_SCK), GPIO_FN(SCIFA6_RXD), GPIO_FN(SCIFA6_TXD),
1778
1779 /* SCIFA7 */
1780 GPIO_FN(SCIFA7_TXD), GPIO_FN(SCIFA7_RXD),
1781
1782 /* SCIFAB */
1783 GPIO_FN(SCIFB_SCK_PORT190), /* MSEL5CR_17_0 */
1784 GPIO_FN(SCIFB_RXD_PORT191),
1785 GPIO_FN(SCIFB_TXD_PORT192),
1786 GPIO_FN(SCIFB_RTS_PORT186),
1787 GPIO_FN(SCIFB_CTS_PORT187),
1788
1789 GPIO_FN(SCIFB_SCK_PORT2), /* MSEL5CR_17_1 */
1790 GPIO_FN(SCIFB_RXD_PORT3),
1791 GPIO_FN(SCIFB_TXD_PORT4),
1792 GPIO_FN(SCIFB_RTS_PORT172),
1793 GPIO_FN(SCIFB_CTS_PORT173),
1794
1795 /* LCD0 */
1796 GPIO_FN(LCD0_D0), GPIO_FN(LCD0_D1), GPIO_FN(LCD0_D2),
1797 GPIO_FN(LCD0_D3), GPIO_FN(LCD0_D4), GPIO_FN(LCD0_D5),
1798 GPIO_FN(LCD0_D6), GPIO_FN(LCD0_D7), GPIO_FN(LCD0_D8),
1799 GPIO_FN(LCD0_D9), GPIO_FN(LCD0_D10), GPIO_FN(LCD0_D11),
1800 GPIO_FN(LCD0_D12), GPIO_FN(LCD0_D13), GPIO_FN(LCD0_D14),
1801 GPIO_FN(LCD0_D15), GPIO_FN(LCD0_D16), GPIO_FN(LCD0_D17),
1802 GPIO_FN(LCD0_DON), GPIO_FN(LCD0_VCPWC), GPIO_FN(LCD0_VEPWC),
1803 GPIO_FN(LCD0_DCK), GPIO_FN(LCD0_VSYN),
1804 GPIO_FN(LCD0_HSYN), GPIO_FN(LCD0_DISP),
1805 GPIO_FN(LCD0_WR), GPIO_FN(LCD0_RD),
1806 GPIO_FN(LCD0_CS), GPIO_FN(LCD0_RS),
1807
1808 GPIO_FN(LCD0_D18_PORT163), GPIO_FN(LCD0_D19_PORT162),
1809 GPIO_FN(LCD0_D20_PORT161), GPIO_FN(LCD0_D21_PORT158),
1810 GPIO_FN(LCD0_D22_PORT160), GPIO_FN(LCD0_D23_PORT159),
1811 GPIO_FN(LCD0_LCLK_PORT165), /* MSEL5CR_6_1 */
1812
1813 GPIO_FN(LCD0_D18_PORT40), GPIO_FN(LCD0_D19_PORT4),
1814 GPIO_FN(LCD0_D20_PORT3), GPIO_FN(LCD0_D21_PORT2),
1815 GPIO_FN(LCD0_D22_PORT0), GPIO_FN(LCD0_D23_PORT1),
1816 GPIO_FN(LCD0_LCLK_PORT102), /* MSEL5CR_6_0 */
1817
1818 /* LCD1 */
1819 GPIO_FN(LCD1_D0), GPIO_FN(LCD1_D1), GPIO_FN(LCD1_D2),
1820 GPIO_FN(LCD1_D3), GPIO_FN(LCD1_D4), GPIO_FN(LCD1_D5),
1821 GPIO_FN(LCD1_D6), GPIO_FN(LCD1_D7), GPIO_FN(LCD1_D8),
1822 GPIO_FN(LCD1_D9), GPIO_FN(LCD1_D10), GPIO_FN(LCD1_D11),
1823 GPIO_FN(LCD1_D12), GPIO_FN(LCD1_D13), GPIO_FN(LCD1_D14),
1824 GPIO_FN(LCD1_D15), GPIO_FN(LCD1_D16), GPIO_FN(LCD1_D17),
1825 GPIO_FN(LCD1_D18), GPIO_FN(LCD1_D19), GPIO_FN(LCD1_D20),
1826 GPIO_FN(LCD1_D21), GPIO_FN(LCD1_D22), GPIO_FN(LCD1_D23),
1827 GPIO_FN(LCD1_RS), GPIO_FN(LCD1_RD), GPIO_FN(LCD1_CS),
1828 GPIO_FN(LCD1_WR), GPIO_FN(LCD1_DCK), GPIO_FN(LCD1_DON),
1829 GPIO_FN(LCD1_VCPWC), GPIO_FN(LCD1_LCLK), GPIO_FN(LCD1_HSYN),
1830 GPIO_FN(LCD1_VSYN), GPIO_FN(LCD1_VEPWC), GPIO_FN(LCD1_DISP),
1831
1832 /* RSPI */
1833 GPIO_FN(RSPI_SSL0_A), GPIO_FN(RSPI_SSL1_A), GPIO_FN(RSPI_SSL2_A),
1834 GPIO_FN(RSPI_SSL3_A), GPIO_FN(RSPI_CK_A), GPIO_FN(RSPI_MOSI_A),
1835 GPIO_FN(RSPI_MISO_A),
1836
1837 /* VIO CKO */
1838 GPIO_FN(VIO_CKO1),
1839 GPIO_FN(VIO_CKO2),
1840 GPIO_FN(VIO_CKO_1),
1841 GPIO_FN(VIO_CKO),
1842
1843 /* VIO0 */
1844 GPIO_FN(VIO0_D0), GPIO_FN(VIO0_D1), GPIO_FN(VIO0_D2),
1845 GPIO_FN(VIO0_D3), GPIO_FN(VIO0_D4), GPIO_FN(VIO0_D5),
1846 GPIO_FN(VIO0_D6), GPIO_FN(VIO0_D7), GPIO_FN(VIO0_D8),
1847 GPIO_FN(VIO0_D9), GPIO_FN(VIO0_D10), GPIO_FN(VIO0_D11),
1848 GPIO_FN(VIO0_D12), GPIO_FN(VIO0_VD), GPIO_FN(VIO0_HD),
1849 GPIO_FN(VIO0_CLK), GPIO_FN(VIO0_FIELD),
1850
1851 GPIO_FN(VIO0_D13_PORT26), /* MSEL5CR_27_0 */
1852 GPIO_FN(VIO0_D14_PORT25),
1853 GPIO_FN(VIO0_D15_PORT24),
1854
1855 GPIO_FN(VIO0_D13_PORT22), /* MSEL5CR_27_1 */
1856 GPIO_FN(VIO0_D14_PORT95),
1857 GPIO_FN(VIO0_D15_PORT96),
1858
1859 /* VIO1 */
1860 GPIO_FN(VIO1_D0), GPIO_FN(VIO1_D1), GPIO_FN(VIO1_D2),
1861 GPIO_FN(VIO1_D3), GPIO_FN(VIO1_D4), GPIO_FN(VIO1_D5),
1862 GPIO_FN(VIO1_D6), GPIO_FN(VIO1_D7), GPIO_FN(VIO1_VD),
1863 GPIO_FN(VIO1_HD), GPIO_FN(VIO1_CLK), GPIO_FN(VIO1_FIELD),
1864
1865 /* TPU0 */
1866 GPIO_FN(TPU0TO0), GPIO_FN(TPU0TO1), GPIO_FN(TPU0TO3),
1867 GPIO_FN(TPU0TO2_PORT66), /* TPU0TO2 Port 66/202 */
1868 GPIO_FN(TPU0TO2_PORT202),
1869
1870 /* SSP1 0 */
1871 GPIO_FN(STP0_IPD0), GPIO_FN(STP0_IPD1), GPIO_FN(STP0_IPD2),
1872 GPIO_FN(STP0_IPD3), GPIO_FN(STP0_IPD4), GPIO_FN(STP0_IPD5),
1873 GPIO_FN(STP0_IPD6), GPIO_FN(STP0_IPD7), GPIO_FN(STP0_IPEN),
1874 GPIO_FN(STP0_IPCLK), GPIO_FN(STP0_IPSYNC),
1875
1876 /* SSP1 1 */
1877 GPIO_FN(STP1_IPD1), GPIO_FN(STP1_IPD2), GPIO_FN(STP1_IPD3),
1878 GPIO_FN(STP1_IPD4), GPIO_FN(STP1_IPD5), GPIO_FN(STP1_IPD6),
1879 GPIO_FN(STP1_IPD7), GPIO_FN(STP1_IPCLK), GPIO_FN(STP1_IPSYNC),
1880
1881 GPIO_FN(STP1_IPD0_PORT186), /* MSEL5CR_23_0 */
1882 GPIO_FN(STP1_IPEN_PORT187),
1883
1884 GPIO_FN(STP1_IPD0_PORT194), /* MSEL5CR_23_1 */
1885 GPIO_FN(STP1_IPEN_PORT193),
1886
1887 /* SIM */
1888 GPIO_FN(SIM_RST), GPIO_FN(SIM_CLK),
1889 GPIO_FN(SIM_D_PORT22), /* SIM_D Port 22/199 */
1890 GPIO_FN(SIM_D_PORT199),
1891
1892 /* SDHI0 */
1893 GPIO_FN(SDHI0_D0), GPIO_FN(SDHI0_D1), GPIO_FN(SDHI0_D2),
1894 GPIO_FN(SDHI0_D3), GPIO_FN(SDHI0_CD), GPIO_FN(SDHI0_WP),
1895 GPIO_FN(SDHI0_CMD), GPIO_FN(SDHI0_CLK),
1896
1897 /* SDHI1 */
1898 GPIO_FN(SDHI1_D0), GPIO_FN(SDHI1_D1), GPIO_FN(SDHI1_D2),
1899 GPIO_FN(SDHI1_D3), GPIO_FN(SDHI1_CD), GPIO_FN(SDHI1_WP),
1900 GPIO_FN(SDHI1_CMD), GPIO_FN(SDHI1_CLK),
1901
1902 /* SDHI2 */
1903 GPIO_FN(SDHI2_D0), GPIO_FN(SDHI2_D1), GPIO_FN(SDHI2_D2),
1904 GPIO_FN(SDHI2_D3), GPIO_FN(SDHI2_CLK), GPIO_FN(SDHI2_CMD),
1905
1906 GPIO_FN(SDHI2_CD_PORT24), /* MSEL5CR_19_0 */
1907 GPIO_FN(SDHI2_WP_PORT25),
1908
1909 GPIO_FN(SDHI2_WP_PORT177), /* MSEL5CR_19_1 */
1910 GPIO_FN(SDHI2_CD_PORT202),
1911
1912 /* MSIOF2 */
1913 GPIO_FN(MSIOF2_TXD), GPIO_FN(MSIOF2_RXD), GPIO_FN(MSIOF2_TSCK),
1914 GPIO_FN(MSIOF2_SS2), GPIO_FN(MSIOF2_TSYNC), GPIO_FN(MSIOF2_SS1),
1915 GPIO_FN(MSIOF2_MCK1), GPIO_FN(MSIOF2_MCK0), GPIO_FN(MSIOF2_RSYNC),
1916 GPIO_FN(MSIOF2_RSCK),
1917
1918 /* KEYSC */
1919 GPIO_FN(KEYIN4), GPIO_FN(KEYIN5),
1920 GPIO_FN(KEYIN6), GPIO_FN(KEYIN7),
1921 GPIO_FN(KEYOUT0), GPIO_FN(KEYOUT1), GPIO_FN(KEYOUT2),
1922 GPIO_FN(KEYOUT3), GPIO_FN(KEYOUT4), GPIO_FN(KEYOUT5),
1923 GPIO_FN(KEYOUT6), GPIO_FN(KEYOUT7),
1924
1925 GPIO_FN(KEYIN0_PORT43), /* MSEL4CR_18_0 */
1926 GPIO_FN(KEYIN1_PORT44),
1927 GPIO_FN(KEYIN2_PORT45),
1928 GPIO_FN(KEYIN3_PORT46),
1929
1930 GPIO_FN(KEYIN0_PORT58), /* MSEL4CR_18_1 */
1931 GPIO_FN(KEYIN1_PORT57),
1932 GPIO_FN(KEYIN2_PORT56),
1933 GPIO_FN(KEYIN3_PORT55),
1934
1935 /* VOU */
1936 GPIO_FN(DV_D0), GPIO_FN(DV_D1), GPIO_FN(DV_D2),
1937 GPIO_FN(DV_D3), GPIO_FN(DV_D4), GPIO_FN(DV_D5),
1938 GPIO_FN(DV_D6), GPIO_FN(DV_D7), GPIO_FN(DV_D8),
1939 GPIO_FN(DV_D9), GPIO_FN(DV_D10), GPIO_FN(DV_D11),
1940 GPIO_FN(DV_D12), GPIO_FN(DV_D13), GPIO_FN(DV_D14),
1941 GPIO_FN(DV_D15), GPIO_FN(DV_CLK),
1942 GPIO_FN(DV_VSYNC), GPIO_FN(DV_HSYNC),
1943
1944 /* MEMC */
1945 GPIO_FN(MEMC_AD0), GPIO_FN(MEMC_AD1), GPIO_FN(MEMC_AD2),
1946 GPIO_FN(MEMC_AD3), GPIO_FN(MEMC_AD4), GPIO_FN(MEMC_AD5),
1947 GPIO_FN(MEMC_AD6), GPIO_FN(MEMC_AD7), GPIO_FN(MEMC_AD8),
1948 GPIO_FN(MEMC_AD9), GPIO_FN(MEMC_AD10), GPIO_FN(MEMC_AD11),
1949 GPIO_FN(MEMC_AD12), GPIO_FN(MEMC_AD13), GPIO_FN(MEMC_AD14),
1950 GPIO_FN(MEMC_AD15), GPIO_FN(MEMC_CS0), GPIO_FN(MEMC_INT),
1951 GPIO_FN(MEMC_NWE), GPIO_FN(MEMC_NOE), GPIO_FN(MEMC_CS1),
1952 GPIO_FN(MEMC_A1), GPIO_FN(MEMC_ADV), GPIO_FN(MEMC_DREQ0),
1953 GPIO_FN(MEMC_WAIT), GPIO_FN(MEMC_DREQ1), GPIO_FN(MEMC_BUSCLK),
1954 GPIO_FN(MEMC_A0),
1955
1956 /* MMC */
1957 GPIO_FN(MMC0_D0_PORT68), GPIO_FN(MMC0_D1_PORT69),
1958 GPIO_FN(MMC0_D2_PORT70), GPIO_FN(MMC0_D3_PORT71),
1959 GPIO_FN(MMC0_D4_PORT72), GPIO_FN(MMC0_D5_PORT73),
1960 GPIO_FN(MMC0_D6_PORT74), GPIO_FN(MMC0_D7_PORT75),
1961 GPIO_FN(MMC0_CLK_PORT66),
1962 GPIO_FN(MMC0_CMD_PORT67), /* MSEL4CR_15_0 */
1963
1964 GPIO_FN(MMC1_D0_PORT149), GPIO_FN(MMC1_D1_PORT148),
1965 GPIO_FN(MMC1_D2_PORT147), GPIO_FN(MMC1_D3_PORT146),
1966 GPIO_FN(MMC1_D4_PORT145), GPIO_FN(MMC1_D5_PORT144),
1967 GPIO_FN(MMC1_D6_PORT143), GPIO_FN(MMC1_D7_PORT142),
1968 GPIO_FN(MMC1_CLK_PORT103),
1969 GPIO_FN(MMC1_CMD_PORT104), /* MSEL4CR_15_1 */
1970
1971 /* MSIOF0 */
1972 GPIO_FN(MSIOF0_SS1), GPIO_FN(MSIOF0_SS2), GPIO_FN(MSIOF0_RXD),
1973 GPIO_FN(MSIOF0_TXD), GPIO_FN(MSIOF0_MCK0), GPIO_FN(MSIOF0_MCK1),
1974 GPIO_FN(MSIOF0_RSYNC), GPIO_FN(MSIOF0_RSCK), GPIO_FN(MSIOF0_TSCK),
1975 GPIO_FN(MSIOF0_TSYNC),
1976
1977 /* MSIOF1 */
1978 GPIO_FN(MSIOF1_RSCK), GPIO_FN(MSIOF1_RSYNC),
1979 GPIO_FN(MSIOF1_MCK0), GPIO_FN(MSIOF1_MCK1),
1980
1981 GPIO_FN(MSIOF1_SS2_PORT116), GPIO_FN(MSIOF1_SS1_PORT117),
1982 GPIO_FN(MSIOF1_RXD_PORT118), GPIO_FN(MSIOF1_TXD_PORT119),
1983 GPIO_FN(MSIOF1_TSYNC_PORT120),
1984 GPIO_FN(MSIOF1_TSCK_PORT121), /* MSEL4CR_10_0 */
1985
1986 GPIO_FN(MSIOF1_SS1_PORT67), GPIO_FN(MSIOF1_TSCK_PORT72),
1987 GPIO_FN(MSIOF1_TSYNC_PORT73), GPIO_FN(MSIOF1_TXD_PORT74),
1988 GPIO_FN(MSIOF1_RXD_PORT75),
1989 GPIO_FN(MSIOF1_SS2_PORT202), /* MSEL4CR_10_1 */
1990
1991 /* GPIO */
1992 GPIO_FN(GPO0), GPIO_FN(GPI0),
1993 GPIO_FN(GPO1), GPIO_FN(GPI1),
1994
1995 /* USB0 */
1996 GPIO_FN(USB0_OCI), GPIO_FN(USB0_PPON), GPIO_FN(VBUS),
1997
1998 /* USB1 */
1999 GPIO_FN(USB1_OCI), GPIO_FN(USB1_PPON),
2000
2001 /* BBIF1 */
2002 GPIO_FN(BBIF1_RXD), GPIO_FN(BBIF1_TXD), GPIO_FN(BBIF1_TSYNC),
2003 GPIO_FN(BBIF1_TSCK), GPIO_FN(BBIF1_RSCK), GPIO_FN(BBIF1_RSYNC),
2004 GPIO_FN(BBIF1_FLOW), GPIO_FN(BBIF1_RX_FLOW_N),
2005
2006 /* BBIF2 */
2007 GPIO_FN(BBIF2_TXD2_PORT5), /* MSEL5CR_0_0 */
2008 GPIO_FN(BBIF2_RXD2_PORT60),
2009 GPIO_FN(BBIF2_TSYNC2_PORT6),
2010 GPIO_FN(BBIF2_TSCK2_PORT59),
2011
2012 GPIO_FN(BBIF2_RXD2_PORT90), /* MSEL5CR_0_1 */
2013 GPIO_FN(BBIF2_TXD2_PORT183),
2014 GPIO_FN(BBIF2_TSCK2_PORT89),
2015 GPIO_FN(BBIF2_TSYNC2_PORT184),
2016
2017 /* BSC / FLCTL / PCMCIA */
2018 GPIO_FN(CS0), GPIO_FN(CS2), GPIO_FN(CS4),
2019 GPIO_FN(CS5B), GPIO_FN(CS6A),
2020 GPIO_FN(CS5A_PORT105), /* CS5A PORT 19/105 */
2021 GPIO_FN(CS5A_PORT19),
2022 GPIO_FN(IOIS16), /* ? */
2023
2024 GPIO_FN(A0), GPIO_FN(A1), GPIO_FN(A2), GPIO_FN(A3),
2025 GPIO_FN(A4_FOE), GPIO_FN(A5_FCDE), /* share with FLCTL */
2026 GPIO_FN(A6), GPIO_FN(A7), GPIO_FN(A8), GPIO_FN(A9),
2027 GPIO_FN(A10), GPIO_FN(A11), GPIO_FN(A12), GPIO_FN(A13),
2028 GPIO_FN(A14), GPIO_FN(A15), GPIO_FN(A16), GPIO_FN(A17),
2029 GPIO_FN(A18), GPIO_FN(A19), GPIO_FN(A20), GPIO_FN(A21),
2030 GPIO_FN(A22), GPIO_FN(A23), GPIO_FN(A24), GPIO_FN(A25),
2031 GPIO_FN(A26),
2032
2033 GPIO_FN(D0_NAF0), GPIO_FN(D1_NAF1), /* share with FLCTL */
2034 GPIO_FN(D2_NAF2), GPIO_FN(D3_NAF3), /* share with FLCTL */
2035 GPIO_FN(D4_NAF4), GPIO_FN(D5_NAF5), /* share with FLCTL */
2036 GPIO_FN(D6_NAF6), GPIO_FN(D7_NAF7), /* share with FLCTL */
2037 GPIO_FN(D8_NAF8), GPIO_FN(D9_NAF9), /* share with FLCTL */
2038 GPIO_FN(D10_NAF10), GPIO_FN(D11_NAF11), /* share with FLCTL */
2039 GPIO_FN(D12_NAF12), GPIO_FN(D13_NAF13), /* share with FLCTL */
2040 GPIO_FN(D14_NAF14), GPIO_FN(D15_NAF15), /* share with FLCTL */
2041 GPIO_FN(D16), GPIO_FN(D17), GPIO_FN(D18), GPIO_FN(D19),
2042 GPIO_FN(D20), GPIO_FN(D21), GPIO_FN(D22), GPIO_FN(D23),
2043 GPIO_FN(D24), GPIO_FN(D25), GPIO_FN(D26), GPIO_FN(D27),
2044 GPIO_FN(D28), GPIO_FN(D29), GPIO_FN(D30), GPIO_FN(D31),
2045
2046 GPIO_FN(WE0_FWE), /* share with FLCTL */
2047 GPIO_FN(WE1),
2048 GPIO_FN(WE2_ICIORD), /* share with PCMCIA */
2049 GPIO_FN(WE3_ICIOWR), /* share with PCMCIA */
2050 GPIO_FN(CKO), GPIO_FN(BS), GPIO_FN(RDWR),
2051 GPIO_FN(RD_FSC), /* share with FLCTL */
2052 GPIO_FN(WAIT_PORT177), /* WAIT Port 90/177 */
2053 GPIO_FN(WAIT_PORT90),
2054
2055 GPIO_FN(FCE0), GPIO_FN(FCE1), GPIO_FN(FRB), /* FLCTL */
2056
2057 /* IRDA */
2058 GPIO_FN(IRDA_FIRSEL), GPIO_FN(IRDA_IN), GPIO_FN(IRDA_OUT),
2059
2060 /* ATAPI */
2061 GPIO_FN(IDE_D0), GPIO_FN(IDE_D1), GPIO_FN(IDE_D2),
2062 GPIO_FN(IDE_D3), GPIO_FN(IDE_D4), GPIO_FN(IDE_D5),
2063 GPIO_FN(IDE_D6), GPIO_FN(IDE_D7), GPIO_FN(IDE_D8),
2064 GPIO_FN(IDE_D9), GPIO_FN(IDE_D10), GPIO_FN(IDE_D11),
2065 GPIO_FN(IDE_D12), GPIO_FN(IDE_D13), GPIO_FN(IDE_D14),
2066 GPIO_FN(IDE_D15), GPIO_FN(IDE_A0), GPIO_FN(IDE_A1),
2067 GPIO_FN(IDE_A2), GPIO_FN(IDE_CS0), GPIO_FN(IDE_CS1),
2068 GPIO_FN(IDE_IOWR), GPIO_FN(IDE_IORD), GPIO_FN(IDE_IORDY),
2069 GPIO_FN(IDE_INT), GPIO_FN(IDE_RST), GPIO_FN(IDE_DIRECTION),
2070 GPIO_FN(IDE_EXBUF_ENB), GPIO_FN(IDE_IODACK), GPIO_FN(IDE_IODREQ),
2071
2072 /* RMII */
2073 GPIO_FN(RMII_CRS_DV), GPIO_FN(RMII_RX_ER), GPIO_FN(RMII_RXD0),
2074 GPIO_FN(RMII_RXD1), GPIO_FN(RMII_TX_EN), GPIO_FN(RMII_TXD0),
2075 GPIO_FN(RMII_MDC), GPIO_FN(RMII_TXD1), GPIO_FN(RMII_MDIO),
2076 GPIO_FN(RMII_REF50CK), GPIO_FN(RMII_REF125CK), /* for GMII */
2077
2078 /* GEther */
2079 GPIO_FN(ET_TX_CLK), GPIO_FN(ET_TX_EN), GPIO_FN(ET_ETXD0),
2080 GPIO_FN(ET_ETXD1), GPIO_FN(ET_ETXD2), GPIO_FN(ET_ETXD3),
2081 GPIO_FN(ET_ETXD4), GPIO_FN(ET_ETXD5), /* for GEther */
2082 GPIO_FN(ET_ETXD6), GPIO_FN(ET_ETXD7), /* for GEther */
2083 GPIO_FN(ET_COL), GPIO_FN(ET_TX_ER), GPIO_FN(ET_RX_CLK),
2084 GPIO_FN(ET_RX_DV), GPIO_FN(ET_ERXD0), GPIO_FN(ET_ERXD1),
2085 GPIO_FN(ET_ERXD2), GPIO_FN(ET_ERXD3),
2086 GPIO_FN(ET_ERXD4), GPIO_FN(ET_ERXD5), /* for GEther */
2087 GPIO_FN(ET_ERXD6), GPIO_FN(ET_ERXD7), /* for GEther */
2088 GPIO_FN(ET_RX_ER), GPIO_FN(ET_CRS), GPIO_FN(ET_MDC),
2089 GPIO_FN(ET_MDIO), GPIO_FN(ET_LINK), GPIO_FN(ET_PHY_INT),
2090 GPIO_FN(ET_WOL), GPIO_FN(ET_GTX_CLK),
2091
2092 /* DMA0 */
2093 GPIO_FN(DREQ0), GPIO_FN(DACK0),
2094
2095 /* DMA1 */
2096 GPIO_FN(DREQ1), GPIO_FN(DACK1),
2097
2098 /* SYSC */
2099 GPIO_FN(RESETOUTS),
2100
2101 /* IRREM */
2102 GPIO_FN(IROUT),
2103
2104 /* LCDC */
2105 GPIO_FN(LCDC0_SELECT),
2106 GPIO_FN(LCDC1_SELECT),
2107
2108 /* SDENC */
2109 GPIO_FN(SDENC_CPG),
2110 GPIO_FN(SDENC_DV_CLKI),
2111
2112 /* HDMI */
2113 GPIO_FN(HDMI_HPD),
2114 GPIO_FN(HDMI_CEC),
2115
2116 /* SYSC */
2117 GPIO_FN(RESETP_PULLUP),
2118 GPIO_FN(RESETP_PLAIN),
2119
2120 /* DEBUG */
2121 GPIO_FN(EDEBGREQ_PULLDOWN),
2122 GPIO_FN(EDEBGREQ_PULLUP),
2123
2124 GPIO_FN(TRACEAUD_FROM_VIO),
2125 GPIO_FN(TRACEAUD_FROM_LCDC0),
2126 GPIO_FN(TRACEAUD_FROM_MEMC),
2127};
2128
2129static struct pinmux_cfg_reg pinmux_config_regs[] = {
2130 PORTCR(0, 0xe6050000), /* PORT0CR */
2131 PORTCR(1, 0xe6050001), /* PORT1CR */
2132 PORTCR(2, 0xe6050002), /* PORT2CR */
2133 PORTCR(3, 0xe6050003), /* PORT3CR */
2134 PORTCR(4, 0xe6050004), /* PORT4CR */
2135 PORTCR(5, 0xe6050005), /* PORT5CR */
2136 PORTCR(6, 0xe6050006), /* PORT6CR */
2137 PORTCR(7, 0xe6050007), /* PORT7CR */
2138 PORTCR(8, 0xe6050008), /* PORT8CR */
2139 PORTCR(9, 0xe6050009), /* PORT9CR */
2140 PORTCR(10, 0xe605000a), /* PORT10CR */
2141 PORTCR(11, 0xe605000b), /* PORT11CR */
2142 PORTCR(12, 0xe605000c), /* PORT12CR */
2143 PORTCR(13, 0xe605000d), /* PORT13CR */
2144 PORTCR(14, 0xe605000e), /* PORT14CR */
2145 PORTCR(15, 0xe605000f), /* PORT15CR */
2146 PORTCR(16, 0xe6050010), /* PORT16CR */
2147 PORTCR(17, 0xe6050011), /* PORT17CR */
2148 PORTCR(18, 0xe6050012), /* PORT18CR */
2149 PORTCR(19, 0xe6050013), /* PORT19CR */
2150 PORTCR(20, 0xe6050014), /* PORT20CR */
2151 PORTCR(21, 0xe6050015), /* PORT21CR */
2152 PORTCR(22, 0xe6050016), /* PORT22CR */
2153 PORTCR(23, 0xe6050017), /* PORT23CR */
2154 PORTCR(24, 0xe6050018), /* PORT24CR */
2155 PORTCR(25, 0xe6050019), /* PORT25CR */
2156 PORTCR(26, 0xe605001a), /* PORT26CR */
2157 PORTCR(27, 0xe605001b), /* PORT27CR */
2158 PORTCR(28, 0xe605001c), /* PORT28CR */
2159 PORTCR(29, 0xe605001d), /* PORT29CR */
2160 PORTCR(30, 0xe605001e), /* PORT30CR */
2161 PORTCR(31, 0xe605001f), /* PORT31CR */
2162 PORTCR(32, 0xe6050020), /* PORT32CR */
2163 PORTCR(33, 0xe6050021), /* PORT33CR */
2164 PORTCR(34, 0xe6050022), /* PORT34CR */
2165 PORTCR(35, 0xe6050023), /* PORT35CR */
2166 PORTCR(36, 0xe6050024), /* PORT36CR */
2167 PORTCR(37, 0xe6050025), /* PORT37CR */
2168 PORTCR(38, 0xe6050026), /* PORT38CR */
2169 PORTCR(39, 0xe6050027), /* PORT39CR */
2170 PORTCR(40, 0xe6050028), /* PORT40CR */
2171 PORTCR(41, 0xe6050029), /* PORT41CR */
2172 PORTCR(42, 0xe605002a), /* PORT42CR */
2173 PORTCR(43, 0xe605002b), /* PORT43CR */
2174 PORTCR(44, 0xe605002c), /* PORT44CR */
2175 PORTCR(45, 0xe605002d), /* PORT45CR */
2176 PORTCR(46, 0xe605002e), /* PORT46CR */
2177 PORTCR(47, 0xe605002f), /* PORT47CR */
2178 PORTCR(48, 0xe6050030), /* PORT48CR */
2179 PORTCR(49, 0xe6050031), /* PORT49CR */
2180 PORTCR(50, 0xe6050032), /* PORT50CR */
2181 PORTCR(51, 0xe6050033), /* PORT51CR */
2182 PORTCR(52, 0xe6050034), /* PORT52CR */
2183 PORTCR(53, 0xe6050035), /* PORT53CR */
2184 PORTCR(54, 0xe6050036), /* PORT54CR */
2185 PORTCR(55, 0xe6050037), /* PORT55CR */
2186 PORTCR(56, 0xe6050038), /* PORT56CR */
2187 PORTCR(57, 0xe6050039), /* PORT57CR */
2188 PORTCR(58, 0xe605003a), /* PORT58CR */
2189 PORTCR(59, 0xe605003b), /* PORT59CR */
2190 PORTCR(60, 0xe605003c), /* PORT60CR */
2191 PORTCR(61, 0xe605003d), /* PORT61CR */
2192 PORTCR(62, 0xe605003e), /* PORT62CR */
2193 PORTCR(63, 0xe605003f), /* PORT63CR */
2194 PORTCR(64, 0xe6050040), /* PORT64CR */
2195 PORTCR(65, 0xe6050041), /* PORT65CR */
2196 PORTCR(66, 0xe6050042), /* PORT66CR */
2197 PORTCR(67, 0xe6050043), /* PORT67CR */
2198 PORTCR(68, 0xe6050044), /* PORT68CR */
2199 PORTCR(69, 0xe6050045), /* PORT69CR */
2200 PORTCR(70, 0xe6050046), /* PORT70CR */
2201 PORTCR(71, 0xe6050047), /* PORT71CR */
2202 PORTCR(72, 0xe6050048), /* PORT72CR */
2203 PORTCR(73, 0xe6050049), /* PORT73CR */
2204 PORTCR(74, 0xe605004a), /* PORT74CR */
2205 PORTCR(75, 0xe605004b), /* PORT75CR */
2206 PORTCR(76, 0xe605004c), /* PORT76CR */
2207 PORTCR(77, 0xe605004d), /* PORT77CR */
2208 PORTCR(78, 0xe605004e), /* PORT78CR */
2209 PORTCR(79, 0xe605004f), /* PORT79CR */
2210 PORTCR(80, 0xe6050050), /* PORT80CR */
2211 PORTCR(81, 0xe6050051), /* PORT81CR */
2212 PORTCR(82, 0xe6050052), /* PORT82CR */
2213 PORTCR(83, 0xe6050053), /* PORT83CR */
2214
2215 PORTCR(84, 0xe6051054), /* PORT84CR */
2216 PORTCR(85, 0xe6051055), /* PORT85CR */
2217 PORTCR(86, 0xe6051056), /* PORT86CR */
2218 PORTCR(87, 0xe6051057), /* PORT87CR */
2219 PORTCR(88, 0xe6051058), /* PORT88CR */
2220 PORTCR(89, 0xe6051059), /* PORT89CR */
2221 PORTCR(90, 0xe605105a), /* PORT90CR */
2222 PORTCR(91, 0xe605105b), /* PORT91CR */
2223 PORTCR(92, 0xe605105c), /* PORT92CR */
2224 PORTCR(93, 0xe605105d), /* PORT93CR */
2225 PORTCR(94, 0xe605105e), /* PORT94CR */
2226 PORTCR(95, 0xe605105f), /* PORT95CR */
2227 PORTCR(96, 0xe6051060), /* PORT96CR */
2228 PORTCR(97, 0xe6051061), /* PORT97CR */
2229 PORTCR(98, 0xe6051062), /* PORT98CR */
2230 PORTCR(99, 0xe6051063), /* PORT99CR */
2231 PORTCR(100, 0xe6051064), /* PORT100CR */
2232 PORTCR(101, 0xe6051065), /* PORT101CR */
2233 PORTCR(102, 0xe6051066), /* PORT102CR */
2234 PORTCR(103, 0xe6051067), /* PORT103CR */
2235 PORTCR(104, 0xe6051068), /* PORT104CR */
2236 PORTCR(105, 0xe6051069), /* PORT105CR */
2237 PORTCR(106, 0xe605106a), /* PORT106CR */
2238 PORTCR(107, 0xe605106b), /* PORT107CR */
2239 PORTCR(108, 0xe605106c), /* PORT108CR */
2240 PORTCR(109, 0xe605106d), /* PORT109CR */
2241 PORTCR(110, 0xe605106e), /* PORT110CR */
2242 PORTCR(111, 0xe605106f), /* PORT111CR */
2243 PORTCR(112, 0xe6051070), /* PORT112CR */
2244 PORTCR(113, 0xe6051071), /* PORT113CR */
2245 PORTCR(114, 0xe6051072), /* PORT114CR */
2246
2247 PORTCR(115, 0xe6052073), /* PORT115CR */
2248 PORTCR(116, 0xe6052074), /* PORT116CR */
2249 PORTCR(117, 0xe6052075), /* PORT117CR */
2250 PORTCR(118, 0xe6052076), /* PORT118CR */
2251 PORTCR(119, 0xe6052077), /* PORT119CR */
2252 PORTCR(120, 0xe6052078), /* PORT120CR */
2253 PORTCR(121, 0xe6052079), /* PORT121CR */
2254 PORTCR(122, 0xe605207a), /* PORT122CR */
2255 PORTCR(123, 0xe605207b), /* PORT123CR */
2256 PORTCR(124, 0xe605207c), /* PORT124CR */
2257 PORTCR(125, 0xe605207d), /* PORT125CR */
2258 PORTCR(126, 0xe605207e), /* PORT126CR */
2259 PORTCR(127, 0xe605207f), /* PORT127CR */
2260 PORTCR(128, 0xe6052080), /* PORT128CR */
2261 PORTCR(129, 0xe6052081), /* PORT129CR */
2262 PORTCR(130, 0xe6052082), /* PORT130CR */
2263 PORTCR(131, 0xe6052083), /* PORT131CR */
2264 PORTCR(132, 0xe6052084), /* PORT132CR */
2265 PORTCR(133, 0xe6052085), /* PORT133CR */
2266 PORTCR(134, 0xe6052086), /* PORT134CR */
2267 PORTCR(135, 0xe6052087), /* PORT135CR */
2268 PORTCR(136, 0xe6052088), /* PORT136CR */
2269 PORTCR(137, 0xe6052089), /* PORT137CR */
2270 PORTCR(138, 0xe605208a), /* PORT138CR */
2271 PORTCR(139, 0xe605208b), /* PORT139CR */
2272 PORTCR(140, 0xe605208c), /* PORT140CR */
2273 PORTCR(141, 0xe605208d), /* PORT141CR */
2274 PORTCR(142, 0xe605208e), /* PORT142CR */
2275 PORTCR(143, 0xe605208f), /* PORT143CR */
2276 PORTCR(144, 0xe6052090), /* PORT144CR */
2277 PORTCR(145, 0xe6052091), /* PORT145CR */
2278 PORTCR(146, 0xe6052092), /* PORT146CR */
2279 PORTCR(147, 0xe6052093), /* PORT147CR */
2280 PORTCR(148, 0xe6052094), /* PORT148CR */
2281 PORTCR(149, 0xe6052095), /* PORT149CR */
2282 PORTCR(150, 0xe6052096), /* PORT150CR */
2283 PORTCR(151, 0xe6052097), /* PORT151CR */
2284 PORTCR(152, 0xe6052098), /* PORT152CR */
2285 PORTCR(153, 0xe6052099), /* PORT153CR */
2286 PORTCR(154, 0xe605209a), /* PORT154CR */
2287 PORTCR(155, 0xe605209b), /* PORT155CR */
2288 PORTCR(156, 0xe605209c), /* PORT156CR */
2289 PORTCR(157, 0xe605209d), /* PORT157CR */
2290 PORTCR(158, 0xe605209e), /* PORT158CR */
2291 PORTCR(159, 0xe605209f), /* PORT159CR */
2292 PORTCR(160, 0xe60520a0), /* PORT160CR */
2293 PORTCR(161, 0xe60520a1), /* PORT161CR */
2294 PORTCR(162, 0xe60520a2), /* PORT162CR */
2295 PORTCR(163, 0xe60520a3), /* PORT163CR */
2296 PORTCR(164, 0xe60520a4), /* PORT164CR */
2297 PORTCR(165, 0xe60520a5), /* PORT165CR */
2298 PORTCR(166, 0xe60520a6), /* PORT166CR */
2299 PORTCR(167, 0xe60520a7), /* PORT167CR */
2300 PORTCR(168, 0xe60520a8), /* PORT168CR */
2301 PORTCR(169, 0xe60520a9), /* PORT169CR */
2302 PORTCR(170, 0xe60520aa), /* PORT170CR */
2303 PORTCR(171, 0xe60520ab), /* PORT171CR */
2304 PORTCR(172, 0xe60520ac), /* PORT172CR */
2305 PORTCR(173, 0xe60520ad), /* PORT173CR */
2306 PORTCR(174, 0xe60520ae), /* PORT174CR */
2307 PORTCR(175, 0xe60520af), /* PORT175CR */
2308 PORTCR(176, 0xe60520b0), /* PORT176CR */
2309 PORTCR(177, 0xe60520b1), /* PORT177CR */
2310 PORTCR(178, 0xe60520b2), /* PORT178CR */
2311 PORTCR(179, 0xe60520b3), /* PORT179CR */
2312 PORTCR(180, 0xe60520b4), /* PORT180CR */
2313 PORTCR(181, 0xe60520b5), /* PORT181CR */
2314 PORTCR(182, 0xe60520b6), /* PORT182CR */
2315 PORTCR(183, 0xe60520b7), /* PORT183CR */
2316 PORTCR(184, 0xe60520b8), /* PORT184CR */
2317 PORTCR(185, 0xe60520b9), /* PORT185CR */
2318 PORTCR(186, 0xe60520ba), /* PORT186CR */
2319 PORTCR(187, 0xe60520bb), /* PORT187CR */
2320 PORTCR(188, 0xe60520bc), /* PORT188CR */
2321 PORTCR(189, 0xe60520bd), /* PORT189CR */
2322 PORTCR(190, 0xe60520be), /* PORT190CR */
2323 PORTCR(191, 0xe60520bf), /* PORT191CR */
2324 PORTCR(192, 0xe60520c0), /* PORT192CR */
2325 PORTCR(193, 0xe60520c1), /* PORT193CR */
2326 PORTCR(194, 0xe60520c2), /* PORT194CR */
2327 PORTCR(195, 0xe60520c3), /* PORT195CR */
2328 PORTCR(196, 0xe60520c4), /* PORT196CR */
2329 PORTCR(197, 0xe60520c5), /* PORT197CR */
2330 PORTCR(198, 0xe60520c6), /* PORT198CR */
2331 PORTCR(199, 0xe60520c7), /* PORT199CR */
2332 PORTCR(200, 0xe60520c8), /* PORT200CR */
2333 PORTCR(201, 0xe60520c9), /* PORT201CR */
2334 PORTCR(202, 0xe60520ca), /* PORT202CR */
2335 PORTCR(203, 0xe60520cb), /* PORT203CR */
2336 PORTCR(204, 0xe60520cc), /* PORT204CR */
2337 PORTCR(205, 0xe60520cd), /* PORT205CR */
2338 PORTCR(206, 0xe60520ce), /* PORT206CR */
2339 PORTCR(207, 0xe60520cf), /* PORT207CR */
2340 PORTCR(208, 0xe60520d0), /* PORT208CR */
2341 PORTCR(209, 0xe60520d1), /* PORT209CR */
2342
2343 PORTCR(210, 0xe60530d2), /* PORT210CR */
2344 PORTCR(211, 0xe60530d3), /* PORT211CR */
2345
2346 { PINMUX_CFG_REG("MSEL1CR", 0xe605800c, 32, 1) {
2347 MSEL1CR_31_0, MSEL1CR_31_1,
2348 MSEL1CR_30_0, MSEL1CR_30_1,
2349 MSEL1CR_29_0, MSEL1CR_29_1,
2350 MSEL1CR_28_0, MSEL1CR_28_1,
2351 MSEL1CR_27_0, MSEL1CR_27_1,
2352 MSEL1CR_26_0, MSEL1CR_26_1,
2353 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2354 0, 0, 0, 0, 0, 0, 0, 0,
2355 MSEL1CR_16_0, MSEL1CR_16_1,
2356 MSEL1CR_15_0, MSEL1CR_15_1,
2357 MSEL1CR_14_0, MSEL1CR_14_1,
2358 MSEL1CR_13_0, MSEL1CR_13_1,
2359 MSEL1CR_12_0, MSEL1CR_12_1,
2360 0, 0, 0, 0,
2361 MSEL1CR_9_0, MSEL1CR_9_1,
2362 0, 0,
2363 MSEL1CR_7_0, MSEL1CR_7_1,
2364 MSEL1CR_6_0, MSEL1CR_6_1,
2365 MSEL1CR_5_0, MSEL1CR_5_1,
2366 MSEL1CR_4_0, MSEL1CR_4_1,
2367 MSEL1CR_3_0, MSEL1CR_3_1,
2368 MSEL1CR_2_0, MSEL1CR_2_1,
2369 0, 0,
2370 MSEL1CR_0_0, MSEL1CR_0_1,
2371 }
2372 },
2373 { PINMUX_CFG_REG("MSEL3CR", 0xE6058020, 32, 1) {
2374 0, 0, 0, 0, 0, 0, 0, 0,
2375 0, 0, 0, 0, 0, 0, 0, 0,
2376 0, 0, 0, 0, 0, 0, 0, 0,
2377 0, 0, 0, 0, 0, 0, 0, 0,
2378 MSEL3CR_15_0, MSEL3CR_15_1,
2379 0, 0, 0, 0, 0, 0, 0, 0,
2380 0, 0, 0, 0, 0, 0, 0, 0,
2381 MSEL3CR_6_0, MSEL3CR_6_1,
2382 0, 0, 0, 0, 0, 0, 0, 0,
2383 0, 0, 0, 0,
2384 }
2385 },
2386 { PINMUX_CFG_REG("MSEL4CR", 0xE6058024, 32, 1) {
2387 0, 0, 0, 0, 0, 0, 0, 0,
2388 0, 0, 0, 0, 0, 0, 0, 0,
2389 0, 0, 0, 0, 0, 0, 0, 0,
2390 MSEL4CR_19_0, MSEL4CR_19_1,
2391 MSEL4CR_18_0, MSEL4CR_18_1,
2392 0, 0, 0, 0,
2393 MSEL4CR_15_0, MSEL4CR_15_1,
2394 0, 0, 0, 0, 0, 0, 0, 0,
2395 MSEL4CR_10_0, MSEL4CR_10_1,
2396 0, 0, 0, 0, 0, 0,
2397 MSEL4CR_6_0, MSEL4CR_6_1,
2398 0, 0,
2399 MSEL4CR_4_0, MSEL4CR_4_1,
2400 0, 0, 0, 0,
2401 MSEL4CR_1_0, MSEL4CR_1_1,
2402 0, 0,
2403 }
2404 },
2405 { PINMUX_CFG_REG("MSEL5CR", 0xE6058028, 32, 1) {
2406 MSEL5CR_31_0, MSEL5CR_31_1,
2407 MSEL5CR_30_0, MSEL5CR_30_1,
2408 MSEL5CR_29_0, MSEL5CR_29_1,
2409 0, 0,
2410 MSEL5CR_27_0, MSEL5CR_27_1,
2411 0, 0,
2412 MSEL5CR_25_0, MSEL5CR_25_1,
2413 0, 0,
2414 MSEL5CR_23_0, MSEL5CR_23_1,
2415 0, 0,
2416 MSEL5CR_21_0, MSEL5CR_21_1,
2417 0, 0,
2418 MSEL5CR_19_0, MSEL5CR_19_1,
2419 0, 0,
2420 MSEL5CR_17_0, MSEL5CR_17_1,
2421 0, 0,
2422 MSEL5CR_15_0, MSEL5CR_15_1,
2423 MSEL5CR_14_0, MSEL5CR_14_1,
2424 MSEL5CR_13_0, MSEL5CR_13_1,
2425 MSEL5CR_12_0, MSEL5CR_12_1,
2426 MSEL5CR_11_0, MSEL5CR_11_1,
2427 MSEL5CR_10_0, MSEL5CR_10_1,
2428 0, 0,
2429 MSEL5CR_8_0, MSEL5CR_8_1,
2430 MSEL5CR_7_0, MSEL5CR_7_1,
2431 MSEL5CR_6_0, MSEL5CR_6_1,
2432 MSEL5CR_5_0, MSEL5CR_5_1,
2433 MSEL5CR_4_0, MSEL5CR_4_1,
2434 MSEL5CR_3_0, MSEL5CR_3_1,
2435 MSEL5CR_2_0, MSEL5CR_2_1,
2436 0, 0,
2437 MSEL5CR_0_0, MSEL5CR_0_1,
2438 }
2439 },
2440 { },
2441};
2442
2443static struct pinmux_data_reg pinmux_data_regs[] = {
2444 { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054800, 32) {
2445 PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
2446 PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
2447 PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
2448 PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
2449 PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
2450 PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
2451 PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
2452 PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA }
2453 },
2454 { PINMUX_DATA_REG("PORTL063_032DR", 0xe6054804, 32) {
2455 PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
2456 PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
2457 PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
2458 PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA,
2459 PORT47_DATA, PORT46_DATA, PORT45_DATA, PORT44_DATA,
2460 PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
2461 PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
2462 PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA }
2463 },
2464 { PINMUX_DATA_REG("PORTL095_064DR", 0xe6054808, 32) {
2465 0, 0, 0, 0,
2466 0, 0, 0, 0,
2467 0, 0, 0, 0,
2468 PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
2469 PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
2470 PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
2471 PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
2472 PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA }
2473 },
2474 { PINMUX_DATA_REG("PORTD095_064DR", 0xe6055808, 32) {
2475 PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
2476 PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
2477 PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
2478 0, 0, 0, 0,
2479 0, 0, 0, 0,
2480 0, 0, 0, 0,
2481 0, 0, 0, 0,
2482 0, 0, 0, 0 }
2483 },
2484 { PINMUX_DATA_REG("PORTD127_096DR", 0xe605580c, 32) {
2485 0, 0, 0, 0,
2486 0, 0, 0, 0,
2487 0, 0, 0, 0,
2488 0, PORT114_DATA, PORT113_DATA, PORT112_DATA,
2489 PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
2490 PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
2491 PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
2492 PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA }
2493 },
2494 { PINMUX_DATA_REG("PORTR127_096DR", 0xe605680C, 32) {
2495 PORT127_DATA, PORT126_DATA, PORT125_DATA, PORT124_DATA,
2496 PORT123_DATA, PORT122_DATA, PORT121_DATA, PORT120_DATA,
2497 PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA,
2498 PORT115_DATA, 0, 0, 0,
2499 0, 0, 0, 0,
2500 0, 0, 0, 0,
2501 0, 0, 0, 0,
2502 0, 0, 0, 0 }
2503 },
2504 { PINMUX_DATA_REG("PORTR159_128DR", 0xe6056810, 32) {
2505 PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
2506 PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
2507 PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
2508 PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA,
2509 PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
2510 PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
2511 PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
2512 PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA }
2513 },
2514 { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056814, 32) {
2515 PORT191_DATA, PORT190_DATA, PORT189_DATA, PORT188_DATA,
2516 PORT187_DATA, PORT186_DATA, PORT185_DATA, PORT184_DATA,
2517 PORT183_DATA, PORT182_DATA, PORT181_DATA, PORT180_DATA,
2518 PORT179_DATA, PORT178_DATA, PORT177_DATA, PORT176_DATA,
2519 PORT175_DATA, PORT174_DATA, PORT173_DATA, PORT172_DATA,
2520 PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA,
2521 PORT167_DATA, PORT166_DATA, PORT165_DATA, PORT164_DATA,
2522 PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA }
2523 },
2524 { PINMUX_DATA_REG("PORTR223_192DR", 0xe6056818, 32) {
2525 0, 0, 0, 0,
2526 0, 0, 0, 0,
2527 0, 0, 0, 0,
2528 0, 0, PORT209_DATA, PORT208_DATA,
2529 PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA,
2530 PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA,
2531 PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA,
2532 PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA }
2533 },
2534 { PINMUX_DATA_REG("PORTU223_192DR", 0xe6057818, 32) {
2535 0, 0, 0, 0,
2536 0, 0, 0, 0,
2537 0, 0, 0, 0,
2538 PORT211_DATA, PORT210_DATA, 0, 0,
2539 0, 0, 0, 0,
2540 0, 0, 0, 0,
2541 0, 0, 0, 0,
2542 0, 0, 0, 0 }
2543 },
2544 { },
2545};
2546
2547static struct pinmux_irq pinmux_irqs[] = {
2548 PINMUX_IRQ(evt2irq(0x0200), PORT2_FN0, PORT13_FN0), /* IRQ0A */
2549 PINMUX_IRQ(evt2irq(0x0220), PORT20_FN0), /* IRQ1A */
2550 PINMUX_IRQ(evt2irq(0x0240), PORT11_FN0, PORT12_FN0), /* IRQ2A */
2551 PINMUX_IRQ(evt2irq(0x0260), PORT10_FN0, PORT14_FN0), /* IRQ3A */
2552 PINMUX_IRQ(evt2irq(0x0280), PORT15_FN0, PORT172_FN0), /* IRQ4A */
2553 PINMUX_IRQ(evt2irq(0x02A0), PORT0_FN0, PORT1_FN0), /* IRQ5A */
2554 PINMUX_IRQ(evt2irq(0x02C0), PORT121_FN0, PORT173_FN0), /* IRQ6A */
2555 PINMUX_IRQ(evt2irq(0x02E0), PORT120_FN0, PORT209_FN0), /* IRQ7A */
2556 PINMUX_IRQ(evt2irq(0x0300), PORT119_FN0), /* IRQ8A */
2557 PINMUX_IRQ(evt2irq(0x0320), PORT118_FN0, PORT210_FN0), /* IRQ9A */
2558 PINMUX_IRQ(evt2irq(0x0340), PORT19_FN0), /* IRQ10A */
2559 PINMUX_IRQ(evt2irq(0x0360), PORT104_FN0), /* IRQ11A */
2560 PINMUX_IRQ(evt2irq(0x0380), PORT42_FN0, PORT97_FN0), /* IRQ12A */
2561 PINMUX_IRQ(evt2irq(0x03A0), PORT64_FN0, PORT98_FN0), /* IRQ13A */
2562 PINMUX_IRQ(evt2irq(0x03C0), PORT63_FN0, PORT99_FN0), /* IRQ14A */
2563 PINMUX_IRQ(evt2irq(0x03E0), PORT62_FN0, PORT100_FN0), /* IRQ15A */
2564 PINMUX_IRQ(evt2irq(0x3200), PORT68_FN0, PORT211_FN0), /* IRQ16A */
2565 PINMUX_IRQ(evt2irq(0x3220), PORT69_FN0), /* IRQ17A */
2566 PINMUX_IRQ(evt2irq(0x3240), PORT70_FN0), /* IRQ18A */
2567 PINMUX_IRQ(evt2irq(0x3260), PORT71_FN0), /* IRQ19A */
2568 PINMUX_IRQ(evt2irq(0x3280), PORT67_FN0), /* IRQ20A */
2569 PINMUX_IRQ(evt2irq(0x32A0), PORT202_FN0), /* IRQ21A */
2570 PINMUX_IRQ(evt2irq(0x32C0), PORT95_FN0), /* IRQ22A */
2571 PINMUX_IRQ(evt2irq(0x32E0), PORT96_FN0), /* IRQ23A */
2572 PINMUX_IRQ(evt2irq(0x3300), PORT180_FN0), /* IRQ24A */
2573 PINMUX_IRQ(evt2irq(0x3320), PORT38_FN0), /* IRQ25A */
2574 PINMUX_IRQ(evt2irq(0x3340), PORT58_FN0, PORT81_FN0), /* IRQ26A */
2575 PINMUX_IRQ(evt2irq(0x3360), PORT57_FN0, PORT168_FN0), /* IRQ27A */
2576 PINMUX_IRQ(evt2irq(0x3380), PORT56_FN0, PORT169_FN0), /* IRQ28A */
2577 PINMUX_IRQ(evt2irq(0x33A0), PORT50_FN0, PORT170_FN0), /* IRQ29A */
2578 PINMUX_IRQ(evt2irq(0x33C0), PORT49_FN0, PORT171_FN0), /* IRQ30A */
2579 PINMUX_IRQ(evt2irq(0x33E0), PORT41_FN0, PORT167_FN0), /* IRQ31A */
2580};
2581
2582struct sh_pfc_soc_info r8a7740_pinmux_info = {
2583 .name = "r8a7740_pfc",
2584 .reserved_id = PINMUX_RESERVED,
2585 .data = { PINMUX_DATA_BEGIN,
2586 PINMUX_DATA_END },
2587 .input = { PINMUX_INPUT_BEGIN,
2588 PINMUX_INPUT_END },
2589 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN,
2590 PINMUX_INPUT_PULLUP_END },
2591 .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN,
2592 PINMUX_INPUT_PULLDOWN_END },
2593 .output = { PINMUX_OUTPUT_BEGIN,
2594 PINMUX_OUTPUT_END },
2595 .mark = { PINMUX_MARK_BEGIN,
2596 PINMUX_MARK_END },
2597 .function = { PINMUX_FUNCTION_BEGIN,
2598 PINMUX_FUNCTION_END },
2599
2600 .first_gpio = GPIO_PORT0,
2601 .last_gpio = GPIO_FN_TRACEAUD_FROM_MEMC,
2602
2603 .gpios = pinmux_gpios,
2604 .cfg_regs = pinmux_config_regs,
2605 .data_regs = pinmux_data_regs,
2606
2607 .gpio_data = pinmux_data,
2608 .gpio_data_size = ARRAY_SIZE(pinmux_data),
2609
2610 .gpio_irq = pinmux_irqs,
2611 .gpio_irq_size = ARRAY_SIZE(pinmux_irqs),
2612};
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
new file mode 100644
index 000000000000..13feaa0c0eb7
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
@@ -0,0 +1,2624 @@
1/*
2 * r8a7779 processor support - PFC hardware block
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Copyright (C) 2011 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <linux/kernel.h>
22#include <mach/r8a7779.h>
23
24#include "sh_pfc.h"
25
26#define CPU_32_PORT(fn, pfx, sfx) \
27 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
28 PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \
29 PORT_1(fn, pfx##31, sfx)
30
31#define CPU_32_PORT6(fn, pfx, sfx) \
32 PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \
33 PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \
34 PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \
35 PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \
36 PORT_1(fn, pfx##8, sfx)
37
38#define CPU_ALL_PORT(fn, pfx, sfx) \
39 CPU_32_PORT(fn, pfx##_0_, sfx), \
40 CPU_32_PORT(fn, pfx##_1_, sfx), \
41 CPU_32_PORT(fn, pfx##_2_, sfx), \
42 CPU_32_PORT(fn, pfx##_3_, sfx), \
43 CPU_32_PORT(fn, pfx##_4_, sfx), \
44 CPU_32_PORT(fn, pfx##_5_, sfx), \
45 CPU_32_PORT6(fn, pfx##_6_, sfx)
46
47#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
48#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \
49 GP##pfx##_IN, GP##pfx##_OUT)
50
51#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT
52#define _GP_INDT(pfx, sfx) GP##pfx##_DATA
53
54#define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str)
55#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused)
56#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused)
57
58
59#define PORT_10_REV(fn, pfx, sfx) \
60 PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \
61 PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \
62 PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \
63 PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \
64 PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
65
66#define CPU_32_PORT_REV(fn, pfx, sfx) \
67 PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \
68 PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \
69 PORT_10_REV(fn, pfx, sfx)
70
71#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused)
72#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused)
73
74#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
75#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
76 FN_##ipsr, FN_##fn)
77
78enum {
79 PINMUX_RESERVED = 0,
80
81 PINMUX_DATA_BEGIN,
82 GP_ALL(DATA), /* GP_0_0_DATA -> GP_6_8_DATA */
83 PINMUX_DATA_END,
84
85 PINMUX_INPUT_BEGIN,
86 GP_ALL(IN), /* GP_0_0_IN -> GP_6_8_IN */
87 PINMUX_INPUT_END,
88
89 PINMUX_OUTPUT_BEGIN,
90 GP_ALL(OUT), /* GP_0_0_OUT -> GP_6_8_OUT */
91 PINMUX_OUTPUT_END,
92
93 PINMUX_FUNCTION_BEGIN,
94 GP_ALL(FN), /* GP_0_0_FN -> GP_6_8_FN */
95
96 /* GPSR0 */
97 FN_AVS1, FN_AVS2, FN_IP0_7_6, FN_A17,
98 FN_A18, FN_A19, FN_IP0_9_8, FN_IP0_11_10,
99 FN_IP0_13_12, FN_IP0_15_14, FN_IP0_18_16, FN_IP0_22_19,
100 FN_IP0_24_23, FN_IP0_25, FN_IP0_27_26, FN_IP1_1_0,
101 FN_IP1_3_2, FN_IP1_6_4, FN_IP1_10_7, FN_IP1_14_11,
102 FN_IP1_18_15, FN_IP0_5_3, FN_IP0_30_28, FN_IP2_18_16,
103 FN_IP2_21_19, FN_IP2_30_28, FN_IP3_2_0, FN_IP3_11_9,
104 FN_IP3_14_12, FN_IP3_22_21, FN_IP3_26_24, FN_IP3_31_29,
105
106 /* GPSR1 */
107 FN_IP4_1_0, FN_IP4_4_2, FN_IP4_7_5, FN_IP4_10_8,
108 FN_IP4_11, FN_IP4_12, FN_IP4_13, FN_IP4_14,
109 FN_IP4_15, FN_IP4_16, FN_IP4_19_17, FN_IP4_22_20,
110 FN_IP4_23, FN_IP4_24, FN_IP4_25, FN_IP4_26,
111 FN_IP4_27, FN_IP4_28, FN_IP4_31_29, FN_IP5_2_0,
112 FN_IP5_3, FN_IP5_4, FN_IP5_5, FN_IP5_6,
113 FN_IP5_7, FN_IP5_8, FN_IP5_10_9, FN_IP5_12_11,
114 FN_IP5_14_13, FN_IP5_16_15, FN_IP5_20_17, FN_IP5_23_21,
115
116 /* GPSR2 */
117 FN_IP5_27_24, FN_IP8_20, FN_IP8_22_21, FN_IP8_24_23,
118 FN_IP8_27_25, FN_IP8_30_28, FN_IP9_1_0, FN_IP9_3_2,
119 FN_IP9_4, FN_IP9_5, FN_IP9_6, FN_IP9_7,
120 FN_IP9_9_8, FN_IP9_11_10, FN_IP9_13_12, FN_IP9_15_14,
121 FN_IP9_18_16, FN_IP9_21_19, FN_IP9_23_22, FN_IP9_25_24,
122 FN_IP9_27_26, FN_IP9_29_28, FN_IP10_2_0, FN_IP10_5_3,
123 FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_17_15,
124 FN_IP10_20_18, FN_IP10_23_21, FN_IP10_25_24, FN_IP10_28_26,
125
126 /* GPSR3 */
127 FN_IP10_31_29, FN_IP11_2_0, FN_IP11_5_3, FN_IP11_8_6,
128 FN_IP11_11_9, FN_IP11_14_12, FN_IP11_17_15, FN_IP11_20_18,
129 FN_IP11_23_21, FN_IP11_26_24, FN_IP11_29_27, FN_IP12_2_0,
130 FN_IP12_5_3, FN_IP12_8_6, FN_IP12_11_9, FN_IP12_14_12,
131 FN_IP12_17_15, FN_IP7_16_15, FN_IP7_18_17, FN_IP7_28_27,
132 FN_IP7_30_29, FN_IP7_20_19, FN_IP7_22_21, FN_IP7_24_23,
133 FN_IP7_26_25, FN_IP1_20_19, FN_IP1_22_21, FN_IP1_24_23,
134 FN_IP5_28, FN_IP5_30_29, FN_IP6_1_0, FN_IP6_3_2,
135
136 /* GPSR4 */
137 FN_IP6_5_4, FN_IP6_7_6, FN_IP6_8, FN_IP6_11_9,
138 FN_IP6_14_12, FN_IP6_17_15, FN_IP6_19_18, FN_IP6_22_20,
139 FN_IP6_24_23, FN_IP6_26_25, FN_IP6_30_29, FN_IP7_1_0,
140 FN_IP7_3_2, FN_IP7_6_4, FN_IP7_9_7, FN_IP7_12_10,
141 FN_IP7_14_13, FN_IP2_7_4, FN_IP2_11_8, FN_IP2_15_12,
142 FN_IP1_28_25, FN_IP2_3_0, FN_IP8_3_0, FN_IP8_7_4,
143 FN_IP8_11_8, FN_IP8_15_12, FN_USB_PENC0, FN_USB_PENC1,
144 FN_IP0_2_0, FN_IP8_17_16, FN_IP8_18, FN_IP8_19,
145
146 /* GPSR5 */
147 FN_A1, FN_A2, FN_A3, FN_A4,
148 FN_A5, FN_A6, FN_A7, FN_A8,
149 FN_A9, FN_A10, FN_A11, FN_A12,
150 FN_A13, FN_A14, FN_A15, FN_A16,
151 FN_RD, FN_WE0, FN_WE1, FN_EX_WAIT0,
152 FN_IP3_23, FN_IP3_27, FN_IP3_28, FN_IP2_22,
153 FN_IP2_23, FN_IP2_24, FN_IP2_25, FN_IP2_26,
154 FN_IP2_27, FN_IP3_3, FN_IP3_4, FN_IP3_5,
155
156 /* GPSR6 */
157 FN_IP3_6, FN_IP3_7, FN_IP3_8, FN_IP3_15,
158 FN_IP3_16, FN_IP3_17, FN_IP3_18, FN_IP3_19,
159 FN_IP3_20,
160
161 /* IPSR0 */
162 FN_RD_WR, FN_FWE, FN_ATAG0, FN_VI1_R7,
163 FN_HRTS1, FN_RX4_C,
164 FN_CS1_A26, FN_HSPI_TX2, FN_SDSELF_B,
165 FN_CS0, FN_HSPI_CS2_B,
166 FN_CLKOUT, FN_TX3C_IRDA_TX_C, FN_PWM0_B,
167 FN_A25, FN_SD1_WP, FN_MMC0_D5, FN_FD5,
168 FN_HSPI_RX2, FN_VI1_R3, FN_TX5_B, FN_SSI_SDATA7_B,
169 FN_CTS0_B,
170 FN_A24, FN_SD1_CD, FN_MMC0_D4, FN_FD4,
171 FN_HSPI_CS2, FN_VI1_R2, FN_SSI_WS78_B,
172 FN_A23, FN_FCLE, FN_HSPI_CLK2, FN_VI1_R1,
173 FN_A22, FN_RX5_D, FN_HSPI_RX2_B, FN_VI1_R0,
174 FN_A21, FN_SCK5_D, FN_HSPI_CLK2_B,
175 FN_A20, FN_TX5_D, FN_HSPI_TX2_B,
176 FN_A0, FN_SD1_DAT3, FN_MMC0_D3, FN_FD3,
177 FN_BS, FN_SD1_DAT2, FN_MMC0_D2, FN_FD2,
178 FN_ATADIR0, FN_SDSELF, FN_HCTS1, FN_TX4_C,
179 FN_USB_PENC2, FN_SCK0, FN_PWM1, FN_PWMFSW0,
180 FN_SCIF_CLK, FN_TCLK0_C,
181
182 /* IPSR1 */
183 FN_EX_CS0, FN_RX3_C_IRDA_RX_C, FN_MMC0_D6,
184 FN_FD6, FN_EX_CS1, FN_MMC0_D7, FN_FD7,
185 FN_EX_CS2, FN_SD1_CLK, FN_MMC0_CLK, FN_FALE,
186 FN_ATACS00, FN_EX_CS3, FN_SD1_CMD, FN_MMC0_CMD,
187 FN_FRE, FN_ATACS10, FN_VI1_R4, FN_RX5_B,
188 FN_HSCK1, FN_SSI_SDATA8_B, FN_RTS0_B_TANS_B, FN_SSI_SDATA9,
189 FN_EX_CS4, FN_SD1_DAT0, FN_MMC0_D0, FN_FD0,
190 FN_ATARD0, FN_VI1_R5, FN_SCK5_B, FN_HTX1,
191 FN_TX2_E, FN_TX0_B, FN_SSI_SCK9, FN_EX_CS5,
192 FN_SD1_DAT1, FN_MMC0_D1, FN_FD1, FN_ATAWR0,
193 FN_VI1_R6, FN_HRX1, FN_RX2_E, FN_RX0_B,
194 FN_SSI_WS9, FN_MLB_CLK, FN_PWM2, FN_SCK4,
195 FN_MLB_SIG, FN_PWM3, FN_TX4, FN_MLB_DAT,
196 FN_PWM4, FN_RX4, FN_HTX0, FN_TX1,
197 FN_SDATA, FN_CTS0_C, FN_SUB_TCK, FN_CC5_STATE2,
198 FN_CC5_STATE10, FN_CC5_STATE18, FN_CC5_STATE26, FN_CC5_STATE34,
199
200 /* IPSR2 */
201 FN_HRX0, FN_RX1, FN_SCKZ, FN_RTS0_C_TANS_C,
202 FN_SUB_TDI, FN_CC5_STATE3, FN_CC5_STATE11, FN_CC5_STATE19,
203 FN_CC5_STATE27, FN_CC5_STATE35, FN_HSCK0, FN_SCK1,
204 FN_MTS, FN_PWM5, FN_SCK0_C, FN_SSI_SDATA9_B,
205 FN_SUB_TDO, FN_CC5_STATE0, FN_CC5_STATE8, FN_CC5_STATE16,
206 FN_CC5_STATE24, FN_CC5_STATE32, FN_HCTS0, FN_CTS1,
207 FN_STM, FN_PWM0_D, FN_RX0_C, FN_SCIF_CLK_C,
208 FN_SUB_TRST, FN_TCLK1_B, FN_CC5_OSCOUT, FN_HRTS0,
209 FN_RTS1_TANS, FN_MDATA, FN_TX0_C, FN_SUB_TMS,
210 FN_CC5_STATE1, FN_CC5_STATE9, FN_CC5_STATE17, FN_CC5_STATE25,
211 FN_CC5_STATE33, FN_DU0_DR0, FN_LCDOUT0, FN_DREQ0,
212 FN_GPS_CLK_B, FN_AUDATA0, FN_TX5_C, FN_DU0_DR1,
213 FN_LCDOUT1, FN_DACK0, FN_DRACK0, FN_GPS_SIGN_B,
214 FN_AUDATA1, FN_RX5_C, FN_DU0_DR2, FN_LCDOUT2,
215 FN_DU0_DR3, FN_LCDOUT3, FN_DU0_DR4, FN_LCDOUT4,
216 FN_DU0_DR5, FN_LCDOUT5, FN_DU0_DR6, FN_LCDOUT6,
217 FN_DU0_DR7, FN_LCDOUT7, FN_DU0_DG0, FN_LCDOUT8,
218 FN_DREQ1, FN_SCL2, FN_AUDATA2,
219
220 /* IPSR3 */
221 FN_DU0_DG1, FN_LCDOUT9, FN_DACK1, FN_SDA2,
222 FN_AUDATA3, FN_DU0_DG2, FN_LCDOUT10, FN_DU0_DG3,
223 FN_LCDOUT11, FN_DU0_DG4, FN_LCDOUT12, FN_DU0_DG5,
224 FN_LCDOUT13, FN_DU0_DG6, FN_LCDOUT14, FN_DU0_DG7,
225 FN_LCDOUT15, FN_DU0_DB0, FN_LCDOUT16, FN_EX_WAIT1,
226 FN_SCL1, FN_TCLK1, FN_AUDATA4, FN_DU0_DB1,
227 FN_LCDOUT17, FN_EX_WAIT2, FN_SDA1, FN_GPS_MAG_B,
228 FN_AUDATA5, FN_SCK5_C, FN_DU0_DB2, FN_LCDOUT18,
229 FN_DU0_DB3, FN_LCDOUT19, FN_DU0_DB4, FN_LCDOUT20,
230 FN_DU0_DB5, FN_LCDOUT21, FN_DU0_DB6, FN_LCDOUT22,
231 FN_DU0_DB7, FN_LCDOUT23, FN_DU0_DOTCLKIN, FN_QSTVA_QVS,
232 FN_TX3_D_IRDA_TX_D, FN_SCL3_B, FN_DU0_DOTCLKOUT0, FN_QCLK,
233 FN_DU0_DOTCLKOUT1, FN_QSTVB_QVE, FN_RX3_D_IRDA_RX_D, FN_SDA3_B,
234 FN_SDA2_C, FN_DACK0_B, FN_DRACK0_B, FN_DU0_EXHSYNC_DU0_HSYNC,
235 FN_QSTH_QHS, FN_DU0_EXVSYNC_DU0_VSYNC, FN_QSTB_QHE,
236 FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_QCPV_QDE, FN_CAN1_TX,
237 FN_TX2_C, FN_SCL2_C, FN_REMOCON,
238
239 /* IPSR4 */
240 FN_DU0_DISP, FN_QPOLA, FN_CAN_CLK_C, FN_SCK2_C,
241 FN_DU0_CDE, FN_QPOLB, FN_CAN1_RX, FN_RX2_C,
242 FN_DREQ0_B, FN_SSI_SCK78_B, FN_SCK0_B, FN_DU1_DR0,
243 FN_VI2_DATA0_VI2_B0, FN_PWM6, FN_SD3_CLK, FN_TX3_E_IRDA_TX_E,
244 FN_AUDCK, FN_PWMFSW0_B, FN_DU1_DR1, FN_VI2_DATA1_VI2_B1,
245 FN_PWM0, FN_SD3_CMD, FN_RX3_E_IRDA_RX_E, FN_AUDSYNC,
246 FN_CTS0_D, FN_DU1_DR2, FN_VI2_G0, FN_DU1_DR3,
247 FN_VI2_G1, FN_DU1_DR4, FN_VI2_G2, FN_DU1_DR5,
248 FN_VI2_G3, FN_DU1_DR6, FN_VI2_G4, FN_DU1_DR7,
249 FN_VI2_G5, FN_DU1_DG0, FN_VI2_DATA2_VI2_B2, FN_SCL1_B,
250 FN_SD3_DAT2, FN_SCK3_E, FN_AUDATA6, FN_TX0_D,
251 FN_DU1_DG1, FN_VI2_DATA3_VI2_B3, FN_SDA1_B, FN_SD3_DAT3,
252 FN_SCK5, FN_AUDATA7, FN_RX0_D, FN_DU1_DG2,
253 FN_VI2_G6, FN_DU1_DG3, FN_VI2_G7, FN_DU1_DG4,
254 FN_VI2_R0, FN_DU1_DG5, FN_VI2_R1, FN_DU1_DG6,
255 FN_VI2_R2, FN_DU1_DG7, FN_VI2_R3, FN_DU1_DB0,
256 FN_VI2_DATA4_VI2_B4, FN_SCL2_B, FN_SD3_DAT0, FN_TX5,
257 FN_SCK0_D,
258
259 /* IPSR5 */
260 FN_DU1_DB1, FN_VI2_DATA5_VI2_B5, FN_SDA2_B, FN_SD3_DAT1,
261 FN_RX5, FN_RTS0_D_TANS_D, FN_DU1_DB2, FN_VI2_R4,
262 FN_DU1_DB3, FN_VI2_R5, FN_DU1_DB4, FN_VI2_R6,
263 FN_DU1_DB5, FN_VI2_R7, FN_DU1_DB6, FN_SCL2_D,
264 FN_DU1_DB7, FN_SDA2_D, FN_DU1_DOTCLKIN, FN_VI2_CLKENB,
265 FN_HSPI_CS1, FN_SCL1_D, FN_DU1_DOTCLKOUT, FN_VI2_FIELD,
266 FN_SDA1_D, FN_DU1_EXHSYNC_DU1_HSYNC, FN_VI2_HSYNC,
267 FN_VI3_HSYNC, FN_DU1_EXVSYNC_DU1_VSYNC, FN_VI2_VSYNC, FN_VI3_VSYNC,
268 FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_VI2_CLK, FN_TX3_B_IRDA_TX_B,
269 FN_SD3_CD, FN_HSPI_TX1, FN_VI1_CLKENB, FN_VI3_CLKENB,
270 FN_AUDIO_CLKC, FN_TX2_D, FN_SPEEDIN, FN_GPS_SIGN_D,
271 FN_DU1_DISP, FN_VI2_DATA6_VI2_B6, FN_TCLK0, FN_QSTVA_B_QVS_B,
272 FN_HSPI_CLK1, FN_SCK2_D, FN_AUDIO_CLKOUT_B, FN_GPS_MAG_D,
273 FN_DU1_CDE, FN_VI2_DATA7_VI2_B7, FN_RX3_B_IRDA_RX_B,
274 FN_SD3_WP, FN_HSPI_RX1, FN_VI1_FIELD, FN_VI3_FIELD,
275 FN_AUDIO_CLKOUT, FN_RX2_D, FN_GPS_CLK_C, FN_GPS_CLK_D,
276 FN_AUDIO_CLKA, FN_CAN_TXCLK, FN_AUDIO_CLKB, FN_USB_OVC2,
277 FN_CAN_DEBUGOUT0, FN_MOUT0,
278
279 /* IPSR6 */
280 FN_SSI_SCK0129, FN_CAN_DEBUGOUT1, FN_MOUT1, FN_SSI_WS0129,
281 FN_CAN_DEBUGOUT2, FN_MOUT2, FN_SSI_SDATA0, FN_CAN_DEBUGOUT3,
282 FN_MOUT5, FN_SSI_SDATA1, FN_CAN_DEBUGOUT4, FN_MOUT6,
283 FN_SSI_SDATA2, FN_CAN_DEBUGOUT5, FN_SSI_SCK34, FN_CAN_DEBUGOUT6,
284 FN_CAN0_TX_B, FN_IERX, FN_SSI_SCK9_C, FN_SSI_WS34,
285 FN_CAN_DEBUGOUT7, FN_CAN0_RX_B, FN_IETX, FN_SSI_WS9_C,
286 FN_SSI_SDATA3, FN_PWM0_C, FN_CAN_DEBUGOUT8, FN_CAN_CLK_B,
287 FN_IECLK, FN_SCIF_CLK_B, FN_TCLK0_B, FN_SSI_SDATA4,
288 FN_CAN_DEBUGOUT9, FN_SSI_SDATA9_C, FN_SSI_SCK5, FN_ADICLK,
289 FN_CAN_DEBUGOUT10, FN_SCK3, FN_TCLK0_D, FN_SSI_WS5,
290 FN_ADICS_SAMP, FN_CAN_DEBUGOUT11, FN_TX3_IRDA_TX, FN_SSI_SDATA5,
291 FN_ADIDATA, FN_CAN_DEBUGOUT12, FN_RX3_IRDA_RX, FN_SSI_SCK6,
292 FN_ADICHS0, FN_CAN0_TX, FN_IERX_B,
293
294 /* IPSR7 */
295 FN_SSI_WS6, FN_ADICHS1, FN_CAN0_RX, FN_IETX_B,
296 FN_SSI_SDATA6, FN_ADICHS2, FN_CAN_CLK, FN_IECLK_B,
297 FN_SSI_SCK78, FN_CAN_DEBUGOUT13, FN_IRQ0_B, FN_SSI_SCK9_B,
298 FN_HSPI_CLK1_C, FN_SSI_WS78, FN_CAN_DEBUGOUT14, FN_IRQ1_B,
299 FN_SSI_WS9_B, FN_HSPI_CS1_C, FN_SSI_SDATA7, FN_CAN_DEBUGOUT15,
300 FN_IRQ2_B, FN_TCLK1_C, FN_HSPI_TX1_C, FN_SSI_SDATA8,
301 FN_VSP, FN_IRQ3_B, FN_HSPI_RX1_C, FN_SD0_CLK,
302 FN_ATACS01, FN_SCK1_B, FN_SD0_CMD, FN_ATACS11,
303 FN_TX1_B, FN_CC5_TDO, FN_SD0_DAT0, FN_ATADIR1,
304 FN_RX1_B, FN_CC5_TRST, FN_SD0_DAT1, FN_ATAG1,
305 FN_SCK2_B, FN_CC5_TMS, FN_SD0_DAT2, FN_ATARD1,
306 FN_TX2_B, FN_CC5_TCK, FN_SD0_DAT3, FN_ATAWR1,
307 FN_RX2_B, FN_CC5_TDI, FN_SD0_CD, FN_DREQ2,
308 FN_RTS1_B_TANS_B, FN_SD0_WP, FN_DACK2, FN_CTS1_B,
309
310 /* IPSR8 */
311 FN_HSPI_CLK0, FN_CTS0, FN_USB_OVC0, FN_AD_CLK,
312 FN_CC5_STATE4, FN_CC5_STATE12, FN_CC5_STATE20, FN_CC5_STATE28,
313 FN_CC5_STATE36, FN_HSPI_CS0, FN_RTS0_TANS, FN_USB_OVC1,
314 FN_AD_DI, FN_CC5_STATE5, FN_CC5_STATE13, FN_CC5_STATE21,
315 FN_CC5_STATE29, FN_CC5_STATE37, FN_HSPI_TX0, FN_TX0,
316 FN_CAN_DEBUG_HW_TRIGGER, FN_AD_DO, FN_CC5_STATE6, FN_CC5_STATE14,
317 FN_CC5_STATE22, FN_CC5_STATE30, FN_CC5_STATE38, FN_HSPI_RX0,
318 FN_RX0, FN_CAN_STEP0, FN_AD_NCS, FN_CC5_STATE7,
319 FN_CC5_STATE15, FN_CC5_STATE23, FN_CC5_STATE31, FN_CC5_STATE39,
320 FN_FMCLK, FN_RDS_CLK, FN_PCMOE, FN_BPFCLK,
321 FN_PCMWE, FN_FMIN, FN_RDS_DATA, FN_VI0_CLK,
322 FN_MMC1_CLK, FN_VI0_CLKENB, FN_TX1_C, FN_HTX1_B,
323 FN_MT1_SYNC, FN_VI0_FIELD, FN_RX1_C, FN_HRX1_B,
324 FN_VI0_HSYNC, FN_VI0_DATA0_B_VI0_B0_B, FN_CTS1_C, FN_TX4_D,
325 FN_MMC1_CMD, FN_HSCK1_B, FN_VI0_VSYNC, FN_VI0_DATA1_B_VI0_B1_B,
326 FN_RTS1_C_TANS_C, FN_RX4_D, FN_PWMFSW0_C,
327
328 /* IPSR9 */
329 FN_VI0_DATA0_VI0_B0, FN_HRTS1_B, FN_MT1_VCXO, FN_VI0_DATA1_VI0_B1,
330 FN_HCTS1_B, FN_MT1_PWM, FN_VI0_DATA2_VI0_B2, FN_MMC1_D0,
331 FN_VI0_DATA3_VI0_B3, FN_MMC1_D1, FN_VI0_DATA4_VI0_B4, FN_MMC1_D2,
332 FN_VI0_DATA5_VI0_B5, FN_MMC1_D3, FN_VI0_DATA6_VI0_B6, FN_MMC1_D4,
333 FN_ARM_TRACEDATA_0, FN_VI0_DATA7_VI0_B7, FN_MMC1_D5,
334 FN_ARM_TRACEDATA_1, FN_VI0_G0, FN_SSI_SCK78_C, FN_IRQ0,
335 FN_ARM_TRACEDATA_2, FN_VI0_G1, FN_SSI_WS78_C, FN_IRQ1,
336 FN_ARM_TRACEDATA_3, FN_VI0_G2, FN_ETH_TXD1, FN_MMC1_D6,
337 FN_ARM_TRACEDATA_4, FN_TS_SPSYNC0, FN_VI0_G3, FN_ETH_CRS_DV,
338 FN_MMC1_D7, FN_ARM_TRACEDATA_5, FN_TS_SDAT0, FN_VI0_G4,
339 FN_ETH_TX_EN, FN_SD2_DAT0_B, FN_ARM_TRACEDATA_6, FN_VI0_G5,
340 FN_ETH_RX_ER, FN_SD2_DAT1_B, FN_ARM_TRACEDATA_7, FN_VI0_G6,
341 FN_ETH_RXD0, FN_SD2_DAT2_B, FN_ARM_TRACEDATA_8, FN_VI0_G7,
342 FN_ETH_RXD1, FN_SD2_DAT3_B, FN_ARM_TRACEDATA_9,
343
344 /* IPSR10 */
345 FN_VI0_R0, FN_SSI_SDATA7_C, FN_SCK1_C, FN_DREQ1_B,
346 FN_ARM_TRACEDATA_10, FN_DREQ0_C, FN_VI0_R1, FN_SSI_SDATA8_C,
347 FN_DACK1_B, FN_ARM_TRACEDATA_11, FN_DACK0_C, FN_DRACK0_C,
348 FN_VI0_R2, FN_ETH_LINK, FN_SD2_CLK_B, FN_IRQ2,
349 FN_ARM_TRACEDATA_12, FN_VI0_R3, FN_ETH_MAGIC, FN_SD2_CMD_B,
350 FN_IRQ3, FN_ARM_TRACEDATA_13, FN_VI0_R4, FN_ETH_REFCLK,
351 FN_SD2_CD_B, FN_HSPI_CLK1_B, FN_ARM_TRACEDATA_14, FN_MT1_CLK,
352 FN_TS_SCK0, FN_VI0_R5, FN_ETH_TXD0, FN_SD2_WP_B, FN_HSPI_CS1_B,
353 FN_ARM_TRACEDATA_15, FN_MT1_D, FN_TS_SDEN0, FN_VI0_R6,
354 FN_ETH_MDC, FN_DREQ2_C, FN_HSPI_TX1_B, FN_TRACECLK,
355 FN_MT1_BEN, FN_PWMFSW0_D, FN_VI0_R7, FN_ETH_MDIO,
356 FN_DACK2_C, FN_HSPI_RX1_B, FN_SCIF_CLK_D, FN_TRACECTL,
357 FN_MT1_PEN, FN_VI1_CLK, FN_SIM_D, FN_SDA3,
358 FN_VI1_HSYNC, FN_VI3_CLK, FN_SSI_SCK4, FN_GPS_SIGN_C,
359 FN_PWMFSW0_E, FN_VI1_VSYNC, FN_AUDIO_CLKOUT_C, FN_SSI_WS4,
360 FN_SIM_CLK, FN_GPS_MAG_C, FN_SPV_TRST, FN_SCL3,
361
362 /* IPSR11 */
363 FN_VI1_DATA0_VI1_B0, FN_SD2_DAT0, FN_SIM_RST, FN_SPV_TCK,
364 FN_ADICLK_B, FN_VI1_DATA1_VI1_B1, FN_SD2_DAT1, FN_MT0_CLK,
365 FN_SPV_TMS, FN_ADICS_B_SAMP_B, FN_VI1_DATA2_VI1_B2, FN_SD2_DAT2,
366 FN_MT0_D, FN_SPVTDI, FN_ADIDATA_B, FN_VI1_DATA3_VI1_B3,
367 FN_SD2_DAT3, FN_MT0_BEN, FN_SPV_TDO, FN_ADICHS0_B,
368 FN_VI1_DATA4_VI1_B4, FN_SD2_CLK, FN_MT0_PEN, FN_SPA_TRST,
369 FN_HSPI_CLK1_D, FN_ADICHS1_B, FN_VI1_DATA5_VI1_B5, FN_SD2_CMD,
370 FN_MT0_SYNC, FN_SPA_TCK, FN_HSPI_CS1_D, FN_ADICHS2_B,
371 FN_VI1_DATA6_VI1_B6, FN_SD2_CD, FN_MT0_VCXO, FN_SPA_TMS,
372 FN_HSPI_TX1_D, FN_VI1_DATA7_VI1_B7, FN_SD2_WP, FN_MT0_PWM,
373 FN_SPA_TDI, FN_HSPI_RX1_D, FN_VI1_G0, FN_VI3_DATA0,
374 FN_DU1_DOTCLKOUT1, FN_TS_SCK1, FN_DREQ2_B, FN_TX2,
375 FN_SPA_TDO, FN_HCTS0_B, FN_VI1_G1, FN_VI3_DATA1,
376 FN_SSI_SCK1, FN_TS_SDEN1, FN_DACK2_B, FN_RX2, FN_HRTS0_B,
377
378 /* IPSR12 */
379 FN_VI1_G2, FN_VI3_DATA2, FN_SSI_WS1, FN_TS_SPSYNC1,
380 FN_SCK2, FN_HSCK0_B, FN_VI1_G3, FN_VI3_DATA3,
381 FN_SSI_SCK2, FN_TS_SDAT1, FN_SCL1_C, FN_HTX0_B,
382 FN_VI1_G4, FN_VI3_DATA4, FN_SSI_WS2, FN_SDA1_C,
383 FN_SIM_RST_B, FN_HRX0_B, FN_VI1_G5, FN_VI3_DATA5,
384 FN_GPS_CLK, FN_FSE, FN_TX4_B, FN_SIM_D_B,
385 FN_VI1_G6, FN_VI3_DATA6, FN_GPS_SIGN, FN_FRB,
386 FN_RX4_B, FN_SIM_CLK_B, FN_VI1_G7, FN_VI3_DATA7,
387 FN_GPS_MAG, FN_FCE, FN_SCK4_B,
388
389 FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, FN_SEL_SCIF5_2, FN_SEL_SCIF5_3,
390 FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, FN_SEL_SCIF4_3,
391 FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2,
392 FN_SEL_SCIF3_3, FN_SEL_SCIF3_4,
393 FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2,
394 FN_SEL_SCIF2_3, FN_SEL_SCIF2_4,
395 FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2,
396 FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,
397 FN_SEL_SSI9_0, FN_SEL_SSI9_1, FN_SEL_SSI9_2,
398 FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2,
399 FN_SEL_SSI7_0, FN_SEL_SSI7_1, FN_SEL_SSI7_2,
400 FN_SEL_VI0_0, FN_SEL_VI0_1,
401 FN_SEL_SD2_0, FN_SEL_SD2_1,
402 FN_SEL_INT3_0, FN_SEL_INT3_1,
403 FN_SEL_INT2_0, FN_SEL_INT2_1,
404 FN_SEL_INT1_0, FN_SEL_INT1_1,
405 FN_SEL_INT0_0, FN_SEL_INT0_1,
406 FN_SEL_IE_0, FN_SEL_IE_1,
407 FN_SEL_EXBUS2_0, FN_SEL_EXBUS2_1, FN_SEL_EXBUS2_2,
408 FN_SEL_EXBUS1_0, FN_SEL_EXBUS1_1,
409 FN_SEL_EXBUS0_0, FN_SEL_EXBUS0_1, FN_SEL_EXBUS0_2,
410
411 FN_SEL_TMU1_0, FN_SEL_TMU1_1, FN_SEL_TMU1_2,
412 FN_SEL_TMU0_0, FN_SEL_TMU0_1, FN_SEL_TMU0_2, FN_SEL_TMU0_3,
413 FN_SEL_SCIF_0, FN_SEL_SCIF_1, FN_SEL_SCIF_2, FN_SEL_SCIF_3,
414 FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2,
415 FN_SEL_CAN0_0, FN_SEL_CAN0_1,
416 FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
417 FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1,
418 FN_SEL_PWMFSW_0, FN_SEL_PWMFSW_1, FN_SEL_PWMFSW_2,
419 FN_SEL_PWMFSW_3, FN_SEL_PWMFSW_4,
420 FN_SEL_ADI_0, FN_SEL_ADI_1,
421 FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3,
422 FN_SEL_SIM_0, FN_SEL_SIM_1,
423 FN_SEL_HSPI2_0, FN_SEL_HSPI2_1,
424 FN_SEL_HSPI1_0, FN_SEL_HSPI1_1, FN_SEL_HSPI1_2, FN_SEL_HSPI1_3,
425 FN_SEL_I2C3_0, FN_SEL_I2C3_1,
426 FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3,
427 FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, FN_SEL_I2C1_3,
428 PINMUX_FUNCTION_END,
429
430 PINMUX_MARK_BEGIN,
431 AVS1_MARK, AVS2_MARK, A17_MARK, A18_MARK,
432 A19_MARK,
433
434 RD_WR_MARK, FWE_MARK, ATAG0_MARK, VI1_R7_MARK,
435 HRTS1_MARK, RX4_C_MARK,
436 CS1_A26_MARK, HSPI_TX2_MARK, SDSELF_B_MARK,
437 CS0_MARK, HSPI_CS2_B_MARK,
438 CLKOUT_MARK, TX3C_IRDA_TX_C_MARK, PWM0_B_MARK,
439 A25_MARK, SD1_WP_MARK, MMC0_D5_MARK, FD5_MARK,
440 HSPI_RX2_MARK, VI1_R3_MARK, TX5_B_MARK, SSI_SDATA7_B_MARK, CTS0_B_MARK,
441 A24_MARK, SD1_CD_MARK, MMC0_D4_MARK, FD4_MARK,
442 HSPI_CS2_MARK, VI1_R2_MARK, SSI_WS78_B_MARK,
443 A23_MARK, FCLE_MARK, HSPI_CLK2_MARK, VI1_R1_MARK,
444 A22_MARK, RX5_D_MARK, HSPI_RX2_B_MARK, VI1_R0_MARK,
445 A21_MARK, SCK5_D_MARK, HSPI_CLK2_B_MARK,
446 A20_MARK, TX5_D_MARK, HSPI_TX2_B_MARK,
447 A0_MARK, SD1_DAT3_MARK, MMC0_D3_MARK, FD3_MARK,
448 BS_MARK, SD1_DAT2_MARK, MMC0_D2_MARK, FD2_MARK,
449 ATADIR0_MARK, SDSELF_MARK, HCTS1_MARK, TX4_C_MARK,
450 USB_PENC2_MARK, SCK0_MARK, PWM1_MARK, PWMFSW0_MARK,
451 SCIF_CLK_MARK, TCLK0_C_MARK,
452
453 EX_CS0_MARK, RX3_C_IRDA_RX_C_MARK, MMC0_D6_MARK,
454 FD6_MARK, EX_CS1_MARK, MMC0_D7_MARK, FD7_MARK,
455 EX_CS2_MARK, SD1_CLK_MARK, MMC0_CLK_MARK, FALE_MARK,
456 ATACS00_MARK, EX_CS3_MARK, SD1_CMD_MARK, MMC0_CMD_MARK,
457 FRE_MARK, ATACS10_MARK, VI1_R4_MARK, RX5_B_MARK,
458 HSCK1_MARK, SSI_SDATA8_B_MARK, RTS0_B_TANS_B_MARK, SSI_SDATA9_MARK,
459 EX_CS4_MARK, SD1_DAT0_MARK, MMC0_D0_MARK, FD0_MARK,
460 ATARD0_MARK, VI1_R5_MARK, SCK5_B_MARK, HTX1_MARK,
461 TX2_E_MARK, TX0_B_MARK, SSI_SCK9_MARK, EX_CS5_MARK,
462 SD1_DAT1_MARK, MMC0_D1_MARK, FD1_MARK, ATAWR0_MARK,
463 VI1_R6_MARK, HRX1_MARK, RX2_E_MARK, RX0_B_MARK,
464 SSI_WS9_MARK, MLB_CLK_MARK, PWM2_MARK, SCK4_MARK,
465 MLB_SIG_MARK, PWM3_MARK, TX4_MARK, MLB_DAT_MARK,
466 PWM4_MARK, RX4_MARK, HTX0_MARK, TX1_MARK,
467 SDATA_MARK, CTS0_C_MARK, SUB_TCK_MARK, CC5_STATE2_MARK,
468 CC5_STATE10_MARK, CC5_STATE18_MARK, CC5_STATE26_MARK, CC5_STATE34_MARK,
469
470 HRX0_MARK, RX1_MARK, SCKZ_MARK, RTS0_C_TANS_C_MARK,
471 SUB_TDI_MARK, CC5_STATE3_MARK, CC5_STATE11_MARK, CC5_STATE19_MARK,
472 CC5_STATE27_MARK, CC5_STATE35_MARK, HSCK0_MARK, SCK1_MARK,
473 MTS_MARK, PWM5_MARK, SCK0_C_MARK, SSI_SDATA9_B_MARK,
474 SUB_TDO_MARK, CC5_STATE0_MARK, CC5_STATE8_MARK, CC5_STATE16_MARK,
475 CC5_STATE24_MARK, CC5_STATE32_MARK, HCTS0_MARK, CTS1_MARK,
476 STM_MARK, PWM0_D_MARK, RX0_C_MARK, SCIF_CLK_C_MARK,
477 SUB_TRST_MARK, TCLK1_B_MARK, CC5_OSCOUT_MARK, HRTS0_MARK,
478 RTS1_TANS_MARK, MDATA_MARK, TX0_C_MARK, SUB_TMS_MARK,
479 CC5_STATE1_MARK, CC5_STATE9_MARK, CC5_STATE17_MARK, CC5_STATE25_MARK,
480 CC5_STATE33_MARK, DU0_DR0_MARK, LCDOUT0_MARK, DREQ0_MARK,
481 GPS_CLK_B_MARK, AUDATA0_MARK, TX5_C_MARK, DU0_DR1_MARK,
482 LCDOUT1_MARK, DACK0_MARK, DRACK0_MARK, GPS_SIGN_B_MARK,
483 AUDATA1_MARK, RX5_C_MARK, DU0_DR2_MARK, LCDOUT2_MARK,
484 DU0_DR3_MARK, LCDOUT3_MARK, DU0_DR4_MARK, LCDOUT4_MARK,
485 DU0_DR5_MARK, LCDOUT5_MARK, DU0_DR6_MARK, LCDOUT6_MARK,
486 DU0_DR7_MARK, LCDOUT7_MARK, DU0_DG0_MARK, LCDOUT8_MARK,
487 DREQ1_MARK, SCL2_MARK, AUDATA2_MARK,
488
489 DU0_DG1_MARK, LCDOUT9_MARK, DACK1_MARK, SDA2_MARK,
490 AUDATA3_MARK, DU0_DG2_MARK, LCDOUT10_MARK, DU0_DG3_MARK,
491 LCDOUT11_MARK, DU0_DG4_MARK, LCDOUT12_MARK, DU0_DG5_MARK,
492 LCDOUT13_MARK, DU0_DG6_MARK, LCDOUT14_MARK, DU0_DG7_MARK,
493 LCDOUT15_MARK, DU0_DB0_MARK, LCDOUT16_MARK, EX_WAIT1_MARK,
494 SCL1_MARK, TCLK1_MARK, AUDATA4_MARK, DU0_DB1_MARK,
495 LCDOUT17_MARK, EX_WAIT2_MARK, SDA1_MARK, GPS_MAG_B_MARK,
496 AUDATA5_MARK, SCK5_C_MARK, DU0_DB2_MARK, LCDOUT18_MARK,
497 DU0_DB3_MARK, LCDOUT19_MARK, DU0_DB4_MARK, LCDOUT20_MARK,
498 DU0_DB5_MARK, LCDOUT21_MARK, DU0_DB6_MARK, LCDOUT22_MARK,
499 DU0_DB7_MARK, LCDOUT23_MARK, DU0_DOTCLKIN_MARK, QSTVA_QVS_MARK,
500 TX3_D_IRDA_TX_D_MARK, SCL3_B_MARK, DU0_DOTCLKOUT0_MARK, QCLK_MARK,
501 DU0_DOTCLKOUT1_MARK, QSTVB_QVE_MARK, RX3_D_IRDA_RX_D_MARK, SDA3_B_MARK,
502 SDA2_C_MARK, DACK0_B_MARK, DRACK0_B_MARK, DU0_EXHSYNC_DU0_HSYNC_MARK,
503 QSTH_QHS_MARK, DU0_EXVSYNC_DU0_VSYNC_MARK, QSTB_QHE_MARK,
504 DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK, QCPV_QDE_MARK, CAN1_TX_MARK,
505 TX2_C_MARK, SCL2_C_MARK, REMOCON_MARK,
506
507 DU0_DISP_MARK, QPOLA_MARK, CAN_CLK_C_MARK, SCK2_C_MARK,
508 DU0_CDE_MARK, QPOLB_MARK, CAN1_RX_MARK, RX2_C_MARK,
509 DREQ0_B_MARK, SSI_SCK78_B_MARK, SCK0_B_MARK, DU1_DR0_MARK,
510 VI2_DATA0_VI2_B0_MARK, PWM6_MARK, SD3_CLK_MARK, TX3_E_IRDA_TX_E_MARK,
511 AUDCK_MARK, PWMFSW0_B_MARK, DU1_DR1_MARK, VI2_DATA1_VI2_B1_MARK,
512 PWM0_MARK, SD3_CMD_MARK, RX3_E_IRDA_RX_E_MARK, AUDSYNC_MARK,
513 CTS0_D_MARK, DU1_DR2_MARK, VI2_G0_MARK, DU1_DR3_MARK,
514 VI2_G1_MARK, DU1_DR4_MARK, VI2_G2_MARK, DU1_DR5_MARK,
515 VI2_G3_MARK, DU1_DR6_MARK, VI2_G4_MARK, DU1_DR7_MARK,
516 VI2_G5_MARK, DU1_DG0_MARK, VI2_DATA2_VI2_B2_MARK, SCL1_B_MARK,
517 SD3_DAT2_MARK, SCK3_E_MARK, AUDATA6_MARK, TX0_D_MARK,
518 DU1_DG1_MARK, VI2_DATA3_VI2_B3_MARK, SDA1_B_MARK, SD3_DAT3_MARK,
519 SCK5_MARK, AUDATA7_MARK, RX0_D_MARK, DU1_DG2_MARK,
520 VI2_G6_MARK, DU1_DG3_MARK, VI2_G7_MARK, DU1_DG4_MARK,
521 VI2_R0_MARK, DU1_DG5_MARK, VI2_R1_MARK, DU1_DG6_MARK,
522 VI2_R2_MARK, DU1_DG7_MARK, VI2_R3_MARK, DU1_DB0_MARK,
523 VI2_DATA4_VI2_B4_MARK, SCL2_B_MARK, SD3_DAT0_MARK, TX5_MARK,
524 SCK0_D_MARK,
525
526 DU1_DB1_MARK, VI2_DATA5_VI2_B5_MARK, SDA2_B_MARK, SD3_DAT1_MARK,
527 RX5_MARK, RTS0_D_TANS_D_MARK, DU1_DB2_MARK, VI2_R4_MARK,
528 DU1_DB3_MARK, VI2_R5_MARK, DU1_DB4_MARK, VI2_R6_MARK,
529 DU1_DB5_MARK, VI2_R7_MARK, DU1_DB6_MARK, SCL2_D_MARK,
530 DU1_DB7_MARK, SDA2_D_MARK, DU1_DOTCLKIN_MARK, VI2_CLKENB_MARK,
531 HSPI_CS1_MARK, SCL1_D_MARK, DU1_DOTCLKOUT_MARK, VI2_FIELD_MARK,
532 SDA1_D_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, VI2_HSYNC_MARK,
533 VI3_HSYNC_MARK, DU1_EXVSYNC_DU1_VSYNC_MARK, VI2_VSYNC_MARK,
534 VI3_VSYNC_MARK, DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK, VI2_CLK_MARK,
535 TX3_B_IRDA_TX_B_MARK, SD3_CD_MARK, HSPI_TX1_MARK, VI1_CLKENB_MARK,
536 VI3_CLKENB_MARK, AUDIO_CLKC_MARK, TX2_D_MARK, SPEEDIN_MARK,
537 GPS_SIGN_D_MARK, DU1_DISP_MARK, VI2_DATA6_VI2_B6_MARK, TCLK0_MARK,
538 QSTVA_B_QVS_B_MARK, HSPI_CLK1_MARK, SCK2_D_MARK, AUDIO_CLKOUT_B_MARK,
539 GPS_MAG_D_MARK, DU1_CDE_MARK, VI2_DATA7_VI2_B7_MARK,
540 RX3_B_IRDA_RX_B_MARK, SD3_WP_MARK, HSPI_RX1_MARK, VI1_FIELD_MARK,
541 VI3_FIELD_MARK, AUDIO_CLKOUT_MARK, RX2_D_MARK, GPS_CLK_C_MARK,
542 GPS_CLK_D_MARK, AUDIO_CLKA_MARK, CAN_TXCLK_MARK, AUDIO_CLKB_MARK,
543 USB_OVC2_MARK, CAN_DEBUGOUT0_MARK, MOUT0_MARK,
544
545 SSI_SCK0129_MARK, CAN_DEBUGOUT1_MARK, MOUT1_MARK, SSI_WS0129_MARK,
546 CAN_DEBUGOUT2_MARK, MOUT2_MARK, SSI_SDATA0_MARK, CAN_DEBUGOUT3_MARK,
547 MOUT5_MARK, SSI_SDATA1_MARK, CAN_DEBUGOUT4_MARK, MOUT6_MARK,
548 SSI_SDATA2_MARK, CAN_DEBUGOUT5_MARK, SSI_SCK34_MARK,
549 CAN_DEBUGOUT6_MARK, CAN0_TX_B_MARK, IERX_MARK, SSI_SCK9_C_MARK,
550 SSI_WS34_MARK, CAN_DEBUGOUT7_MARK, CAN0_RX_B_MARK, IETX_MARK,
551 SSI_WS9_C_MARK, SSI_SDATA3_MARK, PWM0_C_MARK, CAN_DEBUGOUT8_MARK,
552 CAN_CLK_B_MARK, IECLK_MARK, SCIF_CLK_B_MARK, TCLK0_B_MARK,
553 SSI_SDATA4_MARK, CAN_DEBUGOUT9_MARK, SSI_SDATA9_C_MARK, SSI_SCK5_MARK,
554 ADICLK_MARK, CAN_DEBUGOUT10_MARK, SCK3_MARK, TCLK0_D_MARK,
555 SSI_WS5_MARK, ADICS_SAMP_MARK, CAN_DEBUGOUT11_MARK, TX3_IRDA_TX_MARK,
556 SSI_SDATA5_MARK, ADIDATA_MARK, CAN_DEBUGOUT12_MARK, RX3_IRDA_RX_MARK,
557 SSI_SCK6_MARK, ADICHS0_MARK, CAN0_TX_MARK, IERX_B_MARK,
558
559 SSI_WS6_MARK, ADICHS1_MARK, CAN0_RX_MARK, IETX_B_MARK,
560 SSI_SDATA6_MARK, ADICHS2_MARK, CAN_CLK_MARK, IECLK_B_MARK,
561 SSI_SCK78_MARK, CAN_DEBUGOUT13_MARK, IRQ0_B_MARK, SSI_SCK9_B_MARK,
562 HSPI_CLK1_C_MARK, SSI_WS78_MARK, CAN_DEBUGOUT14_MARK, IRQ1_B_MARK,
563 SSI_WS9_B_MARK, HSPI_CS1_C_MARK, SSI_SDATA7_MARK, CAN_DEBUGOUT15_MARK,
564 IRQ2_B_MARK, TCLK1_C_MARK, HSPI_TX1_C_MARK, SSI_SDATA8_MARK,
565 VSP_MARK, IRQ3_B_MARK, HSPI_RX1_C_MARK, SD0_CLK_MARK,
566 ATACS01_MARK, SCK1_B_MARK, SD0_CMD_MARK, ATACS11_MARK,
567 TX1_B_MARK, CC5_TDO_MARK, SD0_DAT0_MARK, ATADIR1_MARK,
568 RX1_B_MARK, CC5_TRST_MARK, SD0_DAT1_MARK, ATAG1_MARK,
569 SCK2_B_MARK, CC5_TMS_MARK, SD0_DAT2_MARK, ATARD1_MARK,
570 TX2_B_MARK, CC5_TCK_MARK, SD0_DAT3_MARK, ATAWR1_MARK,
571 RX2_B_MARK, CC5_TDI_MARK, SD0_CD_MARK, DREQ2_MARK,
572 RTS1_B_TANS_B_MARK, SD0_WP_MARK, DACK2_MARK, CTS1_B_MARK,
573
574 HSPI_CLK0_MARK, CTS0_MARK, USB_OVC0_MARK, AD_CLK_MARK,
575 CC5_STATE4_MARK, CC5_STATE12_MARK, CC5_STATE20_MARK, CC5_STATE28_MARK,
576 CC5_STATE36_MARK, HSPI_CS0_MARK, RTS0_TANS_MARK, USB_OVC1_MARK,
577 AD_DI_MARK, CC5_STATE5_MARK, CC5_STATE13_MARK, CC5_STATE21_MARK,
578 CC5_STATE29_MARK, CC5_STATE37_MARK, HSPI_TX0_MARK, TX0_MARK,
579 CAN_DEBUG_HW_TRIGGER_MARK, AD_DO_MARK, CC5_STATE6_MARK,
580 CC5_STATE14_MARK, CC5_STATE22_MARK, CC5_STATE30_MARK,
581 CC5_STATE38_MARK, HSPI_RX0_MARK, RX0_MARK, CAN_STEP0_MARK,
582 AD_NCS_MARK, CC5_STATE7_MARK, CC5_STATE15_MARK, CC5_STATE23_MARK,
583 CC5_STATE31_MARK, CC5_STATE39_MARK, FMCLK_MARK, RDS_CLK_MARK,
584 PCMOE_MARK, BPFCLK_MARK, PCMWE_MARK, FMIN_MARK, RDS_DATA_MARK,
585 VI0_CLK_MARK, MMC1_CLK_MARK, VI0_CLKENB_MARK, TX1_C_MARK, HTX1_B_MARK,
586 MT1_SYNC_MARK, VI0_FIELD_MARK, RX1_C_MARK, HRX1_B_MARK,
587 VI0_HSYNC_MARK, VI0_DATA0_B_VI0_B0_B_MARK, CTS1_C_MARK, TX4_D_MARK,
588 MMC1_CMD_MARK, HSCK1_B_MARK, VI0_VSYNC_MARK, VI0_DATA1_B_VI0_B1_B_MARK,
589 RTS1_C_TANS_C_MARK, RX4_D_MARK, PWMFSW0_C_MARK,
590
591 VI0_DATA0_VI0_B0_MARK, HRTS1_B_MARK, MT1_VCXO_MARK,
592 VI0_DATA1_VI0_B1_MARK, HCTS1_B_MARK, MT1_PWM_MARK,
593 VI0_DATA2_VI0_B2_MARK, MMC1_D0_MARK, VI0_DATA3_VI0_B3_MARK,
594 MMC1_D1_MARK, VI0_DATA4_VI0_B4_MARK, MMC1_D2_MARK,
595 VI0_DATA5_VI0_B5_MARK, MMC1_D3_MARK, VI0_DATA6_VI0_B6_MARK,
596 MMC1_D4_MARK, ARM_TRACEDATA_0_MARK, VI0_DATA7_VI0_B7_MARK,
597 MMC1_D5_MARK, ARM_TRACEDATA_1_MARK, VI0_G0_MARK, SSI_SCK78_C_MARK,
598 IRQ0_MARK, ARM_TRACEDATA_2_MARK, VI0_G1_MARK, SSI_WS78_C_MARK,
599 IRQ1_MARK, ARM_TRACEDATA_3_MARK, VI0_G2_MARK, ETH_TXD1_MARK,
600 MMC1_D6_MARK, ARM_TRACEDATA_4_MARK, TS_SPSYNC0_MARK, VI0_G3_MARK,
601 ETH_CRS_DV_MARK, MMC1_D7_MARK, ARM_TRACEDATA_5_MARK, TS_SDAT0_MARK,
602 VI0_G4_MARK, ETH_TX_EN_MARK, SD2_DAT0_B_MARK, ARM_TRACEDATA_6_MARK,
603 VI0_G5_MARK, ETH_RX_ER_MARK, SD2_DAT1_B_MARK, ARM_TRACEDATA_7_MARK,
604 VI0_G6_MARK, ETH_RXD0_MARK, SD2_DAT2_B_MARK, ARM_TRACEDATA_8_MARK,
605 VI0_G7_MARK, ETH_RXD1_MARK, SD2_DAT3_B_MARK, ARM_TRACEDATA_9_MARK,
606
607 VI0_R0_MARK, SSI_SDATA7_C_MARK, SCK1_C_MARK, DREQ1_B_MARK,
608 ARM_TRACEDATA_10_MARK, DREQ0_C_MARK, VI0_R1_MARK, SSI_SDATA8_C_MARK,
609 DACK1_B_MARK, ARM_TRACEDATA_11_MARK, DACK0_C_MARK, DRACK0_C_MARK,
610 VI0_R2_MARK, ETH_LINK_MARK, SD2_CLK_B_MARK, IRQ2_MARK,
611 ARM_TRACEDATA_12_MARK, VI0_R3_MARK, ETH_MAGIC_MARK, SD2_CMD_B_MARK,
612 IRQ3_MARK, ARM_TRACEDATA_13_MARK, VI0_R4_MARK, ETH_REFCLK_MARK,
613 SD2_CD_B_MARK, HSPI_CLK1_B_MARK, ARM_TRACEDATA_14_MARK, MT1_CLK_MARK,
614 TS_SCK0_MARK, VI0_R5_MARK, ETH_TXD0_MARK, SD2_WP_B_MARK,
615 HSPI_CS1_B_MARK, ARM_TRACEDATA_15_MARK, MT1_D_MARK, TS_SDEN0_MARK,
616 VI0_R6_MARK, ETH_MDC_MARK, DREQ2_C_MARK, HSPI_TX1_B_MARK,
617 TRACECLK_MARK, MT1_BEN_MARK, PWMFSW0_D_MARK, VI0_R7_MARK,
618 ETH_MDIO_MARK, DACK2_C_MARK, HSPI_RX1_B_MARK, SCIF_CLK_D_MARK,
619 TRACECTL_MARK, MT1_PEN_MARK, VI1_CLK_MARK, SIM_D_MARK, SDA3_MARK,
620 VI1_HSYNC_MARK, VI3_CLK_MARK, SSI_SCK4_MARK, GPS_SIGN_C_MARK,
621 PWMFSW0_E_MARK, VI1_VSYNC_MARK, AUDIO_CLKOUT_C_MARK, SSI_WS4_MARK,
622 SIM_CLK_MARK, GPS_MAG_C_MARK, SPV_TRST_MARK, SCL3_MARK,
623
624 VI1_DATA0_VI1_B0_MARK, SD2_DAT0_MARK, SIM_RST_MARK, SPV_TCK_MARK,
625 ADICLK_B_MARK, VI1_DATA1_VI1_B1_MARK, SD2_DAT1_MARK, MT0_CLK_MARK,
626 SPV_TMS_MARK, ADICS_B_SAMP_B_MARK, VI1_DATA2_VI1_B2_MARK,
627 SD2_DAT2_MARK, MT0_D_MARK, SPVTDI_MARK, ADIDATA_B_MARK,
628 VI1_DATA3_VI1_B3_MARK, SD2_DAT3_MARK, MT0_BEN_MARK, SPV_TDO_MARK,
629 ADICHS0_B_MARK, VI1_DATA4_VI1_B4_MARK, SD2_CLK_MARK, MT0_PEN_MARK,
630 SPA_TRST_MARK, HSPI_CLK1_D_MARK, ADICHS1_B_MARK,
631 VI1_DATA5_VI1_B5_MARK, SD2_CMD_MARK, MT0_SYNC_MARK, SPA_TCK_MARK,
632 HSPI_CS1_D_MARK, ADICHS2_B_MARK, VI1_DATA6_VI1_B6_MARK, SD2_CD_MARK,
633 MT0_VCXO_MARK, SPA_TMS_MARK, HSPI_TX1_D_MARK, VI1_DATA7_VI1_B7_MARK,
634 SD2_WP_MARK, MT0_PWM_MARK, SPA_TDI_MARK, HSPI_RX1_D_MARK,
635 VI1_G0_MARK, VI3_DATA0_MARK, DU1_DOTCLKOUT1_MARK, TS_SCK1_MARK,
636 DREQ2_B_MARK, TX2_MARK, SPA_TDO_MARK, HCTS0_B_MARK,
637 VI1_G1_MARK, VI3_DATA1_MARK, SSI_SCK1_MARK, TS_SDEN1_MARK,
638 DACK2_B_MARK, RX2_MARK, HRTS0_B_MARK,
639
640 VI1_G2_MARK, VI3_DATA2_MARK, SSI_WS1_MARK, TS_SPSYNC1_MARK,
641 SCK2_MARK, HSCK0_B_MARK, VI1_G3_MARK, VI3_DATA3_MARK,
642 SSI_SCK2_MARK, TS_SDAT1_MARK, SCL1_C_MARK, HTX0_B_MARK,
643 VI1_G4_MARK, VI3_DATA4_MARK, SSI_WS2_MARK, SDA1_C_MARK,
644 SIM_RST_B_MARK, HRX0_B_MARK, VI1_G5_MARK, VI3_DATA5_MARK,
645 GPS_CLK_MARK, FSE_MARK, TX4_B_MARK, SIM_D_B_MARK,
646 VI1_G6_MARK, VI3_DATA6_MARK, GPS_SIGN_MARK, FRB_MARK,
647 RX4_B_MARK, SIM_CLK_B_MARK, VI1_G7_MARK, VI3_DATA7_MARK,
648 GPS_MAG_MARK, FCE_MARK, SCK4_B_MARK,
649 PINMUX_MARK_END,
650};
651
652static pinmux_enum_t pinmux_data[] = {
653 PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
654
655 PINMUX_DATA(AVS1_MARK, FN_AVS1),
656 PINMUX_DATA(AVS1_MARK, FN_AVS1),
657 PINMUX_DATA(A17_MARK, FN_A17),
658 PINMUX_DATA(A18_MARK, FN_A18),
659 PINMUX_DATA(A19_MARK, FN_A19),
660
661 PINMUX_IPSR_DATA(IP0_2_0, USB_PENC2),
662 PINMUX_IPSR_MODSEL_DATA(IP0_2_0, SCK0, SEL_SCIF0_0),
663 PINMUX_IPSR_DATA(IP0_2_0, PWM1),
664 PINMUX_IPSR_MODSEL_DATA(IP0_2_0, PWMFSW0, SEL_PWMFSW_0),
665 PINMUX_IPSR_MODSEL_DATA(IP0_2_0, SCIF_CLK, SEL_SCIF_0),
666 PINMUX_IPSR_MODSEL_DATA(IP0_2_0, TCLK0_C, SEL_TMU0_2),
667 PINMUX_IPSR_DATA(IP0_5_3, BS),
668 PINMUX_IPSR_DATA(IP0_5_3, SD1_DAT2),
669 PINMUX_IPSR_DATA(IP0_5_3, MMC0_D2),
670 PINMUX_IPSR_DATA(IP0_5_3, FD2),
671 PINMUX_IPSR_DATA(IP0_5_3, ATADIR0),
672 PINMUX_IPSR_DATA(IP0_5_3, SDSELF),
673 PINMUX_IPSR_MODSEL_DATA(IP0_5_3, HCTS1, SEL_HSCIF1_0),
674 PINMUX_IPSR_DATA(IP0_5_3, TX4_C),
675 PINMUX_IPSR_DATA(IP0_7_6, A0),
676 PINMUX_IPSR_DATA(IP0_7_6, SD1_DAT3),
677 PINMUX_IPSR_DATA(IP0_7_6, MMC0_D3),
678 PINMUX_IPSR_DATA(IP0_7_6, FD3),
679 PINMUX_IPSR_DATA(IP0_9_8, A20),
680 PINMUX_IPSR_DATA(IP0_9_8, TX5_D),
681 PINMUX_IPSR_DATA(IP0_9_8, HSPI_TX2_B),
682 PINMUX_IPSR_DATA(IP0_11_10, A21),
683 PINMUX_IPSR_MODSEL_DATA(IP0_11_10, SCK5_D, SEL_SCIF5_3),
684 PINMUX_IPSR_MODSEL_DATA(IP0_11_10, HSPI_CLK2_B, SEL_HSPI2_1),
685 PINMUX_IPSR_DATA(IP0_13_12, A22),
686 PINMUX_IPSR_MODSEL_DATA(IP0_13_12, RX5_D, SEL_SCIF5_3),
687 PINMUX_IPSR_MODSEL_DATA(IP0_13_12, HSPI_RX2_B, SEL_HSPI2_1),
688 PINMUX_IPSR_DATA(IP0_13_12, VI1_R0),
689 PINMUX_IPSR_DATA(IP0_15_14, A23),
690 PINMUX_IPSR_DATA(IP0_15_14, FCLE),
691 PINMUX_IPSR_MODSEL_DATA(IP0_15_14, HSPI_CLK2, SEL_HSPI2_0),
692 PINMUX_IPSR_DATA(IP0_15_14, VI1_R1),
693 PINMUX_IPSR_DATA(IP0_18_16, A24),
694 PINMUX_IPSR_DATA(IP0_18_16, SD1_CD),
695 PINMUX_IPSR_DATA(IP0_18_16, MMC0_D4),
696 PINMUX_IPSR_DATA(IP0_18_16, FD4),
697 PINMUX_IPSR_MODSEL_DATA(IP0_18_16, HSPI_CS2, SEL_HSPI2_0),
698 PINMUX_IPSR_DATA(IP0_18_16, VI1_R2),
699 PINMUX_IPSR_MODSEL_DATA(IP0_18_16, SSI_WS78_B, SEL_SSI7_1),
700 PINMUX_IPSR_DATA(IP0_22_19, A25),
701 PINMUX_IPSR_DATA(IP0_22_19, SD1_WP),
702 PINMUX_IPSR_DATA(IP0_22_19, MMC0_D5),
703 PINMUX_IPSR_DATA(IP0_22_19, FD5),
704 PINMUX_IPSR_MODSEL_DATA(IP0_22_19, HSPI_RX2, SEL_HSPI2_0),
705 PINMUX_IPSR_DATA(IP0_22_19, VI1_R3),
706 PINMUX_IPSR_DATA(IP0_22_19, TX5_B),
707 PINMUX_IPSR_MODSEL_DATA(IP0_22_19, SSI_SDATA7_B, SEL_SSI7_1),
708 PINMUX_IPSR_MODSEL_DATA(IP0_22_19, CTS0_B, SEL_SCIF0_1),
709 PINMUX_IPSR_DATA(IP0_24_23, CLKOUT),
710 PINMUX_IPSR_DATA(IP0_24_23, TX3C_IRDA_TX_C),
711 PINMUX_IPSR_DATA(IP0_24_23, PWM0_B),
712 PINMUX_IPSR_DATA(IP0_25, CS0),
713 PINMUX_IPSR_MODSEL_DATA(IP0_25, HSPI_CS2_B, SEL_HSPI2_1),
714 PINMUX_IPSR_DATA(IP0_27_26, CS1_A26),
715 PINMUX_IPSR_DATA(IP0_27_26, HSPI_TX2),
716 PINMUX_IPSR_DATA(IP0_27_26, SDSELF_B),
717 PINMUX_IPSR_DATA(IP0_30_28, RD_WR),
718 PINMUX_IPSR_DATA(IP0_30_28, FWE),
719 PINMUX_IPSR_DATA(IP0_30_28, ATAG0),
720 PINMUX_IPSR_DATA(IP0_30_28, VI1_R7),
721 PINMUX_IPSR_MODSEL_DATA(IP0_30_28, HRTS1, SEL_HSCIF1_0),
722 PINMUX_IPSR_MODSEL_DATA(IP0_30_28, RX4_C, SEL_SCIF4_2),
723
724 PINMUX_IPSR_DATA(IP1_1_0, EX_CS0),
725 PINMUX_IPSR_MODSEL_DATA(IP1_1_0, RX3_C_IRDA_RX_C, SEL_SCIF3_2),
726 PINMUX_IPSR_DATA(IP1_1_0, MMC0_D6),
727 PINMUX_IPSR_DATA(IP1_1_0, FD6),
728 PINMUX_IPSR_DATA(IP1_3_2, EX_CS1),
729 PINMUX_IPSR_DATA(IP1_3_2, MMC0_D7),
730 PINMUX_IPSR_DATA(IP1_3_2, FD7),
731 PINMUX_IPSR_DATA(IP1_6_4, EX_CS2),
732 PINMUX_IPSR_DATA(IP1_6_4, SD1_CLK),
733 PINMUX_IPSR_DATA(IP1_6_4, MMC0_CLK),
734 PINMUX_IPSR_DATA(IP1_6_4, FALE),
735 PINMUX_IPSR_DATA(IP1_6_4, ATACS00),
736 PINMUX_IPSR_DATA(IP1_10_7, EX_CS3),
737 PINMUX_IPSR_DATA(IP1_10_7, SD1_CMD),
738 PINMUX_IPSR_DATA(IP1_10_7, MMC0_CMD),
739 PINMUX_IPSR_DATA(IP1_10_7, FRE),
740 PINMUX_IPSR_DATA(IP1_10_7, ATACS10),
741 PINMUX_IPSR_DATA(IP1_10_7, VI1_R4),
742 PINMUX_IPSR_MODSEL_DATA(IP1_10_7, RX5_B, SEL_SCIF5_1),
743 PINMUX_IPSR_MODSEL_DATA(IP1_10_7, HSCK1, SEL_HSCIF1_0),
744 PINMUX_IPSR_MODSEL_DATA(IP1_10_7, SSI_SDATA8_B, SEL_SSI8_1),
745 PINMUX_IPSR_MODSEL_DATA(IP1_10_7, RTS0_B_TANS_B, SEL_SCIF0_1),
746 PINMUX_IPSR_MODSEL_DATA(IP1_10_7, SSI_SDATA9, SEL_SSI9_0),
747 PINMUX_IPSR_DATA(IP1_14_11, EX_CS4),
748 PINMUX_IPSR_DATA(IP1_14_11, SD1_DAT0),
749 PINMUX_IPSR_DATA(IP1_14_11, MMC0_D0),
750 PINMUX_IPSR_DATA(IP1_14_11, FD0),
751 PINMUX_IPSR_DATA(IP1_14_11, ATARD0),
752 PINMUX_IPSR_DATA(IP1_14_11, VI1_R5),
753 PINMUX_IPSR_MODSEL_DATA(IP1_14_11, SCK5_B, SEL_SCIF5_1),
754 PINMUX_IPSR_DATA(IP1_14_11, HTX1),
755 PINMUX_IPSR_DATA(IP1_14_11, TX2_E),
756 PINMUX_IPSR_DATA(IP1_14_11, TX0_B),
757 PINMUX_IPSR_MODSEL_DATA(IP1_14_11, SSI_SCK9, SEL_SSI9_0),
758 PINMUX_IPSR_DATA(IP1_18_15, EX_CS5),
759 PINMUX_IPSR_DATA(IP1_18_15, SD1_DAT1),
760 PINMUX_IPSR_DATA(IP1_18_15, MMC0_D1),
761 PINMUX_IPSR_DATA(IP1_18_15, FD1),
762 PINMUX_IPSR_DATA(IP1_18_15, ATAWR0),
763 PINMUX_IPSR_DATA(IP1_18_15, VI1_R6),
764 PINMUX_IPSR_MODSEL_DATA(IP1_18_15, HRX1, SEL_HSCIF1_0),
765 PINMUX_IPSR_MODSEL_DATA(IP1_18_15, RX2_E, SEL_SCIF2_4),
766 PINMUX_IPSR_MODSEL_DATA(IP1_18_15, RX0_B, SEL_SCIF0_1),
767 PINMUX_IPSR_MODSEL_DATA(IP1_18_15, SSI_WS9, SEL_SSI9_0),
768 PINMUX_IPSR_DATA(IP1_20_19, MLB_CLK),
769 PINMUX_IPSR_DATA(IP1_20_19, PWM2),
770 PINMUX_IPSR_MODSEL_DATA(IP1_20_19, SCK4, SEL_SCIF4_0),
771 PINMUX_IPSR_DATA(IP1_22_21, MLB_SIG),
772 PINMUX_IPSR_DATA(IP1_22_21, PWM3),
773 PINMUX_IPSR_DATA(IP1_22_21, TX4),
774 PINMUX_IPSR_DATA(IP1_24_23, MLB_DAT),
775 PINMUX_IPSR_DATA(IP1_24_23, PWM4),
776 PINMUX_IPSR_MODSEL_DATA(IP1_24_23, RX4, SEL_SCIF4_0),
777 PINMUX_IPSR_DATA(IP1_28_25, HTX0),
778 PINMUX_IPSR_DATA(IP1_28_25, TX1),
779 PINMUX_IPSR_DATA(IP1_28_25, SDATA),
780 PINMUX_IPSR_MODSEL_DATA(IP1_28_25, CTS0_C, SEL_SCIF0_2),
781 PINMUX_IPSR_DATA(IP1_28_25, SUB_TCK),
782 PINMUX_IPSR_DATA(IP1_28_25, CC5_STATE2),
783 PINMUX_IPSR_DATA(IP1_28_25, CC5_STATE10),
784 PINMUX_IPSR_DATA(IP1_28_25, CC5_STATE18),
785 PINMUX_IPSR_DATA(IP1_28_25, CC5_STATE26),
786 PINMUX_IPSR_DATA(IP1_28_25, CC5_STATE34),
787
788 PINMUX_IPSR_MODSEL_DATA(IP2_3_0, HRX0, SEL_HSCIF0_0),
789 PINMUX_IPSR_MODSEL_DATA(IP2_3_0, RX1, SEL_SCIF1_0),
790 PINMUX_IPSR_DATA(IP2_3_0, SCKZ),
791 PINMUX_IPSR_MODSEL_DATA(IP2_3_0, RTS0_C_TANS_C, SEL_SCIF0_2),
792 PINMUX_IPSR_DATA(IP2_3_0, SUB_TDI),
793 PINMUX_IPSR_DATA(IP2_3_0, CC5_STATE3),
794 PINMUX_IPSR_DATA(IP2_3_0, CC5_STATE11),
795 PINMUX_IPSR_DATA(IP2_3_0, CC5_STATE19),
796 PINMUX_IPSR_DATA(IP2_3_0, CC5_STATE27),
797 PINMUX_IPSR_DATA(IP2_3_0, CC5_STATE35),
798 PINMUX_IPSR_MODSEL_DATA(IP2_7_4, HSCK0, SEL_HSCIF0_0),
799 PINMUX_IPSR_MODSEL_DATA(IP2_7_4, SCK1, SEL_SCIF1_0),
800 PINMUX_IPSR_DATA(IP2_7_4, MTS),
801 PINMUX_IPSR_DATA(IP2_7_4, PWM5),
802 PINMUX_IPSR_MODSEL_DATA(IP2_7_4, SCK0_C, SEL_SCIF0_2),
803 PINMUX_IPSR_MODSEL_DATA(IP2_7_4, SSI_SDATA9_B, SEL_SSI9_1),
804 PINMUX_IPSR_DATA(IP2_7_4, SUB_TDO),
805 PINMUX_IPSR_DATA(IP2_7_4, CC5_STATE0),
806 PINMUX_IPSR_DATA(IP2_7_4, CC5_STATE8),
807 PINMUX_IPSR_DATA(IP2_7_4, CC5_STATE16),
808 PINMUX_IPSR_DATA(IP2_7_4, CC5_STATE24),
809 PINMUX_IPSR_DATA(IP2_7_4, CC5_STATE32),
810 PINMUX_IPSR_MODSEL_DATA(IP2_11_8, HCTS0, SEL_HSCIF0_0),
811 PINMUX_IPSR_MODSEL_DATA(IP2_11_8, CTS1, SEL_SCIF1_0),
812 PINMUX_IPSR_DATA(IP2_11_8, STM),
813 PINMUX_IPSR_DATA(IP2_11_8, PWM0_D),
814 PINMUX_IPSR_MODSEL_DATA(IP2_11_8, RX0_C, SEL_SCIF0_2),
815 PINMUX_IPSR_MODSEL_DATA(IP2_11_8, SCIF_CLK_C, SEL_SCIF_2),
816 PINMUX_IPSR_DATA(IP2_11_8, SUB_TRST),
817 PINMUX_IPSR_MODSEL_DATA(IP2_11_8, TCLK1_B, SEL_TMU1_1),
818 PINMUX_IPSR_DATA(IP2_11_8, CC5_OSCOUT),
819 PINMUX_IPSR_MODSEL_DATA(IP2_15_12, HRTS0, SEL_HSCIF0_0),
820 PINMUX_IPSR_MODSEL_DATA(IP2_15_12, RTS1_TANS, SEL_SCIF1_0),
821 PINMUX_IPSR_DATA(IP2_15_12, MDATA),
822 PINMUX_IPSR_DATA(IP2_15_12, TX0_C),
823 PINMUX_IPSR_DATA(IP2_15_12, SUB_TMS),
824 PINMUX_IPSR_DATA(IP2_15_12, CC5_STATE1),
825 PINMUX_IPSR_DATA(IP2_15_12, CC5_STATE9),
826 PINMUX_IPSR_DATA(IP2_15_12, CC5_STATE17),
827 PINMUX_IPSR_DATA(IP2_15_12, CC5_STATE25),
828 PINMUX_IPSR_DATA(IP2_15_12, CC5_STATE33),
829 PINMUX_IPSR_DATA(IP2_18_16, DU0_DR0),
830 PINMUX_IPSR_DATA(IP2_18_16, LCDOUT0),
831 PINMUX_IPSR_MODSEL_DATA(IP2_18_16, DREQ0, SEL_EXBUS0_0),
832 PINMUX_IPSR_MODSEL_DATA(IP2_18_16, GPS_CLK_B, SEL_GPS_1),
833 PINMUX_IPSR_DATA(IP2_18_16, AUDATA0),
834 PINMUX_IPSR_DATA(IP2_18_16, TX5_C),
835 PINMUX_IPSR_DATA(IP2_21_19, DU0_DR1),
836 PINMUX_IPSR_DATA(IP2_21_19, LCDOUT1),
837 PINMUX_IPSR_DATA(IP2_21_19, DACK0),
838 PINMUX_IPSR_DATA(IP2_21_19, DRACK0),
839 PINMUX_IPSR_MODSEL_DATA(IP2_21_19, GPS_SIGN_B, SEL_GPS_1),
840 PINMUX_IPSR_DATA(IP2_21_19, AUDATA1),
841 PINMUX_IPSR_MODSEL_DATA(IP2_21_19, RX5_C, SEL_SCIF5_2),
842 PINMUX_IPSR_DATA(IP2_22, DU0_DR2),
843 PINMUX_IPSR_DATA(IP2_22, LCDOUT2),
844 PINMUX_IPSR_DATA(IP2_23, DU0_DR3),
845 PINMUX_IPSR_DATA(IP2_23, LCDOUT3),
846 PINMUX_IPSR_DATA(IP2_24, DU0_DR4),
847 PINMUX_IPSR_DATA(IP2_24, LCDOUT4),
848 PINMUX_IPSR_DATA(IP2_25, DU0_DR5),
849 PINMUX_IPSR_DATA(IP2_25, LCDOUT5),
850 PINMUX_IPSR_DATA(IP2_26, DU0_DR6),
851 PINMUX_IPSR_DATA(IP2_26, LCDOUT6),
852 PINMUX_IPSR_DATA(IP2_27, DU0_DR7),
853 PINMUX_IPSR_DATA(IP2_27, LCDOUT7),
854 PINMUX_IPSR_DATA(IP2_30_28, DU0_DG0),
855 PINMUX_IPSR_DATA(IP2_30_28, LCDOUT8),
856 PINMUX_IPSR_MODSEL_DATA(IP2_30_28, DREQ1, SEL_EXBUS1_0),
857 PINMUX_IPSR_MODSEL_DATA(IP2_30_28, SCL2, SEL_I2C2_0),
858 PINMUX_IPSR_DATA(IP2_30_28, AUDATA2),
859
860 PINMUX_IPSR_DATA(IP3_2_0, DU0_DG1),
861 PINMUX_IPSR_DATA(IP3_2_0, LCDOUT9),
862 PINMUX_IPSR_DATA(IP3_2_0, DACK1),
863 PINMUX_IPSR_MODSEL_DATA(IP3_2_0, SDA2, SEL_I2C2_0),
864 PINMUX_IPSR_DATA(IP3_2_0, AUDATA3),
865 PINMUX_IPSR_DATA(IP3_3, DU0_DG2),
866 PINMUX_IPSR_DATA(IP3_3, LCDOUT10),
867 PINMUX_IPSR_DATA(IP3_4, DU0_DG3),
868 PINMUX_IPSR_DATA(IP3_4, LCDOUT11),
869 PINMUX_IPSR_DATA(IP3_5, DU0_DG4),
870 PINMUX_IPSR_DATA(IP3_5, LCDOUT12),
871 PINMUX_IPSR_DATA(IP3_6, DU0_DG5),
872 PINMUX_IPSR_DATA(IP3_6, LCDOUT13),
873 PINMUX_IPSR_DATA(IP3_7, DU0_DG6),
874 PINMUX_IPSR_DATA(IP3_7, LCDOUT14),
875 PINMUX_IPSR_DATA(IP3_8, DU0_DG7),
876 PINMUX_IPSR_DATA(IP3_8, LCDOUT15),
877 PINMUX_IPSR_DATA(IP3_11_9, DU0_DB0),
878 PINMUX_IPSR_DATA(IP3_11_9, LCDOUT16),
879 PINMUX_IPSR_DATA(IP3_11_9, EX_WAIT1),
880 PINMUX_IPSR_MODSEL_DATA(IP3_11_9, SCL1, SEL_I2C1_0),
881 PINMUX_IPSR_MODSEL_DATA(IP3_11_9, TCLK1, SEL_TMU1_0),
882 PINMUX_IPSR_DATA(IP3_11_9, AUDATA4),
883 PINMUX_IPSR_DATA(IP3_14_12, DU0_DB1),
884 PINMUX_IPSR_DATA(IP3_14_12, LCDOUT17),
885 PINMUX_IPSR_DATA(IP3_14_12, EX_WAIT2),
886 PINMUX_IPSR_MODSEL_DATA(IP3_14_12, SDA1, SEL_I2C1_0),
887 PINMUX_IPSR_MODSEL_DATA(IP3_14_12, GPS_MAG_B, SEL_GPS_1),
888 PINMUX_IPSR_DATA(IP3_14_12, AUDATA5),
889 PINMUX_IPSR_MODSEL_DATA(IP3_14_12, SCK5_C, SEL_SCIF5_2),
890 PINMUX_IPSR_DATA(IP3_15, DU0_DB2),
891 PINMUX_IPSR_DATA(IP3_15, LCDOUT18),
892 PINMUX_IPSR_DATA(IP3_16, DU0_DB3),
893 PINMUX_IPSR_DATA(IP3_16, LCDOUT19),
894 PINMUX_IPSR_DATA(IP3_17, DU0_DB4),
895 PINMUX_IPSR_DATA(IP3_17, LCDOUT20),
896 PINMUX_IPSR_DATA(IP3_18, DU0_DB5),
897 PINMUX_IPSR_DATA(IP3_18, LCDOUT21),
898 PINMUX_IPSR_DATA(IP3_19, DU0_DB6),
899 PINMUX_IPSR_DATA(IP3_19, LCDOUT22),
900 PINMUX_IPSR_DATA(IP3_20, DU0_DB7),
901 PINMUX_IPSR_DATA(IP3_20, LCDOUT23),
902 PINMUX_IPSR_DATA(IP3_22_21, DU0_DOTCLKIN),
903 PINMUX_IPSR_DATA(IP3_22_21, QSTVA_QVS),
904 PINMUX_IPSR_DATA(IP3_22_21, TX3_D_IRDA_TX_D),
905 PINMUX_IPSR_MODSEL_DATA(IP3_22_21, SCL3_B, SEL_I2C3_1),
906 PINMUX_IPSR_DATA(IP3_23, DU0_DOTCLKOUT0),
907 PINMUX_IPSR_DATA(IP3_23, QCLK),
908 PINMUX_IPSR_DATA(IP3_26_24, DU0_DOTCLKOUT1),
909 PINMUX_IPSR_DATA(IP3_26_24, QSTVB_QVE),
910 PINMUX_IPSR_MODSEL_DATA(IP3_26_24, RX3_D_IRDA_RX_D, SEL_SCIF3_3),
911 PINMUX_IPSR_MODSEL_DATA(IP3_26_24, SDA3_B, SEL_I2C3_1),
912 PINMUX_IPSR_MODSEL_DATA(IP3_26_24, SDA2_C, SEL_I2C2_2),
913 PINMUX_IPSR_DATA(IP3_26_24, DACK0_B),
914 PINMUX_IPSR_DATA(IP3_26_24, DRACK0_B),
915 PINMUX_IPSR_DATA(IP3_27, DU0_EXHSYNC_DU0_HSYNC),
916 PINMUX_IPSR_DATA(IP3_27, QSTH_QHS),
917 PINMUX_IPSR_DATA(IP3_28, DU0_EXVSYNC_DU0_VSYNC),
918 PINMUX_IPSR_DATA(IP3_28, QSTB_QHE),
919 PINMUX_IPSR_DATA(IP3_31_29, DU0_EXODDF_DU0_ODDF_DISP_CDE),
920 PINMUX_IPSR_DATA(IP3_31_29, QCPV_QDE),
921 PINMUX_IPSR_DATA(IP3_31_29, CAN1_TX),
922 PINMUX_IPSR_DATA(IP3_31_29, TX2_C),
923 PINMUX_IPSR_MODSEL_DATA(IP3_31_29, SCL2_C, SEL_I2C2_2),
924 PINMUX_IPSR_DATA(IP3_31_29, REMOCON),
925
926 PINMUX_IPSR_DATA(IP4_1_0, DU0_DISP),
927 PINMUX_IPSR_DATA(IP4_1_0, QPOLA),
928 PINMUX_IPSR_MODSEL_DATA(IP4_1_0, CAN_CLK_C, SEL_CANCLK_2),
929 PINMUX_IPSR_MODSEL_DATA(IP4_1_0, SCK2_C, SEL_SCIF2_2),
930 PINMUX_IPSR_DATA(IP4_4_2, DU0_CDE),
931 PINMUX_IPSR_DATA(IP4_4_2, QPOLB),
932 PINMUX_IPSR_DATA(IP4_4_2, CAN1_RX),
933 PINMUX_IPSR_MODSEL_DATA(IP4_4_2, RX2_C, SEL_SCIF2_2),
934 PINMUX_IPSR_MODSEL_DATA(IP4_4_2, DREQ0_B, SEL_EXBUS0_1),
935 PINMUX_IPSR_MODSEL_DATA(IP4_4_2, SSI_SCK78_B, SEL_SSI7_1),
936 PINMUX_IPSR_MODSEL_DATA(IP4_4_2, SCK0_B, SEL_SCIF0_1),
937 PINMUX_IPSR_DATA(IP4_7_5, DU1_DR0),
938 PINMUX_IPSR_DATA(IP4_7_5, VI2_DATA0_VI2_B0),
939 PINMUX_IPSR_DATA(IP4_7_5, PWM6),
940 PINMUX_IPSR_DATA(IP4_7_5, SD3_CLK),
941 PINMUX_IPSR_DATA(IP4_7_5, TX3_E_IRDA_TX_E),
942 PINMUX_IPSR_DATA(IP4_7_5, AUDCK),
943 PINMUX_IPSR_MODSEL_DATA(IP4_7_5, PWMFSW0_B, SEL_PWMFSW_1),
944 PINMUX_IPSR_DATA(IP4_10_8, DU1_DR1),
945 PINMUX_IPSR_DATA(IP4_10_8, VI2_DATA1_VI2_B1),
946 PINMUX_IPSR_DATA(IP4_10_8, PWM0),
947 PINMUX_IPSR_DATA(IP4_10_8, SD3_CMD),
948 PINMUX_IPSR_MODSEL_DATA(IP4_10_8, RX3_E_IRDA_RX_E, SEL_SCIF3_4),
949 PINMUX_IPSR_DATA(IP4_10_8, AUDSYNC),
950 PINMUX_IPSR_MODSEL_DATA(IP4_10_8, CTS0_D, SEL_SCIF0_3),
951 PINMUX_IPSR_DATA(IP4_11, DU1_DR2),
952 PINMUX_IPSR_DATA(IP4_11, VI2_G0),
953 PINMUX_IPSR_DATA(IP4_12, DU1_DR3),
954 PINMUX_IPSR_DATA(IP4_12, VI2_G1),
955 PINMUX_IPSR_DATA(IP4_13, DU1_DR4),
956 PINMUX_IPSR_DATA(IP4_13, VI2_G2),
957 PINMUX_IPSR_DATA(IP4_14, DU1_DR5),
958 PINMUX_IPSR_DATA(IP4_14, VI2_G3),
959 PINMUX_IPSR_DATA(IP4_15, DU1_DR6),
960 PINMUX_IPSR_DATA(IP4_15, VI2_G4),
961 PINMUX_IPSR_DATA(IP4_16, DU1_DR7),
962 PINMUX_IPSR_DATA(IP4_16, VI2_G5),
963 PINMUX_IPSR_DATA(IP4_19_17, DU1_DG0),
964 PINMUX_IPSR_DATA(IP4_19_17, VI2_DATA2_VI2_B2),
965 PINMUX_IPSR_MODSEL_DATA(IP4_19_17, SCL1_B, SEL_I2C1_1),
966 PINMUX_IPSR_DATA(IP4_19_17, SD3_DAT2),
967 PINMUX_IPSR_MODSEL_DATA(IP4_19_17, SCK3_E, SEL_SCIF3_4),
968 PINMUX_IPSR_DATA(IP4_19_17, AUDATA6),
969 PINMUX_IPSR_DATA(IP4_19_17, TX0_D),
970 PINMUX_IPSR_DATA(IP4_22_20, DU1_DG1),
971 PINMUX_IPSR_DATA(IP4_22_20, VI2_DATA3_VI2_B3),
972 PINMUX_IPSR_MODSEL_DATA(IP4_22_20, SDA1_B, SEL_I2C1_1),
973 PINMUX_IPSR_DATA(IP4_22_20, SD3_DAT3),
974 PINMUX_IPSR_MODSEL_DATA(IP4_22_20, SCK5, SEL_SCIF5_0),
975 PINMUX_IPSR_DATA(IP4_22_20, AUDATA7),
976 PINMUX_IPSR_MODSEL_DATA(IP4_22_20, RX0_D, SEL_SCIF0_3),
977 PINMUX_IPSR_DATA(IP4_23, DU1_DG2),
978 PINMUX_IPSR_DATA(IP4_23, VI2_G6),
979 PINMUX_IPSR_DATA(IP4_24, DU1_DG3),
980 PINMUX_IPSR_DATA(IP4_24, VI2_G7),
981 PINMUX_IPSR_DATA(IP4_25, DU1_DG4),
982 PINMUX_IPSR_DATA(IP4_25, VI2_R0),
983 PINMUX_IPSR_DATA(IP4_26, DU1_DG5),
984 PINMUX_IPSR_DATA(IP4_26, VI2_R1),
985 PINMUX_IPSR_DATA(IP4_27, DU1_DG6),
986 PINMUX_IPSR_DATA(IP4_27, VI2_R2),
987 PINMUX_IPSR_DATA(IP4_28, DU1_DG7),
988 PINMUX_IPSR_DATA(IP4_28, VI2_R3),
989 PINMUX_IPSR_DATA(IP4_31_29, DU1_DB0),
990 PINMUX_IPSR_DATA(IP4_31_29, VI2_DATA4_VI2_B4),
991 PINMUX_IPSR_MODSEL_DATA(IP4_31_29, SCL2_B, SEL_I2C2_1),
992 PINMUX_IPSR_DATA(IP4_31_29, SD3_DAT0),
993 PINMUX_IPSR_DATA(IP4_31_29, TX5),
994 PINMUX_IPSR_MODSEL_DATA(IP4_31_29, SCK0_D, SEL_SCIF0_3),
995
996 PINMUX_IPSR_DATA(IP5_2_0, DU1_DB1),
997 PINMUX_IPSR_DATA(IP5_2_0, VI2_DATA5_VI2_B5),
998 PINMUX_IPSR_MODSEL_DATA(IP5_2_0, SDA2_B, SEL_I2C2_1),
999 PINMUX_IPSR_DATA(IP5_2_0, SD3_DAT1),
1000 PINMUX_IPSR_MODSEL_DATA(IP5_2_0, RX5, SEL_SCIF5_0),
1001 PINMUX_IPSR_MODSEL_DATA(IP5_2_0, RTS0_D_TANS_D, SEL_SCIF0_3),
1002 PINMUX_IPSR_DATA(IP5_3, DU1_DB2),
1003 PINMUX_IPSR_DATA(IP5_3, VI2_R4),
1004 PINMUX_IPSR_DATA(IP5_4, DU1_DB3),
1005 PINMUX_IPSR_DATA(IP5_4, VI2_R5),
1006 PINMUX_IPSR_DATA(IP5_5, DU1_DB4),
1007 PINMUX_IPSR_DATA(IP5_5, VI2_R6),
1008 PINMUX_IPSR_DATA(IP5_6, DU1_DB5),
1009 PINMUX_IPSR_DATA(IP5_6, VI2_R7),
1010 PINMUX_IPSR_DATA(IP5_7, DU1_DB6),
1011 PINMUX_IPSR_MODSEL_DATA(IP5_7, SCL2_D, SEL_I2C2_3),
1012 PINMUX_IPSR_DATA(IP5_8, DU1_DB7),
1013 PINMUX_IPSR_MODSEL_DATA(IP5_8, SDA2_D, SEL_I2C2_3),
1014 PINMUX_IPSR_DATA(IP5_10_9, DU1_DOTCLKIN),
1015 PINMUX_IPSR_DATA(IP5_10_9, VI2_CLKENB),
1016 PINMUX_IPSR_MODSEL_DATA(IP5_10_9, HSPI_CS1, SEL_HSPI1_0),
1017 PINMUX_IPSR_MODSEL_DATA(IP5_10_9, SCL1_D, SEL_I2C1_3),
1018 PINMUX_IPSR_DATA(IP5_12_11, DU1_DOTCLKOUT),
1019 PINMUX_IPSR_DATA(IP5_12_11, VI2_FIELD),
1020 PINMUX_IPSR_MODSEL_DATA(IP5_12_11, SDA1_D, SEL_I2C1_3),
1021 PINMUX_IPSR_DATA(IP5_14_13, DU1_EXHSYNC_DU1_HSYNC),
1022 PINMUX_IPSR_DATA(IP5_14_13, VI2_HSYNC),
1023 PINMUX_IPSR_DATA(IP5_14_13, VI3_HSYNC),
1024 PINMUX_IPSR_DATA(IP5_16_15, DU1_EXVSYNC_DU1_VSYNC),
1025 PINMUX_IPSR_DATA(IP5_16_15, VI2_VSYNC),
1026 PINMUX_IPSR_DATA(IP5_16_15, VI3_VSYNC),
1027 PINMUX_IPSR_DATA(IP5_20_17, DU1_EXODDF_DU1_ODDF_DISP_CDE),
1028 PINMUX_IPSR_DATA(IP5_20_17, VI2_CLK),
1029 PINMUX_IPSR_DATA(IP5_20_17, TX3_B_IRDA_TX_B),
1030 PINMUX_IPSR_DATA(IP5_20_17, SD3_CD),
1031 PINMUX_IPSR_DATA(IP5_20_17, HSPI_TX1),
1032 PINMUX_IPSR_DATA(IP5_20_17, VI1_CLKENB),
1033 PINMUX_IPSR_DATA(IP5_20_17, VI3_CLKENB),
1034 PINMUX_IPSR_DATA(IP5_20_17, AUDIO_CLKC),
1035 PINMUX_IPSR_DATA(IP5_20_17, TX2_D),
1036 PINMUX_IPSR_DATA(IP5_20_17, SPEEDIN),
1037 PINMUX_IPSR_MODSEL_DATA(IP5_20_17, GPS_SIGN_D, SEL_GPS_3),
1038 PINMUX_IPSR_DATA(IP5_23_21, DU1_DISP),
1039 PINMUX_IPSR_DATA(IP5_23_21, VI2_DATA6_VI2_B6),
1040 PINMUX_IPSR_MODSEL_DATA(IP5_23_21, TCLK0, SEL_TMU0_0),
1041 PINMUX_IPSR_DATA(IP5_23_21, QSTVA_B_QVS_B),
1042 PINMUX_IPSR_MODSEL_DATA(IP5_23_21, HSPI_CLK1, SEL_HSPI1_0),
1043 PINMUX_IPSR_MODSEL_DATA(IP5_23_21, SCK2_D, SEL_SCIF2_3),
1044 PINMUX_IPSR_DATA(IP5_23_21, AUDIO_CLKOUT_B),
1045 PINMUX_IPSR_MODSEL_DATA(IP5_23_21, GPS_MAG_D, SEL_GPS_3),
1046 PINMUX_IPSR_DATA(IP5_27_24, DU1_CDE),
1047 PINMUX_IPSR_DATA(IP5_27_24, VI2_DATA7_VI2_B7),
1048 PINMUX_IPSR_MODSEL_DATA(IP5_27_24, RX3_B_IRDA_RX_B, SEL_SCIF3_1),
1049 PINMUX_IPSR_DATA(IP5_27_24, SD3_WP),
1050 PINMUX_IPSR_MODSEL_DATA(IP5_27_24, HSPI_RX1, SEL_HSPI1_0),
1051 PINMUX_IPSR_DATA(IP5_27_24, VI1_FIELD),
1052 PINMUX_IPSR_DATA(IP5_27_24, VI3_FIELD),
1053 PINMUX_IPSR_DATA(IP5_27_24, AUDIO_CLKOUT),
1054 PINMUX_IPSR_MODSEL_DATA(IP5_27_24, RX2_D, SEL_SCIF2_3),
1055 PINMUX_IPSR_MODSEL_DATA(IP5_27_24, GPS_CLK_C, SEL_GPS_2),
1056 PINMUX_IPSR_MODSEL_DATA(IP5_27_24, GPS_CLK_D, SEL_GPS_3),
1057 PINMUX_IPSR_DATA(IP5_28, AUDIO_CLKA),
1058 PINMUX_IPSR_DATA(IP5_28, CAN_TXCLK),
1059 PINMUX_IPSR_DATA(IP5_30_29, AUDIO_CLKB),
1060 PINMUX_IPSR_DATA(IP5_30_29, USB_OVC2),
1061 PINMUX_IPSR_DATA(IP5_30_29, CAN_DEBUGOUT0),
1062 PINMUX_IPSR_DATA(IP5_30_29, MOUT0),
1063
1064 PINMUX_IPSR_DATA(IP6_1_0, SSI_SCK0129),
1065 PINMUX_IPSR_DATA(IP6_1_0, CAN_DEBUGOUT1),
1066 PINMUX_IPSR_DATA(IP6_1_0, MOUT1),
1067 PINMUX_IPSR_DATA(IP6_3_2, SSI_WS0129),
1068 PINMUX_IPSR_DATA(IP6_3_2, CAN_DEBUGOUT2),
1069 PINMUX_IPSR_DATA(IP6_3_2, MOUT2),
1070 PINMUX_IPSR_DATA(IP6_5_4, SSI_SDATA0),
1071 PINMUX_IPSR_DATA(IP6_5_4, CAN_DEBUGOUT3),
1072 PINMUX_IPSR_DATA(IP6_5_4, MOUT5),
1073 PINMUX_IPSR_DATA(IP6_7_6, SSI_SDATA1),
1074 PINMUX_IPSR_DATA(IP6_7_6, CAN_DEBUGOUT4),
1075 PINMUX_IPSR_DATA(IP6_7_6, MOUT6),
1076 PINMUX_IPSR_DATA(IP6_8, SSI_SDATA2),
1077 PINMUX_IPSR_DATA(IP6_8, CAN_DEBUGOUT5),
1078 PINMUX_IPSR_DATA(IP6_11_9, SSI_SCK34),
1079 PINMUX_IPSR_DATA(IP6_11_9, CAN_DEBUGOUT6),
1080 PINMUX_IPSR_DATA(IP6_11_9, CAN0_TX_B),
1081 PINMUX_IPSR_MODSEL_DATA(IP6_11_9, IERX, SEL_IE_0),
1082 PINMUX_IPSR_MODSEL_DATA(IP6_11_9, SSI_SCK9_C, SEL_SSI9_2),
1083 PINMUX_IPSR_DATA(IP6_14_12, SSI_WS34),
1084 PINMUX_IPSR_DATA(IP6_14_12, CAN_DEBUGOUT7),
1085 PINMUX_IPSR_MODSEL_DATA(IP6_14_12, CAN0_RX_B, SEL_CAN0_1),
1086 PINMUX_IPSR_DATA(IP6_14_12, IETX),
1087 PINMUX_IPSR_MODSEL_DATA(IP6_14_12, SSI_WS9_C, SEL_SSI9_2),
1088 PINMUX_IPSR_DATA(IP6_17_15, SSI_SDATA3),
1089 PINMUX_IPSR_DATA(IP6_17_15, PWM0_C),
1090 PINMUX_IPSR_DATA(IP6_17_15, CAN_DEBUGOUT8),
1091 PINMUX_IPSR_MODSEL_DATA(IP6_17_15, CAN_CLK_B, SEL_CANCLK_1),
1092 PINMUX_IPSR_MODSEL_DATA(IP6_17_15, IECLK, SEL_IE_0),
1093 PINMUX_IPSR_MODSEL_DATA(IP6_17_15, SCIF_CLK_B, SEL_SCIF_1),
1094 PINMUX_IPSR_MODSEL_DATA(IP6_17_15, TCLK0_B, SEL_TMU0_1),
1095 PINMUX_IPSR_DATA(IP6_19_18, SSI_SDATA4),
1096 PINMUX_IPSR_DATA(IP6_19_18, CAN_DEBUGOUT9),
1097 PINMUX_IPSR_MODSEL_DATA(IP6_19_18, SSI_SDATA9_C, SEL_SSI9_2),
1098 PINMUX_IPSR_DATA(IP6_22_20, SSI_SCK5),
1099 PINMUX_IPSR_DATA(IP6_22_20, ADICLK),
1100 PINMUX_IPSR_DATA(IP6_22_20, CAN_DEBUGOUT10),
1101 PINMUX_IPSR_MODSEL_DATA(IP6_22_20, SCK3, SEL_SCIF3_0),
1102 PINMUX_IPSR_MODSEL_DATA(IP6_22_20, TCLK0_D, SEL_TMU0_3),
1103 PINMUX_IPSR_DATA(IP6_24_23, SSI_WS5),
1104 PINMUX_IPSR_MODSEL_DATA(IP6_24_23, ADICS_SAMP, SEL_ADI_0),
1105 PINMUX_IPSR_DATA(IP6_24_23, CAN_DEBUGOUT11),
1106 PINMUX_IPSR_DATA(IP6_24_23, TX3_IRDA_TX),
1107 PINMUX_IPSR_DATA(IP6_26_25, SSI_SDATA5),
1108 PINMUX_IPSR_MODSEL_DATA(IP6_26_25, ADIDATA, SEL_ADI_0),
1109 PINMUX_IPSR_DATA(IP6_26_25, CAN_DEBUGOUT12),
1110 PINMUX_IPSR_MODSEL_DATA(IP6_26_25, RX3_IRDA_RX, SEL_SCIF3_0),
1111 PINMUX_IPSR_DATA(IP6_30_29, SSI_SCK6),
1112 PINMUX_IPSR_DATA(IP6_30_29, ADICHS0),
1113 PINMUX_IPSR_DATA(IP6_30_29, CAN0_TX),
1114 PINMUX_IPSR_MODSEL_DATA(IP6_30_29, IERX_B, SEL_IE_1),
1115
1116 PINMUX_IPSR_DATA(IP7_1_0, SSI_WS6),
1117 PINMUX_IPSR_DATA(IP7_1_0, ADICHS1),
1118 PINMUX_IPSR_MODSEL_DATA(IP7_1_0, CAN0_RX, SEL_CAN0_0),
1119 PINMUX_IPSR_DATA(IP7_1_0, IETX_B),
1120 PINMUX_IPSR_DATA(IP7_3_2, SSI_SDATA6),
1121 PINMUX_IPSR_DATA(IP7_3_2, ADICHS2),
1122 PINMUX_IPSR_MODSEL_DATA(IP7_3_2, CAN_CLK, SEL_CANCLK_0),
1123 PINMUX_IPSR_MODSEL_DATA(IP7_3_2, IECLK_B, SEL_IE_1),
1124 PINMUX_IPSR_MODSEL_DATA(IP7_6_4, SSI_SCK78, SEL_SSI7_0),
1125 PINMUX_IPSR_DATA(IP7_6_4, CAN_DEBUGOUT13),
1126 PINMUX_IPSR_MODSEL_DATA(IP7_6_4, IRQ0_B, SEL_INT0_1),
1127 PINMUX_IPSR_MODSEL_DATA(IP7_6_4, SSI_SCK9_B, SEL_SSI9_1),
1128 PINMUX_IPSR_MODSEL_DATA(IP7_6_4, HSPI_CLK1_C, SEL_HSPI1_2),
1129 PINMUX_IPSR_MODSEL_DATA(IP7_9_7, SSI_WS78, SEL_SSI7_0),
1130 PINMUX_IPSR_DATA(IP7_9_7, CAN_DEBUGOUT14),
1131 PINMUX_IPSR_MODSEL_DATA(IP7_9_7, IRQ1_B, SEL_INT1_1),
1132 PINMUX_IPSR_MODSEL_DATA(IP7_9_7, SSI_WS9_B, SEL_SSI9_1),
1133 PINMUX_IPSR_MODSEL_DATA(IP7_9_7, HSPI_CS1_C, SEL_HSPI1_2),
1134 PINMUX_IPSR_MODSEL_DATA(IP7_12_10, SSI_SDATA7, SEL_SSI7_0),
1135 PINMUX_IPSR_DATA(IP7_12_10, CAN_DEBUGOUT15),
1136 PINMUX_IPSR_MODSEL_DATA(IP7_12_10, IRQ2_B, SEL_INT2_1),
1137 PINMUX_IPSR_MODSEL_DATA(IP7_12_10, TCLK1_C, SEL_TMU1_2),
1138 PINMUX_IPSR_DATA(IP7_12_10, HSPI_TX1_C),
1139 PINMUX_IPSR_MODSEL_DATA(IP7_14_13, SSI_SDATA8, SEL_SSI8_0),
1140 PINMUX_IPSR_DATA(IP7_14_13, VSP),
1141 PINMUX_IPSR_MODSEL_DATA(IP7_14_13, IRQ3_B, SEL_INT3_1),
1142 PINMUX_IPSR_MODSEL_DATA(IP7_14_13, HSPI_RX1_C, SEL_HSPI1_2),
1143 PINMUX_IPSR_DATA(IP7_16_15, SD0_CLK),
1144 PINMUX_IPSR_DATA(IP7_16_15, ATACS01),
1145 PINMUX_IPSR_MODSEL_DATA(IP7_16_15, SCK1_B, SEL_SCIF1_1),
1146 PINMUX_IPSR_DATA(IP7_18_17, SD0_CMD),
1147 PINMUX_IPSR_DATA(IP7_18_17, ATACS11),
1148 PINMUX_IPSR_DATA(IP7_18_17, TX1_B),
1149 PINMUX_IPSR_DATA(IP7_18_17, CC5_TDO),
1150 PINMUX_IPSR_DATA(IP7_20_19, SD0_DAT0),
1151 PINMUX_IPSR_DATA(IP7_20_19, ATADIR1),
1152 PINMUX_IPSR_MODSEL_DATA(IP7_20_19, RX1_B, SEL_SCIF1_1),
1153 PINMUX_IPSR_DATA(IP7_20_19, CC5_TRST),
1154 PINMUX_IPSR_DATA(IP7_22_21, SD0_DAT1),
1155 PINMUX_IPSR_DATA(IP7_22_21, ATAG1),
1156 PINMUX_IPSR_MODSEL_DATA(IP7_22_21, SCK2_B, SEL_SCIF2_1),
1157 PINMUX_IPSR_DATA(IP7_22_21, CC5_TMS),
1158 PINMUX_IPSR_DATA(IP7_24_23, SD0_DAT2),
1159 PINMUX_IPSR_DATA(IP7_24_23, ATARD1),
1160 PINMUX_IPSR_DATA(IP7_24_23, TX2_B),
1161 PINMUX_IPSR_DATA(IP7_24_23, CC5_TCK),
1162 PINMUX_IPSR_DATA(IP7_26_25, SD0_DAT3),
1163 PINMUX_IPSR_DATA(IP7_26_25, ATAWR1),
1164 PINMUX_IPSR_MODSEL_DATA(IP7_26_25, RX2_B, SEL_SCIF2_1),
1165 PINMUX_IPSR_DATA(IP7_26_25, CC5_TDI),
1166 PINMUX_IPSR_DATA(IP7_28_27, SD0_CD),
1167 PINMUX_IPSR_MODSEL_DATA(IP7_28_27, DREQ2, SEL_EXBUS2_0),
1168 PINMUX_IPSR_MODSEL_DATA(IP7_28_27, RTS1_B_TANS_B, SEL_SCIF1_1),
1169 PINMUX_IPSR_DATA(IP7_30_29, SD0_WP),
1170 PINMUX_IPSR_DATA(IP7_30_29, DACK2),
1171 PINMUX_IPSR_MODSEL_DATA(IP7_30_29, CTS1_B, SEL_SCIF1_1),
1172
1173 PINMUX_IPSR_DATA(IP8_3_0, HSPI_CLK0),
1174 PINMUX_IPSR_MODSEL_DATA(IP8_3_0, CTS0, SEL_SCIF0_0),
1175 PINMUX_IPSR_DATA(IP8_3_0, USB_OVC0),
1176 PINMUX_IPSR_DATA(IP8_3_0, AD_CLK),
1177 PINMUX_IPSR_DATA(IP8_3_0, CC5_STATE4),
1178 PINMUX_IPSR_DATA(IP8_3_0, CC5_STATE12),
1179 PINMUX_IPSR_DATA(IP8_3_0, CC5_STATE20),
1180 PINMUX_IPSR_DATA(IP8_3_0, CC5_STATE28),
1181 PINMUX_IPSR_DATA(IP8_3_0, CC5_STATE36),
1182 PINMUX_IPSR_DATA(IP8_7_4, HSPI_CS0),
1183 PINMUX_IPSR_MODSEL_DATA(IP8_7_4, RTS0_TANS, SEL_SCIF0_0),
1184 PINMUX_IPSR_DATA(IP8_7_4, USB_OVC1),
1185 PINMUX_IPSR_DATA(IP8_7_4, AD_DI),
1186 PINMUX_IPSR_DATA(IP8_7_4, CC5_STATE5),
1187 PINMUX_IPSR_DATA(IP8_7_4, CC5_STATE13),
1188 PINMUX_IPSR_DATA(IP8_7_4, CC5_STATE21),
1189 PINMUX_IPSR_DATA(IP8_7_4, CC5_STATE29),
1190 PINMUX_IPSR_DATA(IP8_7_4, CC5_STATE37),
1191 PINMUX_IPSR_DATA(IP8_11_8, HSPI_TX0),
1192 PINMUX_IPSR_DATA(IP8_11_8, TX0),
1193 PINMUX_IPSR_DATA(IP8_11_8, CAN_DEBUG_HW_TRIGGER),
1194 PINMUX_IPSR_DATA(IP8_11_8, AD_DO),
1195 PINMUX_IPSR_DATA(IP8_11_8, CC5_STATE6),
1196 PINMUX_IPSR_DATA(IP8_11_8, CC5_STATE14),
1197 PINMUX_IPSR_DATA(IP8_11_8, CC5_STATE22),
1198 PINMUX_IPSR_DATA(IP8_11_8, CC5_STATE30),
1199 PINMUX_IPSR_DATA(IP8_11_8, CC5_STATE38),
1200 PINMUX_IPSR_DATA(IP8_15_12, HSPI_RX0),
1201 PINMUX_IPSR_MODSEL_DATA(IP8_15_12, RX0, SEL_SCIF0_0),
1202 PINMUX_IPSR_DATA(IP8_15_12, CAN_STEP0),
1203 PINMUX_IPSR_DATA(IP8_15_12, AD_NCS),
1204 PINMUX_IPSR_DATA(IP8_15_12, CC5_STATE7),
1205 PINMUX_IPSR_DATA(IP8_15_12, CC5_STATE15),
1206 PINMUX_IPSR_DATA(IP8_15_12, CC5_STATE23),
1207 PINMUX_IPSR_DATA(IP8_15_12, CC5_STATE31),
1208 PINMUX_IPSR_DATA(IP8_15_12, CC5_STATE39),
1209 PINMUX_IPSR_DATA(IP8_17_16, FMCLK),
1210 PINMUX_IPSR_DATA(IP8_17_16, RDS_CLK),
1211 PINMUX_IPSR_DATA(IP8_17_16, PCMOE),
1212 PINMUX_IPSR_DATA(IP8_18, BPFCLK),
1213 PINMUX_IPSR_DATA(IP8_18, PCMWE),
1214 PINMUX_IPSR_DATA(IP8_19, FMIN),
1215 PINMUX_IPSR_DATA(IP8_19, RDS_DATA),
1216 PINMUX_IPSR_DATA(IP8_20, VI0_CLK),
1217 PINMUX_IPSR_DATA(IP8_20, MMC1_CLK),
1218 PINMUX_IPSR_DATA(IP8_22_21, VI0_CLKENB),
1219 PINMUX_IPSR_DATA(IP8_22_21, TX1_C),
1220 PINMUX_IPSR_DATA(IP8_22_21, HTX1_B),
1221 PINMUX_IPSR_DATA(IP8_22_21, MT1_SYNC),
1222 PINMUX_IPSR_DATA(IP8_24_23, VI0_FIELD),
1223 PINMUX_IPSR_MODSEL_DATA(IP8_24_23, RX1_C, SEL_SCIF1_2),
1224 PINMUX_IPSR_MODSEL_DATA(IP8_24_23, HRX1_B, SEL_HSCIF1_1),
1225 PINMUX_IPSR_DATA(IP8_27_25, VI0_HSYNC),
1226 PINMUX_IPSR_MODSEL_DATA(IP8_27_25, VI0_DATA0_B_VI0_B0_B, SEL_VI0_1),
1227 PINMUX_IPSR_MODSEL_DATA(IP8_27_25, CTS1_C, SEL_SCIF1_2),
1228 PINMUX_IPSR_DATA(IP8_27_25, TX4_D),
1229 PINMUX_IPSR_DATA(IP8_27_25, MMC1_CMD),
1230 PINMUX_IPSR_MODSEL_DATA(IP8_27_25, HSCK1_B, SEL_HSCIF1_1),
1231 PINMUX_IPSR_DATA(IP8_30_28, VI0_VSYNC),
1232 PINMUX_IPSR_MODSEL_DATA(IP8_30_28, VI0_DATA1_B_VI0_B1_B, SEL_VI0_1),
1233 PINMUX_IPSR_MODSEL_DATA(IP8_30_28, RTS1_C_TANS_C, SEL_SCIF1_2),
1234 PINMUX_IPSR_MODSEL_DATA(IP8_30_28, RX4_D, SEL_SCIF4_3),
1235 PINMUX_IPSR_MODSEL_DATA(IP8_30_28, PWMFSW0_C, SEL_PWMFSW_2),
1236
1237 PINMUX_IPSR_MODSEL_DATA(IP9_1_0, VI0_DATA0_VI0_B0, SEL_VI0_0),
1238 PINMUX_IPSR_MODSEL_DATA(IP9_1_0, HRTS1_B, SEL_HSCIF1_1),
1239 PINMUX_IPSR_DATA(IP9_1_0, MT1_VCXO),
1240 PINMUX_IPSR_MODSEL_DATA(IP9_3_2, VI0_DATA1_VI0_B1, SEL_VI0_0),
1241 PINMUX_IPSR_MODSEL_DATA(IP9_3_2, HCTS1_B, SEL_HSCIF1_1),
1242 PINMUX_IPSR_DATA(IP9_3_2, MT1_PWM),
1243 PINMUX_IPSR_DATA(IP9_4, VI0_DATA2_VI0_B2),
1244 PINMUX_IPSR_DATA(IP9_4, MMC1_D0),
1245 PINMUX_IPSR_DATA(IP9_5, VI0_DATA3_VI0_B3),
1246 PINMUX_IPSR_DATA(IP9_5, MMC1_D1),
1247 PINMUX_IPSR_DATA(IP9_6, VI0_DATA4_VI0_B4),
1248 PINMUX_IPSR_DATA(IP9_6, MMC1_D2),
1249 PINMUX_IPSR_DATA(IP9_7, VI0_DATA5_VI0_B5),
1250 PINMUX_IPSR_DATA(IP9_7, MMC1_D3),
1251 PINMUX_IPSR_DATA(IP9_9_8, VI0_DATA6_VI0_B6),
1252 PINMUX_IPSR_DATA(IP9_9_8, MMC1_D4),
1253 PINMUX_IPSR_DATA(IP9_9_8, ARM_TRACEDATA_0),
1254 PINMUX_IPSR_DATA(IP9_11_10, VI0_DATA7_VI0_B7),
1255 PINMUX_IPSR_DATA(IP9_11_10, MMC1_D5),
1256 PINMUX_IPSR_DATA(IP9_11_10, ARM_TRACEDATA_1),
1257 PINMUX_IPSR_DATA(IP9_13_12, VI0_G0),
1258 PINMUX_IPSR_MODSEL_DATA(IP9_13_12, SSI_SCK78_C, SEL_SSI7_2),
1259 PINMUX_IPSR_MODSEL_DATA(IP9_13_12, IRQ0, SEL_INT0_0),
1260 PINMUX_IPSR_DATA(IP9_13_12, ARM_TRACEDATA_2),
1261 PINMUX_IPSR_DATA(IP9_15_14, VI0_G1),
1262 PINMUX_IPSR_MODSEL_DATA(IP9_15_14, SSI_WS78_C, SEL_SSI7_2),
1263 PINMUX_IPSR_MODSEL_DATA(IP9_15_14, IRQ1, SEL_INT1_0),
1264 PINMUX_IPSR_DATA(IP9_15_14, ARM_TRACEDATA_3),
1265 PINMUX_IPSR_DATA(IP9_18_16, VI0_G2),
1266 PINMUX_IPSR_DATA(IP9_18_16, ETH_TXD1),
1267 PINMUX_IPSR_DATA(IP9_18_16, MMC1_D6),
1268 PINMUX_IPSR_DATA(IP9_18_16, ARM_TRACEDATA_4),
1269 PINMUX_IPSR_DATA(IP9_18_16, TS_SPSYNC0),
1270 PINMUX_IPSR_DATA(IP9_21_19, VI0_G3),
1271 PINMUX_IPSR_DATA(IP9_21_19, ETH_CRS_DV),
1272 PINMUX_IPSR_DATA(IP9_21_19, MMC1_D7),
1273 PINMUX_IPSR_DATA(IP9_21_19, ARM_TRACEDATA_5),
1274 PINMUX_IPSR_DATA(IP9_21_19, TS_SDAT0),
1275 PINMUX_IPSR_DATA(IP9_23_22, VI0_G4),
1276 PINMUX_IPSR_DATA(IP9_23_22, ETH_TX_EN),
1277 PINMUX_IPSR_MODSEL_DATA(IP9_23_22, SD2_DAT0_B, SEL_SD2_1),
1278 PINMUX_IPSR_DATA(IP9_23_22, ARM_TRACEDATA_6),
1279 PINMUX_IPSR_DATA(IP9_25_24, VI0_G5),
1280 PINMUX_IPSR_DATA(IP9_25_24, ETH_RX_ER),
1281 PINMUX_IPSR_MODSEL_DATA(IP9_25_24, SD2_DAT1_B, SEL_SD2_1),
1282 PINMUX_IPSR_DATA(IP9_25_24, ARM_TRACEDATA_7),
1283 PINMUX_IPSR_DATA(IP9_27_26, VI0_G6),
1284 PINMUX_IPSR_DATA(IP9_27_26, ETH_RXD0),
1285 PINMUX_IPSR_MODSEL_DATA(IP9_27_26, SD2_DAT2_B, SEL_SD2_1),
1286 PINMUX_IPSR_DATA(IP9_27_26, ARM_TRACEDATA_8),
1287 PINMUX_IPSR_DATA(IP9_29_28, VI0_G7),
1288 PINMUX_IPSR_DATA(IP9_29_28, ETH_RXD1),
1289 PINMUX_IPSR_MODSEL_DATA(IP9_29_28, SD2_DAT3_B, SEL_SD2_1),
1290 PINMUX_IPSR_DATA(IP9_29_28, ARM_TRACEDATA_9),
1291
1292 PINMUX_IPSR_DATA(IP10_2_0, VI0_R0),
1293 PINMUX_IPSR_MODSEL_DATA(IP10_2_0, SSI_SDATA7_C, SEL_SSI7_2),
1294 PINMUX_IPSR_MODSEL_DATA(IP10_2_0, SCK1_C, SEL_SCIF1_2),
1295 PINMUX_IPSR_MODSEL_DATA(IP10_2_0, DREQ1_B, SEL_EXBUS1_0),
1296 PINMUX_IPSR_DATA(IP10_2_0, ARM_TRACEDATA_10),
1297 PINMUX_IPSR_MODSEL_DATA(IP10_2_0, DREQ0_C, SEL_EXBUS0_2),
1298 PINMUX_IPSR_DATA(IP10_5_3, VI0_R1),
1299 PINMUX_IPSR_MODSEL_DATA(IP10_5_3, SSI_SDATA8_C, SEL_SSI8_2),
1300 PINMUX_IPSR_DATA(IP10_5_3, DACK1_B),
1301 PINMUX_IPSR_DATA(IP10_5_3, ARM_TRACEDATA_11),
1302 PINMUX_IPSR_DATA(IP10_5_3, DACK0_C),
1303 PINMUX_IPSR_DATA(IP10_5_3, DRACK0_C),
1304 PINMUX_IPSR_DATA(IP10_8_6, VI0_R2),
1305 PINMUX_IPSR_DATA(IP10_8_6, ETH_LINK),
1306 PINMUX_IPSR_DATA(IP10_8_6, SD2_CLK_B),
1307 PINMUX_IPSR_MODSEL_DATA(IP10_8_6, IRQ2, SEL_INT2_0),
1308 PINMUX_IPSR_DATA(IP10_8_6, ARM_TRACEDATA_12),
1309 PINMUX_IPSR_DATA(IP10_11_9, VI0_R3),
1310 PINMUX_IPSR_DATA(IP10_11_9, ETH_MAGIC),
1311 PINMUX_IPSR_MODSEL_DATA(IP10_11_9, SD2_CMD_B, SEL_SD2_1),
1312 PINMUX_IPSR_MODSEL_DATA(IP10_11_9, IRQ3, SEL_INT3_0),
1313 PINMUX_IPSR_DATA(IP10_11_9, ARM_TRACEDATA_13),
1314 PINMUX_IPSR_DATA(IP10_14_12, VI0_R4),
1315 PINMUX_IPSR_DATA(IP10_14_12, ETH_REFCLK),
1316 PINMUX_IPSR_MODSEL_DATA(IP10_14_12, SD2_CD_B, SEL_SD2_1),
1317 PINMUX_IPSR_MODSEL_DATA(IP10_14_12, HSPI_CLK1_B, SEL_HSPI1_1),
1318 PINMUX_IPSR_DATA(IP10_14_12, ARM_TRACEDATA_14),
1319 PINMUX_IPSR_DATA(IP10_14_12, MT1_CLK),
1320 PINMUX_IPSR_DATA(IP10_14_12, TS_SCK0),
1321 PINMUX_IPSR_DATA(IP10_17_15, VI0_R5),
1322 PINMUX_IPSR_DATA(IP10_17_15, ETH_TXD0),
1323 PINMUX_IPSR_MODSEL_DATA(IP10_17_15, SD2_WP_B, SEL_SD2_1),
1324 PINMUX_IPSR_MODSEL_DATA(IP10_17_15, HSPI_CS1_B, SEL_HSPI1_1),
1325 PINMUX_IPSR_DATA(IP10_17_15, ARM_TRACEDATA_15),
1326 PINMUX_IPSR_DATA(IP10_17_15, MT1_D),
1327 PINMUX_IPSR_DATA(IP10_17_15, TS_SDEN0),
1328 PINMUX_IPSR_DATA(IP10_20_18, VI0_R6),
1329 PINMUX_IPSR_DATA(IP10_20_18, ETH_MDC),
1330 PINMUX_IPSR_MODSEL_DATA(IP10_20_18, DREQ2_C, SEL_EXBUS2_2),
1331 PINMUX_IPSR_DATA(IP10_20_18, HSPI_TX1_B),
1332 PINMUX_IPSR_DATA(IP10_20_18, TRACECLK),
1333 PINMUX_IPSR_DATA(IP10_20_18, MT1_BEN),
1334 PINMUX_IPSR_MODSEL_DATA(IP10_20_18, PWMFSW0_D, SEL_PWMFSW_3),
1335 PINMUX_IPSR_DATA(IP10_23_21, VI0_R7),
1336 PINMUX_IPSR_DATA(IP10_23_21, ETH_MDIO),
1337 PINMUX_IPSR_DATA(IP10_23_21, DACK2_C),
1338 PINMUX_IPSR_MODSEL_DATA(IP10_23_21, HSPI_RX1_B, SEL_HSPI1_1),
1339 PINMUX_IPSR_MODSEL_DATA(IP10_23_21, SCIF_CLK_D, SEL_SCIF_3),
1340 PINMUX_IPSR_DATA(IP10_23_21, TRACECTL),
1341 PINMUX_IPSR_DATA(IP10_23_21, MT1_PEN),
1342 PINMUX_IPSR_DATA(IP10_25_24, VI1_CLK),
1343 PINMUX_IPSR_MODSEL_DATA(IP10_25_24, SIM_D, SEL_SIM_0),
1344 PINMUX_IPSR_MODSEL_DATA(IP10_25_24, SDA3, SEL_I2C3_0),
1345 PINMUX_IPSR_DATA(IP10_28_26, VI1_HSYNC),
1346 PINMUX_IPSR_DATA(IP10_28_26, VI3_CLK),
1347 PINMUX_IPSR_DATA(IP10_28_26, SSI_SCK4),
1348 PINMUX_IPSR_MODSEL_DATA(IP10_28_26, GPS_SIGN_C, SEL_GPS_2),
1349 PINMUX_IPSR_MODSEL_DATA(IP10_28_26, PWMFSW0_E, SEL_PWMFSW_4),
1350 PINMUX_IPSR_DATA(IP10_31_29, VI1_VSYNC),
1351 PINMUX_IPSR_DATA(IP10_31_29, AUDIO_CLKOUT_C),
1352 PINMUX_IPSR_DATA(IP10_31_29, SSI_WS4),
1353 PINMUX_IPSR_DATA(IP10_31_29, SIM_CLK),
1354 PINMUX_IPSR_MODSEL_DATA(IP10_31_29, GPS_MAG_C, SEL_GPS_2),
1355 PINMUX_IPSR_DATA(IP10_31_29, SPV_TRST),
1356 PINMUX_IPSR_MODSEL_DATA(IP10_31_29, SCL3, SEL_I2C3_0),
1357
1358 PINMUX_IPSR_DATA(IP11_2_0, VI1_DATA0_VI1_B0),
1359 PINMUX_IPSR_MODSEL_DATA(IP11_2_0, SD2_DAT0, SEL_SD2_0),
1360 PINMUX_IPSR_DATA(IP11_2_0, SIM_RST),
1361 PINMUX_IPSR_DATA(IP11_2_0, SPV_TCK),
1362 PINMUX_IPSR_DATA(IP11_2_0, ADICLK_B),
1363 PINMUX_IPSR_DATA(IP11_5_3, VI1_DATA1_VI1_B1),
1364 PINMUX_IPSR_MODSEL_DATA(IP11_5_3, SD2_DAT1, SEL_SD2_0),
1365 PINMUX_IPSR_DATA(IP11_5_3, MT0_CLK),
1366 PINMUX_IPSR_DATA(IP11_5_3, SPV_TMS),
1367 PINMUX_IPSR_MODSEL_DATA(IP11_5_3, ADICS_B_SAMP_B, SEL_ADI_1),
1368 PINMUX_IPSR_DATA(IP11_8_6, VI1_DATA2_VI1_B2),
1369 PINMUX_IPSR_MODSEL_DATA(IP11_8_6, SD2_DAT2, SEL_SD2_0),
1370 PINMUX_IPSR_DATA(IP11_8_6, MT0_D),
1371 PINMUX_IPSR_DATA(IP11_8_6, SPVTDI),
1372 PINMUX_IPSR_MODSEL_DATA(IP11_8_6, ADIDATA_B, SEL_ADI_1),
1373 PINMUX_IPSR_DATA(IP11_11_9, VI1_DATA3_VI1_B3),
1374 PINMUX_IPSR_MODSEL_DATA(IP11_11_9, SD2_DAT3, SEL_SD2_0),
1375 PINMUX_IPSR_DATA(IP11_11_9, MT0_BEN),
1376 PINMUX_IPSR_DATA(IP11_11_9, SPV_TDO),
1377 PINMUX_IPSR_DATA(IP11_11_9, ADICHS0_B),
1378 PINMUX_IPSR_DATA(IP11_14_12, VI1_DATA4_VI1_B4),
1379 PINMUX_IPSR_DATA(IP11_14_12, SD2_CLK),
1380 PINMUX_IPSR_DATA(IP11_14_12, MT0_PEN),
1381 PINMUX_IPSR_DATA(IP11_14_12, SPA_TRST),
1382 PINMUX_IPSR_MODSEL_DATA(IP11_14_12, HSPI_CLK1_D, SEL_HSPI1_3),
1383 PINMUX_IPSR_DATA(IP11_14_12, ADICHS1_B),
1384 PINMUX_IPSR_DATA(IP11_17_15, VI1_DATA5_VI1_B5),
1385 PINMUX_IPSR_MODSEL_DATA(IP11_17_15, SD2_CMD, SEL_SD2_0),
1386 PINMUX_IPSR_DATA(IP11_17_15, MT0_SYNC),
1387 PINMUX_IPSR_DATA(IP11_17_15, SPA_TCK),
1388 PINMUX_IPSR_MODSEL_DATA(IP11_17_15, HSPI_CS1_D, SEL_HSPI1_3),
1389 PINMUX_IPSR_DATA(IP11_17_15, ADICHS2_B),
1390 PINMUX_IPSR_DATA(IP11_20_18, VI1_DATA6_VI1_B6),
1391 PINMUX_IPSR_MODSEL_DATA(IP11_20_18, SD2_CD, SEL_SD2_0),
1392 PINMUX_IPSR_DATA(IP11_20_18, MT0_VCXO),
1393 PINMUX_IPSR_DATA(IP11_20_18, SPA_TMS),
1394 PINMUX_IPSR_DATA(IP11_20_18, HSPI_TX1_D),
1395 PINMUX_IPSR_DATA(IP11_23_21, VI1_DATA7_VI1_B7),
1396 PINMUX_IPSR_MODSEL_DATA(IP11_23_21, SD2_WP, SEL_SD2_0),
1397 PINMUX_IPSR_DATA(IP11_23_21, MT0_PWM),
1398 PINMUX_IPSR_DATA(IP11_23_21, SPA_TDI),
1399 PINMUX_IPSR_MODSEL_DATA(IP11_23_21, HSPI_RX1_D, SEL_HSPI1_3),
1400 PINMUX_IPSR_DATA(IP11_26_24, VI1_G0),
1401 PINMUX_IPSR_DATA(IP11_26_24, VI3_DATA0),
1402 PINMUX_IPSR_DATA(IP11_26_24, DU1_DOTCLKOUT1),
1403 PINMUX_IPSR_DATA(IP11_26_24, TS_SCK1),
1404 PINMUX_IPSR_MODSEL_DATA(IP11_26_24, DREQ2_B, SEL_EXBUS2_1),
1405 PINMUX_IPSR_DATA(IP11_26_24, TX2),
1406 PINMUX_IPSR_DATA(IP11_26_24, SPA_TDO),
1407 PINMUX_IPSR_MODSEL_DATA(IP11_26_24, HCTS0_B, SEL_HSCIF0_1),
1408 PINMUX_IPSR_DATA(IP11_29_27, VI1_G1),
1409 PINMUX_IPSR_DATA(IP11_29_27, VI3_DATA1),
1410 PINMUX_IPSR_DATA(IP11_29_27, SSI_SCK1),
1411 PINMUX_IPSR_DATA(IP11_29_27, TS_SDEN1),
1412 PINMUX_IPSR_DATA(IP11_29_27, DACK2_B),
1413 PINMUX_IPSR_MODSEL_DATA(IP11_29_27, RX2, SEL_SCIF2_0),
1414 PINMUX_IPSR_MODSEL_DATA(IP11_29_27, HRTS0_B, SEL_HSCIF0_1),
1415
1416 PINMUX_IPSR_DATA(IP12_2_0, VI1_G2),
1417 PINMUX_IPSR_DATA(IP12_2_0, VI3_DATA2),
1418 PINMUX_IPSR_DATA(IP12_2_0, SSI_WS1),
1419 PINMUX_IPSR_DATA(IP12_2_0, TS_SPSYNC1),
1420 PINMUX_IPSR_MODSEL_DATA(IP12_2_0, SCK2, SEL_SCIF2_0),
1421 PINMUX_IPSR_MODSEL_DATA(IP12_2_0, HSCK0_B, SEL_HSCIF0_1),
1422 PINMUX_IPSR_DATA(IP12_5_3, VI1_G3),
1423 PINMUX_IPSR_DATA(IP12_5_3, VI3_DATA3),
1424 PINMUX_IPSR_DATA(IP12_5_3, SSI_SCK2),
1425 PINMUX_IPSR_DATA(IP12_5_3, TS_SDAT1),
1426 PINMUX_IPSR_MODSEL_DATA(IP12_5_3, SCL1_C, SEL_I2C1_2),
1427 PINMUX_IPSR_DATA(IP12_5_3, HTX0_B),
1428 PINMUX_IPSR_DATA(IP12_8_6, VI1_G4),
1429 PINMUX_IPSR_DATA(IP12_8_6, VI3_DATA4),
1430 PINMUX_IPSR_DATA(IP12_8_6, SSI_WS2),
1431 PINMUX_IPSR_MODSEL_DATA(IP12_8_6, SDA1_C, SEL_I2C1_2),
1432 PINMUX_IPSR_DATA(IP12_8_6, SIM_RST_B),
1433 PINMUX_IPSR_MODSEL_DATA(IP12_8_6, HRX0_B, SEL_HSCIF0_1),
1434 PINMUX_IPSR_DATA(IP12_11_9, VI1_G5),
1435 PINMUX_IPSR_DATA(IP12_11_9, VI3_DATA5),
1436 PINMUX_IPSR_MODSEL_DATA(IP12_11_9, GPS_CLK, SEL_GPS_0),
1437 PINMUX_IPSR_DATA(IP12_11_9, FSE),
1438 PINMUX_IPSR_DATA(IP12_11_9, TX4_B),
1439 PINMUX_IPSR_MODSEL_DATA(IP12_11_9, SIM_D_B, SEL_SIM_1),
1440 PINMUX_IPSR_DATA(IP12_14_12, VI1_G6),
1441 PINMUX_IPSR_DATA(IP12_14_12, VI3_DATA6),
1442 PINMUX_IPSR_MODSEL_DATA(IP12_14_12, GPS_SIGN, SEL_GPS_0),
1443 PINMUX_IPSR_DATA(IP12_14_12, FRB),
1444 PINMUX_IPSR_MODSEL_DATA(IP12_14_12, RX4_B, SEL_SCIF4_1),
1445 PINMUX_IPSR_DATA(IP12_14_12, SIM_CLK_B),
1446 PINMUX_IPSR_DATA(IP12_17_15, VI1_G7),
1447 PINMUX_IPSR_DATA(IP12_17_15, VI3_DATA7),
1448 PINMUX_IPSR_MODSEL_DATA(IP12_17_15, GPS_MAG, SEL_GPS_0),
1449 PINMUX_IPSR_DATA(IP12_17_15, FCE),
1450 PINMUX_IPSR_MODSEL_DATA(IP12_17_15, SCK4_B, SEL_SCIF4_1),
1451};
1452
1453static struct pinmux_gpio pinmux_gpios[] = {
1454 PINMUX_GPIO_GP_ALL(),
1455 GPIO_FN(AVS1), GPIO_FN(AVS2), GPIO_FN(A17), GPIO_FN(A18),
1456 GPIO_FN(A19),
1457
1458 /* IPSR0 */
1459 GPIO_FN(USB_PENC2), GPIO_FN(SCK0), GPIO_FN(PWM1), GPIO_FN(PWMFSW0),
1460 GPIO_FN(SCIF_CLK), GPIO_FN(TCLK0_C), GPIO_FN(BS), GPIO_FN(SD1_DAT2),
1461 GPIO_FN(MMC0_D2), GPIO_FN(FD2), GPIO_FN(ATADIR0), GPIO_FN(SDSELF),
1462 GPIO_FN(HCTS1), GPIO_FN(TX4_C), GPIO_FN(A0), GPIO_FN(SD1_DAT3),
1463 GPIO_FN(MMC0_D3), GPIO_FN(FD3), GPIO_FN(A20), GPIO_FN(TX5_D),
1464 GPIO_FN(HSPI_TX2_B), GPIO_FN(A21), GPIO_FN(SCK5_D),
1465 GPIO_FN(HSPI_CLK2_B), GPIO_FN(A22), GPIO_FN(RX5_D),
1466 GPIO_FN(HSPI_RX2_B), GPIO_FN(VI1_R0), GPIO_FN(A23), GPIO_FN(FCLE),
1467 GPIO_FN(HSPI_CLK2), GPIO_FN(VI1_R1), GPIO_FN(A24), GPIO_FN(SD1_CD),
1468 GPIO_FN(MMC0_D4), GPIO_FN(FD4), GPIO_FN(HSPI_CS2), GPIO_FN(VI1_R2),
1469 GPIO_FN(SSI_WS78_B), GPIO_FN(A25), GPIO_FN(SD1_WP), GPIO_FN(MMC0_D5),
1470 GPIO_FN(FD5), GPIO_FN(HSPI_RX2), GPIO_FN(VI1_R3), GPIO_FN(TX5_B),
1471 GPIO_FN(SSI_SDATA7_B), GPIO_FN(CTS0_B), GPIO_FN(CLKOUT),
1472 GPIO_FN(TX3C_IRDA_TX_C), GPIO_FN(PWM0_B), GPIO_FN(CS0),
1473 GPIO_FN(HSPI_CS2_B), GPIO_FN(CS1_A26), GPIO_FN(HSPI_TX2),
1474 GPIO_FN(SDSELF_B), GPIO_FN(RD_WR), GPIO_FN(FWE), GPIO_FN(ATAG0),
1475 GPIO_FN(VI1_R7), GPIO_FN(HRTS1), GPIO_FN(RX4_C),
1476
1477 /* IPSR1 */
1478 GPIO_FN(EX_CS0), GPIO_FN(RX3_C_IRDA_RX_C), GPIO_FN(MMC0_D6),
1479 GPIO_FN(FD6), GPIO_FN(EX_CS1), GPIO_FN(MMC0_D7), GPIO_FN(FD7),
1480 GPIO_FN(EX_CS2), GPIO_FN(SD1_CLK), GPIO_FN(MMC0_CLK), GPIO_FN(FALE),
1481 GPIO_FN(ATACS00), GPIO_FN(EX_CS3), GPIO_FN(SD1_CMD), GPIO_FN(MMC0_CMD),
1482 GPIO_FN(FRE), GPIO_FN(ATACS10), GPIO_FN(VI1_R4), GPIO_FN(RX5_B),
1483 GPIO_FN(HSCK1), GPIO_FN(SSI_SDATA8_B), GPIO_FN(RTS0_B_TANS_B),
1484 GPIO_FN(SSI_SDATA9), GPIO_FN(EX_CS4), GPIO_FN(SD1_DAT0),
1485 GPIO_FN(MMC0_D0), GPIO_FN(FD0), GPIO_FN(ATARD0), GPIO_FN(VI1_R5),
1486 GPIO_FN(SCK5_B), GPIO_FN(HTX1), GPIO_FN(TX2_E), GPIO_FN(TX0_B),
1487 GPIO_FN(SSI_SCK9), GPIO_FN(EX_CS5), GPIO_FN(SD1_DAT1),
1488 GPIO_FN(MMC0_D1), GPIO_FN(FD1), GPIO_FN(ATAWR0), GPIO_FN(VI1_R6),
1489 GPIO_FN(HRX1), GPIO_FN(RX2_E), GPIO_FN(RX0_B), GPIO_FN(SSI_WS9),
1490 GPIO_FN(MLB_CLK), GPIO_FN(PWM2), GPIO_FN(SCK4), GPIO_FN(MLB_SIG),
1491 GPIO_FN(PWM3), GPIO_FN(TX4), GPIO_FN(MLB_DAT), GPIO_FN(PWM4),
1492 GPIO_FN(RX4), GPIO_FN(HTX0), GPIO_FN(TX1), GPIO_FN(SDATA),
1493 GPIO_FN(CTS0_C), GPIO_FN(SUB_TCK), GPIO_FN(CC5_STATE2),
1494 GPIO_FN(CC5_STATE10), GPIO_FN(CC5_STATE18), GPIO_FN(CC5_STATE26),
1495 GPIO_FN(CC5_STATE34),
1496
1497 /* IPSR2 */
1498 GPIO_FN(HRX0), GPIO_FN(RX1), GPIO_FN(SCKZ), GPIO_FN(RTS0_C_TANS_C),
1499 GPIO_FN(SUB_TDI), GPIO_FN(CC5_STATE3), GPIO_FN(CC5_STATE11),
1500 GPIO_FN(CC5_STATE19), GPIO_FN(CC5_STATE27), GPIO_FN(CC5_STATE35),
1501 GPIO_FN(HSCK0), GPIO_FN(SCK1), GPIO_FN(MTS), GPIO_FN(PWM5),
1502 GPIO_FN(SCK0_C), GPIO_FN(SSI_SDATA9_B), GPIO_FN(SUB_TDO),
1503 GPIO_FN(CC5_STATE0), GPIO_FN(CC5_STATE8), GPIO_FN(CC5_STATE16),
1504 GPIO_FN(CC5_STATE24), GPIO_FN(CC5_STATE32), GPIO_FN(HCTS0),
1505 GPIO_FN(CTS1), GPIO_FN(STM), GPIO_FN(PWM0_D), GPIO_FN(RX0_C),
1506 GPIO_FN(SCIF_CLK_C), GPIO_FN(SUB_TRST), GPIO_FN(TCLK1_B),
1507 GPIO_FN(CC5_OSCOUT), GPIO_FN(HRTS0), GPIO_FN(RTS1_TANS),
1508 GPIO_FN(MDATA), GPIO_FN(TX0_C), GPIO_FN(SUB_TMS), GPIO_FN(CC5_STATE1),
1509 GPIO_FN(CC5_STATE9), GPIO_FN(CC5_STATE17), GPIO_FN(CC5_STATE25),
1510 GPIO_FN(CC5_STATE33), GPIO_FN(DU0_DR0), GPIO_FN(LCDOUT0),
1511 GPIO_FN(DREQ0), GPIO_FN(GPS_CLK_B), GPIO_FN(AUDATA0),
1512 GPIO_FN(TX5_C), GPIO_FN(DU0_DR1), GPIO_FN(LCDOUT1), GPIO_FN(DACK0),
1513 GPIO_FN(DRACK0), GPIO_FN(GPS_SIGN_B), GPIO_FN(AUDATA1), GPIO_FN(RX5_C),
1514 GPIO_FN(DU0_DR2), GPIO_FN(LCDOUT2), GPIO_FN(DU0_DR3), GPIO_FN(LCDOUT3),
1515 GPIO_FN(DU0_DR4), GPIO_FN(LCDOUT4), GPIO_FN(DU0_DR5), GPIO_FN(LCDOUT5),
1516 GPIO_FN(DU0_DR6), GPIO_FN(LCDOUT6), GPIO_FN(DU0_DR7), GPIO_FN(LCDOUT7),
1517 GPIO_FN(DU0_DG0), GPIO_FN(LCDOUT8), GPIO_FN(DREQ1), GPIO_FN(SCL2),
1518 GPIO_FN(AUDATA2),
1519
1520 /* IPSR3 */
1521 GPIO_FN(DU0_DG1), GPIO_FN(LCDOUT9), GPIO_FN(DACK1), GPIO_FN(SDA2),
1522 GPIO_FN(AUDATA3), GPIO_FN(DU0_DG2), GPIO_FN(LCDOUT10),
1523 GPIO_FN(DU0_DG3), GPIO_FN(LCDOUT11), GPIO_FN(DU0_DG4),
1524 GPIO_FN(LCDOUT12), GPIO_FN(DU0_DG5), GPIO_FN(LCDOUT13),
1525 GPIO_FN(DU0_DG6), GPIO_FN(LCDOUT14), GPIO_FN(DU0_DG7),
1526 GPIO_FN(LCDOUT15), GPIO_FN(DU0_DB0), GPIO_FN(LCDOUT16),
1527 GPIO_FN(EX_WAIT1), GPIO_FN(SCL1), GPIO_FN(TCLK1), GPIO_FN(AUDATA4),
1528 GPIO_FN(DU0_DB1), GPIO_FN(LCDOUT17), GPIO_FN(EX_WAIT2), GPIO_FN(SDA1),
1529 GPIO_FN(GPS_MAG_B), GPIO_FN(AUDATA5), GPIO_FN(SCK5_C),
1530 GPIO_FN(DU0_DB2), GPIO_FN(LCDOUT18), GPIO_FN(DU0_DB3),
1531 GPIO_FN(LCDOUT19), GPIO_FN(DU0_DB4), GPIO_FN(LCDOUT20),
1532 GPIO_FN(DU0_DB5), GPIO_FN(LCDOUT21), GPIO_FN(DU0_DB6),
1533 GPIO_FN(LCDOUT22), GPIO_FN(DU0_DB7), GPIO_FN(LCDOUT23),
1534 GPIO_FN(DU0_DOTCLKIN), GPIO_FN(QSTVA_QVS), GPIO_FN(TX3_D_IRDA_TX_D),
1535 GPIO_FN(SCL3_B), GPIO_FN(DU0_DOTCLKOUT0), GPIO_FN(QCLK),
1536 GPIO_FN(DU0_DOTCLKOUT1), GPIO_FN(QSTVB_QVE), GPIO_FN(RX3_D_IRDA_RX_D),
1537 GPIO_FN(SDA3_B), GPIO_FN(SDA2_C), GPIO_FN(DACK0_B), GPIO_FN(DRACK0_B),
1538 GPIO_FN(DU0_EXHSYNC_DU0_HSYNC), GPIO_FN(QSTH_QHS),
1539 GPIO_FN(DU0_EXVSYNC_DU0_VSYNC), GPIO_FN(QSTB_QHE),
1540 GPIO_FN(DU0_EXODDF_DU0_ODDF_DISP_CDE), GPIO_FN(QCPV_QDE),
1541 GPIO_FN(CAN1_TX), GPIO_FN(TX2_C), GPIO_FN(SCL2_C), GPIO_FN(REMOCON),
1542
1543 /* IPSR4 */
1544 GPIO_FN(DU0_DISP), GPIO_FN(QPOLA), GPIO_FN(CAN_CLK_C), GPIO_FN(SCK2_C),
1545 GPIO_FN(DU0_CDE), GPIO_FN(QPOLB), GPIO_FN(CAN1_RX), GPIO_FN(RX2_C),
1546 GPIO_FN(DREQ0_B), GPIO_FN(SSI_SCK78_B), GPIO_FN(SCK0_B),
1547 GPIO_FN(DU1_DR0), GPIO_FN(VI2_DATA0_VI2_B0), GPIO_FN(PWM6),
1548 GPIO_FN(SD3_CLK), GPIO_FN(TX3_E_IRDA_TX_E), GPIO_FN(AUDCK),
1549 GPIO_FN(PWMFSW0_B), GPIO_FN(DU1_DR1), GPIO_FN(VI2_DATA1_VI2_B1),
1550 GPIO_FN(PWM0), GPIO_FN(SD3_CMD), GPIO_FN(RX3_E_IRDA_RX_E),
1551 GPIO_FN(AUDSYNC), GPIO_FN(CTS0_D), GPIO_FN(DU1_DR2), GPIO_FN(VI2_G0),
1552 GPIO_FN(DU1_DR3), GPIO_FN(VI2_G1), GPIO_FN(DU1_DR4), GPIO_FN(VI2_G2),
1553 GPIO_FN(DU1_DR5), GPIO_FN(VI2_G3), GPIO_FN(DU1_DR6), GPIO_FN(VI2_G4),
1554 GPIO_FN(DU1_DR7), GPIO_FN(VI2_G5), GPIO_FN(DU1_DG0),
1555 GPIO_FN(VI2_DATA2_VI2_B2), GPIO_FN(SCL1_B), GPIO_FN(SD3_DAT2),
1556 GPIO_FN(SCK3_E), GPIO_FN(AUDATA6), GPIO_FN(TX0_D), GPIO_FN(DU1_DG1),
1557 GPIO_FN(VI2_DATA3_VI2_B3), GPIO_FN(SDA1_B), GPIO_FN(SD3_DAT3),
1558 GPIO_FN(SCK5), GPIO_FN(AUDATA7), GPIO_FN(RX0_D), GPIO_FN(DU1_DG2),
1559 GPIO_FN(VI2_G6), GPIO_FN(DU1_DG3), GPIO_FN(VI2_G7), GPIO_FN(DU1_DG4),
1560 GPIO_FN(VI2_R0), GPIO_FN(DU1_DG5), GPIO_FN(VI2_R1), GPIO_FN(DU1_DG6),
1561 GPIO_FN(VI2_R2), GPIO_FN(DU1_DG7), GPIO_FN(VI2_R3), GPIO_FN(DU1_DB0),
1562 GPIO_FN(VI2_DATA4_VI2_B4), GPIO_FN(SCL2_B), GPIO_FN(SD3_DAT0),
1563 GPIO_FN(TX5), GPIO_FN(SCK0_D),
1564
1565 /* IPSR5 */
1566 GPIO_FN(DU1_DB1), GPIO_FN(VI2_DATA5_VI2_B5), GPIO_FN(SDA2_B),
1567 GPIO_FN(SD3_DAT1), GPIO_FN(RX5), GPIO_FN(RTS0_D_TANS_D),
1568 GPIO_FN(DU1_DB2), GPIO_FN(VI2_R4), GPIO_FN(DU1_DB3), GPIO_FN(VI2_R5),
1569 GPIO_FN(DU1_DB4), GPIO_FN(VI2_R6), GPIO_FN(DU1_DB5), GPIO_FN(VI2_R7),
1570 GPIO_FN(DU1_DB6), GPIO_FN(SCL2_D), GPIO_FN(DU1_DB7), GPIO_FN(SDA2_D),
1571 GPIO_FN(DU1_DOTCLKIN), GPIO_FN(VI2_CLKENB), GPIO_FN(HSPI_CS1),
1572 GPIO_FN(SCL1_D), GPIO_FN(DU1_DOTCLKOUT), GPIO_FN(VI2_FIELD),
1573 GPIO_FN(SDA1_D), GPIO_FN(DU1_EXHSYNC_DU1_HSYNC), GPIO_FN(VI2_HSYNC),
1574 GPIO_FN(VI3_HSYNC), GPIO_FN(DU1_EXVSYNC_DU1_VSYNC), GPIO_FN(VI2_VSYNC),
1575 GPIO_FN(VI3_VSYNC), GPIO_FN(DU1_EXODDF_DU1_ODDF_DISP_CDE),
1576 GPIO_FN(VI2_CLK), GPIO_FN(TX3_B_IRDA_TX_B), GPIO_FN(SD3_CD),
1577 GPIO_FN(HSPI_TX1), GPIO_FN(VI1_CLKENB), GPIO_FN(VI3_CLKENB),
1578 GPIO_FN(AUDIO_CLKC), GPIO_FN(TX2_D), GPIO_FN(SPEEDIN),
1579 GPIO_FN(GPS_SIGN_D), GPIO_FN(DU1_DISP), GPIO_FN(VI2_DATA6_VI2_B6),
1580 GPIO_FN(TCLK0), GPIO_FN(QSTVA_B_QVS_B), GPIO_FN(HSPI_CLK1),
1581 GPIO_FN(SCK2_D), GPIO_FN(AUDIO_CLKOUT_B), GPIO_FN(GPS_MAG_D),
1582 GPIO_FN(DU1_CDE), GPIO_FN(VI2_DATA7_VI2_B7), GPIO_FN(RX3_B_IRDA_RX_B),
1583 GPIO_FN(SD3_WP), GPIO_FN(HSPI_RX1), GPIO_FN(VI1_FIELD),
1584 GPIO_FN(VI3_FIELD), GPIO_FN(AUDIO_CLKOUT), GPIO_FN(RX2_D),
1585 GPIO_FN(GPS_CLK_C), GPIO_FN(GPS_CLK_D), GPIO_FN(AUDIO_CLKA),
1586 GPIO_FN(CAN_TXCLK), GPIO_FN(AUDIO_CLKB), GPIO_FN(USB_OVC2),
1587 GPIO_FN(CAN_DEBUGOUT0), GPIO_FN(MOUT0),
1588
1589 /* IPSR6 */
1590 GPIO_FN(SSI_SCK0129), GPIO_FN(CAN_DEBUGOUT1), GPIO_FN(MOUT1),
1591 GPIO_FN(SSI_WS0129), GPIO_FN(CAN_DEBUGOUT2), GPIO_FN(MOUT2),
1592 GPIO_FN(SSI_SDATA0), GPIO_FN(CAN_DEBUGOUT3), GPIO_FN(MOUT5),
1593 GPIO_FN(SSI_SDATA1), GPIO_FN(CAN_DEBUGOUT4), GPIO_FN(MOUT6),
1594 GPIO_FN(SSI_SDATA2), GPIO_FN(CAN_DEBUGOUT5), GPIO_FN(SSI_SCK34),
1595 GPIO_FN(CAN_DEBUGOUT6), GPIO_FN(CAN0_TX_B), GPIO_FN(IERX),
1596 GPIO_FN(SSI_SCK9_C), GPIO_FN(SSI_WS34), GPIO_FN(CAN_DEBUGOUT7),
1597 GPIO_FN(CAN0_RX_B), GPIO_FN(IETX), GPIO_FN(SSI_WS9_C),
1598 GPIO_FN(SSI_SDATA3), GPIO_FN(PWM0_C), GPIO_FN(CAN_DEBUGOUT8),
1599 GPIO_FN(CAN_CLK_B), GPIO_FN(IECLK), GPIO_FN(SCIF_CLK_B),
1600 GPIO_FN(TCLK0_B), GPIO_FN(SSI_SDATA4), GPIO_FN(CAN_DEBUGOUT9),
1601 GPIO_FN(SSI_SDATA9_C), GPIO_FN(SSI_SCK5), GPIO_FN(ADICLK),
1602 GPIO_FN(CAN_DEBUGOUT10), GPIO_FN(SCK3), GPIO_FN(TCLK0_D),
1603 GPIO_FN(SSI_WS5), GPIO_FN(ADICS_SAMP), GPIO_FN(CAN_DEBUGOUT11),
1604 GPIO_FN(TX3_IRDA_TX), GPIO_FN(SSI_SDATA5), GPIO_FN(ADIDATA),
1605 GPIO_FN(CAN_DEBUGOUT12), GPIO_FN(RX3_IRDA_RX), GPIO_FN(SSI_SCK6),
1606 GPIO_FN(ADICHS0), GPIO_FN(CAN0_TX), GPIO_FN(IERX_B),
1607
1608 /* IPSR7 */
1609 GPIO_FN(SSI_WS6), GPIO_FN(ADICHS1), GPIO_FN(CAN0_RX), GPIO_FN(IETX_B),
1610 GPIO_FN(SSI_SDATA6), GPIO_FN(ADICHS2), GPIO_FN(CAN_CLK),
1611 GPIO_FN(IECLK_B), GPIO_FN(SSI_SCK78), GPIO_FN(CAN_DEBUGOUT13),
1612 GPIO_FN(IRQ0_B), GPIO_FN(SSI_SCK9_B), GPIO_FN(HSPI_CLK1_C),
1613 GPIO_FN(SSI_WS78), GPIO_FN(CAN_DEBUGOUT14), GPIO_FN(IRQ1_B),
1614 GPIO_FN(SSI_WS9_B), GPIO_FN(HSPI_CS1_C), GPIO_FN(SSI_SDATA7),
1615 GPIO_FN(CAN_DEBUGOUT15), GPIO_FN(IRQ2_B), GPIO_FN(TCLK1_C),
1616 GPIO_FN(HSPI_TX1_C), GPIO_FN(SSI_SDATA8), GPIO_FN(VSP),
1617 GPIO_FN(IRQ3_B), GPIO_FN(HSPI_RX1_C), GPIO_FN(SD0_CLK),
1618 GPIO_FN(ATACS01), GPIO_FN(SCK1_B), GPIO_FN(SD0_CMD), GPIO_FN(ATACS11),
1619 GPIO_FN(TX1_B), GPIO_FN(CC5_TDO), GPIO_FN(SD0_DAT0), GPIO_FN(ATADIR1),
1620 GPIO_FN(RX1_B), GPIO_FN(CC5_TRST), GPIO_FN(SD0_DAT1), GPIO_FN(ATAG1),
1621 GPIO_FN(SCK2_B), GPIO_FN(CC5_TMS), GPIO_FN(SD0_DAT2), GPIO_FN(ATARD1),
1622 GPIO_FN(TX2_B), GPIO_FN(CC5_TCK), GPIO_FN(SD0_DAT3), GPIO_FN(ATAWR1),
1623 GPIO_FN(RX2_B), GPIO_FN(CC5_TDI), GPIO_FN(SD0_CD), GPIO_FN(DREQ2),
1624 GPIO_FN(RTS1_B_TANS_B), GPIO_FN(SD0_WP), GPIO_FN(DACK2),
1625 GPIO_FN(CTS1_B),
1626
1627 /* IPSR8 */
1628 GPIO_FN(HSPI_CLK0), GPIO_FN(CTS0), GPIO_FN(USB_OVC0), GPIO_FN(AD_CLK),
1629 GPIO_FN(CC5_STATE4), GPIO_FN(CC5_STATE12), GPIO_FN(CC5_STATE20),
1630 GPIO_FN(CC5_STATE28), GPIO_FN(CC5_STATE36), GPIO_FN(HSPI_CS0),
1631 GPIO_FN(RTS0_TANS), GPIO_FN(USB_OVC1), GPIO_FN(AD_DI),
1632 GPIO_FN(CC5_STATE5), GPIO_FN(CC5_STATE13), GPIO_FN(CC5_STATE21),
1633 GPIO_FN(CC5_STATE29), GPIO_FN(CC5_STATE37), GPIO_FN(HSPI_TX0),
1634 GPIO_FN(TX0), GPIO_FN(CAN_DEBUG_HW_TRIGGER), GPIO_FN(AD_DO),
1635 GPIO_FN(CC5_STATE6), GPIO_FN(CC5_STATE14), GPIO_FN(CC5_STATE22),
1636 GPIO_FN(CC5_STATE30), GPIO_FN(CC5_STATE38), GPIO_FN(HSPI_RX0),
1637 GPIO_FN(RX0), GPIO_FN(CAN_STEP0), GPIO_FN(AD_NCS), GPIO_FN(CC5_STATE7),
1638 GPIO_FN(CC5_STATE15), GPIO_FN(CC5_STATE23), GPIO_FN(CC5_STATE31),
1639 GPIO_FN(CC5_STATE39), GPIO_FN(FMCLK), GPIO_FN(RDS_CLK), GPIO_FN(PCMOE),
1640 GPIO_FN(BPFCLK), GPIO_FN(PCMWE), GPIO_FN(FMIN), GPIO_FN(RDS_DATA),
1641 GPIO_FN(VI0_CLK), GPIO_FN(MMC1_CLK), GPIO_FN(VI0_CLKENB),
1642 GPIO_FN(TX1_C), GPIO_FN(HTX1_B), GPIO_FN(MT1_SYNC),
1643 GPIO_FN(VI0_FIELD), GPIO_FN(RX1_C), GPIO_FN(HRX1_B),
1644 GPIO_FN(VI0_HSYNC), GPIO_FN(VI0_DATA0_B_VI0_B0_B), GPIO_FN(CTS1_C),
1645 GPIO_FN(TX4_D), GPIO_FN(MMC1_CMD), GPIO_FN(HSCK1_B),
1646 GPIO_FN(VI0_VSYNC), GPIO_FN(VI0_DATA1_B_VI0_B1_B),
1647 GPIO_FN(RTS1_C_TANS_C), GPIO_FN(RX4_D), GPIO_FN(PWMFSW0_C),
1648
1649 /* IPSR9 */
1650 GPIO_FN(VI0_DATA0_VI0_B0), GPIO_FN(HRTS1_B), GPIO_FN(MT1_VCXO),
1651 GPIO_FN(VI0_DATA1_VI0_B1), GPIO_FN(HCTS1_B), GPIO_FN(MT1_PWM),
1652 GPIO_FN(VI0_DATA2_VI0_B2), GPIO_FN(MMC1_D0), GPIO_FN(VI0_DATA3_VI0_B3),
1653 GPIO_FN(MMC1_D1), GPIO_FN(VI0_DATA4_VI0_B4), GPIO_FN(MMC1_D2),
1654 GPIO_FN(VI0_DATA5_VI0_B5), GPIO_FN(MMC1_D3), GPIO_FN(VI0_DATA6_VI0_B6),
1655 GPIO_FN(MMC1_D4), GPIO_FN(ARM_TRACEDATA_0), GPIO_FN(VI0_DATA7_VI0_B7),
1656 GPIO_FN(MMC1_D5), GPIO_FN(ARM_TRACEDATA_1), GPIO_FN(VI0_G0),
1657 GPIO_FN(SSI_SCK78_C), GPIO_FN(IRQ0), GPIO_FN(ARM_TRACEDATA_2),
1658 GPIO_FN(VI0_G1), GPIO_FN(SSI_WS78_C), GPIO_FN(IRQ1),
1659 GPIO_FN(ARM_TRACEDATA_3), GPIO_FN(VI0_G2), GPIO_FN(ETH_TXD1),
1660 GPIO_FN(MMC1_D6), GPIO_FN(ARM_TRACEDATA_4), GPIO_FN(TS_SPSYNC0),
1661 GPIO_FN(VI0_G3), GPIO_FN(ETH_CRS_DV), GPIO_FN(MMC1_D7),
1662 GPIO_FN(ARM_TRACEDATA_5), GPIO_FN(TS_SDAT0), GPIO_FN(VI0_G4),
1663 GPIO_FN(ETH_TX_EN), GPIO_FN(SD2_DAT0_B), GPIO_FN(ARM_TRACEDATA_6),
1664 GPIO_FN(VI0_G5), GPIO_FN(ETH_RX_ER), GPIO_FN(SD2_DAT1_B),
1665 GPIO_FN(ARM_TRACEDATA_7), GPIO_FN(VI0_G6), GPIO_FN(ETH_RXD0),
1666 GPIO_FN(SD2_DAT2_B), GPIO_FN(ARM_TRACEDATA_8), GPIO_FN(VI0_G7),
1667 GPIO_FN(ETH_RXD1), GPIO_FN(SD2_DAT3_B), GPIO_FN(ARM_TRACEDATA_9),
1668
1669 /* IPSR10 */
1670 GPIO_FN(VI0_R0), GPIO_FN(SSI_SDATA7_C), GPIO_FN(SCK1_C),
1671 GPIO_FN(DREQ1_B), GPIO_FN(ARM_TRACEDATA_10), GPIO_FN(DREQ0_C),
1672 GPIO_FN(VI0_R1), GPIO_FN(SSI_SDATA8_C), GPIO_FN(DACK1_B),
1673 GPIO_FN(ARM_TRACEDATA_11), GPIO_FN(DACK0_C), GPIO_FN(DRACK0_C),
1674 GPIO_FN(VI0_R2), GPIO_FN(ETH_LINK), GPIO_FN(SD2_CLK_B), GPIO_FN(IRQ2),
1675 GPIO_FN(ARM_TRACEDATA_12), GPIO_FN(VI0_R3), GPIO_FN(ETH_MAGIC),
1676 GPIO_FN(SD2_CMD_B), GPIO_FN(IRQ3), GPIO_FN(ARM_TRACEDATA_13),
1677 GPIO_FN(VI0_R4), GPIO_FN(ETH_REFCLK), GPIO_FN(SD2_CD_B),
1678 GPIO_FN(HSPI_CLK1_B), GPIO_FN(ARM_TRACEDATA_14), GPIO_FN(MT1_CLK),
1679 GPIO_FN(TS_SCK0), GPIO_FN(VI0_R5), GPIO_FN(ETH_TXD0),
1680 GPIO_FN(SD2_WP_B), GPIO_FN(HSPI_CS1_B), GPIO_FN(ARM_TRACEDATA_15),
1681 GPIO_FN(MT1_D), GPIO_FN(TS_SDEN0), GPIO_FN(VI0_R6), GPIO_FN(ETH_MDC),
1682 GPIO_FN(DREQ2_C), GPIO_FN(HSPI_TX1_B), GPIO_FN(TRACECLK),
1683 GPIO_FN(MT1_BEN), GPIO_FN(PWMFSW0_D), GPIO_FN(VI0_R7),
1684 GPIO_FN(ETH_MDIO), GPIO_FN(DACK2_C), GPIO_FN(HSPI_RX1_B),
1685 GPIO_FN(SCIF_CLK_D), GPIO_FN(TRACECTL), GPIO_FN(MT1_PEN),
1686 GPIO_FN(VI1_CLK), GPIO_FN(SIM_D), GPIO_FN(SDA3), GPIO_FN(VI1_HSYNC),
1687 GPIO_FN(VI3_CLK), GPIO_FN(SSI_SCK4), GPIO_FN(GPS_SIGN_C),
1688 GPIO_FN(PWMFSW0_E), GPIO_FN(VI1_VSYNC), GPIO_FN(AUDIO_CLKOUT_C),
1689 GPIO_FN(SSI_WS4), GPIO_FN(SIM_CLK), GPIO_FN(GPS_MAG_C),
1690 GPIO_FN(SPV_TRST), GPIO_FN(SCL3),
1691
1692 /* IPSR11 */
1693 GPIO_FN(VI1_DATA0_VI1_B0), GPIO_FN(SD2_DAT0), GPIO_FN(SIM_RST),
1694 GPIO_FN(SPV_TCK), GPIO_FN(ADICLK_B), GPIO_FN(VI1_DATA1_VI1_B1),
1695 GPIO_FN(SD2_DAT1), GPIO_FN(MT0_CLK), GPIO_FN(SPV_TMS),
1696 GPIO_FN(ADICS_B_SAMP_B), GPIO_FN(VI1_DATA2_VI1_B2), GPIO_FN(SD2_DAT2),
1697 GPIO_FN(MT0_D), GPIO_FN(SPVTDI), GPIO_FN(ADIDATA_B),
1698 GPIO_FN(VI1_DATA3_VI1_B3), GPIO_FN(SD2_DAT3), GPIO_FN(MT0_BEN),
1699 GPIO_FN(SPV_TDO), GPIO_FN(ADICHS0_B), GPIO_FN(VI1_DATA4_VI1_B4),
1700 GPIO_FN(SD2_CLK), GPIO_FN(MT0_PEN), GPIO_FN(SPA_TRST),
1701 GPIO_FN(HSPI_CLK1_D), GPIO_FN(ADICHS1_B), GPIO_FN(VI1_DATA5_VI1_B5),
1702 GPIO_FN(SD2_CMD), GPIO_FN(MT0_SYNC), GPIO_FN(SPA_TCK),
1703 GPIO_FN(HSPI_CS1_D), GPIO_FN(ADICHS2_B), GPIO_FN(VI1_DATA6_VI1_B6),
1704 GPIO_FN(SD2_CD), GPIO_FN(MT0_VCXO), GPIO_FN(SPA_TMS),
1705 GPIO_FN(HSPI_TX1_D), GPIO_FN(VI1_DATA7_VI1_B7), GPIO_FN(SD2_WP),
1706 GPIO_FN(MT0_PWM), GPIO_FN(SPA_TDI), GPIO_FN(HSPI_RX1_D),
1707 GPIO_FN(VI1_G0), GPIO_FN(VI3_DATA0), GPIO_FN(DU1_DOTCLKOUT1),
1708 GPIO_FN(TS_SCK1), GPIO_FN(DREQ2_B), GPIO_FN(TX2), GPIO_FN(SPA_TDO),
1709 GPIO_FN(HCTS0_B), GPIO_FN(VI1_G1), GPIO_FN(VI3_DATA1),
1710 GPIO_FN(SSI_SCK1), GPIO_FN(TS_SDEN1), GPIO_FN(DACK2_B), GPIO_FN(RX2),
1711 GPIO_FN(HRTS0_B),
1712
1713 /* IPSR12 */
1714 GPIO_FN(VI1_G2), GPIO_FN(VI3_DATA2), GPIO_FN(SSI_WS1),
1715 GPIO_FN(TS_SPSYNC1), GPIO_FN(SCK2), GPIO_FN(HSCK0_B), GPIO_FN(VI1_G3),
1716 GPIO_FN(VI3_DATA3), GPIO_FN(SSI_SCK2), GPIO_FN(TS_SDAT1),
1717 GPIO_FN(SCL1_C), GPIO_FN(HTX0_B), GPIO_FN(VI1_G4), GPIO_FN(VI3_DATA4),
1718 GPIO_FN(SSI_WS2), GPIO_FN(SDA1_C), GPIO_FN(SIM_RST_B),
1719 GPIO_FN(HRX0_B), GPIO_FN(VI1_G5), GPIO_FN(VI3_DATA5),
1720 GPIO_FN(GPS_CLK), GPIO_FN(FSE), GPIO_FN(TX4_B), GPIO_FN(SIM_D_B),
1721 GPIO_FN(VI1_G6), GPIO_FN(VI3_DATA6), GPIO_FN(GPS_SIGN), GPIO_FN(FRB),
1722 GPIO_FN(RX4_B), GPIO_FN(SIM_CLK_B), GPIO_FN(VI1_G7),
1723 GPIO_FN(VI3_DATA7), GPIO_FN(GPS_MAG), GPIO_FN(FCE), GPIO_FN(SCK4_B),
1724};
1725
1726static struct pinmux_cfg_reg pinmux_config_regs[] = {
1727 { PINMUX_CFG_REG("GPSR0", 0xfffc0004, 32, 1) {
1728 GP_0_31_FN, FN_IP3_31_29,
1729 GP_0_30_FN, FN_IP3_26_24,
1730 GP_0_29_FN, FN_IP3_22_21,
1731 GP_0_28_FN, FN_IP3_14_12,
1732 GP_0_27_FN, FN_IP3_11_9,
1733 GP_0_26_FN, FN_IP3_2_0,
1734 GP_0_25_FN, FN_IP2_30_28,
1735 GP_0_24_FN, FN_IP2_21_19,
1736 GP_0_23_FN, FN_IP2_18_16,
1737 GP_0_22_FN, FN_IP0_30_28,
1738 GP_0_21_FN, FN_IP0_5_3,
1739 GP_0_20_FN, FN_IP1_18_15,
1740 GP_0_19_FN, FN_IP1_14_11,
1741 GP_0_18_FN, FN_IP1_10_7,
1742 GP_0_17_FN, FN_IP1_6_4,
1743 GP_0_16_FN, FN_IP1_3_2,
1744 GP_0_15_FN, FN_IP1_1_0,
1745 GP_0_14_FN, FN_IP0_27_26,
1746 GP_0_13_FN, FN_IP0_25,
1747 GP_0_12_FN, FN_IP0_24_23,
1748 GP_0_11_FN, FN_IP0_22_19,
1749 GP_0_10_FN, FN_IP0_18_16,
1750 GP_0_9_FN, FN_IP0_15_14,
1751 GP_0_8_FN, FN_IP0_13_12,
1752 GP_0_7_FN, FN_IP0_11_10,
1753 GP_0_6_FN, FN_IP0_9_8,
1754 GP_0_5_FN, FN_A19,
1755 GP_0_4_FN, FN_A18,
1756 GP_0_3_FN, FN_A17,
1757 GP_0_2_FN, FN_IP0_7_6,
1758 GP_0_1_FN, FN_AVS2,
1759 GP_0_0_FN, FN_AVS1 }
1760 },
1761 { PINMUX_CFG_REG("GPSR1", 0xfffc0008, 32, 1) {
1762 GP_1_31_FN, FN_IP5_23_21,
1763 GP_1_30_FN, FN_IP5_20_17,
1764 GP_1_29_FN, FN_IP5_16_15,
1765 GP_1_28_FN, FN_IP5_14_13,
1766 GP_1_27_FN, FN_IP5_12_11,
1767 GP_1_26_FN, FN_IP5_10_9,
1768 GP_1_25_FN, FN_IP5_8,
1769 GP_1_24_FN, FN_IP5_7,
1770 GP_1_23_FN, FN_IP5_6,
1771 GP_1_22_FN, FN_IP5_5,
1772 GP_1_21_FN, FN_IP5_4,
1773 GP_1_20_FN, FN_IP5_3,
1774 GP_1_19_FN, FN_IP5_2_0,
1775 GP_1_18_FN, FN_IP4_31_29,
1776 GP_1_17_FN, FN_IP4_28,
1777 GP_1_16_FN, FN_IP4_27,
1778 GP_1_15_FN, FN_IP4_26,
1779 GP_1_14_FN, FN_IP4_25,
1780 GP_1_13_FN, FN_IP4_24,
1781 GP_1_12_FN, FN_IP4_23,
1782 GP_1_11_FN, FN_IP4_22_20,
1783 GP_1_10_FN, FN_IP4_19_17,
1784 GP_1_9_FN, FN_IP4_16,
1785 GP_1_8_FN, FN_IP4_15,
1786 GP_1_7_FN, FN_IP4_14,
1787 GP_1_6_FN, FN_IP4_13,
1788 GP_1_5_FN, FN_IP4_12,
1789 GP_1_4_FN, FN_IP4_11,
1790 GP_1_3_FN, FN_IP4_10_8,
1791 GP_1_2_FN, FN_IP4_7_5,
1792 GP_1_1_FN, FN_IP4_4_2,
1793 GP_1_0_FN, FN_IP4_1_0 }
1794 },
1795 { PINMUX_CFG_REG("GPSR2", 0xfffc000c, 32, 1) {
1796 GP_2_31_FN, FN_IP10_28_26,
1797 GP_2_30_FN, FN_IP10_25_24,
1798 GP_2_29_FN, FN_IP10_23_21,
1799 GP_2_28_FN, FN_IP10_20_18,
1800 GP_2_27_FN, FN_IP10_17_15,
1801 GP_2_26_FN, FN_IP10_14_12,
1802 GP_2_25_FN, FN_IP10_11_9,
1803 GP_2_24_FN, FN_IP10_8_6,
1804 GP_2_23_FN, FN_IP10_5_3,
1805 GP_2_22_FN, FN_IP10_2_0,
1806 GP_2_21_FN, FN_IP9_29_28,
1807 GP_2_20_FN, FN_IP9_27_26,
1808 GP_2_19_FN, FN_IP9_25_24,
1809 GP_2_18_FN, FN_IP9_23_22,
1810 GP_2_17_FN, FN_IP9_21_19,
1811 GP_2_16_FN, FN_IP9_18_16,
1812 GP_2_15_FN, FN_IP9_15_14,
1813 GP_2_14_FN, FN_IP9_13_12,
1814 GP_2_13_FN, FN_IP9_11_10,
1815 GP_2_12_FN, FN_IP9_9_8,
1816 GP_2_11_FN, FN_IP9_7,
1817 GP_2_10_FN, FN_IP9_6,
1818 GP_2_9_FN, FN_IP9_5,
1819 GP_2_8_FN, FN_IP9_4,
1820 GP_2_7_FN, FN_IP9_3_2,
1821 GP_2_6_FN, FN_IP9_1_0,
1822 GP_2_5_FN, FN_IP8_30_28,
1823 GP_2_4_FN, FN_IP8_27_25,
1824 GP_2_3_FN, FN_IP8_24_23,
1825 GP_2_2_FN, FN_IP8_22_21,
1826 GP_2_1_FN, FN_IP8_20,
1827 GP_2_0_FN, FN_IP5_27_24 }
1828 },
1829 { PINMUX_CFG_REG("GPSR3", 0xfffc0010, 32, 1) {
1830 GP_3_31_FN, FN_IP6_3_2,
1831 GP_3_30_FN, FN_IP6_1_0,
1832 GP_3_29_FN, FN_IP5_30_29,
1833 GP_3_28_FN, FN_IP5_28,
1834 GP_3_27_FN, FN_IP1_24_23,
1835 GP_3_26_FN, FN_IP1_22_21,
1836 GP_3_25_FN, FN_IP1_20_19,
1837 GP_3_24_FN, FN_IP7_26_25,
1838 GP_3_23_FN, FN_IP7_24_23,
1839 GP_3_22_FN, FN_IP7_22_21,
1840 GP_3_21_FN, FN_IP7_20_19,
1841 GP_3_20_FN, FN_IP7_30_29,
1842 GP_3_19_FN, FN_IP7_28_27,
1843 GP_3_18_FN, FN_IP7_18_17,
1844 GP_3_17_FN, FN_IP7_16_15,
1845 GP_3_16_FN, FN_IP12_17_15,
1846 GP_3_15_FN, FN_IP12_14_12,
1847 GP_3_14_FN, FN_IP12_11_9,
1848 GP_3_13_FN, FN_IP12_8_6,
1849 GP_3_12_FN, FN_IP12_5_3,
1850 GP_3_11_FN, FN_IP12_2_0,
1851 GP_3_10_FN, FN_IP11_29_27,
1852 GP_3_9_FN, FN_IP11_26_24,
1853 GP_3_8_FN, FN_IP11_23_21,
1854 GP_3_7_FN, FN_IP11_20_18,
1855 GP_3_6_FN, FN_IP11_17_15,
1856 GP_3_5_FN, FN_IP11_14_12,
1857 GP_3_4_FN, FN_IP11_11_9,
1858 GP_3_3_FN, FN_IP11_8_6,
1859 GP_3_2_FN, FN_IP11_5_3,
1860 GP_3_1_FN, FN_IP11_2_0,
1861 GP_3_0_FN, FN_IP10_31_29 }
1862 },
1863 { PINMUX_CFG_REG("GPSR4", 0xfffc0014, 32, 1) {
1864 GP_4_31_FN, FN_IP8_19,
1865 GP_4_30_FN, FN_IP8_18,
1866 GP_4_29_FN, FN_IP8_17_16,
1867 GP_4_28_FN, FN_IP0_2_0,
1868 GP_4_27_FN, FN_USB_PENC1,
1869 GP_4_26_FN, FN_USB_PENC0,
1870 GP_4_25_FN, FN_IP8_15_12,
1871 GP_4_24_FN, FN_IP8_11_8,
1872 GP_4_23_FN, FN_IP8_7_4,
1873 GP_4_22_FN, FN_IP8_3_0,
1874 GP_4_21_FN, FN_IP2_3_0,
1875 GP_4_20_FN, FN_IP1_28_25,
1876 GP_4_19_FN, FN_IP2_15_12,
1877 GP_4_18_FN, FN_IP2_11_8,
1878 GP_4_17_FN, FN_IP2_7_4,
1879 GP_4_16_FN, FN_IP7_14_13,
1880 GP_4_15_FN, FN_IP7_12_10,
1881 GP_4_14_FN, FN_IP7_9_7,
1882 GP_4_13_FN, FN_IP7_6_4,
1883 GP_4_12_FN, FN_IP7_3_2,
1884 GP_4_11_FN, FN_IP7_1_0,
1885 GP_4_10_FN, FN_IP6_30_29,
1886 GP_4_9_FN, FN_IP6_26_25,
1887 GP_4_8_FN, FN_IP6_24_23,
1888 GP_4_7_FN, FN_IP6_22_20,
1889 GP_4_6_FN, FN_IP6_19_18,
1890 GP_4_5_FN, FN_IP6_17_15,
1891 GP_4_4_FN, FN_IP6_14_12,
1892 GP_4_3_FN, FN_IP6_11_9,
1893 GP_4_2_FN, FN_IP6_8,
1894 GP_4_1_FN, FN_IP6_7_6,
1895 GP_4_0_FN, FN_IP6_5_4 }
1896 },
1897 { PINMUX_CFG_REG("GPSR5", 0xfffc0018, 32, 1) {
1898 GP_5_31_FN, FN_IP3_5,
1899 GP_5_30_FN, FN_IP3_4,
1900 GP_5_29_FN, FN_IP3_3,
1901 GP_5_28_FN, FN_IP2_27,
1902 GP_5_27_FN, FN_IP2_26,
1903 GP_5_26_FN, FN_IP2_25,
1904 GP_5_25_FN, FN_IP2_24,
1905 GP_5_24_FN, FN_IP2_23,
1906 GP_5_23_FN, FN_IP2_22,
1907 GP_5_22_FN, FN_IP3_28,
1908 GP_5_21_FN, FN_IP3_27,
1909 GP_5_20_FN, FN_IP3_23,
1910 GP_5_19_FN, FN_EX_WAIT0,
1911 GP_5_18_FN, FN_WE1,
1912 GP_5_17_FN, FN_WE0,
1913 GP_5_16_FN, FN_RD,
1914 GP_5_15_FN, FN_A16,
1915 GP_5_14_FN, FN_A15,
1916 GP_5_13_FN, FN_A14,
1917 GP_5_12_FN, FN_A13,
1918 GP_5_11_FN, FN_A12,
1919 GP_5_10_FN, FN_A11,
1920 GP_5_9_FN, FN_A10,
1921 GP_5_8_FN, FN_A9,
1922 GP_5_7_FN, FN_A8,
1923 GP_5_6_FN, FN_A7,
1924 GP_5_5_FN, FN_A6,
1925 GP_5_4_FN, FN_A5,
1926 GP_5_3_FN, FN_A4,
1927 GP_5_2_FN, FN_A3,
1928 GP_5_1_FN, FN_A2,
1929 GP_5_0_FN, FN_A1 }
1930 },
1931 { PINMUX_CFG_REG("GPSR6", 0xfffc001c, 32, 1) {
1932 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1933 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1934 0, 0, 0, 0, 0, 0, 0, 0,
1935 0, 0,
1936 0, 0,
1937 0, 0,
1938 GP_6_8_FN, FN_IP3_20,
1939 GP_6_7_FN, FN_IP3_19,
1940 GP_6_6_FN, FN_IP3_18,
1941 GP_6_5_FN, FN_IP3_17,
1942 GP_6_4_FN, FN_IP3_16,
1943 GP_6_3_FN, FN_IP3_15,
1944 GP_6_2_FN, FN_IP3_8,
1945 GP_6_1_FN, FN_IP3_7,
1946 GP_6_0_FN, FN_IP3_6 }
1947 },
1948
1949 { PINMUX_CFG_REG_VAR("IPSR0", 0xfffc0020, 32,
1950 1, 3, 2, 1, 2, 4, 3, 2, 2, 2, 2, 2, 3, 3) {
1951 /* IP0_31 [1] */
1952 0, 0,
1953 /* IP0_30_28 [3] */
1954 FN_RD_WR, FN_FWE, FN_ATAG0, FN_VI1_R7,
1955 FN_HRTS1, FN_RX4_C, 0, 0,
1956 /* IP0_27_26 [2] */
1957 FN_CS1_A26, FN_HSPI_TX2, FN_SDSELF_B, 0,
1958 /* IP0_25 [1] */
1959 FN_CS0, FN_HSPI_CS2_B,
1960 /* IP0_24_23 [2] */
1961 FN_CLKOUT, FN_TX3C_IRDA_TX_C, FN_PWM0_B, 0,
1962 /* IP0_22_19 [4] */
1963 FN_A25, FN_SD1_WP, FN_MMC0_D5, FN_FD5,
1964 FN_HSPI_RX2, FN_VI1_R3, FN_TX5_B, FN_SSI_SDATA7_B,
1965 FN_CTS0_B, 0, 0, 0,
1966 0, 0, 0, 0,
1967 /* IP0_18_16 [3] */
1968 FN_A24, FN_SD1_CD, FN_MMC0_D4, FN_FD4,
1969 FN_HSPI_CS2, FN_VI1_R2, FN_SSI_WS78_B, 0,
1970 /* IP0_15_14 [2] */
1971 FN_A23, FN_FCLE, FN_HSPI_CLK2, FN_VI1_R1,
1972 /* IP0_13_12 [2] */
1973 FN_A22, FN_RX5_D, FN_HSPI_RX2_B, FN_VI1_R0,
1974 /* IP0_11_10 [2] */
1975 FN_A21, FN_SCK5_D, FN_HSPI_CLK2_B, 0,
1976 /* IP0_9_8 [2] */
1977 FN_A20, FN_TX5_D, FN_HSPI_TX2_B, 0,
1978 /* IP0_7_6 [2] */
1979 FN_A0, FN_SD1_DAT3, FN_MMC0_D3, FN_FD3,
1980 /* IP0_5_3 [3] */
1981 FN_BS, FN_SD1_DAT2, FN_MMC0_D2, FN_FD2,
1982 FN_ATADIR0, FN_SDSELF, FN_HCTS1, FN_TX4_C,
1983 /* IP0_2_0 [3] */
1984 FN_USB_PENC2, FN_SCK0, FN_PWM1, FN_PWMFSW0,
1985 FN_SCIF_CLK, FN_TCLK0_C, 0, 0 }
1986 },
1987 { PINMUX_CFG_REG_VAR("IPSR1", 0xfffc0024, 32,
1988 3, 4, 2, 2, 2, 4, 4, 4, 3, 2, 2) {
1989 /* IP1_31_29 [3] */
1990 0, 0, 0, 0, 0, 0, 0, 0,
1991 /* IP1_28_25 [4] */
1992 FN_HTX0, FN_TX1, FN_SDATA, FN_CTS0_C,
1993 FN_SUB_TCK, FN_CC5_STATE2, FN_CC5_STATE10, FN_CC5_STATE18,
1994 FN_CC5_STATE26, FN_CC5_STATE34, 0, 0,
1995 0, 0, 0, 0,
1996 /* IP1_24_23 [2] */
1997 FN_MLB_DAT, FN_PWM4, FN_RX4, 0,
1998 /* IP1_22_21 [2] */
1999 FN_MLB_SIG, FN_PWM3, FN_TX4, 0,
2000 /* IP1_20_19 [2] */
2001 FN_MLB_CLK, FN_PWM2, FN_SCK4, 0,
2002 /* IP1_18_15 [4] */
2003 FN_EX_CS5, FN_SD1_DAT1, FN_MMC0_D1, FN_FD1,
2004 FN_ATAWR0, FN_VI1_R6, FN_HRX1, FN_RX2_E,
2005 FN_RX0_B, FN_SSI_WS9, 0, 0,
2006 0, 0, 0, 0,
2007 /* IP1_14_11 [4] */
2008 FN_EX_CS4, FN_SD1_DAT0, FN_MMC0_D0, FN_FD0,
2009 FN_ATARD0, FN_VI1_R5, FN_SCK5_B, FN_HTX1,
2010 FN_TX2_E, FN_TX0_B, FN_SSI_SCK9, 0,
2011 0, 0, 0, 0,
2012 /* IP1_10_7 [4] */
2013 FN_EX_CS3, FN_SD1_CMD, FN_MMC0_CMD, FN_FRE,
2014 FN_ATACS10, FN_VI1_R4, FN_RX5_B, FN_HSCK1,
2015 FN_SSI_SDATA8_B, FN_RTS0_B_TANS_B, FN_SSI_SDATA9, 0,
2016 0, 0, 0, 0,
2017 /* IP1_6_4 [3] */
2018 FN_EX_CS2, FN_SD1_CLK, FN_MMC0_CLK, FN_FALE,
2019 FN_ATACS00, 0, 0, 0,
2020 /* IP1_3_2 [2] */
2021 FN_EX_CS1, FN_MMC0_D7, FN_FD7, 0,
2022 /* IP1_1_0 [2] */
2023 FN_EX_CS0, FN_RX3_C_IRDA_RX_C, FN_MMC0_D6, FN_FD6 }
2024 },
2025 { PINMUX_CFG_REG_VAR("IPSR2", 0xfffc0028, 32,
2026 1, 3, 1, 1, 1, 1, 1, 1, 3, 3, 4, 4, 4, 4) {
2027 /* IP2_31 [1] */
2028 0, 0,
2029 /* IP2_30_28 [3] */
2030 FN_DU0_DG0, FN_LCDOUT8, FN_DREQ1, FN_SCL2,
2031 FN_AUDATA2, 0, 0, 0,
2032 /* IP2_27 [1] */
2033 FN_DU0_DR7, FN_LCDOUT7,
2034 /* IP2_26 [1] */
2035 FN_DU0_DR6, FN_LCDOUT6,
2036 /* IP2_25 [1] */
2037 FN_DU0_DR5, FN_LCDOUT5,
2038 /* IP2_24 [1] */
2039 FN_DU0_DR4, FN_LCDOUT4,
2040 /* IP2_23 [1] */
2041 FN_DU0_DR3, FN_LCDOUT3,
2042 /* IP2_22 [1] */
2043 FN_DU0_DR2, FN_LCDOUT2,
2044 /* IP2_21_19 [3] */
2045 FN_DU0_DR1, FN_LCDOUT1, FN_DACK0, FN_DRACK0,
2046 FN_GPS_SIGN_B, FN_AUDATA1, FN_RX5_C, 0,
2047 /* IP2_18_16 [3] */
2048 FN_DU0_DR0, FN_LCDOUT0, FN_DREQ0, FN_GPS_CLK_B,
2049 FN_AUDATA0, FN_TX5_C, 0, 0,
2050 /* IP2_15_12 [4] */
2051 FN_HRTS0, FN_RTS1_TANS, FN_MDATA, FN_TX0_C,
2052 FN_SUB_TMS, FN_CC5_STATE1, FN_CC5_STATE9, FN_CC5_STATE17,
2053 FN_CC5_STATE25, FN_CC5_STATE33, 0, 0,
2054 0, 0, 0, 0,
2055 /* IP2_11_8 [4] */
2056 FN_HCTS0, FN_CTS1, FN_STM, FN_PWM0_D,
2057 FN_RX0_C, FN_SCIF_CLK_C, FN_SUB_TRST, FN_TCLK1_B,
2058 FN_CC5_OSCOUT, 0, 0, 0,
2059 0, 0, 0, 0,
2060 /* IP2_7_4 [4] */
2061 FN_HSCK0, FN_SCK1, FN_MTS, FN_PWM5,
2062 FN_SCK0_C, FN_SSI_SDATA9_B, FN_SUB_TDO, FN_CC5_STATE0,
2063 FN_CC5_STATE8, FN_CC5_STATE16, FN_CC5_STATE24, FN_CC5_STATE32,
2064 0, 0, 0, 0,
2065 /* IP2_3_0 [4] */
2066 FN_HRX0, FN_RX1, FN_SCKZ, FN_RTS0_C_TANS_C,
2067 FN_SUB_TDI, FN_CC5_STATE3, FN_CC5_STATE11, FN_CC5_STATE19,
2068 FN_CC5_STATE27, FN_CC5_STATE35, 0, 0,
2069 0, 0, 0, 0 }
2070 },
2071 { PINMUX_CFG_REG_VAR("IPSR3", 0xfffc002c, 32,
2072 3, 1, 1, 3, 1, 2, 1, 1, 1, 1, 1,
2073 1, 3, 3, 1, 1, 1, 1, 1, 1, 3) {
2074 /* IP3_31_29 [3] */
2075 FN_DU0_EXODDF_DU0_ODDF_DISP_CDE, FN_QCPV_QDE, FN_CAN1_TX, FN_TX2_C,
2076 FN_SCL2_C, FN_REMOCON, 0, 0,
2077 /* IP3_28 [1] */
2078 FN_DU0_EXVSYNC_DU0_VSYNC, FN_QSTB_QHE,
2079 /* IP3_27 [1] */
2080 FN_DU0_EXHSYNC_DU0_HSYNC, FN_QSTH_QHS,
2081 /* IP3_26_24 [3] */
2082 FN_DU0_DOTCLKOUT1, FN_QSTVB_QVE, FN_RX3_D_IRDA_RX_D, FN_SDA3_B,
2083 FN_SDA2_C, FN_DACK0_B, FN_DRACK0_B, 0,
2084 /* IP3_23 [1] */
2085 FN_DU0_DOTCLKOUT0, FN_QCLK,
2086 /* IP3_22_21 [2] */
2087 FN_DU0_DOTCLKIN, FN_QSTVA_QVS, FN_TX3_D_IRDA_TX_D, FN_SCL3_B,
2088 /* IP3_20 [1] */
2089 FN_DU0_DB7, FN_LCDOUT23,
2090 /* IP3_19 [1] */
2091 FN_DU0_DB6, FN_LCDOUT22,
2092 /* IP3_18 [1] */
2093 FN_DU0_DB5, FN_LCDOUT21,
2094 /* IP3_17 [1] */
2095 FN_DU0_DB4, FN_LCDOUT20,
2096 /* IP3_16 [1] */
2097 FN_DU0_DB3, FN_LCDOUT19,
2098 /* IP3_15 [1] */
2099 FN_DU0_DB2, FN_LCDOUT18,
2100 /* IP3_14_12 [3] */
2101 FN_DU0_DB1, FN_LCDOUT17, FN_EX_WAIT2, FN_SDA1,
2102 FN_GPS_MAG_B, FN_AUDATA5, FN_SCK5_C, 0,
2103 /* IP3_11_9 [3] */
2104 FN_DU0_DB0, FN_LCDOUT16, FN_EX_WAIT1, FN_SCL1,
2105 FN_TCLK1, FN_AUDATA4, 0, 0,
2106 /* IP3_8 [1] */
2107 FN_DU0_DG7, FN_LCDOUT15,
2108 /* IP3_7 [1] */
2109 FN_DU0_DG6, FN_LCDOUT14,
2110 /* IP3_6 [1] */
2111 FN_DU0_DG5, FN_LCDOUT13,
2112 /* IP3_5 [1] */
2113 FN_DU0_DG4, FN_LCDOUT12,
2114 /* IP3_4 [1] */
2115 FN_DU0_DG3, FN_LCDOUT11,
2116 /* IP3_3 [1] */
2117 FN_DU0_DG2, FN_LCDOUT10,
2118 /* IP3_2_0 [3] */
2119 FN_DU0_DG1, FN_LCDOUT9, FN_DACK1, FN_SDA2,
2120 FN_AUDATA3, 0, 0, 0 }
2121 },
2122 { PINMUX_CFG_REG_VAR("IPSR4", 0xfffc0030, 32,
2123 3, 1, 1, 1, 1, 1, 1, 3, 3,
2124 1, 1, 1, 1, 1, 1, 3, 3, 3, 2) {
2125 /* IP4_31_29 [3] */
2126 FN_DU1_DB0, FN_VI2_DATA4_VI2_B4, FN_SCL2_B, FN_SD3_DAT0,
2127 FN_TX5, FN_SCK0_D, 0, 0,
2128 /* IP4_28 [1] */
2129 FN_DU1_DG7, FN_VI2_R3,
2130 /* IP4_27 [1] */
2131 FN_DU1_DG6, FN_VI2_R2,
2132 /* IP4_26 [1] */
2133 FN_DU1_DG5, FN_VI2_R1,
2134 /* IP4_25 [1] */
2135 FN_DU1_DG4, FN_VI2_R0,
2136 /* IP4_24 [1] */
2137 FN_DU1_DG3, FN_VI2_G7,
2138 /* IP4_23 [1] */
2139 FN_DU1_DG2, FN_VI2_G6,
2140 /* IP4_22_20 [3] */
2141 FN_DU1_DG1, FN_VI2_DATA3_VI2_B3, FN_SDA1_B, FN_SD3_DAT3,
2142 FN_SCK5, FN_AUDATA7, FN_RX0_D, 0,
2143 /* IP4_19_17 [3] */
2144 FN_DU1_DG0, FN_VI2_DATA2_VI2_B2, FN_SCL1_B, FN_SD3_DAT2,
2145 FN_SCK3_E, FN_AUDATA6, FN_TX0_D, 0,
2146 /* IP4_16 [1] */
2147 FN_DU1_DR7, FN_VI2_G5,
2148 /* IP4_15 [1] */
2149 FN_DU1_DR6, FN_VI2_G4,
2150 /* IP4_14 [1] */
2151 FN_DU1_DR5, FN_VI2_G3,
2152 /* IP4_13 [1] */
2153 FN_DU1_DR4, FN_VI2_G2,
2154 /* IP4_12 [1] */
2155 FN_DU1_DR3, FN_VI2_G1,
2156 /* IP4_11 [1] */
2157 FN_DU1_DR2, FN_VI2_G0,
2158 /* IP4_10_8 [3] */
2159 FN_DU1_DR1, FN_VI2_DATA1_VI2_B1, FN_PWM0, FN_SD3_CMD,
2160 FN_RX3_E_IRDA_RX_E, FN_AUDSYNC, FN_CTS0_D, 0,
2161 /* IP4_7_5 [3] */
2162 FN_DU1_DR0, FN_VI2_DATA0_VI2_B0, FN_PWM6, FN_SD3_CLK,
2163 FN_TX3_E_IRDA_TX_E, FN_AUDCK, FN_PWMFSW0_B, 0,
2164 /* IP4_4_2 [3] */
2165 FN_DU0_CDE, FN_QPOLB, FN_CAN1_RX, FN_RX2_C,
2166 FN_DREQ0_B, FN_SSI_SCK78_B, FN_SCK0_B, 0,
2167 /* IP4_1_0 [2] */
2168 FN_DU0_DISP, FN_QPOLA, FN_CAN_CLK_C, FN_SCK2_C }
2169 },
2170 { PINMUX_CFG_REG_VAR("IPSR5", 0xfffc0034, 32,
2171 1, 2, 1, 4, 3, 4, 2, 2,
2172 2, 2, 1, 1, 1, 1, 1, 1, 3) {
2173 /* IP5_31 [1] */
2174 0, 0,
2175 /* IP5_30_29 [2] */
2176 FN_AUDIO_CLKB, FN_USB_OVC2, FN_CAN_DEBUGOUT0, FN_MOUT0,
2177 /* IP5_28 [1] */
2178 FN_AUDIO_CLKA, FN_CAN_TXCLK,
2179 /* IP5_27_24 [4] */
2180 FN_DU1_CDE, FN_VI2_DATA7_VI2_B7, FN_RX3_B_IRDA_RX_B, FN_SD3_WP,
2181 FN_HSPI_RX1, FN_VI1_FIELD, FN_VI3_FIELD, FN_AUDIO_CLKOUT,
2182 FN_RX2_D, FN_GPS_CLK_C, FN_GPS_CLK_D, 0,
2183 0, 0, 0, 0,
2184 /* IP5_23_21 [3] */
2185 FN_DU1_DISP, FN_VI2_DATA6_VI2_B6, FN_TCLK0, FN_QSTVA_B_QVS_B,
2186 FN_HSPI_CLK1, FN_SCK2_D, FN_AUDIO_CLKOUT_B, FN_GPS_MAG_D,
2187 /* IP5_20_17 [4] */
2188 FN_DU1_EXODDF_DU1_ODDF_DISP_CDE, FN_VI2_CLK, FN_TX3_B_IRDA_TX_B,
2189 FN_SD3_CD, FN_HSPI_TX1, FN_VI1_CLKENB, FN_VI3_CLKENB,
2190 FN_AUDIO_CLKC, FN_TX2_D, FN_SPEEDIN, FN_GPS_SIGN_D, 0,
2191 0, 0, 0, 0,
2192 /* IP5_16_15 [2] */
2193 FN_DU1_EXVSYNC_DU1_VSYNC, FN_VI2_VSYNC, FN_VI3_VSYNC, 0,
2194 /* IP5_14_13 [2] */
2195 FN_DU1_EXHSYNC_DU1_HSYNC, FN_VI2_HSYNC, FN_VI3_HSYNC, 0,
2196 /* IP5_12_11 [2] */
2197 FN_DU1_DOTCLKOUT, FN_VI2_FIELD, FN_SDA1_D, 0,
2198 /* IP5_10_9 [2] */
2199 FN_DU1_DOTCLKIN, FN_VI2_CLKENB, FN_HSPI_CS1, FN_SCL1_D,
2200 /* IP5_8 [1] */
2201 FN_DU1_DB7, FN_SDA2_D,
2202 /* IP5_7 [1] */
2203 FN_DU1_DB6, FN_SCL2_D,
2204 /* IP5_6 [1] */
2205 FN_DU1_DB5, FN_VI2_R7,
2206 /* IP5_5 [1] */
2207 FN_DU1_DB4, FN_VI2_R6,
2208 /* IP5_4 [1] */
2209 FN_DU1_DB3, FN_VI2_R5,
2210 /* IP5_3 [1] */
2211 FN_DU1_DB2, FN_VI2_R4,
2212 /* IP5_2_0 [3] */
2213 FN_DU1_DB1, FN_VI2_DATA5_VI2_B5, FN_SDA2_B, FN_SD3_DAT1,
2214 FN_RX5, FN_RTS0_D_TANS_D, 0, 0 }
2215 },
2216 { PINMUX_CFG_REG_VAR("IPSR6", 0xfffc0038, 32,
2217 1, 2, 2, 2, 2, 3, 2, 3, 3, 3, 1, 2, 2, 2, 2) {
2218 /* IP6_31 [1] */
2219 0, 0,
2220 /* IP6_30_29 [2] */
2221 FN_SSI_SCK6, FN_ADICHS0, FN_CAN0_TX, FN_IERX_B,
2222 /* IP_28_27 [2] */
2223 0, 0, 0, 0,
2224 /* IP6_26_25 [2] */
2225 FN_SSI_SDATA5, FN_ADIDATA, FN_CAN_DEBUGOUT12, FN_RX3_IRDA_RX,
2226 /* IP6_24_23 [2] */
2227 FN_SSI_WS5, FN_ADICS_SAMP, FN_CAN_DEBUGOUT11, FN_TX3_IRDA_TX,
2228 /* IP6_22_20 [3] */
2229 FN_SSI_SCK5, FN_ADICLK, FN_CAN_DEBUGOUT10, FN_SCK3,
2230 FN_TCLK0_D, 0, 0, 0,
2231 /* IP6_19_18 [2] */
2232 FN_SSI_SDATA4, FN_CAN_DEBUGOUT9, FN_SSI_SDATA9_C, 0,
2233 /* IP6_17_15 [3] */
2234 FN_SSI_SDATA3, FN_PWM0_C, FN_CAN_DEBUGOUT8, FN_CAN_CLK_B,
2235 FN_IECLK, FN_SCIF_CLK_B, FN_TCLK0_B, 0,
2236 /* IP6_14_12 [3] */
2237 FN_SSI_WS34, FN_CAN_DEBUGOUT7, FN_CAN0_RX_B, FN_IETX,
2238 FN_SSI_WS9_C, 0, 0, 0,
2239 /* IP6_11_9 [3] */
2240 FN_SSI_SCK34, FN_CAN_DEBUGOUT6, FN_CAN0_TX_B, FN_IERX,
2241 FN_SSI_SCK9_C, 0, 0, 0,
2242 /* IP6_8 [1] */
2243 FN_SSI_SDATA2, FN_CAN_DEBUGOUT5,
2244 /* IP6_7_6 [2] */
2245 FN_SSI_SDATA1, FN_CAN_DEBUGOUT4, FN_MOUT6, 0,
2246 /* IP6_5_4 [2] */
2247 FN_SSI_SDATA0, FN_CAN_DEBUGOUT3, FN_MOUT5, 0,
2248 /* IP6_3_2 [2] */
2249 FN_SSI_WS0129, FN_CAN_DEBUGOUT2, FN_MOUT2, 0,
2250 /* IP6_1_0 [2] */
2251 FN_SSI_SCK0129, FN_CAN_DEBUGOUT1, FN_MOUT1, 0 }
2252 },
2253 { PINMUX_CFG_REG_VAR("IPSR7", 0xfffc003c, 32,
2254 1, 2, 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 2, 2) {
2255 /* IP7_31 [1] */
2256 0, 0,
2257 /* IP7_30_29 [2] */
2258 FN_SD0_WP, FN_DACK2, FN_CTS1_B, 0,
2259 /* IP7_28_27 [2] */
2260 FN_SD0_CD, FN_DREQ2, FN_RTS1_B_TANS_B, 0,
2261 /* IP7_26_25 [2] */
2262 FN_SD0_DAT3, FN_ATAWR1, FN_RX2_B, FN_CC5_TDI,
2263 /* IP7_24_23 [2] */
2264 FN_SD0_DAT2, FN_ATARD1, FN_TX2_B, FN_CC5_TCK,
2265 /* IP7_22_21 [2] */
2266 FN_SD0_DAT1, FN_ATAG1, FN_SCK2_B, FN_CC5_TMS,
2267 /* IP7_20_19 [2] */
2268 FN_SD0_DAT0, FN_ATADIR1, FN_RX1_B, FN_CC5_TRST,
2269 /* IP7_18_17 [2] */
2270 FN_SD0_CMD, FN_ATACS11, FN_TX1_B, FN_CC5_TDO,
2271 /* IP7_16_15 [2] */
2272 FN_SD0_CLK, FN_ATACS01, FN_SCK1_B, 0,
2273 /* IP7_14_13 [2] */
2274 FN_SSI_SDATA8, FN_VSP, FN_IRQ3_B, FN_HSPI_RX1_C,
2275 /* IP7_12_10 [3] */
2276 FN_SSI_SDATA7, FN_CAN_DEBUGOUT15, FN_IRQ2_B, FN_TCLK1_C,
2277 FN_HSPI_TX1_C, 0, 0, 0,
2278 /* IP7_9_7 [3] */
2279 FN_SSI_WS78, FN_CAN_DEBUGOUT14, FN_IRQ1_B, FN_SSI_WS9_B,
2280 FN_HSPI_CS1_C, 0, 0, 0,
2281 /* IP7_6_4 [3] */
2282 FN_SSI_SCK78, FN_CAN_DEBUGOUT13, FN_IRQ0_B, FN_SSI_SCK9_B,
2283 FN_HSPI_CLK1_C, 0, 0, 0,
2284 /* IP7_3_2 [2] */
2285 FN_SSI_SDATA6, FN_ADICHS2, FN_CAN_CLK, FN_IECLK_B,
2286 /* IP7_1_0 [2] */
2287 FN_SSI_WS6, FN_ADICHS1, FN_CAN0_RX, FN_IETX_B }
2288 },
2289 { PINMUX_CFG_REG_VAR("IPSR8", 0xfffc0040, 32,
2290 1, 3, 3, 2, 2, 1, 1, 1, 2, 4, 4, 4, 4) {
2291 /* IP8_31 [1] */
2292 0, 0,
2293 /* IP8_30_28 [3] */
2294 FN_VI0_VSYNC, FN_VI0_DATA1_B_VI0_B1_B, FN_RTS1_C_TANS_C, FN_RX4_D,
2295 FN_PWMFSW0_C, 0, 0, 0,
2296 /* IP8_27_25 [3] */
2297 FN_VI0_HSYNC, FN_VI0_DATA0_B_VI0_B0_B, FN_CTS1_C, FN_TX4_D,
2298 FN_MMC1_CMD, FN_HSCK1_B, 0, 0,
2299 /* IP8_24_23 [2] */
2300 FN_VI0_FIELD, FN_RX1_C, FN_HRX1_B, 0,
2301 /* IP8_22_21 [2] */
2302 FN_VI0_CLKENB, FN_TX1_C, FN_HTX1_B, FN_MT1_SYNC,
2303 /* IP8_20 [1] */
2304 FN_VI0_CLK, FN_MMC1_CLK,
2305 /* IP8_19 [1] */
2306 FN_FMIN, FN_RDS_DATA,
2307 /* IP8_18 [1] */
2308 FN_BPFCLK, FN_PCMWE,
2309 /* IP8_17_16 [2] */
2310 FN_FMCLK, FN_RDS_CLK, FN_PCMOE, 0,
2311 /* IP8_15_12 [4] */
2312 FN_HSPI_RX0, FN_RX0, FN_CAN_STEP0, FN_AD_NCS,
2313 FN_CC5_STATE7, FN_CC5_STATE15, FN_CC5_STATE23, FN_CC5_STATE31,
2314 FN_CC5_STATE39, 0, 0, 0,
2315 0, 0, 0, 0,
2316 /* IP8_11_8 [4] */
2317 FN_HSPI_TX0, FN_TX0, FN_CAN_DEBUG_HW_TRIGGER, FN_AD_DO,
2318 FN_CC5_STATE6, FN_CC5_STATE14, FN_CC5_STATE22, FN_CC5_STATE30,
2319 FN_CC5_STATE38, 0, 0, 0,
2320 0, 0, 0, 0,
2321 /* IP8_7_4 [4] */
2322 FN_HSPI_CS0, FN_RTS0_TANS, FN_USB_OVC1, FN_AD_DI,
2323 FN_CC5_STATE5, FN_CC5_STATE13, FN_CC5_STATE21, FN_CC5_STATE29,
2324 FN_CC5_STATE37, 0, 0, 0,
2325 0, 0, 0, 0,
2326 /* IP8_3_0 [4] */
2327 FN_HSPI_CLK0, FN_CTS0, FN_USB_OVC0, FN_AD_CLK,
2328 FN_CC5_STATE4, FN_CC5_STATE12, FN_CC5_STATE20, FN_CC5_STATE28,
2329 FN_CC5_STATE36, 0, 0, 0,
2330 0, 0, 0, 0 }
2331 },
2332 { PINMUX_CFG_REG_VAR("IPSR9", 0xfffc0044, 32,
2333 2, 2, 2, 2, 2, 3, 3, 2, 2,
2334 2, 2, 1, 1, 1, 1, 2, 2) {
2335 /* IP9_31_30 [2] */
2336 0, 0, 0, 0,
2337 /* IP9_29_28 [2] */
2338 FN_VI0_G7, FN_ETH_RXD1, FN_SD2_DAT3_B, FN_ARM_TRACEDATA_9,
2339 /* IP9_27_26 [2] */
2340 FN_VI0_G6, FN_ETH_RXD0, FN_SD2_DAT2_B, FN_ARM_TRACEDATA_8,
2341 /* IP9_25_24 [2] */
2342 FN_VI0_G5, FN_ETH_RX_ER, FN_SD2_DAT1_B, FN_ARM_TRACEDATA_7,
2343 /* IP9_23_22 [2] */
2344 FN_VI0_G4, FN_ETH_TX_EN, FN_SD2_DAT0_B, FN_ARM_TRACEDATA_6,
2345 /* IP9_21_19 [3] */
2346 FN_VI0_G3, FN_ETH_CRS_DV, FN_MMC1_D7, FN_ARM_TRACEDATA_5,
2347 FN_TS_SDAT0, 0, 0, 0,
2348 /* IP9_18_16 [3] */
2349 FN_VI0_G2, FN_ETH_TXD1, FN_MMC1_D6, FN_ARM_TRACEDATA_4,
2350 FN_TS_SPSYNC0, 0, 0, 0,
2351 /* IP9_15_14 [2] */
2352 FN_VI0_G1, FN_SSI_WS78_C, FN_IRQ1, FN_ARM_TRACEDATA_3,
2353 /* IP9_13_12 [2] */
2354 FN_VI0_G0, FN_SSI_SCK78_C, FN_IRQ0, FN_ARM_TRACEDATA_2,
2355 /* IP9_11_10 [2] */
2356 FN_VI0_DATA7_VI0_B7, FN_MMC1_D5, FN_ARM_TRACEDATA_1, 0,
2357 /* IP9_9_8 [2] */
2358 FN_VI0_DATA6_VI0_B6, FN_MMC1_D4, FN_ARM_TRACEDATA_0, 0,
2359 /* IP9_7 [1] */
2360 FN_VI0_DATA5_VI0_B5, FN_MMC1_D3,
2361 /* IP9_6 [1] */
2362 FN_VI0_DATA4_VI0_B4, FN_MMC1_D2,
2363 /* IP9_5 [1] */
2364 FN_VI0_DATA3_VI0_B3, FN_MMC1_D1,
2365 /* IP9_4 [1] */
2366 FN_VI0_DATA2_VI0_B2, FN_MMC1_D0,
2367 /* IP9_3_2 [2] */
2368 FN_VI0_DATA1_VI0_B1, FN_HCTS1_B, FN_MT1_PWM, 0,
2369 /* IP9_1_0 [2] */
2370 FN_VI0_DATA0_VI0_B0, FN_HRTS1_B, FN_MT1_VCXO, 0 }
2371 },
2372 { PINMUX_CFG_REG_VAR("IPSR10", 0xfffc0048, 32,
2373 3, 3, 2, 3, 3, 3, 3, 3, 3, 3, 3) {
2374 /* IP10_31_29 [3] */
2375 FN_VI1_VSYNC, FN_AUDIO_CLKOUT_C, FN_SSI_WS4, FN_SIM_CLK,
2376 FN_GPS_MAG_C, FN_SPV_TRST, FN_SCL3, 0,
2377 /* IP10_28_26 [3] */
2378 FN_VI1_HSYNC, FN_VI3_CLK, FN_SSI_SCK4, FN_GPS_SIGN_C,
2379 FN_PWMFSW0_E, 0, 0, 0,
2380 /* IP10_25_24 [2] */
2381 FN_VI1_CLK, FN_SIM_D, FN_SDA3, 0,
2382 /* IP10_23_21 [3] */
2383 FN_VI0_R7, FN_ETH_MDIO, FN_DACK2_C, FN_HSPI_RX1_B,
2384 FN_SCIF_CLK_D, FN_TRACECTL, FN_MT1_PEN, 0,
2385 /* IP10_20_18 [3] */
2386 FN_VI0_R6, FN_ETH_MDC, FN_DREQ2_C, FN_HSPI_TX1_B,
2387 FN_TRACECLK, FN_MT1_BEN, FN_PWMFSW0_D, 0,
2388 /* IP10_17_15 [3] */
2389 FN_VI0_R5, FN_ETH_TXD0, FN_SD2_WP_B, FN_HSPI_CS1_B,
2390 FN_ARM_TRACEDATA_15, FN_MT1_D, FN_TS_SDEN0, 0,
2391 /* IP10_14_12 [3] */
2392 FN_VI0_R4, FN_ETH_REFCLK, FN_SD2_CD_B, FN_HSPI_CLK1_B,
2393 FN_ARM_TRACEDATA_14, FN_MT1_CLK, FN_TS_SCK0, 0,
2394 /* IP10_11_9 [3] */
2395 FN_VI0_R3, FN_ETH_MAGIC, FN_SD2_CMD_B, FN_IRQ3,
2396 FN_ARM_TRACEDATA_13, 0, 0, 0,
2397 /* IP10_8_6 [3] */
2398 FN_VI0_R2, FN_ETH_LINK, FN_SD2_CLK_B, FN_IRQ2,
2399 FN_ARM_TRACEDATA_12, 0, 0, 0,
2400 /* IP10_5_3 [3] */
2401 FN_VI0_R1, FN_SSI_SDATA8_C, FN_DACK1_B, FN_ARM_TRACEDATA_11,
2402 FN_DACK0_C, FN_DRACK0_C, 0, 0,
2403 /* IP10_2_0 [3] */
2404 FN_VI0_R0, FN_SSI_SDATA7_C, FN_SCK1_C, FN_DREQ1_B,
2405 FN_ARM_TRACEDATA_10, FN_DREQ0_C, 0, 0 }
2406 },
2407 { PINMUX_CFG_REG_VAR("IPSR11", 0xfffc004c, 32,
2408 2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3) {
2409 /* IP11_31_30 [2] */
2410 0, 0, 0, 0,
2411 /* IP11_29_27 [3] */
2412 FN_VI1_G1, FN_VI3_DATA1, FN_SSI_SCK1, FN_TS_SDEN1,
2413 FN_DACK2_B, FN_RX2, FN_HRTS0_B, 0,
2414 /* IP11_26_24 [3] */
2415 FN_VI1_G0, FN_VI3_DATA0, FN_DU1_DOTCLKOUT1, FN_TS_SCK1,
2416 FN_DREQ2_B, FN_TX2, FN_SPA_TDO, FN_HCTS0_B,
2417 /* IP11_23_21 [3] */
2418 FN_VI1_DATA7_VI1_B7, FN_SD2_WP, FN_MT0_PWM, FN_SPA_TDI,
2419 FN_HSPI_RX1_D, 0, 0, 0,
2420 /* IP11_20_18 [3] */
2421 FN_VI1_DATA6_VI1_B6, FN_SD2_CD, FN_MT0_VCXO, FN_SPA_TMS,
2422 FN_HSPI_TX1_D, 0, 0, 0,
2423 /* IP11_17_15 [3] */
2424 FN_VI1_DATA5_VI1_B5, FN_SD2_CMD, FN_MT0_SYNC, FN_SPA_TCK,
2425 FN_HSPI_CS1_D, FN_ADICHS2_B, 0, 0,
2426 /* IP11_14_12 [3] */
2427 FN_VI1_DATA4_VI1_B4, FN_SD2_CLK, FN_MT0_PEN, FN_SPA_TRST,
2428 FN_HSPI_CLK1_D, FN_ADICHS1_B, 0, 0,
2429 /* IP11_11_9 [3] */
2430 FN_VI1_DATA3_VI1_B3, FN_SD2_DAT3, FN_MT0_BEN, FN_SPV_TDO,
2431 FN_ADICHS0_B, 0, 0, 0,
2432 /* IP11_8_6 [3] */
2433 FN_VI1_DATA2_VI1_B2, FN_SD2_DAT2, FN_MT0_D, FN_SPVTDI,
2434 FN_ADIDATA_B, 0, 0, 0,
2435 /* IP11_5_3 [3] */
2436 FN_VI1_DATA1_VI1_B1, FN_SD2_DAT1, FN_MT0_CLK, FN_SPV_TMS,
2437 FN_ADICS_B_SAMP_B, 0, 0, 0,
2438 /* IP11_2_0 [3] */
2439 FN_VI1_DATA0_VI1_B0, FN_SD2_DAT0, FN_SIM_RST, FN_SPV_TCK,
2440 FN_ADICLK_B, 0, 0, 0 }
2441 },
2442 { PINMUX_CFG_REG_VAR("IPSR12", 0xfffc0050, 32,
2443 4, 4, 4, 2, 3, 3, 3, 3, 3, 3) {
2444 /* IP12_31_28 [4] */
2445 0, 0, 0, 0, 0, 0, 0, 0,
2446 0, 0, 0, 0, 0, 0, 0, 0,
2447 /* IP12_27_24 [4] */
2448 0, 0, 0, 0, 0, 0, 0, 0,
2449 0, 0, 0, 0, 0, 0, 0, 0,
2450 /* IP12_23_20 [4] */
2451 0, 0, 0, 0, 0, 0, 0, 0,
2452 0, 0, 0, 0, 0, 0, 0, 0,
2453 /* IP12_19_18 [2] */
2454 0, 0, 0, 0,
2455 /* IP12_17_15 [3] */
2456 FN_VI1_G7, FN_VI3_DATA7, FN_GPS_MAG, FN_FCE,
2457 FN_SCK4_B, 0, 0, 0,
2458 /* IP12_14_12 [3] */
2459 FN_VI1_G6, FN_VI3_DATA6, FN_GPS_SIGN, FN_FRB,
2460 FN_RX4_B, FN_SIM_CLK_B, 0, 0,
2461 /* IP12_11_9 [3] */
2462 FN_VI1_G5, FN_VI3_DATA5, FN_GPS_CLK, FN_FSE,
2463 FN_TX4_B, FN_SIM_D_B, 0, 0,
2464 /* IP12_8_6 [3] */
2465 FN_VI1_G4, FN_VI3_DATA4, FN_SSI_WS2, FN_SDA1_C,
2466 FN_SIM_RST_B, FN_HRX0_B, 0, 0,
2467 /* IP12_5_3 [3] */
2468 FN_VI1_G3, FN_VI3_DATA3, FN_SSI_SCK2, FN_TS_SDAT1,
2469 FN_SCL1_C, FN_HTX0_B, 0, 0,
2470 /* IP12_2_0 [3] */
2471 FN_VI1_G2, FN_VI3_DATA2, FN_SSI_WS1, FN_TS_SPSYNC1,
2472 FN_SCK2, FN_HSCK0_B, 0, 0 }
2473 },
2474 { PINMUX_CFG_REG_VAR("MOD_SEL", 0xfffc0090, 32,
2475 2, 2, 3, 3, 2, 2, 2, 2, 2,
2476 1, 1, 1, 1, 1, 1, 1, 2, 1, 2) {
2477 /* SEL_SCIF5 [2] */
2478 FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, FN_SEL_SCIF5_2, FN_SEL_SCIF5_3,
2479 /* SEL_SCIF4 [2] */
2480 FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, FN_SEL_SCIF4_3,
2481 /* SEL_SCIF3 [3] */
2482 FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,
2483 FN_SEL_SCIF3_4, 0, 0, 0,
2484 /* SEL_SCIF2 [3] */
2485 FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3,
2486 FN_SEL_SCIF2_4, 0, 0, 0,
2487 /* SEL_SCIF1 [2] */
2488 FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, 0,
2489 /* SEL_SCIF0 [2] */
2490 FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, FN_SEL_SCIF0_3,
2491 /* SEL_SSI9 [2] */
2492 FN_SEL_SSI9_0, FN_SEL_SSI9_1, FN_SEL_SSI9_2, 0,
2493 /* SEL_SSI8 [2] */
2494 FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2, 0,
2495 /* SEL_SSI7 [2] */
2496 FN_SEL_SSI7_0, FN_SEL_SSI7_1, FN_SEL_SSI7_2, 0,
2497 /* SEL_VI0 [1] */
2498 FN_SEL_VI0_0, FN_SEL_VI0_1,
2499 /* SEL_SD2 [1] */
2500 FN_SEL_SD2_0, FN_SEL_SD2_1,
2501 /* SEL_INT3 [1] */
2502 FN_SEL_INT3_0, FN_SEL_INT3_1,
2503 /* SEL_INT2 [1] */
2504 FN_SEL_INT2_0, FN_SEL_INT2_1,
2505 /* SEL_INT1 [1] */
2506 FN_SEL_INT1_0, FN_SEL_INT1_1,
2507 /* SEL_INT0 [1] */
2508 FN_SEL_INT0_0, FN_SEL_INT0_1,
2509 /* SEL_IE [1] */
2510 FN_SEL_IE_0, FN_SEL_IE_1,
2511 /* SEL_EXBUS2 [2] */
2512 FN_SEL_EXBUS2_0, FN_SEL_EXBUS2_1, FN_SEL_EXBUS2_2, 0,
2513 /* SEL_EXBUS1 [1] */
2514 FN_SEL_EXBUS1_0, FN_SEL_EXBUS1_1,
2515 /* SEL_EXBUS0 [2] */
2516 FN_SEL_EXBUS0_0, FN_SEL_EXBUS0_1, FN_SEL_EXBUS0_2, 0 }
2517 },
2518 { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xfffc0094, 32,
2519 2, 2, 2, 2, 1, 1, 1, 3, 1,
2520 2, 2, 2, 2, 1, 1, 2, 1, 2, 2) {
2521 /* SEL_TMU1 [2] */
2522 FN_SEL_TMU1_0, FN_SEL_TMU1_1, FN_SEL_TMU1_2, 0,
2523 /* SEL_TMU0 [2] */
2524 FN_SEL_TMU0_0, FN_SEL_TMU0_1, FN_SEL_TMU0_2, FN_SEL_TMU0_3,
2525 /* SEL_SCIF [2] */
2526 FN_SEL_SCIF_0, FN_SEL_SCIF_1, FN_SEL_SCIF_2, FN_SEL_SCIF_3,
2527 /* SEL_CANCLK [2] */
2528 FN_SEL_CANCLK_0, FN_SEL_CANCLK_1, FN_SEL_CANCLK_2,
2529 /* SEL_CAN0 [1] */
2530 FN_SEL_CAN0_0, FN_SEL_CAN0_1,
2531 /* SEL_HSCIF1 [1] */
2532 FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
2533 /* SEL_HSCIF0 [1] */
2534 FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1,
2535 /* SEL_PWMFSW [3] */
2536 FN_SEL_PWMFSW_0, FN_SEL_PWMFSW_1, FN_SEL_PWMFSW_2,
2537 FN_SEL_PWMFSW_3, FN_SEL_PWMFSW_4, 0, 0, 0,
2538 /* SEL_ADI [1] */
2539 FN_SEL_ADI_0, FN_SEL_ADI_1,
2540 /* [2] */
2541 0, 0, 0, 0,
2542 /* [2] */
2543 0, 0, 0, 0,
2544 /* [2] */
2545 0, 0, 0, 0,
2546 /* SEL_GPS [2] */
2547 FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2, FN_SEL_GPS_3,
2548 /* SEL_SIM [1] */
2549 FN_SEL_SIM_0, FN_SEL_SIM_1,
2550 /* SEL_HSPI2 [1] */
2551 FN_SEL_HSPI2_0, FN_SEL_HSPI2_1,
2552 /* SEL_HSPI1 [2] */
2553 FN_SEL_HSPI1_0, FN_SEL_HSPI1_1, FN_SEL_HSPI1_2, FN_SEL_HSPI1_3,
2554 /* SEL_I2C3 [1] */
2555 FN_SEL_I2C3_0, FN_SEL_I2C3_1,
2556 /* SEL_I2C2 [2] */
2557 FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3,
2558 /* SEL_I2C1 [2] */
2559 FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2, FN_SEL_I2C1_3 }
2560 },
2561 { PINMUX_CFG_REG("INOUTSEL0", 0xffc40004, 32, 1) { GP_INOUTSEL(0) } },
2562 { PINMUX_CFG_REG("INOUTSEL1", 0xffc41004, 32, 1) { GP_INOUTSEL(1) } },
2563 { PINMUX_CFG_REG("INOUTSEL2", 0xffc42004, 32, 1) { GP_INOUTSEL(2) } },
2564 { PINMUX_CFG_REG("INOUTSEL3", 0xffc43004, 32, 1) { GP_INOUTSEL(3) } },
2565 { PINMUX_CFG_REG("INOUTSEL4", 0xffc44004, 32, 1) { GP_INOUTSEL(4) } },
2566 { PINMUX_CFG_REG("INOUTSEL5", 0xffc45004, 32, 1) { GP_INOUTSEL(5) } },
2567 { PINMUX_CFG_REG("INOUTSEL6", 0xffc46004, 32, 1) {
2568 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2569 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2570 0, 0, 0, 0, 0, 0, 0, 0,
2571 0, 0,
2572 0, 0,
2573 0, 0,
2574 GP_6_8_IN, GP_6_8_OUT,
2575 GP_6_7_IN, GP_6_7_OUT,
2576 GP_6_6_IN, GP_6_6_OUT,
2577 GP_6_5_IN, GP_6_5_OUT,
2578 GP_6_4_IN, GP_6_4_OUT,
2579 GP_6_3_IN, GP_6_3_OUT,
2580 GP_6_2_IN, GP_6_2_OUT,
2581 GP_6_1_IN, GP_6_1_OUT,
2582 GP_6_0_IN, GP_6_0_OUT, }
2583 },
2584 { },
2585};
2586
2587static struct pinmux_data_reg pinmux_data_regs[] = {
2588 { PINMUX_DATA_REG("INDT0", 0xffc40008, 32) { GP_INDT(0) } },
2589 { PINMUX_DATA_REG("INDT1", 0xffc41008, 32) { GP_INDT(1) } },
2590 { PINMUX_DATA_REG("INDT2", 0xffc42008, 32) { GP_INDT(2) } },
2591 { PINMUX_DATA_REG("INDT3", 0xffc43008, 32) { GP_INDT(3) } },
2592 { PINMUX_DATA_REG("INDT4", 0xffc44008, 32) { GP_INDT(4) } },
2593 { PINMUX_DATA_REG("INDT5", 0xffc45008, 32) { GP_INDT(5) } },
2594 { PINMUX_DATA_REG("INDT6", 0xffc46008, 32) {
2595 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2596 0, 0, 0, 0, 0, 0, 0, GP_6_8_DATA,
2597 GP_6_7_DATA, GP_6_6_DATA, GP_6_5_DATA, GP_6_4_DATA,
2598 GP_6_3_DATA, GP_6_2_DATA, GP_6_1_DATA, GP_6_0_DATA }
2599 },
2600 { },
2601};
2602
2603struct sh_pfc_soc_info r8a7779_pinmux_info = {
2604 .name = "r8a7779_pfc",
2605
2606 .unlock_reg = 0xfffc0000, /* PMMR */
2607
2608 .reserved_id = PINMUX_RESERVED,
2609 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
2610 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
2611 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
2612 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
2613 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
2614
2615 .first_gpio = GPIO_GP_0_0,
2616 .last_gpio = GPIO_FN_SCK4_B,
2617
2618 .gpios = pinmux_gpios,
2619 .cfg_regs = pinmux_config_regs,
2620 .data_regs = pinmux_data_regs,
2621
2622 .gpio_data = pinmux_data,
2623 .gpio_data_size = ARRAY_SIZE(pinmux_data),
2624};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7203.c b/drivers/pinctrl/sh-pfc/pfc-sh7203.c
new file mode 100644
index 000000000000..01b425dfd162
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7203.c
@@ -0,0 +1,1592 @@
1/*
2 * SH7203 Pinmux
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/kernel.h>
12#include <linux/gpio.h>
13#include <cpu/sh7203.h>
14
15#include "sh_pfc.h"
16
17enum {
18 PINMUX_RESERVED = 0,
19
20 PINMUX_DATA_BEGIN,
21 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
22 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
23 PB12_DATA,
24 PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
25 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
26 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
27 PC14_DATA, PC13_DATA, PC12_DATA,
28 PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA,
29 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
30 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
31 PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
32 PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
33 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
34 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
35 PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA,
36 PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA,
37 PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
38 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
39 PF30_DATA, PF29_DATA, PF28_DATA,
40 PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA,
41 PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
42 PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA,
43 PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
44 PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
45 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
46 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
47 PINMUX_DATA_END,
48
49 PINMUX_INPUT_BEGIN,
50 FORCE_IN,
51 PA7_IN, PA6_IN, PA5_IN, PA4_IN,
52 PA3_IN, PA2_IN, PA1_IN, PA0_IN,
53 PB11_IN, PB10_IN, PB9_IN, PB8_IN,
54 PC14_IN, PC13_IN, PC12_IN,
55 PC11_IN, PC10_IN, PC9_IN, PC8_IN,
56 PC7_IN, PC6_IN, PC5_IN, PC4_IN,
57 PC3_IN, PC2_IN, PC1_IN, PC0_IN,
58 PD15_IN, PD14_IN, PD13_IN, PD12_IN,
59 PD11_IN, PD10_IN, PD9_IN, PD8_IN,
60 PD7_IN, PD6_IN, PD5_IN, PD4_IN,
61 PD3_IN, PD2_IN, PD1_IN, PD0_IN,
62 PE15_IN, PE14_IN, PE13_IN, PE12_IN,
63 PE11_IN, PE10_IN, PE9_IN, PE8_IN,
64 PE7_IN, PE6_IN, PE5_IN, PE4_IN,
65 PE3_IN, PE2_IN, PE1_IN, PE0_IN,
66 PF30_IN, PF29_IN, PF28_IN,
67 PF27_IN, PF26_IN, PF25_IN, PF24_IN,
68 PF23_IN, PF22_IN, PF21_IN, PF20_IN,
69 PF19_IN, PF18_IN, PF17_IN, PF16_IN,
70 PF15_IN, PF14_IN, PF13_IN, PF12_IN,
71 PF11_IN, PF10_IN, PF9_IN, PF8_IN,
72 PF7_IN, PF6_IN, PF5_IN, PF4_IN,
73 PF3_IN, PF2_IN, PF1_IN, PF0_IN,
74 PINMUX_INPUT_END,
75
76 PINMUX_OUTPUT_BEGIN,
77 FORCE_OUT,
78 PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT,
79 PC14_OUT, PC13_OUT, PC12_OUT,
80 PC11_OUT, PC10_OUT, PC9_OUT, PC8_OUT,
81 PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
82 PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
83 PD15_OUT, PD14_OUT, PD13_OUT, PD12_OUT,
84 PD11_OUT, PD10_OUT, PD9_OUT, PD8_OUT,
85 PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
86 PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
87 PE15_OUT, PE14_OUT, PE13_OUT, PE12_OUT,
88 PE11_OUT, PE10_OUT, PE9_OUT, PE8_OUT,
89 PE7_OUT, PE6_OUT, PE5_OUT, PE4_OUT,
90 PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
91 PF30_OUT, PF29_OUT, PF28_OUT,
92 PF27_OUT, PF26_OUT, PF25_OUT, PF24_OUT,
93 PF23_OUT, PF22_OUT, PF21_OUT, PF20_OUT,
94 PF19_OUT, PF18_OUT, PF17_OUT, PF16_OUT,
95 PF15_OUT, PF14_OUT, PF13_OUT, PF12_OUT,
96 PF11_OUT, PF10_OUT, PF9_OUT, PF8_OUT,
97 PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
98 PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
99 PINMUX_OUTPUT_END,
100
101 PINMUX_FUNCTION_BEGIN,
102 PB11_IOR_IN, PB11_IOR_OUT,
103 PB10_IOR_IN, PB10_IOR_OUT,
104 PB9_IOR_IN, PB9_IOR_OUT,
105 PB8_IOR_IN, PB8_IOR_OUT,
106 PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,
107 PB11MD_0, PB11MD_1,
108 PB10MD_0, PB10MD_1,
109 PB9MD_00, PB9MD_01, PB9MD_10,
110 PB8MD_00, PB8MD_01, PB8MD_10,
111 PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,
112 PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,
113 PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,
114 PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,
115 PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11,
116 PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11,
117 PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11,
118 PB0MD_00, PB0MD_01, PB0MD_10, PB0MD_11,
119
120 PB12IRQ_00, PB12IRQ_01, PB12IRQ_10,
121
122 PC14MD_0, PC14MD_1,
123 PC13MD_0, PC13MD_1,
124 PC12MD_0, PC12MD_1,
125 PC11MD_00, PC11MD_01, PC11MD_10,
126 PC10MD_00, PC10MD_01, PC10MD_10,
127 PC9MD_0, PC9MD_1,
128 PC8MD_0, PC8MD_1,
129 PC7MD_0, PC7MD_1,
130 PC6MD_0, PC6MD_1,
131 PC5MD_0, PC5MD_1,
132 PC4MD_0, PC4MD_1,
133 PC3MD_0, PC3MD_1,
134 PC2MD_0, PC2MD_1,
135 PC1MD_0, PC1MD_1,
136 PC0MD_00, PC0MD_01, PC0MD_10,
137
138 PD15MD_000, PD15MD_001, PD15MD_010, PD15MD_100, PD15MD_101,
139 PD14MD_000, PD14MD_001, PD14MD_010, PD14MD_101,
140 PD13MD_000, PD13MD_001, PD13MD_010, PD13MD_100, PD13MD_101,
141 PD12MD_000, PD12MD_001, PD12MD_010, PD12MD_100, PD12MD_101,
142 PD11MD_000, PD11MD_001, PD11MD_010, PD11MD_100, PD11MD_101,
143 PD10MD_000, PD10MD_001, PD10MD_010, PD10MD_100, PD10MD_101,
144 PD9MD_000, PD9MD_001, PD9MD_010, PD9MD_100, PD9MD_101,
145 PD8MD_000, PD8MD_001, PD8MD_010, PD8MD_100, PD8MD_101,
146 PD7MD_000, PD7MD_001, PD7MD_010, PD7MD_011, PD7MD_100, PD7MD_101,
147 PD6MD_000, PD6MD_001, PD6MD_010, PD6MD_011, PD6MD_100, PD6MD_101,
148 PD5MD_000, PD5MD_001, PD5MD_010, PD5MD_011, PD5MD_100, PD5MD_101,
149 PD4MD_000, PD4MD_001, PD4MD_010, PD4MD_011, PD4MD_100, PD4MD_101,
150 PD3MD_000, PD3MD_001, PD3MD_010, PD3MD_011, PD3MD_100, PD3MD_101,
151 PD2MD_000, PD2MD_001, PD2MD_010, PD2MD_011, PD2MD_100, PD2MD_101,
152 PD1MD_000, PD1MD_001, PD1MD_010, PD1MD_011, PD1MD_100, PD1MD_101,
153 PD0MD_000, PD0MD_001, PD0MD_010, PD0MD_011, PD0MD_100, PD0MD_101,
154
155 PE15MD_00, PE15MD_01, PE15MD_11,
156 PE14MD_00, PE14MD_01, PE14MD_11,
157 PE13MD_00, PE13MD_11,
158 PE12MD_00, PE12MD_11,
159 PE11MD_000, PE11MD_001, PE11MD_010, PE11MD_100,
160 PE10MD_000, PE10MD_001, PE10MD_010, PE10MD_100,
161 PE9MD_00, PE9MD_01, PE9MD_10, PE9MD_11,
162 PE8MD_00, PE8MD_01, PE8MD_10, PE8MD_11,
163 PE7MD_000, PE7MD_001, PE7MD_010, PE7MD_011, PE7MD_100,
164 PE6MD_000, PE6MD_001, PE6MD_010, PE6MD_011, PE6MD_100,
165 PE5MD_000, PE5MD_001, PE5MD_010, PE5MD_011, PE5MD_100,
166 PE4MD_000, PE4MD_001, PE4MD_010, PE4MD_011, PE4MD_100,
167 PE3MD_00, PE3MD_01, PE3MD_11,
168 PE2MD_00, PE2MD_01, PE2MD_11,
169 PE1MD_00, PE1MD_01, PE1MD_10, PE1MD_11,
170 PE0MD_000, PE0MD_001, PE0MD_011, PE0MD_100,
171
172 PF30MD_0, PF30MD_1,
173 PF29MD_0, PF29MD_1,
174 PF28MD_0, PF28MD_1,
175 PF27MD_0, PF27MD_1,
176 PF26MD_0, PF26MD_1,
177 PF25MD_0, PF25MD_1,
178 PF24MD_0, PF24MD_1,
179 PF23MD_00, PF23MD_01, PF23MD_10,
180 PF22MD_00, PF22MD_01, PF22MD_10,
181 PF21MD_00, PF21MD_01, PF21MD_10,
182 PF20MD_00, PF20MD_01, PF20MD_10,
183 PF19MD_00, PF19MD_01, PF19MD_10,
184 PF18MD_00, PF18MD_01, PF18MD_10,
185 PF17MD_00, PF17MD_01, PF17MD_10,
186 PF16MD_00, PF16MD_01, PF16MD_10,
187 PF15MD_00, PF15MD_01, PF15MD_10,
188 PF14MD_00, PF14MD_01, PF14MD_10,
189 PF13MD_00, PF13MD_01, PF13MD_10,
190 PF12MD_00, PF12MD_01, PF12MD_10,
191 PF11MD_00, PF11MD_01, PF11MD_10,
192 PF10MD_00, PF10MD_01, PF10MD_10,
193 PF9MD_00, PF9MD_01, PF9MD_10,
194 PF8MD_00, PF8MD_01, PF8MD_10,
195 PF7MD_00, PF7MD_01, PF7MD_10, PF7MD_11,
196 PF6MD_00, PF6MD_01, PF6MD_10, PF6MD_11,
197 PF5MD_00, PF5MD_01, PF5MD_10, PF5MD_11,
198 PF4MD_00, PF4MD_01, PF4MD_10, PF4MD_11,
199 PF3MD_00, PF3MD_01, PF3MD_10, PF3MD_11,
200 PF2MD_00, PF2MD_01, PF2MD_10, PF2MD_11,
201 PF1MD_00, PF1MD_01, PF1MD_10, PF1MD_11,
202 PF0MD_00, PF0MD_01, PF0MD_10, PF0MD_11,
203 PINMUX_FUNCTION_END,
204
205 PINMUX_MARK_BEGIN,
206 PINT7_PB_MARK, PINT6_PB_MARK, PINT5_PB_MARK, PINT4_PB_MARK,
207 PINT3_PB_MARK, PINT2_PB_MARK, PINT1_PB_MARK, PINT0_PB_MARK,
208 PINT7_PD_MARK, PINT6_PD_MARK, PINT5_PD_MARK, PINT4_PD_MARK,
209 PINT3_PD_MARK, PINT2_PD_MARK, PINT1_PD_MARK, PINT0_PD_MARK,
210 IRQ7_PB_MARK, IRQ6_PB_MARK, IRQ5_PB_MARK, IRQ4_PB_MARK,
211 IRQ3_PB_MARK, IRQ2_PB_MARK, IRQ1_PB_MARK, IRQ0_PB_MARK,
212 IRQ7_PD_MARK, IRQ6_PD_MARK, IRQ5_PD_MARK, IRQ4_PD_MARK,
213 IRQ3_PD_MARK, IRQ2_PD_MARK, IRQ1_PD_MARK, IRQ0_PD_MARK,
214 IRQ7_PE_MARK, IRQ6_PE_MARK, IRQ5_PE_MARK, IRQ4_PE_MARK,
215 IRQ3_PE_MARK, IRQ2_PE_MARK, IRQ1_PE_MARK, IRQ0_PE_MARK,
216 WDTOVF_MARK, IRQOUT_MARK, REFOUT_MARK, IRQOUT_REFOUT_MARK,
217 UBCTRG_MARK,
218 CTX1_MARK, CRX1_MARK, CTX0_MARK, CTX0_CTX1_MARK,
219 CRX0_MARK, CRX0_CRX1_MARK,
220 SDA3_MARK, SCL3_MARK,
221 SDA2_MARK, SCL2_MARK,
222 SDA1_MARK, SCL1_MARK,
223 SDA0_MARK, SCL0_MARK,
224 TEND0_PD_MARK, TEND0_PE_MARK, DACK0_PD_MARK, DACK0_PE_MARK,
225 DREQ0_PD_MARK, DREQ0_PE_MARK, TEND1_PD_MARK, TEND1_PE_MARK,
226 DACK1_PD_MARK, DACK1_PE_MARK, DREQ1_PD_MARK, DREQ1_PE_MARK,
227 DACK2_MARK, DREQ2_MARK, DACK3_MARK, DREQ3_MARK,
228 ADTRG_PD_MARK, ADTRG_PE_MARK,
229 D31_MARK, D30_MARK, D29_MARK, D28_MARK,
230 D27_MARK, D26_MARK, D25_MARK, D24_MARK,
231 D23_MARK, D22_MARK, D21_MARK, D20_MARK,
232 D19_MARK, D18_MARK, D17_MARK, D16_MARK,
233 A25_MARK, A24_MARK, A23_MARK, A22_MARK,
234 A21_MARK, CS4_MARK, MRES_MARK, BS_MARK,
235 IOIS16_MARK, CS1_MARK, CS6_CE1B_MARK, CE2B_MARK,
236 CS5_CE1A_MARK, CE2A_MARK, FRAME_MARK, WAIT_MARK,
237 RDWR_MARK, CKE_MARK, CASU_MARK, BREQ_MARK,
238 RASU_MARK, BACK_MARK, CASL_MARK, RASL_MARK,
239 WE3_DQMUU_AH_ICIO_WR_MARK, WE2_DQMUL_ICIORD_MARK,
240 WE1_DQMLU_WE_MARK, WE0_DQMLL_MARK,
241 CS3_MARK, CS2_MARK, A1_MARK, A0_MARK, CS7_MARK,
242 TIOC4D_MARK, TIOC4C_MARK, TIOC4B_MARK, TIOC4A_MARK,
243 TIOC3D_MARK, TIOC3C_MARK, TIOC3B_MARK, TIOC3A_MARK,
244 TIOC2B_MARK, TIOC1B_MARK, TIOC2A_MARK, TIOC1A_MARK,
245 TIOC0D_MARK, TIOC0C_MARK, TIOC0B_MARK, TIOC0A_MARK,
246 TCLKD_PD_MARK, TCLKC_PD_MARK, TCLKB_PD_MARK, TCLKA_PD_MARK,
247 TCLKD_PF_MARK, TCLKC_PF_MARK, TCLKB_PF_MARK, TCLKA_PF_MARK,
248 SCS0_PD_MARK, SSO0_PD_MARK, SSI0_PD_MARK, SSCK0_PD_MARK,
249 SCS0_PF_MARK, SSO0_PF_MARK, SSI0_PF_MARK, SSCK0_PF_MARK,
250 SCS1_PD_MARK, SSO1_PD_MARK, SSI1_PD_MARK, SSCK1_PD_MARK,
251 SCS1_PF_MARK, SSO1_PF_MARK, SSI1_PF_MARK, SSCK1_PF_MARK,
252 TXD0_MARK, RXD0_MARK, SCK0_MARK,
253 TXD1_MARK, RXD1_MARK, SCK1_MARK,
254 TXD2_MARK, RXD2_MARK, SCK2_MARK,
255 RTS3_MARK, CTS3_MARK, TXD3_MARK,
256 RXD3_MARK, SCK3_MARK,
257 AUDIO_CLK_MARK,
258 SSIDATA3_MARK, SSIWS3_MARK, SSISCK3_MARK,
259 SSIDATA2_MARK, SSIWS2_MARK, SSISCK2_MARK,
260 SSIDATA1_MARK, SSIWS1_MARK, SSISCK1_MARK,
261 SSIDATA0_MARK, SSIWS0_MARK, SSISCK0_MARK,
262 FCE_MARK, FRB_MARK,
263 NAF7_MARK, NAF6_MARK, NAF5_MARK, NAF4_MARK,
264 NAF3_MARK, NAF2_MARK, NAF1_MARK, NAF0_MARK,
265 FSC_MARK, FOE_MARK, FCDE_MARK, FWE_MARK,
266 LCD_VEPWC_MARK, LCD_VCPWC_MARK, LCD_CLK_MARK, LCD_FLM_MARK,
267 LCD_M_DISP_MARK, LCD_CL2_MARK, LCD_CL1_MARK, LCD_DON_MARK,
268 LCD_DATA15_MARK, LCD_DATA14_MARK, LCD_DATA13_MARK, LCD_DATA12_MARK,
269 LCD_DATA11_MARK, LCD_DATA10_MARK, LCD_DATA9_MARK, LCD_DATA8_MARK,
270 LCD_DATA7_MARK, LCD_DATA6_MARK, LCD_DATA5_MARK, LCD_DATA4_MARK,
271 LCD_DATA3_MARK, LCD_DATA2_MARK, LCD_DATA1_MARK, LCD_DATA0_MARK,
272 PINMUX_MARK_END,
273};
274
275static pinmux_enum_t pinmux_data[] = {
276
277 /* PA */
278 PINMUX_DATA(PA7_DATA, PA7_IN),
279 PINMUX_DATA(PA6_DATA, PA6_IN),
280 PINMUX_DATA(PA5_DATA, PA5_IN),
281 PINMUX_DATA(PA4_DATA, PA4_IN),
282 PINMUX_DATA(PA3_DATA, PA3_IN),
283 PINMUX_DATA(PA2_DATA, PA2_IN),
284 PINMUX_DATA(PA1_DATA, PA1_IN),
285 PINMUX_DATA(PA0_DATA, PA0_IN),
286
287 /* PB */
288 PINMUX_DATA(PB12_DATA, PB12MD_00, FORCE_OUT),
289 PINMUX_DATA(WDTOVF_MARK, PB12MD_01),
290 PINMUX_DATA(IRQOUT_MARK, PB12MD_10, PB12IRQ_00),
291 PINMUX_DATA(REFOUT_MARK, PB12MD_10, PB12IRQ_01),
292 PINMUX_DATA(IRQOUT_REFOUT_MARK, PB12MD_10, PB12IRQ_10),
293 PINMUX_DATA(UBCTRG_MARK, PB12MD_11),
294
295 PINMUX_DATA(PB11_DATA, PB11MD_0, PB11_IN, PB11_OUT),
296 PINMUX_DATA(CTX1_MARK, PB11MD_1),
297
298 PINMUX_DATA(PB10_DATA, PB10MD_0, PB10_IN, PB10_OUT),
299 PINMUX_DATA(CRX1_MARK, PB10MD_1),
300
301 PINMUX_DATA(PB9_DATA, PB9MD_00, PB9_IN, PB9_OUT),
302 PINMUX_DATA(CTX0_MARK, PB9MD_01),
303 PINMUX_DATA(CTX0_CTX1_MARK, PB9MD_10),
304
305 PINMUX_DATA(PB8_DATA, PB8MD_00, PB8_IN, PB8_OUT),
306 PINMUX_DATA(CRX0_MARK, PB8MD_01),
307 PINMUX_DATA(CRX0_CRX1_MARK, PB8MD_10),
308
309 PINMUX_DATA(PB7_DATA, PB7MD_00, FORCE_IN),
310 PINMUX_DATA(SDA3_MARK, PB7MD_01),
311 PINMUX_DATA(PINT7_PB_MARK, PB7MD_10),
312 PINMUX_DATA(IRQ7_PB_MARK, PB7MD_11),
313
314 PINMUX_DATA(PB6_DATA, PB6MD_00, FORCE_IN),
315 PINMUX_DATA(SCL3_MARK, PB6MD_01),
316 PINMUX_DATA(PINT6_PB_MARK, PB6MD_10),
317 PINMUX_DATA(IRQ6_PB_MARK, PB6MD_11),
318
319 PINMUX_DATA(PB5_DATA, PB5MD_00, FORCE_IN),
320 PINMUX_DATA(SDA2_MARK, PB6MD_01),
321 PINMUX_DATA(PINT5_PB_MARK, PB6MD_10),
322 PINMUX_DATA(IRQ5_PB_MARK, PB6MD_11),
323
324 PINMUX_DATA(PB4_DATA, PB4MD_00, FORCE_IN),
325 PINMUX_DATA(SCL2_MARK, PB4MD_01),
326 PINMUX_DATA(PINT4_PB_MARK, PB4MD_10),
327 PINMUX_DATA(IRQ4_PB_MARK, PB4MD_11),
328
329 PINMUX_DATA(PB3_DATA, PB3MD_00, FORCE_IN),
330 PINMUX_DATA(SDA1_MARK, PB3MD_01),
331 PINMUX_DATA(PINT3_PB_MARK, PB3MD_10),
332 PINMUX_DATA(IRQ3_PB_MARK, PB3MD_11),
333
334 PINMUX_DATA(PB2_DATA, PB2MD_00, FORCE_IN),
335 PINMUX_DATA(SCL1_MARK, PB2MD_01),
336 PINMUX_DATA(PINT2_PB_MARK, PB2MD_10),
337 PINMUX_DATA(IRQ2_PB_MARK, PB2MD_11),
338
339 PINMUX_DATA(PB1_DATA, PB1MD_00, FORCE_IN),
340 PINMUX_DATA(SDA0_MARK, PB1MD_01),
341 PINMUX_DATA(PINT1_PB_MARK, PB1MD_10),
342 PINMUX_DATA(IRQ1_PB_MARK, PB1MD_11),
343
344 PINMUX_DATA(PB0_DATA, PB0MD_00, FORCE_IN),
345 PINMUX_DATA(SCL0_MARK, PB0MD_01),
346 PINMUX_DATA(PINT0_PB_MARK, PB0MD_10),
347 PINMUX_DATA(IRQ0_PB_MARK, PB0MD_11),
348
349 /* PC */
350 PINMUX_DATA(PC14_DATA, PC14MD_0, PC14_IN, PC14_OUT),
351 PINMUX_DATA(WAIT_MARK, PC14MD_1),
352
353 PINMUX_DATA(PC13_DATA, PC13MD_0, PC13_IN, PC13_OUT),
354 PINMUX_DATA(RDWR_MARK, PC13MD_1),
355
356 PINMUX_DATA(PC12_DATA, PC12MD_0, PC12_IN, PC12_OUT),
357 PINMUX_DATA(CKE_MARK, PC12MD_1),
358
359 PINMUX_DATA(PC11_DATA, PC11MD_00, PC11_IN, PC11_OUT),
360 PINMUX_DATA(CASU_MARK, PC11MD_01),
361 PINMUX_DATA(BREQ_MARK, PC11MD_10),
362
363 PINMUX_DATA(PC10_DATA, PC10MD_00, PC10_IN, PC10_OUT),
364 PINMUX_DATA(RASU_MARK, PC10MD_01),
365 PINMUX_DATA(BACK_MARK, PC10MD_10),
366
367 PINMUX_DATA(PC9_DATA, PC9MD_0, PC9_IN, PC9_OUT),
368 PINMUX_DATA(CASL_MARK, PC9MD_1),
369
370 PINMUX_DATA(PC8_DATA, PC8MD_0, PC8_IN, PC8_OUT),
371 PINMUX_DATA(RASL_MARK, PC8MD_1),
372
373 PINMUX_DATA(PC7_DATA, PC7MD_0, PC7_IN, PC7_OUT),
374 PINMUX_DATA(WE3_DQMUU_AH_ICIO_WR_MARK, PC7MD_1),
375
376 PINMUX_DATA(PC6_DATA, PC6MD_0, PC6_IN, PC6_OUT),
377 PINMUX_DATA(WE2_DQMUL_ICIORD_MARK, PC6MD_1),
378
379 PINMUX_DATA(PC5_DATA, PC5MD_0, PC5_IN, PC5_OUT),
380 PINMUX_DATA(WE1_DQMLU_WE_MARK, PC5MD_1),
381
382 PINMUX_DATA(PC4_DATA, PC4MD_0, PC4_IN, PC4_OUT),
383 PINMUX_DATA(WE0_DQMLL_MARK, PC4MD_1),
384
385 PINMUX_DATA(PC3_DATA, PC3MD_0, PC3_IN, PC3_OUT),
386 PINMUX_DATA(CS3_MARK, PC3MD_1),
387
388 PINMUX_DATA(PC2_DATA, PC2MD_0, PC2_IN, PC2_OUT),
389 PINMUX_DATA(CS2_MARK, PC2MD_1),
390
391 PINMUX_DATA(PC1_DATA, PC1MD_0, PC1_IN, PC1_OUT),
392 PINMUX_DATA(A1_MARK, PC1MD_1),
393
394 PINMUX_DATA(PC0_DATA, PC0MD_00, PC0_IN, PC0_OUT),
395 PINMUX_DATA(A0_MARK, PC0MD_01),
396 PINMUX_DATA(CS7_MARK, PC0MD_10),
397
398 /* PD */
399 PINMUX_DATA(PD15_DATA, PD15MD_000, PD15_IN, PD15_OUT),
400 PINMUX_DATA(D31_MARK, PD15MD_001),
401 PINMUX_DATA(PINT7_PD_MARK, PD15MD_010),
402 PINMUX_DATA(ADTRG_PD_MARK, PD15MD_100),
403 PINMUX_DATA(TIOC4D_MARK, PD15MD_101),
404
405 PINMUX_DATA(PD14_DATA, PD14MD_000, PD14_IN, PD14_OUT),
406 PINMUX_DATA(D30_MARK, PD14MD_001),
407 PINMUX_DATA(PINT6_PD_MARK, PD14MD_010),
408 PINMUX_DATA(TIOC4C_MARK, PD14MD_101),
409
410 PINMUX_DATA(PD13_DATA, PD13MD_000, PD13_IN, PD13_OUT),
411 PINMUX_DATA(D29_MARK, PD13MD_001),
412 PINMUX_DATA(PINT5_PD_MARK, PD13MD_010),
413 PINMUX_DATA(TEND1_PD_MARK, PD13MD_100),
414 PINMUX_DATA(TIOC4B_MARK, PD13MD_101),
415
416 PINMUX_DATA(PD12_DATA, PD12MD_000, PD12_IN, PD12_OUT),
417 PINMUX_DATA(D28_MARK, PD12MD_001),
418 PINMUX_DATA(PINT4_PD_MARK, PD12MD_010),
419 PINMUX_DATA(DACK1_PD_MARK, PD12MD_100),
420 PINMUX_DATA(TIOC4A_MARK, PD12MD_101),
421
422 PINMUX_DATA(PD11_DATA, PD11MD_000, PD11_IN, PD11_OUT),
423 PINMUX_DATA(D27_MARK, PD11MD_001),
424 PINMUX_DATA(PINT3_PD_MARK, PD11MD_010),
425 PINMUX_DATA(DREQ1_PD_MARK, PD11MD_100),
426 PINMUX_DATA(TIOC3D_MARK, PD11MD_101),
427
428 PINMUX_DATA(PD10_DATA, PD10MD_000, PD10_IN, PD10_OUT),
429 PINMUX_DATA(D26_MARK, PD10MD_001),
430 PINMUX_DATA(PINT2_PD_MARK, PD10MD_010),
431 PINMUX_DATA(TEND0_PD_MARK, PD10MD_100),
432 PINMUX_DATA(TIOC3C_MARK, PD10MD_101),
433
434 PINMUX_DATA(PD9_DATA, PD9MD_000, PD9_IN, PD9_OUT),
435 PINMUX_DATA(D25_MARK, PD9MD_001),
436 PINMUX_DATA(PINT1_PD_MARK, PD9MD_010),
437 PINMUX_DATA(DACK0_PD_MARK, PD9MD_100),
438 PINMUX_DATA(TIOC3B_MARK, PD9MD_101),
439
440 PINMUX_DATA(PD8_DATA, PD8MD_000, PD8_IN, PD8_OUT),
441 PINMUX_DATA(D24_MARK, PD8MD_001),
442 PINMUX_DATA(PINT0_PD_MARK, PD8MD_010),
443 PINMUX_DATA(DREQ0_PD_MARK, PD8MD_100),
444 PINMUX_DATA(TIOC3A_MARK, PD8MD_101),
445
446 PINMUX_DATA(PD7_DATA, PD7MD_000, PD7_IN, PD7_OUT),
447 PINMUX_DATA(D23_MARK, PD7MD_001),
448 PINMUX_DATA(IRQ7_PD_MARK, PD7MD_010),
449 PINMUX_DATA(SCS1_PD_MARK, PD7MD_011),
450 PINMUX_DATA(TCLKD_PD_MARK, PD7MD_100),
451 PINMUX_DATA(TIOC2B_MARK, PD7MD_101),
452
453 PINMUX_DATA(PD6_DATA, PD6MD_000, PD6_IN, PD6_OUT),
454 PINMUX_DATA(D22_MARK, PD6MD_001),
455 PINMUX_DATA(IRQ6_PD_MARK, PD6MD_010),
456 PINMUX_DATA(SSO1_PD_MARK, PD6MD_011),
457 PINMUX_DATA(TCLKC_PD_MARK, PD6MD_100),
458 PINMUX_DATA(TIOC2A_MARK, PD6MD_101),
459
460 PINMUX_DATA(PD5_DATA, PD5MD_000, PD5_IN, PD5_OUT),
461 PINMUX_DATA(D21_MARK, PD5MD_001),
462 PINMUX_DATA(IRQ5_PD_MARK, PD5MD_010),
463 PINMUX_DATA(SSI1_PD_MARK, PD5MD_011),
464 PINMUX_DATA(TCLKB_PD_MARK, PD5MD_100),
465 PINMUX_DATA(TIOC1B_MARK, PD5MD_101),
466
467 PINMUX_DATA(PD4_DATA, PD4MD_000, PD4_IN, PD4_OUT),
468 PINMUX_DATA(D20_MARK, PD4MD_001),
469 PINMUX_DATA(IRQ4_PD_MARK, PD4MD_010),
470 PINMUX_DATA(SSCK1_PD_MARK, PD4MD_011),
471 PINMUX_DATA(TCLKA_PD_MARK, PD4MD_100),
472 PINMUX_DATA(TIOC1A_MARK, PD4MD_101),
473
474 PINMUX_DATA(PD3_DATA, PD3MD_000, PD3_IN, PD3_OUT),
475 PINMUX_DATA(D19_MARK, PD3MD_001),
476 PINMUX_DATA(IRQ3_PD_MARK, PD3MD_010),
477 PINMUX_DATA(SCS0_PD_MARK, PD3MD_011),
478 PINMUX_DATA(DACK3_MARK, PD3MD_100),
479 PINMUX_DATA(TIOC0D_MARK, PD3MD_101),
480
481 PINMUX_DATA(PD2_DATA, PD2MD_000, PD2_IN, PD2_OUT),
482 PINMUX_DATA(D18_MARK, PD2MD_001),
483 PINMUX_DATA(IRQ2_PD_MARK, PD2MD_010),
484 PINMUX_DATA(SSO0_PD_MARK, PD2MD_011),
485 PINMUX_DATA(DREQ3_MARK, PD2MD_100),
486 PINMUX_DATA(TIOC0C_MARK, PD2MD_101),
487
488 PINMUX_DATA(PD1_DATA, PD1MD_000, PD1_IN, PD1_OUT),
489 PINMUX_DATA(D17_MARK, PD1MD_001),
490 PINMUX_DATA(IRQ1_PD_MARK, PD1MD_010),
491 PINMUX_DATA(SSI0_PD_MARK, PD1MD_011),
492 PINMUX_DATA(DACK2_MARK, PD1MD_100),
493 PINMUX_DATA(TIOC0B_MARK, PD1MD_101),
494
495 PINMUX_DATA(PD0_DATA, PD0MD_000, PD0_IN, PD0_OUT),
496 PINMUX_DATA(D16_MARK, PD0MD_001),
497 PINMUX_DATA(IRQ0_PD_MARK, PD0MD_010),
498 PINMUX_DATA(SSCK0_PD_MARK, PD0MD_011),
499 PINMUX_DATA(DREQ2_MARK, PD0MD_100),
500 PINMUX_DATA(TIOC0A_MARK, PD0MD_101),
501
502 /* PE */
503 PINMUX_DATA(PE15_DATA, PE15MD_00, PE15_IN, PE15_OUT),
504 PINMUX_DATA(IOIS16_MARK, PE15MD_01),
505 PINMUX_DATA(RTS3_MARK, PE15MD_11),
506
507 PINMUX_DATA(PE14_DATA, PE14MD_00, PE14_IN, PE14_OUT),
508 PINMUX_DATA(CS1_MARK, PE14MD_01),
509 PINMUX_DATA(CTS3_MARK, PE14MD_11),
510
511 PINMUX_DATA(PE13_DATA, PE13MD_00, PE13_IN, PE13_OUT),
512 PINMUX_DATA(TXD3_MARK, PE13MD_11),
513
514 PINMUX_DATA(PE12_DATA, PE12MD_00, PE12_IN, PE12_OUT),
515 PINMUX_DATA(RXD3_MARK, PE12MD_11),
516
517 PINMUX_DATA(PE11_DATA, PE11MD_000, PE11_IN, PE11_OUT),
518 PINMUX_DATA(CS6_CE1B_MARK, PE11MD_001),
519 PINMUX_DATA(IRQ7_PE_MARK, PE11MD_010),
520 PINMUX_DATA(TEND1_PE_MARK, PE11MD_100),
521
522 PINMUX_DATA(PE10_DATA, PE10MD_000, PE10_IN, PE10_OUT),
523 PINMUX_DATA(CE2B_MARK, PE10MD_001),
524 PINMUX_DATA(IRQ6_PE_MARK, PE10MD_010),
525 PINMUX_DATA(TEND0_PE_MARK, PE10MD_100),
526
527 PINMUX_DATA(PE9_DATA, PE9MD_00, PE9_IN, PE9_OUT),
528 PINMUX_DATA(CS5_CE1A_MARK, PE9MD_01),
529 PINMUX_DATA(IRQ5_PE_MARK, PE9MD_10),
530 PINMUX_DATA(SCK3_MARK, PE9MD_11),
531
532 PINMUX_DATA(PE8_DATA, PE8MD_00, PE8_IN, PE8_OUT),
533 PINMUX_DATA(CE2A_MARK, PE8MD_01),
534 PINMUX_DATA(IRQ4_PE_MARK, PE8MD_10),
535 PINMUX_DATA(SCK2_MARK, PE8MD_11),
536
537 PINMUX_DATA(PE7_DATA, PE7MD_000, PE7_IN, PE7_OUT),
538 PINMUX_DATA(FRAME_MARK, PE7MD_001),
539 PINMUX_DATA(IRQ3_PE_MARK, PE7MD_010),
540 PINMUX_DATA(TXD2_MARK, PE7MD_011),
541 PINMUX_DATA(DACK1_PE_MARK, PE7MD_100),
542
543 PINMUX_DATA(PE6_DATA, PE6MD_000, PE6_IN, PE6_OUT),
544 PINMUX_DATA(A25_MARK, PE6MD_001),
545 PINMUX_DATA(IRQ2_PE_MARK, PE6MD_010),
546 PINMUX_DATA(RXD2_MARK, PE6MD_011),
547 PINMUX_DATA(DREQ1_PE_MARK, PE6MD_100),
548
549 PINMUX_DATA(PE5_DATA, PE5MD_000, PE5_IN, PE5_OUT),
550 PINMUX_DATA(A24_MARK, PE5MD_001),
551 PINMUX_DATA(IRQ1_PE_MARK, PE5MD_010),
552 PINMUX_DATA(TXD1_MARK, PE5MD_011),
553 PINMUX_DATA(DACK0_PE_MARK, PE5MD_100),
554
555 PINMUX_DATA(PE4_DATA, PE4MD_000, PE4_IN, PE4_OUT),
556 PINMUX_DATA(A23_MARK, PE4MD_001),
557 PINMUX_DATA(IRQ0_PE_MARK, PE4MD_010),
558 PINMUX_DATA(RXD1_MARK, PE4MD_011),
559 PINMUX_DATA(DREQ0_PE_MARK, PE4MD_100),
560
561 PINMUX_DATA(PE3_DATA, PE3MD_00, PE3_IN, PE3_OUT),
562 PINMUX_DATA(A22_MARK, PE3MD_01),
563 PINMUX_DATA(SCK1_MARK, PE3MD_11),
564
565 PINMUX_DATA(PE2_DATA, PE2MD_00, PE2_IN, PE2_OUT),
566 PINMUX_DATA(A21_MARK, PE2MD_01),
567 PINMUX_DATA(SCK0_MARK, PE2MD_11),
568
569 PINMUX_DATA(PE1_DATA, PE1MD_00, PE1_IN, PE1_OUT),
570 PINMUX_DATA(CS4_MARK, PE1MD_01),
571 PINMUX_DATA(MRES_MARK, PE1MD_10),
572 PINMUX_DATA(TXD0_MARK, PE1MD_11),
573
574 PINMUX_DATA(PE0_DATA, PE0MD_000, PE0_IN, PE0_OUT),
575 PINMUX_DATA(BS_MARK, PE0MD_001),
576 PINMUX_DATA(RXD0_MARK, PE0MD_011),
577 PINMUX_DATA(ADTRG_PE_MARK, PE0MD_100),
578
579 /* PF */
580 PINMUX_DATA(PF30_DATA, PF30MD_0, PF30_IN, PF30_OUT),
581 PINMUX_DATA(AUDIO_CLK_MARK, PF30MD_1),
582
583 PINMUX_DATA(PF29_DATA, PF29MD_0, PF29_IN, PF29_OUT),
584 PINMUX_DATA(SSIDATA3_MARK, PF29MD_1),
585
586 PINMUX_DATA(PF28_DATA, PF28MD_0, PF28_IN, PF28_OUT),
587 PINMUX_DATA(SSIWS3_MARK, PF28MD_1),
588
589 PINMUX_DATA(PF27_DATA, PF27MD_0, PF27_IN, PF27_OUT),
590 PINMUX_DATA(SSISCK3_MARK, PF27MD_1),
591
592 PINMUX_DATA(PF26_DATA, PF26MD_0, PF26_IN, PF26_OUT),
593 PINMUX_DATA(SSIDATA2_MARK, PF26MD_1),
594
595 PINMUX_DATA(PF25_DATA, PF25MD_0, PF25_IN, PF25_OUT),
596 PINMUX_DATA(SSIWS2_MARK, PF25MD_1),
597
598 PINMUX_DATA(PF24_DATA, PF24MD_0, PF24_IN, PF24_OUT),
599 PINMUX_DATA(SSISCK2_MARK, PF24MD_1),
600
601 PINMUX_DATA(PF23_DATA, PF23MD_00, PF23_IN, PF23_OUT),
602 PINMUX_DATA(SSIDATA1_MARK, PF23MD_01),
603 PINMUX_DATA(LCD_VEPWC_MARK, PF23MD_10),
604
605 PINMUX_DATA(PF22_DATA, PF22MD_00, PF22_IN, PF22_OUT),
606 PINMUX_DATA(SSIWS1_MARK, PF22MD_01),
607 PINMUX_DATA(LCD_VCPWC_MARK, PF22MD_10),
608
609 PINMUX_DATA(PF21_DATA, PF21MD_00, PF21_IN, PF21_OUT),
610 PINMUX_DATA(SSISCK1_MARK, PF21MD_01),
611 PINMUX_DATA(LCD_CLK_MARK, PF21MD_10),
612
613 PINMUX_DATA(PF20_DATA, PF20MD_00, PF20_IN, PF20_OUT),
614 PINMUX_DATA(SSIDATA0_MARK, PF20MD_01),
615 PINMUX_DATA(LCD_FLM_MARK, PF20MD_10),
616
617 PINMUX_DATA(PF19_DATA, PF19MD_00, PF19_IN, PF19_OUT),
618 PINMUX_DATA(SSIWS0_MARK, PF19MD_01),
619 PINMUX_DATA(LCD_M_DISP_MARK, PF19MD_10),
620
621 PINMUX_DATA(PF18_DATA, PF18MD_00, PF18_IN, PF18_OUT),
622 PINMUX_DATA(SSISCK0_MARK, PF18MD_01),
623 PINMUX_DATA(LCD_CL2_MARK, PF18MD_10),
624
625 PINMUX_DATA(PF17_DATA, PF17MD_00, PF17_IN, PF17_OUT),
626 PINMUX_DATA(FCE_MARK, PF17MD_01),
627 PINMUX_DATA(LCD_CL1_MARK, PF17MD_10),
628
629 PINMUX_DATA(PF16_DATA, PF16MD_00, PF16_IN, PF16_OUT),
630 PINMUX_DATA(FRB_MARK, PF16MD_01),
631 PINMUX_DATA(LCD_DON_MARK, PF16MD_10),
632
633 PINMUX_DATA(PF15_DATA, PF15MD_00, PF15_IN, PF15_OUT),
634 PINMUX_DATA(NAF7_MARK, PF15MD_01),
635 PINMUX_DATA(LCD_DATA15_MARK, PF15MD_10),
636
637 PINMUX_DATA(PF14_DATA, PF14MD_00, PF14_IN, PF14_OUT),
638 PINMUX_DATA(NAF6_MARK, PF14MD_01),
639 PINMUX_DATA(LCD_DATA14_MARK, PF14MD_10),
640
641 PINMUX_DATA(PF13_DATA, PF13MD_00, PF13_IN, PF13_OUT),
642 PINMUX_DATA(NAF5_MARK, PF13MD_01),
643 PINMUX_DATA(LCD_DATA13_MARK, PF13MD_10),
644
645 PINMUX_DATA(PF12_DATA, PF12MD_00, PF12_IN, PF12_OUT),
646 PINMUX_DATA(NAF4_MARK, PF12MD_01),
647 PINMUX_DATA(LCD_DATA12_MARK, PF12MD_10),
648
649 PINMUX_DATA(PF11_DATA, PF11MD_00, PF11_IN, PF11_OUT),
650 PINMUX_DATA(NAF3_MARK, PF11MD_01),
651 PINMUX_DATA(LCD_DATA11_MARK, PF11MD_10),
652
653 PINMUX_DATA(PF10_DATA, PF10MD_00, PF10_IN, PF10_OUT),
654 PINMUX_DATA(NAF2_MARK, PF10MD_01),
655 PINMUX_DATA(LCD_DATA10_MARK, PF10MD_10),
656
657 PINMUX_DATA(PF9_DATA, PF9MD_00, PF9_IN, PF9_OUT),
658 PINMUX_DATA(NAF1_MARK, PF9MD_01),
659 PINMUX_DATA(LCD_DATA9_MARK, PF9MD_10),
660
661 PINMUX_DATA(PF8_DATA, PF8MD_00, PF8_IN, PF8_OUT),
662 PINMUX_DATA(NAF0_MARK, PF8MD_01),
663 PINMUX_DATA(LCD_DATA8_MARK, PF8MD_10),
664
665 PINMUX_DATA(PF7_DATA, PF7MD_00, PF7_IN, PF7_OUT),
666 PINMUX_DATA(FSC_MARK, PF7MD_01),
667 PINMUX_DATA(LCD_DATA7_MARK, PF7MD_10),
668 PINMUX_DATA(SCS1_PF_MARK, PF7MD_11),
669
670 PINMUX_DATA(PF6_DATA, PF6MD_00, PF6_IN, PF6_OUT),
671 PINMUX_DATA(FOE_MARK, PF6MD_01),
672 PINMUX_DATA(LCD_DATA6_MARK, PF6MD_10),
673 PINMUX_DATA(SSO1_PF_MARK, PF6MD_11),
674
675 PINMUX_DATA(PF5_DATA, PF5MD_00, PF5_IN, PF5_OUT),
676 PINMUX_DATA(FCDE_MARK, PF5MD_01),
677 PINMUX_DATA(LCD_DATA5_MARK, PF5MD_10),
678 PINMUX_DATA(SSI1_PF_MARK, PF5MD_11),
679
680 PINMUX_DATA(PF4_DATA, PF4MD_00, PF4_IN, PF4_OUT),
681 PINMUX_DATA(FWE_MARK, PF4MD_01),
682 PINMUX_DATA(LCD_DATA4_MARK, PF4MD_10),
683 PINMUX_DATA(SSCK1_PF_MARK, PF4MD_11),
684
685 PINMUX_DATA(PF3_DATA, PF3MD_00, PF3_IN, PF3_OUT),
686 PINMUX_DATA(TCLKD_PF_MARK, PF3MD_01),
687 PINMUX_DATA(LCD_DATA3_MARK, PF3MD_10),
688 PINMUX_DATA(SCS0_PF_MARK, PF3MD_11),
689
690 PINMUX_DATA(PF2_DATA, PF2MD_00, PF2_IN, PF2_OUT),
691 PINMUX_DATA(TCLKC_PF_MARK, PF2MD_01),
692 PINMUX_DATA(LCD_DATA2_MARK, PF2MD_10),
693 PINMUX_DATA(SSO0_PF_MARK, PF2MD_11),
694
695 PINMUX_DATA(PF1_DATA, PF1MD_00, PF1_IN, PF1_OUT),
696 PINMUX_DATA(TCLKB_PF_MARK, PF1MD_01),
697 PINMUX_DATA(LCD_DATA1_MARK, PF1MD_10),
698 PINMUX_DATA(SSI0_PF_MARK, PF1MD_11),
699
700 PINMUX_DATA(PF0_DATA, PF0MD_00, PF0_IN, PF0_OUT),
701 PINMUX_DATA(TCLKA_PF_MARK, PF0MD_01),
702 PINMUX_DATA(LCD_DATA0_MARK, PF0MD_10),
703 PINMUX_DATA(SSCK0_PF_MARK, PF0MD_11),
704};
705
706static struct pinmux_gpio pinmux_gpios[] = {
707
708 /* PA */
709 PINMUX_GPIO(GPIO_PA7, PA7_DATA),
710 PINMUX_GPIO(GPIO_PA6, PA6_DATA),
711 PINMUX_GPIO(GPIO_PA5, PA5_DATA),
712 PINMUX_GPIO(GPIO_PA4, PA4_DATA),
713 PINMUX_GPIO(GPIO_PA3, PA3_DATA),
714 PINMUX_GPIO(GPIO_PA2, PA2_DATA),
715 PINMUX_GPIO(GPIO_PA1, PA1_DATA),
716 PINMUX_GPIO(GPIO_PA0, PA0_DATA),
717
718 /* PB */
719 PINMUX_GPIO(GPIO_PB12, PB12_DATA),
720 PINMUX_GPIO(GPIO_PB11, PB11_DATA),
721 PINMUX_GPIO(GPIO_PB10, PB10_DATA),
722 PINMUX_GPIO(GPIO_PB9, PB9_DATA),
723 PINMUX_GPIO(GPIO_PB8, PB8_DATA),
724 PINMUX_GPIO(GPIO_PB7, PB7_DATA),
725 PINMUX_GPIO(GPIO_PB6, PB6_DATA),
726 PINMUX_GPIO(GPIO_PB5, PB5_DATA),
727 PINMUX_GPIO(GPIO_PB4, PB4_DATA),
728 PINMUX_GPIO(GPIO_PB3, PB3_DATA),
729 PINMUX_GPIO(GPIO_PB2, PB2_DATA),
730 PINMUX_GPIO(GPIO_PB1, PB1_DATA),
731 PINMUX_GPIO(GPIO_PB0, PB0_DATA),
732
733 /* PC */
734 PINMUX_GPIO(GPIO_PC14, PC14_DATA),
735 PINMUX_GPIO(GPIO_PC13, PC13_DATA),
736 PINMUX_GPIO(GPIO_PC12, PC12_DATA),
737 PINMUX_GPIO(GPIO_PC11, PC11_DATA),
738 PINMUX_GPIO(GPIO_PC10, PC10_DATA),
739 PINMUX_GPIO(GPIO_PC9, PC9_DATA),
740 PINMUX_GPIO(GPIO_PC8, PC8_DATA),
741 PINMUX_GPIO(GPIO_PC7, PC7_DATA),
742 PINMUX_GPIO(GPIO_PC6, PC6_DATA),
743 PINMUX_GPIO(GPIO_PC5, PC5_DATA),
744 PINMUX_GPIO(GPIO_PC4, PC4_DATA),
745 PINMUX_GPIO(GPIO_PC3, PC3_DATA),
746 PINMUX_GPIO(GPIO_PC2, PC2_DATA),
747 PINMUX_GPIO(GPIO_PC1, PC1_DATA),
748 PINMUX_GPIO(GPIO_PC0, PC0_DATA),
749
750 /* PD */
751 PINMUX_GPIO(GPIO_PD15, PD15_DATA),
752 PINMUX_GPIO(GPIO_PD14, PD14_DATA),
753 PINMUX_GPIO(GPIO_PD13, PD13_DATA),
754 PINMUX_GPIO(GPIO_PD12, PD12_DATA),
755 PINMUX_GPIO(GPIO_PD11, PD11_DATA),
756 PINMUX_GPIO(GPIO_PD10, PD10_DATA),
757 PINMUX_GPIO(GPIO_PD9, PD9_DATA),
758 PINMUX_GPIO(GPIO_PD8, PD8_DATA),
759 PINMUX_GPIO(GPIO_PD7, PD7_DATA),
760 PINMUX_GPIO(GPIO_PD6, PD6_DATA),
761 PINMUX_GPIO(GPIO_PD5, PD5_DATA),
762 PINMUX_GPIO(GPIO_PD4, PD4_DATA),
763 PINMUX_GPIO(GPIO_PD3, PD3_DATA),
764 PINMUX_GPIO(GPIO_PD2, PD2_DATA),
765 PINMUX_GPIO(GPIO_PD1, PD1_DATA),
766 PINMUX_GPIO(GPIO_PD0, PD0_DATA),
767
768 /* PE */
769 PINMUX_GPIO(GPIO_PE15, PE15_DATA),
770 PINMUX_GPIO(GPIO_PE14, PE14_DATA),
771 PINMUX_GPIO(GPIO_PE13, PE13_DATA),
772 PINMUX_GPIO(GPIO_PE12, PE12_DATA),
773 PINMUX_GPIO(GPIO_PE11, PE11_DATA),
774 PINMUX_GPIO(GPIO_PE10, PE10_DATA),
775 PINMUX_GPIO(GPIO_PE9, PE9_DATA),
776 PINMUX_GPIO(GPIO_PE8, PE8_DATA),
777 PINMUX_GPIO(GPIO_PE7, PE7_DATA),
778 PINMUX_GPIO(GPIO_PE6, PE6_DATA),
779 PINMUX_GPIO(GPIO_PE5, PE5_DATA),
780 PINMUX_GPIO(GPIO_PE4, PE4_DATA),
781 PINMUX_GPIO(GPIO_PE3, PE3_DATA),
782 PINMUX_GPIO(GPIO_PE2, PE2_DATA),
783 PINMUX_GPIO(GPIO_PE1, PE1_DATA),
784 PINMUX_GPIO(GPIO_PE0, PE0_DATA),
785
786 /* PF */
787 PINMUX_GPIO(GPIO_PF30, PF30_DATA),
788 PINMUX_GPIO(GPIO_PF29, PF29_DATA),
789 PINMUX_GPIO(GPIO_PF28, PF28_DATA),
790 PINMUX_GPIO(GPIO_PF27, PF27_DATA),
791 PINMUX_GPIO(GPIO_PF26, PF26_DATA),
792 PINMUX_GPIO(GPIO_PF25, PF25_DATA),
793 PINMUX_GPIO(GPIO_PF24, PF24_DATA),
794 PINMUX_GPIO(GPIO_PF23, PF23_DATA),
795 PINMUX_GPIO(GPIO_PF22, PF22_DATA),
796 PINMUX_GPIO(GPIO_PF21, PF21_DATA),
797 PINMUX_GPIO(GPIO_PF20, PF20_DATA),
798 PINMUX_GPIO(GPIO_PF19, PF19_DATA),
799 PINMUX_GPIO(GPIO_PF18, PF18_DATA),
800 PINMUX_GPIO(GPIO_PF17, PF17_DATA),
801 PINMUX_GPIO(GPIO_PF16, PF16_DATA),
802 PINMUX_GPIO(GPIO_PF15, PF15_DATA),
803 PINMUX_GPIO(GPIO_PF14, PF14_DATA),
804 PINMUX_GPIO(GPIO_PF13, PF13_DATA),
805 PINMUX_GPIO(GPIO_PF12, PF12_DATA),
806 PINMUX_GPIO(GPIO_PF11, PF11_DATA),
807 PINMUX_GPIO(GPIO_PF10, PF10_DATA),
808 PINMUX_GPIO(GPIO_PF9, PF9_DATA),
809 PINMUX_GPIO(GPIO_PF8, PF8_DATA),
810 PINMUX_GPIO(GPIO_PF7, PF7_DATA),
811 PINMUX_GPIO(GPIO_PF6, PF6_DATA),
812 PINMUX_GPIO(GPIO_PF5, PF5_DATA),
813 PINMUX_GPIO(GPIO_PF4, PF4_DATA),
814 PINMUX_GPIO(GPIO_PF3, PF3_DATA),
815 PINMUX_GPIO(GPIO_PF2, PF2_DATA),
816 PINMUX_GPIO(GPIO_PF1, PF1_DATA),
817 PINMUX_GPIO(GPIO_PF0, PF0_DATA),
818
819 /* INTC */
820 PINMUX_GPIO(GPIO_FN_PINT7_PB, PINT7_PB_MARK),
821 PINMUX_GPIO(GPIO_FN_PINT6_PB, PINT6_PB_MARK),
822 PINMUX_GPIO(GPIO_FN_PINT5_PB, PINT5_PB_MARK),
823 PINMUX_GPIO(GPIO_FN_PINT4_PB, PINT4_PB_MARK),
824 PINMUX_GPIO(GPIO_FN_PINT3_PB, PINT3_PB_MARK),
825 PINMUX_GPIO(GPIO_FN_PINT2_PB, PINT2_PB_MARK),
826 PINMUX_GPIO(GPIO_FN_PINT1_PB, PINT1_PB_MARK),
827 PINMUX_GPIO(GPIO_FN_PINT0_PB, PINT0_PB_MARK),
828 PINMUX_GPIO(GPIO_FN_PINT7_PD, PINT7_PD_MARK),
829 PINMUX_GPIO(GPIO_FN_PINT6_PD, PINT6_PD_MARK),
830 PINMUX_GPIO(GPIO_FN_PINT5_PD, PINT5_PD_MARK),
831 PINMUX_GPIO(GPIO_FN_PINT4_PD, PINT4_PD_MARK),
832 PINMUX_GPIO(GPIO_FN_PINT3_PD, PINT3_PD_MARK),
833 PINMUX_GPIO(GPIO_FN_PINT2_PD, PINT2_PD_MARK),
834 PINMUX_GPIO(GPIO_FN_PINT1_PD, PINT1_PD_MARK),
835 PINMUX_GPIO(GPIO_FN_PINT0_PD, PINT0_PD_MARK),
836 PINMUX_GPIO(GPIO_FN_IRQ7_PB, IRQ7_PB_MARK),
837 PINMUX_GPIO(GPIO_FN_IRQ6_PB, IRQ6_PB_MARK),
838 PINMUX_GPIO(GPIO_FN_IRQ5_PB, IRQ5_PB_MARK),
839 PINMUX_GPIO(GPIO_FN_IRQ4_PB, IRQ4_PB_MARK),
840 PINMUX_GPIO(GPIO_FN_IRQ3_PB, IRQ3_PB_MARK),
841 PINMUX_GPIO(GPIO_FN_IRQ2_PB, IRQ2_PB_MARK),
842 PINMUX_GPIO(GPIO_FN_IRQ1_PB, IRQ1_PB_MARK),
843 PINMUX_GPIO(GPIO_FN_IRQ0_PB, IRQ0_PB_MARK),
844 PINMUX_GPIO(GPIO_FN_IRQ7_PD, IRQ7_PD_MARK),
845 PINMUX_GPIO(GPIO_FN_IRQ6_PD, IRQ6_PD_MARK),
846 PINMUX_GPIO(GPIO_FN_IRQ5_PD, IRQ5_PD_MARK),
847 PINMUX_GPIO(GPIO_FN_IRQ4_PD, IRQ4_PD_MARK),
848 PINMUX_GPIO(GPIO_FN_IRQ3_PD, IRQ3_PD_MARK),
849 PINMUX_GPIO(GPIO_FN_IRQ2_PD, IRQ2_PD_MARK),
850 PINMUX_GPIO(GPIO_FN_IRQ1_PD, IRQ1_PD_MARK),
851 PINMUX_GPIO(GPIO_FN_IRQ0_PD, IRQ0_PD_MARK),
852 PINMUX_GPIO(GPIO_FN_IRQ7_PE, IRQ7_PE_MARK),
853 PINMUX_GPIO(GPIO_FN_IRQ6_PE, IRQ6_PE_MARK),
854 PINMUX_GPIO(GPIO_FN_IRQ5_PE, IRQ5_PE_MARK),
855 PINMUX_GPIO(GPIO_FN_IRQ4_PE, IRQ4_PE_MARK),
856 PINMUX_GPIO(GPIO_FN_IRQ3_PE, IRQ3_PE_MARK),
857 PINMUX_GPIO(GPIO_FN_IRQ2_PE, IRQ2_PE_MARK),
858 PINMUX_GPIO(GPIO_FN_IRQ1_PE, IRQ1_PE_MARK),
859 PINMUX_GPIO(GPIO_FN_IRQ0_PE, IRQ0_PE_MARK),
860
861 PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK),
862 PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK),
863 PINMUX_GPIO(GPIO_FN_REFOUT, REFOUT_MARK),
864 PINMUX_GPIO(GPIO_FN_IRQOUT_REFOUT, IRQOUT_REFOUT_MARK),
865 PINMUX_GPIO(GPIO_FN_UBCTRG, UBCTRG_MARK),
866
867 /* CAN */
868 PINMUX_GPIO(GPIO_FN_CTX1, CTX1_MARK),
869 PINMUX_GPIO(GPIO_FN_CRX1, CRX1_MARK),
870 PINMUX_GPIO(GPIO_FN_CTX0, CTX0_MARK),
871 PINMUX_GPIO(GPIO_FN_CTX0_CTX1, CTX0_CTX1_MARK),
872 PINMUX_GPIO(GPIO_FN_CRX0, CRX0_MARK),
873 PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0_CRX1_MARK),
874
875 /* IIC3 */
876 PINMUX_GPIO(GPIO_FN_SDA3, SDA3_MARK),
877 PINMUX_GPIO(GPIO_FN_SCL3, SCL3_MARK),
878 PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK),
879 PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK),
880 PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK),
881 PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK),
882 PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK),
883 PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK),
884
885 /* DMAC */
886 PINMUX_GPIO(GPIO_FN_TEND0_PD, TEND0_PD_MARK),
887 PINMUX_GPIO(GPIO_FN_TEND0_PE, TEND0_PE_MARK),
888 PINMUX_GPIO(GPIO_FN_DACK0_PD, DACK0_PD_MARK),
889 PINMUX_GPIO(GPIO_FN_DACK0_PE, DACK0_PE_MARK),
890 PINMUX_GPIO(GPIO_FN_DREQ0_PD, DREQ0_PD_MARK),
891 PINMUX_GPIO(GPIO_FN_DREQ0_PE, DREQ0_PE_MARK),
892 PINMUX_GPIO(GPIO_FN_TEND1_PD, TEND1_PD_MARK),
893 PINMUX_GPIO(GPIO_FN_TEND1_PE, TEND1_PE_MARK),
894 PINMUX_GPIO(GPIO_FN_DACK1_PD, DACK1_PD_MARK),
895 PINMUX_GPIO(GPIO_FN_DACK1_PE, DACK1_PE_MARK),
896 PINMUX_GPIO(GPIO_FN_DREQ1_PD, DREQ1_PD_MARK),
897 PINMUX_GPIO(GPIO_FN_DREQ1_PE, DREQ1_PE_MARK),
898 PINMUX_GPIO(GPIO_FN_DACK2, DACK2_MARK),
899 PINMUX_GPIO(GPIO_FN_DREQ2, DREQ2_MARK),
900 PINMUX_GPIO(GPIO_FN_DACK3, DACK3_MARK),
901 PINMUX_GPIO(GPIO_FN_DREQ3, DREQ3_MARK),
902
903 /* ADC */
904 PINMUX_GPIO(GPIO_FN_ADTRG_PD, ADTRG_PD_MARK),
905 PINMUX_GPIO(GPIO_FN_ADTRG_PE, ADTRG_PE_MARK),
906
907 /* BSC */
908 PINMUX_GPIO(GPIO_FN_D31, D31_MARK),
909 PINMUX_GPIO(GPIO_FN_D30, D30_MARK),
910 PINMUX_GPIO(GPIO_FN_D29, D29_MARK),
911 PINMUX_GPIO(GPIO_FN_D28, D28_MARK),
912 PINMUX_GPIO(GPIO_FN_D27, D27_MARK),
913 PINMUX_GPIO(GPIO_FN_D26, D26_MARK),
914 PINMUX_GPIO(GPIO_FN_D25, D25_MARK),
915 PINMUX_GPIO(GPIO_FN_D24, D24_MARK),
916 PINMUX_GPIO(GPIO_FN_D23, D23_MARK),
917 PINMUX_GPIO(GPIO_FN_D22, D22_MARK),
918 PINMUX_GPIO(GPIO_FN_D21, D21_MARK),
919 PINMUX_GPIO(GPIO_FN_D20, D20_MARK),
920 PINMUX_GPIO(GPIO_FN_D19, D19_MARK),
921 PINMUX_GPIO(GPIO_FN_D18, D18_MARK),
922 PINMUX_GPIO(GPIO_FN_D17, D17_MARK),
923 PINMUX_GPIO(GPIO_FN_D16, D16_MARK),
924 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
925 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
926 PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
927 PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
928 PINMUX_GPIO(GPIO_FN_A21, A21_MARK),
929 PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
930 PINMUX_GPIO(GPIO_FN_MRES, MRES_MARK),
931 PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
932 PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
933 PINMUX_GPIO(GPIO_FN_CS1, CS1_MARK),
934 PINMUX_GPIO(GPIO_FN_CS6_CE1B, CS6_CE1B_MARK),
935 PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK),
936 PINMUX_GPIO(GPIO_FN_CS5_CE1A, CS5_CE1A_MARK),
937 PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK),
938 PINMUX_GPIO(GPIO_FN_FRAME, FRAME_MARK),
939 PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK),
940 PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK),
941 PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK),
942 PINMUX_GPIO(GPIO_FN_CASU, CASU_MARK),
943 PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK),
944 PINMUX_GPIO(GPIO_FN_RASU, RASU_MARK),
945 PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK),
946 PINMUX_GPIO(GPIO_FN_CASL, CASL_MARK),
947 PINMUX_GPIO(GPIO_FN_RASL, RASL_MARK),
948 PINMUX_GPIO(GPIO_FN_WE3_DQMUU_AH_ICIO_WR, WE3_DQMUU_AH_ICIO_WR_MARK),
949 PINMUX_GPIO(GPIO_FN_WE2_DQMUL_ICIORD, WE2_DQMUL_ICIORD_MARK),
950 PINMUX_GPIO(GPIO_FN_WE1_DQMLU_WE, WE1_DQMLU_WE_MARK),
951 PINMUX_GPIO(GPIO_FN_WE0_DQMLL, WE0_DQMLL_MARK),
952 PINMUX_GPIO(GPIO_FN_CS3, CS3_MARK),
953 PINMUX_GPIO(GPIO_FN_CS2, CS2_MARK),
954 PINMUX_GPIO(GPIO_FN_A1, A1_MARK),
955 PINMUX_GPIO(GPIO_FN_A0, A0_MARK),
956 PINMUX_GPIO(GPIO_FN_CS7, CS7_MARK),
957
958 /* TMU */
959 PINMUX_GPIO(GPIO_FN_TIOC4D, TIOC4D_MARK),
960 PINMUX_GPIO(GPIO_FN_TIOC4C, TIOC4C_MARK),
961 PINMUX_GPIO(GPIO_FN_TIOC4B, TIOC4B_MARK),
962 PINMUX_GPIO(GPIO_FN_TIOC4A, TIOC4A_MARK),
963 PINMUX_GPIO(GPIO_FN_TIOC3D, TIOC3D_MARK),
964 PINMUX_GPIO(GPIO_FN_TIOC3C, TIOC3C_MARK),
965 PINMUX_GPIO(GPIO_FN_TIOC3B, TIOC3B_MARK),
966 PINMUX_GPIO(GPIO_FN_TIOC3A, TIOC3A_MARK),
967 PINMUX_GPIO(GPIO_FN_TIOC2B, TIOC2B_MARK),
968 PINMUX_GPIO(GPIO_FN_TIOC1B, TIOC1B_MARK),
969 PINMUX_GPIO(GPIO_FN_TIOC2A, TIOC2A_MARK),
970 PINMUX_GPIO(GPIO_FN_TIOC1A, TIOC1A_MARK),
971 PINMUX_GPIO(GPIO_FN_TIOC0D, TIOC0D_MARK),
972 PINMUX_GPIO(GPIO_FN_TIOC0C, TIOC0C_MARK),
973 PINMUX_GPIO(GPIO_FN_TIOC0B, TIOC0B_MARK),
974 PINMUX_GPIO(GPIO_FN_TIOC0A, TIOC0A_MARK),
975 PINMUX_GPIO(GPIO_FN_TCLKD_PD, TCLKD_PD_MARK),
976 PINMUX_GPIO(GPIO_FN_TCLKC_PD, TCLKC_PD_MARK),
977 PINMUX_GPIO(GPIO_FN_TCLKB_PD, TCLKB_PD_MARK),
978 PINMUX_GPIO(GPIO_FN_TCLKA_PD, TCLKA_PD_MARK),
979 PINMUX_GPIO(GPIO_FN_TCLKD_PF, TCLKD_PF_MARK),
980 PINMUX_GPIO(GPIO_FN_TCLKC_PF, TCLKC_PF_MARK),
981 PINMUX_GPIO(GPIO_FN_TCLKB_PF, TCLKB_PF_MARK),
982 PINMUX_GPIO(GPIO_FN_TCLKA_PF, TCLKA_PF_MARK),
983
984 /* SSU */
985 PINMUX_GPIO(GPIO_FN_SCS0_PD, SCS0_PD_MARK),
986 PINMUX_GPIO(GPIO_FN_SSO0_PD, SSO0_PD_MARK),
987 PINMUX_GPIO(GPIO_FN_SSI0_PD, SSI0_PD_MARK),
988 PINMUX_GPIO(GPIO_FN_SSCK0_PD, SSCK0_PD_MARK),
989 PINMUX_GPIO(GPIO_FN_SCS0_PF, SCS0_PF_MARK),
990 PINMUX_GPIO(GPIO_FN_SSO0_PF, SSO0_PF_MARK),
991 PINMUX_GPIO(GPIO_FN_SSI0_PF, SSI0_PF_MARK),
992 PINMUX_GPIO(GPIO_FN_SSCK0_PF, SSCK0_PF_MARK),
993 PINMUX_GPIO(GPIO_FN_SCS1_PD, SCS1_PD_MARK),
994 PINMUX_GPIO(GPIO_FN_SSO1_PD, SSO1_PD_MARK),
995 PINMUX_GPIO(GPIO_FN_SSI1_PD, SSI1_PD_MARK),
996 PINMUX_GPIO(GPIO_FN_SSCK1_PD, SSCK1_PD_MARK),
997 PINMUX_GPIO(GPIO_FN_SCS1_PF, SCS1_PF_MARK),
998 PINMUX_GPIO(GPIO_FN_SSO1_PF, SSO1_PF_MARK),
999 PINMUX_GPIO(GPIO_FN_SSI1_PF, SSI1_PF_MARK),
1000 PINMUX_GPIO(GPIO_FN_SSCK1_PF, SSCK1_PF_MARK),
1001
1002 /* SCIF */
1003 PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK),
1004 PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK),
1005 PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK),
1006 PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK),
1007 PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK),
1008 PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK),
1009 PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),
1010 PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),
1011 PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),
1012 PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK),
1013 PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK),
1014 PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),
1015 PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),
1016 PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
1017
1018 /* SSI */
1019 PINMUX_GPIO(GPIO_FN_AUDIO_CLK, AUDIO_CLK_MARK),
1020 PINMUX_GPIO(GPIO_FN_SSIDATA3, SSIDATA3_MARK),
1021 PINMUX_GPIO(GPIO_FN_SSIWS3, SSIWS3_MARK),
1022 PINMUX_GPIO(GPIO_FN_SSISCK3, SSISCK3_MARK),
1023 PINMUX_GPIO(GPIO_FN_SSIDATA2, SSIDATA2_MARK),
1024 PINMUX_GPIO(GPIO_FN_SSIWS2, SSIWS2_MARK),
1025 PINMUX_GPIO(GPIO_FN_SSISCK2, SSISCK2_MARK),
1026 PINMUX_GPIO(GPIO_FN_SSIDATA1, SSIDATA1_MARK),
1027 PINMUX_GPIO(GPIO_FN_SSIWS1, SSIWS1_MARK),
1028 PINMUX_GPIO(GPIO_FN_SSISCK1, SSISCK1_MARK),
1029 PINMUX_GPIO(GPIO_FN_SSIDATA0, SSIDATA0_MARK),
1030 PINMUX_GPIO(GPIO_FN_SSIWS0, SSIWS0_MARK),
1031 PINMUX_GPIO(GPIO_FN_SSISCK0, SSISCK0_MARK),
1032
1033 /* FLCTL */
1034 PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK),
1035 PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),
1036 PINMUX_GPIO(GPIO_FN_NAF7, NAF7_MARK),
1037 PINMUX_GPIO(GPIO_FN_NAF6, NAF6_MARK),
1038 PINMUX_GPIO(GPIO_FN_NAF5, NAF5_MARK),
1039 PINMUX_GPIO(GPIO_FN_NAF4, NAF4_MARK),
1040 PINMUX_GPIO(GPIO_FN_NAF3, NAF3_MARK),
1041 PINMUX_GPIO(GPIO_FN_NAF2, NAF2_MARK),
1042 PINMUX_GPIO(GPIO_FN_NAF1, NAF1_MARK),
1043 PINMUX_GPIO(GPIO_FN_NAF0, NAF0_MARK),
1044 PINMUX_GPIO(GPIO_FN_FSC, FSC_MARK),
1045 PINMUX_GPIO(GPIO_FN_FOE, FOE_MARK),
1046 PINMUX_GPIO(GPIO_FN_FCDE, FCDE_MARK),
1047 PINMUX_GPIO(GPIO_FN_FWE, FWE_MARK),
1048
1049 /* LCDC */
1050 PINMUX_GPIO(GPIO_FN_LCD_VEPWC, LCD_VEPWC_MARK),
1051 PINMUX_GPIO(GPIO_FN_LCD_VCPWC, LCD_VCPWC_MARK),
1052 PINMUX_GPIO(GPIO_FN_LCD_CLK, LCD_CLK_MARK),
1053 PINMUX_GPIO(GPIO_FN_LCD_FLM, LCD_FLM_MARK),
1054 PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK),
1055 PINMUX_GPIO(GPIO_FN_LCD_CL2, LCD_CL2_MARK),
1056 PINMUX_GPIO(GPIO_FN_LCD_CL1, LCD_CL1_MARK),
1057 PINMUX_GPIO(GPIO_FN_LCD_DON, LCD_DON_MARK),
1058 PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK),
1059 PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK),
1060 PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK),
1061 PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK),
1062 PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK),
1063 PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK),
1064 PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK),
1065 PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK),
1066 PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK),
1067 PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK),
1068 PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK),
1069 PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK),
1070 PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK),
1071 PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK),
1072 PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK),
1073 PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK),
1074};
1075
1076static struct pinmux_cfg_reg pinmux_config_regs[] = {
1077 { PINMUX_CFG_REG("PBIORL", 0xfffe3886, 16, 1) {
1078 0, 0,
1079 0, 0,
1080 0, 0,
1081 0, 0,
1082 PB11_IN, PB11_OUT,
1083 PB10_IN, PB10_OUT,
1084 PB9_IN, PB9_OUT,
1085 PB8_IN, PB8_OUT,
1086 0, 0,
1087 0, 0,
1088 0, 0,
1089 0, 0,
1090 0, 0,
1091 0, 0,
1092 0, 0,
1093 0, 0 }
1094 },
1095 { PINMUX_CFG_REG("PBCRL4", 0xfffe3890, 16, 4) {
1096 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1097
1098 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1099
1100 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1101
1102 PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,
1103 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1104 },
1105 { PINMUX_CFG_REG("PBCRL3", 0xfffe3892, 16, 4) {
1106 PB11MD_0, PB11MD_1,
1107 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1108
1109 PB10MD_0, PB10MD_1,
1110 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1111
1112 PB9MD_00, PB9MD_01, PB9MD_10, 0,
1113 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1114
1115 PB8MD_00, PB8MD_01, PB8MD_10, 0,
1116 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1117 },
1118 { PINMUX_CFG_REG("PBCRL2", 0xfffe3894, 16, 4) {
1119 PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,
1120 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1121
1122 PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,
1123 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1124
1125 PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,
1126 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1127
1128 PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,
1129 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1130 },
1131 { PINMUX_CFG_REG("PBCRL1", 0xfffe3896, 16, 4) {
1132 PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11,
1133 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1134
1135 PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11,
1136 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1137
1138 PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11,
1139 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1140
1141 PB0MD_00, PB0MD_01, PB0MD_10, PB0MD_11,
1142 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1143 },
1144 { PINMUX_CFG_REG("IFCR", 0xfffe38a2, 16, 4) {
1145 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1146
1147 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1148
1149 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1150
1151 PB12IRQ_00, PB12IRQ_01, PB12IRQ_10, 0,
1152 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1153 },
1154 { PINMUX_CFG_REG("PCIORL", 0xfffe3906, 16, 1) {
1155 0, 0,
1156 PC14_IN, PC14_OUT,
1157 PC13_IN, PC13_OUT,
1158 PC12_IN, PC12_OUT,
1159 PC11_IN, PC11_OUT,
1160 PC10_IN, PC10_OUT,
1161 PC9_IN, PC9_OUT,
1162 PC8_IN, PC8_OUT,
1163 PC7_IN, PC7_OUT,
1164 PC6_IN, PC6_OUT,
1165 PC5_IN, PC5_OUT,
1166 PC4_IN, PC4_OUT,
1167 PC3_IN, PC3_OUT,
1168 PC2_IN, PC2_OUT,
1169 PC1_IN, PC1_OUT,
1170 PC0_IN, PC0_OUT }
1171 },
1172 { PINMUX_CFG_REG("PCCRL4", 0xfffe3910, 16, 4) {
1173 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1174
1175 PC14MD_0, PC14MD_1,
1176 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1177
1178 PC13MD_0, PC13MD_1,
1179 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1180
1181 PC12MD_0, PC12MD_1,
1182 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1183 },
1184 { PINMUX_CFG_REG("PCCRL3", 0xfffe3912, 16, 4) {
1185 PC11MD_00, PC11MD_01, PC11MD_10, 0,
1186 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1187
1188 PC10MD_00, PC10MD_01, PC10MD_10, 0,
1189 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1190
1191 PC9MD_0, PC9MD_1,
1192 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1193
1194 PC8MD_0, PC8MD_1,
1195 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1196 },
1197 { PINMUX_CFG_REG("PCCRL2", 0xfffe3914, 16, 4) {
1198 PC7MD_0, PC7MD_1,
1199 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1200
1201 PC6MD_0, PC6MD_1,
1202 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1203
1204 PC5MD_0, PC5MD_1,
1205 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1206
1207 PC4MD_0, PC4MD_1,
1208 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1209 },
1210 { PINMUX_CFG_REG("PCCRL1", 0xfffe3916, 16, 4) {
1211 PC3MD_0, PC3MD_1,
1212 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1213
1214 PC2MD_0, PC2MD_1,
1215 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1216
1217 PC1MD_0, PC1MD_1,
1218 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1219
1220 PC0MD_00, PC0MD_01, PC0MD_10, 0,
1221 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1222 },
1223 { PINMUX_CFG_REG("PDIORL", 0xfffe3986, 16, 1) {
1224 PD15_IN, PD15_OUT,
1225 PD14_IN, PD14_OUT,
1226 PD13_IN, PD13_OUT,
1227 PD12_IN, PD12_OUT,
1228 PD11_IN, PD11_OUT,
1229 PD10_IN, PD10_OUT,
1230 PD9_IN, PD9_OUT,
1231 PD8_IN, PD8_OUT,
1232 PD7_IN, PD7_OUT,
1233 PD6_IN, PD6_OUT,
1234 PD5_IN, PD5_OUT,
1235 PD4_IN, PD4_OUT,
1236 PD3_IN, PD3_OUT,
1237 PD2_IN, PD2_OUT,
1238 PD1_IN, PD1_OUT,
1239 PD0_IN, PD0_OUT }
1240 },
1241 { PINMUX_CFG_REG("PDCRL4", 0xfffe3990, 16, 4) {
1242 PD15MD_000, PD15MD_001, PD15MD_010, 0,
1243 PD15MD_100, PD15MD_101, 0, 0,
1244 0, 0, 0, 0, 0, 0, 0, 0,
1245
1246 PD14MD_000, PD14MD_001, PD14MD_010, 0,
1247 0, PD14MD_101, 0, 0,
1248 0, 0, 0, 0, 0, 0, 0, 0,
1249
1250 PD13MD_000, PD13MD_001, PD13MD_010, 0,
1251 PD13MD_100, PD13MD_101, 0, 0,
1252 0, 0, 0, 0, 0, 0, 0, 0,
1253
1254 PD12MD_000, PD12MD_001, PD12MD_010, 0,
1255 PD12MD_100, PD12MD_101, 0, 0,
1256 0, 0, 0, 0, 0, 0, 0, 0 }
1257 },
1258 { PINMUX_CFG_REG("PDCRL3", 0xfffe3992, 16, 4) {
1259 PD11MD_000, PD11MD_001, PD11MD_010, 0,
1260 PD11MD_100, PD11MD_101, 0, 0,
1261 0, 0, 0, 0, 0, 0, 0, 0,
1262
1263 PD10MD_000, PD10MD_001, PD10MD_010, 0,
1264 PD10MD_100, PD10MD_101, 0, 0,
1265 0, 0, 0, 0, 0, 0, 0, 0,
1266
1267 PD9MD_000, PD9MD_001, PD9MD_010, 0,
1268 PD9MD_100, PD9MD_101, 0, 0,
1269 0, 0, 0, 0, 0, 0, 0, 0,
1270
1271 PD8MD_000, PD8MD_001, PD8MD_010, 0,
1272 PD8MD_100, PD8MD_101, 0, 0,
1273 0, 0, 0, 0, 0, 0, 0, 0 }
1274 },
1275 { PINMUX_CFG_REG("PDCRL2", 0xfffe3994, 16, 4) {
1276 PD7MD_000, PD7MD_001, PD7MD_010, PD7MD_011,
1277 PD7MD_100, PD7MD_101, 0, 0,
1278 0, 0, 0, 0, 0, 0, 0, 0,
1279
1280 PD6MD_000, PD6MD_001, PD6MD_010, PD6MD_011,
1281 PD6MD_100, PD6MD_101, 0, 0,
1282 0, 0, 0, 0, 0, 0, 0, 0,
1283
1284 PD5MD_000, PD5MD_001, PD5MD_010, PD5MD_011,
1285 PD5MD_100, PD5MD_101, 0, 0,
1286 0, 0, 0, 0, 0, 0, 0, 0,
1287
1288 PD4MD_000, PD4MD_001, PD4MD_010, PD4MD_011,
1289 PD4MD_100, PD4MD_101, 0, 0,
1290 0, 0, 0, 0, 0, 0, 0, 0 }
1291 },
1292 { PINMUX_CFG_REG("PDCRL1", 0xfffe3996, 16, 4) {
1293 PD3MD_000, PD3MD_001, PD3MD_010, PD3MD_011,
1294 PD3MD_100, PD3MD_101, 0, 0,
1295 0, 0, 0, 0, 0, 0, 0, 0,
1296
1297 PD2MD_000, PD2MD_001, PD2MD_010, PD2MD_011,
1298 PD2MD_100, PD2MD_101, 0, 0,
1299 0, 0, 0, 0, 0, 0, 0, 0,
1300
1301 PD1MD_000, PD1MD_001, PD1MD_010, PD1MD_011,
1302 PD1MD_100, PD1MD_101, 0, 0,
1303 0, 0, 0, 0, 0, 0, 0, 0,
1304
1305 PD0MD_000, PD0MD_001, PD0MD_010, PD0MD_011,
1306 PD0MD_100, PD0MD_101, 0, 0,
1307 0, 0, 0, 0, 0, 0, 0, 0 }
1308 },
1309 { PINMUX_CFG_REG("PEIORL", 0xfffe3a06, 16, 1) {
1310 PE15_IN, PE15_OUT,
1311 PE14_IN, PE14_OUT,
1312 PE13_IN, PE13_OUT,
1313 PE12_IN, PE12_OUT,
1314 PE11_IN, PE11_OUT,
1315 PE10_IN, PE10_OUT,
1316 PE9_IN, PE9_OUT,
1317 PE8_IN, PE8_OUT,
1318 PE7_IN, PE7_OUT,
1319 PE6_IN, PE6_OUT,
1320 PE5_IN, PE5_OUT,
1321 PE4_IN, PE4_OUT,
1322 PE3_IN, PE3_OUT,
1323 PE2_IN, PE2_OUT,
1324 PE1_IN, PE1_OUT,
1325 PE0_IN, PE0_OUT }
1326 },
1327 { PINMUX_CFG_REG("PECRL4", 0xfffe3a10, 16, 4) {
1328 PE15MD_00, PE15MD_01, 0, PE15MD_11,
1329 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1330
1331 PE14MD_00, PE14MD_01, 0, PE14MD_11,
1332 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1333
1334 PE13MD_00, 0, 0, PE13MD_11,
1335 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1336
1337 PE12MD_00, 0, 0, PE12MD_11,
1338 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1339 },
1340 { PINMUX_CFG_REG("PECRL3", 0xfffe3a12, 16, 4) {
1341 PE11MD_000, PE11MD_001, PE11MD_010, 0,
1342 PE11MD_100, 0, 0, 0,
1343 0, 0, 0, 0, 0, 0, 0, 0,
1344
1345 PE10MD_000, PE10MD_001, PE10MD_010, 0,
1346 PE10MD_100, 0, 0, 0,
1347 0, 0, 0, 0, 0, 0, 0, 0,
1348
1349 PE9MD_00, PE9MD_01, PE9MD_10, PE9MD_11,
1350 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1351
1352 PE8MD_00, PE8MD_01, PE8MD_10, PE8MD_11,
1353 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1354 },
1355 { PINMUX_CFG_REG("PECRL2", 0xfffe3a14, 16, 4) {
1356 PE7MD_000, PE7MD_001, PE7MD_010, PE7MD_011,
1357 PE7MD_100, 0, 0, 0,
1358 0, 0, 0, 0, 0, 0, 0, 0,
1359
1360 PE6MD_000, PE6MD_001, PE6MD_010, PE6MD_011,
1361 PE6MD_100, 0, 0, 0,
1362 0, 0, 0, 0, 0, 0, 0, 0,
1363
1364 PE5MD_000, PE5MD_001, PE5MD_010, PE5MD_011,
1365 PE5MD_100, 0, 0, 0,
1366 0, 0, 0, 0, 0, 0, 0, 0,
1367
1368 PE4MD_000, PE4MD_001, PE4MD_010, PE4MD_011,
1369 PE4MD_100, 0, 0, 0,
1370 0, 0, 0, 0, 0, 0, 0, 0 }
1371 },
1372 { PINMUX_CFG_REG("PECRL1", 0xfffe3a16, 16, 4) {
1373 PE3MD_00, PE3MD_01, 0, PE3MD_11,
1374 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1375
1376 PE2MD_00, PE2MD_01, 0, PE2MD_11,
1377 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1378
1379 PE1MD_00, PE1MD_01, PE1MD_10, PE1MD_11,
1380 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1381
1382 PE0MD_000, PE0MD_001, 0, PE0MD_011,
1383 PE0MD_100, 0, 0, 0,
1384 0, 0, 0, 0, 0, 0, 0, 0 }
1385 },
1386 { PINMUX_CFG_REG("PFIORH", 0xfffe3a84, 16, 1) {
1387 0, 0,
1388 PF30_IN, PF30_OUT,
1389 PF29_IN, PF29_OUT,
1390 PF28_IN, PF28_OUT,
1391 PF27_IN, PF27_OUT,
1392 PF26_IN, PF26_OUT,
1393 PF25_IN, PF25_OUT,
1394 PF24_IN, PF24_OUT,
1395 PF23_IN, PF23_OUT,
1396 PF22_IN, PF22_OUT,
1397 PF21_IN, PF21_OUT,
1398 PF20_IN, PF20_OUT,
1399 PF19_IN, PF19_OUT,
1400 PF18_IN, PF18_OUT,
1401 PF17_IN, PF17_OUT,
1402 PF16_IN, PF16_OUT }
1403 },
1404 { PINMUX_CFG_REG("PFIORL", 0xfffe3a86, 16, 1) {
1405 PF15_IN, PF15_OUT,
1406 PF14_IN, PF14_OUT,
1407 PF13_IN, PF13_OUT,
1408 PF12_IN, PF12_OUT,
1409 PF11_IN, PF11_OUT,
1410 PF10_IN, PF10_OUT,
1411 PF9_IN, PF9_OUT,
1412 PF8_IN, PF8_OUT,
1413 PF7_IN, PF7_OUT,
1414 PF6_IN, PF6_OUT,
1415 PF5_IN, PF5_OUT,
1416 PF4_IN, PF4_OUT,
1417 PF3_IN, PF3_OUT,
1418 PF2_IN, PF2_OUT,
1419 PF1_IN, PF1_OUT,
1420 PF0_IN, PF0_OUT }
1421 },
1422 { PINMUX_CFG_REG("PFCRH4", 0xfffe3a88, 16, 4) {
1423 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1424
1425 PF30MD_0, PF30MD_1,
1426 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1427
1428 PF29MD_0, PF29MD_1,
1429 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1430
1431 PF28MD_0, PF28MD_1,
1432 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1433 },
1434 { PINMUX_CFG_REG("PFCRH3", 0xfffe3a8a, 16, 4) {
1435 PF27MD_0, PF27MD_1,
1436 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1437
1438 PF26MD_0, PF26MD_1,
1439 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1440
1441 PF25MD_0, PF25MD_1,
1442 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1443
1444 PF24MD_0, PF24MD_1,
1445 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1446 },
1447 { PINMUX_CFG_REG("PFCRH2", 0xfffe3a8c, 16, 4) {
1448 PF23MD_00, PF23MD_01, PF23MD_10, 0,
1449 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1450
1451 PF22MD_00, PF22MD_01, PF22MD_10, 0,
1452 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1453
1454 PF21MD_00, PF21MD_01, PF21MD_10, 0,
1455 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1456
1457 PF20MD_00, PF20MD_01, PF20MD_10, 0,
1458 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1459 },
1460 { PINMUX_CFG_REG("PFCRH1", 0xfffe3a8e, 16, 4) {
1461 PF19MD_00, PF19MD_01, PF19MD_10, 0,
1462 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1463
1464 PF18MD_00, PF18MD_01, PF18MD_10, 0,
1465 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1466
1467 PF17MD_00, PF17MD_01, PF17MD_10, 0,
1468 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1469
1470 PF16MD_00, PF16MD_01, PF16MD_10, 0,
1471 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1472 },
1473 { PINMUX_CFG_REG("PFCRL4", 0xfffe3a90, 16, 4) {
1474 PF15MD_00, PF15MD_01, PF15MD_10, 0,
1475 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1476
1477 PF14MD_00, PF14MD_01, PF14MD_10, 0,
1478 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1479
1480 PF13MD_00, PF13MD_01, PF13MD_10, 0,
1481 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1482
1483 PF12MD_00, PF12MD_01, PF12MD_10, 0,
1484 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1485 },
1486 { PINMUX_CFG_REG("PFCRL3", 0xfffe3a92, 16, 4) {
1487 PF11MD_00, PF11MD_01, PF11MD_10, 0,
1488 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1489
1490 PF10MD_00, PF10MD_01, PF10MD_10, 0,
1491 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1492
1493 PF9MD_00, PF9MD_01, PF9MD_10, 0,
1494 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1495
1496 PF8MD_00, PF8MD_01, PF8MD_10, 0,
1497 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1498 },
1499 { PINMUX_CFG_REG("PFCRL2", 0xfffe3a94, 16, 4) {
1500 PF7MD_00, PF7MD_01, PF7MD_10, PF7MD_11,
1501 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1502
1503 PF6MD_00, PF6MD_01, PF6MD_10, PF6MD_11,
1504 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1505
1506 PF5MD_00, PF5MD_01, PF5MD_10, PF5MD_11,
1507 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1508
1509 PF4MD_00, PF4MD_01, PF4MD_10, PF4MD_11,
1510 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1511 },
1512 { PINMUX_CFG_REG("PFCRL1", 0xfffe3a96, 16, 4) {
1513 PF3MD_00, PF3MD_01, PF3MD_10, PF3MD_11,
1514 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1515
1516 PF2MD_00, PF2MD_01, PF2MD_10, PF2MD_11,
1517 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1518
1519 PF1MD_00, PF1MD_01, PF1MD_10, PF1MD_11,
1520 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1521
1522 PF0MD_00, PF0MD_01, PF0MD_10, PF0MD_11,
1523 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
1524 },
1525 {}
1526};
1527
1528static struct pinmux_data_reg pinmux_data_regs[] = {
1529 { PINMUX_DATA_REG("PADRL", 0xfffe3802, 16) {
1530 0, 0, 0, 0,
1531 0, 0, 0, 0,
1532 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
1533 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA }
1534 },
1535 { PINMUX_DATA_REG("PBDRL", 0xfffe3882, 16) {
1536 0, 0, 0, PB12_DATA,
1537 PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
1538 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
1539 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA }
1540 },
1541 { PINMUX_DATA_REG("PCDRL", 0xfffe3902, 16) {
1542 0, PC14_DATA, PC13_DATA, PC12_DATA,
1543 PC11_DATA, PC10_DATA, PC9_DATA, PC8_DATA,
1544 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
1545 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
1546 },
1547 { PINMUX_DATA_REG("PDDRL", 0xfffe3982, 16) {
1548 PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
1549 PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
1550 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
1551 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
1552 },
1553 { PINMUX_DATA_REG("PEDRL", 0xfffe3a02, 16) {
1554 PE15_DATA, PE14_DATA, PE13_DATA, PE12_DATA,
1555 PE11_DATA, PE10_DATA, PE9_DATA, PE8_DATA,
1556 PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
1557 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }
1558 },
1559 { PINMUX_DATA_REG("PFDRH", 0xfffe3a80, 16) {
1560 0, PF30_DATA, PF29_DATA, PF28_DATA,
1561 PF27_DATA, PF26_DATA, PF25_DATA, PF24_DATA,
1562 PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
1563 PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA }
1564 },
1565 { PINMUX_DATA_REG("PFDRL", 0xfffe3a82, 16) {
1566 PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
1567 PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
1568 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
1569 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
1570 },
1571 { },
1572};
1573
1574struct sh_pfc_soc_info sh7203_pinmux_info = {
1575 .name = "sh7203_pfc",
1576 .reserved_id = PINMUX_RESERVED,
1577 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1578 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN },
1579 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },
1580 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1581 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1582
1583 .first_gpio = GPIO_PA7,
1584 .last_gpio = GPIO_FN_LCD_DATA0,
1585
1586 .gpios = pinmux_gpios,
1587 .cfg_regs = pinmux_config_regs,
1588 .data_regs = pinmux_data_regs,
1589
1590 .gpio_data = pinmux_data,
1591 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1592};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7264.c b/drivers/pinctrl/sh-pfc/pfc-sh7264.c
new file mode 100644
index 000000000000..2ba5639dcf34
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7264.c
@@ -0,0 +1,2131 @@
1/*
2 * SH7264 Pinmux
3 *
4 * Copyright (C) 2012 Renesas Electronics Europe Ltd
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/kernel.h>
12#include <linux/gpio.h>
13#include <cpu/sh7264.h>
14
15#include "sh_pfc.h"
16
17enum {
18 PINMUX_RESERVED = 0,
19
20 PINMUX_DATA_BEGIN,
21 /* Port A */
22 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
23 /* Port B */
24 PB22_DATA, PB21_DATA, PB20_DATA,
25 PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA,
26 PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA,
27 PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
28 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
29 PB3_DATA, PB2_DATA, PB1_DATA,
30 /* Port C */
31 PC10_DATA, PC9_DATA, PC8_DATA,
32 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
33 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
34 /* Port D */
35 PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
36 PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
37 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
38 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
39 /* Port E */
40 PE5_DATA, PE4_DATA,
41 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
42 /* Port F */
43 PF12_DATA,
44 PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
45 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
46 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
47 /* Port G */
48 PG24_DATA,
49 PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA,
50 PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA,
51 PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA,
52 PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA,
53 PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
54 PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
55 /* Port H */
56 /* NOTE - Port H does not have a Data Register, but PH Data is
57 connected to PH Port Register */
58 PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
59 PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
60 /* Port I - not on device */
61 /* Port J */
62 PJ12_DATA,
63 PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA,
64 PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
65 PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA,
66 /* Port K */
67 PK12_DATA,
68 PK11_DATA, PK10_DATA, PK9_DATA, PK8_DATA,
69 PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,
70 PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA,
71 PINMUX_DATA_END,
72
73 PINMUX_INPUT_BEGIN,
74 FORCE_IN,
75 /* Port A */
76 PA3_IN, PA2_IN, PA1_IN, PA0_IN,
77 /* Port B */
78 PB22_IN, PB21_IN, PB20_IN,
79 PB19_IN, PB18_IN, PB17_IN, PB16_IN,
80 PB15_IN, PB14_IN, PB13_IN, PB12_IN,
81 PB11_IN, PB10_IN, PB9_IN, PB8_IN,
82 PB7_IN, PB6_IN, PB5_IN, PB4_IN,
83 PB3_IN, PB2_IN, PB1_IN,
84 /* Port C */
85 PC10_IN, PC9_IN, PC8_IN,
86 PC7_IN, PC6_IN, PC5_IN, PC4_IN,
87 PC3_IN, PC2_IN, PC1_IN, PC0_IN,
88 /* Port D */
89 PD15_IN, PD14_IN, PD13_IN, PD12_IN,
90 PD11_IN, PD10_IN, PD9_IN, PD8_IN,
91 PD7_IN, PD6_IN, PD5_IN, PD4_IN,
92 PD3_IN, PD2_IN, PD1_IN, PD0_IN,
93 /* Port E */
94 PE5_IN, PE4_IN,
95 PE3_IN, PE2_IN, PE1_IN, PE0_IN,
96 /* Port F */
97 PF12_IN,
98 PF11_IN, PF10_IN, PF9_IN, PF8_IN,
99 PF7_IN, PF6_IN, PF5_IN, PF4_IN,
100 PF3_IN, PF2_IN, PF1_IN, PF0_IN,
101 /* Port G */
102 PG24_IN,
103 PG23_IN, PG22_IN, PG21_IN, PG20_IN,
104 PG19_IN, PG18_IN, PG17_IN, PG16_IN,
105 PG15_IN, PG14_IN, PG13_IN, PG12_IN,
106 PG11_IN, PG10_IN, PG9_IN, PG8_IN,
107 PG7_IN, PG6_IN, PG5_IN, PG4_IN,
108 PG3_IN, PG2_IN, PG1_IN, PG0_IN,
109 /* Port H - Port H does not have a Data Register */
110 /* Port I - not on device */
111 /* Port J */
112 PJ12_IN,
113 PJ11_IN, PJ10_IN, PJ9_IN, PJ8_IN,
114 PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN,
115 PJ3_IN, PJ2_IN, PJ1_IN, PJ0_IN,
116 /* Port K */
117 PK12_IN,
118 PK11_IN, PK10_IN, PK9_IN, PK8_IN,
119 PK7_IN, PK6_IN, PK5_IN, PK4_IN,
120 PK3_IN, PK2_IN, PK1_IN, PK0_IN,
121 PINMUX_INPUT_END,
122
123 PINMUX_OUTPUT_BEGIN,
124 FORCE_OUT,
125 /* Port A */
126 PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
127 /* Port B */
128 PB22_OUT, PB21_OUT, PB20_OUT,
129 PB19_OUT, PB18_OUT, PB17_OUT, PB16_OUT,
130 PB15_OUT, PB14_OUT, PB13_OUT, PB12_OUT,
131 PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT,
132 PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
133 PB3_OUT, PB2_OUT, PB1_OUT,
134 /* Port C */
135 PC10_OUT, PC9_OUT, PC8_OUT,
136 PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
137 PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
138 /* Port D */
139 PD15_OUT, PD14_OUT, PD13_OUT, PD12_OUT,
140 PD11_OUT, PD10_OUT, PD9_OUT, PD8_OUT,
141 PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
142 PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
143 /* Port E */
144 PE5_OUT, PE4_OUT,
145 PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
146 /* Port F */
147 PF12_OUT,
148 PF11_OUT, PF10_OUT, PF9_OUT, PF8_OUT,
149 PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
150 PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
151 /* Port G */
152 PG24_OUT,
153 PG23_OUT, PG22_OUT, PG21_OUT, PG20_OUT,
154 PG19_OUT, PG18_OUT, PG17_OUT, PG16_OUT,
155 PG15_OUT, PG14_OUT, PG13_OUT, PG12_OUT,
156 PG11_OUT, PG10_OUT, PG9_OUT, PG8_OUT,
157 PG7_OUT, PG6_OUT, PG5_OUT, PG4_OUT,
158 PG3_OUT, PG2_OUT, PG1_OUT, PG0_OUT,
159 /* Port H - Port H does not have a Data Register */
160 /* Port I - not on device */
161 /* Port J */
162 PJ12_OUT,
163 PJ11_OUT, PJ10_OUT, PJ9_OUT, PJ8_OUT,
164 PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT,
165 PJ3_OUT, PJ2_OUT, PJ1_OUT, PJ0_OUT,
166 /* Port K */
167 PK12_OUT,
168 PK11_OUT, PK10_OUT, PK9_OUT, PK8_OUT,
169 PK7_OUT, PK6_OUT, PK5_OUT, PK4_OUT,
170 PK3_OUT, PK2_OUT, PK1_OUT, PK0_OUT,
171 PINMUX_OUTPUT_END,
172
173 PINMUX_FUNCTION_BEGIN,
174 /* Port A */
175 PA3_IOR_IN, PA3_IOR_OUT,
176 PA2_IOR_IN, PA2_IOR_OUT,
177 PA1_IOR_IN, PA1_IOR_OUT,
178 PA0_IOR_IN, PA0_IOR_OUT,
179
180 /* Port B */
181 PB11_IOR_IN, PB11_IOR_OUT,
182 PB10_IOR_IN, PB10_IOR_OUT,
183 PB9_IOR_IN, PB9_IOR_OUT,
184 PB8_IOR_IN, PB8_IOR_OUT,
185
186 PB22MD_00, PB22MD_01, PB22MD_10,
187 PB21MD_0, PB21MD_1,
188 PB20MD_0, PB20MD_1,
189 PB19MD_00, PB19MD_01, PB19MD_10, PB19MD_11,
190 PB18MD_00, PB18MD_01, PB18MD_10, PB18MD_11,
191 PB17MD_00, PB17MD_01, PB17MD_10, PB17MD_11,
192 PB16MD_00, PB16MD_01, PB16MD_10, PB16MD_11,
193 PB15MD_00, PB15MD_01, PB15MD_10, PB15MD_11,
194 PB14MD_00, PB14MD_01, PB14MD_10, PB14MD_11,
195 PB13MD_00, PB13MD_01, PB13MD_10, PB13MD_11,
196 PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,
197 PB11MD_00, PB11MD_01, PB11MD_10, PB11MD_11,
198 PB10MD_00, PB10MD_01, PB10MD_10, PB10MD_11,
199 PB9MD_00, PB9MD_01, PB9MD_10, PB9MD_11,
200 PB8MD_00, PB8MD_01, PB8MD_10, PB8MD_11,
201 PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,
202 PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,
203 PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,
204 PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,
205 PB3MD_0, PB3MD_1,
206 PB2MD_0, PB2MD_1,
207 PB1MD_0, PB1MD_1,
208
209 /* Port C */
210 PC14_IOR_IN, PC14_IOR_OUT,
211 PC13_IOR_IN, PC13_IOR_OUT,
212 PC12_IOR_IN, PC12_IOR_OUT,
213 PC11_IOR_IN, PC11_IOR_OUT,
214 PC10_IOR_IN, PC10_IOR_OUT,
215 PC9_IOR_IN, PC9_IOR_OUT,
216 PC8_IOR_IN, PC8_IOR_OUT,
217 PC7_IOR_IN, PC7_IOR_OUT,
218 PC6_IOR_IN, PC6_IOR_OUT,
219 PC5_IOR_IN, PC5_IOR_OUT,
220 PC4_IOR_IN, PC4_IOR_OUT,
221 PC3_IOR_IN, PC3_IOR_OUT,
222 PC2_IOR_IN, PC2_IOR_OUT,
223 PC1_IOR_IN, PC1_IOR_OUT,
224 PC0_IOR_IN, PC0_IOR_OUT,
225
226 PC10MD_0, PC10MD_1,
227 PC9MD_0, PC9MD_1,
228 PC8MD_00, PC8MD_01, PC8MD_10, PC8MD_11,
229 PC7MD_00, PC7MD_01, PC7MD_10, PC7MD_11,
230 PC6MD_00, PC6MD_01, PC6MD_10, PC6MD_11,
231 PC5MD_00, PC5MD_01, PC5MD_10, PC5MD_11,
232 PC4MD_0, PC4MD_1,
233 PC3MD_0, PC3MD_1,
234 PC2MD_0, PC2MD_1,
235 PC1MD_0, PC1MD_1,
236 PC0MD_0, PC0MD_1,
237
238 /* Port D */
239 PD15_IOR_IN, PD15_IOR_OUT,
240 PD14_IOR_IN, PD14_IOR_OUT,
241 PD13_IOR_IN, PD13_IOR_OUT,
242 PD12_IOR_IN, PD12_IOR_OUT,
243 PD11_IOR_IN, PD11_IOR_OUT,
244 PD10_IOR_IN, PD10_IOR_OUT,
245 PD9_IOR_IN, PD9_IOR_OUT,
246 PD8_IOR_IN, PD8_IOR_OUT,
247 PD7_IOR_IN, PD7_IOR_OUT,
248 PD6_IOR_IN, PD6_IOR_OUT,
249 PD5_IOR_IN, PD5_IOR_OUT,
250 PD4_IOR_IN, PD4_IOR_OUT,
251 PD3_IOR_IN, PD3_IOR_OUT,
252 PD2_IOR_IN, PD2_IOR_OUT,
253 PD1_IOR_IN, PD1_IOR_OUT,
254 PD0_IOR_IN, PD0_IOR_OUT,
255
256 PD15MD_00, PD15MD_01, PD15MD_10, PD15MD_11,
257 PD14MD_00, PD14MD_01, PD14MD_10, PD14MD_11,
258 PD13MD_00, PD13MD_01, PD13MD_10, PD13MD_11,
259 PD12MD_00, PD12MD_01, PD12MD_10, PD12MD_11,
260 PD11MD_00, PD11MD_01, PD11MD_10, PD11MD_11,
261 PD10MD_00, PD10MD_01, PD10MD_10, PD10MD_11,
262 PD9MD_00, PD9MD_01, PD9MD_10, PD9MD_11,
263 PD8MD_00, PD8MD_01, PD8MD_10, PD8MD_11,
264 PD7MD_00, PD7MD_01, PD7MD_10, PD7MD_11,
265 PD6MD_00, PD6MD_01, PD6MD_10, PD6MD_11,
266 PD5MD_00, PD5MD_01, PD5MD_10, PD5MD_11,
267 PD4MD_00, PD4MD_01, PD4MD_10, PD4MD_11,
268 PD3MD_00, PD3MD_01, PD3MD_10, PD3MD_11,
269 PD2MD_00, PD2MD_01, PD2MD_10, PD2MD_11,
270 PD1MD_00, PD1MD_01, PD1MD_10, PD1MD_11,
271 PD0MD_00, PD0MD_01, PD0MD_10, PD0MD_11,
272
273 /* Port E */
274 PE5_IOR_IN, PE5_IOR_OUT,
275 PE4_IOR_IN, PE4_IOR_OUT,
276 PE3_IOR_IN, PE3_IOR_OUT,
277 PE2_IOR_IN, PE2_IOR_OUT,
278 PE1_IOR_IN, PE1_IOR_OUT,
279 PE0_IOR_IN, PE0_IOR_OUT,
280
281 PE5MD_00, PE5MD_01, PE5MD_10, PE5MD_11,
282 PE4MD_00, PE4MD_01, PE4MD_10, PE4MD_11,
283 PE3MD_00, PE3MD_01, PE3MD_10, PE3MD_11,
284 PE2MD_00, PE2MD_01, PE2MD_10, PE2MD_11,
285 PE1MD_000, PE1MD_001, PE1MD_010, PE1MD_011,
286 PE1MD_100, PE1MD_101, PE1MD_110, PE1MD_111,
287 PE0MD_00, PE0MD_01, PE0MD_10, PE0MD_11,
288
289 /* Port F */
290 PF12_IOR_IN, PF12_IOR_OUT,
291 PF11_IOR_IN, PF11_IOR_OUT,
292 PF10_IOR_IN, PF10_IOR_OUT,
293 PF9_IOR_IN, PF9_IOR_OUT,
294 PF8_IOR_IN, PF8_IOR_OUT,
295 PF7_IOR_IN, PF7_IOR_OUT,
296 PF6_IOR_IN, PF6_IOR_OUT,
297 PF5_IOR_IN, PF5_IOR_OUT,
298 PF4_IOR_IN, PF4_IOR_OUT,
299 PF3_IOR_IN, PF3_IOR_OUT,
300 PF2_IOR_IN, PF2_IOR_OUT,
301 PF1_IOR_IN, PF1_IOR_OUT,
302 PF0_IOR_IN, PF0_IOR_OUT,
303
304 PF12MD_000, PF12MD_001, PF12MD_010, PF12MD_011,
305 PF12MD_100, PF12MD_101, PF12MD_110, PF12MD_111,
306 PF11MD_000, PF11MD_001, PF11MD_010, PF11MD_011,
307 PF11MD_100, PF11MD_101, PF11MD_110, PF11MD_111,
308 PF10MD_000, PF10MD_001, PF10MD_010, PF10MD_011,
309 PF10MD_100, PF10MD_101, PF10MD_110, PF10MD_111,
310 PF9MD_000, PF9MD_001, PF9MD_010, PF9MD_011,
311 PF9MD_100, PF9MD_101, PF9MD_110, PF9MD_111,
312 PF8MD_00, PF8MD_01, PF8MD_10, PF8MD_11,
313 PF7MD_000, PF7MD_001, PF7MD_010, PF7MD_011,
314 PF7MD_100, PF7MD_101, PF7MD_110, PF7MD_111,
315 PF6MD_000, PF6MD_001, PF6MD_010, PF6MD_011,
316 PF6MD_100, PF6MD_101, PF6MD_110, PF6MD_111,
317 PF5MD_000, PF5MD_001, PF5MD_010, PF5MD_011,
318 PF5MD_100, PF5MD_101, PF5MD_110, PF5MD_111,
319 PF4MD_000, PF4MD_001, PF4MD_010, PF4MD_011,
320 PF4MD_100, PF4MD_101, PF4MD_110, PF4MD_111,
321 PF3MD_000, PF3MD_001, PF3MD_010, PF3MD_011,
322 PF3MD_100, PF3MD_101, PF3MD_110, PF3MD_111,
323 PF2MD_000, PF2MD_001, PF2MD_010, PF2MD_011,
324 PF2MD_100, PF2MD_101, PF2MD_110, PF2MD_111,
325 PF1MD_000, PF1MD_001, PF1MD_010, PF1MD_011,
326 PF1MD_100, PF1MD_101, PF1MD_110, PF1MD_111,
327 PF0MD_000, PF0MD_001, PF0MD_010, PF0MD_011,
328 PF0MD_100, PF0MD_101, PF0MD_110, PF0MD_111,
329
330 /* Port G */
331 PG24_IOR_IN, PG24_IOR_OUT,
332 PG23_IOR_IN, PG23_IOR_OUT,
333 PG22_IOR_IN, PG22_IOR_OUT,
334 PG21_IOR_IN, PG21_IOR_OUT,
335 PG20_IOR_IN, PG20_IOR_OUT,
336 PG19_IOR_IN, PG19_IOR_OUT,
337 PG18_IOR_IN, PG18_IOR_OUT,
338 PG17_IOR_IN, PG17_IOR_OUT,
339 PG16_IOR_IN, PG16_IOR_OUT,
340 PG15_IOR_IN, PG15_IOR_OUT,
341 PG14_IOR_IN, PG14_IOR_OUT,
342 PG13_IOR_IN, PG13_IOR_OUT,
343 PG12_IOR_IN, PG12_IOR_OUT,
344 PG11_IOR_IN, PG11_IOR_OUT,
345 PG10_IOR_IN, PG10_IOR_OUT,
346 PG9_IOR_IN, PG9_IOR_OUT,
347 PG8_IOR_IN, PG8_IOR_OUT,
348 PG7_IOR_IN, PG7_IOR_OUT,
349 PG6_IOR_IN, PG6_IOR_OUT,
350 PG5_IOR_IN, PG5_IOR_OUT,
351 PG4_IOR_IN, PG4_IOR_OUT,
352 PG3_IOR_IN, PG3_IOR_OUT,
353 PG2_IOR_IN, PG2_IOR_OUT,
354 PG1_IOR_IN, PG1_IOR_OUT,
355 PG0_IOR_IN, PG0_IOR_OUT,
356
357 PG24MD_00, PG24MD_01, PG24MD_10, PG24MD_11,
358 PG23MD_00, PG23MD_01, PG23MD_10, PG23MD_11,
359 PG22MD_00, PG22MD_01, PG22MD_10, PG22MD_11,
360 PG21MD_00, PG21MD_01, PG21MD_10, PG21MD_11,
361 PG20MD_000, PG20MD_001, PG20MD_010, PG20MD_011,
362 PG20MD_100, PG20MD_101, PG20MD_110, PG20MD_111,
363 PG19MD_000, PG19MD_001, PG19MD_010, PG19MD_011,
364 PG19MD_100, PG19MD_101, PG19MD_110, PG19MD_111,
365 PG18MD_000, PG18MD_001, PG18MD_010, PG18MD_011,
366 PG18MD_100, PG18MD_101, PG18MD_110, PG18MD_111,
367 PG17MD_000, PG17MD_001, PG17MD_010, PG17MD_011,
368 PG17MD_100, PG17MD_101, PG17MD_110, PG17MD_111,
369 PG16MD_000, PG16MD_001, PG16MD_010, PG16MD_011,
370 PG16MD_100, PG16MD_101, PG16MD_110, PG16MD_111,
371 PG15MD_000, PG15MD_001, PG15MD_010, PG15MD_011,
372 PG15MD_100, PG15MD_101, PG15MD_110, PG15MD_111,
373 PG14MD_000, PG14MD_001, PG14MD_010, PG14MD_011,
374 PG14MD_100, PG14MD_101, PG14MD_110, PG14MD_111,
375 PG13MD_000, PG13MD_001, PG13MD_010, PG13MD_011,
376 PG13MD_100, PG13MD_101, PG13MD_110, PG13MD_111,
377 PG12MD_000, PG12MD_001, PG12MD_010, PG12MD_011,
378 PG12MD_100, PG12MD_101, PG12MD_110, PG12MD_111,
379 PG11MD_000, PG11MD_001, PG11MD_010, PG11MD_011,
380 PG11MD_100, PG11MD_101, PG11MD_110, PG11MD_111,
381 PG10MD_000, PG10MD_001, PG10MD_010, PG10MD_011,
382 PG10MD_100, PG10MD_101, PG10MD_110, PG10MD_111,
383 PG9MD_000, PG9MD_001, PG9MD_010, PG9MD_011,
384 PG9MD_100, PG9MD_101, PG9MD_110, PG9MD_111,
385 PG8MD_000, PG8MD_001, PG8MD_010, PG8MD_011,
386 PG8MD_100, PG8MD_101, PG8MD_110, PG8MD_111,
387 PG7MD_00, PG7MD_01, PG7MD_10, PG7MD_11,
388 PG6MD_00, PG6MD_01, PG6MD_10, PG6MD_11,
389 PG5MD_00, PG5MD_01, PG5MD_10, PG5MD_11,
390 PG4MD_00, PG4MD_01, PG4MD_10, PG4MD_11,
391 PG3MD_00, PG3MD_01, PG3MD_10, PG3MD_11,
392 PG2MD_00, PG2MD_01, PG2MD_10, PG2MD_11,
393 PG1MD_00, PG1MD_01, PG1MD_10, PG1MD_11,
394 PG0MD_000, PG0MD_001, PG0MD_010, PG0MD_011,
395 PG0MD_100, PG0MD_101, PG0MD_110, PG0MD_111,
396
397 /* Port H */
398 PH7MD_0, PH7MD_1,
399 PH6MD_0, PH6MD_1,
400 PH5MD_0, PH5MD_1,
401 PH4MD_0, PH4MD_1,
402 PH3MD_0, PH3MD_1,
403 PH2MD_0, PH2MD_1,
404 PH1MD_0, PH1MD_1,
405 PH0MD_0, PH0MD_1,
406
407 /* Port I - not on device */
408
409 /* Port J */
410 PJ11_IOR_IN, PJ11_IOR_OUT,
411 PJ10_IOR_IN, PJ10_IOR_OUT,
412 PJ9_IOR_IN, PJ9_IOR_OUT,
413 PJ8_IOR_IN, PJ8_IOR_OUT,
414 PJ7_IOR_IN, PJ7_IOR_OUT,
415 PJ6_IOR_IN, PJ6_IOR_OUT,
416 PJ5_IOR_IN, PJ5_IOR_OUT,
417 PJ4_IOR_IN, PJ4_IOR_OUT,
418 PJ3_IOR_IN, PJ3_IOR_OUT,
419 PJ2_IOR_IN, PJ2_IOR_OUT,
420 PJ1_IOR_IN, PJ1_IOR_OUT,
421 PJ0_IOR_IN, PJ0_IOR_OUT,
422
423 PJ11MD_00, PJ11MD_01, PJ11MD_10, PJ11MD_11,
424 PJ10MD_00, PJ10MD_01, PJ10MD_10, PJ10MD_11,
425 PJ9MD_00, PJ9MD_01, PJ9MD_10, PJ9MD_11,
426 PJ8MD_00, PJ8MD_01, PJ8MD_10, PJ8MD_11,
427 PJ7MD_00, PJ7MD_01, PJ7MD_10, PJ7MD_11,
428 PJ6MD_00, PJ6MD_01, PJ6MD_10, PJ6MD_11,
429 PJ5MD_00, PJ5MD_01, PJ5MD_10, PJ5MD_11,
430 PJ4MD_00, PJ4MD_01, PJ4MD_10, PJ4MD_11,
431 PJ3MD_00, PJ3MD_01, PJ3MD_10, PJ3MD_11,
432 PJ2MD_000, PJ2MD_001, PJ2MD_010, PJ2MD_011,
433 PJ2MD_100, PJ2MD_101, PJ2MD_110, PJ2MD_111,
434 PJ1MD_000, PJ1MD_001, PJ1MD_010, PJ1MD_011,
435 PJ1MD_100, PJ1MD_101, PJ1MD_110, PJ1MD_111,
436 PJ0MD_000, PJ0MD_001, PJ0MD_010, PJ0MD_011,
437 PJ0MD_100, PJ0MD_101, PJ0MD_110, PJ0MD_111,
438
439 /* Port K */
440 PK11_IOR_IN, PK11_IOR_OUT,
441 PK10_IOR_IN, PK10_IOR_OUT,
442 PK9_IOR_IN, PK9_IOR_OUT,
443 PK8_IOR_IN, PK8_IOR_OUT,
444 PK7_IOR_IN, PK7_IOR_OUT,
445 PK6_IOR_IN, PK6_IOR_OUT,
446 PK5_IOR_IN, PK5_IOR_OUT,
447 PK4_IOR_IN, PK4_IOR_OUT,
448 PK3_IOR_IN, PK3_IOR_OUT,
449 PK2_IOR_IN, PK2_IOR_OUT,
450 PK1_IOR_IN, PK1_IOR_OUT,
451 PK0_IOR_IN, PK0_IOR_OUT,
452
453 PK11MD_00, PK11MD_01, PK11MD_10, PK11MD_11,
454 PK10MD_00, PK10MD_01, PK10MD_10, PK10MD_11,
455 PK9MD_00, PK9MD_01, PK9MD_10, PK9MD_11,
456 PK8MD_00, PK8MD_01, PK8MD_10, PK8MD_11,
457 PK7MD_00, PK7MD_01, PK7MD_10, PK7MD_11,
458 PK6MD_00, PK6MD_01, PK6MD_10, PK6MD_11,
459 PK5MD_00, PK5MD_01, PK5MD_10, PK5MD_11,
460 PK4MD_00, PK4MD_01, PK4MD_10, PK4MD_11,
461 PK3MD_00, PK3MD_01, PK3MD_10, PK3MD_11,
462 PK2MD_00, PK2MD_01, PK2MD_10, PK2MD_11,
463 PK1MD_00, PK1MD_01, PK1MD_10, PK1MD_11,
464 PK0MD_00, PK0MD_01, PK0MD_10, PK0MD_11,
465 PINMUX_FUNCTION_END,
466
467 PINMUX_MARK_BEGIN,
468 /* Port A */
469
470 /* Port B */
471
472 /* Port C */
473
474 /* Port D */
475
476 /* Port E */
477
478 /* Port F */
479
480 /* Port G */
481
482 /* Port H */
483 PHAN7_MARK, PHAN6_MARK, PHAN5_MARK, PHAN4_MARK,
484 PHAN3_MARK, PHAN2_MARK, PHAN1_MARK, PHAN0_MARK,
485
486 /* Port I - not on device */
487
488 /* Port J */
489
490 /* Port K */
491
492 IRQ7_PC_MARK, IRQ6_PC_MARK, IRQ5_PC_MARK, IRQ4_PC_MARK,
493 IRQ3_PG_MARK, IRQ2_PG_MARK, IRQ1_PJ_MARK, IRQ0_PJ_MARK,
494 IRQ3_PE_MARK, IRQ2_PE_MARK, IRQ1_PE_MARK, IRQ0_PE_MARK,
495
496 PINT7_PG_MARK, PINT6_PG_MARK, PINT5_PG_MARK, PINT4_PG_MARK,
497 PINT3_PG_MARK, PINT2_PG_MARK, PINT1_PG_MARK, PINT0_PG_MARK,
498
499 SD_CD_MARK, SD_D0_MARK, SD_D1_MARK, SD_D2_MARK, SD_D3_MARK,
500 SD_WP_MARK, SD_CLK_MARK, SD_CMD_MARK,
501 CRX0_MARK, CRX1_MARK,
502 CTX0_MARK, CTX1_MARK,
503
504 PWM1A_MARK, PWM1B_MARK, PWM1C_MARK, PWM1D_MARK,
505 PWM1E_MARK, PWM1F_MARK, PWM1G_MARK, PWM1H_MARK,
506 PWM2A_MARK, PWM2B_MARK, PWM2C_MARK, PWM2D_MARK,
507 PWM2E_MARK, PWM2F_MARK, PWM2G_MARK, PWM2H_MARK,
508 IERXD_MARK, IETXD_MARK,
509 CRX0_CRX1_MARK,
510 WDTOVF_MARK,
511
512 CRX0X1_MARK,
513
514 /* DMAC */
515 TEND0_MARK, DACK0_MARK, DREQ0_MARK,
516 TEND1_MARK, DACK1_MARK, DREQ1_MARK,
517
518 /* ADC */
519 ADTRG_MARK,
520
521 /* BSC */
522 A25_MARK, A24_MARK,
523 A23_MARK, A22_MARK, A21_MARK, A20_MARK,
524 A19_MARK, A18_MARK, A17_MARK, A16_MARK,
525 A15_MARK, A14_MARK, A13_MARK, A12_MARK,
526 A11_MARK, A10_MARK, A9_MARK, A8_MARK,
527 A7_MARK, A6_MARK, A5_MARK, A4_MARK,
528 A3_MARK, A2_MARK, A1_MARK, A0_MARK,
529 D15_MARK, D14_MARK, D13_MARK, D12_MARK,
530 D11_MARK, D10_MARK, D9_MARK, D8_MARK,
531 D7_MARK, D6_MARK, D5_MARK, D4_MARK,
532 D3_MARK, D2_MARK, D1_MARK, D0_MARK,
533 BS_MARK,
534 CS4_MARK, CS3_MARK, CS2_MARK, CS1_MARK, CS0_MARK,
535 CS6CE1B_MARK, CS5CE1A_MARK,
536 CE2A_MARK, CE2B_MARK,
537 RD_MARK, RDWR_MARK,
538 ICIOWRAH_MARK,
539 ICIORD_MARK,
540 WE1DQMUWE_MARK,
541 WE0DQML_MARK,
542 RAS_MARK, CAS_MARK, CKE_MARK,
543 WAIT_MARK, BREQ_MARK, BACK_MARK, IOIS16_MARK,
544
545 /* TMU */
546 TIOC0A_MARK, TIOC0B_MARK, TIOC0C_MARK, TIOC0D_MARK,
547 TIOC1A_MARK, TIOC1B_MARK,
548 TIOC2A_MARK, TIOC2B_MARK,
549 TIOC3A_MARK, TIOC3B_MARK, TIOC3C_MARK, TIOC3D_MARK,
550 TIOC4A_MARK, TIOC4B_MARK, TIOC4C_MARK, TIOC4D_MARK,
551 TCLKA_MARK, TCLKB_MARK, TCLKC_MARK, TCLKD_MARK,
552
553 /* SCIF */
554 SCK0_MARK, SCK1_MARK, SCK2_MARK, SCK3_MARK,
555 RXD0_MARK, RXD1_MARK, RXD2_MARK, RXD3_MARK,
556 TXD0_MARK, TXD1_MARK, TXD2_MARK, TXD3_MARK,
557 RXD4_MARK, RXD5_MARK, RXD6_MARK, RXD7_MARK,
558 TXD4_MARK, TXD5_MARK, TXD6_MARK, TXD7_MARK,
559 RTS1_MARK, RTS3_MARK,
560 CTS1_MARK, CTS3_MARK,
561
562 /* RSPI */
563 RSPCK0_MARK, RSPCK1_MARK,
564 MOSI0_MARK, MOSI1_MARK,
565 MISO0_PF12_MARK, MISO1_MARK, MISO1_PG19_MARK,
566 SSL00_MARK, SSL10_MARK,
567
568 /* IIC3 */
569 SCL0_MARK, SCL1_MARK, SCL2_MARK,
570 SDA0_MARK, SDA1_MARK, SDA2_MARK,
571
572 /* SSI */
573 SSISCK0_MARK,
574 SSIWS0_MARK,
575 SSITXD0_MARK,
576 SSIRXD0_MARK,
577 SSIWS1_MARK, SSIWS2_MARK, SSIWS3_MARK,
578 SSISCK1_MARK, SSISCK2_MARK, SSISCK3_MARK,
579 SSIDATA1_MARK, SSIDATA2_MARK, SSIDATA3_MARK,
580 AUDIO_CLK_MARK,
581
582 /* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */
583 SIOFTXD_MARK, SIOFRXD_MARK, SIOFSYNC_MARK, SIOFSCK_MARK,
584
585 /* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */
586 SPDIF_IN_MARK, SPDIF_OUT_MARK,
587
588 /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */
589 FCE_MARK,
590 FRB_MARK,
591
592 /* VDC3 */
593 DV_CLK_MARK,
594 DV_VSYNC_MARK, DV_HSYNC_MARK,
595 DV_DATA7_MARK, DV_DATA6_MARK, DV_DATA5_MARK, DV_DATA4_MARK,
596 DV_DATA3_MARK, DV_DATA2_MARK, DV_DATA1_MARK, DV_DATA0_MARK,
597 LCD_CLK_MARK, LCD_EXTCLK_MARK,
598 LCD_VSYNC_MARK, LCD_HSYNC_MARK, LCD_DE_MARK,
599 LCD_DATA15_MARK, LCD_DATA14_MARK, LCD_DATA13_MARK, LCD_DATA12_MARK,
600 LCD_DATA11_MARK, LCD_DATA10_MARK, LCD_DATA9_MARK, LCD_DATA8_MARK,
601 LCD_DATA7_MARK, LCD_DATA6_MARK, LCD_DATA5_MARK, LCD_DATA4_MARK,
602 LCD_DATA3_MARK, LCD_DATA2_MARK, LCD_DATA1_MARK, LCD_DATA0_MARK,
603 LCD_M_DISP_MARK,
604 PINMUX_MARK_END,
605};
606
607static pinmux_enum_t pinmux_data[] = {
608
609 /* Port A */
610 PINMUX_DATA(PA3_DATA, PA3_IN),
611 PINMUX_DATA(PA2_DATA, PA2_IN),
612 PINMUX_DATA(PA1_DATA, PA1_IN),
613 PINMUX_DATA(PA0_DATA, PA0_IN),
614
615 /* Port B */
616 PINMUX_DATA(PB22_DATA, PB22MD_00, PB22_IN, PB22_OUT),
617 PINMUX_DATA(A22_MARK, PB22MD_01),
618 PINMUX_DATA(CS4_MARK, PB22MD_10),
619
620 PINMUX_DATA(PB21_DATA, PB21MD_0, PB21_IN, PB21_OUT),
621 PINMUX_DATA(A21_MARK, PB21MD_1),
622 PINMUX_DATA(A20_MARK, PB20MD_1),
623 PINMUX_DATA(A19_MARK, PB19MD_01),
624 PINMUX_DATA(A18_MARK, PB18MD_01),
625 PINMUX_DATA(A17_MARK, PB17MD_01),
626 PINMUX_DATA(A16_MARK, PB16MD_01),
627 PINMUX_DATA(A15_MARK, PB15MD_01),
628 PINMUX_DATA(A14_MARK, PB14MD_01),
629 PINMUX_DATA(A13_MARK, PB13MD_01),
630 PINMUX_DATA(A12_MARK, PB12MD_01),
631 PINMUX_DATA(A11_MARK, PB11MD_01),
632 PINMUX_DATA(A10_MARK, PB10MD_01),
633 PINMUX_DATA(A9_MARK, PB9MD_01),
634 PINMUX_DATA(A8_MARK, PB8MD_01),
635 PINMUX_DATA(A7_MARK, PB7MD_01),
636 PINMUX_DATA(A6_MARK, PB6MD_01),
637 PINMUX_DATA(A5_MARK, PB5MD_01),
638 PINMUX_DATA(A4_MARK, PB4MD_01),
639 PINMUX_DATA(A3_MARK, PB3MD_1),
640 PINMUX_DATA(A2_MARK, PB2MD_1),
641 PINMUX_DATA(A1_MARK, PB1MD_1),
642
643 /* Port C */
644 PINMUX_DATA(PC10_DATA, PC10MD_0),
645 PINMUX_DATA(TIOC2B_MARK, PC1MD_1),
646 PINMUX_DATA(PC9_DATA, PC9MD_0),
647 PINMUX_DATA(TIOC2A_MARK, PC9MD_1),
648 PINMUX_DATA(PC8_DATA, PC8MD_00),
649 PINMUX_DATA(CS3_MARK, PC8MD_01),
650 PINMUX_DATA(TIOC4D_MARK, PC8MD_10),
651 PINMUX_DATA(IRQ7_PC_MARK, PC8MD_11),
652 PINMUX_DATA(PC7_DATA, PC7MD_00),
653 PINMUX_DATA(CKE_MARK, PC7MD_01),
654 PINMUX_DATA(TIOC4C_MARK, PC7MD_10),
655 PINMUX_DATA(IRQ6_PC_MARK, PC7MD_11),
656 PINMUX_DATA(PC6_DATA, PC6MD_00),
657 PINMUX_DATA(CAS_MARK, PC6MD_01),
658 PINMUX_DATA(TIOC4B_MARK, PC6MD_10),
659 PINMUX_DATA(IRQ5_PC_MARK, PC6MD_11),
660 PINMUX_DATA(PC5_DATA, PC5MD_00),
661 PINMUX_DATA(RAS_MARK, PC5MD_01),
662 PINMUX_DATA(TIOC4A_MARK, PC5MD_10),
663 PINMUX_DATA(IRQ4_PC_MARK, PC5MD_11),
664 PINMUX_DATA(PC4_DATA, PC4MD_0),
665 PINMUX_DATA(WE1DQMUWE_MARK, PC4MD_1),
666 PINMUX_DATA(PC3_DATA, PC3MD_0),
667 PINMUX_DATA(WE0DQML_MARK, PC3MD_1),
668 PINMUX_DATA(PC2_DATA, PC2MD_0),
669 PINMUX_DATA(RDWR_MARK, PC2MD_1),
670 PINMUX_DATA(PC1_DATA, PC1MD_0),
671 PINMUX_DATA(RD_MARK, PC1MD_1),
672 PINMUX_DATA(PC0_DATA, PC0MD_0),
673 PINMUX_DATA(CS0_MARK, PC0MD_1),
674
675 /* Port D */
676 PINMUX_DATA(D15_MARK, PD15MD_01),
677 PINMUX_DATA(D14_MARK, PD14MD_01),
678 PINMUX_DATA(D13_MARK, PD13MD_01),
679 PINMUX_DATA(D12_MARK, PD12MD_01),
680 PINMUX_DATA(D11_MARK, PD11MD_01),
681 PINMUX_DATA(D10_MARK, PD10MD_01),
682 PINMUX_DATA(D9_MARK, PD9MD_01),
683 PINMUX_DATA(D8_MARK, PD8MD_01),
684 PINMUX_DATA(D7_MARK, PD7MD_01),
685 PINMUX_DATA(D6_MARK, PD6MD_01),
686 PINMUX_DATA(D5_MARK, PD5MD_01),
687 PINMUX_DATA(D4_MARK, PD4MD_01),
688 PINMUX_DATA(D3_MARK, PD3MD_01),
689 PINMUX_DATA(D2_MARK, PD2MD_01),
690 PINMUX_DATA(D1_MARK, PD1MD_01),
691 PINMUX_DATA(D0_MARK, PD0MD_01),
692
693 /* Port E */
694 PINMUX_DATA(PE5_DATA, PE5MD_00),
695 PINMUX_DATA(SDA2_MARK, PE5MD_01),
696 PINMUX_DATA(DV_HSYNC_MARK, PE5MD_11),
697
698 PINMUX_DATA(PE4_DATA, PE4MD_00),
699 PINMUX_DATA(SCL2_MARK, PE4MD_01),
700 PINMUX_DATA(DV_VSYNC_MARK, PE4MD_11),
701
702 PINMUX_DATA(PE3_DATA, PE3MD_00),
703 PINMUX_DATA(SDA1_MARK, PE3MD_01),
704 PINMUX_DATA(IRQ3_PE_MARK, PE3MD_11),
705
706 PINMUX_DATA(PE2_DATA, PE2MD_00),
707 PINMUX_DATA(SCL1_MARK, PE2MD_01),
708 PINMUX_DATA(IRQ2_PE_MARK, PE2MD_11),
709
710 PINMUX_DATA(PE1_DATA, PE1MD_000),
711 PINMUX_DATA(SDA0_MARK, PE1MD_001),
712 PINMUX_DATA(IOIS16_MARK, PE1MD_010),
713 PINMUX_DATA(IRQ1_PE_MARK, PE1MD_011),
714 PINMUX_DATA(TCLKA_MARK, PE1MD_100),
715 PINMUX_DATA(ADTRG_MARK, PE1MD_101),
716
717 PINMUX_DATA(PE0_DATA, PE0MD_00),
718 PINMUX_DATA(SCL0_MARK, PE0MD_01),
719 PINMUX_DATA(AUDIO_CLK_MARK, PE0MD_10),
720 PINMUX_DATA(IRQ0_PE_MARK, PE0MD_11),
721
722 /* Port F */
723 PINMUX_DATA(PF12_DATA, PF12MD_000),
724 PINMUX_DATA(BS_MARK, PF12MD_001),
725 PINMUX_DATA(MISO0_PF12_MARK, PF12MD_011),
726 PINMUX_DATA(TIOC3D_MARK, PF12MD_100),
727 PINMUX_DATA(SPDIF_OUT_MARK, PF12MD_101),
728
729 PINMUX_DATA(PF11_DATA, PF11MD_000),
730 PINMUX_DATA(A25_MARK, PF11MD_001),
731 PINMUX_DATA(SSIDATA3_MARK, PF11MD_010),
732 PINMUX_DATA(MOSI0_MARK, PF11MD_011),
733 PINMUX_DATA(TIOC3C_MARK, PF11MD_100),
734 PINMUX_DATA(SPDIF_IN_MARK, PF11MD_101),
735
736 PINMUX_DATA(PF10_DATA, PF10MD_000),
737 PINMUX_DATA(A24_MARK, PF10MD_001),
738 PINMUX_DATA(SSIWS3_MARK, PF10MD_010),
739 PINMUX_DATA(SSL00_MARK, PF10MD_011),
740 PINMUX_DATA(TIOC3B_MARK, PF10MD_100),
741 PINMUX_DATA(FCE_MARK, PF10MD_101),
742
743 PINMUX_DATA(PF9_DATA, PF9MD_000),
744 PINMUX_DATA(A23_MARK, PF9MD_001),
745 PINMUX_DATA(SSISCK3_MARK, PF9MD_010),
746 PINMUX_DATA(RSPCK0_MARK, PF9MD_011),
747 PINMUX_DATA(TIOC3A_MARK, PF9MD_100),
748 PINMUX_DATA(FRB_MARK, PF9MD_101),
749
750 PINMUX_DATA(PF8_DATA, PF8MD_00),
751 PINMUX_DATA(CE2B_MARK, PF8MD_01),
752 PINMUX_DATA(SSIDATA3_MARK, PF8MD_10),
753 PINMUX_DATA(DV_CLK_MARK, PF8MD_11),
754
755 PINMUX_DATA(PF7_DATA, PF7MD_000),
756 PINMUX_DATA(CE2A_MARK, PF7MD_001),
757 PINMUX_DATA(SSIWS3_MARK, PF7MD_010),
758 PINMUX_DATA(DV_DATA7_MARK, PF7MD_011),
759 PINMUX_DATA(TCLKD_MARK, PF7MD_100),
760
761 PINMUX_DATA(PF6_DATA, PF6MD_000),
762 PINMUX_DATA(CS6CE1B_MARK, PF6MD_001),
763 PINMUX_DATA(SSISCK3_MARK, PF6MD_010),
764 PINMUX_DATA(DV_DATA6_MARK, PF6MD_011),
765 PINMUX_DATA(TCLKB_MARK, PF6MD_100),
766
767 PINMUX_DATA(PF5_DATA, PF5MD_000),
768 PINMUX_DATA(CS5CE1A_MARK, PF5MD_001),
769 PINMUX_DATA(SSIDATA2_MARK, PF5MD_010),
770 PINMUX_DATA(DV_DATA5_MARK, PF5MD_011),
771 PINMUX_DATA(TCLKC_MARK, PF5MD_100),
772
773 PINMUX_DATA(PF4_DATA, PF4MD_000),
774 PINMUX_DATA(ICIOWRAH_MARK, PF4MD_001),
775 PINMUX_DATA(SSIWS2_MARK, PF4MD_010),
776 PINMUX_DATA(DV_DATA4_MARK, PF4MD_011),
777 PINMUX_DATA(TXD3_MARK, PF4MD_100),
778
779 PINMUX_DATA(PF3_DATA, PF3MD_000),
780 PINMUX_DATA(ICIORD_MARK, PF3MD_001),
781 PINMUX_DATA(SSISCK2_MARK, PF3MD_010),
782 PINMUX_DATA(DV_DATA3_MARK, PF3MD_011),
783 PINMUX_DATA(RXD3_MARK, PF3MD_100),
784
785 PINMUX_DATA(PF2_DATA, PF2MD_000),
786 PINMUX_DATA(BACK_MARK, PF2MD_001),
787 PINMUX_DATA(SSIDATA1_MARK, PF2MD_010),
788 PINMUX_DATA(DV_DATA2_MARK, PF2MD_011),
789 PINMUX_DATA(TXD2_MARK, PF2MD_100),
790 PINMUX_DATA(DACK0_MARK, PF2MD_101),
791
792 PINMUX_DATA(PF1_DATA, PF1MD_000),
793 PINMUX_DATA(BREQ_MARK, PF1MD_001),
794 PINMUX_DATA(SSIWS1_MARK, PF1MD_010),
795 PINMUX_DATA(DV_DATA1_MARK, PF1MD_011),
796 PINMUX_DATA(RXD2_MARK, PF1MD_100),
797 PINMUX_DATA(DREQ0_MARK, PF1MD_101),
798
799 PINMUX_DATA(PF0_DATA, PF0MD_000),
800 PINMUX_DATA(WAIT_MARK, PF0MD_001),
801 PINMUX_DATA(SSISCK1_MARK, PF0MD_010),
802 PINMUX_DATA(DV_DATA0_MARK, PF0MD_011),
803 PINMUX_DATA(SCK2_MARK, PF0MD_100),
804 PINMUX_DATA(TEND0_MARK, PF0MD_101),
805
806 /* Port G */
807 PINMUX_DATA(PG24_DATA, PG24MD_00),
808 PINMUX_DATA(MOSI0_MARK, PG24MD_01),
809 PINMUX_DATA(TIOC0D_MARK, PG24MD_10),
810
811 PINMUX_DATA(PG23_DATA, PG23MD_00),
812 PINMUX_DATA(MOSI1_MARK, PG23MD_01),
813 PINMUX_DATA(TIOC0C_MARK, PG23MD_10),
814
815 PINMUX_DATA(PG22_DATA, PG22MD_00),
816 PINMUX_DATA(SSL10_MARK, PG22MD_01),
817 PINMUX_DATA(TIOC0B_MARK, PG22MD_10),
818
819 PINMUX_DATA(PG21_DATA, PG21MD_00),
820 PINMUX_DATA(RSPCK1_MARK, PG21MD_01),
821 PINMUX_DATA(TIOC0A_MARK, PG21MD_10),
822
823 PINMUX_DATA(PG20_DATA, PG20MD_000),
824 PINMUX_DATA(LCD_EXTCLK_MARK, PG20MD_001),
825 PINMUX_DATA(MISO1_MARK, PG20MD_011),
826 PINMUX_DATA(TXD7_MARK, PG20MD_100),
827
828 PINMUX_DATA(PG19_DATA, PG19MD_000),
829 PINMUX_DATA(LCD_CLK_MARK, PG19MD_001),
830 PINMUX_DATA(TIOC2B_MARK, PG19MD_010),
831 PINMUX_DATA(MISO1_PG19_MARK, PG19MD_011),
832 PINMUX_DATA(RXD7_MARK, PG19MD_100),
833
834 PINMUX_DATA(PG18_DATA, PG18MD_000),
835 PINMUX_DATA(LCD_DE_MARK, PG18MD_001),
836 PINMUX_DATA(TIOC2A_MARK, PG18MD_010),
837 PINMUX_DATA(SSL10_MARK, PG18MD_011),
838 PINMUX_DATA(TXD6_MARK, PG18MD_100),
839
840 PINMUX_DATA(PG17_DATA, PG17MD_000),
841 PINMUX_DATA(LCD_HSYNC_MARK, PG17MD_001),
842 PINMUX_DATA(TIOC1B_MARK, PG17MD_010),
843 PINMUX_DATA(RSPCK1_MARK, PG17MD_011),
844 PINMUX_DATA(RXD6_MARK, PG17MD_100),
845
846 PINMUX_DATA(PG16_DATA, PG16MD_000),
847 PINMUX_DATA(LCD_VSYNC_MARK, PG16MD_001),
848 PINMUX_DATA(TIOC1A_MARK, PG16MD_010),
849 PINMUX_DATA(TXD3_MARK, PG16MD_011),
850 PINMUX_DATA(CTS1_MARK, PG16MD_100),
851
852 PINMUX_DATA(PG15_DATA, PG15MD_000),
853 PINMUX_DATA(LCD_DATA15_MARK, PG15MD_001),
854 PINMUX_DATA(TIOC0D_MARK, PG15MD_010),
855 PINMUX_DATA(RXD3_MARK, PG15MD_011),
856 PINMUX_DATA(RTS1_MARK, PG15MD_100),
857
858 PINMUX_DATA(PG14_DATA, PG14MD_000),
859 PINMUX_DATA(LCD_DATA14_MARK, PG14MD_001),
860 PINMUX_DATA(TIOC0C_MARK, PG14MD_010),
861 PINMUX_DATA(SCK1_MARK, PG14MD_100),
862
863 PINMUX_DATA(PG13_DATA, PG13MD_000),
864 PINMUX_DATA(LCD_DATA13_MARK, PG13MD_001),
865 PINMUX_DATA(TIOC0B_MARK, PG13MD_010),
866 PINMUX_DATA(TXD1_MARK, PG13MD_100),
867
868 PINMUX_DATA(PG12_DATA, PG12MD_000),
869 PINMUX_DATA(LCD_DATA12_MARK, PG12MD_001),
870 PINMUX_DATA(TIOC0A_MARK, PG12MD_010),
871 PINMUX_DATA(RXD1_MARK, PG12MD_100),
872
873 PINMUX_DATA(PG11_DATA, PG11MD_000),
874 PINMUX_DATA(LCD_DATA11_MARK, PG11MD_001),
875 PINMUX_DATA(SSITXD0_MARK, PG11MD_010),
876 PINMUX_DATA(IRQ3_PG_MARK, PG11MD_011),
877 PINMUX_DATA(TXD5_MARK, PG11MD_100),
878 PINMUX_DATA(SIOFTXD_MARK, PG11MD_101),
879
880 PINMUX_DATA(PG10_DATA, PG10MD_000),
881 PINMUX_DATA(LCD_DATA10_MARK, PG10MD_001),
882 PINMUX_DATA(SSIRXD0_MARK, PG10MD_010),
883 PINMUX_DATA(IRQ2_PG_MARK, PG10MD_011),
884 PINMUX_DATA(RXD5_MARK, PG10MD_100),
885 PINMUX_DATA(SIOFRXD_MARK, PG10MD_101),
886
887 PINMUX_DATA(PG9_DATA, PG9MD_000),
888 PINMUX_DATA(LCD_DATA9_MARK, PG9MD_001),
889 PINMUX_DATA(SSIWS0_MARK, PG9MD_010),
890 PINMUX_DATA(TXD4_MARK, PG9MD_100),
891 PINMUX_DATA(SIOFSYNC_MARK, PG9MD_101),
892
893 PINMUX_DATA(PG8_DATA, PG8MD_000),
894 PINMUX_DATA(LCD_DATA8_MARK, PG8MD_001),
895 PINMUX_DATA(SSISCK0_MARK, PG8MD_010),
896 PINMUX_DATA(RXD4_MARK, PG8MD_100),
897 PINMUX_DATA(SIOFSCK_MARK, PG8MD_101),
898
899 PINMUX_DATA(PG7_DATA, PG7MD_00),
900 PINMUX_DATA(LCD_DATA7_MARK, PG7MD_01),
901 PINMUX_DATA(SD_CD_MARK, PG7MD_10),
902 PINMUX_DATA(PINT7_PG_MARK, PG7MD_11),
903
904 PINMUX_DATA(PG6_DATA, PG7MD_00),
905 PINMUX_DATA(LCD_DATA6_MARK, PG7MD_01),
906 PINMUX_DATA(SD_WP_MARK, PG7MD_10),
907 PINMUX_DATA(PINT6_PG_MARK, PG7MD_11),
908
909 PINMUX_DATA(PG5_DATA, PG5MD_00),
910 PINMUX_DATA(LCD_DATA5_MARK, PG5MD_01),
911 PINMUX_DATA(SD_D1_MARK, PG5MD_10),
912 PINMUX_DATA(PINT5_PG_MARK, PG5MD_11),
913
914 PINMUX_DATA(PG4_DATA, PG4MD_00),
915 PINMUX_DATA(LCD_DATA4_MARK, PG4MD_01),
916 PINMUX_DATA(SD_D0_MARK, PG4MD_10),
917 PINMUX_DATA(PINT4_PG_MARK, PG4MD_11),
918
919 PINMUX_DATA(PG3_DATA, PG3MD_00),
920 PINMUX_DATA(LCD_DATA3_MARK, PG3MD_01),
921 PINMUX_DATA(SD_CLK_MARK, PG3MD_10),
922 PINMUX_DATA(PINT3_PG_MARK, PG3MD_11),
923
924 PINMUX_DATA(PG2_DATA, PG2MD_00),
925 PINMUX_DATA(LCD_DATA2_MARK, PG2MD_01),
926 PINMUX_DATA(SD_CMD_MARK, PG2MD_10),
927 PINMUX_DATA(PINT2_PG_MARK, PG2MD_11),
928
929 PINMUX_DATA(PG1_DATA, PG1MD_00),
930 PINMUX_DATA(LCD_DATA1_MARK, PG1MD_01),
931 PINMUX_DATA(SD_D3_MARK, PG1MD_10),
932 PINMUX_DATA(PINT1_PG_MARK, PG1MD_11),
933
934 PINMUX_DATA(PG0_DATA, PG0MD_000),
935 PINMUX_DATA(LCD_DATA0_MARK, PG0MD_001),
936 PINMUX_DATA(SD_D2_MARK, PG0MD_010),
937 PINMUX_DATA(PINT0_PG_MARK, PG0MD_011),
938 PINMUX_DATA(WDTOVF_MARK, PG0MD_100),
939
940 /* Port H */
941 PINMUX_DATA(PH7_DATA, PH7MD_0),
942 PINMUX_DATA(PHAN7_MARK, PH7MD_1),
943
944 PINMUX_DATA(PH6_DATA, PH6MD_0),
945 PINMUX_DATA(PHAN6_MARK, PH6MD_1),
946
947 PINMUX_DATA(PH5_DATA, PH5MD_0),
948 PINMUX_DATA(PHAN5_MARK, PH5MD_1),
949
950 PINMUX_DATA(PH4_DATA, PH4MD_0),
951 PINMUX_DATA(PHAN4_MARK, PH4MD_1),
952
953 PINMUX_DATA(PH3_DATA, PH3MD_0),
954 PINMUX_DATA(PHAN3_MARK, PH3MD_1),
955
956 PINMUX_DATA(PH2_DATA, PH2MD_0),
957 PINMUX_DATA(PHAN2_MARK, PH2MD_1),
958
959 PINMUX_DATA(PH1_DATA, PH1MD_0),
960 PINMUX_DATA(PHAN1_MARK, PH1MD_1),
961
962 PINMUX_DATA(PH0_DATA, PH0MD_0),
963 PINMUX_DATA(PHAN0_MARK, PH0MD_1),
964
965 /* Port I - not on device */
966
967 /* Port J */
968 PINMUX_DATA(PJ11_DATA, PJ11MD_00),
969 PINMUX_DATA(PWM2H_MARK, PJ11MD_01),
970 PINMUX_DATA(DACK1_MARK, PJ11MD_10),
971
972 PINMUX_DATA(PJ10_DATA, PJ10MD_00),
973 PINMUX_DATA(PWM2G_MARK, PJ10MD_01),
974 PINMUX_DATA(DREQ1_MARK, PJ10MD_10),
975
976 PINMUX_DATA(PJ9_DATA, PJ9MD_00),
977 PINMUX_DATA(PWM2F_MARK, PJ9MD_01),
978 PINMUX_DATA(TEND1_MARK, PJ9MD_10),
979
980 PINMUX_DATA(PJ8_DATA, PJ8MD_00),
981 PINMUX_DATA(PWM2E_MARK, PJ8MD_01),
982 PINMUX_DATA(RTS3_MARK, PJ8MD_10),
983
984 PINMUX_DATA(PJ7_DATA, PJ7MD_00),
985 PINMUX_DATA(TIOC1B_MARK, PJ7MD_01),
986 PINMUX_DATA(CTS3_MARK, PJ7MD_10),
987
988 PINMUX_DATA(PJ6_DATA, PJ6MD_00),
989 PINMUX_DATA(TIOC1A_MARK, PJ6MD_01),
990 PINMUX_DATA(SCK3_MARK, PJ6MD_10),
991
992 PINMUX_DATA(PJ5_DATA, PJ5MD_00),
993 PINMUX_DATA(IERXD_MARK, PJ5MD_01),
994 PINMUX_DATA(TXD3_MARK, PJ5MD_10),
995
996 PINMUX_DATA(PJ4_DATA, PJ4MD_00),
997 PINMUX_DATA(IETXD_MARK, PJ4MD_01),
998 PINMUX_DATA(RXD3_MARK, PJ4MD_10),
999
1000 PINMUX_DATA(PJ3_DATA, PJ3MD_00),
1001 PINMUX_DATA(CRX1_MARK, PJ3MD_01),
1002 PINMUX_DATA(CRX0X1_MARK, PJ3MD_10),
1003 PINMUX_DATA(IRQ1_PJ_MARK, PJ3MD_11),
1004
1005 PINMUX_DATA(PJ2_DATA, PJ2MD_000),
1006 PINMUX_DATA(CTX1_MARK, PJ2MD_001),
1007 PINMUX_DATA(CRX0_CRX1_MARK, PJ2MD_010),
1008 PINMUX_DATA(CS2_MARK, PJ2MD_011),
1009 PINMUX_DATA(SCK0_MARK, PJ2MD_100),
1010 PINMUX_DATA(LCD_M_DISP_MARK, PJ2MD_101),
1011
1012 PINMUX_DATA(PJ1_DATA, PJ1MD_000),
1013 PINMUX_DATA(CRX0_MARK, PJ1MD_001),
1014 PINMUX_DATA(IERXD_MARK, PJ1MD_010),
1015 PINMUX_DATA(IRQ0_PJ_MARK, PJ1MD_011),
1016 PINMUX_DATA(RXD0_MARK, PJ1MD_100),
1017
1018 PINMUX_DATA(PJ0_DATA, PJ0MD_000),
1019 PINMUX_DATA(CTX0_MARK, PJ0MD_001),
1020 PINMUX_DATA(IERXD_MARK, PJ0MD_010),
1021 PINMUX_DATA(CS1_MARK, PJ0MD_011),
1022 PINMUX_DATA(TXD0_MARK, PJ0MD_100),
1023 PINMUX_DATA(A0_MARK, PJ0MD_101),
1024
1025 /* Port K */
1026 PINMUX_DATA(PK11_DATA, PK11MD_00),
1027 PINMUX_DATA(PWM2D_MARK, PK11MD_01),
1028 PINMUX_DATA(SSITXD0_MARK, PK11MD_10),
1029
1030 PINMUX_DATA(PK10_DATA, PK10MD_00),
1031 PINMUX_DATA(PWM2C_MARK, PK10MD_01),
1032 PINMUX_DATA(SSIRXD0_MARK, PK10MD_10),
1033
1034 PINMUX_DATA(PK9_DATA, PK9MD_00),
1035 PINMUX_DATA(PWM2B_MARK, PK9MD_01),
1036 PINMUX_DATA(SSIWS0_MARK, PK9MD_10),
1037
1038 PINMUX_DATA(PK8_DATA, PK8MD_00),
1039 PINMUX_DATA(PWM2A_MARK, PK8MD_01),
1040 PINMUX_DATA(SSISCK0_MARK, PK8MD_10),
1041
1042 PINMUX_DATA(PK7_DATA, PK7MD_00),
1043 PINMUX_DATA(PWM1H_MARK, PK7MD_01),
1044 PINMUX_DATA(SD_CD_MARK, PK7MD_10),
1045
1046 PINMUX_DATA(PK6_DATA, PK6MD_00),
1047 PINMUX_DATA(PWM1G_MARK, PK6MD_01),
1048 PINMUX_DATA(SD_WP_MARK, PK6MD_10),
1049
1050 PINMUX_DATA(PK5_DATA, PK5MD_00),
1051 PINMUX_DATA(PWM1F_MARK, PK5MD_01),
1052 PINMUX_DATA(SD_D1_MARK, PK5MD_10),
1053
1054 PINMUX_DATA(PK4_DATA, PK4MD_00),
1055 PINMUX_DATA(PWM1E_MARK, PK4MD_01),
1056 PINMUX_DATA(SD_D0_MARK, PK4MD_10),
1057
1058 PINMUX_DATA(PK3_DATA, PK3MD_00),
1059 PINMUX_DATA(PWM1D_MARK, PK3MD_01),
1060 PINMUX_DATA(SD_CLK_MARK, PK3MD_10),
1061
1062 PINMUX_DATA(PK2_DATA, PK2MD_00),
1063 PINMUX_DATA(PWM1C_MARK, PK2MD_01),
1064 PINMUX_DATA(SD_CMD_MARK, PK2MD_10),
1065
1066 PINMUX_DATA(PK1_DATA, PK1MD_00),
1067 PINMUX_DATA(PWM1B_MARK, PK1MD_01),
1068 PINMUX_DATA(SD_D3_MARK, PK1MD_10),
1069
1070 PINMUX_DATA(PK0_DATA, PK0MD_00),
1071 PINMUX_DATA(PWM1A_MARK, PK0MD_01),
1072 PINMUX_DATA(SD_D2_MARK, PK0MD_10),
1073};
1074
1075static struct pinmux_gpio pinmux_gpios[] = {
1076
1077 /* Port A */
1078 PINMUX_GPIO(GPIO_PA3, PA3_DATA),
1079 PINMUX_GPIO(GPIO_PA2, PA2_DATA),
1080 PINMUX_GPIO(GPIO_PA1, PA1_DATA),
1081 PINMUX_GPIO(GPIO_PA0, PA0_DATA),
1082
1083 /* Port B */
1084 PINMUX_GPIO(GPIO_PB22, PB22_DATA),
1085 PINMUX_GPIO(GPIO_PB21, PB21_DATA),
1086 PINMUX_GPIO(GPIO_PB20, PB20_DATA),
1087 PINMUX_GPIO(GPIO_PB19, PB19_DATA),
1088 PINMUX_GPIO(GPIO_PB18, PB18_DATA),
1089 PINMUX_GPIO(GPIO_PB17, PB17_DATA),
1090 PINMUX_GPIO(GPIO_PB16, PB16_DATA),
1091 PINMUX_GPIO(GPIO_PB15, PB15_DATA),
1092 PINMUX_GPIO(GPIO_PB14, PB14_DATA),
1093 PINMUX_GPIO(GPIO_PB13, PB13_DATA),
1094 PINMUX_GPIO(GPIO_PB12, PB12_DATA),
1095 PINMUX_GPIO(GPIO_PB11, PB11_DATA),
1096 PINMUX_GPIO(GPIO_PB10, PB10_DATA),
1097 PINMUX_GPIO(GPIO_PB9, PB9_DATA),
1098 PINMUX_GPIO(GPIO_PB8, PB8_DATA),
1099 PINMUX_GPIO(GPIO_PB7, PB7_DATA),
1100 PINMUX_GPIO(GPIO_PB6, PB6_DATA),
1101 PINMUX_GPIO(GPIO_PB5, PB5_DATA),
1102 PINMUX_GPIO(GPIO_PB4, PB4_DATA),
1103 PINMUX_GPIO(GPIO_PB3, PB3_DATA),
1104 PINMUX_GPIO(GPIO_PB2, PB2_DATA),
1105 PINMUX_GPIO(GPIO_PB1, PB1_DATA),
1106
1107 /* Port C */
1108 PINMUX_GPIO(GPIO_PC10, PC10_DATA),
1109 PINMUX_GPIO(GPIO_PC9, PC9_DATA),
1110 PINMUX_GPIO(GPIO_PC8, PC8_DATA),
1111 PINMUX_GPIO(GPIO_PC7, PC7_DATA),
1112 PINMUX_GPIO(GPIO_PC6, PC6_DATA),
1113 PINMUX_GPIO(GPIO_PC5, PC5_DATA),
1114 PINMUX_GPIO(GPIO_PC4, PC4_DATA),
1115 PINMUX_GPIO(GPIO_PC3, PC3_DATA),
1116 PINMUX_GPIO(GPIO_PC2, PC2_DATA),
1117 PINMUX_GPIO(GPIO_PC1, PC1_DATA),
1118 PINMUX_GPIO(GPIO_PC0, PC0_DATA),
1119
1120 /* Port D */
1121 PINMUX_GPIO(GPIO_PD15, PD15_DATA),
1122 PINMUX_GPIO(GPIO_PD14, PD14_DATA),
1123 PINMUX_GPIO(GPIO_PD13, PD13_DATA),
1124 PINMUX_GPIO(GPIO_PD12, PD12_DATA),
1125 PINMUX_GPIO(GPIO_PD11, PD11_DATA),
1126 PINMUX_GPIO(GPIO_PD10, PD10_DATA),
1127 PINMUX_GPIO(GPIO_PD9, PD9_DATA),
1128 PINMUX_GPIO(GPIO_PD8, PD8_DATA),
1129 PINMUX_GPIO(GPIO_PD7, PD7_DATA),
1130 PINMUX_GPIO(GPIO_PD6, PD6_DATA),
1131 PINMUX_GPIO(GPIO_PD5, PD5_DATA),
1132 PINMUX_GPIO(GPIO_PD4, PD4_DATA),
1133 PINMUX_GPIO(GPIO_PD3, PD3_DATA),
1134 PINMUX_GPIO(GPIO_PD2, PD2_DATA),
1135 PINMUX_GPIO(GPIO_PD1, PD1_DATA),
1136 PINMUX_GPIO(GPIO_PD0, PD0_DATA),
1137
1138 /* Port E */
1139 PINMUX_GPIO(GPIO_PE5, PE5_DATA),
1140 PINMUX_GPIO(GPIO_PE4, PE4_DATA),
1141 PINMUX_GPIO(GPIO_PE3, PE3_DATA),
1142 PINMUX_GPIO(GPIO_PE2, PE2_DATA),
1143 PINMUX_GPIO(GPIO_PE1, PE1_DATA),
1144 PINMUX_GPIO(GPIO_PE0, PE0_DATA),
1145
1146 /* Port F */
1147 PINMUX_GPIO(GPIO_PF12, PF12_DATA),
1148 PINMUX_GPIO(GPIO_PF11, PF11_DATA),
1149 PINMUX_GPIO(GPIO_PF10, PF10_DATA),
1150 PINMUX_GPIO(GPIO_PF9, PF9_DATA),
1151 PINMUX_GPIO(GPIO_PF8, PF8_DATA),
1152 PINMUX_GPIO(GPIO_PF7, PF7_DATA),
1153 PINMUX_GPIO(GPIO_PF6, PF6_DATA),
1154 PINMUX_GPIO(GPIO_PF5, PF5_DATA),
1155 PINMUX_GPIO(GPIO_PF4, PF4_DATA),
1156 PINMUX_GPIO(GPIO_PF3, PF3_DATA),
1157 PINMUX_GPIO(GPIO_PF2, PF2_DATA),
1158 PINMUX_GPIO(GPIO_PF1, PF1_DATA),
1159 PINMUX_GPIO(GPIO_PF0, PF0_DATA),
1160
1161 /* Port G */
1162 PINMUX_GPIO(GPIO_PG24, PG24_DATA),
1163 PINMUX_GPIO(GPIO_PG23, PG23_DATA),
1164 PINMUX_GPIO(GPIO_PG22, PG22_DATA),
1165 PINMUX_GPIO(GPIO_PG21, PG21_DATA),
1166 PINMUX_GPIO(GPIO_PG20, PG20_DATA),
1167 PINMUX_GPIO(GPIO_PG19, PG19_DATA),
1168 PINMUX_GPIO(GPIO_PG18, PG18_DATA),
1169 PINMUX_GPIO(GPIO_PG17, PG17_DATA),
1170 PINMUX_GPIO(GPIO_PG16, PG16_DATA),
1171 PINMUX_GPIO(GPIO_PG15, PG15_DATA),
1172 PINMUX_GPIO(GPIO_PG14, PG14_DATA),
1173 PINMUX_GPIO(GPIO_PG13, PG13_DATA),
1174 PINMUX_GPIO(GPIO_PG12, PG12_DATA),
1175 PINMUX_GPIO(GPIO_PG11, PG11_DATA),
1176 PINMUX_GPIO(GPIO_PG10, PG10_DATA),
1177 PINMUX_GPIO(GPIO_PG9, PG9_DATA),
1178 PINMUX_GPIO(GPIO_PG8, PG8_DATA),
1179 PINMUX_GPIO(GPIO_PG7, PG7_DATA),
1180 PINMUX_GPIO(GPIO_PG6, PG6_DATA),
1181 PINMUX_GPIO(GPIO_PG5, PG5_DATA),
1182 PINMUX_GPIO(GPIO_PG4, PG4_DATA),
1183 PINMUX_GPIO(GPIO_PG3, PG3_DATA),
1184 PINMUX_GPIO(GPIO_PG2, PG2_DATA),
1185 PINMUX_GPIO(GPIO_PG1, PG1_DATA),
1186 PINMUX_GPIO(GPIO_PG0, PG0_DATA),
1187
1188 /* Port H - Port H does not have a Data Register */
1189
1190 /* Port I - not on device */
1191
1192 /* Port J */
1193 PINMUX_GPIO(GPIO_PJ11, PJ11_DATA),
1194 PINMUX_GPIO(GPIO_PJ10, PJ10_DATA),
1195 PINMUX_GPIO(GPIO_PJ9, PJ9_DATA),
1196 PINMUX_GPIO(GPIO_PJ8, PJ8_DATA),
1197 PINMUX_GPIO(GPIO_PJ7, PJ7_DATA),
1198 PINMUX_GPIO(GPIO_PJ6, PJ6_DATA),
1199 PINMUX_GPIO(GPIO_PJ5, PJ5_DATA),
1200 PINMUX_GPIO(GPIO_PJ4, PJ4_DATA),
1201 PINMUX_GPIO(GPIO_PJ3, PJ3_DATA),
1202 PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),
1203 PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),
1204 PINMUX_GPIO(GPIO_PJ0, PJ0_DATA),
1205
1206 /* Port K */
1207 PINMUX_GPIO(GPIO_PK11, PK11_DATA),
1208 PINMUX_GPIO(GPIO_PK10, PK10_DATA),
1209 PINMUX_GPIO(GPIO_PK9, PK9_DATA),
1210 PINMUX_GPIO(GPIO_PK8, PK8_DATA),
1211 PINMUX_GPIO(GPIO_PK7, PK7_DATA),
1212 PINMUX_GPIO(GPIO_PK6, PK6_DATA),
1213 PINMUX_GPIO(GPIO_PK5, PK5_DATA),
1214 PINMUX_GPIO(GPIO_PK4, PK4_DATA),
1215 PINMUX_GPIO(GPIO_PK3, PK3_DATA),
1216 PINMUX_GPIO(GPIO_PK2, PK2_DATA),
1217 PINMUX_GPIO(GPIO_PK1, PK1_DATA),
1218 PINMUX_GPIO(GPIO_PK0, PK0_DATA),
1219
1220 /* INTC */
1221 PINMUX_GPIO(GPIO_FN_PINT7_PG, PINT7_PG_MARK),
1222 PINMUX_GPIO(GPIO_FN_PINT6_PG, PINT6_PG_MARK),
1223 PINMUX_GPIO(GPIO_FN_PINT5_PG, PINT5_PG_MARK),
1224 PINMUX_GPIO(GPIO_FN_PINT4_PG, PINT4_PG_MARK),
1225 PINMUX_GPIO(GPIO_FN_PINT3_PG, PINT3_PG_MARK),
1226 PINMUX_GPIO(GPIO_FN_PINT2_PG, PINT2_PG_MARK),
1227 PINMUX_GPIO(GPIO_FN_PINT1_PG, PINT1_PG_MARK),
1228
1229 PINMUX_GPIO(GPIO_FN_IRQ7_PC, IRQ7_PC_MARK),
1230 PINMUX_GPIO(GPIO_FN_IRQ6_PC, IRQ6_PC_MARK),
1231 PINMUX_GPIO(GPIO_FN_IRQ5_PC, IRQ5_PC_MARK),
1232 PINMUX_GPIO(GPIO_FN_IRQ4_PC, IRQ4_PC_MARK),
1233 PINMUX_GPIO(GPIO_FN_IRQ3_PG, IRQ3_PG_MARK),
1234 PINMUX_GPIO(GPIO_FN_IRQ2_PG, IRQ2_PG_MARK),
1235 PINMUX_GPIO(GPIO_FN_IRQ1_PJ, IRQ1_PJ_MARK),
1236 PINMUX_GPIO(GPIO_FN_IRQ0_PJ, IRQ0_PJ_MARK),
1237 PINMUX_GPIO(GPIO_FN_IRQ3_PE, IRQ3_PE_MARK),
1238 PINMUX_GPIO(GPIO_FN_IRQ2_PE, IRQ2_PE_MARK),
1239 PINMUX_GPIO(GPIO_FN_IRQ1_PE, IRQ1_PE_MARK),
1240 PINMUX_GPIO(GPIO_FN_IRQ0_PE, IRQ0_PE_MARK),
1241
1242 /* WDT */
1243 PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK),
1244
1245 /* CAN */
1246 PINMUX_GPIO(GPIO_FN_CTX1, CTX1_MARK),
1247 PINMUX_GPIO(GPIO_FN_CRX1, CRX1_MARK),
1248 PINMUX_GPIO(GPIO_FN_CTX0, CTX0_MARK),
1249 PINMUX_GPIO(GPIO_FN_CRX0, CRX0_MARK),
1250 PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0_CRX1_MARK),
1251
1252 /* DMAC */
1253 PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK),
1254 PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
1255 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
1256 PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK),
1257 PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
1258 PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
1259
1260 /* ADC */
1261 PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK),
1262
1263 /* BSCh */
1264 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
1265 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
1266 PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
1267 PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
1268 PINMUX_GPIO(GPIO_FN_A21, A21_MARK),
1269 PINMUX_GPIO(GPIO_FN_A20, A20_MARK),
1270 PINMUX_GPIO(GPIO_FN_A19, A19_MARK),
1271 PINMUX_GPIO(GPIO_FN_A18, A18_MARK),
1272 PINMUX_GPIO(GPIO_FN_A17, A17_MARK),
1273 PINMUX_GPIO(GPIO_FN_A16, A16_MARK),
1274 PINMUX_GPIO(GPIO_FN_A15, A15_MARK),
1275 PINMUX_GPIO(GPIO_FN_A14, A14_MARK),
1276 PINMUX_GPIO(GPIO_FN_A13, A13_MARK),
1277 PINMUX_GPIO(GPIO_FN_A12, A12_MARK),
1278 PINMUX_GPIO(GPIO_FN_A11, A11_MARK),
1279 PINMUX_GPIO(GPIO_FN_A10, A10_MARK),
1280 PINMUX_GPIO(GPIO_FN_A9, A9_MARK),
1281 PINMUX_GPIO(GPIO_FN_A8, A8_MARK),
1282 PINMUX_GPIO(GPIO_FN_A7, A7_MARK),
1283 PINMUX_GPIO(GPIO_FN_A6, A6_MARK),
1284 PINMUX_GPIO(GPIO_FN_A5, A5_MARK),
1285 PINMUX_GPIO(GPIO_FN_A4, A4_MARK),
1286 PINMUX_GPIO(GPIO_FN_A3, A3_MARK),
1287 PINMUX_GPIO(GPIO_FN_A2, A2_MARK),
1288 PINMUX_GPIO(GPIO_FN_A1, A1_MARK),
1289 PINMUX_GPIO(GPIO_FN_A0, A0_MARK),
1290
1291 PINMUX_GPIO(GPIO_FN_D15, D15_MARK),
1292 PINMUX_GPIO(GPIO_FN_D14, D14_MARK),
1293 PINMUX_GPIO(GPIO_FN_D13, D13_MARK),
1294 PINMUX_GPIO(GPIO_FN_D12, D12_MARK),
1295 PINMUX_GPIO(GPIO_FN_D11, D11_MARK),
1296 PINMUX_GPIO(GPIO_FN_D10, D10_MARK),
1297 PINMUX_GPIO(GPIO_FN_D9, D9_MARK),
1298 PINMUX_GPIO(GPIO_FN_D8, D8_MARK),
1299 PINMUX_GPIO(GPIO_FN_D7, D7_MARK),
1300 PINMUX_GPIO(GPIO_FN_D6, D6_MARK),
1301 PINMUX_GPIO(GPIO_FN_D5, D5_MARK),
1302 PINMUX_GPIO(GPIO_FN_D4, D4_MARK),
1303 PINMUX_GPIO(GPIO_FN_D3, D3_MARK),
1304 PINMUX_GPIO(GPIO_FN_D2, D2_MARK),
1305 PINMUX_GPIO(GPIO_FN_D1, D1_MARK),
1306 PINMUX_GPIO(GPIO_FN_D0, D0_MARK),
1307
1308 PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
1309 PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
1310 PINMUX_GPIO(GPIO_FN_CS3, CS3_MARK),
1311 PINMUX_GPIO(GPIO_FN_CS2, CS2_MARK),
1312 PINMUX_GPIO(GPIO_FN_CS1, CS1_MARK),
1313 PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK),
1314 PINMUX_GPIO(GPIO_FN_CS6CE1B, CS6CE1B_MARK),
1315 PINMUX_GPIO(GPIO_FN_CS5CE1A, CS5CE1A_MARK),
1316 PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK),
1317 PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK),
1318 PINMUX_GPIO(GPIO_FN_RD, RD_MARK),
1319 PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK),
1320 PINMUX_GPIO(GPIO_FN_ICIOWRAH, ICIOWRAH_MARK),
1321 PINMUX_GPIO(GPIO_FN_ICIORD, ICIORD_MARK),
1322 PINMUX_GPIO(GPIO_FN_WE1DQMUWE, WE1DQMUWE_MARK),
1323 PINMUX_GPIO(GPIO_FN_WE0DQML, WE0DQML_MARK),
1324 PINMUX_GPIO(GPIO_FN_RAS, RAS_MARK),
1325 PINMUX_GPIO(GPIO_FN_CAS, CAS_MARK),
1326 PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK),
1327 PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK),
1328 PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK),
1329 PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK),
1330 PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
1331
1332 /* TMU */
1333 PINMUX_GPIO(GPIO_FN_TIOC4D, TIOC4D_MARK),
1334 PINMUX_GPIO(GPIO_FN_TIOC4C, TIOC4C_MARK),
1335 PINMUX_GPIO(GPIO_FN_TIOC4B, TIOC4B_MARK),
1336 PINMUX_GPIO(GPIO_FN_TIOC4A, TIOC4A_MARK),
1337 PINMUX_GPIO(GPIO_FN_TIOC3D, TIOC3D_MARK),
1338 PINMUX_GPIO(GPIO_FN_TIOC3C, TIOC3C_MARK),
1339 PINMUX_GPIO(GPIO_FN_TIOC3B, TIOC3B_MARK),
1340 PINMUX_GPIO(GPIO_FN_TIOC3A, TIOC3A_MARK),
1341 PINMUX_GPIO(GPIO_FN_TIOC2B, TIOC2B_MARK),
1342 PINMUX_GPIO(GPIO_FN_TIOC1B, TIOC1B_MARK),
1343 PINMUX_GPIO(GPIO_FN_TIOC2A, TIOC2A_MARK),
1344 PINMUX_GPIO(GPIO_FN_TIOC1A, TIOC1A_MARK),
1345 PINMUX_GPIO(GPIO_FN_TIOC0D, TIOC0D_MARK),
1346 PINMUX_GPIO(GPIO_FN_TIOC0C, TIOC0C_MARK),
1347 PINMUX_GPIO(GPIO_FN_TIOC0B, TIOC0B_MARK),
1348 PINMUX_GPIO(GPIO_FN_TIOC0A, TIOC0A_MARK),
1349 PINMUX_GPIO(GPIO_FN_TCLKD, TCLKD_MARK),
1350 PINMUX_GPIO(GPIO_FN_TCLKC, TCLKC_MARK),
1351 PINMUX_GPIO(GPIO_FN_TCLKB, TCLKB_MARK),
1352 PINMUX_GPIO(GPIO_FN_TCLKA, TCLKA_MARK),
1353
1354 /* SCIF */
1355 PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK),
1356 PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK),
1357 PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK),
1358 PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK),
1359 PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK),
1360 PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK),
1361 PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),
1362 PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),
1363 PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),
1364 PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK),
1365 PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK),
1366 PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),
1367 PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),
1368 PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
1369 PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK),
1370 PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK),
1371 PINMUX_GPIO(GPIO_FN_TXD5, TXD5_MARK),
1372 PINMUX_GPIO(GPIO_FN_RXD5, RXD5_MARK),
1373 PINMUX_GPIO(GPIO_FN_TXD6, TXD6_MARK),
1374 PINMUX_GPIO(GPIO_FN_RXD6, RXD6_MARK),
1375 PINMUX_GPIO(GPIO_FN_TXD7, TXD7_MARK),
1376 PINMUX_GPIO(GPIO_FN_RXD7, RXD7_MARK),
1377 PINMUX_GPIO(GPIO_FN_RTS1, RTS1_MARK),
1378 PINMUX_GPIO(GPIO_FN_CTS1, CTS1_MARK),
1379
1380 /* RSPI */
1381 PINMUX_GPIO(GPIO_FN_RSPCK0, RSPCK0_MARK),
1382 PINMUX_GPIO(GPIO_FN_MOSI0, MOSI0_MARK),
1383 PINMUX_GPIO(GPIO_FN_MISO0_PF12, MISO0_PF12_MARK),
1384 PINMUX_GPIO(GPIO_FN_MISO1, MISO1_MARK),
1385 PINMUX_GPIO(GPIO_FN_SSL00, SSL00_MARK),
1386 PINMUX_GPIO(GPIO_FN_RSPCK1, RSPCK1_MARK),
1387 PINMUX_GPIO(GPIO_FN_MOSI1, MOSI1_MARK),
1388 PINMUX_GPIO(GPIO_FN_MISO1_PG19, MISO1_PG19_MARK),
1389 PINMUX_GPIO(GPIO_FN_SSL10, SSL10_MARK),
1390
1391 /* IIC3 */
1392 PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK),
1393 PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK),
1394 PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK),
1395 PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK),
1396 PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK),
1397 PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK),
1398
1399 /* SSI */
1400 PINMUX_GPIO(GPIO_FN_SSISCK0, SSISCK0_MARK),
1401 PINMUX_GPIO(GPIO_FN_SSIWS0, SSIWS0_MARK),
1402 PINMUX_GPIO(GPIO_FN_SSITXD0, SSITXD0_MARK),
1403 PINMUX_GPIO(GPIO_FN_SSIRXD0, SSIRXD0_MARK),
1404 PINMUX_GPIO(GPIO_FN_SSIWS1, SSIWS1_MARK),
1405 PINMUX_GPIO(GPIO_FN_SSIWS2, SSIWS2_MARK),
1406 PINMUX_GPIO(GPIO_FN_SSIWS3, SSIWS3_MARK),
1407 PINMUX_GPIO(GPIO_FN_SSISCK1, SSISCK1_MARK),
1408 PINMUX_GPIO(GPIO_FN_SSISCK2, SSISCK2_MARK),
1409 PINMUX_GPIO(GPIO_FN_SSISCK3, SSISCK3_MARK),
1410 PINMUX_GPIO(GPIO_FN_SSIDATA1, SSIDATA1_MARK),
1411 PINMUX_GPIO(GPIO_FN_SSIDATA2, SSIDATA2_MARK),
1412 PINMUX_GPIO(GPIO_FN_SSIDATA3, SSIDATA3_MARK),
1413 PINMUX_GPIO(GPIO_FN_AUDIO_CLK, AUDIO_CLK_MARK),
1414
1415 /* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */
1416 PINMUX_GPIO(GPIO_FN_SIOFTXD, SIOFTXD_MARK),
1417 PINMUX_GPIO(GPIO_FN_SIOFRXD, SIOFRXD_MARK),
1418 PINMUX_GPIO(GPIO_FN_SIOFSYNC, SIOFSYNC_MARK),
1419 PINMUX_GPIO(GPIO_FN_SIOFSCK, SIOFSCK_MARK),
1420
1421 /* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */
1422 PINMUX_GPIO(GPIO_FN_SPDIF_IN, SPDIF_IN_MARK),
1423 PINMUX_GPIO(GPIO_FN_SPDIF_OUT, SPDIF_OUT_MARK),
1424
1425 /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */
1426 PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK),
1427 PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),
1428
1429 /* VDC3 */
1430 PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK),
1431 PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK),
1432 PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK),
1433
1434 PINMUX_GPIO(GPIO_FN_DV_DATA7, DV_DATA7_MARK),
1435 PINMUX_GPIO(GPIO_FN_DV_DATA6, DV_DATA6_MARK),
1436 PINMUX_GPIO(GPIO_FN_DV_DATA5, DV_DATA5_MARK),
1437 PINMUX_GPIO(GPIO_FN_DV_DATA4, DV_DATA4_MARK),
1438 PINMUX_GPIO(GPIO_FN_DV_DATA3, DV_DATA3_MARK),
1439 PINMUX_GPIO(GPIO_FN_DV_DATA2, DV_DATA2_MARK),
1440 PINMUX_GPIO(GPIO_FN_DV_DATA1, DV_DATA1_MARK),
1441 PINMUX_GPIO(GPIO_FN_DV_DATA0, DV_DATA0_MARK),
1442
1443 PINMUX_GPIO(GPIO_FN_LCD_CLK, LCD_CLK_MARK),
1444 PINMUX_GPIO(GPIO_FN_LCD_EXTCLK, LCD_EXTCLK_MARK),
1445 PINMUX_GPIO(GPIO_FN_LCD_VSYNC, LCD_VSYNC_MARK),
1446 PINMUX_GPIO(GPIO_FN_LCD_HSYNC, LCD_HSYNC_MARK),
1447 PINMUX_GPIO(GPIO_FN_LCD_DE, LCD_DE_MARK),
1448
1449 PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK),
1450 PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK),
1451 PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK),
1452 PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK),
1453 PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK),
1454 PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK),
1455 PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK),
1456 PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK),
1457 PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK),
1458 PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK),
1459 PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK),
1460 PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK),
1461 PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK),
1462 PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK),
1463 PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK),
1464 PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK),
1465
1466 PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK),
1467};
1468
1469static struct pinmux_cfg_reg pinmux_config_regs[] = {
1470 { PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1) {
1471 0, 0, 0, 0, 0, 0, 0, 0,
1472 0, 0, 0, 0, 0, 0, 0, 0,
1473 0, 0, 0, 0, 0, 0, 0, 0,
1474 PA3_IN, PA3_OUT,
1475 PA2_IN, PA2_OUT,
1476 PA1_IN, PA1_OUT,
1477 PA0_IN, PA0_OUT }
1478 },
1479
1480 { PINMUX_CFG_REG("PBCR5", 0xfffe3824, 16, 4) {
1481 0, 0, 0, 0, 0, 0, 0, 0,
1482 0, 0, 0, 0, 0, 0, 0, 0,
1483 PB22MD_00, PB22MD_01, PB22MD_10, 0, 0, 0, 0, 0,
1484 0, 0, 0, 0, 0, 0, 0, 0,
1485 PB21MD_0, PB21MD_1, 0, 0, 0, 0, 0, 0,
1486 0, 0, 0, 0, 0, 0, 0, 0,
1487 0, PB20MD_1, 0, 0, 0, 0, 0, 0,
1488 0, 0, 0, 0, 0, 0, 0, 0 }
1489
1490 },
1491 { PINMUX_CFG_REG("PBCR4", 0xfffe3826, 16, 4) {
1492 0, PB19MD_01, 0, 0, 0, 0, 0, 0,
1493 0, 0, 0, 0, 0, 0, 0, 0,
1494 0, PB18MD_01, 0, 0, 0, 0, 0, 0,
1495 0, 0, 0, 0, 0, 0, 0, 0,
1496 0, PB17MD_01, 0, 0, 0, 0, 0, 0,
1497 0, 0, 0, 0, 0, 0, 0, 0,
1498 0, PB16MD_01, 0, 0, 0, 0, 0, 0,
1499 0, 0, 0, 0, 0, 0, 0, 0 }
1500 },
1501 { PINMUX_CFG_REG("PBCR3", 0xfffe3828, 16, 4) {
1502 0, PB15MD_01, 0, 0, 0, 0, 0, 0,
1503 0, 0, 0, 0, 0, 0, 0, 0,
1504 0, PB14MD_01, 0, 0, 0, 0, 0, 0,
1505 0, 0, 0, 0, 0, 0, 0, 0,
1506 0, PB13MD_01, 0, 0, 0, 0, 0, 0,
1507 0, 0, 0, 0, 0, 0, 0, 0,
1508 0, PB12MD_01, 0, 0, 0, 0, 0, 0,
1509 0, 0, 0, 0, 0, 0, 0, 0 }
1510 },
1511 { PINMUX_CFG_REG("PBCR2", 0xfffe382a, 16, 4) {
1512 0, PB11MD_01, 0, 0, 0, 0, 0, 0,
1513 0, 0, 0, 0, 0, 0, 0, 0,
1514 0, PB10MD_01, 0, 0, 0, 0, 0, 0,
1515 0, 0, 0, 0, 0, 0, 0, 0,
1516 0, PB9MD_01, 0, 0, 0, 0, 0, 0,
1517 0, 0, 0, 0, 0, 0, 0, 0,
1518 0, PB8MD_01, 0, 0, 0, 0, 0, 0,
1519 0, 0, 0, 0, 0, 0, 0, 0 }
1520 },
1521 { PINMUX_CFG_REG("PBCR1", 0xfffe382c, 16, 4) {
1522 0, PB7MD_01, 0, 0, 0, 0, 0, 0,
1523 0, 0, 0, 0, 0, 0, 0, 0,
1524 0, PB6MD_01, 0, 0, 0, 0, 0, 0,
1525 0, 0, 0, 0, 0, 0, 0, 0,
1526 0, PB5MD_01, 0, 0, 0, 0, 0, 0,
1527 0, 0, 0, 0, 0, 0, 0, 0,
1528 0, PB4MD_01, 0, 0, 0, 0, 0, 0,
1529 0, 0, 0, 0, 0, 0, 0, 0 }
1530 },
1531 { PINMUX_CFG_REG("PBCR0", 0xfffe382e, 16, 4) {
1532 0, PB3MD_1, 0, 0, 0, 0, 0, 0,
1533 0, 0, 0, 0, 0, 0, 0, 0,
1534 0, PB2MD_1, 0, 0, 0, 0, 0, 0,
1535 0, 0, 0, 0, 0, 0, 0, 0,
1536 0, PB1MD_1, 0, 0, 0, 0, 0, 0,
1537 0, 0, 0, 0, 0, 0, 0, 0,
1538 0, 0, 0, 0, 0, 0, 0, 0,
1539 0, 0, 0, 0, 0, 0, 0, 0 }
1540 },
1541
1542 { PINMUX_CFG_REG("PBIOR1", 0xfffe3830, 16, 1) {
1543 0, 0, 0, 0, 0, 0, 0, 0,
1544 0, 0, 0, 0, 0, 0, 0, 0,
1545 0, 0,
1546 PB22_IN, PB22_OUT,
1547 PB21_IN, PB21_OUT,
1548 PB20_IN, PB20_OUT,
1549 PB19_IN, PB19_OUT,
1550 PB18_IN, PB18_OUT,
1551 PB17_IN, PB17_OUT,
1552 PB16_IN, PB16_OUT }
1553 },
1554
1555 { PINMUX_CFG_REG("PBIOR0", 0xfffe3832, 16, 1) {
1556 PB15_IN, PB15_OUT,
1557 PB14_IN, PB14_OUT,
1558 PB13_IN, PB13_OUT,
1559 PB12_IN, PB12_OUT,
1560 PB11_IN, PB11_OUT,
1561 PB10_IN, PB10_OUT,
1562 PB9_IN, PB9_OUT,
1563 PB8_IN, PB8_OUT,
1564 PB7_IN, PB7_OUT,
1565 PB6_IN, PB6_OUT,
1566 PB5_IN, PB5_OUT,
1567 PB4_IN, PB4_OUT,
1568 PB3_IN, PB3_OUT,
1569 PB2_IN, PB2_OUT,
1570 PB1_IN, PB1_OUT,
1571 0, 0 }
1572 },
1573
1574 { PINMUX_CFG_REG("PCCR2", 0xfffe384a, 16, 4) {
1575 0, 0, 0, 0, 0, 0, 0, 0,
1576 0, 0, 0, 0, 0, 0, 0, 0,
1577 PC10MD_0, PC10MD_1, 0, 0, 0, 0, 0, 0,
1578 0, 0, 0, 0, 0, 0, 0, 0,
1579 PC9MD_0, PC9MD_1, 0, 0, 0, 0, 0, 0,
1580 0, 0, 0, 0, 0, 0, 0, 0,
1581 PC8MD_00, PC8MD_01, PC8MD_10, PC8MD_11, 0, 0, 0, 0,
1582 0, 0, 0, 0, 0, 0, 0, 0 }
1583 },
1584 { PINMUX_CFG_REG("PCCR1", 0xfffe384c, 16, 4) {
1585 PC7MD_00, PC7MD_01, PC7MD_10, PC7MD_11, 0, 0, 0, 0,
1586 0, 0, 0, 0, 0, 0, 0, 0,
1587 PC6MD_00, PC6MD_01, PC6MD_10, PC6MD_11, 0, 0, 0, 0,
1588 0, 0, 0, 0, 0, 0, 0, 0,
1589 PC5MD_00, PC5MD_01, PC5MD_10, PC5MD_11, 0, 0, 0, 0,
1590 0, 0, 0, 0, 0, 0, 0, 0,
1591 PC4MD_0, PC4MD_1, 0, 0, 0, 0, 0, 0,
1592 0, 0, 0, 0, 0, 0, 0, 0 }
1593 },
1594 { PINMUX_CFG_REG("PCCR0", 0xfffe384e, 16, 4) {
1595 PC3MD_0, PC3MD_1, 0, 0, 0, 0, 0, 0,
1596 0, 0, 0, 0, 0, 0, 0, 0,
1597 PC2MD_0, PC2MD_1, 0, 0, 0, 0, 0, 0,
1598 0, 0, 0, 0, 0, 0, 0, 0,
1599 PC1MD_0, PC1MD_1, 0, 0, 0, 0, 0, 0,
1600 0, 0, 0, 0, 0, 0, 0, 0,
1601 PC0MD_0, PC0MD_1, 0, 0, 0, 0, 0, 0,
1602 0, 0, 0, 0, 0, 0, 0, 0 }
1603 },
1604
1605 { PINMUX_CFG_REG("PCIOR0", 0xfffe3852, 16, 1) {
1606 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1607 PC10_IN, PC10_OUT,
1608 PC9_IN, PC9_OUT,
1609 PC8_IN, PC8_OUT,
1610 PC7_IN, PC7_OUT,
1611 PC6_IN, PC6_OUT,
1612 PC5_IN, PC5_OUT,
1613 PC4_IN, PC4_OUT,
1614 PC3_IN, PC3_OUT,
1615 PC2_IN, PC2_OUT,
1616 PC1_IN, PC1_OUT,
1617 PC0_IN, PC0_OUT
1618 }
1619 },
1620
1621 { PINMUX_CFG_REG("PDCR3", 0xfffe3868, 16, 4) {
1622 0, PD15MD_01, 0, 0, 0, 0, 0, 0,
1623 0, 0, 0, 0, 0, 0, 0, 0,
1624 0, PD14MD_01, 0, 0, 0, 0, 0, 0,
1625 0, 0, 0, 0, 0, 0, 0, 0,
1626 0, PD13MD_01, 0, 0, 0, 0, 0, 0,
1627 0, 0, 0, 0, 0, 0, 0, 0,
1628 0, PD12MD_01, 0, 0, 0, 0, 0, 0,
1629 0, 0, 0, 0, 0, 0, 0, 0 }
1630 },
1631 { PINMUX_CFG_REG("PDCR2", 0xfffe386a, 16, 4) {
1632 0, PD11MD_01, 0, 0, 0, 0, 0, 0,
1633 0, 0, 0, 0, 0, 0, 0, 0,
1634 0, PD10MD_01, 0, 0, 0, 0, 0, 0,
1635 0, 0, 0, 0, 0, 0, 0, 0,
1636 0, PD9MD_01, 0, 0, 0, 0, 0, 0,
1637 0, 0, 0, 0, 0, 0, 0, 0,
1638 0, PD8MD_01, 0, 0, 0, 0, 0, 0,
1639 0, 0, 0, 0, 0, 0, 0, 0 }
1640 },
1641 { PINMUX_CFG_REG("PDCR1", 0xfffe386c, 16, 4) {
1642 0, PD7MD_01, 0, 0, 0, 0, 0, 0,
1643 0, 0, 0, 0, 0, 0, 0, 0,
1644 0, PD6MD_01, 0, 0, 0, 0, 0, 0,
1645 0, 0, 0, 0, 0, 0, 0, 0,
1646 0, PD5MD_01, 0, 0, 0, 0, 0, 0,
1647 0, 0, 0, 0, 0, 0, 0, 0,
1648 0, PD4MD_01, 0, 0, 0, 0, 0, 0,
1649 0, 0, 0, 0, 0, 0, 0, 0 }
1650 },
1651 { PINMUX_CFG_REG("PDCR0", 0xfffe386e, 16, 4) {
1652 0, PD3MD_01, 0, 0, 0, 0, 0, 0,
1653 0, 0, 0, 0, 0, 0, 0, 0,
1654 0, PD2MD_01, 0, 0, 0, 0, 0, 0,
1655 0, 0, 0, 0, 0, 0, 0, 0,
1656 0, PD1MD_01, 0, 0, 0, 0, 0, 0,
1657 0, 0, 0, 0, 0, 0, 0, 0,
1658 0, PD0MD_01, 0, 0, 0, 0, 0, 0,
1659 0, 0, 0, 0, 0, 0, 0, 0 }
1660 },
1661
1662 { PINMUX_CFG_REG("PDIOR0", 0xfffe3872, 16, 1) {
1663 PD15_IN, PD15_OUT,
1664 PD14_IN, PD14_OUT,
1665 PD13_IN, PD13_OUT,
1666 PD12_IN, PD12_OUT,
1667 PD11_IN, PD11_OUT,
1668 PD10_IN, PD10_OUT,
1669 PD9_IN, PD9_OUT,
1670 PD8_IN, PD8_OUT,
1671 PD7_IN, PD7_OUT,
1672 PD6_IN, PD6_OUT,
1673 PD5_IN, PD5_OUT,
1674 PD4_IN, PD4_OUT,
1675 PD3_IN, PD3_OUT,
1676 PD2_IN, PD2_OUT,
1677 PD1_IN, PD1_OUT,
1678 PD0_IN, PD0_OUT }
1679 },
1680
1681 { PINMUX_CFG_REG("PECR1", 0xfffe388c, 16, 4) {
1682 0, 0, 0, 0, 0, 0, 0, 0,
1683 0, 0, 0, 0, 0, 0, 0, 0,
1684 0, 0, 0, 0, 0, 0, 0, 0,
1685 0, 0, 0, 0, 0, 0, 0, 0,
1686 PE5MD_00, PE5MD_01, 0, PE5MD_11, 0, 0, 0, 0,
1687 0, 0, 0, 0, 0, 0, 0, 0,
1688 PE4MD_00, PE4MD_01, 0, PE4MD_11, 0, 0, 0, 0,
1689 0, 0, 0, 0, 0, 0, 0, 0 }
1690 },
1691
1692 { PINMUX_CFG_REG("PECR0", 0xfffe388e, 16, 4) {
1693 PE3MD_00, PE3MD_01, 0, PE3MD_11, 0, 0, 0, 0,
1694 0, 0, 0, 0, 0, 0, 0, 0,
1695 PE2MD_00, PE2MD_01, 0, PE2MD_11, 0, 0, 0, 0,
1696 0, 0, 0, 0, 0, 0, 0, 0,
1697 PE1MD_000, PE1MD_001, PE1MD_010, PE1MD_011,
1698 PE1MD_100, PE1MD_101, 0, 0,
1699 0, 0, 0, 0, 0, 0, 0, 0,
1700 PE0MD_00, PE0MD_01, PE0MD_10, PE0MD_11, 0, 0, 0, 0,
1701 0, 0, 0, 0, 0, 0, 0, 0 }
1702 },
1703
1704 { PINMUX_CFG_REG("PEIOR0", 0xfffe3892, 16, 1) {
1705 0, 0, 0, 0, 0, 0, 0, 0,
1706 0, 0, 0, 0, 0, 0, 0, 0,
1707 0, 0, 0, 0,
1708 PE5_IN, PE5_OUT,
1709 PE4_IN, PE4_OUT,
1710 PE3_IN, PE3_OUT,
1711 PE2_IN, PE2_OUT,
1712 PE1_IN, PE1_OUT,
1713 PE0_IN, PE0_OUT }
1714 },
1715
1716 { PINMUX_CFG_REG("PFCR3", 0xfffe38a8, 16, 4) {
1717 PF12MD_000, PF12MD_001, 0, PF12MD_011,
1718 PF12MD_100, PF12MD_101, 0, 0,
1719 0, 0, 0, 0, 0, 0, 0, 0 }
1720 },
1721
1722 { PINMUX_CFG_REG("PFCR2", 0xfffe38aa, 16, 4) {
1723 PF11MD_000, PF11MD_001, PF11MD_010, PF11MD_011,
1724 PF11MD_100, PF11MD_101, 0, 0,
1725 0, 0, 0, 0, 0, 0, 0, 0,
1726 PF10MD_000, PF10MD_001, PF10MD_010, PF10MD_011,
1727 PF10MD_100, PF10MD_101, 0, 0,
1728 0, 0, 0, 0, 0, 0, 0, 0,
1729 PF9MD_000, PF9MD_001, PF9MD_010, PF9MD_011,
1730 PF9MD_100, PF9MD_101, 0, 0,
1731 0, 0, 0, 0, 0, 0, 0, 0,
1732 PF8MD_00, PF8MD_01, PF8MD_10, PF8MD_11, 0, 0, 0, 0,
1733 0, 0, 0, 0, 0, 0, 0, 0 }
1734 },
1735
1736 { PINMUX_CFG_REG("PFCR1", 0xfffe38ac, 16, 4) {
1737 PF7MD_000, PF7MD_001, PF7MD_010, PF7MD_011,
1738 PF7MD_100, 0, 0, 0,
1739 0, 0, 0, 0, 0, 0, 0, 0,
1740 PF6MD_000, PF6MD_001, PF6MD_010, PF6MD_011,
1741 PF6MD_100, 0, 0, 0,
1742 0, 0, 0, 0, 0, 0, 0, 0,
1743 PF5MD_000, PF5MD_001, PF5MD_010, PF5MD_011,
1744 PF5MD_100, 0, 0, 0,
1745 0, 0, 0, 0, 0, 0, 0, 0,
1746 PF4MD_000, PF4MD_001, PF4MD_010, PF4MD_011,
1747 PF4MD_100, 0, 0, 0,
1748 0, 0, 0, 0, 0, 0, 0, 0 }
1749 },
1750
1751 { PINMUX_CFG_REG("PFCR0", 0xfffe38ae, 16, 4) {
1752 PF3MD_000, PF3MD_001, PF3MD_010, PF3MD_011,
1753 PF3MD_100, 0, 0, 0,
1754 0, 0, 0, 0, 0, 0, 0, 0,
1755 PF2MD_000, PF2MD_001, PF2MD_010, PF2MD_011,
1756 PF2MD_100, PF2MD_101, 0, 0,
1757 0, 0, 0, 0, 0, 0, 0, 0,
1758 PF1MD_000, PF1MD_001, PF1MD_010, PF1MD_011,
1759 PF1MD_100, PF1MD_101, 0, 0,
1760 0, 0, 0, 0, 0, 0, 0, 0
1761 }
1762 },
1763
1764 { PINMUX_CFG_REG("PFIOR0", 0xfffe38b2, 16, 1) {
1765 0, 0, 0, 0, 0, 0,
1766 PF12_IN, PF12_OUT,
1767 PF11_IN, PF11_OUT,
1768 PF10_IN, PF10_OUT,
1769 PF9_IN, PF9_OUT,
1770 PF8_IN, PF8_OUT,
1771 PF7_IN, PF7_OUT,
1772 PF6_IN, PF6_OUT,
1773 PF5_IN, PF5_OUT,
1774 PF4_IN, PF4_OUT,
1775 PF3_IN, PF3_OUT,
1776 PF2_IN, PF2_OUT,
1777 PF1_IN, PF1_OUT,
1778 PF0_IN, PF0_OUT }
1779 },
1780
1781 { PINMUX_CFG_REG("PGCR7", 0xfffe38c0, 16, 4) {
1782 0, 0, 0, 0, 0, 0, 0, 0,
1783 0, 0, 0, 0, 0, 0, 0, 0,
1784 0, 0, 0, 0, 0, 0, 0, 0,
1785 0, 0, 0, 0, 0, 0, 0, 0,
1786 0, 0, 0, 0, 0, 0, 0, 0,
1787 0, 0, 0, 0, 0, 0, 0, 0,
1788 PG0MD_000, PG0MD_001, PG0MD_010, PG0MD_011,
1789 PG0MD_100, 0, 0, 0,
1790 0, 0, 0, 0, 0, 0, 0, 0 }
1791 },
1792
1793 { PINMUX_CFG_REG("PGCR6", 0xfffe38c2, 16, 4) {
1794 0, 0, 0, 0, 0, 0, 0, 0,
1795 0, 0, 0, 0, 0, 0, 0, 0,
1796 0, 0, 0, 0, 0, 0, 0, 0,
1797 0, 0, 0, 0, 0, 0, 0, 0,
1798 0, 0, 0, 0, 0, 0, 0, 0,
1799 0, 0, 0, 0, 0, 0, 0, 0,
1800 PG24MD_00, PG24MD_01, PG24MD_10, PG24MD_11, 0, 0, 0, 0,
1801 0, 0, 0, 0, 0, 0, 0, 0 }
1802 },
1803
1804 { PINMUX_CFG_REG("PGCR5", 0xfffe38c4, 16, 4) {
1805 PG23MD_00, PG23MD_01, PG23MD_10, PG23MD_11, 0, 0, 0, 0,
1806 0, 0, 0, 0, 0, 0, 0, 0,
1807 PG22MD_00, PG22MD_01, PG22MD_10, PG22MD_11, 0, 0, 0, 0,
1808 0, 0, 0, 0, 0, 0, 0, 0,
1809 PG21MD_00, PG21MD_01, PG21MD_10, PG21MD_11, 0, 0, 0, 0,
1810 0, 0, 0, 0, 0, 0, 0, 0,
1811 PG20MD_000, PG20MD_001, PG20MD_010, PG20MD_011,
1812 PG20MD_100, 0, 0, 0,
1813 0, 0, 0, 0, 0, 0, 0, 0 }
1814 },
1815
1816 { PINMUX_CFG_REG("PGCR4", 0xfffe38c6, 16, 4) {
1817 PG19MD_000, PG19MD_001, PG19MD_010, PG19MD_011,
1818 PG19MD_100, 0, 0, 0,
1819 0, 0, 0, 0, 0, 0, 0, 0,
1820 PG18MD_000, PG18MD_001, PG18MD_010, PG18MD_011,
1821 PG18MD_100, 0, 0, 0,
1822 0, 0, 0, 0, 0, 0, 0, 0,
1823 PG17MD_000, PG17MD_001, PG17MD_010, PG17MD_011,
1824 PG17MD_100, 0, 0, 0,
1825 0, 0, 0, 0, 0, 0, 0, 0,
1826 PG16MD_000, PG16MD_001, PG16MD_010, PG16MD_011,
1827 PG16MD_100, 0, 0, 0,
1828 0, 0, 0, 0, 0, 0, 0, 0 }
1829 },
1830
1831 { PINMUX_CFG_REG("PGCR3", 0xfffe38c8, 16, 4) {
1832 PG15MD_000, PG15MD_001, PG15MD_010, PG15MD_011,
1833 PG15MD_100, 0, 0, 0,
1834 0, 0, 0, 0, 0, 0, 0, 0,
1835 PG14MD_000, PG14MD_001, PG14MD_010, 0,
1836 PG14MD_100, 0, 0, 0,
1837 0, 0, 0, 0, 0, 0, 0, 0,
1838 PG13MD_000, PG13MD_001, PG13MD_010, 0,
1839 PG13MD_100, 0, 0, 0,
1840 0, 0, 0, 0, 0, 0, 0, 0,
1841 PG12MD_000, PG12MD_001, PG12MD_010, 0,
1842 PG12MD_100, 0, 0, 0,
1843 0, 0, 0, 0, 0, 0, 0, 0 }
1844 },
1845 { PINMUX_CFG_REG("PGCR2", 0xfffe38ca, 16, 4) {
1846 PG11MD_000, PG11MD_001, PG11MD_010, PG11MD_011,
1847 PG11MD_100, PG11MD_101, 0, 0,
1848 0, 0, 0, 0, 0, 0, 0, 0,
1849 PG10MD_000, PG10MD_001, PG10MD_010, PG10MD_011,
1850 PG10MD_100, PG10MD_101, 0, 0,
1851 0, 0, 0, 0, 0, 0, 0, 0,
1852 PG9MD_000, PG9MD_001, PG9MD_010, PG9MD_011,
1853 PG9MD_100, PG9MD_101, 0, 0,
1854 0, 0, 0, 0, 0, 0, 0, 0,
1855 PG8MD_000, PG8MD_001, PG8MD_010, PG8MD_011,
1856 PG8MD_100, PG8MD_101, 0, 0,
1857 0, 0, 0, 0, 0, 0, 0, 0 }
1858 },
1859
1860 { PINMUX_CFG_REG("PGCR1", 0xfffe38cc, 16, 4) {
1861 PG7MD_00, PG7MD_01, PG7MD_10, PG7MD_11, 0, 0, 0, 0,
1862 0, 0, 0, 0, 0, 0, 0, 0,
1863 PG6MD_00, PG6MD_01, PG6MD_10, PG6MD_11, 0, 0, 0, 0,
1864 0, 0, 0, 0, 0, 0, 0, 0,
1865 PG5MD_00, PG5MD_01, PG5MD_10, PG5MD_11, 0, 0, 0, 0,
1866 0, 0, 0, 0, 0, 0, 0, 0,
1867 PG4MD_00, PG4MD_01, PG4MD_10, PG4MD_11, 0, 0, 0, 0,
1868 0, 0, 0, 0, 0, 0, 0, 0 }
1869 },
1870 { PINMUX_CFG_REG("PGCR0", 0xfffe38ce, 16, 4) {
1871 PG3MD_00, PG3MD_01, PG3MD_10, PG3MD_11, 0, 0, 0, 0,
1872 0, 0, 0, 0, 0, 0, 0, 0,
1873 PG2MD_00, PG2MD_01, PG2MD_10, PG2MD_11, 0, 0, 0, 0,
1874 0, 0, 0, 0, 0, 0, 0, 0,
1875 PG1MD_00, PG1MD_01, PG1MD_10, PG1MD_11, 0, 0, 0, 0,
1876 0, 0, 0, 0, 0, 0, 0, 0,
1877 0, 0, 0, 0, 0, 0, 0, 0,
1878 0, 0, 0, 0, 0, 0, 0, 0 }
1879 },
1880 { PINMUX_CFG_REG("PGIOR1", 0xfffe38d0, 16, 1) {
1881 0, 0, 0, 0, 0, 0, 0, 0,
1882 0, 0, 0, 0, 0, 0,
1883 PG24_IN, PG24_OUT,
1884 PG23_IN, PG23_OUT,
1885 PG22_IN, PG22_OUT,
1886 PG21_IN, PG21_OUT,
1887 PG20_IN, PG20_OUT,
1888 PG19_IN, PG19_OUT,
1889 PG18_IN, PG18_OUT,
1890 PG17_IN, PG17_OUT,
1891 PG16_IN, PG16_OUT }
1892 },
1893
1894 { PINMUX_CFG_REG("PGIOR0", 0xfffe38d2, 16, 1) {
1895 PG15_IN, PG15_OUT,
1896 PG14_IN, PG14_OUT,
1897 PG13_IN, PG13_OUT,
1898 PG12_IN, PG12_OUT,
1899 PG11_IN, PG11_OUT,
1900 PG10_IN, PG10_OUT,
1901 PG9_IN, PG9_OUT,
1902 PG8_IN, PG8_OUT,
1903 PG7_IN, PG7_OUT,
1904 PG6_IN, PG6_OUT,
1905 PG5_IN, PG5_OUT,
1906 PG4_IN, PG4_OUT,
1907 PG3_IN, PG3_OUT,
1908 PG2_IN, PG2_OUT,
1909 PG1_IN, PG1_OUT,
1910 PG0_IN, PG0_OUT
1911 }
1912 },
1913
1914 { PINMUX_CFG_REG("PHCR1", 0xfffe38ec, 16, 4) {
1915 PH7MD_0, PH7MD_1, 0, 0, 0, 0, 0, 0,
1916 0, 0, 0, 0, 0, 0, 0, 0,
1917 PH6MD_0, PH6MD_1, 0, 0, 0, 0, 0, 0,
1918 0, 0, 0, 0, 0, 0, 0, 0,
1919 PH5MD_0, PH5MD_1, 0, 0, 0, 0, 0, 0,
1920 0, 0, 0, 0, 0, 0, 0, 0,
1921 PH4MD_0, PH4MD_1, 0, 0, 0, 0, 0, 0,
1922 0, 0, 0, 0, 0, 0, 0, 0 }
1923 },
1924
1925 { PINMUX_CFG_REG("PHCR0", 0xfffe38ee, 16, 4) {
1926 PH3MD_0, PH3MD_1, 0, 0, 0, 0, 0, 0,
1927 0, 0, 0, 0, 0, 0, 0, 0,
1928 PH2MD_0, PH2MD_1, 0, 0, 0, 0, 0, 0,
1929 0, 0, 0, 0, 0, 0, 0, 0,
1930 PH1MD_0, PH1MD_1, 0, 0, 0, 0, 0, 0,
1931 0, 0, 0, 0, 0, 0, 0, 0,
1932 PH0MD_0, PH0MD_1, 0, 0, 0, 0, 0, 0,
1933 0, 0, 0, 0, 0, 0, 0, 0 }
1934 },
1935
1936 { PINMUX_CFG_REG("PJCR2", 0xfffe390a, 16, 4) {
1937 PJ11MD_00, PJ11MD_01, PJ11MD_10, 0, 0, 0, 0, 0,
1938 0, 0, 0, 0, 0, 0, 0, 0,
1939 PJ10MD_00, PJ10MD_01, PJ10MD_10, 0, 0, 0, 0, 0,
1940 0, 0, 0, 0, 0, 0, 0, 0,
1941 PJ9MD_00, PJ9MD_01, PJ9MD_10, 0, 0, 0, 0, 0,
1942 0, 0, 0, 0, 0, 0, 0, 0,
1943 PJ8MD_00, PJ8MD_01, PJ8MD_10, 0, 0, 0, 0, 0,
1944 0, 0, 0, 0, 0, 0, 0, 0 }
1945 },
1946 { PINMUX_CFG_REG("PJCR1", 0xfffe390c, 16, 4) {
1947 PJ7MD_00, PJ7MD_01, PJ7MD_10, 0, 0, 0, 0, 0,
1948 0, 0, 0, 0, 0, 0, 0, 0,
1949 PJ6MD_00, PJ6MD_01, PJ6MD_10, 0, 0, 0, 0, 0,
1950 0, 0, 0, 0, 0, 0, 0, 0,
1951 PJ5MD_00, PJ5MD_01, PJ5MD_10, 0, 0, 0, 0, 0,
1952 0, 0, 0, 0, 0, 0, 0, 0,
1953 PJ4MD_00, PJ4MD_01, PJ4MD_10, 0, 0, 0, 0, 0,
1954 0, 0, 0, 0, 0, 0, 0, 0 }
1955 },
1956 { PINMUX_CFG_REG("PJCR0", 0xfffe390e, 16, 4) {
1957 PJ3MD_00, PJ3MD_01, PJ3MD_10, PJ3MD_11, 0, 0, 0, 0,
1958 0, 0, 0, 0, 0, 0, 0, 0,
1959 PJ2MD_000, PJ2MD_001, PJ2MD_010, PJ2MD_011,
1960 PJ2MD_100, PJ2MD_101, 0, 0,
1961 0, 0, 0, 0, 0, 0, 0, 0,
1962 PJ1MD_000, PJ1MD_001, PJ1MD_010, PJ1MD_011,
1963 PJ1MD_100, 0, 0, 0,
1964 0, 0, 0, 0, 0, 0, 0, 0,
1965 PJ0MD_000, PJ0MD_001, PJ0MD_010, PJ0MD_011,
1966 PJ0MD_100, PJ0MD_101, 0, 0,
1967 0, 0, 0, 0, 0, 0, 0, 0, }
1968 },
1969 { PINMUX_CFG_REG("PJIOR0", 0xfffe3912, 16, 1) {
1970 0, 0, 0, 0, 0, 0, 0, 0,
1971 PJ11_IN, PJ11_OUT,
1972 PJ10_IN, PJ10_OUT,
1973 PJ9_IN, PJ9_OUT,
1974 PJ8_IN, PJ8_OUT,
1975 PJ7_IN, PJ7_OUT,
1976 PJ6_IN, PJ6_OUT,
1977 PJ5_IN, PJ5_OUT,
1978 PJ4_IN, PJ4_OUT,
1979 PJ3_IN, PJ3_OUT,
1980 PJ2_IN, PJ2_OUT,
1981 PJ1_IN, PJ1_OUT,
1982 PJ0_IN, PJ0_OUT }
1983 },
1984
1985 { PINMUX_CFG_REG("PKCR2", 0xfffe392a, 16, 4) {
1986 PK11MD_00, PK11MD_01, PK11MD_10, 0, 0, 0, 0, 0,
1987 0, 0, 0, 0, 0, 0, 0, 0,
1988 PK10MD_00, PK10MD_01, PK10MD_10, 0, 0, 0, 0, 0,
1989 0, 0, 0, 0, 0, 0, 0, 0,
1990 PK9MD_00, PK9MD_01, PK9MD_10, 0, 0, 0, 0, 0,
1991 0, 0, 0, 0, 0, 0, 0, 0,
1992 PK8MD_00, PK8MD_01, PK8MD_10, 0, 0, 0, 0, 0,
1993 0, 0, 0, 0, 0, 0, 0, 0 }
1994 },
1995
1996 { PINMUX_CFG_REG("PKCR1", 0xfffe392c, 16, 4) {
1997 PK7MD_00, PK7MD_01, PK7MD_10, 0, 0, 0, 0, 0,
1998 0, 0, 0, 0, 0, 0, 0, 0,
1999 PK6MD_00, PK6MD_01, PK6MD_10, 0, 0, 0, 0, 0,
2000 0, 0, 0, 0, 0, 0, 0, 0,
2001 PK5MD_00, PK5MD_01, PK5MD_10, 0, 0, 0, 0, 0,
2002 0, 0, 0, 0, 0, 0, 0, 0,
2003 PK4MD_00, PK4MD_01, PK4MD_10, 0, 0, 0, 0, 0,
2004 0, 0, 0, 0, 0, 0, 0, 0 }
2005 },
2006 { PINMUX_CFG_REG("PKCR0", 0xfffe392e, 16, 4) {
2007 PK3MD_00, PK3MD_01, PK3MD_10, 0, 0, 0, 0, 0,
2008 0, 0, 0, 0, 0, 0, 0, 0,
2009 PK2MD_00, PK2MD_01, PK2MD_10, 0, 0, 0, 0, 0,
2010 0, 0, 0, 0, 0, 0, 0, 0,
2011 PK1MD_00, PK1MD_01, PK1MD_10, 0, 0, 0, 0, 0,
2012 0, 0, 0, 0, 0, 0, 0, 0,
2013 PK0MD_00, PK0MD_01, PK0MD_10, 0, 0, 0, 0, 0,
2014 0, 0, 0, 0, 0, 0, 0, 0 }
2015 },
2016
2017 { PINMUX_CFG_REG("PKIOR0", 0xfffe3932, 16, 1) {
2018 0, 0, 0, 0, 0, 0, 0, 0,
2019 PJ11_IN, PJ11_OUT,
2020 PJ10_IN, PJ10_OUT,
2021 PJ9_IN, PJ9_OUT,
2022 PJ8_IN, PJ8_OUT,
2023 PJ7_IN, PJ7_OUT,
2024 PJ6_IN, PJ6_OUT,
2025 PJ5_IN, PJ5_OUT,
2026 PJ4_IN, PJ4_OUT,
2027 PJ3_IN, PJ3_OUT,
2028 PJ2_IN, PJ2_OUT,
2029 PJ1_IN, PJ1_OUT,
2030 PJ0_IN, PJ0_OUT }
2031 },
2032 {}
2033};
2034
2035static struct pinmux_data_reg pinmux_data_regs[] = {
2036 { PINMUX_DATA_REG("PADR1", 0xfffe3814, 16) {
2037 0, 0, 0, 0, 0, 0, 0, PA3_DATA,
2038 0, 0, 0, 0, 0, 0, 0, PA2_DATA }
2039 },
2040
2041 { PINMUX_DATA_REG("PADR0", 0xfffe3816, 16) {
2042 0, 0, 0, 0, 0, 0, 0, PA1_DATA,
2043 0, 0, 0, 0, 0, 0, 0, PA0_DATA }
2044 },
2045
2046 { PINMUX_DATA_REG("PBDR1", 0xfffe3834, 16) {
2047 0, 0, 0, 0, 0, 0, 0, 0,
2048 0, PB22_DATA, PB21_DATA, PB20_DATA,
2049 PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA }
2050 },
2051
2052 { PINMUX_DATA_REG("PBDR0", 0xfffe3836, 16) {
2053 PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA,
2054 PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
2055 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
2056 PB3_DATA, PB2_DATA, PB1_DATA, 0 }
2057 },
2058
2059 { PINMUX_DATA_REG("PCDR0", 0xfffe3856, 16) {
2060 0, 0, 0, 0,
2061 0, PC10_DATA, PC9_DATA, PC8_DATA,
2062 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
2063 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
2064 },
2065
2066 { PINMUX_DATA_REG("PDDR0", 0xfffe3876, 16) {
2067 PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
2068 PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
2069 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
2070 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
2071 },
2072
2073 { PINMUX_DATA_REG("PEDR0", 0xfffe3896, 16) {
2074 0, 0, 0, 0, 0, 0, 0, 0,
2075 0, 0, PE5_DATA, PE4_DATA,
2076 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }
2077 },
2078
2079 { PINMUX_DATA_REG("PFDR0", 0xfffe38b6, 16) {
2080 0, 0, 0, PF12_DATA,
2081 PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
2082 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
2083 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
2084 },
2085
2086 { PINMUX_DATA_REG("PGDR1", 0xfffe38d4, 16) {
2087 0, 0, 0, 0, 0, 0, 0, PG24_DATA,
2088 PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA,
2089 PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA }
2090 },
2091
2092 { PINMUX_DATA_REG("PGDR0", 0xfffe38d6, 16) {
2093 PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA,
2094 PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA,
2095 PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
2096 PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA }
2097 },
2098 { PINMUX_DATA_REG("PJDR0", 0xfffe3916, 16) {
2099 0, 0, 0, PJ12_DATA,
2100 PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA,
2101 PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
2102 PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA }
2103 },
2104 { PINMUX_DATA_REG("PKDR0", 0xfffe3936, 16) {
2105 0, 0, 0, PK12_DATA,
2106 PK11_DATA, PK10_DATA, PK9_DATA, PK8_DATA,
2107 PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,
2108 PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA }
2109 },
2110 { }
2111};
2112
2113struct sh_pfc_soc_info sh7264_pinmux_info = {
2114 .name = "sh7264_pfc",
2115 .reserved_id = PINMUX_RESERVED,
2116 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
2117 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN },
2118 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },
2119 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
2120 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
2121
2122 .first_gpio = GPIO_PA3,
2123 .last_gpio = GPIO_FN_LCD_M_DISP,
2124
2125 .gpios = pinmux_gpios,
2126 .cfg_regs = pinmux_config_regs,
2127 .data_regs = pinmux_data_regs,
2128
2129 .gpio_data = pinmux_data,
2130 .gpio_data_size = ARRAY_SIZE(pinmux_data),
2131};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7269.c b/drivers/pinctrl/sh-pfc/pfc-sh7269.c
new file mode 100644
index 000000000000..b1b5d6d4ad76
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7269.c
@@ -0,0 +1,2834 @@
1/*
2 * SH7269 Pinmux
3 *
4 * Copyright (C) 2012 Renesas Electronics Europe Ltd
5 * Copyright (C) 2012 Phil Edworthy
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11
12#include <linux/kernel.h>
13#include <linux/gpio.h>
14#include <cpu/sh7269.h>
15
16#include "sh_pfc.h"
17
18enum {
19 PINMUX_RESERVED = 0,
20
21 PINMUX_DATA_BEGIN,
22 /* Port A */
23 PA1_DATA, PA0_DATA,
24 /* Port B */
25 PB22_DATA, PB21_DATA, PB20_DATA,
26 PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA,
27 PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA,
28 PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
29 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
30 PB3_DATA, PB2_DATA, PB1_DATA,
31 /* Port C */
32 PC8_DATA,
33 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
34 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
35 /* Port D */
36 PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
37 PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
38 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
39 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
40 /* Port E */
41 PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
42 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
43 /* Port F */
44 PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
45 PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA,
46 PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
47 PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
48 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
49 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
50 /* Port G */
51 PG27_DATA, PG26_DATA, PG25_DATA, PG24_DATA,
52 PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA,
53 PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA,
54 PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA,
55 PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA,
56 PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
57 PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
58 /* Port H */
59 /* NOTE - Port H does not have a Data Register, but PH Data is
60 connected to PH Port Register */
61 PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
62 PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
63 /* Port I - not on device */
64 /* Port J */
65 PJ31_DATA, PJ30_DATA, PJ29_DATA, PJ28_DATA,
66 PJ27_DATA, PJ26_DATA, PJ25_DATA, PJ24_DATA,
67 PJ23_DATA, PJ22_DATA, PJ21_DATA, PJ20_DATA,
68 PJ19_DATA, PJ18_DATA, PJ17_DATA, PJ16_DATA,
69 PJ15_DATA, PJ14_DATA, PJ13_DATA, PJ12_DATA,
70 PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA,
71 PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
72 PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA,
73 PINMUX_DATA_END,
74
75 PINMUX_INPUT_BEGIN,
76 FORCE_IN,
77 /* Port A */
78 PA1_IN, PA0_IN,
79 /* Port B */
80 PB22_IN, PB21_IN, PB20_IN,
81 PB19_IN, PB18_IN, PB17_IN, PB16_IN,
82 PB15_IN, PB14_IN, PB13_IN, PB12_IN,
83 PB11_IN, PB10_IN, PB9_IN, PB8_IN,
84 PB7_IN, PB6_IN, PB5_IN, PB4_IN,
85 PB3_IN, PB2_IN, PB1_IN,
86 /* Port C */
87 PC8_IN,
88 PC7_IN, PC6_IN, PC5_IN, PC4_IN,
89 PC3_IN, PC2_IN, PC1_IN, PC0_IN,
90 /* Port D */
91 PD15_IN, PD14_IN, PD13_IN, PD12_IN,
92 PD11_IN, PD10_IN, PD9_IN, PD8_IN,
93 PD7_IN, PD6_IN, PD5_IN, PD4_IN,
94 PD3_IN, PD2_IN, PD1_IN, PD0_IN,
95 /* Port E */
96 PE7_IN, PE6_IN, PE5_IN, PE4_IN,
97 PE3_IN, PE2_IN, PE1_IN, PE0_IN,
98 /* Port F */
99 PF23_IN, PF22_IN, PF21_IN, PF20_IN,
100 PF19_IN, PF18_IN, PF17_IN, PF16_IN,
101 PF15_IN, PF14_IN, PF13_IN, PF12_IN,
102 PF11_IN, PF10_IN, PF9_IN, PF8_IN,
103 PF7_IN, PF6_IN, PF5_IN, PF4_IN,
104 PF3_IN, PF2_IN, PF1_IN, PF0_IN,
105 /* Port G */
106 PG27_IN, PG26_IN, PG25_IN, PG24_IN,
107 PG23_IN, PG22_IN, PG21_IN, PG20_IN,
108 PG19_IN, PG18_IN, PG17_IN, PG16_IN,
109 PG15_IN, PG14_IN, PG13_IN, PG12_IN,
110 PG11_IN, PG10_IN, PG9_IN, PG8_IN,
111 PG7_IN, PG6_IN, PG5_IN, PG4_IN,
112 PG3_IN, PG2_IN, PG1_IN, PG0_IN,
113 /* Port H - Port H does not have a Data Register */
114 /* Port I - not on device */
115 /* Port J */
116 PJ31_IN, PJ30_IN, PJ29_IN, PJ28_IN,
117 PJ27_IN, PJ26_IN, PJ25_IN, PJ24_IN,
118 PJ23_IN, PJ22_IN, PJ21_IN, PJ20_IN,
119 PJ19_IN, PJ18_IN, PJ17_IN, PJ16_IN,
120 PJ15_IN, PJ14_IN, PJ13_IN, PJ12_IN,
121 PJ11_IN, PJ10_IN, PJ9_IN, PJ8_IN,
122 PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN,
123 PJ3_IN, PJ2_IN, PJ1_IN, PJ0_IN,
124 PINMUX_INPUT_END,
125
126 PINMUX_OUTPUT_BEGIN,
127 FORCE_OUT,
128 /* Port A */
129 PA1_OUT, PA0_OUT,
130 /* Port B */
131 PB22_OUT, PB21_OUT, PB20_OUT,
132 PB19_OUT, PB18_OUT, PB17_OUT, PB16_OUT,
133 PB15_OUT, PB14_OUT, PB13_OUT, PB12_OUT,
134 PB11_OUT, PB10_OUT, PB9_OUT, PB8_OUT,
135 PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
136 PB3_OUT, PB2_OUT, PB1_OUT,
137 /* Port C */
138 PC8_OUT,
139 PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
140 PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
141 /* Port D */
142 PD15_OUT, PD14_OUT, PD13_OUT, PD12_OUT,
143 PD11_OUT, PD10_OUT, PD9_OUT, PD8_OUT,
144 PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
145 PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
146 /* Port E */
147 PE7_OUT, PE6_OUT, PE5_OUT, PE4_OUT,
148 PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
149 /* Port F */
150 PF23_OUT, PF22_OUT, PF21_OUT, PF20_OUT,
151 PF19_OUT, PF18_OUT, PF17_OUT, PF16_OUT,
152 PF15_OUT, PF14_OUT, PF13_OUT, PF12_OUT,
153 PF11_OUT, PF10_OUT, PF9_OUT, PF8_OUT,
154 PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
155 PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
156 /* Port G */
157 PG27_OUT, PG26_OUT, PG25_OUT, PG24_OUT,
158 PG23_OUT, PG22_OUT, PG21_OUT, PG20_OUT,
159 PG19_OUT, PG18_OUT, PG17_OUT, PG16_OUT,
160 PG15_OUT, PG14_OUT, PG13_OUT, PG12_OUT,
161 PG11_OUT, PG10_OUT, PG9_OUT, PG8_OUT,
162 PG7_OUT, PG6_OUT, PG5_OUT, PG4_OUT,
163 PG3_OUT, PG2_OUT, PG1_OUT, PG0_OUT,
164 /* Port H - Port H does not have a Data Register */
165 /* Port I - not on device */
166 /* Port J */
167 PJ31_OUT, PJ30_OUT, PJ29_OUT, PJ28_OUT,
168 PJ27_OUT, PJ26_OUT, PJ25_OUT, PJ24_OUT,
169 PJ23_OUT, PJ22_OUT, PJ21_OUT, PJ20_OUT,
170 PJ19_OUT, PJ18_OUT, PJ17_OUT, PJ16_OUT,
171 PJ15_OUT, PJ14_OUT, PJ13_OUT, PJ12_OUT,
172 PJ11_OUT, PJ10_OUT, PJ9_OUT, PJ8_OUT,
173 PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT,
174 PJ3_OUT, PJ2_OUT, PJ1_OUT, PJ0_OUT,
175 PINMUX_OUTPUT_END,
176
177 PINMUX_FUNCTION_BEGIN,
178 /* Port A */
179 PA1_IOR_IN, PA1_IOR_OUT,
180 PA0_IOR_IN, PA0_IOR_OUT,
181
182 /* Port B */
183 PB22_IOR_IN, PB22_IOR_OUT,
184 PB21_IOR_IN, PB21_IOR_OUT,
185 PB20_IOR_IN, PB20_IOR_OUT,
186 PB19_IOR_IN, PB19_IOR_OUT,
187 PB18_IOR_IN, PB18_IOR_OUT,
188 PB17_IOR_IN, PB17_IOR_OUT,
189 PB16_IOR_IN, PB16_IOR_OUT,
190
191 PB15_IOR_IN, PB15_IOR_OUT,
192 PB14_IOR_IN, PB14_IOR_OUT,
193 PB13_IOR_IN, PB13_IOR_OUT,
194 PB12_IOR_IN, PB12_IOR_OUT,
195 PB11_IOR_IN, PB11_IOR_OUT,
196 PB10_IOR_IN, PB10_IOR_OUT,
197 PB9_IOR_IN, PB9_IOR_OUT,
198 PB8_IOR_IN, PB8_IOR_OUT,
199
200 PB7_IOR_IN, PB7_IOR_OUT,
201 PB6_IOR_IN, PB6_IOR_OUT,
202 PB5_IOR_IN, PB5_IOR_OUT,
203 PB4_IOR_IN, PB4_IOR_OUT,
204 PB3_IOR_IN, PB3_IOR_OUT,
205 PB2_IOR_IN, PB2_IOR_OUT,
206 PB1_IOR_IN, PB1_IOR_OUT,
207 PB0_IOR_IN, PB0_IOR_OUT,
208
209 PB22MD_000, PB22MD_001, PB22MD_010, PB22MD_011,
210 PB22MD_100, PB22MD_101, PB22MD_110, PB22MD_111,
211 PB21MD_00, PB21MD_01, PB21MD_10, PB21MD_11,
212 PB20MD_000, PB20MD_001, PB20MD_010, PB20MD_011,
213 PB20MD_100, PB20MD_101, PB20MD_110, PB20MD_111,
214 PB19MD_000, PB19MD_001, PB19MD_010, PB19MD_011,
215 PB19MD_100, PB19MD_101, PB19MD_110, PB19MD_111,
216 PB18MD_000, PB18MD_001, PB18MD_010, PB18MD_011,
217 PB18MD_100, PB18MD_101, PB18MD_110, PB18MD_111,
218 PB17MD_000, PB17MD_001, PB17MD_010, PB17MD_011,
219 PB17MD_100, PB17MD_101, PB17MD_110, PB17MD_111,
220 PB16MD_000, PB16MD_001, PB16MD_010, PB16MD_011,
221 PB16MD_100, PB16MD_101, PB16MD_110, PB16MD_111,
222 PB15MD_000, PB15MD_001, PB15MD_010, PB15MD_011,
223 PB15MD_100, PB15MD_101, PB15MD_110, PB15MD_111,
224 PB14MD_000, PB14MD_001, PB14MD_010, PB14MD_011,
225 PB14MD_100, PB14MD_101, PB14MD_110, PB14MD_111,
226 PB13MD_000, PB13MD_001, PB13MD_010, PB13MD_011,
227 PB13MD_100, PB13MD_101, PB13MD_110, PB13MD_111,
228 PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11,
229
230 PB11MD_00, PB11MD_01, PB11MD_10, PB11MD_11,
231 PB10MD_00, PB10MD_01, PB10MD_10, PB10MD_11,
232 PB9MD_00, PB9MD_01, PB9MD_10, PB9MD_11,
233 PB8MD_00, PB8MD_01, PB8MD_10, PB8MD_11,
234
235 PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11,
236 PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11,
237 PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11,
238 PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11,
239
240 PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11,
241 PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11,
242 PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11,
243
244 /* Port C */
245 PC8_IOR_IN, PC8_IOR_OUT,
246 PC7_IOR_IN, PC7_IOR_OUT,
247 PC6_IOR_IN, PC6_IOR_OUT,
248 PC5_IOR_IN, PC5_IOR_OUT,
249 PC4_IOR_IN, PC4_IOR_OUT,
250 PC3_IOR_IN, PC3_IOR_OUT,
251 PC2_IOR_IN, PC2_IOR_OUT,
252 PC1_IOR_IN, PC1_IOR_OUT,
253 PC0_IOR_IN, PC0_IOR_OUT,
254
255 PC8MD_000, PC8MD_001, PC8MD_010, PC8MD_011,
256 PC8MD_100, PC8MD_101, PC8MD_110, PC8MD_111,
257 PC7MD_000, PC7MD_001, PC7MD_010, PC7MD_011,
258 PC7MD_100, PC7MD_101, PC7MD_110, PC7MD_111,
259 PC6MD_000, PC6MD_001, PC6MD_010, PC6MD_011,
260 PC6MD_100, PC6MD_101, PC6MD_110, PC6MD_111,
261 PC5MD_000, PC5MD_001, PC5MD_010, PC5MD_011,
262 PC5MD_100, PC5MD_101, PC5MD_110, PC5MD_111,
263 PC4MD_00, PC4MD_01, PC4MD_10, PC4MD_11,
264
265 PC3MD_00, PC3MD_01, PC3MD_10, PC3MD_11,
266 PC2MD_00, PC2MD_01, PC2MD_10, PC2MD_11,
267 PC1MD_0, PC1MD_1,
268 PC0MD_0, PC0MD_1,
269
270 /* Port D */
271 PD15_IOR_IN, PD15_IOR_OUT,
272 PD14_IOR_IN, PD14_IOR_OUT,
273 PD13_IOR_IN, PD13_IOR_OUT,
274 PD12_IOR_IN, PD12_IOR_OUT,
275 PD11_IOR_IN, PD11_IOR_OUT,
276 PD10_IOR_IN, PD10_IOR_OUT,
277 PD9_IOR_IN, PD9_IOR_OUT,
278 PD8_IOR_IN, PD8_IOR_OUT,
279 PD7_IOR_IN, PD7_IOR_OUT,
280 PD6_IOR_IN, PD6_IOR_OUT,
281 PD5_IOR_IN, PD5_IOR_OUT,
282 PD4_IOR_IN, PD4_IOR_OUT,
283 PD3_IOR_IN, PD3_IOR_OUT,
284 PD2_IOR_IN, PD2_IOR_OUT,
285 PD1_IOR_IN, PD1_IOR_OUT,
286 PD0_IOR_IN, PD0_IOR_OUT,
287
288 PD15MD_00, PD15MD_01, PD15MD_10, PD15MD_11,
289 PD14MD_00, PD14MD_01, PD14MD_10, PD14MD_11,
290 PD13MD_00, PD13MD_01, PD13MD_10, PD13MD_11,
291 PD12MD_00, PD12MD_01, PD12MD_10, PD12MD_11,
292
293 PD11MD_00, PD11MD_01, PD11MD_10, PD11MD_11,
294 PD10MD_00, PD10MD_01, PD10MD_10, PD10MD_11,
295 PD9MD_00, PD9MD_01, PD9MD_10, PD9MD_11,
296 PD8MD_00, PD8MD_01, PD8MD_10, PD8MD_11,
297
298 PD7MD_00, PD7MD_01, PD7MD_10, PD7MD_11,
299 PD6MD_00, PD6MD_01, PD6MD_10, PD6MD_11,
300 PD5MD_00, PD5MD_01, PD5MD_10, PD5MD_11,
301 PD4MD_00, PD4MD_01, PD4MD_10, PD4MD_11,
302
303 PD3MD_00, PD3MD_01, PD3MD_10, PD3MD_11,
304 PD2MD_00, PD2MD_01, PD2MD_10, PD2MD_11,
305 PD1MD_00, PD1MD_01, PD1MD_10, PD1MD_11,
306 PD0MD_00, PD0MD_01, PD0MD_10, PD0MD_11,
307
308 /* Port E */
309 PE7_IOR_IN, PE7_IOR_OUT,
310 PE6_IOR_IN, PE6_IOR_OUT,
311 PE5_IOR_IN, PE5_IOR_OUT,
312 PE4_IOR_IN, PE4_IOR_OUT,
313 PE3_IOR_IN, PE3_IOR_OUT,
314 PE2_IOR_IN, PE2_IOR_OUT,
315 PE1_IOR_IN, PE1_IOR_OUT,
316 PE0_IOR_IN, PE0_IOR_OUT,
317
318 PE7MD_00, PE7MD_01, PE7MD_10, PE7MD_11,
319 PE6MD_00, PE6MD_01, PE6MD_10, PE6MD_11,
320 PE5MD_00, PE5MD_01, PE5MD_10, PE5MD_11,
321 PE4MD_00, PE4MD_01, PE4MD_10, PE4MD_11,
322
323 PE3MD_000, PE3MD_001, PE3MD_010, PE3MD_011,
324 PE3MD_100, PE3MD_101, PE3MD_110, PE3MD_111,
325 PE2MD_000, PE2MD_001, PE2MD_010, PE2MD_011,
326 PE2MD_100, PE2MD_101, PE2MD_110, PE2MD_111,
327 PE1MD_000, PE1MD_001, PE1MD_010, PE1MD_011,
328 PE1MD_100, PE1MD_101, PE1MD_110, PE1MD_111,
329 PE0MD_00, PE0MD_01, PE0MD_10, PE0MD_11,
330
331 /* Port F */
332 PF23_IOR_IN, PF23_IOR_OUT,
333 PF22_IOR_IN, PF22_IOR_OUT,
334 PF21_IOR_IN, PF21_IOR_OUT,
335 PF20_IOR_IN, PF20_IOR_OUT,
336 PF19_IOR_IN, PF19_IOR_OUT,
337 PF18_IOR_IN, PF18_IOR_OUT,
338 PF17_IOR_IN, PF17_IOR_OUT,
339 PF16_IOR_IN, PF16_IOR_OUT,
340 PF15_IOR_IN, PF15_IOR_OUT,
341 PF14_IOR_IN, PF14_IOR_OUT,
342 PF13_IOR_IN, PF13_IOR_OUT,
343 PF12_IOR_IN, PF12_IOR_OUT,
344 PF11_IOR_IN, PF11_IOR_OUT,
345 PF10_IOR_IN, PF10_IOR_OUT,
346 PF9_IOR_IN, PF9_IOR_OUT,
347 PF8_IOR_IN, PF8_IOR_OUT,
348 PF7_IOR_IN, PF7_IOR_OUT,
349 PF6_IOR_IN, PF6_IOR_OUT,
350 PF5_IOR_IN, PF5_IOR_OUT,
351 PF4_IOR_IN, PF4_IOR_OUT,
352 PF3_IOR_IN, PF3_IOR_OUT,
353 PF2_IOR_IN, PF2_IOR_OUT,
354 PF1_IOR_IN, PF1_IOR_OUT,
355 PF0_IOR_IN, PF0_IOR_OUT,
356
357 PF23MD_000, PF23MD_001, PF23MD_010, PF23MD_011,
358 PF23MD_100, PF23MD_101, PF23MD_110, PF23MD_111,
359 PF22MD_000, PF22MD_001, PF22MD_010, PF22MD_011,
360 PF22MD_100, PF22MD_101, PF22MD_110, PF22MD_111,
361 PF21MD_000, PF21MD_001, PF21MD_010, PF21MD_011,
362 PF21MD_100, PF21MD_101, PF21MD_110, PF21MD_111,
363 PF20MD_000, PF20MD_001, PF20MD_010, PF20MD_011,
364 PF20MD_100, PF20MD_101, PF20MD_110, PF20MD_111,
365
366 PF19MD_000, PF19MD_001, PF19MD_010, PF19MD_011,
367 PF19MD_100, PF19MD_101, PF19MD_110, PF19MD_111,
368 PF18MD_000, PF18MD_001, PF18MD_010, PF18MD_011,
369 PF18MD_100, PF18MD_101, PF18MD_110, PF18MD_111,
370 PF17MD_000, PF17MD_001, PF17MD_010, PF17MD_011,
371 PF17MD_100, PF17MD_101, PF17MD_110, PF17MD_111,
372 PF16MD_000, PF16MD_001, PF16MD_010, PF16MD_011,
373 PF16MD_100, PF16MD_101, PF16MD_110, PF16MD_111,
374
375 PF15MD_000, PF15MD_001, PF15MD_010, PF15MD_011,
376 PF15MD_100, PF15MD_101, PF15MD_110, PF15MD_111,
377 PF14MD_000, PF14MD_001, PF14MD_010, PF14MD_011,
378 PF14MD_100, PF14MD_101, PF14MD_110, PF14MD_111,
379 PF13MD_000, PF13MD_001, PF13MD_010, PF13MD_011,
380 PF13MD_100, PF13MD_101, PF13MD_110, PF13MD_111,
381 PF12MD_000, PF12MD_001, PF12MD_010, PF12MD_011,
382 PF12MD_100, PF12MD_101, PF12MD_110, PF12MD_111,
383
384 PF11MD_000, PF11MD_001, PF11MD_010, PF11MD_011,
385 PF11MD_100, PF11MD_101, PF11MD_110, PF11MD_111,
386 PF10MD_000, PF10MD_001, PF10MD_010, PF10MD_011,
387 PF10MD_100, PF10MD_101, PF10MD_110, PF10MD_111,
388 PF9MD_000, PF9MD_001, PF9MD_010, PF9MD_011,
389 PF9MD_100, PF9MD_101, PF9MD_110, PF9MD_111,
390 PF8MD_000, PF8MD_001, PF8MD_010, PF8MD_011,
391 PF8MD_100, PF8MD_101, PF8MD_110, PF8MD_111,
392
393 PF7MD_000, PF7MD_001, PF7MD_010, PF7MD_011,
394 PF7MD_100, PF7MD_101, PF7MD_110, PF7MD_111,
395 PF6MD_000, PF6MD_001, PF6MD_010, PF6MD_011,
396 PF6MD_100, PF6MD_101, PF6MD_110, PF6MD_111,
397 PF5MD_000, PF5MD_001, PF5MD_010, PF5MD_011,
398 PF5MD_100, PF5MD_101, PF5MD_110, PF5MD_111,
399 PF4MD_000, PF4MD_001, PF4MD_010, PF4MD_011,
400 PF4MD_100, PF4MD_101, PF4MD_110, PF4MD_111,
401
402 PF3MD_000, PF3MD_001, PF3MD_010, PF3MD_011,
403 PF3MD_100, PF3MD_101, PF3MD_110, PF3MD_111,
404 PF2MD_000, PF2MD_001, PF2MD_010, PF2MD_011,
405 PF2MD_100, PF2MD_101, PF2MD_110, PF2MD_111,
406 PF1MD_000, PF1MD_001, PF1MD_010, PF1MD_011,
407 PF1MD_100, PF1MD_101, PF1MD_110, PF1MD_111,
408 PF0MD_000, PF0MD_001, PF0MD_010, PF0MD_011,
409 PF0MD_100, PF0MD_101, PF0MD_110, PF0MD_111,
410
411 /* Port G */
412 PG27_IOR_IN, PG27_IOR_OUT,
413 PG26_IOR_IN, PG26_IOR_OUT,
414 PG25_IOR_IN, PG25_IOR_OUT,
415 PG24_IOR_IN, PG24_IOR_OUT,
416 PG23_IOR_IN, PG23_IOR_OUT,
417 PG22_IOR_IN, PG22_IOR_OUT,
418 PG21_IOR_IN, PG21_IOR_OUT,
419 PG20_IOR_IN, PG20_IOR_OUT,
420 PG19_IOR_IN, PG19_IOR_OUT,
421 PG18_IOR_IN, PG18_IOR_OUT,
422 PG17_IOR_IN, PG17_IOR_OUT,
423 PG16_IOR_IN, PG16_IOR_OUT,
424 PG15_IOR_IN, PG15_IOR_OUT,
425 PG14_IOR_IN, PG14_IOR_OUT,
426 PG13_IOR_IN, PG13_IOR_OUT,
427 PG12_IOR_IN, PG12_IOR_OUT,
428 PG11_IOR_IN, PG11_IOR_OUT,
429 PG10_IOR_IN, PG10_IOR_OUT,
430 PG9_IOR_IN, PG9_IOR_OUT,
431 PG8_IOR_IN, PG8_IOR_OUT,
432 PG7_IOR_IN, PG7_IOR_OUT,
433 PG6_IOR_IN, PG6_IOR_OUT,
434 PG5_IOR_IN, PG5_IOR_OUT,
435 PG4_IOR_IN, PG4_IOR_OUT,
436 PG3_IOR_IN, PG3_IOR_OUT,
437 PG2_IOR_IN, PG2_IOR_OUT,
438 PG1_IOR_IN, PG1_IOR_OUT,
439 PG0_IOR_IN, PG0_IOR_OUT,
440
441 PG27MD_00, PG27MD_01, PG27MD_10, PG27MD_11,
442 PG26MD_00, PG26MD_01, PG26MD_10, PG26MD_11,
443 PG25MD_00, PG25MD_01, PG25MD_10, PG25MD_11,
444 PG24MD_00, PG24MD_01, PG24MD_10, PG24MD_11,
445
446 PG23MD_000, PG23MD_001, PG23MD_010, PG23MD_011,
447 PG23MD_100, PG23MD_101, PG23MD_110, PG23MD_111,
448 PG22MD_000, PG22MD_001, PG22MD_010, PG22MD_011,
449 PG22MD_100, PG22MD_101, PG22MD_110, PG22MD_111,
450 PG21MD_000, PG21MD_001, PG21MD_010, PG21MD_011,
451 PG21MD_100, PG21MD_101, PG21MD_110, PG21MD_111,
452 PG20MD_000, PG20MD_001, PG20MD_010, PG20MD_011,
453 PG20MD_100, PG20MD_101, PG20MD_110, PG20MD_111,
454
455 PG19MD_000, PG19MD_001, PG19MD_010, PG19MD_011,
456 PG19MD_100, PG19MD_101, PG19MD_110, PG19MD_111,
457 PG18MD_000, PG18MD_001, PG18MD_010, PG18MD_011,
458 PG18MD_100, PG18MD_101, PG18MD_110, PG18MD_111,
459 PG17MD_00, PG17MD_01, PG17MD_10, PG17MD_11,
460 PG16MD_00, PG16MD_01, PG16MD_10, PG16MD_11,
461
462 PG15MD_00, PG15MD_01, PG15MD_10, PG15MD_11,
463 PG14MD_00, PG14MD_01, PG14MD_10, PG14MD_11,
464 PG13MD_00, PG13MD_01, PG13MD_10, PG13MD_11,
465 PG12MD_00, PG12MD_01, PG12MD_10, PG12MD_11,
466
467 PG11MD_000, PG11MD_001, PG11MD_010, PG11MD_011,
468 PG11MD_100, PG11MD_101, PG11MD_110, PG11MD_111,
469 PG10MD_000, PG10MD_001, PG10MD_010, PG10MD_011,
470 PG10MD_100, PG10MD_101, PG10MD_110, PG10MD_111,
471 PG9MD_000, PG9MD_001, PG9MD_010, PG9MD_011,
472 PG9MD_100, PG9MD_101, PG9MD_110, PG9MD_111,
473 PG8MD_000, PG8MD_001, PG8MD_010, PG8MD_011,
474 PG8MD_100, PG8MD_101, PG8MD_110, PG8MD_111,
475
476 PG7MD_000, PG7MD_001, PG7MD_010, PG7MD_011,
477 PG7MD_100, PG7MD_101, PG7MD_110, PG7MD_111,
478 PG6MD_000, PG6MD_001, PG6MD_010, PG6MD_011,
479 PG6MD_100, PG6MD_101, PG6MD_110, PG6MD_111,
480 PG5MD_000, PG5MD_001, PG5MD_010, PG5MD_011,
481 PG5MD_100, PG5MD_101, PG5MD_110, PG5MD_111,
482 PG4MD_000, PG4MD_001, PG4MD_010, PG4MD_011,
483 PG4MD_100, PG4MD_101, PG4MD_110, PG4MD_111,
484
485 PG3MD_000, PG3MD_001, PG3MD_010, PG3MD_011,
486 PG3MD_100, PG3MD_101, PG3MD_110, PG3MD_111,
487 PG2MD_000, PG2MD_001, PG2MD_010, PG2MD_011,
488 PG2MD_100, PG2MD_101, PG2MD_110, PG2MD_111,
489 PG1MD_000, PG1MD_001, PG1MD_010, PG1MD_011,
490 PG1MD_100, PG1MD_101, PG1MD_110, PG1MD_111,
491 PG0MD_000, PG0MD_001, PG0MD_010, PG0MD_011,
492 PG0MD_100, PG0MD_101, PG0MD_110, PG0MD_111,
493
494 /* Port H */
495 PH7MD_00, PH7MD_01, PH7MD_10, PH7MD_11,
496 PH6MD_00, PH6MD_01, PH6MD_10, PH6MD_11,
497 PH5MD_00, PH5MD_01, PH5MD_10, PH5MD_11,
498 PH4MD_00, PH4MD_01, PH4MD_10, PH4MD_11,
499
500 PH3MD_00, PH3MD_01, PH3MD_10, PH3MD_11,
501 PH2MD_00, PH2MD_01, PH2MD_10, PH2MD_11,
502 PH1MD_00, PH1MD_01, PH1MD_10, PH1MD_11,
503 PH0MD_00, PH0MD_01, PH0MD_10, PH0MD_11,
504
505 /* Port I - not on device */
506
507 /* Port J */
508 PJ31_IOR_IN, PJ31_IOR_OUT,
509 PJ30_IOR_IN, PJ30_IOR_OUT,
510 PJ29_IOR_IN, PJ29_IOR_OUT,
511 PJ28_IOR_IN, PJ28_IOR_OUT,
512 PJ27_IOR_IN, PJ27_IOR_OUT,
513 PJ26_IOR_IN, PJ26_IOR_OUT,
514 PJ25_IOR_IN, PJ25_IOR_OUT,
515 PJ24_IOR_IN, PJ24_IOR_OUT,
516 PJ23_IOR_IN, PJ23_IOR_OUT,
517 PJ22_IOR_IN, PJ22_IOR_OUT,
518 PJ21_IOR_IN, PJ21_IOR_OUT,
519 PJ20_IOR_IN, PJ20_IOR_OUT,
520 PJ19_IOR_IN, PJ19_IOR_OUT,
521 PJ18_IOR_IN, PJ18_IOR_OUT,
522 PJ17_IOR_IN, PJ17_IOR_OUT,
523 PJ16_IOR_IN, PJ16_IOR_OUT,
524 PJ15_IOR_IN, PJ15_IOR_OUT,
525 PJ14_IOR_IN, PJ14_IOR_OUT,
526 PJ13_IOR_IN, PJ13_IOR_OUT,
527 PJ12_IOR_IN, PJ12_IOR_OUT,
528 PJ11_IOR_IN, PJ11_IOR_OUT,
529 PJ10_IOR_IN, PJ10_IOR_OUT,
530 PJ9_IOR_IN, PJ9_IOR_OUT,
531 PJ8_IOR_IN, PJ8_IOR_OUT,
532 PJ7_IOR_IN, PJ7_IOR_OUT,
533 PJ6_IOR_IN, PJ6_IOR_OUT,
534 PJ5_IOR_IN, PJ5_IOR_OUT,
535 PJ4_IOR_IN, PJ4_IOR_OUT,
536 PJ3_IOR_IN, PJ3_IOR_OUT,
537 PJ2_IOR_IN, PJ2_IOR_OUT,
538 PJ1_IOR_IN, PJ1_IOR_OUT,
539 PJ0_IOR_IN, PJ0_IOR_OUT,
540
541 PJ31MD_0, PJ31MD_1,
542 PJ30MD_000, PJ30MD_001, PJ30MD_010, PJ30MD_011,
543 PJ30MD_100, PJ30MD_101, PJ30MD_110, PJ30MD_111,
544 PJ29MD_000, PJ29MD_001, PJ29MD_010, PJ29MD_011,
545 PJ29MD_100, PJ29MD_101, PJ29MD_110, PJ29MD_111,
546 PJ28MD_000, PJ28MD_001, PJ28MD_010, PJ28MD_011,
547 PJ28MD_100, PJ28MD_101, PJ28MD_110, PJ28MD_111,
548
549 PJ27MD_000, PJ27MD_001, PJ27MD_010, PJ27MD_011,
550 PJ27MD_100, PJ27MD_101, PJ27MD_110, PJ27MD_111,
551 PJ26MD_000, PJ26MD_001, PJ26MD_010, PJ26MD_011,
552 PJ26MD_100, PJ26MD_101, PJ26MD_110, PJ26MD_111,
553 PJ25MD_000, PJ25MD_001, PJ25MD_010, PJ25MD_011,
554 PJ25MD_100, PJ25MD_101, PJ25MD_110, PJ25MD_111,
555 PJ24MD_000, PJ24MD_001, PJ24MD_010, PJ24MD_011,
556 PJ24MD_100, PJ24MD_101, PJ24MD_110, PJ24MD_111,
557
558 PJ23MD_000, PJ23MD_001, PJ23MD_010, PJ23MD_011,
559 PJ23MD_100, PJ23MD_101, PJ23MD_110, PJ23MD_111,
560 PJ22MD_000, PJ22MD_001, PJ22MD_010, PJ22MD_011,
561 PJ22MD_100, PJ22MD_101, PJ22MD_110, PJ22MD_111,
562 PJ21MD_000, PJ21MD_001, PJ21MD_010, PJ21MD_011,
563 PJ21MD_100, PJ21MD_101, PJ21MD_110, PJ21MD_111,
564 PJ20MD_000, PJ20MD_001, PJ20MD_010, PJ20MD_011,
565 PJ20MD_100, PJ20MD_101, PJ20MD_110, PJ20MD_111,
566
567 PJ19MD_000, PJ19MD_001, PJ19MD_010, PJ19MD_011,
568 PJ19MD_100, PJ19MD_101, PJ19MD_110, PJ19MD_111,
569 PJ18MD_000, PJ18MD_001, PJ18MD_010, PJ18MD_011,
570 PJ18MD_100, PJ18MD_101, PJ18MD_110, PJ18MD_111,
571 PJ17MD_000, PJ17MD_001, PJ17MD_010, PJ17MD_011,
572 PJ17MD_100, PJ17MD_101, PJ17MD_110, PJ17MD_111,
573 PJ16MD_000, PJ16MD_001, PJ16MD_010, PJ16MD_011,
574 PJ16MD_100, PJ16MD_101, PJ16MD_110, PJ16MD_111,
575
576 PJ15MD_000, PJ15MD_001, PJ15MD_010, PJ15MD_011,
577 PJ15MD_100, PJ15MD_101, PJ15MD_110, PJ15MD_111,
578 PJ14MD_000, PJ14MD_001, PJ14MD_010, PJ14MD_011,
579 PJ14MD_100, PJ14MD_101, PJ14MD_110, PJ14MD_111,
580 PJ13MD_000, PJ13MD_001, PJ13MD_010, PJ13MD_011,
581 PJ13MD_100, PJ13MD_101, PJ13MD_110, PJ13MD_111,
582 PJ12MD_000, PJ12MD_001, PJ12MD_010, PJ12MD_011,
583 PJ12MD_100, PJ12MD_101, PJ12MD_110, PJ12MD_111,
584
585 PJ11MD_000, PJ11MD_001, PJ11MD_010, PJ11MD_011,
586 PJ11MD_100, PJ11MD_101, PJ11MD_110, PJ11MD_111,
587 PJ10MD_000, PJ10MD_001, PJ10MD_010, PJ10MD_011,
588 PJ10MD_100, PJ10MD_101, PJ10MD_110, PJ10MD_111,
589 PJ9MD_000, PJ9MD_001, PJ9MD_010, PJ9MD_011,
590 PJ9MD_100, PJ9MD_101, PJ9MD_110, PJ9MD_111,
591 PJ8MD_000, PJ8MD_001, PJ8MD_010, PJ8MD_011,
592 PJ8MD_100, PJ8MD_101, PJ8MD_110, PJ8MD_111,
593
594 PJ7MD_000, PJ7MD_001, PJ7MD_010, PJ7MD_011,
595 PJ7MD_100, PJ7MD_101, PJ7MD_110, PJ7MD_111,
596 PJ6MD_000, PJ6MD_001, PJ6MD_010, PJ6MD_011,
597 PJ6MD_100, PJ6MD_101, PJ6MD_110, PJ6MD_111,
598 PJ5MD_000, PJ5MD_001, PJ5MD_010, PJ5MD_011,
599 PJ5MD_100, PJ5MD_101, PJ5MD_110, PJ5MD_111,
600 PJ4MD_000, PJ4MD_001, PJ4MD_010, PJ4MD_011,
601 PJ4MD_100, PJ4MD_101, PJ4MD_110, PJ4MD_111,
602
603 PJ3MD_000, PJ3MD_001, PJ3MD_010, PJ3MD_011,
604 PJ3MD_100, PJ3MD_101, PJ3MD_110, PJ3MD_111,
605 PJ2MD_000, PJ2MD_001, PJ2MD_010, PJ2MD_011,
606 PJ2MD_100, PJ2MD_101, PJ2MD_110, PJ2MD_111,
607 PJ1MD_000, PJ1MD_001, PJ1MD_010, PJ1MD_011,
608 PJ1MD_100, PJ1MD_101, PJ1MD_110, PJ1MD_111,
609 PJ0MD_000, PJ0MD_001, PJ0MD_010, PJ0MD_011,
610 PJ0MD_100, PJ0MD_101, PJ0MD_110, PJ0MD_111,
611
612 PINMUX_FUNCTION_END,
613
614 PINMUX_MARK_BEGIN,
615 /* Port H */
616 PHAN7_MARK, PHAN6_MARK, PHAN5_MARK, PHAN4_MARK,
617 PHAN3_MARK, PHAN2_MARK, PHAN1_MARK, PHAN0_MARK,
618
619 /* IRQs */
620 IRQ7_PG_MARK, IRQ6_PG_MARK, IRQ5_PG_MARK, IRQ4_PG_MARK,
621 IRQ3_PG_MARK, IRQ2_PG_MARK, IRQ1_PG_MARK, IRQ0_PG_MARK,
622 IRQ7_PF_MARK, IRQ6_PF_MARK, IRQ5_PF_MARK, IRQ4_PF_MARK,
623 IRQ3_PJ_MARK, IRQ2_PJ_MARK, IRQ1_PJ_MARK, IRQ0_PJ_MARK,
624 IRQ1_PC_MARK, IRQ0_PC_MARK,
625
626 PINT7_PG_MARK, PINT6_PG_MARK, PINT5_PG_MARK, PINT4_PG_MARK,
627 PINT3_PG_MARK, PINT2_PG_MARK, PINT1_PG_MARK, PINT0_PG_MARK,
628 PINT7_PH_MARK, PINT6_PH_MARK, PINT5_PH_MARK, PINT4_PH_MARK,
629 PINT3_PH_MARK, PINT2_PH_MARK, PINT1_PH_MARK, PINT0_PH_MARK,
630 PINT7_PJ_MARK, PINT6_PJ_MARK, PINT5_PJ_MARK, PINT4_PJ_MARK,
631 PINT3_PJ_MARK, PINT2_PJ_MARK, PINT1_PJ_MARK, PINT0_PJ_MARK,
632
633 /* SD */
634 SD_D0_MARK, SD_D1_MARK, SD_D2_MARK, SD_D3_MARK,
635 SD_WP_MARK, SD_CLK_MARK, SD_CMD_MARK, SD_CD_MARK,
636
637 /* MMC */
638 MMC_D0_MARK, MMC_D1_MARK, MMC_D2_MARK, MMC_D3_MARK,
639 MMC_D4_MARK, MMC_D5_MARK, MMC_D6_MARK, MMC_D7_MARK,
640 MMC_CLK_MARK, MMC_CMD_MARK, MMC_CD_MARK,
641
642 /* PWM */
643 PWM1A_MARK, PWM1B_MARK, PWM1C_MARK, PWM1D_MARK,
644 PWM1E_MARK, PWM1F_MARK, PWM1G_MARK, PWM1H_MARK,
645 PWM2A_MARK, PWM2B_MARK, PWM2C_MARK, PWM2D_MARK,
646 PWM2E_MARK, PWM2F_MARK, PWM2G_MARK, PWM2H_MARK,
647
648 /* IEBus */
649 IERXD_MARK, IETXD_MARK,
650
651 /* WDT */
652 WDTOVF_MARK,
653
654 /* DMAC */
655 TEND0_MARK, DACK0_MARK, DREQ0_MARK,
656 TEND1_MARK, DACK1_MARK, DREQ1_MARK,
657
658 /* ADC */
659 ADTRG_MARK,
660
661 /* BSC */
662 A25_MARK, A24_MARK,
663 A23_MARK, A22_MARK, A21_MARK, A20_MARK,
664 A19_MARK, A18_MARK, A17_MARK, A16_MARK,
665 A15_MARK, A14_MARK, A13_MARK, A12_MARK,
666 A11_MARK, A10_MARK, A9_MARK, A8_MARK,
667 A7_MARK, A6_MARK, A5_MARK, A4_MARK,
668 A3_MARK, A2_MARK, A1_MARK, A0_MARK,
669 D31_MARK, D30_MARK, D29_MARK, D28_MARK,
670 D27_MARK, D26_MARK, D25_MARK, D24_MARK,
671 D23_MARK, D22_MARK, D21_MARK, D20_MARK,
672 D19_MARK, D18_MARK, D17_MARK, D16_MARK,
673 D15_MARK, D14_MARK, D13_MARK, D12_MARK,
674 D11_MARK, D10_MARK, D9_MARK, D8_MARK,
675 D7_MARK, D6_MARK, D5_MARK, D4_MARK,
676 D3_MARK, D2_MARK, D1_MARK, D0_MARK,
677 BS_MARK,
678 CS4_MARK, CS3_MARK, CS2_MARK, CS1_MARK, CS0_MARK,
679 CS5CE1A_MARK,
680 CE2A_MARK, CE2B_MARK,
681 RD_MARK, RDWR_MARK,
682 WE3ICIOWRAHDQMUU_MARK,
683 WE2ICIORDDQMUL_MARK,
684 WE1DQMUWE_MARK,
685 WE0DQML_MARK,
686 RAS_MARK, CAS_MARK, CKE_MARK,
687 WAIT_MARK, BREQ_MARK, BACK_MARK, IOIS16_MARK,
688
689 /* TMU */
690 TIOC0A_MARK, TIOC0B_MARK, TIOC0C_MARK, TIOC0D_MARK,
691 TIOC1A_MARK, TIOC1B_MARK,
692 TIOC2A_MARK, TIOC2B_MARK,
693 TIOC3A_MARK, TIOC3B_MARK, TIOC3C_MARK, TIOC3D_MARK,
694 TIOC4A_MARK, TIOC4B_MARK, TIOC4C_MARK, TIOC4D_MARK,
695 TCLKA_MARK, TCLKB_MARK, TCLKC_MARK, TCLKD_MARK,
696
697 /* SCIF */
698 SCK0_MARK, RXD0_MARK, TXD0_MARK,
699 SCK1_MARK, RXD1_MARK, TXD1_MARK, RTS1_MARK, CTS1_MARK,
700 SCK2_MARK, RXD2_MARK, TXD2_MARK,
701 SCK3_MARK, RXD3_MARK, TXD3_MARK,
702 SCK4_MARK, RXD4_MARK, TXD4_MARK,
703 SCK5_MARK, RXD5_MARK, TXD5_MARK, RTS5_MARK, CTS5_MARK,
704 SCK6_MARK, RXD6_MARK, TXD6_MARK,
705 SCK7_MARK, RXD7_MARK, TXD7_MARK, RTS7_MARK, CTS7_MARK,
706
707 /* RSPI */
708 MISO0_PB20_MARK, MOSI0_PB19_MARK, SSL00_PB18_MARK, RSPCK0_PB17_MARK,
709 MISO0_PJ19_MARK, MOSI0_PJ18_MARK, SSL00_PJ17_MARK, RSPCK0_PJ16_MARK,
710 MISO1_MARK, MOSI1_MARK, SSL10_MARK, RSPCK1_MARK,
711
712 /* IIC3 */
713 SCL0_MARK, SDA0_MARK,
714 SCL1_MARK, SDA1_MARK,
715 SCL2_MARK, SDA2_MARK,
716 SCL3_MARK, SDA3_MARK,
717
718 /* SSI */
719 SSISCK0_MARK, SSIWS0_MARK, SSITXD0_MARK, SSIRXD0_MARK,
720 SSISCK1_MARK, SSIWS1_MARK, SSIDATA1_MARK,
721 SSISCK2_MARK, SSIWS2_MARK, SSIDATA2_MARK,
722 SSISCK3_MARK, SSIWS3_MARK, SSIDATA3_MARK,
723 SSISCK4_MARK, SSIWS4_MARK, SSIDATA4_MARK,
724 SSISCK5_MARK, SSIWS5_MARK, SSIDATA5_MARK,
725 AUDIO_CLK_MARK,
726 AUDIO_XOUT_MARK,
727
728 /* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */
729 SIOFTXD_MARK, SIOFRXD_MARK, SIOFSYNC_MARK, SIOFSCK_MARK,
730
731 /* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */
732 SPDIF_IN_MARK, SPDIF_OUT_MARK,
733 SPDIF_IN_PJ24_MARK, SPDIF_OUT_PJ25_MARK,
734
735 /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */
736 FCE_MARK,
737 FRB_MARK,
738
739 /* CAN */
740 CRX0_MARK, CTX0_MARK,
741 CRX1_MARK, CTX1_MARK,
742 CRX2_MARK, CTX2_MARK,
743 CRX0_CRX1_MARK,
744 CRX0_CRX1_CRX2_MARK,
745 CTX0CTX1CTX2_MARK,
746 CRX1_PJ22_MARK, CTX1_PJ23_MARK,
747 CRX2_PJ20_MARK, CTX2_PJ21_MARK,
748 CRX0CRX1_PJ22_MARK,
749 CRX0CRX1CRX2_PJ20_MARK,
750
751 /* VDC */
752 DV_CLK_MARK,
753 DV_VSYNC_MARK, DV_HSYNC_MARK,
754 DV_DATA23_MARK, DV_DATA22_MARK, DV_DATA21_MARK, DV_DATA20_MARK,
755 DV_DATA19_MARK, DV_DATA18_MARK, DV_DATA17_MARK, DV_DATA16_MARK,
756 DV_DATA15_MARK, DV_DATA14_MARK, DV_DATA13_MARK, DV_DATA12_MARK,
757 DV_DATA11_MARK, DV_DATA10_MARK, DV_DATA9_MARK, DV_DATA8_MARK,
758 DV_DATA7_MARK, DV_DATA6_MARK, DV_DATA5_MARK, DV_DATA4_MARK,
759 DV_DATA3_MARK, DV_DATA2_MARK, DV_DATA1_MARK, DV_DATA0_MARK,
760 LCD_CLK_MARK, LCD_EXTCLK_MARK,
761 LCD_VSYNC_MARK, LCD_HSYNC_MARK, LCD_DE_MARK,
762 LCD_DATA23_PG23_MARK, LCD_DATA22_PG22_MARK, LCD_DATA21_PG21_MARK,
763 LCD_DATA20_PG20_MARK, LCD_DATA19_PG19_MARK, LCD_DATA18_PG18_MARK,
764 LCD_DATA17_PG17_MARK, LCD_DATA16_PG16_MARK, LCD_DATA15_PG15_MARK,
765 LCD_DATA14_PG14_MARK, LCD_DATA13_PG13_MARK, LCD_DATA12_PG12_MARK,
766 LCD_DATA11_PG11_MARK, LCD_DATA10_PG10_MARK, LCD_DATA9_PG9_MARK,
767 LCD_DATA8_PG8_MARK, LCD_DATA7_PG7_MARK, LCD_DATA6_PG6_MARK,
768 LCD_DATA5_PG5_MARK, LCD_DATA4_PG4_MARK, LCD_DATA3_PG3_MARK,
769 LCD_DATA2_PG2_MARK, LCD_DATA1_PG1_MARK, LCD_DATA0_PG0_MARK,
770 LCD_DATA23_PJ23_MARK, LCD_DATA22_PJ22_MARK, LCD_DATA21_PJ21_MARK,
771 LCD_DATA20_PJ20_MARK, LCD_DATA19_PJ19_MARK, LCD_DATA18_PJ18_MARK,
772 LCD_DATA17_PJ17_MARK, LCD_DATA16_PJ16_MARK, LCD_DATA15_PJ15_MARK,
773 LCD_DATA14_PJ14_MARK, LCD_DATA13_PJ13_MARK, LCD_DATA12_PJ12_MARK,
774 LCD_DATA11_PJ11_MARK, LCD_DATA10_PJ10_MARK, LCD_DATA9_PJ9_MARK,
775 LCD_DATA8_PJ8_MARK, LCD_DATA7_PJ7_MARK, LCD_DATA6_PJ6_MARK,
776 LCD_DATA5_PJ5_MARK, LCD_DATA4_PJ4_MARK, LCD_DATA3_PJ3_MARK,
777 LCD_DATA2_PJ2_MARK, LCD_DATA1_PJ1_MARK, LCD_DATA0_PJ0_MARK,
778 LCD_TCON6_MARK, LCD_TCON5_MARK, LCD_TCON4_MARK,
779 LCD_TCON3_MARK, LCD_TCON2_MARK, LCD_TCON1_MARK, LCD_TCON0_MARK,
780 LCD_M_DISP_MARK,
781 PINMUX_MARK_END,
782};
783
784static pinmux_enum_t pinmux_data[] = {
785
786 /* Port A */
787 PINMUX_DATA(PA1_DATA, PA1_IN),
788 PINMUX_DATA(PA0_DATA, PA0_IN),
789
790 /* Port B */
791 PINMUX_DATA(PB22_DATA, PB22MD_000, PB22_IN, PB22_OUT),
792 PINMUX_DATA(A22_MARK, PB22MD_001),
793 PINMUX_DATA(CTX2_MARK, PB22MD_010),
794 PINMUX_DATA(IETXD_MARK, PB22MD_011),
795 PINMUX_DATA(CS4_MARK, PB22MD_100),
796
797 PINMUX_DATA(PB21_DATA, PB21MD_00, PB21_IN, PB21_OUT),
798 PINMUX_DATA(A21_MARK, PB21MD_01),
799 PINMUX_DATA(CRX2_MARK, PB21MD_10),
800 PINMUX_DATA(IERXD_MARK, PB21MD_11),
801
802 PINMUX_DATA(A20_MARK, PB20MD_001),
803 PINMUX_DATA(A19_MARK, PB19MD_001),
804 PINMUX_DATA(A18_MARK, PB18MD_001),
805 PINMUX_DATA(A17_MARK, PB17MD_001),
806 PINMUX_DATA(A16_MARK, PB16MD_001),
807 PINMUX_DATA(A15_MARK, PB15MD_001),
808 PINMUX_DATA(A14_MARK, PB14MD_001),
809 PINMUX_DATA(A13_MARK, PB13MD_001),
810 PINMUX_DATA(A12_MARK, PB12MD_01),
811 PINMUX_DATA(A11_MARK, PB11MD_01),
812 PINMUX_DATA(A10_MARK, PB10MD_01),
813 PINMUX_DATA(A9_MARK, PB9MD_01),
814 PINMUX_DATA(A8_MARK, PB8MD_01),
815 PINMUX_DATA(A7_MARK, PB7MD_01),
816 PINMUX_DATA(A6_MARK, PB6MD_01),
817 PINMUX_DATA(A5_MARK, PB5MD_01),
818 PINMUX_DATA(A4_MARK, PB4MD_01),
819 PINMUX_DATA(A3_MARK, PB3MD_01),
820 PINMUX_DATA(A2_MARK, PB2MD_01),
821 PINMUX_DATA(A1_MARK, PB1MD_01),
822
823 /* Port C */
824 PINMUX_DATA(PC8_DATA, PC8MD_000),
825 PINMUX_DATA(CS3_MARK, PC8MD_001),
826 PINMUX_DATA(TXD7_MARK, PC8MD_010),
827 PINMUX_DATA(CTX1_MARK, PC8MD_011),
828
829 PINMUX_DATA(PC7_DATA, PC7MD_000),
830 PINMUX_DATA(CKE_MARK, PC7MD_001),
831 PINMUX_DATA(RXD7_MARK, PC7MD_010),
832 PINMUX_DATA(CRX1_MARK, PC7MD_011),
833 PINMUX_DATA(CRX0_CRX1_MARK, PC7MD_100),
834 PINMUX_DATA(IRQ1_PC_MARK, PC7MD_101),
835
836 PINMUX_DATA(PC6_DATA, PC6MD_000),
837 PINMUX_DATA(CAS_MARK, PC6MD_001),
838 PINMUX_DATA(SCK7_MARK, PC6MD_010),
839 PINMUX_DATA(CTX0_MARK, PC6MD_011),
840
841 PINMUX_DATA(PC5_DATA, PC5MD_000),
842 PINMUX_DATA(RAS_MARK, PC5MD_001),
843 PINMUX_DATA(CRX0_MARK, PC5MD_011),
844 PINMUX_DATA(CTX0CTX1CTX2_MARK, PC5MD_100),
845 PINMUX_DATA(IRQ0_PC_MARK, PC5MD_101),
846
847 PINMUX_DATA(PC4_DATA, PC4MD_00),
848 PINMUX_DATA(WE1DQMUWE_MARK, PC4MD_01),
849 PINMUX_DATA(TXD6_MARK, PC4MD_10),
850
851 PINMUX_DATA(PC3_DATA, PC3MD_00),
852 PINMUX_DATA(WE0DQML_MARK, PC3MD_01),
853 PINMUX_DATA(RXD6_MARK, PC3MD_10),
854
855 PINMUX_DATA(PC2_DATA, PC2MD_00),
856 PINMUX_DATA(RDWR_MARK, PC2MD_01),
857 PINMUX_DATA(SCK5_MARK, PC2MD_10),
858
859 PINMUX_DATA(PC1_DATA, PC1MD_0),
860 PINMUX_DATA(RD_MARK, PC1MD_1),
861
862 PINMUX_DATA(PC0_DATA, PC0MD_0),
863 PINMUX_DATA(CS0_MARK, PC0MD_1),
864
865 /* Port D */
866 PINMUX_DATA(D15_MARK, PD15MD_01),
867 PINMUX_DATA(D14_MARK, PD14MD_01),
868
869 PINMUX_DATA(PD13_DATA, PD13MD_00),
870 PINMUX_DATA(D13_MARK, PD13MD_01),
871 PINMUX_DATA(PWM2F_MARK, PD13MD_10),
872
873 PINMUX_DATA(PD12_DATA, PD12MD_00),
874 PINMUX_DATA(D12_MARK, PD12MD_01),
875 PINMUX_DATA(PWM2E_MARK, PD12MD_10),
876
877 PINMUX_DATA(D11_MARK, PD11MD_01),
878 PINMUX_DATA(D10_MARK, PD10MD_01),
879 PINMUX_DATA(D9_MARK, PD9MD_01),
880 PINMUX_DATA(D8_MARK, PD8MD_01),
881 PINMUX_DATA(D7_MARK, PD7MD_01),
882 PINMUX_DATA(D6_MARK, PD6MD_01),
883 PINMUX_DATA(D5_MARK, PD5MD_01),
884 PINMUX_DATA(D4_MARK, PD4MD_01),
885 PINMUX_DATA(D3_MARK, PD3MD_01),
886 PINMUX_DATA(D2_MARK, PD2MD_01),
887 PINMUX_DATA(D1_MARK, PD1MD_01),
888 PINMUX_DATA(D0_MARK, PD0MD_01),
889
890 /* Port E */
891 PINMUX_DATA(PE7_DATA, PE7MD_00),
892 PINMUX_DATA(SDA3_MARK, PE7MD_01),
893 PINMUX_DATA(RXD7_MARK, PE7MD_10),
894
895 PINMUX_DATA(PE6_DATA, PE6MD_00),
896 PINMUX_DATA(SCL3_MARK, PE6MD_01),
897 PINMUX_DATA(RXD6_MARK, PE6MD_10),
898
899 PINMUX_DATA(PE5_DATA, PE5MD_00),
900 PINMUX_DATA(SDA2_MARK, PE5MD_01),
901 PINMUX_DATA(RXD5_MARK, PE5MD_10),
902 PINMUX_DATA(DV_HSYNC_MARK, PE5MD_11),
903
904 PINMUX_DATA(PE4_DATA, PE4MD_00),
905 PINMUX_DATA(SCL2_MARK, PE4MD_01),
906 PINMUX_DATA(DV_VSYNC_MARK, PE4MD_11),
907
908 PINMUX_DATA(PE3_DATA, PE3MD_000),
909 PINMUX_DATA(SDA1_MARK, PE3MD_001),
910 PINMUX_DATA(TCLKD_MARK, PE3MD_010),
911 PINMUX_DATA(ADTRG_MARK, PE3MD_011),
912 PINMUX_DATA(DV_HSYNC_MARK, PE3MD_100),
913
914 PINMUX_DATA(PE2_DATA, PE2MD_000),
915 PINMUX_DATA(SCL1_MARK, PE2MD_001),
916 PINMUX_DATA(TCLKD_MARK, PE2MD_010),
917 PINMUX_DATA(IOIS16_MARK, PE2MD_011),
918 PINMUX_DATA(DV_VSYNC_MARK, PE2MD_100),
919
920 PINMUX_DATA(PE1_DATA, PE1MD_000),
921 PINMUX_DATA(SDA0_MARK, PE1MD_001),
922 PINMUX_DATA(TCLKB_MARK, PE1MD_010),
923 PINMUX_DATA(AUDIO_CLK_MARK, PE1MD_010),
924 PINMUX_DATA(DV_CLK_MARK, PE1MD_100),
925
926 PINMUX_DATA(PE0_DATA, PE0MD_00),
927 PINMUX_DATA(SCL0_MARK, PE0MD_01),
928 PINMUX_DATA(TCLKA_MARK, PE0MD_10),
929 PINMUX_DATA(LCD_EXTCLK_MARK, PE0MD_11),
930
931 /* Port F */
932 PINMUX_DATA(PF23_DATA, PF23MD_000),
933 PINMUX_DATA(SD_D2_MARK, PF23MD_001),
934 PINMUX_DATA(TXD3_MARK, PF23MD_100),
935 PINMUX_DATA(MMC_D2_MARK, PF23MD_101),
936
937 PINMUX_DATA(PF22_DATA, PF22MD_000),
938 PINMUX_DATA(SD_D3_MARK, PF22MD_001),
939 PINMUX_DATA(RXD3_MARK, PF22MD_100),
940 PINMUX_DATA(MMC_D3_MARK, PF22MD_101),
941
942 PINMUX_DATA(PF21_DATA, PF21MD_000),
943 PINMUX_DATA(SD_CMD_MARK, PF21MD_001),
944 PINMUX_DATA(SCK3_MARK, PF21MD_100),
945 PINMUX_DATA(MMC_CMD_MARK, PF21MD_101),
946
947 PINMUX_DATA(PF20_DATA, PF20MD_000),
948 PINMUX_DATA(SD_CLK_MARK, PF20MD_001),
949 PINMUX_DATA(SSIDATA3_MARK, PF20MD_010),
950 PINMUX_DATA(MMC_CLK_MARK, PF20MD_101),
951
952 PINMUX_DATA(PF19_DATA, PF19MD_000),
953 PINMUX_DATA(SD_D0_MARK, PF19MD_001),
954 PINMUX_DATA(SSIWS3_MARK, PF19MD_010),
955 PINMUX_DATA(IRQ7_PF_MARK, PF19MD_100),
956 PINMUX_DATA(MMC_D0_MARK, PF19MD_101),
957
958 PINMUX_DATA(PF18_DATA, PF18MD_000),
959 PINMUX_DATA(SD_D1_MARK, PF18MD_001),
960 PINMUX_DATA(SSISCK3_MARK, PF18MD_010),
961 PINMUX_DATA(IRQ6_PF_MARK, PF18MD_100),
962 PINMUX_DATA(MMC_D1_MARK, PF18MD_101),
963
964 PINMUX_DATA(PF17_DATA, PF17MD_000),
965 PINMUX_DATA(SD_WP_MARK, PF17MD_001),
966 PINMUX_DATA(FRB_MARK, PF17MD_011),
967 PINMUX_DATA(IRQ5_PF_MARK, PF17MD_100),
968
969 PINMUX_DATA(PF16_DATA, PF16MD_000),
970 PINMUX_DATA(SD_CD_MARK, PF16MD_001),
971 PINMUX_DATA(FCE_MARK, PF16MD_011),
972 PINMUX_DATA(IRQ4_PF_MARK, PF16MD_100),
973 PINMUX_DATA(MMC_CD_MARK, PF16MD_101),
974
975 PINMUX_DATA(PF15_DATA, PF15MD_000),
976 PINMUX_DATA(A0_MARK, PF15MD_001),
977 PINMUX_DATA(SSIDATA2_MARK, PF15MD_010),
978 PINMUX_DATA(WDTOVF_MARK, PF15MD_011),
979 PINMUX_DATA(TXD2_MARK, PF15MD_100),
980
981 PINMUX_DATA(PF14_DATA, PF14MD_000),
982 PINMUX_DATA(A25_MARK, PF14MD_001),
983 PINMUX_DATA(SSIWS2_MARK, PF14MD_010),
984 PINMUX_DATA(RXD2_MARK, PF14MD_100),
985
986 PINMUX_DATA(PF13_DATA, PF13MD_000),
987 PINMUX_DATA(A24_MARK, PF13MD_001),
988 PINMUX_DATA(SSISCK2_MARK, PF13MD_010),
989 PINMUX_DATA(SCK2_MARK, PF13MD_100),
990
991 PINMUX_DATA(PF12_DATA, PF12MD_000),
992 PINMUX_DATA(SSIDATA1_MARK, PF12MD_010),
993 PINMUX_DATA(DV_DATA12_MARK, PF12MD_011),
994 PINMUX_DATA(TXD1_MARK, PF12MD_100),
995 PINMUX_DATA(MMC_D7_MARK, PF12MD_101),
996
997 PINMUX_DATA(PF11_DATA, PF11MD_000),
998 PINMUX_DATA(SSIWS1_MARK, PF11MD_010),
999 PINMUX_DATA(DV_DATA2_MARK, PF11MD_011),
1000 PINMUX_DATA(RXD1_MARK, PF11MD_100),
1001 PINMUX_DATA(MMC_D6_MARK, PF11MD_101),
1002
1003 PINMUX_DATA(PF10_DATA, PF10MD_000),
1004 PINMUX_DATA(CS1_MARK, PF10MD_001),
1005 PINMUX_DATA(SSISCK1_MARK, PF10MD_010),
1006 PINMUX_DATA(DV_DATA1_MARK, PF10MD_011),
1007 PINMUX_DATA(SCK1_MARK, PF10MD_100),
1008 PINMUX_DATA(MMC_D5_MARK, PF10MD_101),
1009
1010 PINMUX_DATA(PF9_DATA, PF9MD_000),
1011 PINMUX_DATA(BS_MARK, PF9MD_001),
1012 PINMUX_DATA(DV_DATA0_MARK, PF9MD_011),
1013 PINMUX_DATA(SCK0_MARK, PF9MD_100),
1014 PINMUX_DATA(MMC_D4_MARK, PF9MD_101),
1015 PINMUX_DATA(RTS1_MARK, PF9MD_110),
1016
1017 PINMUX_DATA(PF8_DATA, PF8MD_000),
1018 PINMUX_DATA(A23_MARK, PF8MD_001),
1019 PINMUX_DATA(TXD0_MARK, PF8MD_100),
1020
1021 PINMUX_DATA(PF7_DATA, PF7MD_000),
1022 PINMUX_DATA(SSIRXD0_MARK, PF7MD_010),
1023 PINMUX_DATA(RXD0_MARK, PF7MD_100),
1024 PINMUX_DATA(CTS1_MARK, PF7MD_110),
1025
1026 PINMUX_DATA(PF6_DATA, PF6MD_000),
1027 PINMUX_DATA(CE2A_MARK, PF6MD_001),
1028 PINMUX_DATA(SSITXD0_MARK, PF6MD_010),
1029
1030 PINMUX_DATA(PF5_DATA, PF5MD_000),
1031 PINMUX_DATA(SSIWS0_MARK, PF5MD_010),
1032
1033 PINMUX_DATA(PF4_DATA, PF4MD_000),
1034 PINMUX_DATA(CS5CE1A_MARK, PF4MD_001),
1035 PINMUX_DATA(SSISCK0_MARK, PF4MD_010),
1036
1037 PINMUX_DATA(PF3_DATA, PF3MD_000),
1038 PINMUX_DATA(CS2_MARK, PF3MD_001),
1039 PINMUX_DATA(MISO1_MARK, PF3MD_011),
1040 PINMUX_DATA(TIOC4D_MARK, PF3MD_100),
1041
1042 PINMUX_DATA(PF2_DATA, PF2MD_000),
1043 PINMUX_DATA(WAIT_MARK, PF2MD_001),
1044 PINMUX_DATA(MOSI1_MARK, PF2MD_011),
1045 PINMUX_DATA(TIOC4C_MARK, PF2MD_100),
1046 PINMUX_DATA(TEND0_MARK, PF2MD_101),
1047
1048 PINMUX_DATA(PF1_DATA, PF1MD_000),
1049 PINMUX_DATA(BACK_MARK, PF1MD_001),
1050 PINMUX_DATA(SSL10_MARK, PF1MD_011),
1051 PINMUX_DATA(TIOC4B_MARK, PF1MD_100),
1052 PINMUX_DATA(DACK0_MARK, PF1MD_101),
1053
1054 PINMUX_DATA(PF0_DATA, PF0MD_000),
1055 PINMUX_DATA(BREQ_MARK, PF0MD_001),
1056 PINMUX_DATA(RSPCK1_MARK, PF0MD_011),
1057 PINMUX_DATA(TIOC4A_MARK, PF0MD_100),
1058 PINMUX_DATA(DREQ0_MARK, PF0MD_101),
1059
1060 /* Port G */
1061 PINMUX_DATA(PG27_DATA, PG27MD_00),
1062 PINMUX_DATA(LCD_TCON2_MARK, PG27MD_10),
1063 PINMUX_DATA(LCD_EXTCLK_MARK, PG27MD_11),
1064 PINMUX_DATA(LCD_DE_MARK, PG27MD_11),
1065
1066 PINMUX_DATA(PG26_DATA, PG26MD_00),
1067 PINMUX_DATA(LCD_TCON1_MARK, PG26MD_10),
1068 PINMUX_DATA(LCD_HSYNC_MARK, PG26MD_10),
1069
1070 PINMUX_DATA(PG25_DATA, PG25MD_00),
1071 PINMUX_DATA(LCD_TCON0_MARK, PG25MD_10),
1072 PINMUX_DATA(LCD_VSYNC_MARK, PG25MD_10),
1073
1074 PINMUX_DATA(PG24_DATA, PG24MD_00),
1075 PINMUX_DATA(LCD_CLK_MARK, PG24MD_10),
1076
1077 PINMUX_DATA(PG23_DATA, PG23MD_000),
1078 PINMUX_DATA(LCD_DATA23_PG23_MARK, PG23MD_010),
1079 PINMUX_DATA(LCD_TCON6_MARK, PG23MD_011),
1080 PINMUX_DATA(TXD5_MARK, PG23MD_100),
1081
1082 PINMUX_DATA(PG22_DATA, PG22MD_000),
1083 PINMUX_DATA(LCD_DATA22_PG22_MARK, PG22MD_010),
1084 PINMUX_DATA(LCD_TCON5_MARK, PG22MD_011),
1085 PINMUX_DATA(RXD5_MARK, PG22MD_100),
1086
1087 PINMUX_DATA(PG21_DATA, PG21MD_000),
1088 PINMUX_DATA(DV_DATA7_MARK, PG21MD_001),
1089 PINMUX_DATA(LCD_DATA21_PG21_MARK, PG21MD_010),
1090 PINMUX_DATA(LCD_TCON4_MARK, PG21MD_011),
1091 PINMUX_DATA(TXD4_MARK, PG21MD_100),
1092
1093 PINMUX_DATA(PG20_DATA, PG20MD_000),
1094 PINMUX_DATA(DV_DATA6_MARK, PG20MD_001),
1095 PINMUX_DATA(LCD_DATA20_PG20_MARK, PG21MD_010),
1096 PINMUX_DATA(LCD_TCON3_MARK, PG20MD_011),
1097 PINMUX_DATA(RXD4_MARK, PG20MD_100),
1098
1099 PINMUX_DATA(PG19_DATA, PG19MD_000),
1100 PINMUX_DATA(DV_DATA5_MARK, PG19MD_001),
1101 PINMUX_DATA(LCD_DATA19_PG19_MARK, PG19MD_010),
1102 PINMUX_DATA(SPDIF_OUT_MARK, PG19MD_011),
1103 PINMUX_DATA(SCK5_MARK, PG19MD_100),
1104
1105 PINMUX_DATA(PG18_DATA, PG18MD_000),
1106 PINMUX_DATA(DV_DATA4_MARK, PG18MD_001),
1107 PINMUX_DATA(LCD_DATA18_PG18_MARK, PG18MD_010),
1108 PINMUX_DATA(SPDIF_IN_MARK, PG18MD_011),
1109 PINMUX_DATA(SCK4_MARK, PG18MD_100),
1110
1111// TODO hardware manual has PG17 3 bits wide in reg picture and 2 bits in description
1112// we're going with 2 bits
1113 PINMUX_DATA(PG17_DATA, PG17MD_00),
1114 PINMUX_DATA(WE3ICIOWRAHDQMUU_MARK, PG17MD_01),
1115 PINMUX_DATA(LCD_DATA17_PG17_MARK, PG17MD_10),
1116
1117// TODO hardware manual has PG16 3 bits wide in reg picture and 2 bits in description
1118// we're going with 2 bits
1119 PINMUX_DATA(PG16_DATA, PG16MD_00),
1120 PINMUX_DATA(WE2ICIORDDQMUL_MARK, PG16MD_01),
1121 PINMUX_DATA(LCD_DATA16_PG16_MARK, PG16MD_10),
1122
1123 PINMUX_DATA(PG15_DATA, PG15MD_00),
1124 PINMUX_DATA(D31_MARK, PG15MD_01),
1125 PINMUX_DATA(LCD_DATA15_PG15_MARK, PG15MD_10),
1126 PINMUX_DATA(PINT7_PG_MARK, PG15MD_11),
1127
1128 PINMUX_DATA(PG14_DATA, PG14MD_00),
1129 PINMUX_DATA(D30_MARK, PG14MD_01),
1130 PINMUX_DATA(LCD_DATA14_PG14_MARK, PG14MD_10),
1131 PINMUX_DATA(PINT6_PG_MARK, PG14MD_11),
1132
1133 PINMUX_DATA(PG13_DATA, PG13MD_00),
1134 PINMUX_DATA(D29_MARK, PG13MD_01),
1135 PINMUX_DATA(LCD_DATA13_PG13_MARK, PG13MD_10),
1136 PINMUX_DATA(PINT5_PG_MARK, PG13MD_11),
1137
1138 PINMUX_DATA(PG12_DATA, PG12MD_00),
1139 PINMUX_DATA(D28_MARK, PG12MD_01),
1140 PINMUX_DATA(LCD_DATA12_PG12_MARK, PG12MD_10),
1141 PINMUX_DATA(PINT4_PG_MARK, PG12MD_11),
1142
1143 PINMUX_DATA(PG11_DATA, PG11MD_000),
1144 PINMUX_DATA(D27_MARK, PG11MD_001),
1145 PINMUX_DATA(LCD_DATA11_PG11_MARK, PG11MD_010),
1146 PINMUX_DATA(PINT3_PG_MARK, PG11MD_011),
1147 PINMUX_DATA(TIOC3D_MARK, PG11MD_100),
1148
1149 PINMUX_DATA(PG10_DATA, PG10MD_000),
1150 PINMUX_DATA(D26_MARK, PG10MD_001),
1151 PINMUX_DATA(LCD_DATA10_PG10_MARK, PG10MD_010),
1152 PINMUX_DATA(PINT2_PG_MARK, PG10MD_011),
1153 PINMUX_DATA(TIOC3C_MARK, PG10MD_100),
1154
1155 PINMUX_DATA(PG9_DATA, PG9MD_000),
1156 PINMUX_DATA(D25_MARK, PG9MD_001),
1157 PINMUX_DATA(LCD_DATA9_PG9_MARK, PG9MD_010),
1158 PINMUX_DATA(PINT1_PG_MARK, PG9MD_011),
1159 PINMUX_DATA(TIOC3B_MARK, PG9MD_100),
1160
1161 PINMUX_DATA(PG8_DATA, PG8MD_000),
1162 PINMUX_DATA(D24_MARK, PG8MD_001),
1163 PINMUX_DATA(LCD_DATA8_PG8_MARK, PG8MD_010),
1164 PINMUX_DATA(PINT0_PG_MARK, PG8MD_011),
1165 PINMUX_DATA(TIOC3A_MARK, PG8MD_100),
1166
1167 PINMUX_DATA(PG7_DATA, PG7MD_000),
1168 PINMUX_DATA(D23_MARK, PG7MD_001),
1169 PINMUX_DATA(LCD_DATA7_PG7_MARK, PG7MD_010),
1170 PINMUX_DATA(IRQ7_PG_MARK, PG7MD_011),
1171 PINMUX_DATA(TIOC2B_MARK, PG7MD_100),
1172
1173 PINMUX_DATA(PG6_DATA, PG6MD_000),
1174 PINMUX_DATA(D22_MARK, PG6MD_001),
1175 PINMUX_DATA(LCD_DATA6_PG6_MARK, PG6MD_010),
1176 PINMUX_DATA(IRQ6_PG_MARK, PG6MD_011),
1177 PINMUX_DATA(TIOC2A_MARK, PG6MD_100),
1178
1179 PINMUX_DATA(PG5_DATA, PG5MD_000),
1180 PINMUX_DATA(D21_MARK, PG5MD_001),
1181 PINMUX_DATA(LCD_DATA5_PG5_MARK, PG5MD_010),
1182 PINMUX_DATA(IRQ5_PG_MARK, PG5MD_011),
1183 PINMUX_DATA(TIOC1B_MARK, PG5MD_100),
1184
1185 PINMUX_DATA(PG4_DATA, PG4MD_000),
1186 PINMUX_DATA(D20_MARK, PG4MD_001),
1187 PINMUX_DATA(LCD_DATA4_PG4_MARK, PG4MD_010),
1188 PINMUX_DATA(IRQ4_PG_MARK, PG4MD_011),
1189 PINMUX_DATA(TIOC1A_MARK, PG4MD_100),
1190
1191 PINMUX_DATA(PG3_DATA, PG3MD_000),
1192 PINMUX_DATA(D19_MARK, PG3MD_001),
1193 PINMUX_DATA(LCD_DATA3_PG3_MARK, PG3MD_010),
1194 PINMUX_DATA(IRQ3_PG_MARK, PG3MD_011),
1195 PINMUX_DATA(TIOC0D_MARK, PG3MD_100),
1196
1197 PINMUX_DATA(PG2_DATA, PG2MD_000),
1198 PINMUX_DATA(D18_MARK, PG2MD_001),
1199 PINMUX_DATA(LCD_DATA2_PG2_MARK, PG2MD_010),
1200 PINMUX_DATA(IRQ2_PG_MARK, PG2MD_011),
1201 PINMUX_DATA(TIOC0C_MARK, PG2MD_100),
1202
1203 PINMUX_DATA(PG1_DATA, PG1MD_000),
1204 PINMUX_DATA(D17_MARK, PG1MD_001),
1205 PINMUX_DATA(LCD_DATA1_PG1_MARK, PG1MD_010),
1206 PINMUX_DATA(IRQ1_PG_MARK, PG1MD_011),
1207 PINMUX_DATA(TIOC0B_MARK, PG1MD_100),
1208
1209 PINMUX_DATA(PG0_DATA, PG0MD_000),
1210 PINMUX_DATA(D16_MARK, PG0MD_001),
1211 PINMUX_DATA(LCD_DATA0_PG0_MARK, PG0MD_010),
1212 PINMUX_DATA(IRQ0_PG_MARK, PG0MD_011),
1213 PINMUX_DATA(TIOC0A_MARK, PG0MD_100),
1214
1215 /* Port H */
1216 PINMUX_DATA(PH7_DATA, PH7MD_00),
1217 PINMUX_DATA(PHAN7_MARK, PH7MD_01),
1218 PINMUX_DATA(PINT7_PH_MARK, PH7MD_10),
1219
1220 PINMUX_DATA(PH6_DATA, PH6MD_00),
1221 PINMUX_DATA(PHAN6_MARK, PH6MD_01),
1222 PINMUX_DATA(PINT6_PH_MARK, PH6MD_10),
1223
1224 PINMUX_DATA(PH5_DATA, PH5MD_00),
1225 PINMUX_DATA(PHAN5_MARK, PH5MD_01),
1226 PINMUX_DATA(PINT5_PH_MARK, PH5MD_10),
1227 PINMUX_DATA(LCD_EXTCLK_MARK, PH5MD_11),
1228
1229 PINMUX_DATA(PH4_DATA, PH4MD_00),
1230 PINMUX_DATA(PHAN4_MARK, PH4MD_01),
1231 PINMUX_DATA(PINT4_PH_MARK, PH4MD_10),
1232
1233 PINMUX_DATA(PH3_DATA, PH3MD_00),
1234 PINMUX_DATA(PHAN3_MARK, PH3MD_01),
1235 PINMUX_DATA(PINT3_PH_MARK, PH3MD_10),
1236
1237 PINMUX_DATA(PH2_DATA, PH2MD_00),
1238 PINMUX_DATA(PHAN2_MARK, PH2MD_01),
1239 PINMUX_DATA(PINT2_PH_MARK, PH2MD_10),
1240
1241 PINMUX_DATA(PH1_DATA, PH1MD_00),
1242 PINMUX_DATA(PHAN1_MARK, PH1MD_01),
1243 PINMUX_DATA(PINT1_PH_MARK, PH1MD_10),
1244
1245 PINMUX_DATA(PH0_DATA, PH0MD_00),
1246 PINMUX_DATA(PHAN0_MARK, PH0MD_01),
1247 PINMUX_DATA(PINT0_PH_MARK, PH0MD_10),
1248
1249 /* Port I - not on device */
1250
1251 /* Port J */
1252 PINMUX_DATA(PJ31_DATA, PJ31MD_0),
1253 PINMUX_DATA(DV_CLK_MARK, PJ31MD_1),
1254
1255 PINMUX_DATA(PJ30_DATA, PJ30MD_000),
1256 PINMUX_DATA(SSIDATA5_MARK, PJ30MD_010),
1257 PINMUX_DATA(TIOC2B_MARK, PJ30MD_100),
1258 PINMUX_DATA(IETXD_MARK, PJ30MD_101),
1259
1260 PINMUX_DATA(PJ29_DATA, PJ29MD_000),
1261 PINMUX_DATA(SSIWS5_MARK, PJ29MD_010),
1262 PINMUX_DATA(TIOC2A_MARK, PJ29MD_100),
1263 PINMUX_DATA(IERXD_MARK, PJ29MD_101),
1264
1265 PINMUX_DATA(PJ28_DATA, PJ28MD_000),
1266 PINMUX_DATA(SSISCK5_MARK, PJ28MD_010),
1267 PINMUX_DATA(TIOC1B_MARK, PJ28MD_100),
1268 PINMUX_DATA(RTS7_MARK, PJ28MD_101),
1269
1270 PINMUX_DATA(PJ27_DATA, PJ27MD_000),
1271 PINMUX_DATA(TIOC1A_MARK, PJ27MD_100),
1272 PINMUX_DATA(CTS7_MARK, PJ27MD_101),
1273
1274 PINMUX_DATA(PJ26_DATA, PJ26MD_000),
1275 PINMUX_DATA(SSIDATA4_MARK, PJ26MD_010),
1276 PINMUX_DATA(LCD_TCON5_MARK, PJ26MD_011),
1277 PINMUX_DATA(TXD7_MARK, PJ26MD_101),
1278
1279 PINMUX_DATA(PJ25_DATA, PJ25MD_000),
1280 PINMUX_DATA(SSIWS4_MARK, PJ25MD_010),
1281 PINMUX_DATA(LCD_TCON4_MARK, PJ25MD_011),
1282 PINMUX_DATA(SPDIF_OUT_MARK, PJ25MD_100),
1283 PINMUX_DATA(RXD7_MARK, PJ25MD_101),
1284
1285 PINMUX_DATA(PJ24_DATA, PJ24MD_000),
1286 PINMUX_DATA(SSISCK4_MARK, PJ24MD_010),
1287 PINMUX_DATA(LCD_TCON3_MARK, PJ24MD_011),
1288 PINMUX_DATA(SPDIF_IN_MARK, PJ24MD_100),
1289 PINMUX_DATA(SCK7_MARK, PJ24MD_101),
1290
1291 PINMUX_DATA(PJ23_DATA, PJ23MD_000),
1292 PINMUX_DATA(DV_DATA23_MARK, PJ23MD_001),
1293 PINMUX_DATA(LCD_DATA23_PJ23_MARK, PJ23MD_010),
1294 PINMUX_DATA(LCD_TCON6_MARK, PJ23MD_011),
1295 PINMUX_DATA(IRQ3_PJ_MARK, PJ23MD_100),
1296 PINMUX_DATA(CTX1_MARK, PJ23MD_101),
1297
1298 PINMUX_DATA(PJ22_DATA, PJ22MD_000),
1299 PINMUX_DATA(DV_DATA22_MARK, PJ22MD_001),
1300 PINMUX_DATA(LCD_DATA22_PJ22_MARK, PJ22MD_010),
1301 PINMUX_DATA(LCD_TCON5_MARK, PJ22MD_011),
1302 PINMUX_DATA(IRQ2_PJ_MARK, PJ22MD_100),
1303 PINMUX_DATA(CRX1_MARK, PJ22MD_101),
1304 PINMUX_DATA(CRX0_CRX1_MARK, PJ22MD_110),
1305
1306 PINMUX_DATA(PJ21_DATA, PJ21MD_000),
1307 PINMUX_DATA(DV_DATA21_MARK, PJ21MD_001),
1308 PINMUX_DATA(LCD_DATA21_PJ21_MARK, PJ21MD_010),
1309 PINMUX_DATA(LCD_TCON4_MARK, PJ21MD_011),
1310 PINMUX_DATA(IRQ1_PJ_MARK, PJ21MD_100),
1311 PINMUX_DATA(CTX2_MARK, PJ21MD_101),
1312
1313 PINMUX_DATA(PJ20_DATA, PJ20MD_000),
1314 PINMUX_DATA(DV_DATA20_MARK, PJ20MD_001),
1315 PINMUX_DATA(LCD_DATA20_PJ20_MARK, PJ20MD_010),
1316 PINMUX_DATA(LCD_TCON3_MARK, PJ20MD_011),
1317 PINMUX_DATA(IRQ0_PJ_MARK, PJ20MD_100),
1318 PINMUX_DATA(CRX2_MARK, PJ20MD_101),
1319 PINMUX_DATA(CRX0CRX1CRX2_PJ20_MARK, PJ20MD_110),
1320
1321 PINMUX_DATA(PJ19_DATA, PJ19MD_000),
1322 PINMUX_DATA(DV_DATA19_MARK, PJ19MD_001),
1323 PINMUX_DATA(LCD_DATA19_PJ19_MARK, PJ19MD_010),
1324 PINMUX_DATA(MISO0_PJ19_MARK, PJ19MD_011),
1325 PINMUX_DATA(TIOC0D_MARK, PJ19MD_100),
1326 PINMUX_DATA(SIOFRXD_MARK, PJ19MD_101),
1327 PINMUX_DATA(AUDIO_XOUT_MARK, PJ19MD_110),
1328
1329 PINMUX_DATA(PJ18_DATA, PJ18MD_000),
1330 PINMUX_DATA(DV_DATA18_MARK, PJ18MD_001),
1331 PINMUX_DATA(LCD_DATA18_PJ18_MARK, PJ18MD_010),
1332 PINMUX_DATA(MOSI0_PJ18_MARK, PJ18MD_011),
1333 PINMUX_DATA(TIOC0C_MARK, PJ18MD_100),
1334 PINMUX_DATA(SIOFTXD_MARK, PJ18MD_101),
1335
1336 PINMUX_DATA(PJ17_DATA, PJ17MD_000),
1337 PINMUX_DATA(DV_DATA17_MARK, PJ17MD_001),
1338 PINMUX_DATA(LCD_DATA17_PJ17_MARK, PJ17MD_010),
1339 PINMUX_DATA(SSL00_PJ17_MARK, PJ17MD_011),
1340 PINMUX_DATA(TIOC0B_MARK, PJ17MD_100),
1341 PINMUX_DATA(SIOFSYNC_MARK, PJ17MD_101),
1342
1343 PINMUX_DATA(PJ16_DATA, PJ16MD_000),
1344 PINMUX_DATA(DV_DATA16_MARK, PJ16MD_001),
1345 PINMUX_DATA(LCD_DATA16_PJ16_MARK, PJ16MD_010),
1346 PINMUX_DATA(RSPCK0_PJ16_MARK, PJ16MD_011),
1347 PINMUX_DATA(TIOC0A_MARK, PJ16MD_100),
1348 PINMUX_DATA(SIOFSCK_MARK, PJ16MD_101),
1349
1350 PINMUX_DATA(PJ15_DATA, PJ15MD_000),
1351 PINMUX_DATA(DV_DATA15_MARK, PJ15MD_001),
1352 PINMUX_DATA(LCD_DATA15_PJ15_MARK, PJ15MD_010),
1353 PINMUX_DATA(PINT7_PJ_MARK, PJ15MD_011),
1354 PINMUX_DATA(PWM2H_MARK, PJ15MD_100),
1355 PINMUX_DATA(TXD7_MARK, PJ15MD_101),
1356
1357 PINMUX_DATA(PJ14_DATA, PJ14MD_000),
1358 PINMUX_DATA(DV_DATA14_MARK, PJ14MD_001),
1359 PINMUX_DATA(LCD_DATA14_PJ14_MARK, PJ14MD_010),
1360 PINMUX_DATA(PINT6_PJ_MARK, PJ14MD_011),
1361 PINMUX_DATA(PWM2G_MARK, PJ14MD_100),
1362 PINMUX_DATA(TXD6_MARK, PJ14MD_101),
1363
1364 PINMUX_DATA(PJ13_DATA, PJ13MD_000),
1365 PINMUX_DATA(DV_DATA13_MARK, PJ13MD_001),
1366 PINMUX_DATA(LCD_DATA13_PJ13_MARK, PJ13MD_010),
1367 PINMUX_DATA(PINT5_PJ_MARK, PJ13MD_011),
1368 PINMUX_DATA(PWM2F_MARK, PJ13MD_100),
1369 PINMUX_DATA(TXD5_MARK, PJ13MD_101),
1370
1371 PINMUX_DATA(PJ12_DATA, PJ12MD_000),
1372 PINMUX_DATA(DV_DATA12_MARK, PJ12MD_001),
1373 PINMUX_DATA(LCD_DATA12_PJ12_MARK, PJ12MD_010),
1374 PINMUX_DATA(PINT4_PJ_MARK, PJ12MD_011),
1375 PINMUX_DATA(PWM2E_MARK, PJ12MD_100),
1376 PINMUX_DATA(SCK7_MARK, PJ12MD_101),
1377
1378 PINMUX_DATA(PJ11_DATA, PJ11MD_000),
1379 PINMUX_DATA(DV_DATA11_MARK, PJ11MD_001),
1380 PINMUX_DATA(LCD_DATA11_PJ11_MARK, PJ11MD_010),
1381 PINMUX_DATA(PINT3_PJ_MARK, PJ11MD_011),
1382 PINMUX_DATA(PWM2D_MARK, PJ11MD_100),
1383 PINMUX_DATA(SCK6_MARK, PJ11MD_101),
1384
1385 PINMUX_DATA(PJ10_DATA, PJ10MD_000),
1386 PINMUX_DATA(DV_DATA10_MARK, PJ10MD_001),
1387 PINMUX_DATA(LCD_DATA10_PJ10_MARK, PJ10MD_010),
1388 PINMUX_DATA(PINT2_PJ_MARK, PJ10MD_011),
1389 PINMUX_DATA(PWM2C_MARK, PJ10MD_100),
1390 PINMUX_DATA(SCK5_MARK, PJ10MD_101),
1391
1392 PINMUX_DATA(PJ9_DATA, PJ9MD_000),
1393 PINMUX_DATA(DV_DATA9_MARK, PJ9MD_001),
1394 PINMUX_DATA(LCD_DATA9_PJ9_MARK, PJ9MD_010),
1395 PINMUX_DATA(PINT1_PJ_MARK, PJ9MD_011),
1396 PINMUX_DATA(PWM2B_MARK, PJ9MD_100),
1397 PINMUX_DATA(RTS5_MARK, PJ9MD_101),
1398
1399 PINMUX_DATA(PJ8_DATA, PJ8MD_000),
1400 PINMUX_DATA(DV_DATA8_MARK, PJ8MD_001),
1401 PINMUX_DATA(LCD_DATA8_PJ8_MARK, PJ8MD_010),
1402 PINMUX_DATA(PINT0_PJ_MARK, PJ8MD_011),
1403 PINMUX_DATA(PWM2A_MARK, PJ8MD_100),
1404 PINMUX_DATA(CTS5_MARK, PJ8MD_101),
1405
1406 PINMUX_DATA(PJ7_DATA, PJ7MD_000),
1407 PINMUX_DATA(DV_DATA7_MARK, PJ7MD_001),
1408 PINMUX_DATA(LCD_DATA7_PJ7_MARK, PJ7MD_010),
1409 PINMUX_DATA(SD_D2_MARK, PJ7MD_011),
1410 PINMUX_DATA(PWM1H_MARK, PJ7MD_100),
1411
1412 PINMUX_DATA(PJ6_DATA, PJ6MD_000),
1413 PINMUX_DATA(DV_DATA6_MARK, PJ6MD_001),
1414 PINMUX_DATA(LCD_DATA6_PJ6_MARK, PJ6MD_010),
1415 PINMUX_DATA(SD_D3_MARK, PJ6MD_011),
1416 PINMUX_DATA(PWM1G_MARK, PJ6MD_100),
1417
1418 PINMUX_DATA(PJ5_DATA, PJ5MD_000),
1419 PINMUX_DATA(DV_DATA5_MARK, PJ5MD_001),
1420 PINMUX_DATA(LCD_DATA5_PJ5_MARK, PJ5MD_010),
1421 PINMUX_DATA(SD_CMD_MARK, PJ5MD_011),
1422 PINMUX_DATA(PWM1F_MARK, PJ5MD_100),
1423
1424 PINMUX_DATA(PJ4_DATA, PJ4MD_000),
1425 PINMUX_DATA(DV_DATA4_MARK, PJ4MD_001),
1426 PINMUX_DATA(LCD_DATA4_PJ4_MARK, PJ4MD_010),
1427 PINMUX_DATA(SD_CLK_MARK, PJ4MD_011),
1428 PINMUX_DATA(PWM1E_MARK, PJ4MD_100),
1429
1430 PINMUX_DATA(PJ3_DATA, PJ3MD_000),
1431 PINMUX_DATA(DV_DATA3_MARK, PJ3MD_001),
1432 PINMUX_DATA(LCD_DATA3_PJ3_MARK, PJ3MD_010),
1433 PINMUX_DATA(SD_D0_MARK, PJ3MD_011),
1434 PINMUX_DATA(PWM1D_MARK, PJ3MD_100),
1435
1436 PINMUX_DATA(PJ2_DATA, PJ2MD_000),
1437 PINMUX_DATA(DV_DATA2_MARK, PJ2MD_001),
1438 PINMUX_DATA(LCD_DATA2_PJ2_MARK, PJ2MD_010),
1439 PINMUX_DATA(SD_D1_MARK, PJ2MD_011),
1440 PINMUX_DATA(PWM1C_MARK, PJ2MD_100),
1441
1442 PINMUX_DATA(PJ1_DATA, PJ1MD_000),
1443 PINMUX_DATA(DV_DATA1_MARK, PJ1MD_001),
1444 PINMUX_DATA(LCD_DATA1_PJ1_MARK, PJ1MD_010),
1445 PINMUX_DATA(SD_WP_MARK, PJ1MD_011),
1446 PINMUX_DATA(PWM1B_MARK, PJ1MD_100),
1447
1448 PINMUX_DATA(PJ0_DATA, PJ0MD_000),
1449 PINMUX_DATA(DV_DATA0_MARK, PJ0MD_001),
1450 PINMUX_DATA(LCD_DATA0_PJ0_MARK, PJ0MD_010),
1451 PINMUX_DATA(SD_CD_MARK, PJ0MD_011),
1452 PINMUX_DATA(PWM1A_MARK, PJ0MD_100),
1453};
1454
1455static struct pinmux_gpio pinmux_gpios[] = {
1456 /* Port A */
1457 PINMUX_GPIO(GPIO_PA1, PA1_DATA),
1458 PINMUX_GPIO(GPIO_PA0, PA0_DATA),
1459
1460 /* Port B */
1461 PINMUX_GPIO(GPIO_PB22, PB22_DATA),
1462 PINMUX_GPIO(GPIO_PB21, PB21_DATA),
1463 PINMUX_GPIO(GPIO_PB20, PB20_DATA),
1464 PINMUX_GPIO(GPIO_PB19, PB19_DATA),
1465 PINMUX_GPIO(GPIO_PB18, PB18_DATA),
1466 PINMUX_GPIO(GPIO_PB17, PB17_DATA),
1467 PINMUX_GPIO(GPIO_PB16, PB16_DATA),
1468 PINMUX_GPIO(GPIO_PB15, PB15_DATA),
1469 PINMUX_GPIO(GPIO_PB14, PB14_DATA),
1470 PINMUX_GPIO(GPIO_PB13, PB13_DATA),
1471 PINMUX_GPIO(GPIO_PB12, PB12_DATA),
1472 PINMUX_GPIO(GPIO_PB11, PB11_DATA),
1473 PINMUX_GPIO(GPIO_PB10, PB10_DATA),
1474 PINMUX_GPIO(GPIO_PB9, PB9_DATA),
1475 PINMUX_GPIO(GPIO_PB8, PB8_DATA),
1476 PINMUX_GPIO(GPIO_PB7, PB7_DATA),
1477 PINMUX_GPIO(GPIO_PB6, PB6_DATA),
1478 PINMUX_GPIO(GPIO_PB5, PB5_DATA),
1479 PINMUX_GPIO(GPIO_PB4, PB4_DATA),
1480 PINMUX_GPIO(GPIO_PB3, PB3_DATA),
1481 PINMUX_GPIO(GPIO_PB2, PB2_DATA),
1482 PINMUX_GPIO(GPIO_PB1, PB1_DATA),
1483
1484 /* Port C */
1485 PINMUX_GPIO(GPIO_PC8, PC8_DATA),
1486 PINMUX_GPIO(GPIO_PC7, PC7_DATA),
1487 PINMUX_GPIO(GPIO_PC6, PC6_DATA),
1488 PINMUX_GPIO(GPIO_PC5, PC5_DATA),
1489 PINMUX_GPIO(GPIO_PC4, PC4_DATA),
1490 PINMUX_GPIO(GPIO_PC3, PC3_DATA),
1491 PINMUX_GPIO(GPIO_PC2, PC2_DATA),
1492 PINMUX_GPIO(GPIO_PC1, PC1_DATA),
1493 PINMUX_GPIO(GPIO_PC0, PC0_DATA),
1494
1495 /* Port D */
1496 PINMUX_GPIO(GPIO_PD15, PD15_DATA),
1497 PINMUX_GPIO(GPIO_PD14, PD14_DATA),
1498 PINMUX_GPIO(GPIO_PD13, PD13_DATA),
1499 PINMUX_GPIO(GPIO_PD12, PD12_DATA),
1500 PINMUX_GPIO(GPIO_PD11, PD11_DATA),
1501 PINMUX_GPIO(GPIO_PD10, PD10_DATA),
1502 PINMUX_GPIO(GPIO_PD9, PD9_DATA),
1503 PINMUX_GPIO(GPIO_PD8, PD8_DATA),
1504 PINMUX_GPIO(GPIO_PD7, PD7_DATA),
1505 PINMUX_GPIO(GPIO_PD6, PD6_DATA),
1506 PINMUX_GPIO(GPIO_PD5, PD5_DATA),
1507 PINMUX_GPIO(GPIO_PD4, PD4_DATA),
1508 PINMUX_GPIO(GPIO_PD3, PD3_DATA),
1509 PINMUX_GPIO(GPIO_PD2, PD2_DATA),
1510 PINMUX_GPIO(GPIO_PD1, PD1_DATA),
1511 PINMUX_GPIO(GPIO_PD0, PD0_DATA),
1512
1513 /* Port E */
1514 PINMUX_GPIO(GPIO_PE7, PE7_DATA),
1515 PINMUX_GPIO(GPIO_PE6, PE6_DATA),
1516 PINMUX_GPIO(GPIO_PE5, PE5_DATA),
1517 PINMUX_GPIO(GPIO_PE4, PE4_DATA),
1518 PINMUX_GPIO(GPIO_PE3, PE3_DATA),
1519 PINMUX_GPIO(GPIO_PE2, PE2_DATA),
1520 PINMUX_GPIO(GPIO_PE1, PE1_DATA),
1521 PINMUX_GPIO(GPIO_PE0, PE0_DATA),
1522
1523 /* Port F */
1524 PINMUX_GPIO(GPIO_PF23, PF23_DATA),
1525 PINMUX_GPIO(GPIO_PF22, PF22_DATA),
1526 PINMUX_GPIO(GPIO_PF21, PF21_DATA),
1527 PINMUX_GPIO(GPIO_PF20, PF20_DATA),
1528 PINMUX_GPIO(GPIO_PF19, PF19_DATA),
1529 PINMUX_GPIO(GPIO_PF18, PF18_DATA),
1530 PINMUX_GPIO(GPIO_PF17, PF17_DATA),
1531 PINMUX_GPIO(GPIO_PF16, PF16_DATA),
1532 PINMUX_GPIO(GPIO_PF15, PF15_DATA),
1533 PINMUX_GPIO(GPIO_PF14, PF14_DATA),
1534 PINMUX_GPIO(GPIO_PF13, PF13_DATA),
1535 PINMUX_GPIO(GPIO_PF12, PF12_DATA),
1536 PINMUX_GPIO(GPIO_PF11, PF11_DATA),
1537 PINMUX_GPIO(GPIO_PF10, PF10_DATA),
1538 PINMUX_GPIO(GPIO_PF9, PF9_DATA),
1539 PINMUX_GPIO(GPIO_PF8, PF8_DATA),
1540 PINMUX_GPIO(GPIO_PF7, PF7_DATA),
1541 PINMUX_GPIO(GPIO_PF6, PF6_DATA),
1542 PINMUX_GPIO(GPIO_PF5, PF5_DATA),
1543 PINMUX_GPIO(GPIO_PF4, PF4_DATA),
1544 PINMUX_GPIO(GPIO_PF3, PF3_DATA),
1545 PINMUX_GPIO(GPIO_PF2, PF2_DATA),
1546 PINMUX_GPIO(GPIO_PF1, PF1_DATA),
1547 PINMUX_GPIO(GPIO_PF0, PF0_DATA),
1548
1549 /* Port G */
1550 PINMUX_GPIO(GPIO_PG27, PG27_DATA),
1551 PINMUX_GPIO(GPIO_PG26, PG26_DATA),
1552 PINMUX_GPIO(GPIO_PG25, PG25_DATA),
1553 PINMUX_GPIO(GPIO_PG24, PG24_DATA),
1554 PINMUX_GPIO(GPIO_PG23, PG23_DATA),
1555 PINMUX_GPIO(GPIO_PG22, PG22_DATA),
1556 PINMUX_GPIO(GPIO_PG21, PG21_DATA),
1557 PINMUX_GPIO(GPIO_PG20, PG20_DATA),
1558 PINMUX_GPIO(GPIO_PG19, PG19_DATA),
1559 PINMUX_GPIO(GPIO_PG18, PG18_DATA),
1560 PINMUX_GPIO(GPIO_PG17, PG17_DATA),
1561 PINMUX_GPIO(GPIO_PG16, PG16_DATA),
1562 PINMUX_GPIO(GPIO_PG15, PG15_DATA),
1563 PINMUX_GPIO(GPIO_PG14, PG14_DATA),
1564 PINMUX_GPIO(GPIO_PG13, PG13_DATA),
1565 PINMUX_GPIO(GPIO_PG12, PG12_DATA),
1566 PINMUX_GPIO(GPIO_PG11, PG11_DATA),
1567 PINMUX_GPIO(GPIO_PG10, PG10_DATA),
1568 PINMUX_GPIO(GPIO_PG9, PG9_DATA),
1569 PINMUX_GPIO(GPIO_PG8, PG8_DATA),
1570 PINMUX_GPIO(GPIO_PG7, PG7_DATA),
1571 PINMUX_GPIO(GPIO_PG6, PG6_DATA),
1572 PINMUX_GPIO(GPIO_PG5, PG5_DATA),
1573 PINMUX_GPIO(GPIO_PG4, PG4_DATA),
1574 PINMUX_GPIO(GPIO_PG3, PG3_DATA),
1575 PINMUX_GPIO(GPIO_PG2, PG2_DATA),
1576 PINMUX_GPIO(GPIO_PG1, PG1_DATA),
1577 PINMUX_GPIO(GPIO_PG0, PG0_DATA),
1578
1579 /* Port H - Port H does not have a Data Register */
1580
1581 /* Port I - not on device */
1582
1583 /* Port J */
1584 PINMUX_GPIO(GPIO_PJ31, PJ31_DATA),
1585 PINMUX_GPIO(GPIO_PJ30, PJ30_DATA),
1586 PINMUX_GPIO(GPIO_PJ29, PJ29_DATA),
1587 PINMUX_GPIO(GPIO_PJ28, PJ28_DATA),
1588 PINMUX_GPIO(GPIO_PJ27, PJ27_DATA),
1589 PINMUX_GPIO(GPIO_PJ26, PJ26_DATA),
1590 PINMUX_GPIO(GPIO_PJ25, PJ25_DATA),
1591 PINMUX_GPIO(GPIO_PJ24, PJ24_DATA),
1592 PINMUX_GPIO(GPIO_PJ23, PJ23_DATA),
1593 PINMUX_GPIO(GPIO_PJ22, PJ22_DATA),
1594 PINMUX_GPIO(GPIO_PJ21, PJ21_DATA),
1595 PINMUX_GPIO(GPIO_PJ20, PJ20_DATA),
1596 PINMUX_GPIO(GPIO_PJ19, PJ19_DATA),
1597 PINMUX_GPIO(GPIO_PJ18, PJ18_DATA),
1598 PINMUX_GPIO(GPIO_PJ17, PJ17_DATA),
1599 PINMUX_GPIO(GPIO_PJ16, PJ16_DATA),
1600 PINMUX_GPIO(GPIO_PJ15, PJ15_DATA),
1601 PINMUX_GPIO(GPIO_PJ14, PJ14_DATA),
1602 PINMUX_GPIO(GPIO_PJ13, PJ13_DATA),
1603 PINMUX_GPIO(GPIO_PJ12, PJ12_DATA),
1604 PINMUX_GPIO(GPIO_PJ11, PJ11_DATA),
1605 PINMUX_GPIO(GPIO_PJ10, PJ10_DATA),
1606 PINMUX_GPIO(GPIO_PJ9, PJ9_DATA),
1607 PINMUX_GPIO(GPIO_PJ8, PJ8_DATA),
1608 PINMUX_GPIO(GPIO_PJ7, PJ7_DATA),
1609 PINMUX_GPIO(GPIO_PJ6, PJ6_DATA),
1610 PINMUX_GPIO(GPIO_PJ5, PJ5_DATA),
1611 PINMUX_GPIO(GPIO_PJ4, PJ4_DATA),
1612 PINMUX_GPIO(GPIO_PJ3, PJ3_DATA),
1613 PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),
1614 PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),
1615 PINMUX_GPIO(GPIO_PJ0, PJ0_DATA),
1616
1617 /* INTC */
1618 PINMUX_GPIO(GPIO_FN_IRQ7_PG, IRQ7_PG_MARK),
1619 PINMUX_GPIO(GPIO_FN_IRQ6_PG, IRQ6_PG_MARK),
1620 PINMUX_GPIO(GPIO_FN_IRQ5_PG, IRQ5_PG_MARK),
1621 PINMUX_GPIO(GPIO_FN_IRQ4_PG, IRQ4_PG_MARK),
1622 PINMUX_GPIO(GPIO_FN_IRQ3_PG, IRQ3_PG_MARK),
1623 PINMUX_GPIO(GPIO_FN_IRQ2_PG, IRQ2_PG_MARK),
1624 PINMUX_GPIO(GPIO_FN_IRQ1_PG, IRQ1_PG_MARK),
1625 PINMUX_GPIO(GPIO_FN_IRQ0_PG, IRQ0_PG_MARK),
1626 PINMUX_GPIO(GPIO_FN_IRQ7_PF, IRQ7_PF_MARK),
1627 PINMUX_GPIO(GPIO_FN_IRQ6_PF, IRQ6_PF_MARK),
1628 PINMUX_GPIO(GPIO_FN_IRQ5_PF, IRQ5_PF_MARK),
1629 PINMUX_GPIO(GPIO_FN_IRQ4_PF, IRQ4_PF_MARK),
1630 PINMUX_GPIO(GPIO_FN_IRQ3_PJ, IRQ3_PJ_MARK),
1631 PINMUX_GPIO(GPIO_FN_IRQ2_PJ, IRQ2_PJ_MARK),
1632 PINMUX_GPIO(GPIO_FN_IRQ1_PJ, IRQ1_PJ_MARK),
1633 PINMUX_GPIO(GPIO_FN_IRQ0_PJ, IRQ0_PJ_MARK),
1634 PINMUX_GPIO(GPIO_FN_IRQ1_PC, IRQ1_PC_MARK),
1635 PINMUX_GPIO(GPIO_FN_IRQ0_PC, IRQ0_PC_MARK),
1636
1637 PINMUX_GPIO(GPIO_FN_PINT7_PG, PINT7_PG_MARK),
1638 PINMUX_GPIO(GPIO_FN_PINT6_PG, PINT6_PG_MARK),
1639 PINMUX_GPIO(GPIO_FN_PINT5_PG, PINT5_PG_MARK),
1640 PINMUX_GPIO(GPIO_FN_PINT4_PG, PINT4_PG_MARK),
1641 PINMUX_GPIO(GPIO_FN_PINT3_PG, PINT3_PG_MARK),
1642 PINMUX_GPIO(GPIO_FN_PINT2_PG, PINT2_PG_MARK),
1643 PINMUX_GPIO(GPIO_FN_PINT1_PG, PINT1_PG_MARK),
1644 PINMUX_GPIO(GPIO_FN_PINT0_PG, PINT0_PG_MARK),
1645 PINMUX_GPIO(GPIO_FN_PINT7_PH, PINT7_PH_MARK),
1646 PINMUX_GPIO(GPIO_FN_PINT6_PH, PINT6_PH_MARK),
1647 PINMUX_GPIO(GPIO_FN_PINT5_PH, PINT5_PH_MARK),
1648 PINMUX_GPIO(GPIO_FN_PINT4_PH, PINT4_PH_MARK),
1649 PINMUX_GPIO(GPIO_FN_PINT3_PH, PINT3_PH_MARK),
1650 PINMUX_GPIO(GPIO_FN_PINT2_PH, PINT2_PH_MARK),
1651 PINMUX_GPIO(GPIO_FN_PINT1_PH, PINT1_PH_MARK),
1652 PINMUX_GPIO(GPIO_FN_PINT0_PH, PINT0_PH_MARK),
1653 PINMUX_GPIO(GPIO_FN_PINT7_PJ, PINT7_PJ_MARK),
1654 PINMUX_GPIO(GPIO_FN_PINT6_PJ, PINT6_PJ_MARK),
1655 PINMUX_GPIO(GPIO_FN_PINT5_PJ, PINT5_PJ_MARK),
1656 PINMUX_GPIO(GPIO_FN_PINT4_PJ, PINT4_PJ_MARK),
1657 PINMUX_GPIO(GPIO_FN_PINT3_PJ, PINT3_PJ_MARK),
1658 PINMUX_GPIO(GPIO_FN_PINT2_PJ, PINT2_PJ_MARK),
1659 PINMUX_GPIO(GPIO_FN_PINT1_PJ, PINT1_PJ_MARK),
1660 PINMUX_GPIO(GPIO_FN_PINT0_PJ, PINT0_PJ_MARK),
1661
1662 /* WDT */
1663 PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK),
1664
1665 /* CAN */
1666 PINMUX_GPIO(GPIO_FN_CTX1, CTX1_MARK),
1667 PINMUX_GPIO(GPIO_FN_CRX1, CRX1_MARK),
1668 PINMUX_GPIO(GPIO_FN_CTX0, CTX0_MARK),
1669 PINMUX_GPIO(GPIO_FN_CRX0, CRX0_MARK),
1670 PINMUX_GPIO(GPIO_FN_CRX0_CRX1, CRX0_CRX1_MARK),
1671 PINMUX_GPIO(GPIO_FN_CRX0_CRX1_CRX2, CRX0_CRX1_CRX2_MARK),
1672
1673 /* DMAC */
1674 PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK),
1675 PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
1676 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
1677 PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK),
1678 PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
1679 PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
1680
1681 /* ADC */
1682 PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK),
1683
1684 /* BSCh */
1685 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
1686 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
1687 PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
1688 PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
1689 PINMUX_GPIO(GPIO_FN_A21, A21_MARK),
1690 PINMUX_GPIO(GPIO_FN_A20, A20_MARK),
1691 PINMUX_GPIO(GPIO_FN_A19, A19_MARK),
1692 PINMUX_GPIO(GPIO_FN_A18, A18_MARK),
1693 PINMUX_GPIO(GPIO_FN_A17, A17_MARK),
1694 PINMUX_GPIO(GPIO_FN_A16, A16_MARK),
1695 PINMUX_GPIO(GPIO_FN_A15, A15_MARK),
1696 PINMUX_GPIO(GPIO_FN_A14, A14_MARK),
1697 PINMUX_GPIO(GPIO_FN_A13, A13_MARK),
1698 PINMUX_GPIO(GPIO_FN_A12, A12_MARK),
1699 PINMUX_GPIO(GPIO_FN_A11, A11_MARK),
1700 PINMUX_GPIO(GPIO_FN_A10, A10_MARK),
1701 PINMUX_GPIO(GPIO_FN_A9, A9_MARK),
1702 PINMUX_GPIO(GPIO_FN_A8, A8_MARK),
1703 PINMUX_GPIO(GPIO_FN_A7, A7_MARK),
1704 PINMUX_GPIO(GPIO_FN_A6, A6_MARK),
1705 PINMUX_GPIO(GPIO_FN_A5, A5_MARK),
1706 PINMUX_GPIO(GPIO_FN_A4, A4_MARK),
1707 PINMUX_GPIO(GPIO_FN_A3, A3_MARK),
1708 PINMUX_GPIO(GPIO_FN_A2, A2_MARK),
1709 PINMUX_GPIO(GPIO_FN_A1, A1_MARK),
1710 PINMUX_GPIO(GPIO_FN_A0, A0_MARK),
1711
1712 PINMUX_GPIO(GPIO_FN_D15, D15_MARK),
1713 PINMUX_GPIO(GPIO_FN_D14, D14_MARK),
1714 PINMUX_GPIO(GPIO_FN_D13, D13_MARK),
1715 PINMUX_GPIO(GPIO_FN_D12, D12_MARK),
1716 PINMUX_GPIO(GPIO_FN_D11, D11_MARK),
1717 PINMUX_GPIO(GPIO_FN_D10, D10_MARK),
1718 PINMUX_GPIO(GPIO_FN_D9, D9_MARK),
1719 PINMUX_GPIO(GPIO_FN_D8, D8_MARK),
1720 PINMUX_GPIO(GPIO_FN_D7, D7_MARK),
1721 PINMUX_GPIO(GPIO_FN_D6, D6_MARK),
1722 PINMUX_GPIO(GPIO_FN_D5, D5_MARK),
1723 PINMUX_GPIO(GPIO_FN_D4, D4_MARK),
1724 PINMUX_GPIO(GPIO_FN_D3, D3_MARK),
1725 PINMUX_GPIO(GPIO_FN_D2, D2_MARK),
1726 PINMUX_GPIO(GPIO_FN_D1, D1_MARK),
1727 PINMUX_GPIO(GPIO_FN_D0, D0_MARK),
1728
1729 PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
1730 PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
1731 PINMUX_GPIO(GPIO_FN_CS3, CS3_MARK),
1732 PINMUX_GPIO(GPIO_FN_CS2, CS2_MARK),
1733 PINMUX_GPIO(GPIO_FN_CS1, CS1_MARK),
1734 PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK),
1735 PINMUX_GPIO(GPIO_FN_CS5CE1A, CS5CE1A_MARK),
1736 PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK),
1737 PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK),
1738 PINMUX_GPIO(GPIO_FN_RD, RD_MARK),
1739 PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK),
1740 PINMUX_GPIO(GPIO_FN_WE3ICIOWRAHDQMUU, WE3ICIOWRAHDQMUU_MARK),
1741 PINMUX_GPIO(GPIO_FN_WE2ICIORDDQMUL, WE2ICIORDDQMUL_MARK),
1742 PINMUX_GPIO(GPIO_FN_WE1DQMUWE, WE1DQMUWE_MARK),
1743 PINMUX_GPIO(GPIO_FN_WE0DQML, WE0DQML_MARK),
1744 PINMUX_GPIO(GPIO_FN_RAS, RAS_MARK),
1745 PINMUX_GPIO(GPIO_FN_CAS, CAS_MARK),
1746 PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK),
1747 PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK),
1748 PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK),
1749 PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK),
1750 PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
1751
1752 /* TMU */
1753 PINMUX_GPIO(GPIO_FN_TIOC4D, TIOC4D_MARK),
1754 PINMUX_GPIO(GPIO_FN_TIOC4C, TIOC4C_MARK),
1755 PINMUX_GPIO(GPIO_FN_TIOC4B, TIOC4B_MARK),
1756 PINMUX_GPIO(GPIO_FN_TIOC4A, TIOC4A_MARK),
1757 PINMUX_GPIO(GPIO_FN_TIOC3D, TIOC3D_MARK),
1758 PINMUX_GPIO(GPIO_FN_TIOC3C, TIOC3C_MARK),
1759 PINMUX_GPIO(GPIO_FN_TIOC3B, TIOC3B_MARK),
1760 PINMUX_GPIO(GPIO_FN_TIOC3A, TIOC3A_MARK),
1761 PINMUX_GPIO(GPIO_FN_TIOC2B, TIOC2B_MARK),
1762 PINMUX_GPIO(GPIO_FN_TIOC1B, TIOC1B_MARK),
1763 PINMUX_GPIO(GPIO_FN_TIOC2A, TIOC2A_MARK),
1764 PINMUX_GPIO(GPIO_FN_TIOC1A, TIOC1A_MARK),
1765 PINMUX_GPIO(GPIO_FN_TIOC0D, TIOC0D_MARK),
1766 PINMUX_GPIO(GPIO_FN_TIOC0C, TIOC0C_MARK),
1767 PINMUX_GPIO(GPIO_FN_TIOC0B, TIOC0B_MARK),
1768 PINMUX_GPIO(GPIO_FN_TIOC0A, TIOC0A_MARK),
1769 PINMUX_GPIO(GPIO_FN_TCLKD, TCLKD_MARK),
1770 PINMUX_GPIO(GPIO_FN_TCLKC, TCLKC_MARK),
1771 PINMUX_GPIO(GPIO_FN_TCLKB, TCLKB_MARK),
1772 PINMUX_GPIO(GPIO_FN_TCLKA, TCLKA_MARK),
1773
1774 /* SCIF */
1775 PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK),
1776 PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK),
1777 PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK),
1778 PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK),
1779 PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK),
1780 PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK),
1781 PINMUX_GPIO(GPIO_FN_RTS1, RTS1_MARK),
1782 PINMUX_GPIO(GPIO_FN_CTS1, CTS1_MARK),
1783 PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),
1784 PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),
1785 PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),
1786 PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
1787 PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),
1788 PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),
1789 PINMUX_GPIO(GPIO_FN_SCK4, SCK4_MARK),
1790 PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK),
1791 PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK),
1792 PINMUX_GPIO(GPIO_FN_SCK5, SCK5_MARK),
1793 PINMUX_GPIO(GPIO_FN_TXD5, TXD5_MARK),
1794 PINMUX_GPIO(GPIO_FN_RXD5, RXD5_MARK),
1795 PINMUX_GPIO(GPIO_FN_RTS5, RTS5_MARK),
1796 PINMUX_GPIO(GPIO_FN_CTS5, CTS5_MARK),
1797 PINMUX_GPIO(GPIO_FN_SCK6, SCK6_MARK),
1798 PINMUX_GPIO(GPIO_FN_TXD6, TXD6_MARK),
1799 PINMUX_GPIO(GPIO_FN_RXD6, RXD6_MARK),
1800 PINMUX_GPIO(GPIO_FN_SCK7, SCK7_MARK),
1801 PINMUX_GPIO(GPIO_FN_TXD7, TXD7_MARK),
1802 PINMUX_GPIO(GPIO_FN_RXD7, RXD7_MARK),
1803 PINMUX_GPIO(GPIO_FN_RTS7, RTS7_MARK),
1804 PINMUX_GPIO(GPIO_FN_CTS7, CTS7_MARK),
1805
1806 /* RSPI */
1807 PINMUX_GPIO(GPIO_FN_RSPCK0_PJ16, RSPCK0_PJ16_MARK),
1808 PINMUX_GPIO(GPIO_FN_SSL00_PJ17, SSL00_PJ17_MARK),
1809 PINMUX_GPIO(GPIO_FN_MOSI0_PJ18, MOSI0_PJ18_MARK),
1810 PINMUX_GPIO(GPIO_FN_MISO0_PJ19, MISO0_PJ19_MARK),
1811 PINMUX_GPIO(GPIO_FN_RSPCK0_PB17, RSPCK0_PB17_MARK),
1812 PINMUX_GPIO(GPIO_FN_SSL00_PB18, SSL00_PB18_MARK),
1813 PINMUX_GPIO(GPIO_FN_MOSI0_PB19, MOSI0_PB19_MARK),
1814 PINMUX_GPIO(GPIO_FN_MISO0_PB20, MISO0_PB20_MARK),
1815 PINMUX_GPIO(GPIO_FN_RSPCK1, RSPCK1_MARK),
1816 PINMUX_GPIO(GPIO_FN_MOSI1, MOSI1_MARK),
1817 PINMUX_GPIO(GPIO_FN_MISO1, MISO1_MARK),
1818 PINMUX_GPIO(GPIO_FN_SSL10, SSL10_MARK),
1819
1820 /* IIC3 */
1821 PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK),
1822 PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK),
1823 PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK),
1824 PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK),
1825 PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK),
1826 PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK),
1827
1828 /* SSI */
1829 PINMUX_GPIO(GPIO_FN_SSISCK0, SSISCK0_MARK),
1830 PINMUX_GPIO(GPIO_FN_SSIWS0, SSIWS0_MARK),
1831 PINMUX_GPIO(GPIO_FN_SSITXD0, SSITXD0_MARK),
1832 PINMUX_GPIO(GPIO_FN_SSIRXD0, SSIRXD0_MARK),
1833 PINMUX_GPIO(GPIO_FN_SSIWS1, SSIWS1_MARK),
1834 PINMUX_GPIO(GPIO_FN_SSIWS2, SSIWS2_MARK),
1835 PINMUX_GPIO(GPIO_FN_SSIWS3, SSIWS3_MARK),
1836 PINMUX_GPIO(GPIO_FN_SSISCK1, SSISCK1_MARK),
1837 PINMUX_GPIO(GPIO_FN_SSISCK2, SSISCK2_MARK),
1838 PINMUX_GPIO(GPIO_FN_SSISCK3, SSISCK3_MARK),
1839 PINMUX_GPIO(GPIO_FN_SSIDATA1, SSIDATA1_MARK),
1840 PINMUX_GPIO(GPIO_FN_SSIDATA2, SSIDATA2_MARK),
1841 PINMUX_GPIO(GPIO_FN_SSIDATA3, SSIDATA3_MARK),
1842 PINMUX_GPIO(GPIO_FN_AUDIO_CLK, AUDIO_CLK_MARK),
1843 PINMUX_GPIO(GPIO_FN_AUDIO_XOUT, AUDIO_XOUT_MARK),
1844
1845 /* SIOF */ /* NOTE Shares AUDIO_CLK with SSI */
1846 PINMUX_GPIO(GPIO_FN_SIOFTXD, SIOFTXD_MARK),
1847 PINMUX_GPIO(GPIO_FN_SIOFRXD, SIOFRXD_MARK),
1848 PINMUX_GPIO(GPIO_FN_SIOFSYNC, SIOFSYNC_MARK),
1849 PINMUX_GPIO(GPIO_FN_SIOFSCK, SIOFSCK_MARK),
1850
1851 /* SPDIF */ /* NOTE Shares AUDIO_CLK with SSI */
1852 PINMUX_GPIO(GPIO_FN_SPDIF_IN, SPDIF_IN_MARK),
1853 PINMUX_GPIO(GPIO_FN_SPDIF_OUT, SPDIF_OUT_MARK),
1854
1855 /* NANDFMC */ /* NOTE Controller is not available in boot mode 0 */
1856 PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK),
1857 PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),
1858
1859 /* VDC3 */
1860 PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK),
1861 PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK),
1862 PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK),
1863
1864 PINMUX_GPIO(GPIO_FN_DV_DATA23, DV_DATA23_MARK),
1865 PINMUX_GPIO(GPIO_FN_DV_DATA22, DV_DATA22_MARK),
1866 PINMUX_GPIO(GPIO_FN_DV_DATA21, DV_DATA21_MARK),
1867 PINMUX_GPIO(GPIO_FN_DV_DATA20, DV_DATA20_MARK),
1868 PINMUX_GPIO(GPIO_FN_DV_DATA19, DV_DATA19_MARK),
1869 PINMUX_GPIO(GPIO_FN_DV_DATA18, DV_DATA18_MARK),
1870 PINMUX_GPIO(GPIO_FN_DV_DATA17, DV_DATA17_MARK),
1871 PINMUX_GPIO(GPIO_FN_DV_DATA16, DV_DATA16_MARK),
1872 PINMUX_GPIO(GPIO_FN_DV_DATA15, DV_DATA15_MARK),
1873 PINMUX_GPIO(GPIO_FN_DV_DATA14, DV_DATA14_MARK),
1874 PINMUX_GPIO(GPIO_FN_DV_DATA13, DV_DATA13_MARK),
1875 PINMUX_GPIO(GPIO_FN_DV_DATA12, DV_DATA12_MARK),
1876 PINMUX_GPIO(GPIO_FN_DV_DATA11, DV_DATA11_MARK),
1877 PINMUX_GPIO(GPIO_FN_DV_DATA10, DV_DATA10_MARK),
1878 PINMUX_GPIO(GPIO_FN_DV_DATA9, DV_DATA9_MARK),
1879 PINMUX_GPIO(GPIO_FN_DV_DATA8, DV_DATA8_MARK),
1880 PINMUX_GPIO(GPIO_FN_DV_DATA7, DV_DATA7_MARK),
1881 PINMUX_GPIO(GPIO_FN_DV_DATA6, DV_DATA6_MARK),
1882 PINMUX_GPIO(GPIO_FN_DV_DATA5, DV_DATA5_MARK),
1883 PINMUX_GPIO(GPIO_FN_DV_DATA4, DV_DATA4_MARK),
1884 PINMUX_GPIO(GPIO_FN_DV_DATA3, DV_DATA3_MARK),
1885 PINMUX_GPIO(GPIO_FN_DV_DATA2, DV_DATA2_MARK),
1886 PINMUX_GPIO(GPIO_FN_DV_DATA1, DV_DATA1_MARK),
1887 PINMUX_GPIO(GPIO_FN_DV_DATA0, DV_DATA0_MARK),
1888
1889 PINMUX_GPIO(GPIO_FN_LCD_CLK, LCD_CLK_MARK),
1890 PINMUX_GPIO(GPIO_FN_LCD_EXTCLK, LCD_EXTCLK_MARK),
1891 PINMUX_GPIO(GPIO_FN_LCD_VSYNC, LCD_VSYNC_MARK),
1892 PINMUX_GPIO(GPIO_FN_LCD_HSYNC, LCD_HSYNC_MARK),
1893 PINMUX_GPIO(GPIO_FN_LCD_DE, LCD_DE_MARK),
1894
1895 PINMUX_GPIO(GPIO_FN_LCD_DATA23_PG23, LCD_DATA23_PG23_MARK),
1896 PINMUX_GPIO(GPIO_FN_LCD_DATA22_PG22, LCD_DATA22_PG22_MARK),
1897 PINMUX_GPIO(GPIO_FN_LCD_DATA21_PG21, LCD_DATA21_PG21_MARK),
1898 PINMUX_GPIO(GPIO_FN_LCD_DATA20_PG20, LCD_DATA20_PG20_MARK),
1899 PINMUX_GPIO(GPIO_FN_LCD_DATA19_PG19, LCD_DATA19_PG19_MARK),
1900 PINMUX_GPIO(GPIO_FN_LCD_DATA18_PG18, LCD_DATA18_PG18_MARK),
1901 PINMUX_GPIO(GPIO_FN_LCD_DATA17_PG17, LCD_DATA17_PG17_MARK),
1902 PINMUX_GPIO(GPIO_FN_LCD_DATA16_PG16, LCD_DATA16_PG16_MARK),
1903 PINMUX_GPIO(GPIO_FN_LCD_DATA15_PG15, LCD_DATA15_PG15_MARK),
1904 PINMUX_GPIO(GPIO_FN_LCD_DATA14_PG14, LCD_DATA14_PG14_MARK),
1905 PINMUX_GPIO(GPIO_FN_LCD_DATA13_PG13, LCD_DATA13_PG13_MARK),
1906 PINMUX_GPIO(GPIO_FN_LCD_DATA12_PG12, LCD_DATA12_PG12_MARK),
1907 PINMUX_GPIO(GPIO_FN_LCD_DATA11_PG11, LCD_DATA11_PG11_MARK),
1908 PINMUX_GPIO(GPIO_FN_LCD_DATA10_PG10, LCD_DATA10_PG10_MARK),
1909 PINMUX_GPIO(GPIO_FN_LCD_DATA9_PG9, LCD_DATA9_PG9_MARK),
1910 PINMUX_GPIO(GPIO_FN_LCD_DATA8_PG8, LCD_DATA8_PG8_MARK),
1911 PINMUX_GPIO(GPIO_FN_LCD_DATA7_PG7, LCD_DATA7_PG7_MARK),
1912 PINMUX_GPIO(GPIO_FN_LCD_DATA6_PG6, LCD_DATA6_PG6_MARK),
1913 PINMUX_GPIO(GPIO_FN_LCD_DATA5_PG5, LCD_DATA5_PG5_MARK),
1914 PINMUX_GPIO(GPIO_FN_LCD_DATA4_PG4, LCD_DATA4_PG4_MARK),
1915 PINMUX_GPIO(GPIO_FN_LCD_DATA3_PG3, LCD_DATA3_PG3_MARK),
1916 PINMUX_GPIO(GPIO_FN_LCD_DATA2_PG2, LCD_DATA2_PG2_MARK),
1917 PINMUX_GPIO(GPIO_FN_LCD_DATA1_PG1, LCD_DATA1_PG1_MARK),
1918 PINMUX_GPIO(GPIO_FN_LCD_DATA0_PG0, LCD_DATA0_PG0_MARK),
1919
1920 PINMUX_GPIO(GPIO_FN_LCD_DATA23_PJ23, LCD_DATA23_PJ23_MARK),
1921 PINMUX_GPIO(GPIO_FN_LCD_DATA22_PJ22, LCD_DATA22_PJ22_MARK),
1922 PINMUX_GPIO(GPIO_FN_LCD_DATA21_PJ21, LCD_DATA21_PJ21_MARK),
1923 PINMUX_GPIO(GPIO_FN_LCD_DATA20_PJ20, LCD_DATA20_PJ20_MARK),
1924 PINMUX_GPIO(GPIO_FN_LCD_DATA19_PJ19, LCD_DATA19_PJ19_MARK),
1925 PINMUX_GPIO(GPIO_FN_LCD_DATA18_PJ18, LCD_DATA18_PJ18_MARK),
1926 PINMUX_GPIO(GPIO_FN_LCD_DATA17_PJ17, LCD_DATA17_PJ17_MARK),
1927 PINMUX_GPIO(GPIO_FN_LCD_DATA16_PJ16, LCD_DATA16_PJ16_MARK),
1928 PINMUX_GPIO(GPIO_FN_LCD_DATA15_PJ15, LCD_DATA15_PJ15_MARK),
1929 PINMUX_GPIO(GPIO_FN_LCD_DATA14_PJ14, LCD_DATA14_PJ14_MARK),
1930 PINMUX_GPIO(GPIO_FN_LCD_DATA13_PJ13, LCD_DATA13_PJ13_MARK),
1931 PINMUX_GPIO(GPIO_FN_LCD_DATA12_PJ12, LCD_DATA12_PJ12_MARK),
1932 PINMUX_GPIO(GPIO_FN_LCD_DATA11_PJ11, LCD_DATA11_PJ11_MARK),
1933 PINMUX_GPIO(GPIO_FN_LCD_DATA10_PJ10, LCD_DATA10_PJ10_MARK),
1934 PINMUX_GPIO(GPIO_FN_LCD_DATA9_PJ9, LCD_DATA9_PJ9_MARK),
1935 PINMUX_GPIO(GPIO_FN_LCD_DATA8_PJ8, LCD_DATA8_PJ8_MARK),
1936 PINMUX_GPIO(GPIO_FN_LCD_DATA7_PJ7, LCD_DATA7_PJ7_MARK),
1937 PINMUX_GPIO(GPIO_FN_LCD_DATA6_PJ6, LCD_DATA6_PJ6_MARK),
1938 PINMUX_GPIO(GPIO_FN_LCD_DATA5_PJ5, LCD_DATA5_PJ5_MARK),
1939 PINMUX_GPIO(GPIO_FN_LCD_DATA4_PJ4, LCD_DATA4_PJ4_MARK),
1940 PINMUX_GPIO(GPIO_FN_LCD_DATA3_PJ3, LCD_DATA3_PJ3_MARK),
1941 PINMUX_GPIO(GPIO_FN_LCD_DATA2_PJ2, LCD_DATA2_PJ2_MARK),
1942 PINMUX_GPIO(GPIO_FN_LCD_DATA1_PJ1, LCD_DATA1_PJ1_MARK),
1943 PINMUX_GPIO(GPIO_FN_LCD_DATA0_PJ0, LCD_DATA0_PJ0_MARK),
1944
1945 PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK),
1946};
1947
1948static struct pinmux_cfg_reg pinmux_config_regs[] = {
1949 /* "name" addr register_size Field_Width */
1950
1951 /* where Field_Width is 1 for single mode registers or 4 for upto 16
1952 mode registers and modes are described in assending order [0..16] */
1953
1954 { PINMUX_CFG_REG("PAIOR0", 0xfffe3812, 16, 1) {
1955 0, 0, 0, 0, 0, 0, 0, 0,
1956 0, 0, 0, 0, 0, 0, PA1_IN, PA1_OUT,
1957 0, 0, 0, 0, 0, 0, 0, 0,
1958 0, 0, 0, 0, 0, 0, PA0_IN, PA0_OUT }
1959 },
1960 { PINMUX_CFG_REG("PBCR5", 0xfffe3824, 16, 4) {
1961 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1962
1963 PB22MD_000, PB22MD_001, PB22MD_010, PB22MD_011,
1964 PB22MD_100, PB22MD_101, PB22MD_110, PB22MD_111,
1965 0, 0, 0, 0, 0, 0, 0, 0,
1966
1967 PB21MD_00, PB21MD_01, PB21MD_10, PB21MD_11, 0, 0, 0, 0,
1968 0, 0, 0, 0, 0, 0, 0, 0,
1969
1970 PB20MD_000, PB20MD_001, PB20MD_010, PB20MD_011,
1971 PB20MD_100, PB20MD_101, PB20MD_110, PB20MD_111,
1972 0, 0, 0, 0, 0, 0, 0, 0 }
1973 },
1974 { PINMUX_CFG_REG("PBCR4", 0xfffe3826, 16, 4) {
1975 PB19MD_000, PB19MD_001, PB19MD_010, PB19MD_011,
1976 PB19MD_100, PB19MD_101, PB19MD_110, PB19MD_111,
1977 0, 0, 0, 0, 0, 0, 0, 0,
1978
1979 PB18MD_000, PB18MD_001, PB18MD_010, PB18MD_011,
1980 PB18MD_100, PB18MD_101, PB18MD_110, PB18MD_111,
1981 0, 0, 0, 0, 0, 0, 0, 0,
1982
1983 PB17MD_000, PB17MD_001, PB17MD_010, PB17MD_011,
1984 PB17MD_100, PB17MD_101, PB17MD_110, PB17MD_111,
1985 0, 0, 0, 0, 0, 0, 0, 0,
1986
1987 PB16MD_000, PB16MD_001, PB16MD_010, PB16MD_011,
1988 PB16MD_100, PB16MD_101, PB16MD_110, PB16MD_111,
1989 0, 0, 0, 0, 0, 0, 0, 0 }
1990 },
1991 { PINMUX_CFG_REG("PBCR3", 0xfffe3828, 16, 4) {
1992 PB15MD_000, PB15MD_001, PB15MD_010, PB15MD_011,
1993 PB15MD_100, PB15MD_101, PB15MD_110, PB15MD_111,
1994 0, 0, 0, 0, 0, 0, 0, 0,
1995
1996 PB14MD_000, PB14MD_001, PB14MD_010, PB14MD_011,
1997 PB14MD_100, PB14MD_101, PB14MD_110, PB14MD_111,
1998 0, 0, 0, 0, 0, 0, 0, 0,
1999
2000 PB13MD_000, PB13MD_001, PB13MD_010, PB13MD_011,
2001 PB13MD_100, PB13MD_101, PB13MD_110, PB13MD_111,
2002 0, 0, 0, 0, 0, 0, 0, 0,
2003
2004 PB12MD_00, PB12MD_01, PB12MD_10, PB12MD_11, 0, 0, 0, 0,
2005 0, 0, 0, 0, 0, 0, 0, 0 }
2006 },
2007 { PINMUX_CFG_REG("PBCR2", 0xfffe382a, 16, 4) {
2008 PB11MD_00, PB11MD_01, PB11MD_10, PB11MD_11, 0, 0, 0, 0,
2009 0, 0, 0, 0, 0, 0, 0, 0,
2010
2011 PB10MD_00, PB10MD_01, PB10MD_10, PB10MD_11, 0, 0, 0, 0,
2012 0, 0, 0, 0, 0, 0, 0, 0,
2013
2014 PB9MD_00, PB9MD_01, PB9MD_10, PB9MD_11, 0, 0, 0, 0,
2015 0, 0, 0, 0, 0, 0, 0, 0,
2016
2017 PB8MD_00, PB8MD_01, PB8MD_10, PB8MD_11, 0, 0, 0, 0,
2018 0, 0, 0, 0, 0, 0, 0, 0 }
2019 },
2020 { PINMUX_CFG_REG("PBCR1", 0xfffe382c, 16, 4) {
2021 PB7MD_00, PB7MD_01, PB7MD_10, PB7MD_11, 0, 0, 0, 0,
2022 0, 0, 0, 0, 0, 0, 0, 0,
2023
2024 PB6MD_00, PB6MD_01, PB6MD_10, PB6MD_11, 0, 0, 0, 0,
2025 0, 0, 0, 0, 0, 0, 0, 0,
2026
2027 PB5MD_00, PB5MD_01, PB5MD_10, PB5MD_11, 0, 0, 0, 0,
2028 0, 0, 0, 0, 0, 0, 0, 0,
2029
2030 PB4MD_00, PB4MD_01, PB4MD_10, PB4MD_11, 0, 0, 0, 0,
2031 0, 0, 0, 0, 0, 0, 0, 0 }
2032 },
2033 { PINMUX_CFG_REG("PBCR0", 0xfffe382e, 16, 4) {
2034 PB3MD_00, PB3MD_01, PB3MD_10, PB3MD_11, 0, 0, 0, 0,
2035 0, 0, 0, 0, 0, 0, 0, 0,
2036
2037 PB2MD_00, PB2MD_01, PB2MD_10, PB2MD_11, 0, 0, 0, 0,
2038 0, 0, 0, 0, 0, 0, 0, 0,
2039
2040 PB1MD_00, PB1MD_01, PB1MD_10, PB1MD_11, 0, 0, 0, 0,
2041 0, 0, 0, 0, 0, 0, 0, 0,
2042
2043 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }
2044 },
2045
2046 { PINMUX_CFG_REG("PBIOR1", 0xfffe3830, 16, 1) {
2047 0, 0, 0, 0, 0, 0, 0, 0,
2048 0, 0, 0, 0, 0, 0, 0, 0,
2049 0, 0,
2050 PB22_IN, PB22_OUT,
2051 PB21_IN, PB21_OUT,
2052 PB20_IN, PB20_OUT,
2053 PB19_IN, PB19_OUT,
2054 PB18_IN, PB18_OUT,
2055 PB17_IN, PB17_OUT,
2056 PB16_IN, PB16_OUT }
2057 },
2058 { PINMUX_CFG_REG("PBIOR0", 0xfffe3832, 16, 1) {
2059 PB15_IN, PB15_OUT,
2060 PB14_IN, PB14_OUT,
2061 PB13_IN, PB13_OUT,
2062 PB12_IN, PB12_OUT,
2063 PB11_IN, PB11_OUT,
2064 PB10_IN, PB10_OUT,
2065 PB9_IN, PB9_OUT,
2066 PB8_IN, PB8_OUT,
2067 PB7_IN, PB7_OUT,
2068 PB6_IN, PB6_OUT,
2069 PB5_IN, PB5_OUT,
2070 PB4_IN, PB4_OUT,
2071 PB3_IN, PB3_OUT,
2072 PB2_IN, PB2_OUT,
2073 PB1_IN, PB1_OUT,
2074 0, 0 }
2075 },
2076
2077 { PINMUX_CFG_REG("PCCR2", 0xfffe384a, 16, 4) {
2078 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2079
2080 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2081
2082 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2083
2084 PC8MD_000, PC8MD_001, PC8MD_010, PC8MD_011,
2085 PC8MD_100, PC8MD_101, PC8MD_110, PC8MD_111,
2086 0, 0, 0, 0, 0, 0, 0, 0 }
2087 },
2088 { PINMUX_CFG_REG("PCCR1", 0xfffe384c, 16, 4) {
2089 PC7MD_000, PC7MD_001, PC7MD_010, PC7MD_011,
2090 PC7MD_100, PC7MD_101, PC7MD_110, PC7MD_111,
2091 0, 0, 0, 0, 0, 0, 0, 0,
2092
2093 PC6MD_000, PC6MD_001, PC6MD_010, PC6MD_011,
2094 PC6MD_100, PC6MD_101, PC6MD_110, PC6MD_111,
2095 0, 0, 0, 0, 0, 0, 0, 0,
2096
2097 PC5MD_000, PC5MD_001, PC5MD_010, PC5MD_011,
2098 PC5MD_100, PC5MD_101, PC5MD_110, PC5MD_111,
2099 0, 0, 0, 0, 0, 0, 0, 0,
2100
2101 PC4MD_00, PC4MD_01, PC4MD_10, PC4MD_11, 0, 0, 0, 0,
2102 0, 0, 0, 0, 0, 0, 0, 0 }
2103 },
2104 { PINMUX_CFG_REG("PCCR0", 0xfffe384e, 16, 4) {
2105 PC3MD_00, PC3MD_01, PC3MD_10, PC3MD_11, 0, 0, 0, 0,
2106 0, 0, 0, 0, 0, 0, 0, 0,
2107
2108 PC2MD_00, PC2MD_01, PC2MD_10, PC2MD_11, 0, 0, 0, 0,
2109 0, 0, 0, 0, 0, 0, 0, 0,
2110
2111 PC1MD_0, PC1MD_1, 0, 0, 0, 0, 0, 0,
2112 0, 0, 0, 0, 0, 0, 0, 0,
2113
2114 PC0MD_0, PC0MD_1, 0, 0, 0, 0, 0, 0,
2115 0, 0, 0, 0, 0, 0, 0, 0 }
2116 },
2117
2118 { PINMUX_CFG_REG("PCIOR0", 0xfffe3852, 16, 1) {
2119 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2120 PC8_IN, PC8_OUT,
2121 PC7_IN, PC7_OUT,
2122 PC6_IN, PC6_OUT,
2123 PC5_IN, PC5_OUT,
2124 PC4_IN, PC4_OUT,
2125 PC3_IN, PC3_OUT,
2126 PC2_IN, PC2_OUT,
2127 PC1_IN, PC1_OUT,
2128 PC0_IN, PC0_OUT }
2129 },
2130
2131 { PINMUX_CFG_REG("PDCR3", 0xfffe3868, 16, 4) {
2132 PD15MD_00, PD15MD_01, PD15MD_10, PD15MD_11, 0, 0, 0, 0,
2133 0, 0, 0, 0, 0, 0, 0, 0,
2134
2135 PD14MD_00, PD14MD_01, PD14MD_10, PD14MD_11, 0, 0, 0, 0,
2136 0, 0, 0, 0, 0, 0, 0, 0,
2137
2138 PD13MD_00, PD13MD_01, PD13MD_10, PD13MD_11, 0, 0, 0, 0,
2139 0, 0, 0, 0, 0, 0, 0, 0,
2140
2141 PD12MD_00, PD12MD_01, PD12MD_10, PD12MD_11, 0, 0, 0, 0,
2142 0, 0, 0, 0, 0, 0, 0, 0 }
2143 },
2144 { PINMUX_CFG_REG("PDCR2", 0xfffe386a, 16, 4) {
2145 PD11MD_00, PD11MD_01, PD11MD_10, PD11MD_11, 0, 0, 0, 0,
2146 0, 0, 0, 0, 0, 0, 0, 0,
2147
2148 PD10MD_00, PD10MD_01, PD10MD_10, PD10MD_11, 0, 0, 0, 0,
2149 0, 0, 0, 0, 0, 0, 0, 0,
2150
2151 PD9MD_00, PD9MD_01, PD9MD_10, PD9MD_11, 0, 0, 0, 0,
2152 0, 0, 0, 0, 0, 0, 0, 0,
2153
2154 PD8MD_00, PD8MD_01, PD8MD_10, PD8MD_11, 0, 0, 0, 0,
2155 0, 0, 0, 0, 0, 0, 0, 0 }
2156 },
2157 { PINMUX_CFG_REG("PDCR1", 0xfffe386c, 16, 4) {
2158 PD7MD_00, PD7MD_01, PD7MD_10, PD7MD_11, 0, 0, 0, 0,
2159 0, 0, 0, 0, 0, 0, 0, 0,
2160
2161 PD6MD_00, PD6MD_01, PD6MD_10, PD6MD_11, 0, 0, 0, 0,
2162 0, 0, 0, 0, 0, 0, 0, 0,
2163
2164 PD5MD_00, PD5MD_01, PD5MD_10, PD5MD_11, 0, 0, 0, 0,
2165 0, 0, 0, 0, 0, 0, 0, 0,
2166
2167 PD4MD_00, PD4MD_01, PD4MD_10, PD4MD_11, 0, 0, 0, 0,
2168 0, 0, 0, 0, 0, 0, 0, 0 }
2169 },
2170 { PINMUX_CFG_REG("PDCR0", 0xfffe386e, 16, 4) {
2171 PD3MD_00, PD3MD_01, PD3MD_10, PD3MD_11, 0, 0, 0, 0,
2172 0, 0, 0, 0, 0, 0, 0, 0,
2173
2174 PD2MD_00, PD2MD_01, PD2MD_10, PD2MD_11, 0, 0, 0, 0,
2175 0, 0, 0, 0, 0, 0, 0, 0,
2176
2177 PD1MD_00, PD1MD_01, PD1MD_10, PD1MD_11, 0, 0, 0, 0,
2178 0, 0, 0, 0, 0, 0, 0, 0,
2179
2180 PD0MD_00, PD0MD_01, PD0MD_10, PD0MD_11, 0, 0, 0, 0,
2181 0, 0, 0, 0, 0, 0, 0, 0 }
2182 },
2183
2184 { PINMUX_CFG_REG("PDIOR0", 0xfffe3872, 16, 1) {
2185 PD15_IN, PD15_OUT,
2186 PD14_IN, PD14_OUT,
2187 PD13_IN, PD13_OUT,
2188 PD12_IN, PD12_OUT,
2189 PD11_IN, PD11_OUT,
2190 PD10_IN, PD10_OUT,
2191 PD9_IN, PD9_OUT,
2192 PD8_IN, PD8_OUT,
2193 PD7_IN, PD7_OUT,
2194 PD6_IN, PD6_OUT,
2195 PD5_IN, PD5_OUT,
2196 PD4_IN, PD4_OUT,
2197 PD3_IN, PD3_OUT,
2198 PD2_IN, PD2_OUT,
2199 PD1_IN, PD1_OUT,
2200 PD0_IN, PD0_OUT }
2201 },
2202
2203 { PINMUX_CFG_REG("PECR1", 0xfffe388c, 16, 4) {
2204 PE7MD_00, PE7MD_01, PE7MD_10, PE7MD_11, 0, 0, 0, 0,
2205 0, 0, 0, 0, 0, 0, 0, 0,
2206
2207 PE6MD_00, PE6MD_01, PE6MD_10, PE6MD_11, 0, 0, 0, 0,
2208 0, 0, 0, 0, 0, 0, 0, 0,
2209
2210 PE5MD_00, PE5MD_01, PE5MD_10, PE5MD_11, 0, 0, 0, 0,
2211 0, 0, 0, 0, 0, 0, 0, 0,
2212
2213 PE4MD_00, PE4MD_01, PE4MD_10, PE4MD_11, 0, 0, 0, 0,
2214 0, 0, 0, 0, 0, 0, 0, 0 }
2215 },
2216 { PINMUX_CFG_REG("PECR0", 0xfffe388e, 16, 4) {
2217 PE3MD_000, PE3MD_001, PE3MD_010, PE3MD_011,
2218 PE3MD_100, PE3MD_101, PE3MD_110, PE3MD_111,
2219 0, 0, 0, 0, 0, 0, 0, 0,
2220
2221 PE2MD_000, PE2MD_001, PE2MD_010, PE2MD_011,
2222 PE2MD_100, PE2MD_101, PE2MD_110, PE2MD_111,
2223 0, 0, 0, 0, 0, 0, 0, 0,
2224
2225 PE1MD_000, PE1MD_001, PE1MD_010, PE1MD_011,
2226 PE1MD_100, PE1MD_101, PE1MD_110, PE1MD_111,
2227 0, 0, 0, 0, 0, 0, 0, 0,
2228
2229 PE0MD_00, PE0MD_01, PE0MD_10, PE0MD_11, 0, 0, 0, 0,
2230 0, 0, 0, 0, 0, 0, 0, 0 }
2231 },
2232 { PINMUX_CFG_REG("PEIOR0", 0xfffe3892, 16, 1) {
2233 0, 0, 0, 0, 0, 0, 0, 0,
2234 0, 0, 0, 0, 0, 0, 0, 0,
2235 PE7_IN, PE7_OUT,
2236 PE6_IN, PE6_OUT,
2237 PE5_IN, PE5_OUT,
2238 PE4_IN, PE4_OUT,
2239 PE3_IN, PE3_OUT,
2240 PE2_IN, PE2_OUT,
2241 PE1_IN, PE1_OUT,
2242 PE0_IN, PE0_OUT }
2243 },
2244
2245 { PINMUX_CFG_REG("PFCR6", 0xfffe38a2, 16, 4) {
2246 PF23MD_000, PF23MD_001, PF23MD_010, PF23MD_011,
2247 PF23MD_100, PF23MD_101, PF23MD_110, PF23MD_111,
2248 0, 0, 0, 0, 0, 0, 0, 0,
2249
2250 PF22MD_000, PF22MD_001, PF22MD_010, PF22MD_011,
2251 PF22MD_100, PF22MD_101, PF22MD_110, PF22MD_111,
2252 0, 0, 0, 0, 0, 0, 0, 0,
2253
2254 PF21MD_000, PF21MD_001, PF21MD_010, PF21MD_011,
2255 PF21MD_100, PF21MD_101, PF21MD_110, PF21MD_111,
2256 0, 0, 0, 0, 0, 0, 0, 0,
2257
2258 PF20MD_000, PF20MD_001, PF20MD_010, PF20MD_011,
2259 PF20MD_100, PF20MD_101, PF20MD_110, PF20MD_111,
2260 0, 0, 0, 0, 0, 0, 0, 0 }
2261 },
2262 { PINMUX_CFG_REG("PFCR5", 0xfffe38a4, 16, 4) {
2263 PF19MD_000, PF19MD_001, PF19MD_010, PF19MD_011,
2264 PF19MD_100, PF19MD_101, PF19MD_110, PF19MD_111,
2265 0, 0, 0, 0, 0, 0, 0, 0,
2266
2267 PF18MD_000, PF18MD_001, PF18MD_010, PF18MD_011,
2268 PF18MD_100, PF18MD_101, PF18MD_110, PF18MD_111,
2269 0, 0, 0, 0, 0, 0, 0, 0,
2270
2271 PF17MD_000, PF17MD_001, PF17MD_010, PF17MD_011,
2272 PF17MD_100, PF17MD_101, PF17MD_110, PF17MD_111,
2273 0, 0, 0, 0, 0, 0, 0, 0,
2274
2275 PF16MD_000, PF16MD_001, PF16MD_010, PF16MD_011,
2276 PF16MD_100, PF16MD_101, PF16MD_110, PF16MD_111,
2277 0, 0, 0, 0, 0, 0, 0, 0 }
2278 },
2279 { PINMUX_CFG_REG("PFCR4", 0xfffe38a6, 16, 4) {
2280 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2281
2282 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2283
2284 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2285
2286 PF15MD_000, PF15MD_001, PF15MD_010, PF15MD_011,
2287 PF15MD_100, PF15MD_101, PF15MD_110, PF15MD_111,
2288 0, 0, 0, 0, 0, 0, 0, 0 }
2289 },
2290 { PINMUX_CFG_REG("PFCR3", 0xfffe38a8, 16, 4) {
2291 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2292
2293 PF14MD_000, PF14MD_001, PF14MD_010, PF14MD_011,
2294 PF14MD_100, PF14MD_101, PF14MD_110, PF14MD_111,
2295 0, 0, 0, 0, 0, 0, 0, 0,
2296
2297 PF13MD_000, PF13MD_001, PF13MD_010, PF13MD_011,
2298 PF13MD_100, PF13MD_101, PF13MD_110, PF13MD_111,
2299 0, 0, 0, 0, 0, 0, 0, 0,
2300
2301 PF12MD_000, PF12MD_001, PF12MD_010, PF12MD_011,
2302 PF12MD_100, PF12MD_101, PF12MD_110, PF12MD_111,
2303 0, 0, 0, 0, 0, 0, 0, 0 }
2304 },
2305 { PINMUX_CFG_REG("PFCR2", 0xfffe38aa, 16, 4) {
2306 PF11MD_000, PF11MD_001, PF11MD_010, PF11MD_011,
2307 PF11MD_100, PF11MD_101, PF11MD_110, PF11MD_111,
2308 0, 0, 0, 0, 0, 0, 0, 0,
2309
2310 PF10MD_000, PF10MD_001, PF10MD_010, PF10MD_011,
2311 PF10MD_100, PF10MD_101, PF10MD_110, PF10MD_111,
2312 0, 0, 0, 0, 0, 0, 0, 0,
2313
2314 PF9MD_000, PF9MD_001, PF9MD_010, PF9MD_011,
2315 PF9MD_100, PF9MD_101, PF9MD_110, PF9MD_111,
2316 0, 0, 0, 0, 0, 0, 0, 0,
2317
2318 PF8MD_000, PF8MD_001, PF8MD_010, PF8MD_011,
2319 PF8MD_100, PF8MD_101, PF8MD_110, PF8MD_111,
2320 0, 0, 0, 0, 0, 0, 0, 0 }
2321 },
2322 { PINMUX_CFG_REG("PFCR1", 0xfffe38ac, 16, 4) {
2323 PF7MD_000, PF7MD_001, PF7MD_010, PF7MD_011,
2324 PF7MD_100, PF7MD_101, PF7MD_110, PF7MD_111,
2325 0, 0, 0, 0, 0, 0, 0, 0,
2326
2327 PF6MD_000, PF6MD_001, PF6MD_010, PF6MD_011,
2328 PF6MD_100, PF6MD_101, PF6MD_110, PF6MD_111,
2329 0, 0, 0, 0, 0, 0, 0, 0,
2330
2331 PF5MD_000, PF5MD_001, PF5MD_010, PF5MD_011,
2332 PF5MD_100, PF5MD_101, PF5MD_110, PF5MD_111,
2333 0, 0, 0, 0, 0, 0, 0, 0,
2334
2335 PF4MD_000, PF4MD_001, PF4MD_010, PF4MD_011,
2336 PF4MD_100, PF4MD_101, PF4MD_110, PF4MD_111,
2337 0, 0, 0, 0, 0, 0, 0, 0 }
2338 },
2339 { PINMUX_CFG_REG("PFCR0", 0xfffe38ae, 16, 4) {
2340 PF3MD_000, PF3MD_001, PF3MD_010, PF3MD_011,
2341 PF3MD_100, PF3MD_101, PF3MD_110, PF3MD_111,
2342 0, 0, 0, 0, 0, 0, 0, 0,
2343
2344 PF2MD_000, PF2MD_001, PF2MD_010, PF2MD_011,
2345 PF2MD_100, PF2MD_101, PF2MD_110, PF2MD_111,
2346 0, 0, 0, 0, 0, 0, 0, 0,
2347
2348 PF1MD_000, PF1MD_001, PF1MD_010, PF1MD_011,
2349 PF1MD_100, PF1MD_101, PF1MD_110, PF1MD_111,
2350 0, 0, 0, 0, 0, 0, 0, 0,
2351
2352 PF0MD_000, PF0MD_001, PF0MD_010, PF0MD_011,
2353 PF0MD_100, PF0MD_101, PF0MD_110, PF0MD_111,
2354 0, 0, 0, 0, 0, 0, 0, 0 }
2355 },
2356
2357 { PINMUX_CFG_REG("PFIOR1", 0xfffe38b0, 16, 1) {
2358 0, 0, 0, 0, 0, 0, 0, 0,
2359 0, 0, 0, 0, 0, 0, 0, 0,
2360 PF23_IN, PF23_OUT,
2361 PF22_IN, PF22_OUT,
2362 PF21_IN, PF21_OUT,
2363 PF20_IN, PF20_OUT,
2364 PF19_IN, PF19_OUT,
2365 PF18_IN, PF18_OUT,
2366 PF17_IN, PF17_OUT,
2367 PF16_IN, PF16_OUT }
2368 },
2369 { PINMUX_CFG_REG("PFIOR0", 0xfffe38b2, 16, 1) {
2370 PF15_IN, PF15_OUT,
2371 PF14_IN, PF14_OUT,
2372 PF13_IN, PF13_OUT,
2373 PF12_IN, PF12_OUT,
2374 PF11_IN, PF11_OUT,
2375 PF10_IN, PF10_OUT,
2376 PF9_IN, PF9_OUT,
2377 PF8_IN, PF8_OUT,
2378 PF7_IN, PF7_OUT,
2379 PF6_IN, PF6_OUT,
2380 PF5_IN, PF5_OUT,
2381 PF4_IN, PF4_OUT,
2382 PF3_IN, PF3_OUT,
2383 PF2_IN, PF2_OUT,
2384 PF1_IN, PF1_OUT,
2385 PF0_IN, PF0_OUT }
2386 },
2387
2388 { PINMUX_CFG_REG("PGCR6", 0xfffe38c2, 16, 4) {
2389 PG27MD_00, PG27MD_01, PG27MD_10, PG27MD_11, 0, 0, 0, 0,
2390 0, 0, 0, 0, 0, 0, 0, 0,
2391
2392 PG26MD_00, PG26MD_01, PG26MD_10, PG26MD_11, 0, 0, 0, 0,
2393 0, 0, 0, 0, 0, 0, 0, 0,
2394
2395 PG25MD_00, PG25MD_01, PG25MD_10, PG25MD_11, 0, 0, 0, 0,
2396 0, 0, 0, 0, 0, 0, 0, 0,
2397
2398 PG24MD_00, PG24MD_01, PG24MD_10, PG24MD_11, 0, 0, 0, 0,
2399 0, 0, 0, 0, 0, 0, 0, 0 }
2400 },
2401 { PINMUX_CFG_REG("PGCR5", 0xfffe38c4, 16, 4) {
2402 PG23MD_000, PG23MD_001, PG23MD_010, PG23MD_011,
2403 PG23MD_100, PG23MD_101, PG23MD_110, PG23MD_111,
2404 0, 0, 0, 0, 0, 0, 0, 0,
2405
2406 PG22MD_000, PG22MD_001, PG22MD_010, PG22MD_011,
2407 PG22MD_100, PG22MD_101, PG22MD_110, PG22MD_111,
2408 0, 0, 0, 0, 0, 0, 0, 0,
2409
2410 PG21MD_000, PG21MD_001, PG21MD_010, PG21MD_011,
2411 PG21MD_100, PG21MD_101, PG21MD_110, PG21MD_111,
2412 0, 0, 0, 0, 0, 0, 0, 0,
2413
2414 PG20MD_000, PG20MD_001, PG20MD_010, PG20MD_011,
2415 PG20MD_100, PG20MD_101, PG20MD_110, PG20MD_111,
2416 0, 0, 0, 0, 0, 0, 0, 0 }
2417 },
2418 { PINMUX_CFG_REG("PGCR4", 0xfffe38c6, 16, 4) {
2419 PG19MD_000, PG19MD_001, PG19MD_010, PG19MD_011,
2420 PG19MD_100, PG19MD_101, PG19MD_110, PG19MD_111,
2421 0, 0, 0, 0, 0, 0, 0, 0,
2422
2423 PG18MD_000, PG18MD_001, PG18MD_010, PG18MD_011,
2424 PG18MD_100, PG18MD_101, PG18MD_110, PG18MD_111,
2425 0, 0, 0, 0, 0, 0, 0, 0,
2426
2427 PG17MD_00, PG17MD_01, PG17MD_10, PG17MD_11, 0, 0, 0, 0,
2428 0, 0, 0, 0, 0, 0, 0, 0,
2429
2430 PG16MD_00, PG16MD_01, PG16MD_10, PG16MD_11, 0, 0, 0, 0,
2431 0, 0, 0, 0, 0, 0, 0, 0 }
2432 },
2433 { PINMUX_CFG_REG("PGCR3", 0xfffe38c8, 16, 4) {
2434 PG15MD_00, PG15MD_01, PG15MD_10, PG15MD_11, 0, 0, 0, 0,
2435 0, 0, 0, 0, 0, 0, 0, 0,
2436
2437 PG14MD_00, PG14MD_01, PG14MD_10, PG14MD_11, 0, 0, 0, 0,
2438 0, 0, 0, 0, 0, 0, 0, 0,
2439
2440 PG13MD_00, PG13MD_01, PG13MD_10, PG13MD_11, 0, 0, 0, 0,
2441 0, 0, 0, 0, 0, 0, 0, 0,
2442
2443 PG12MD_00, PG12MD_01, PG12MD_10, PG12MD_11, 0, 0, 0, 0,
2444 0, 0, 0, 0, 0, 0, 0, 0 }
2445 },
2446 { PINMUX_CFG_REG("PGCR2", 0xfffe38ca, 16, 4) {
2447 PG11MD_000, PG11MD_001, PG11MD_010, PG11MD_011,
2448 PG11MD_100, PG11MD_101, PG11MD_110, PG11MD_111,
2449 0, 0, 0, 0, 0, 0, 0, 0,
2450
2451 PG10MD_000, PG10MD_001, PG10MD_010, PG10MD_011,
2452 PG10MD_100, PG10MD_101, PG10MD_110, PG10MD_111,
2453 0, 0, 0, 0, 0, 0, 0, 0,
2454
2455 PG9MD_000, PG9MD_001, PG9MD_010, PG9MD_011,
2456 PG9MD_100, PG9MD_101, PG9MD_110, PG9MD_111,
2457 0, 0, 0, 0, 0, 0, 0, 0,
2458
2459 PG8MD_000, PG8MD_001, PG8MD_010, PG8MD_011,
2460 PG8MD_100, PG8MD_101, PG8MD_110, PG8MD_111,
2461 0, 0, 0, 0, 0, 0, 0, 0 }
2462 },
2463
2464 { PINMUX_CFG_REG("PGCR1", 0xfffe38cc, 16, 4) {
2465 PG7MD_000, PG7MD_001, PG7MD_010, PG7MD_011,
2466 PG7MD_100, PG7MD_101, PG7MD_110, PG7MD_111,
2467 0, 0, 0, 0, 0, 0, 0, 0,
2468
2469 PG6MD_000, PG6MD_001, PG6MD_010, PG6MD_011,
2470 PG6MD_100, PG6MD_101, PG6MD_110, PG6MD_111,
2471 0, 0, 0, 0, 0, 0, 0, 0,
2472
2473 PG5MD_000, PG5MD_001, PG5MD_010, PG5MD_011,
2474 PG5MD_100, PG5MD_101, PG5MD_110, PG5MD_111,
2475 0, 0, 0, 0, 0, 0, 0, 0,
2476
2477 PG4MD_000, PG4MD_001, PG4MD_010, PG4MD_011,
2478 PG4MD_100, PG4MD_101, PG4MD_110, PG4MD_111,
2479 0, 0, 0, 0, 0, 0, 0, 0 }
2480 },
2481 { PINMUX_CFG_REG("PGCR0", 0xfffe38ce, 16, 4) {
2482 PG3MD_000, PG3MD_001, PG3MD_010, PG3MD_011,
2483 PG3MD_100, PG3MD_101, PG3MD_110, PG3MD_111,
2484 0, 0, 0, 0, 0, 0, 0, 0,
2485
2486 PG2MD_000, PG2MD_001, PG2MD_010, PG2MD_011,
2487 PG2MD_100, PG2MD_101, PG2MD_110, PG2MD_111,
2488 0, 0, 0, 0, 0, 0, 0, 0,
2489
2490 PG1MD_000, PG1MD_001, PG1MD_010, PG1MD_011,
2491 PG1MD_100, PG1MD_101, PG1MD_110, PG1MD_111,
2492 0, 0, 0, 0, 0, 0, 0, 0,
2493
2494 PG0MD_000, PG0MD_001, PG0MD_010, PG0MD_011,
2495 PG0MD_100, PG0MD_101, PG0MD_110, PG0MD_111,
2496 0, 0, 0, 0, 0, 0, 0, 0 }
2497 },
2498
2499 { PINMUX_CFG_REG("PGIOR1", 0xfffe38d0, 16, 1) {
2500 0, 0, 0, 0, 0, 0, 0, 0,
2501 PG27_IN, PG27_OUT,
2502 PG26_IN, PG26_OUT,
2503 PG25_IN, PG25_OUT,
2504 PG24_IN, PG24_OUT,
2505 PG23_IN, PG23_OUT,
2506 PG22_IN, PG22_OUT,
2507 PG21_IN, PG21_OUT,
2508 PG20_IN, PG20_OUT,
2509 PG19_IN, PG19_OUT,
2510 PG18_IN, PG18_OUT,
2511 PG17_IN, PG17_OUT,
2512 PG16_IN, PG16_OUT }
2513 },
2514 { PINMUX_CFG_REG("PGIOR0", 0xfffe38d2, 16, 1) {
2515 PG15_IN, PG15_OUT,
2516 PG14_IN, PG14_OUT,
2517 PG13_IN, PG13_OUT,
2518 PG12_IN, PG12_OUT,
2519 PG11_IN, PG11_OUT,
2520 PG10_IN, PG10_OUT,
2521 PG9_IN, PG9_OUT,
2522 PG8_IN, PG8_OUT,
2523 PG7_IN, PG7_OUT,
2524 PG6_IN, PG6_OUT,
2525 PG5_IN, PG5_OUT,
2526 PG4_IN, PG4_OUT,
2527 PG3_IN, PG3_OUT,
2528 PG2_IN, PG2_OUT,
2529 PG1_IN, PG1_OUT,
2530 PG0_IN, PG0_OUT }
2531 },
2532
2533 { PINMUX_CFG_REG("PHCR1", 0xfffe38ec, 16, 4) {
2534 PH7MD_00, PH7MD_01, PH7MD_10, PH7MD_11, 0, 0, 0, 0,
2535 0, 0, 0, 0, 0, 0, 0, 0,
2536
2537 PH6MD_00, PH6MD_01, PH6MD_10, PH6MD_11, 0, 0, 0, 0,
2538 0, 0, 0, 0, 0, 0, 0, 0,
2539
2540 PH5MD_00, PH5MD_01, PH5MD_10, PH5MD_11, 0, 0, 0, 0,
2541 0, 0, 0, 0, 0, 0, 0, 0,
2542
2543 PH4MD_00, PH4MD_01, PH4MD_10, PH4MD_11, 0, 0, 0, 0,
2544 0, 0, 0, 0, 0, 0, 0, 0 }
2545 },
2546
2547 { PINMUX_CFG_REG("PHCR0", 0xfffe38ee, 16, 4) {
2548 PH3MD_00, PH3MD_01, PH3MD_10, PH3MD_11, 0, 0, 0, 0,
2549 0, 0, 0, 0, 0, 0, 0, 0,
2550
2551 PH2MD_00, PH2MD_01, PH2MD_10, PH2MD_11, 0, 0, 0, 0,
2552 0, 0, 0, 0, 0, 0, 0, 0,
2553
2554 PH1MD_00, PH1MD_01, PH1MD_10, PH1MD_11, 0, 0, 0, 0,
2555 0, 0, 0, 0, 0, 0, 0, 0,
2556
2557 PH0MD_00, PH0MD_01, PH0MD_10, PH0MD_11, 0, 0, 0, 0,
2558 0, 0, 0, 0, 0, 0, 0, 0 }
2559 },
2560
2561 { PINMUX_CFG_REG("PJCR7", 0xfffe3900, 16, 4) {
2562 PJ31MD_0, PJ31MD_1, 0, 0, 0, 0, 0, 0,
2563 0, 0, 0, 0, 0, 0, 0, 0,
2564
2565 PJ30MD_000, PJ30MD_001, PJ30MD_010, PJ30MD_011,
2566 PJ30MD_100, PJ30MD_101, PJ30MD_110, PJ30MD_111,
2567 0, 0, 0, 0, 0, 0, 0, 0,
2568
2569 PJ29MD_000, PJ29MD_001, PJ29MD_010, PJ29MD_011,
2570 PJ29MD_100, PJ29MD_101, PJ29MD_110, PJ29MD_111,
2571 0, 0, 0, 0, 0, 0, 0, 0,
2572
2573 PJ28MD_000, PJ28MD_001, PJ28MD_010, PJ28MD_011,
2574 PJ28MD_100, PJ28MD_101, PJ28MD_110, PJ28MD_111,
2575 0, 0, 0, 0, 0, 0, 0, 0 }
2576 },
2577 { PINMUX_CFG_REG("PJCR6", 0xfffe3902, 16, 4) {
2578 PJ27MD_000, PJ27MD_001, PJ27MD_010, PJ27MD_011,
2579 PJ27MD_100, PJ27MD_101, PJ27MD_110, PJ27MD_111,
2580 0, 0, 0, 0, 0, 0, 0, 0,
2581
2582 PJ26MD_000, PJ26MD_001, PJ26MD_010, PJ26MD_011,
2583 PJ26MD_100, PJ26MD_101, PJ26MD_110, PJ26MD_111,
2584 0, 0, 0, 0, 0, 0, 0, 0,
2585
2586 PJ25MD_000, PJ25MD_001, PJ25MD_010, PJ25MD_011,
2587 PJ25MD_100, PJ25MD_101, PJ25MD_110, PJ25MD_111,
2588 0, 0, 0, 0, 0, 0, 0, 0,
2589
2590 PJ24MD_000, PJ24MD_001, PJ24MD_010, PJ24MD_011,
2591 PJ24MD_100, PJ24MD_101, PJ24MD_110, PJ24MD_111,
2592 0, 0, 0, 0, 0, 0, 0, 0 }
2593 },
2594 { PINMUX_CFG_REG("PJCR5", 0xfffe3904, 16, 4) {
2595 PJ23MD_000, PJ23MD_001, PJ23MD_010, PJ23MD_011,
2596 PJ23MD_100, PJ23MD_101, PJ23MD_110, PJ23MD_111,
2597 0, 0, 0, 0, 0, 0, 0, 0,
2598
2599 PJ22MD_000, PJ22MD_001, PJ22MD_010, PJ22MD_011,
2600 PJ22MD_100, PJ22MD_101, PJ22MD_110, PJ22MD_111,
2601 0, 0, 0, 0, 0, 0, 0, 0,
2602
2603 PJ21MD_000, PJ21MD_001, PJ21MD_010, PJ21MD_011,
2604 PJ21MD_100, PJ21MD_101, PJ21MD_110, PJ21MD_111,
2605 0, 0, 0, 0, 0, 0, 0, 0,
2606
2607 PJ20MD_000, PJ20MD_001, PJ20MD_010, PJ20MD_011,
2608 PJ20MD_100, PJ20MD_101, PJ20MD_110, PJ20MD_111,
2609 0, 0, 0, 0, 0, 0, 0, 0 }
2610 },
2611 { PINMUX_CFG_REG("PJCR4", 0xfffe3906, 16, 4) {
2612 PJ19MD_000, PJ19MD_001, PJ19MD_010, PJ19MD_011,
2613 PJ19MD_100, PJ19MD_101, PJ19MD_110, PJ19MD_111,
2614 0, 0, 0, 0, 0, 0, 0, 0,
2615
2616 PJ18MD_000, PJ18MD_001, PJ18MD_010, PJ18MD_011,
2617 PJ18MD_100, PJ18MD_101, PJ18MD_110, PJ18MD_111,
2618 0, 0, 0, 0, 0, 0, 0, 0,
2619
2620 PJ17MD_000, PJ17MD_001, PJ17MD_010, PJ17MD_011,
2621 PJ17MD_100, PJ17MD_101, PJ17MD_110, PJ17MD_111,
2622 0, 0, 0, 0, 0, 0, 0, 0,
2623
2624 PJ16MD_000, PJ16MD_001, PJ16MD_010, PJ16MD_011,
2625 PJ16MD_100, PJ16MD_101, PJ16MD_110, PJ16MD_111,
2626 0, 0, 0, 0, 0, 0, 0, 0 }
2627 },
2628 { PINMUX_CFG_REG("PJCR3", 0xfffe3908, 16, 4) {
2629 PJ15MD_000, PJ15MD_001, PJ15MD_010, PJ15MD_011,
2630 PJ15MD_100, PJ15MD_101, PJ15MD_110, PJ15MD_111,
2631 0, 0, 0, 0, 0, 0, 0, 0,
2632
2633 PJ14MD_000, PJ14MD_001, PJ14MD_010, PJ14MD_011,
2634 PJ14MD_100, PJ14MD_101, PJ14MD_110, PJ14MD_111,
2635 0, 0, 0, 0, 0, 0, 0, 0,
2636
2637 PJ13MD_000, PJ13MD_001, PJ13MD_010, PJ13MD_011,
2638 PJ13MD_100, PJ13MD_101, PJ13MD_110, PJ13MD_111,
2639 0, 0, 0, 0, 0, 0, 0, 0,
2640
2641 PJ12MD_000, PJ12MD_001, PJ12MD_010, PJ12MD_011,
2642 PJ12MD_100, PJ12MD_101, PJ12MD_110, PJ12MD_111,
2643 0, 0, 0, 0, 0, 0, 0, 0 }
2644 },
2645 { PINMUX_CFG_REG("PJCR2", 0xfffe390a, 16, 4) {
2646 PJ11MD_000, PJ11MD_001, PJ11MD_010, PJ11MD_011,
2647 PJ11MD_100, PJ11MD_101, PJ11MD_110, PJ11MD_111,
2648 0, 0, 0, 0, 0, 0, 0, 0,
2649
2650 PJ10MD_000, PJ10MD_001, PJ10MD_010, PJ10MD_011,
2651 PJ10MD_100, PJ10MD_101, PJ10MD_110, PJ10MD_111,
2652 0, 0, 0, 0, 0, 0, 0, 0,
2653
2654 PJ9MD_000, PJ9MD_001, PJ9MD_010, PJ9MD_011,
2655 PJ9MD_100, PJ9MD_101, PJ9MD_110, PJ9MD_111,
2656 0, 0, 0, 0, 0, 0, 0, 0,
2657
2658 PJ8MD_000, PJ8MD_001, PJ8MD_010, PJ8MD_011,
2659 PJ8MD_100, PJ8MD_101, PJ8MD_110, PJ8MD_111,
2660 0, 0, 0, 0, 0, 0, 0, 0 }
2661 },
2662 { PINMUX_CFG_REG("PJCR1", 0xfffe390c, 16, 4) {
2663 PJ7MD_000, PJ7MD_001, PJ7MD_010, PJ7MD_011,
2664 PJ7MD_100, PJ7MD_101, PJ7MD_110, PJ7MD_111,
2665 0, 0, 0, 0, 0, 0, 0, 0,
2666
2667 PJ6MD_000, PJ6MD_001, PJ6MD_010, PJ6MD_011,
2668 PJ6MD_100, PJ6MD_101, PJ6MD_110, PJ6MD_111,
2669 0, 0, 0, 0, 0, 0, 0, 0,
2670
2671 PJ5MD_000, PJ5MD_001, PJ5MD_010, PJ5MD_011,
2672 PJ5MD_100, PJ5MD_101, PJ5MD_110, PJ5MD_111,
2673 0, 0, 0, 0, 0, 0, 0, 0,
2674
2675 PJ4MD_000, PJ4MD_001, PJ4MD_010, PJ4MD_011,
2676 PJ4MD_100, PJ4MD_101, PJ4MD_110, PJ4MD_111,
2677 0, 0, 0, 0, 0, 0, 0, 0 }
2678 },
2679 { PINMUX_CFG_REG("PJCR0", 0xfffe390e, 16, 4) {
2680 PJ3MD_000, PJ3MD_001, PJ3MD_010, PJ3MD_011,
2681 PJ3MD_100, PJ3MD_101, PJ3MD_110, PJ3MD_111,
2682 0, 0, 0, 0, 0, 0, 0, 0,
2683
2684 PJ2MD_000, PJ2MD_001, PJ2MD_010, PJ2MD_011,
2685 PJ2MD_100, PJ2MD_101, PJ2MD_110, PJ2MD_111,
2686 0, 0, 0, 0, 0, 0, 0, 0,
2687
2688 PJ1MD_000, PJ1MD_001, PJ1MD_010, PJ1MD_011,
2689 PJ1MD_100, PJ1MD_101, PJ1MD_110, PJ1MD_111,
2690 0, 0, 0, 0, 0, 0, 0, 0,
2691
2692 PJ0MD_000, PJ0MD_001, PJ0MD_010, PJ0MD_011,
2693 PJ0MD_100, PJ0MD_101, PJ0MD_110, PJ0MD_111,
2694 0, 0, 0, 0, 0, 0, 0, 0 }
2695 },
2696
2697 { PINMUX_CFG_REG("PJIOR1", 0xfffe3910, 16, 1) {
2698 PJ31_IN, PJ31_OUT,
2699 PJ30_IN, PJ30_OUT,
2700 PJ29_IN, PJ29_OUT,
2701 PJ28_IN, PJ28_OUT,
2702 PJ27_IN, PJ27_OUT,
2703 PJ26_IN, PJ26_OUT,
2704 PJ25_IN, PJ25_OUT,
2705 PJ24_IN, PJ24_OUT,
2706 PJ23_IN, PJ23_OUT,
2707 PJ22_IN, PJ22_OUT,
2708 PJ21_IN, PJ21_OUT,
2709 PJ20_IN, PJ20_OUT,
2710 PJ19_IN, PJ19_OUT,
2711 PJ18_IN, PJ18_OUT,
2712 PJ17_IN, PJ17_OUT,
2713 PJ16_IN, PJ16_OUT }
2714 },
2715 { PINMUX_CFG_REG("PJIOR0", 0xfffe3912, 16, 1) {
2716 PJ15_IN, PJ15_OUT,
2717 PJ14_IN, PJ14_OUT,
2718 PJ13_IN, PJ13_OUT,
2719 PJ12_IN, PJ12_OUT,
2720 PJ11_IN, PJ11_OUT,
2721 PJ10_IN, PJ10_OUT,
2722 PJ9_IN, PJ9_OUT,
2723 PJ8_IN, PJ8_OUT,
2724 PJ7_IN, PJ7_OUT,
2725 PJ6_IN, PJ6_OUT,
2726 PJ5_IN, PJ5_OUT,
2727 PJ4_IN, PJ4_OUT,
2728 PJ3_IN, PJ3_OUT,
2729 PJ2_IN, PJ2_OUT,
2730 PJ1_IN, PJ1_OUT,
2731 PJ0_IN, PJ0_OUT }
2732 },
2733
2734 {}
2735};
2736
2737static struct pinmux_data_reg pinmux_data_regs[] = {
2738 { PINMUX_DATA_REG("PADR0", 0xfffe3816, 16) {
2739 0, 0, 0, 0, 0, 0, 0, PA1_DATA,
2740 0, 0, 0, 0, 0, 0, 0, PA0_DATA }
2741 },
2742
2743 { PINMUX_DATA_REG("PBDR1", 0xfffe3834, 16) {
2744 0, 0, 0, 0, 0, 0, 0, 0,
2745 0, PB22_DATA, PB21_DATA, PB20_DATA,
2746 PB19_DATA, PB18_DATA, PB17_DATA, PB16_DATA }
2747 },
2748 { PINMUX_DATA_REG("PBDR0", 0xfffe3836, 16) {
2749 PB15_DATA, PB14_DATA, PB13_DATA, PB12_DATA,
2750 PB11_DATA, PB10_DATA, PB9_DATA, PB8_DATA,
2751 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
2752 PB3_DATA, PB2_DATA, PB1_DATA, 0 }
2753 },
2754
2755 { PINMUX_DATA_REG("PCDR0", 0xfffe3856, 16) {
2756 0, 0, 0, 0,
2757 0, 0, 0, PC8_DATA,
2758 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
2759 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
2760 },
2761
2762 { PINMUX_DATA_REG("PDDR0", 0xfffe3876, 16) {
2763 PD15_DATA, PD14_DATA, PD13_DATA, PD12_DATA,
2764 PD11_DATA, PD10_DATA, PD9_DATA, PD8_DATA,
2765 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
2766 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
2767 },
2768
2769 { PINMUX_DATA_REG("PEDR0", 0xfffe3896, 16) {
2770 0, 0, 0, 0, 0, 0, 0, 0,
2771 PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
2772 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }
2773 },
2774
2775 { PINMUX_DATA_REG("PFDR1", 0xfffe38b4, 16) {
2776 0, 0, 0, 0, 0, 0, 0, 0,
2777 PF23_DATA, PF22_DATA, PF21_DATA, PF20_DATA,
2778 PF19_DATA, PF18_DATA, PF17_DATA, PF16_DATA }
2779 },
2780 { PINMUX_DATA_REG("PFDR0", 0xfffe38b6, 16) {
2781 PF15_DATA, PF14_DATA, PF13_DATA, PF12_DATA,
2782 PF11_DATA, PF10_DATA, PF9_DATA, PF8_DATA,
2783 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
2784 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
2785 },
2786
2787 { PINMUX_DATA_REG("PGDR1", 0xfffe38d4, 16) {
2788 0, 0, 0, 0,
2789 PG27_DATA, PG26_DATA, PG25_DATA, PG24_DATA,
2790 PG23_DATA, PG22_DATA, PG21_DATA, PG20_DATA,
2791 PG19_DATA, PG18_DATA, PG17_DATA, PG16_DATA }
2792 },
2793 { PINMUX_DATA_REG("PGDR0", 0xfffe38d6, 16) {
2794 PG15_DATA, PG14_DATA, PG13_DATA, PG12_DATA,
2795 PG11_DATA, PG10_DATA, PG9_DATA, PG8_DATA,
2796 PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
2797 PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA }
2798 },
2799
2800 { PINMUX_DATA_REG("PJDR1", 0xfffe3914, 16) {
2801 PJ31_DATA, PJ30_DATA, PJ29_DATA, PJ28_DATA,
2802 PJ27_DATA, PJ26_DATA, PJ25_DATA, PJ24_DATA,
2803 PJ23_DATA, PJ22_DATA, PJ21_DATA, PJ20_DATA,
2804 PJ19_DATA, PJ18_DATA, PJ17_DATA, PJ16_DATA }
2805 },
2806 { PINMUX_DATA_REG("PJDR0", 0xfffe3916, 16) {
2807 PJ15_DATA, PJ14_DATA, PJ13_DATA, PJ12_DATA,
2808 PJ11_DATA, PJ10_DATA, PJ9_DATA, PJ8_DATA,
2809 PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
2810 PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA }
2811 },
2812
2813 { }
2814};
2815
2816struct sh_pfc_soc_info sh7269_pinmux_info = {
2817 .name = "sh7269_pfc",
2818 .reserved_id = PINMUX_RESERVED,
2819 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
2820 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END, FORCE_IN },
2821 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END, FORCE_OUT },
2822 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
2823 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
2824
2825 .first_gpio = GPIO_PA1,
2826 .last_gpio = GPIO_FN_LCD_M_DISP,
2827
2828 .gpios = pinmux_gpios,
2829 .cfg_regs = pinmux_config_regs,
2830 .data_regs = pinmux_data_regs,
2831
2832 .gpio_data = pinmux_data,
2833 .gpio_data_size = ARRAY_SIZE(pinmux_data),
2834};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7372.c b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
new file mode 100644
index 000000000000..d44e7f02069b
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7372.c
@@ -0,0 +1,1658 @@
1/*
2 * sh7372 processor support - PFC hardware block
3 *
4 * Copyright (C) 2010 Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * Based on
7 * sh7367 processor support - PFC hardware block
8 * Copyright (C) 2010 Magnus Damm
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2 of the License.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23#include <linux/kernel.h>
24#include <mach/irqs.h>
25#include <mach/sh7372.h>
26
27#include "sh_pfc.h"
28
29#define CPU_ALL_PORT(fn, pfx, sfx) \
30 PORT_10(fn, pfx, sfx), PORT_90(fn, pfx, sfx), \
31 PORT_10(fn, pfx##10, sfx), PORT_10(fn, pfx##11, sfx), \
32 PORT_10(fn, pfx##12, sfx), PORT_10(fn, pfx##13, sfx), \
33 PORT_10(fn, pfx##14, sfx), PORT_10(fn, pfx##15, sfx), \
34 PORT_10(fn, pfx##16, sfx), PORT_10(fn, pfx##17, sfx), \
35 PORT_10(fn, pfx##18, sfx), PORT_1(fn, pfx##190, sfx)
36
37enum {
38 PINMUX_RESERVED = 0,
39
40 /* PORT0_DATA -> PORT190_DATA */
41 PINMUX_DATA_BEGIN,
42 PORT_ALL(DATA),
43 PINMUX_DATA_END,
44
45 /* PORT0_IN -> PORT190_IN */
46 PINMUX_INPUT_BEGIN,
47 PORT_ALL(IN),
48 PINMUX_INPUT_END,
49
50 /* PORT0_IN_PU -> PORT190_IN_PU */
51 PINMUX_INPUT_PULLUP_BEGIN,
52 PORT_ALL(IN_PU),
53 PINMUX_INPUT_PULLUP_END,
54
55 /* PORT0_IN_PD -> PORT190_IN_PD */
56 PINMUX_INPUT_PULLDOWN_BEGIN,
57 PORT_ALL(IN_PD),
58 PINMUX_INPUT_PULLDOWN_END,
59
60 /* PORT0_OUT -> PORT190_OUT */
61 PINMUX_OUTPUT_BEGIN,
62 PORT_ALL(OUT),
63 PINMUX_OUTPUT_END,
64
65 PINMUX_FUNCTION_BEGIN,
66 PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT190_FN_IN */
67 PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT190_FN_OUT */
68 PORT_ALL(FN0), /* PORT0_FN0 -> PORT190_FN0 */
69 PORT_ALL(FN1), /* PORT0_FN1 -> PORT190_FN1 */
70 PORT_ALL(FN2), /* PORT0_FN2 -> PORT190_FN2 */
71 PORT_ALL(FN3), /* PORT0_FN3 -> PORT190_FN3 */
72 PORT_ALL(FN4), /* PORT0_FN4 -> PORT190_FN4 */
73 PORT_ALL(FN5), /* PORT0_FN5 -> PORT190_FN5 */
74 PORT_ALL(FN6), /* PORT0_FN6 -> PORT190_FN6 */
75 PORT_ALL(FN7), /* PORT0_FN7 -> PORT190_FN7 */
76
77 MSEL1CR_31_0, MSEL1CR_31_1,
78 MSEL1CR_30_0, MSEL1CR_30_1,
79 MSEL1CR_29_0, MSEL1CR_29_1,
80 MSEL1CR_28_0, MSEL1CR_28_1,
81 MSEL1CR_27_0, MSEL1CR_27_1,
82 MSEL1CR_26_0, MSEL1CR_26_1,
83 MSEL1CR_16_0, MSEL1CR_16_1,
84 MSEL1CR_15_0, MSEL1CR_15_1,
85 MSEL1CR_14_0, MSEL1CR_14_1,
86 MSEL1CR_13_0, MSEL1CR_13_1,
87 MSEL1CR_12_0, MSEL1CR_12_1,
88 MSEL1CR_9_0, MSEL1CR_9_1,
89 MSEL1CR_8_0, MSEL1CR_8_1,
90 MSEL1CR_7_0, MSEL1CR_7_1,
91 MSEL1CR_6_0, MSEL1CR_6_1,
92 MSEL1CR_4_0, MSEL1CR_4_1,
93 MSEL1CR_3_0, MSEL1CR_3_1,
94 MSEL1CR_2_0, MSEL1CR_2_1,
95 MSEL1CR_0_0, MSEL1CR_0_1,
96
97 MSEL3CR_27_0, MSEL3CR_27_1,
98 MSEL3CR_26_0, MSEL3CR_26_1,
99 MSEL3CR_21_0, MSEL3CR_21_1,
100 MSEL3CR_20_0, MSEL3CR_20_1,
101 MSEL3CR_15_0, MSEL3CR_15_1,
102 MSEL3CR_9_0, MSEL3CR_9_1,
103 MSEL3CR_6_0, MSEL3CR_6_1,
104
105 MSEL4CR_19_0, MSEL4CR_19_1,
106 MSEL4CR_18_0, MSEL4CR_18_1,
107 MSEL4CR_17_0, MSEL4CR_17_1,
108 MSEL4CR_16_0, MSEL4CR_16_1,
109 MSEL4CR_15_0, MSEL4CR_15_1,
110 MSEL4CR_14_0, MSEL4CR_14_1,
111 MSEL4CR_10_0, MSEL4CR_10_1,
112 MSEL4CR_6_0, MSEL4CR_6_1,
113 MSEL4CR_4_0, MSEL4CR_4_1,
114 MSEL4CR_1_0, MSEL4CR_1_1,
115 PINMUX_FUNCTION_END,
116
117 PINMUX_MARK_BEGIN,
118
119 /* IRQ */
120 IRQ0_6_MARK, IRQ0_162_MARK, IRQ1_MARK, IRQ2_4_MARK,
121 IRQ2_5_MARK, IRQ3_8_MARK, IRQ3_16_MARK, IRQ4_17_MARK,
122 IRQ4_163_MARK, IRQ5_MARK, IRQ6_39_MARK, IRQ6_164_MARK,
123 IRQ7_40_MARK, IRQ7_167_MARK, IRQ8_41_MARK, IRQ8_168_MARK,
124 IRQ9_42_MARK, IRQ9_169_MARK, IRQ10_MARK, IRQ11_MARK,
125 IRQ12_80_MARK, IRQ12_137_MARK, IRQ13_81_MARK, IRQ13_145_MARK,
126 IRQ14_82_MARK, IRQ14_146_MARK, IRQ15_83_MARK, IRQ15_147_MARK,
127 IRQ16_84_MARK, IRQ16_170_MARK, IRQ17_MARK, IRQ18_MARK,
128 IRQ19_MARK, IRQ20_MARK, IRQ21_MARK, IRQ22_MARK,
129 IRQ23_MARK, IRQ24_MARK, IRQ25_MARK, IRQ26_121_MARK,
130 IRQ26_172_MARK, IRQ27_122_MARK, IRQ27_180_MARK, IRQ28_123_MARK,
131 IRQ28_181_MARK, IRQ29_129_MARK, IRQ29_182_MARK, IRQ30_130_MARK,
132 IRQ30_183_MARK, IRQ31_138_MARK, IRQ31_184_MARK,
133
134 /* MSIOF0 */
135 MSIOF0_TSYNC_MARK, MSIOF0_TSCK_MARK, MSIOF0_RXD_MARK,
136 MSIOF0_RSCK_MARK, MSIOF0_RSYNC_MARK, MSIOF0_MCK0_MARK,
137 MSIOF0_MCK1_MARK, MSIOF0_SS1_MARK, MSIOF0_SS2_MARK,
138 MSIOF0_TXD_MARK,
139
140 /* MSIOF1 */
141 MSIOF1_TSCK_39_MARK, MSIOF1_TSYNC_40_MARK,
142 MSIOF1_TSCK_88_MARK, MSIOF1_TSYNC_89_MARK,
143 MSIOF1_TXD_41_MARK, MSIOF1_RXD_42_MARK,
144 MSIOF1_TXD_90_MARK, MSIOF1_RXD_91_MARK,
145 MSIOF1_SS1_43_MARK, MSIOF1_SS2_44_MARK,
146 MSIOF1_SS1_92_MARK, MSIOF1_SS2_93_MARK,
147 MSIOF1_RSCK_MARK, MSIOF1_RSYNC_MARK,
148 MSIOF1_MCK0_MARK, MSIOF1_MCK1_MARK,
149
150 /* MSIOF2 */
151 MSIOF2_RSCK_MARK, MSIOF2_RSYNC_MARK, MSIOF2_MCK0_MARK,
152 MSIOF2_MCK1_MARK, MSIOF2_SS1_MARK, MSIOF2_SS2_MARK,
153 MSIOF2_TSYNC_MARK, MSIOF2_TSCK_MARK, MSIOF2_RXD_MARK,
154 MSIOF2_TXD_MARK,
155
156 /* BBIF1 */
157 BBIF1_RXD_MARK, BBIF1_TSYNC_MARK, BBIF1_TSCK_MARK,
158 BBIF1_TXD_MARK, BBIF1_RSCK_MARK, BBIF1_RSYNC_MARK,
159 BBIF1_FLOW_MARK, BB_RX_FLOW_N_MARK,
160
161 /* BBIF2 */
162 BBIF2_TSCK1_MARK, BBIF2_TSYNC1_MARK,
163 BBIF2_TXD1_MARK, BBIF2_RXD_MARK,
164
165 /* FSI */
166 FSIACK_MARK, FSIBCK_MARK, FSIAILR_MARK, FSIAIBT_MARK,
167 FSIAISLD_MARK, FSIAOMC_MARK, FSIAOLR_MARK, FSIAOBT_MARK,
168 FSIAOSLD_MARK, FSIASPDIF_11_MARK, FSIASPDIF_15_MARK,
169
170 /* FMSI */
171 FMSOCK_MARK, FMSOOLR_MARK, FMSIOLR_MARK, FMSOOBT_MARK,
172 FMSIOBT_MARK, FMSOSLD_MARK, FMSOILR_MARK, FMSIILR_MARK,
173 FMSOIBT_MARK, FMSIIBT_MARK, FMSISLD_MARK, FMSICK_MARK,
174
175 /* SCIFA0 */
176 SCIFA0_TXD_MARK, SCIFA0_RXD_MARK, SCIFA0_SCK_MARK,
177 SCIFA0_RTS_MARK, SCIFA0_CTS_MARK,
178
179 /* SCIFA1 */
180 SCIFA1_TXD_MARK, SCIFA1_RXD_MARK, SCIFA1_SCK_MARK,
181 SCIFA1_RTS_MARK, SCIFA1_CTS_MARK,
182
183 /* SCIFA2 */
184 SCIFA2_CTS1_MARK, SCIFA2_RTS1_MARK, SCIFA2_TXD1_MARK,
185 SCIFA2_RXD1_MARK, SCIFA2_SCK1_MARK,
186
187 /* SCIFA3 */
188 SCIFA3_CTS_43_MARK, SCIFA3_CTS_140_MARK, SCIFA3_RTS_44_MARK,
189 SCIFA3_RTS_141_MARK, SCIFA3_SCK_MARK, SCIFA3_TXD_MARK,
190 SCIFA3_RXD_MARK,
191
192 /* SCIFA4 */
193 SCIFA4_RXD_MARK, SCIFA4_TXD_MARK,
194
195 /* SCIFA5 */
196 SCIFA5_RXD_MARK, SCIFA5_TXD_MARK,
197
198 /* SCIFB */
199 SCIFB_SCK_MARK, SCIFB_RTS_MARK, SCIFB_CTS_MARK,
200 SCIFB_TXD_MARK, SCIFB_RXD_MARK,
201
202 /* CEU */
203 VIO_HD_MARK, VIO_CKO1_MARK, VIO_CKO2_MARK, VIO_VD_MARK,
204 VIO_CLK_MARK, VIO_FIELD_MARK, VIO_CKO_MARK,
205 VIO_D0_MARK, VIO_D1_MARK, VIO_D2_MARK, VIO_D3_MARK,
206 VIO_D4_MARK, VIO_D5_MARK, VIO_D6_MARK, VIO_D7_MARK,
207 VIO_D8_MARK, VIO_D9_MARK, VIO_D10_MARK, VIO_D11_MARK,
208 VIO_D12_MARK, VIO_D13_MARK, VIO_D14_MARK, VIO_D15_MARK,
209
210 /* USB0 */
211 IDIN_0_MARK, EXTLP_0_MARK, OVCN2_0_MARK, PWEN_0_MARK,
212 OVCN_0_MARK, VBUS0_0_MARK,
213
214 /* USB1 */
215 IDIN_1_18_MARK, IDIN_1_113_MARK,
216 PWEN_1_115_MARK, PWEN_1_138_MARK,
217 OVCN_1_114_MARK, OVCN_1_162_MARK,
218 EXTLP_1_MARK, OVCN2_1_MARK,
219 VBUS0_1_MARK,
220
221 /* GPIO */
222 GPI0_MARK, GPI1_MARK, GPO0_MARK, GPO1_MARK,
223
224 /* BSC */
225 BS_MARK, WE1_MARK,
226 CKO_MARK, WAIT_MARK, RDWR_MARK,
227
228 A0_MARK, A1_MARK, A2_MARK, A3_MARK,
229 A6_MARK, A7_MARK, A8_MARK, A9_MARK,
230 A10_MARK, A11_MARK, A12_MARK, A13_MARK,
231 A14_MARK, A15_MARK, A16_MARK, A17_MARK,
232 A18_MARK, A19_MARK, A20_MARK, A21_MARK,
233 A22_MARK, A23_MARK, A24_MARK, A25_MARK,
234 A26_MARK,
235
236 CS0_MARK, CS2_MARK, CS4_MARK,
237 CS5A_MARK, CS5B_MARK, CS6A_MARK,
238
239 /* BSC/FLCTL */
240 RD_FSC_MARK, WE0_FWE_MARK, A4_FOE_MARK, A5_FCDE_MARK,
241 D0_NAF0_MARK, D1_NAF1_MARK, D2_NAF2_MARK, D3_NAF3_MARK,
242 D4_NAF4_MARK, D5_NAF5_MARK, D6_NAF6_MARK, D7_NAF7_MARK,
243 D8_NAF8_MARK, D9_NAF9_MARK, D10_NAF10_MARK, D11_NAF11_MARK,
244 D12_NAF12_MARK, D13_NAF13_MARK, D14_NAF14_MARK, D15_NAF15_MARK,
245
246 /* MMCIF(1) */
247 MMCD0_0_MARK, MMCD0_1_MARK, MMCD0_2_MARK, MMCD0_3_MARK,
248 MMCD0_4_MARK, MMCD0_5_MARK, MMCD0_6_MARK, MMCD0_7_MARK,
249 MMCCMD0_MARK, MMCCLK0_MARK,
250
251 /* MMCIF(2) */
252 MMCD1_0_MARK, MMCD1_1_MARK, MMCD1_2_MARK, MMCD1_3_MARK,
253 MMCD1_4_MARK, MMCD1_5_MARK, MMCD1_6_MARK, MMCD1_7_MARK,
254 MMCCLK1_MARK, MMCCMD1_MARK,
255
256 /* SPU2 */
257 VINT_I_MARK,
258
259 /* FLCTL */
260 FCE1_MARK, FCE0_MARK, FRB_MARK,
261
262 /* HSI */
263 GP_RX_FLAG_MARK, GP_RX_DATA_MARK, GP_TX_READY_MARK,
264 GP_RX_WAKE_MARK, MP_TX_FLAG_MARK, MP_TX_DATA_MARK,
265 MP_RX_READY_MARK, MP_TX_WAKE_MARK,
266
267 /* MFI */
268 MFIv6_MARK,
269 MFIv4_MARK,
270
271 MEMC_CS0_MARK, MEMC_BUSCLK_MEMC_A0_MARK,
272 MEMC_CS1_MEMC_A1_MARK, MEMC_ADV_MEMC_DREQ0_MARK,
273 MEMC_WAIT_MEMC_DREQ1_MARK, MEMC_NOE_MARK,
274 MEMC_NWE_MARK, MEMC_INT_MARK,
275
276 MEMC_AD0_MARK, MEMC_AD1_MARK, MEMC_AD2_MARK,
277 MEMC_AD3_MARK, MEMC_AD4_MARK, MEMC_AD5_MARK,
278 MEMC_AD6_MARK, MEMC_AD7_MARK, MEMC_AD8_MARK,
279 MEMC_AD9_MARK, MEMC_AD10_MARK, MEMC_AD11_MARK,
280 MEMC_AD12_MARK, MEMC_AD13_MARK, MEMC_AD14_MARK,
281 MEMC_AD15_MARK,
282
283 /* SIM */
284 SIM_RST_MARK, SIM_CLK_MARK, SIM_D_MARK,
285
286 /* TPU */
287 TPU0TO0_MARK, TPU0TO1_MARK,
288 TPU0TO2_93_MARK, TPU0TO2_99_MARK,
289 TPU0TO3_MARK,
290
291 /* I2C2 */
292 I2C_SCL2_MARK, I2C_SDA2_MARK,
293
294 /* I2C3(1) */
295 I2C_SCL3_MARK, I2C_SDA3_MARK,
296
297 /* I2C3(2) */
298 I2C_SCL3S_MARK, I2C_SDA3S_MARK,
299
300 /* I2C4(2) */
301 I2C_SCL4_MARK, I2C_SDA4_MARK,
302
303 /* I2C4(2) */
304 I2C_SCL4S_MARK, I2C_SDA4S_MARK,
305
306 /* KEYSC */
307 KEYOUT0_MARK, KEYIN0_121_MARK, KEYIN0_136_MARK,
308 KEYOUT1_MARK, KEYIN1_122_MARK, KEYIN1_135_MARK,
309 KEYOUT2_MARK, KEYIN2_123_MARK, KEYIN2_134_MARK,
310 KEYOUT3_MARK, KEYIN3_124_MARK, KEYIN3_133_MARK,
311 KEYOUT4_MARK, KEYIN4_MARK,
312 KEYOUT5_MARK, KEYIN5_MARK,
313 KEYOUT6_MARK, KEYIN6_MARK,
314 KEYOUT7_MARK, KEYIN7_MARK,
315
316 /* LCDC */
317 LCDC0_SELECT_MARK,
318 LCDC1_SELECT_MARK,
319 LCDHSYN_MARK, LCDCS_MARK, LCDVSYN_MARK, LCDDCK_MARK,
320 LCDWR_MARK, LCDRD_MARK, LCDDISP_MARK, LCDRS_MARK,
321 LCDLCLK_MARK, LCDDON_MARK,
322
323 LCDD0_MARK, LCDD1_MARK, LCDD2_MARK, LCDD3_MARK,
324 LCDD4_MARK, LCDD5_MARK, LCDD6_MARK, LCDD7_MARK,
325 LCDD8_MARK, LCDD9_MARK, LCDD10_MARK, LCDD11_MARK,
326 LCDD12_MARK, LCDD13_MARK, LCDD14_MARK, LCDD15_MARK,
327 LCDD16_MARK, LCDD17_MARK, LCDD18_MARK, LCDD19_MARK,
328 LCDD20_MARK, LCDD21_MARK, LCDD22_MARK, LCDD23_MARK,
329
330 /* IRDA */
331 IRDA_OUT_MARK, IRDA_IN_MARK, IRDA_FIRSEL_MARK,
332 IROUT_139_MARK, IROUT_140_MARK,
333
334 /* TSIF1 */
335 TS0_1SELECT_MARK,
336 TS0_2SELECT_MARK,
337 TS1_1SELECT_MARK,
338 TS1_2SELECT_MARK,
339
340 TS_SPSYNC1_MARK, TS_SDAT1_MARK,
341 TS_SDEN1_MARK, TS_SCK1_MARK,
342
343 /* TSIF2 */
344 TS_SPSYNC2_MARK, TS_SDAT2_MARK,
345 TS_SDEN2_MARK, TS_SCK2_MARK,
346
347 /* HDMI */
348 HDMI_HPD_MARK, HDMI_CEC_MARK,
349
350 /* SDHI0 */
351 SDHICLK0_MARK, SDHICD0_MARK,
352 SDHICMD0_MARK, SDHIWP0_MARK,
353 SDHID0_0_MARK, SDHID0_1_MARK,
354 SDHID0_2_MARK, SDHID0_3_MARK,
355
356 /* SDHI1 */
357 SDHICLK1_MARK, SDHICMD1_MARK, SDHID1_0_MARK,
358 SDHID1_1_MARK, SDHID1_2_MARK, SDHID1_3_MARK,
359
360 /* SDHI2 */
361 SDHICLK2_MARK, SDHICMD2_MARK, SDHID2_0_MARK,
362 SDHID2_1_MARK, SDHID2_2_MARK, SDHID2_3_MARK,
363
364 /* SDENC */
365 SDENC_CPG_MARK,
366 SDENC_DV_CLKI_MARK,
367
368 PINMUX_MARK_END,
369};
370
371static pinmux_enum_t pinmux_data[] = {
372
373 /* specify valid pin states for each pin in GPIO mode */
374 PORT_DATA_IO_PD(0), PORT_DATA_IO_PD(1),
375 PORT_DATA_O(2), PORT_DATA_I_PD(3),
376 PORT_DATA_I_PD(4), PORT_DATA_I_PD(5),
377 PORT_DATA_IO_PU_PD(6), PORT_DATA_I_PD(7),
378 PORT_DATA_IO_PD(8), PORT_DATA_O(9),
379
380 PORT_DATA_O(10), PORT_DATA_O(11),
381 PORT_DATA_IO_PU_PD(12), PORT_DATA_IO_PD(13),
382 PORT_DATA_IO_PD(14), PORT_DATA_O(15),
383 PORT_DATA_IO_PD(16), PORT_DATA_IO_PD(17),
384 PORT_DATA_I_PD(18), PORT_DATA_IO(19),
385
386 PORT_DATA_IO(20), PORT_DATA_IO(21),
387 PORT_DATA_IO(22), PORT_DATA_IO(23),
388 PORT_DATA_IO(24), PORT_DATA_IO(25),
389 PORT_DATA_IO(26), PORT_DATA_IO(27),
390 PORT_DATA_IO(28), PORT_DATA_IO(29),
391
392 PORT_DATA_IO(30), PORT_DATA_IO(31),
393 PORT_DATA_IO(32), PORT_DATA_IO(33),
394 PORT_DATA_IO(34), PORT_DATA_IO(35),
395 PORT_DATA_IO(36), PORT_DATA_IO(37),
396 PORT_DATA_IO(38), PORT_DATA_IO(39),
397
398 PORT_DATA_IO(40), PORT_DATA_IO(41),
399 PORT_DATA_IO(42), PORT_DATA_IO(43),
400 PORT_DATA_IO(44), PORT_DATA_IO(45),
401 PORT_DATA_IO_PU(46), PORT_DATA_IO_PU(47),
402 PORT_DATA_IO_PU(48), PORT_DATA_IO_PU(49),
403
404 PORT_DATA_IO_PU(50), PORT_DATA_IO_PU(51),
405 PORT_DATA_IO_PU(52), PORT_DATA_IO_PU(53),
406 PORT_DATA_IO_PU(54), PORT_DATA_IO_PU(55),
407 PORT_DATA_IO_PU(56), PORT_DATA_IO_PU(57),
408 PORT_DATA_IO_PU(58), PORT_DATA_IO_PU(59),
409
410 PORT_DATA_IO_PU(60), PORT_DATA_IO_PU(61),
411 PORT_DATA_IO(62), PORT_DATA_O(63),
412 PORT_DATA_O(64), PORT_DATA_IO_PU(65),
413 PORT_DATA_O(66), PORT_DATA_IO_PU(67), /*66?*/
414 PORT_DATA_O(68), PORT_DATA_IO(69),
415
416 PORT_DATA_IO(70), PORT_DATA_IO(71),
417 PORT_DATA_O(72), PORT_DATA_I_PU(73),
418 PORT_DATA_I_PU_PD(74), PORT_DATA_IO_PU_PD(75),
419 PORT_DATA_IO_PU_PD(76), PORT_DATA_IO_PU_PD(77),
420 PORT_DATA_IO_PU_PD(78), PORT_DATA_IO_PU_PD(79),
421
422 PORT_DATA_IO_PU_PD(80), PORT_DATA_IO_PU_PD(81),
423 PORT_DATA_IO_PU_PD(82), PORT_DATA_IO_PU_PD(83),
424 PORT_DATA_IO_PU_PD(84), PORT_DATA_IO_PU_PD(85),
425 PORT_DATA_IO_PU_PD(86), PORT_DATA_IO_PU_PD(87),
426 PORT_DATA_IO_PU_PD(88), PORT_DATA_IO_PU_PD(89),
427
428 PORT_DATA_IO_PU_PD(90), PORT_DATA_IO_PU_PD(91),
429 PORT_DATA_IO_PU_PD(92), PORT_DATA_IO_PU_PD(93),
430 PORT_DATA_IO_PU_PD(94), PORT_DATA_IO_PU_PD(95),
431 PORT_DATA_IO_PU(96), PORT_DATA_IO_PU_PD(97),
432 PORT_DATA_IO_PU_PD(98), PORT_DATA_O(99), /*99?*/
433
434 PORT_DATA_IO_PD(100), PORT_DATA_IO_PD(101),
435 PORT_DATA_IO_PD(102), PORT_DATA_IO_PD(103),
436 PORT_DATA_IO_PD(104), PORT_DATA_IO_PD(105),
437 PORT_DATA_IO_PU(106), PORT_DATA_IO_PU(107),
438 PORT_DATA_IO_PU(108), PORT_DATA_IO_PU(109),
439
440 PORT_DATA_IO_PU(110), PORT_DATA_IO_PU(111),
441 PORT_DATA_IO_PD(112), PORT_DATA_IO_PD(113),
442 PORT_DATA_IO_PU(114), PORT_DATA_IO_PU(115),
443 PORT_DATA_IO_PU(116), PORT_DATA_IO_PU(117),
444 PORT_DATA_IO_PU(118), PORT_DATA_IO_PU(119),
445
446 PORT_DATA_IO_PU(120), PORT_DATA_IO_PD(121),
447 PORT_DATA_IO_PD(122), PORT_DATA_IO_PD(123),
448 PORT_DATA_IO_PD(124), PORT_DATA_IO_PD(125),
449 PORT_DATA_IO_PD(126), PORT_DATA_IO_PD(127),
450 PORT_DATA_IO_PD(128), PORT_DATA_IO_PU_PD(129),
451
452 PORT_DATA_IO_PU_PD(130), PORT_DATA_IO_PU_PD(131),
453 PORT_DATA_IO_PU_PD(132), PORT_DATA_IO_PU_PD(133),
454 PORT_DATA_IO_PU_PD(134), PORT_DATA_IO_PU_PD(135),
455 PORT_DATA_IO_PD(136), PORT_DATA_IO_PD(137),
456 PORT_DATA_IO_PD(138), PORT_DATA_IO_PD(139),
457
458 PORT_DATA_IO_PD(140), PORT_DATA_IO_PD(141),
459 PORT_DATA_IO_PD(142), PORT_DATA_IO_PU_PD(143),
460 PORT_DATA_IO_PD(144), PORT_DATA_IO_PD(145),
461 PORT_DATA_IO_PD(146), PORT_DATA_IO_PD(147),
462 PORT_DATA_IO_PD(148), PORT_DATA_IO_PD(149),
463
464 PORT_DATA_IO_PD(150), PORT_DATA_IO_PD(151),
465 PORT_DATA_IO_PU_PD(152), PORT_DATA_I_PD(153),
466 PORT_DATA_IO_PU_PD(154), PORT_DATA_I_PD(155),
467 PORT_DATA_IO_PD(156), PORT_DATA_IO_PD(157),
468 PORT_DATA_I_PD(158), PORT_DATA_IO_PD(159),
469
470 PORT_DATA_O(160), PORT_DATA_IO_PD(161),
471 PORT_DATA_IO_PD(162), PORT_DATA_IO_PD(163),
472 PORT_DATA_I_PD(164), PORT_DATA_IO_PD(165),
473 PORT_DATA_I_PD(166), PORT_DATA_I_PD(167),
474 PORT_DATA_I_PD(168), PORT_DATA_I_PD(169),
475
476 PORT_DATA_I_PD(170), PORT_DATA_O(171),
477 PORT_DATA_IO_PU_PD(172), PORT_DATA_IO_PU_PD(173),
478 PORT_DATA_IO_PU_PD(174), PORT_DATA_IO_PU_PD(175),
479 PORT_DATA_IO_PU_PD(176), PORT_DATA_IO_PU_PD(177),
480 PORT_DATA_IO_PU_PD(178), PORT_DATA_O(179),
481
482 PORT_DATA_IO_PU_PD(180), PORT_DATA_IO_PU_PD(181),
483 PORT_DATA_IO_PU_PD(182), PORT_DATA_IO_PU_PD(183),
484 PORT_DATA_IO_PU_PD(184), PORT_DATA_O(185),
485 PORT_DATA_IO_PU_PD(186), PORT_DATA_IO_PU_PD(187),
486 PORT_DATA_IO_PU_PD(188), PORT_DATA_IO_PU_PD(189),
487
488 PORT_DATA_IO_PU_PD(190),
489
490 /* IRQ */
491 PINMUX_DATA(IRQ0_6_MARK, PORT6_FN0, MSEL1CR_0_0),
492 PINMUX_DATA(IRQ0_162_MARK, PORT162_FN0, MSEL1CR_0_1),
493 PINMUX_DATA(IRQ1_MARK, PORT12_FN0),
494 PINMUX_DATA(IRQ2_4_MARK, PORT4_FN0, MSEL1CR_2_0),
495 PINMUX_DATA(IRQ2_5_MARK, PORT5_FN0, MSEL1CR_2_1),
496 PINMUX_DATA(IRQ3_8_MARK, PORT8_FN0, MSEL1CR_3_0),
497 PINMUX_DATA(IRQ3_16_MARK, PORT16_FN0, MSEL1CR_3_1),
498 PINMUX_DATA(IRQ4_17_MARK, PORT17_FN0, MSEL1CR_4_0),
499 PINMUX_DATA(IRQ4_163_MARK, PORT163_FN0, MSEL1CR_4_1),
500 PINMUX_DATA(IRQ5_MARK, PORT18_FN0),
501 PINMUX_DATA(IRQ6_39_MARK, PORT39_FN0, MSEL1CR_6_0),
502 PINMUX_DATA(IRQ6_164_MARK, PORT164_FN0, MSEL1CR_6_1),
503 PINMUX_DATA(IRQ7_40_MARK, PORT40_FN0, MSEL1CR_7_1),
504 PINMUX_DATA(IRQ7_167_MARK, PORT167_FN0, MSEL1CR_7_0),
505 PINMUX_DATA(IRQ8_41_MARK, PORT41_FN0, MSEL1CR_8_1),
506 PINMUX_DATA(IRQ8_168_MARK, PORT168_FN0, MSEL1CR_8_0),
507 PINMUX_DATA(IRQ9_42_MARK, PORT42_FN0, MSEL1CR_9_0),
508 PINMUX_DATA(IRQ9_169_MARK, PORT169_FN0, MSEL1CR_9_1),
509 PINMUX_DATA(IRQ10_MARK, PORT65_FN0, MSEL1CR_9_1),
510 PINMUX_DATA(IRQ11_MARK, PORT67_FN0),
511 PINMUX_DATA(IRQ12_80_MARK, PORT80_FN0, MSEL1CR_12_0),
512 PINMUX_DATA(IRQ12_137_MARK, PORT137_FN0, MSEL1CR_12_1),
513 PINMUX_DATA(IRQ13_81_MARK, PORT81_FN0, MSEL1CR_13_0),
514 PINMUX_DATA(IRQ13_145_MARK, PORT145_FN0, MSEL1CR_13_1),
515 PINMUX_DATA(IRQ14_82_MARK, PORT82_FN0, MSEL1CR_14_0),
516 PINMUX_DATA(IRQ14_146_MARK, PORT146_FN0, MSEL1CR_14_1),
517 PINMUX_DATA(IRQ15_83_MARK, PORT83_FN0, MSEL1CR_15_0),
518 PINMUX_DATA(IRQ15_147_MARK, PORT147_FN0, MSEL1CR_15_1),
519 PINMUX_DATA(IRQ16_84_MARK, PORT84_FN0, MSEL1CR_16_0),
520 PINMUX_DATA(IRQ16_170_MARK, PORT170_FN0, MSEL1CR_16_1),
521 PINMUX_DATA(IRQ17_MARK, PORT85_FN0),
522 PINMUX_DATA(IRQ18_MARK, PORT86_FN0),
523 PINMUX_DATA(IRQ19_MARK, PORT87_FN0),
524 PINMUX_DATA(IRQ20_MARK, PORT92_FN0),
525 PINMUX_DATA(IRQ21_MARK, PORT93_FN0),
526 PINMUX_DATA(IRQ22_MARK, PORT94_FN0),
527 PINMUX_DATA(IRQ23_MARK, PORT95_FN0),
528 PINMUX_DATA(IRQ24_MARK, PORT112_FN0),
529 PINMUX_DATA(IRQ25_MARK, PORT119_FN0),
530 PINMUX_DATA(IRQ26_121_MARK, PORT121_FN0, MSEL1CR_26_1),
531 PINMUX_DATA(IRQ26_172_MARK, PORT172_FN0, MSEL1CR_26_0),
532 PINMUX_DATA(IRQ27_122_MARK, PORT122_FN0, MSEL1CR_27_1),
533 PINMUX_DATA(IRQ27_180_MARK, PORT180_FN0, MSEL1CR_27_0),
534 PINMUX_DATA(IRQ28_123_MARK, PORT123_FN0, MSEL1CR_28_1),
535 PINMUX_DATA(IRQ28_181_MARK, PORT181_FN0, MSEL1CR_28_0),
536 PINMUX_DATA(IRQ29_129_MARK, PORT129_FN0, MSEL1CR_29_1),
537 PINMUX_DATA(IRQ29_182_MARK, PORT182_FN0, MSEL1CR_29_0),
538 PINMUX_DATA(IRQ30_130_MARK, PORT130_FN0, MSEL1CR_30_1),
539 PINMUX_DATA(IRQ30_183_MARK, PORT183_FN0, MSEL1CR_30_0),
540 PINMUX_DATA(IRQ31_138_MARK, PORT138_FN0, MSEL1CR_31_1),
541 PINMUX_DATA(IRQ31_184_MARK, PORT184_FN0, MSEL1CR_31_0),
542
543 /* Function 1 */
544 PINMUX_DATA(BBIF2_TSCK1_MARK, PORT0_FN1),
545 PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT1_FN1),
546 PINMUX_DATA(BBIF2_TXD1_MARK, PORT2_FN1),
547 PINMUX_DATA(BBIF2_RXD_MARK, PORT3_FN1),
548 PINMUX_DATA(FSIACK_MARK, PORT4_FN1),
549 PINMUX_DATA(FSIAILR_MARK, PORT5_FN1),
550 PINMUX_DATA(FSIAIBT_MARK, PORT6_FN1),
551 PINMUX_DATA(FSIAISLD_MARK, PORT7_FN1),
552 PINMUX_DATA(FSIAOMC_MARK, PORT8_FN1),
553 PINMUX_DATA(FSIAOLR_MARK, PORT9_FN1),
554 PINMUX_DATA(FSIAOBT_MARK, PORT10_FN1),
555 PINMUX_DATA(FSIAOSLD_MARK, PORT11_FN1),
556 PINMUX_DATA(FMSOCK_MARK, PORT12_FN1),
557 PINMUX_DATA(FMSOOLR_MARK, PORT13_FN1),
558 PINMUX_DATA(FMSOOBT_MARK, PORT14_FN1),
559 PINMUX_DATA(FMSOSLD_MARK, PORT15_FN1),
560 PINMUX_DATA(FMSOILR_MARK, PORT16_FN1),
561 PINMUX_DATA(FMSOIBT_MARK, PORT17_FN1),
562 PINMUX_DATA(FMSISLD_MARK, PORT18_FN1),
563 PINMUX_DATA(A0_MARK, PORT19_FN1),
564 PINMUX_DATA(A1_MARK, PORT20_FN1),
565 PINMUX_DATA(A2_MARK, PORT21_FN1),
566 PINMUX_DATA(A3_MARK, PORT22_FN1),
567 PINMUX_DATA(A4_FOE_MARK, PORT23_FN1),
568 PINMUX_DATA(A5_FCDE_MARK, PORT24_FN1),
569 PINMUX_DATA(A6_MARK, PORT25_FN1),
570 PINMUX_DATA(A7_MARK, PORT26_FN1),
571 PINMUX_DATA(A8_MARK, PORT27_FN1),
572 PINMUX_DATA(A9_MARK, PORT28_FN1),
573 PINMUX_DATA(A10_MARK, PORT29_FN1),
574 PINMUX_DATA(A11_MARK, PORT30_FN1),
575 PINMUX_DATA(A12_MARK, PORT31_FN1),
576 PINMUX_DATA(A13_MARK, PORT32_FN1),
577 PINMUX_DATA(A14_MARK, PORT33_FN1),
578 PINMUX_DATA(A15_MARK, PORT34_FN1),
579 PINMUX_DATA(A16_MARK, PORT35_FN1),
580 PINMUX_DATA(A17_MARK, PORT36_FN1),
581 PINMUX_DATA(A18_MARK, PORT37_FN1),
582 PINMUX_DATA(A19_MARK, PORT38_FN1),
583 PINMUX_DATA(A20_MARK, PORT39_FN1),
584 PINMUX_DATA(A21_MARK, PORT40_FN1),
585 PINMUX_DATA(A22_MARK, PORT41_FN1),
586 PINMUX_DATA(A23_MARK, PORT42_FN1),
587 PINMUX_DATA(A24_MARK, PORT43_FN1),
588 PINMUX_DATA(A25_MARK, PORT44_FN1),
589 PINMUX_DATA(A26_MARK, PORT45_FN1),
590 PINMUX_DATA(D0_NAF0_MARK, PORT46_FN1),
591 PINMUX_DATA(D1_NAF1_MARK, PORT47_FN1),
592 PINMUX_DATA(D2_NAF2_MARK, PORT48_FN1),
593 PINMUX_DATA(D3_NAF3_MARK, PORT49_FN1),
594 PINMUX_DATA(D4_NAF4_MARK, PORT50_FN1),
595 PINMUX_DATA(D5_NAF5_MARK, PORT51_FN1),
596 PINMUX_DATA(D6_NAF6_MARK, PORT52_FN1),
597 PINMUX_DATA(D7_NAF7_MARK, PORT53_FN1),
598 PINMUX_DATA(D8_NAF8_MARK, PORT54_FN1),
599 PINMUX_DATA(D9_NAF9_MARK, PORT55_FN1),
600 PINMUX_DATA(D10_NAF10_MARK, PORT56_FN1),
601 PINMUX_DATA(D11_NAF11_MARK, PORT57_FN1),
602 PINMUX_DATA(D12_NAF12_MARK, PORT58_FN1),
603 PINMUX_DATA(D13_NAF13_MARK, PORT59_FN1),
604 PINMUX_DATA(D14_NAF14_MARK, PORT60_FN1),
605 PINMUX_DATA(D15_NAF15_MARK, PORT61_FN1),
606 PINMUX_DATA(CS0_MARK, PORT62_FN1),
607 PINMUX_DATA(CS2_MARK, PORT63_FN1),
608 PINMUX_DATA(CS4_MARK, PORT64_FN1),
609 PINMUX_DATA(CS5A_MARK, PORT65_FN1),
610 PINMUX_DATA(CS5B_MARK, PORT66_FN1),
611 PINMUX_DATA(CS6A_MARK, PORT67_FN1),
612 PINMUX_DATA(FCE0_MARK, PORT68_FN1),
613 PINMUX_DATA(RD_FSC_MARK, PORT69_FN1),
614 PINMUX_DATA(WE0_FWE_MARK, PORT70_FN1),
615 PINMUX_DATA(WE1_MARK, PORT71_FN1),
616 PINMUX_DATA(CKO_MARK, PORT72_FN1),
617 PINMUX_DATA(FRB_MARK, PORT73_FN1),
618 PINMUX_DATA(WAIT_MARK, PORT74_FN1),
619 PINMUX_DATA(RDWR_MARK, PORT75_FN1),
620 PINMUX_DATA(MEMC_AD0_MARK, PORT76_FN1),
621 PINMUX_DATA(MEMC_AD1_MARK, PORT77_FN1),
622 PINMUX_DATA(MEMC_AD2_MARK, PORT78_FN1),
623 PINMUX_DATA(MEMC_AD3_MARK, PORT79_FN1),
624 PINMUX_DATA(MEMC_AD4_MARK, PORT80_FN1),
625 PINMUX_DATA(MEMC_AD5_MARK, PORT81_FN1),
626 PINMUX_DATA(MEMC_AD6_MARK, PORT82_FN1),
627 PINMUX_DATA(MEMC_AD7_MARK, PORT83_FN1),
628 PINMUX_DATA(MEMC_AD8_MARK, PORT84_FN1),
629 PINMUX_DATA(MEMC_AD9_MARK, PORT85_FN1),
630 PINMUX_DATA(MEMC_AD10_MARK, PORT86_FN1),
631 PINMUX_DATA(MEMC_AD11_MARK, PORT87_FN1),
632 PINMUX_DATA(MEMC_AD12_MARK, PORT88_FN1),
633 PINMUX_DATA(MEMC_AD13_MARK, PORT89_FN1),
634 PINMUX_DATA(MEMC_AD14_MARK, PORT90_FN1),
635 PINMUX_DATA(MEMC_AD15_MARK, PORT91_FN1),
636 PINMUX_DATA(MEMC_CS0_MARK, PORT92_FN1),
637 PINMUX_DATA(MEMC_BUSCLK_MEMC_A0_MARK, PORT93_FN1),
638 PINMUX_DATA(MEMC_CS1_MEMC_A1_MARK, PORT94_FN1),
639 PINMUX_DATA(MEMC_ADV_MEMC_DREQ0_MARK, PORT95_FN1),
640 PINMUX_DATA(MEMC_WAIT_MEMC_DREQ1_MARK, PORT96_FN1),
641 PINMUX_DATA(MEMC_NOE_MARK, PORT97_FN1),
642 PINMUX_DATA(MEMC_NWE_MARK, PORT98_FN1),
643 PINMUX_DATA(MEMC_INT_MARK, PORT99_FN1),
644 PINMUX_DATA(VIO_VD_MARK, PORT100_FN1),
645 PINMUX_DATA(VIO_HD_MARK, PORT101_FN1),
646 PINMUX_DATA(VIO_D0_MARK, PORT102_FN1),
647 PINMUX_DATA(VIO_D1_MARK, PORT103_FN1),
648 PINMUX_DATA(VIO_D2_MARK, PORT104_FN1),
649 PINMUX_DATA(VIO_D3_MARK, PORT105_FN1),
650 PINMUX_DATA(VIO_D4_MARK, PORT106_FN1),
651 PINMUX_DATA(VIO_D5_MARK, PORT107_FN1),
652 PINMUX_DATA(VIO_D6_MARK, PORT108_FN1),
653 PINMUX_DATA(VIO_D7_MARK, PORT109_FN1),
654 PINMUX_DATA(VIO_D8_MARK, PORT110_FN1),
655 PINMUX_DATA(VIO_D9_MARK, PORT111_FN1),
656 PINMUX_DATA(VIO_D10_MARK, PORT112_FN1),
657 PINMUX_DATA(VIO_D11_MARK, PORT113_FN1),
658 PINMUX_DATA(VIO_D12_MARK, PORT114_FN1),
659 PINMUX_DATA(VIO_D13_MARK, PORT115_FN1),
660 PINMUX_DATA(VIO_D14_MARK, PORT116_FN1),
661 PINMUX_DATA(VIO_D15_MARK, PORT117_FN1),
662 PINMUX_DATA(VIO_CLK_MARK, PORT118_FN1),
663 PINMUX_DATA(VIO_FIELD_MARK, PORT119_FN1),
664 PINMUX_DATA(VIO_CKO_MARK, PORT120_FN1),
665 PINMUX_DATA(LCDD0_MARK, PORT121_FN1),
666 PINMUX_DATA(LCDD1_MARK, PORT122_FN1),
667 PINMUX_DATA(LCDD2_MARK, PORT123_FN1),
668 PINMUX_DATA(LCDD3_MARK, PORT124_FN1),
669 PINMUX_DATA(LCDD4_MARK, PORT125_FN1),
670 PINMUX_DATA(LCDD5_MARK, PORT126_FN1),
671 PINMUX_DATA(LCDD6_MARK, PORT127_FN1),
672 PINMUX_DATA(LCDD7_MARK, PORT128_FN1),
673 PINMUX_DATA(LCDD8_MARK, PORT129_FN1),
674 PINMUX_DATA(LCDD9_MARK, PORT130_FN1),
675 PINMUX_DATA(LCDD10_MARK, PORT131_FN1),
676 PINMUX_DATA(LCDD11_MARK, PORT132_FN1),
677 PINMUX_DATA(LCDD12_MARK, PORT133_FN1),
678 PINMUX_DATA(LCDD13_MARK, PORT134_FN1),
679 PINMUX_DATA(LCDD14_MARK, PORT135_FN1),
680 PINMUX_DATA(LCDD15_MARK, PORT136_FN1),
681 PINMUX_DATA(LCDD16_MARK, PORT137_FN1),
682 PINMUX_DATA(LCDD17_MARK, PORT138_FN1),
683 PINMUX_DATA(LCDD18_MARK, PORT139_FN1),
684 PINMUX_DATA(LCDD19_MARK, PORT140_FN1),
685 PINMUX_DATA(LCDD20_MARK, PORT141_FN1),
686 PINMUX_DATA(LCDD21_MARK, PORT142_FN1),
687 PINMUX_DATA(LCDD22_MARK, PORT143_FN1),
688 PINMUX_DATA(LCDD23_MARK, PORT144_FN1),
689 PINMUX_DATA(LCDHSYN_MARK, PORT145_FN1),
690 PINMUX_DATA(LCDVSYN_MARK, PORT146_FN1),
691 PINMUX_DATA(LCDDCK_MARK, PORT147_FN1),
692 PINMUX_DATA(LCDRD_MARK, PORT148_FN1),
693 PINMUX_DATA(LCDDISP_MARK, PORT149_FN1),
694 PINMUX_DATA(LCDLCLK_MARK, PORT150_FN1),
695 PINMUX_DATA(LCDDON_MARK, PORT151_FN1),
696 PINMUX_DATA(SCIFA0_TXD_MARK, PORT152_FN1),
697 PINMUX_DATA(SCIFA0_RXD_MARK, PORT153_FN1),
698 PINMUX_DATA(SCIFA1_TXD_MARK, PORT154_FN1),
699 PINMUX_DATA(SCIFA1_RXD_MARK, PORT155_FN1),
700 PINMUX_DATA(TS_SPSYNC1_MARK, PORT156_FN1),
701 PINMUX_DATA(TS_SDAT1_MARK, PORT157_FN1),
702 PINMUX_DATA(TS_SDEN1_MARK, PORT158_FN1),
703 PINMUX_DATA(TS_SCK1_MARK, PORT159_FN1),
704 PINMUX_DATA(TPU0TO0_MARK, PORT160_FN1),
705 PINMUX_DATA(TPU0TO1_MARK, PORT161_FN1),
706 PINMUX_DATA(SCIFB_SCK_MARK, PORT162_FN1),
707 PINMUX_DATA(SCIFB_RTS_MARK, PORT163_FN1),
708 PINMUX_DATA(SCIFB_CTS_MARK, PORT164_FN1),
709 PINMUX_DATA(SCIFB_TXD_MARK, PORT165_FN1),
710 PINMUX_DATA(SCIFB_RXD_MARK, PORT166_FN1),
711 PINMUX_DATA(VBUS0_0_MARK, PORT167_FN1),
712 PINMUX_DATA(VBUS0_1_MARK, PORT168_FN1),
713 PINMUX_DATA(HDMI_HPD_MARK, PORT169_FN1),
714 PINMUX_DATA(HDMI_CEC_MARK, PORT170_FN1),
715 PINMUX_DATA(SDHICLK0_MARK, PORT171_FN1),
716 PINMUX_DATA(SDHICD0_MARK, PORT172_FN1),
717 PINMUX_DATA(SDHID0_0_MARK, PORT173_FN1),
718 PINMUX_DATA(SDHID0_1_MARK, PORT174_FN1),
719 PINMUX_DATA(SDHID0_2_MARK, PORT175_FN1),
720 PINMUX_DATA(SDHID0_3_MARK, PORT176_FN1),
721 PINMUX_DATA(SDHICMD0_MARK, PORT177_FN1),
722 PINMUX_DATA(SDHIWP0_MARK, PORT178_FN1),
723 PINMUX_DATA(SDHICLK1_MARK, PORT179_FN1),
724 PINMUX_DATA(SDHID1_0_MARK, PORT180_FN1),
725 PINMUX_DATA(SDHID1_1_MARK, PORT181_FN1),
726 PINMUX_DATA(SDHID1_2_MARK, PORT182_FN1),
727 PINMUX_DATA(SDHID1_3_MARK, PORT183_FN1),
728 PINMUX_DATA(SDHICMD1_MARK, PORT184_FN1),
729 PINMUX_DATA(SDHICLK2_MARK, PORT185_FN1),
730 PINMUX_DATA(SDHID2_0_MARK, PORT186_FN1),
731 PINMUX_DATA(SDHID2_1_MARK, PORT187_FN1),
732 PINMUX_DATA(SDHID2_2_MARK, PORT188_FN1),
733 PINMUX_DATA(SDHID2_3_MARK, PORT189_FN1),
734 PINMUX_DATA(SDHICMD2_MARK, PORT190_FN1),
735
736 /* Function 2 */
737 PINMUX_DATA(FSIBCK_MARK, PORT4_FN2),
738 PINMUX_DATA(SCIFA4_RXD_MARK, PORT5_FN2),
739 PINMUX_DATA(SCIFA4_TXD_MARK, PORT6_FN2),
740 PINMUX_DATA(SCIFA5_RXD_MARK, PORT8_FN2),
741 PINMUX_DATA(FSIASPDIF_11_MARK, PORT11_FN2),
742 PINMUX_DATA(SCIFA5_TXD_MARK, PORT12_FN2),
743 PINMUX_DATA(FMSIOLR_MARK, PORT13_FN2),
744 PINMUX_DATA(FMSIOBT_MARK, PORT14_FN2),
745 PINMUX_DATA(FSIASPDIF_15_MARK, PORT15_FN2),
746 PINMUX_DATA(FMSIILR_MARK, PORT16_FN2),
747 PINMUX_DATA(FMSIIBT_MARK, PORT17_FN2),
748 PINMUX_DATA(BS_MARK, PORT19_FN2),
749 PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT36_FN2),
750 PINMUX_DATA(MSIOF0_TSCK_MARK, PORT37_FN2),
751 PINMUX_DATA(MSIOF0_RXD_MARK, PORT38_FN2),
752 PINMUX_DATA(MSIOF0_RSCK_MARK, PORT39_FN2),
753 PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT40_FN2),
754 PINMUX_DATA(MSIOF0_MCK0_MARK, PORT41_FN2),
755 PINMUX_DATA(MSIOF0_MCK1_MARK, PORT42_FN2),
756 PINMUX_DATA(MSIOF0_SS1_MARK, PORT43_FN2),
757 PINMUX_DATA(MSIOF0_SS2_MARK, PORT44_FN2),
758 PINMUX_DATA(MSIOF0_TXD_MARK, PORT45_FN2),
759 PINMUX_DATA(FMSICK_MARK, PORT65_FN2),
760 PINMUX_DATA(FCE1_MARK, PORT66_FN2),
761 PINMUX_DATA(BBIF1_RXD_MARK, PORT76_FN2),
762 PINMUX_DATA(BBIF1_TSYNC_MARK, PORT77_FN2),
763 PINMUX_DATA(BBIF1_TSCK_MARK, PORT78_FN2),
764 PINMUX_DATA(BBIF1_TXD_MARK, PORT79_FN2),
765 PINMUX_DATA(BBIF1_RSCK_MARK, PORT80_FN2),
766 PINMUX_DATA(BBIF1_RSYNC_MARK, PORT81_FN2),
767 PINMUX_DATA(BBIF1_FLOW_MARK, PORT82_FN2),
768 PINMUX_DATA(BB_RX_FLOW_N_MARK, PORT83_FN2),
769 PINMUX_DATA(MSIOF1_RSCK_MARK, PORT84_FN2),
770 PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT85_FN2),
771 PINMUX_DATA(MSIOF1_MCK0_MARK, PORT86_FN2),
772 PINMUX_DATA(MSIOF1_MCK1_MARK, PORT87_FN2),
773 PINMUX_DATA(MSIOF1_TSCK_88_MARK, PORT88_FN2, MSEL4CR_10_1),
774 PINMUX_DATA(MSIOF1_TSYNC_89_MARK, PORT89_FN2, MSEL4CR_10_1),
775 PINMUX_DATA(MSIOF1_TXD_90_MARK, PORT90_FN2, MSEL4CR_10_1),
776 PINMUX_DATA(MSIOF1_RXD_91_MARK, PORT91_FN2, MSEL4CR_10_1),
777 PINMUX_DATA(MSIOF1_SS1_92_MARK, PORT92_FN2, MSEL4CR_10_1),
778 PINMUX_DATA(MSIOF1_SS2_93_MARK, PORT93_FN2, MSEL4CR_10_1),
779 PINMUX_DATA(SCIFA2_CTS1_MARK, PORT94_FN2),
780 PINMUX_DATA(SCIFA2_RTS1_MARK, PORT95_FN2),
781 PINMUX_DATA(SCIFA2_TXD1_MARK, PORT96_FN2),
782 PINMUX_DATA(SCIFA2_RXD1_MARK, PORT97_FN2),
783 PINMUX_DATA(SCIFA2_SCK1_MARK, PORT98_FN2),
784 PINMUX_DATA(I2C_SCL2_MARK, PORT110_FN2),
785 PINMUX_DATA(I2C_SDA2_MARK, PORT111_FN2),
786 PINMUX_DATA(I2C_SCL3_MARK, PORT114_FN2, MSEL4CR_16_1),
787 PINMUX_DATA(I2C_SDA3_MARK, PORT115_FN2, MSEL4CR_16_1),
788 PINMUX_DATA(I2C_SCL4_MARK, PORT116_FN2, MSEL4CR_17_1),
789 PINMUX_DATA(I2C_SDA4_MARK, PORT117_FN2, MSEL4CR_17_1),
790 PINMUX_DATA(MSIOF2_RSCK_MARK, PORT134_FN2),
791 PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT135_FN2),
792 PINMUX_DATA(MSIOF2_MCK0_MARK, PORT136_FN2),
793 PINMUX_DATA(MSIOF2_MCK1_MARK, PORT137_FN2),
794 PINMUX_DATA(MSIOF2_SS1_MARK, PORT138_FN2),
795 PINMUX_DATA(MSIOF2_SS2_MARK, PORT139_FN2),
796 PINMUX_DATA(SCIFA3_CTS_140_MARK, PORT140_FN2, MSEL3CR_9_1),
797 PINMUX_DATA(SCIFA3_RTS_141_MARK, PORT141_FN2),
798 PINMUX_DATA(SCIFA3_SCK_MARK, PORT142_FN2),
799 PINMUX_DATA(SCIFA3_TXD_MARK, PORT143_FN2),
800 PINMUX_DATA(SCIFA3_RXD_MARK, PORT144_FN2),
801 PINMUX_DATA(MSIOF2_TSYNC_MARK, PORT148_FN2),
802 PINMUX_DATA(MSIOF2_TSCK_MARK, PORT149_FN2),
803 PINMUX_DATA(MSIOF2_RXD_MARK, PORT150_FN2),
804 PINMUX_DATA(MSIOF2_TXD_MARK, PORT151_FN2),
805 PINMUX_DATA(SCIFA0_SCK_MARK, PORT156_FN2),
806 PINMUX_DATA(SCIFA0_RTS_MARK, PORT157_FN2),
807 PINMUX_DATA(SCIFA0_CTS_MARK, PORT158_FN2),
808 PINMUX_DATA(SCIFA1_SCK_MARK, PORT159_FN2),
809 PINMUX_DATA(SCIFA1_RTS_MARK, PORT160_FN2),
810 PINMUX_DATA(SCIFA1_CTS_MARK, PORT161_FN2),
811
812 /* Function 3 */
813 PINMUX_DATA(VIO_CKO1_MARK, PORT16_FN3),
814 PINMUX_DATA(VIO_CKO2_MARK, PORT17_FN3),
815 PINMUX_DATA(IDIN_1_18_MARK, PORT18_FN3, MSEL4CR_14_1),
816 PINMUX_DATA(MSIOF1_TSCK_39_MARK, PORT39_FN3, MSEL4CR_10_0),
817 PINMUX_DATA(MSIOF1_TSYNC_40_MARK, PORT40_FN3, MSEL4CR_10_0),
818 PINMUX_DATA(MSIOF1_TXD_41_MARK, PORT41_FN3, MSEL4CR_10_0),
819 PINMUX_DATA(MSIOF1_RXD_42_MARK, PORT42_FN3, MSEL4CR_10_0),
820 PINMUX_DATA(MSIOF1_SS1_43_MARK, PORT43_FN3, MSEL4CR_10_0),
821 PINMUX_DATA(MSIOF1_SS2_44_MARK, PORT44_FN3, MSEL4CR_10_0),
822 PINMUX_DATA(MMCD1_0_MARK, PORT54_FN3, MSEL4CR_15_1),
823 PINMUX_DATA(MMCD1_1_MARK, PORT55_FN3, MSEL4CR_15_1),
824 PINMUX_DATA(MMCD1_2_MARK, PORT56_FN3, MSEL4CR_15_1),
825 PINMUX_DATA(MMCD1_3_MARK, PORT57_FN3, MSEL4CR_15_1),
826 PINMUX_DATA(MMCD1_4_MARK, PORT58_FN3, MSEL4CR_15_1),
827 PINMUX_DATA(MMCD1_5_MARK, PORT59_FN3, MSEL4CR_15_1),
828 PINMUX_DATA(MMCD1_6_MARK, PORT60_FN3, MSEL4CR_15_1),
829 PINMUX_DATA(MMCD1_7_MARK, PORT61_FN3, MSEL4CR_15_1),
830 PINMUX_DATA(VINT_I_MARK, PORT65_FN3),
831 PINMUX_DATA(MMCCLK1_MARK, PORT66_FN3, MSEL4CR_15_1),
832 PINMUX_DATA(MMCCMD1_MARK, PORT67_FN3, MSEL4CR_15_1),
833 PINMUX_DATA(TPU0TO2_93_MARK, PORT93_FN3),
834 PINMUX_DATA(TPU0TO2_99_MARK, PORT99_FN3),
835 PINMUX_DATA(TPU0TO3_MARK, PORT112_FN3),
836 PINMUX_DATA(IDIN_0_MARK, PORT113_FN3),
837 PINMUX_DATA(EXTLP_0_MARK, PORT114_FN3),
838 PINMUX_DATA(OVCN2_0_MARK, PORT115_FN3),
839 PINMUX_DATA(PWEN_0_MARK, PORT116_FN3),
840 PINMUX_DATA(OVCN_0_MARK, PORT117_FN3),
841 PINMUX_DATA(KEYOUT7_MARK, PORT121_FN3),
842 PINMUX_DATA(KEYOUT6_MARK, PORT122_FN3),
843 PINMUX_DATA(KEYOUT5_MARK, PORT123_FN3),
844 PINMUX_DATA(KEYOUT4_MARK, PORT124_FN3),
845 PINMUX_DATA(KEYOUT3_MARK, PORT125_FN3),
846 PINMUX_DATA(KEYOUT2_MARK, PORT126_FN3),
847 PINMUX_DATA(KEYOUT1_MARK, PORT127_FN3),
848 PINMUX_DATA(KEYOUT0_MARK, PORT128_FN3),
849 PINMUX_DATA(KEYIN7_MARK, PORT129_FN3),
850 PINMUX_DATA(KEYIN6_MARK, PORT130_FN3),
851 PINMUX_DATA(KEYIN5_MARK, PORT131_FN3),
852 PINMUX_DATA(KEYIN4_MARK, PORT132_FN3),
853 PINMUX_DATA(KEYIN3_133_MARK, PORT133_FN3, MSEL4CR_18_0),
854 PINMUX_DATA(KEYIN2_134_MARK, PORT134_FN3, MSEL4CR_18_0),
855 PINMUX_DATA(KEYIN1_135_MARK, PORT135_FN3, MSEL4CR_18_0),
856 PINMUX_DATA(KEYIN0_136_MARK, PORT136_FN3, MSEL4CR_18_0),
857 PINMUX_DATA(TS_SPSYNC2_MARK, PORT137_FN3),
858 PINMUX_DATA(IROUT_139_MARK, PORT139_FN3),
859 PINMUX_DATA(IRDA_OUT_MARK, PORT140_FN3),
860 PINMUX_DATA(IRDA_IN_MARK, PORT141_FN3),
861 PINMUX_DATA(IRDA_FIRSEL_MARK, PORT142_FN3),
862 PINMUX_DATA(TS_SDAT2_MARK, PORT145_FN3),
863 PINMUX_DATA(TS_SDEN2_MARK, PORT146_FN3),
864 PINMUX_DATA(TS_SCK2_MARK, PORT147_FN3),
865
866 /* Function 4 */
867 PINMUX_DATA(SCIFA3_CTS_43_MARK, PORT43_FN4, MSEL3CR_9_0),
868 PINMUX_DATA(SCIFA3_RTS_44_MARK, PORT44_FN4),
869 PINMUX_DATA(GP_RX_FLAG_MARK, PORT76_FN4),
870 PINMUX_DATA(GP_RX_DATA_MARK, PORT77_FN4),
871 PINMUX_DATA(GP_TX_READY_MARK, PORT78_FN4),
872 PINMUX_DATA(GP_RX_WAKE_MARK, PORT79_FN4),
873 PINMUX_DATA(MP_TX_FLAG_MARK, PORT80_FN4),
874 PINMUX_DATA(MP_TX_DATA_MARK, PORT81_FN4),
875 PINMUX_DATA(MP_RX_READY_MARK, PORT82_FN4),
876 PINMUX_DATA(MP_TX_WAKE_MARK, PORT83_FN4),
877 PINMUX_DATA(MMCD0_0_MARK, PORT84_FN4, MSEL4CR_15_0),
878 PINMUX_DATA(MMCD0_1_MARK, PORT85_FN4, MSEL4CR_15_0),
879 PINMUX_DATA(MMCD0_2_MARK, PORT86_FN4, MSEL4CR_15_0),
880 PINMUX_DATA(MMCD0_3_MARK, PORT87_FN4, MSEL4CR_15_0),
881 PINMUX_DATA(MMCD0_4_MARK, PORT88_FN4, MSEL4CR_15_0),
882 PINMUX_DATA(MMCD0_5_MARK, PORT89_FN4, MSEL4CR_15_0),
883 PINMUX_DATA(MMCD0_6_MARK, PORT90_FN4, MSEL4CR_15_0),
884 PINMUX_DATA(MMCD0_7_MARK, PORT91_FN4, MSEL4CR_15_0),
885 PINMUX_DATA(MMCCMD0_MARK, PORT92_FN4, MSEL4CR_15_0),
886 PINMUX_DATA(SIM_RST_MARK, PORT94_FN4),
887 PINMUX_DATA(SIM_CLK_MARK, PORT95_FN4),
888 PINMUX_DATA(SIM_D_MARK, PORT98_FN4),
889 PINMUX_DATA(MMCCLK0_MARK, PORT99_FN4, MSEL4CR_15_0),
890 PINMUX_DATA(IDIN_1_113_MARK, PORT113_FN4, MSEL4CR_14_0),
891 PINMUX_DATA(OVCN_1_114_MARK, PORT114_FN4, MSEL4CR_14_0),
892 PINMUX_DATA(PWEN_1_115_MARK, PORT115_FN4),
893 PINMUX_DATA(EXTLP_1_MARK, PORT116_FN4),
894 PINMUX_DATA(OVCN2_1_MARK, PORT117_FN4),
895 PINMUX_DATA(KEYIN0_121_MARK, PORT121_FN4, MSEL4CR_18_1),
896 PINMUX_DATA(KEYIN1_122_MARK, PORT122_FN4, MSEL4CR_18_1),
897 PINMUX_DATA(KEYIN2_123_MARK, PORT123_FN4, MSEL4CR_18_1),
898 PINMUX_DATA(KEYIN3_124_MARK, PORT124_FN4, MSEL4CR_18_1),
899 PINMUX_DATA(PWEN_1_138_MARK, PORT138_FN4),
900 PINMUX_DATA(IROUT_140_MARK, PORT140_FN4),
901 PINMUX_DATA(LCDCS_MARK, PORT145_FN4),
902 PINMUX_DATA(LCDWR_MARK, PORT147_FN4),
903 PINMUX_DATA(LCDRS_MARK, PORT149_FN4),
904 PINMUX_DATA(OVCN_1_162_MARK, PORT162_FN4, MSEL4CR_14_1),
905
906 /* Function 5 */
907 PINMUX_DATA(GPI0_MARK, PORT41_FN5),
908 PINMUX_DATA(GPI1_MARK, PORT42_FN5),
909 PINMUX_DATA(GPO0_MARK, PORT43_FN5),
910 PINMUX_DATA(GPO1_MARK, PORT44_FN5),
911 PINMUX_DATA(I2C_SCL3S_MARK, PORT137_FN5, MSEL4CR_16_0),
912 PINMUX_DATA(I2C_SDA3S_MARK, PORT145_FN5, MSEL4CR_16_0),
913 PINMUX_DATA(I2C_SCL4S_MARK, PORT146_FN5, MSEL4CR_17_0),
914 PINMUX_DATA(I2C_SDA4S_MARK, PORT147_FN5, MSEL4CR_17_0),
915
916 /* Function select */
917 PINMUX_DATA(LCDC0_SELECT_MARK, MSEL3CR_6_0),
918 PINMUX_DATA(LCDC1_SELECT_MARK, MSEL3CR_6_1),
919
920 PINMUX_DATA(TS0_1SELECT_MARK, MSEL3CR_21_0, MSEL3CR_20_0),
921 PINMUX_DATA(TS0_2SELECT_MARK, MSEL3CR_21_0, MSEL3CR_20_1),
922 PINMUX_DATA(TS1_1SELECT_MARK, MSEL3CR_27_0, MSEL3CR_26_0),
923 PINMUX_DATA(TS1_2SELECT_MARK, MSEL3CR_27_0, MSEL3CR_26_1),
924
925 PINMUX_DATA(SDENC_CPG_MARK, MSEL4CR_19_0),
926 PINMUX_DATA(SDENC_DV_CLKI_MARK, MSEL4CR_19_1),
927
928 PINMUX_DATA(MFIv6_MARK, MSEL4CR_6_0),
929 PINMUX_DATA(MFIv4_MARK, MSEL4CR_6_1),
930};
931
932static struct pinmux_gpio pinmux_gpios[] = {
933
934 /* PORT */
935 GPIO_PORT_ALL(),
936
937 /* IRQ */
938 GPIO_FN(IRQ0_6), GPIO_FN(IRQ0_162), GPIO_FN(IRQ1),
939 GPIO_FN(IRQ2_4), GPIO_FN(IRQ2_5), GPIO_FN(IRQ3_8),
940 GPIO_FN(IRQ3_16), GPIO_FN(IRQ4_17), GPIO_FN(IRQ4_163),
941 GPIO_FN(IRQ5), GPIO_FN(IRQ6_39), GPIO_FN(IRQ6_164),
942 GPIO_FN(IRQ7_40), GPIO_FN(IRQ7_167), GPIO_FN(IRQ8_41),
943 GPIO_FN(IRQ8_168), GPIO_FN(IRQ9_42), GPIO_FN(IRQ9_169),
944 GPIO_FN(IRQ10), GPIO_FN(IRQ11), GPIO_FN(IRQ12_80),
945 GPIO_FN(IRQ12_137), GPIO_FN(IRQ13_81), GPIO_FN(IRQ13_145),
946 GPIO_FN(IRQ14_82), GPIO_FN(IRQ14_146), GPIO_FN(IRQ15_83),
947 GPIO_FN(IRQ15_147), GPIO_FN(IRQ16_84), GPIO_FN(IRQ16_170),
948 GPIO_FN(IRQ17), GPIO_FN(IRQ18), GPIO_FN(IRQ19),
949 GPIO_FN(IRQ20), GPIO_FN(IRQ21), GPIO_FN(IRQ22),
950 GPIO_FN(IRQ23), GPIO_FN(IRQ24), GPIO_FN(IRQ25),
951 GPIO_FN(IRQ26_121), GPIO_FN(IRQ26_172), GPIO_FN(IRQ27_122),
952 GPIO_FN(IRQ27_180), GPIO_FN(IRQ28_123), GPIO_FN(IRQ28_181),
953 GPIO_FN(IRQ29_129), GPIO_FN(IRQ29_182), GPIO_FN(IRQ30_130),
954 GPIO_FN(IRQ30_183), GPIO_FN(IRQ31_138), GPIO_FN(IRQ31_184),
955
956 /* MSIOF0 */
957 GPIO_FN(MSIOF0_TSYNC), GPIO_FN(MSIOF0_TSCK), GPIO_FN(MSIOF0_RXD),
958 GPIO_FN(MSIOF0_RSCK), GPIO_FN(MSIOF0_RSYNC), GPIO_FN(MSIOF0_MCK0),
959 GPIO_FN(MSIOF0_MCK1), GPIO_FN(MSIOF0_SS1), GPIO_FN(MSIOF0_SS2),
960 GPIO_FN(MSIOF0_TXD),
961
962 /* MSIOF1 */
963 GPIO_FN(MSIOF1_TSCK_39), GPIO_FN(MSIOF1_TSCK_88),
964 GPIO_FN(MSIOF1_TSYNC_40), GPIO_FN(MSIOF1_TSYNC_89),
965 GPIO_FN(MSIOF1_TXD_41), GPIO_FN(MSIOF1_TXD_90),
966 GPIO_FN(MSIOF1_RXD_42), GPIO_FN(MSIOF1_RXD_91),
967 GPIO_FN(MSIOF1_SS1_43), GPIO_FN(MSIOF1_SS1_92),
968 GPIO_FN(MSIOF1_SS2_44), GPIO_FN(MSIOF1_SS2_93),
969 GPIO_FN(MSIOF1_RSCK), GPIO_FN(MSIOF1_RSYNC),
970 GPIO_FN(MSIOF1_MCK0), GPIO_FN(MSIOF1_MCK1),
971
972 /* MSIOF2 */
973 GPIO_FN(MSIOF2_RSCK), GPIO_FN(MSIOF2_RSYNC), GPIO_FN(MSIOF2_MCK0),
974 GPIO_FN(MSIOF2_MCK1), GPIO_FN(MSIOF2_SS1), GPIO_FN(MSIOF2_SS2),
975 GPIO_FN(MSIOF2_TSYNC), GPIO_FN(MSIOF2_TSCK), GPIO_FN(MSIOF2_RXD),
976 GPIO_FN(MSIOF2_TXD),
977
978 /* BBIF1 */
979 GPIO_FN(BBIF1_RXD), GPIO_FN(BBIF1_TSYNC), GPIO_FN(BBIF1_TSCK),
980 GPIO_FN(BBIF1_TXD), GPIO_FN(BBIF1_RSCK), GPIO_FN(BBIF1_RSYNC),
981 GPIO_FN(BBIF1_FLOW), GPIO_FN(BB_RX_FLOW_N),
982
983 /* BBIF2 */
984 GPIO_FN(BBIF2_TSCK1), GPIO_FN(BBIF2_TSYNC1),
985 GPIO_FN(BBIF2_TXD1), GPIO_FN(BBIF2_RXD),
986
987 /* FSI */
988 GPIO_FN(FSIACK), GPIO_FN(FSIBCK), GPIO_FN(FSIAILR),
989 GPIO_FN(FSIAIBT), GPIO_FN(FSIAISLD), GPIO_FN(FSIAOMC),
990 GPIO_FN(FSIAOLR), GPIO_FN(FSIAOBT), GPIO_FN(FSIAOSLD),
991 GPIO_FN(FSIASPDIF_11), GPIO_FN(FSIASPDIF_15),
992
993 /* FMSI */
994 GPIO_FN(FMSOCK), GPIO_FN(FMSOOLR), GPIO_FN(FMSIOLR),
995 GPIO_FN(FMSOOBT), GPIO_FN(FMSIOBT), GPIO_FN(FMSOSLD),
996 GPIO_FN(FMSOILR), GPIO_FN(FMSIILR), GPIO_FN(FMSOIBT),
997 GPIO_FN(FMSIIBT), GPIO_FN(FMSISLD), GPIO_FN(FMSICK),
998
999 /* SCIFA0 */
1000 GPIO_FN(SCIFA0_TXD), GPIO_FN(SCIFA0_RXD), GPIO_FN(SCIFA0_SCK),
1001 GPIO_FN(SCIFA0_RTS), GPIO_FN(SCIFA0_CTS),
1002
1003 /* SCIFA1 */
1004 GPIO_FN(SCIFA1_TXD), GPIO_FN(SCIFA1_RXD), GPIO_FN(SCIFA1_SCK),
1005 GPIO_FN(SCIFA1_RTS), GPIO_FN(SCIFA1_CTS),
1006
1007 /* SCIFA2 */
1008 GPIO_FN(SCIFA2_CTS1), GPIO_FN(SCIFA2_RTS1), GPIO_FN(SCIFA2_TXD1),
1009 GPIO_FN(SCIFA2_RXD1), GPIO_FN(SCIFA2_SCK1),
1010
1011 /* SCIFA3 */
1012 GPIO_FN(SCIFA3_CTS_43), GPIO_FN(SCIFA3_CTS_140),
1013 GPIO_FN(SCIFA3_RTS_44), GPIO_FN(SCIFA3_RTS_141),
1014 GPIO_FN(SCIFA3_SCK), GPIO_FN(SCIFA3_TXD),
1015 GPIO_FN(SCIFA3_RXD),
1016
1017 /* SCIFA4 */
1018 GPIO_FN(SCIFA4_RXD), GPIO_FN(SCIFA4_TXD),
1019
1020 /* SCIFA5 */
1021 GPIO_FN(SCIFA5_RXD), GPIO_FN(SCIFA5_TXD),
1022
1023 /* SCIFB */
1024 GPIO_FN(SCIFB_SCK), GPIO_FN(SCIFB_RTS), GPIO_FN(SCIFB_CTS),
1025 GPIO_FN(SCIFB_TXD), GPIO_FN(SCIFB_RXD),
1026
1027 /* CEU */
1028 GPIO_FN(VIO_HD), GPIO_FN(VIO_CKO1), GPIO_FN(VIO_CKO2),
1029 GPIO_FN(VIO_VD), GPIO_FN(VIO_CLK), GPIO_FN(VIO_FIELD),
1030 GPIO_FN(VIO_CKO), GPIO_FN(VIO_D0), GPIO_FN(VIO_D1),
1031 GPIO_FN(VIO_D2), GPIO_FN(VIO_D3), GPIO_FN(VIO_D4),
1032 GPIO_FN(VIO_D5), GPIO_FN(VIO_D6), GPIO_FN(VIO_D7),
1033 GPIO_FN(VIO_D8), GPIO_FN(VIO_D9), GPIO_FN(VIO_D10),
1034 GPIO_FN(VIO_D11), GPIO_FN(VIO_D12), GPIO_FN(VIO_D13),
1035 GPIO_FN(VIO_D14), GPIO_FN(VIO_D15),
1036
1037 /* USB0 */
1038 GPIO_FN(IDIN_0), GPIO_FN(EXTLP_0), GPIO_FN(OVCN2_0),
1039 GPIO_FN(PWEN_0), GPIO_FN(OVCN_0), GPIO_FN(VBUS0_0),
1040
1041 /* USB1 */
1042 GPIO_FN(IDIN_1_18), GPIO_FN(IDIN_1_113),
1043 GPIO_FN(OVCN_1_114), GPIO_FN(OVCN_1_162),
1044 GPIO_FN(PWEN_1_115), GPIO_FN(PWEN_1_138),
1045 GPIO_FN(EXTLP_1), GPIO_FN(OVCN2_1),
1046 GPIO_FN(VBUS0_1),
1047
1048 /* GPIO */
1049 GPIO_FN(GPI0), GPIO_FN(GPI1), GPIO_FN(GPO0), GPIO_FN(GPO1),
1050
1051 /* BSC */
1052 GPIO_FN(BS), GPIO_FN(WE1), GPIO_FN(CKO),
1053 GPIO_FN(WAIT), GPIO_FN(RDWR),
1054
1055 GPIO_FN(A0), GPIO_FN(A1), GPIO_FN(A2),
1056 GPIO_FN(A3), GPIO_FN(A6), GPIO_FN(A7),
1057 GPIO_FN(A8), GPIO_FN(A9), GPIO_FN(A10),
1058 GPIO_FN(A11), GPIO_FN(A12), GPIO_FN(A13),
1059 GPIO_FN(A14), GPIO_FN(A15), GPIO_FN(A16),
1060 GPIO_FN(A17), GPIO_FN(A18), GPIO_FN(A19),
1061 GPIO_FN(A20), GPIO_FN(A21), GPIO_FN(A22),
1062 GPIO_FN(A23), GPIO_FN(A24), GPIO_FN(A25),
1063 GPIO_FN(A26),
1064
1065 GPIO_FN(CS0), GPIO_FN(CS2), GPIO_FN(CS4),
1066 GPIO_FN(CS5A), GPIO_FN(CS5B), GPIO_FN(CS6A),
1067
1068 /* BSC/FLCTL */
1069 GPIO_FN(RD_FSC), GPIO_FN(WE0_FWE), GPIO_FN(A4_FOE),
1070 GPIO_FN(A5_FCDE), GPIO_FN(D0_NAF0), GPIO_FN(D1_NAF1),
1071 GPIO_FN(D2_NAF2), GPIO_FN(D3_NAF3), GPIO_FN(D4_NAF4),
1072 GPIO_FN(D5_NAF5), GPIO_FN(D6_NAF6), GPIO_FN(D7_NAF7),
1073 GPIO_FN(D8_NAF8), GPIO_FN(D9_NAF9), GPIO_FN(D10_NAF10),
1074 GPIO_FN(D11_NAF11), GPIO_FN(D12_NAF12), GPIO_FN(D13_NAF13),
1075 GPIO_FN(D14_NAF14), GPIO_FN(D15_NAF15),
1076
1077 /* MMCIF(1) */
1078 GPIO_FN(MMCD0_0), GPIO_FN(MMCD0_1), GPIO_FN(MMCD0_2),
1079 GPIO_FN(MMCD0_3), GPIO_FN(MMCD0_4), GPIO_FN(MMCD0_5),
1080 GPIO_FN(MMCD0_6), GPIO_FN(MMCD0_7), GPIO_FN(MMCCMD0),
1081 GPIO_FN(MMCCLK0),
1082
1083 /* MMCIF(2) */
1084 GPIO_FN(MMCD1_0), GPIO_FN(MMCD1_1), GPIO_FN(MMCD1_2),
1085 GPIO_FN(MMCD1_3), GPIO_FN(MMCD1_4), GPIO_FN(MMCD1_5),
1086 GPIO_FN(MMCD1_6), GPIO_FN(MMCD1_7), GPIO_FN(MMCCLK1),
1087 GPIO_FN(MMCCMD1),
1088
1089 /* SPU2 */
1090 GPIO_FN(VINT_I),
1091
1092 /* FLCTL */
1093 GPIO_FN(FCE1), GPIO_FN(FCE0), GPIO_FN(FRB),
1094
1095 /* HSI */
1096 GPIO_FN(GP_RX_FLAG), GPIO_FN(GP_RX_DATA), GPIO_FN(GP_TX_READY),
1097 GPIO_FN(GP_RX_WAKE), GPIO_FN(MP_TX_FLAG), GPIO_FN(MP_TX_DATA),
1098 GPIO_FN(MP_RX_READY), GPIO_FN(MP_TX_WAKE),
1099
1100 /* MFI */
1101 GPIO_FN(MFIv6),
1102 GPIO_FN(MFIv4),
1103
1104 GPIO_FN(MEMC_BUSCLK_MEMC_A0), GPIO_FN(MEMC_ADV_MEMC_DREQ0),
1105 GPIO_FN(MEMC_WAIT_MEMC_DREQ1), GPIO_FN(MEMC_CS1_MEMC_A1),
1106 GPIO_FN(MEMC_CS0), GPIO_FN(MEMC_NOE),
1107 GPIO_FN(MEMC_NWE), GPIO_FN(MEMC_INT),
1108
1109 GPIO_FN(MEMC_AD0), GPIO_FN(MEMC_AD1), GPIO_FN(MEMC_AD2),
1110 GPIO_FN(MEMC_AD3), GPIO_FN(MEMC_AD4), GPIO_FN(MEMC_AD5),
1111 GPIO_FN(MEMC_AD6), GPIO_FN(MEMC_AD7), GPIO_FN(MEMC_AD8),
1112 GPIO_FN(MEMC_AD9), GPIO_FN(MEMC_AD10), GPIO_FN(MEMC_AD11),
1113 GPIO_FN(MEMC_AD12), GPIO_FN(MEMC_AD13), GPIO_FN(MEMC_AD14),
1114 GPIO_FN(MEMC_AD15),
1115
1116 /* SIM */
1117 GPIO_FN(SIM_RST), GPIO_FN(SIM_CLK), GPIO_FN(SIM_D),
1118
1119 /* TPU */
1120 GPIO_FN(TPU0TO0), GPIO_FN(TPU0TO1), GPIO_FN(TPU0TO2_93),
1121 GPIO_FN(TPU0TO2_99), GPIO_FN(TPU0TO3),
1122
1123 /* I2C2 */
1124 GPIO_FN(I2C_SCL2), GPIO_FN(I2C_SDA2),
1125
1126 /* I2C3(1) */
1127 GPIO_FN(I2C_SCL3), GPIO_FN(I2C_SDA3),
1128
1129 /* I2C3(2) */
1130 GPIO_FN(I2C_SCL3S), GPIO_FN(I2C_SDA3S),
1131
1132 /* I2C4(2) */
1133 GPIO_FN(I2C_SCL4), GPIO_FN(I2C_SDA4),
1134
1135 /* I2C4(2) */
1136 GPIO_FN(I2C_SCL4S), GPIO_FN(I2C_SDA4S),
1137
1138 /* KEYSC */
1139 GPIO_FN(KEYOUT0), GPIO_FN(KEYIN0_121), GPIO_FN(KEYIN0_136),
1140 GPIO_FN(KEYOUT1), GPIO_FN(KEYIN1_122), GPIO_FN(KEYIN1_135),
1141 GPIO_FN(KEYOUT2), GPIO_FN(KEYIN2_123), GPIO_FN(KEYIN2_134),
1142 GPIO_FN(KEYOUT3), GPIO_FN(KEYIN3_124), GPIO_FN(KEYIN3_133),
1143 GPIO_FN(KEYOUT4), GPIO_FN(KEYIN4), GPIO_FN(KEYOUT5),
1144 GPIO_FN(KEYIN5), GPIO_FN(KEYOUT6), GPIO_FN(KEYIN6),
1145 GPIO_FN(KEYOUT7), GPIO_FN(KEYIN7),
1146
1147 /* LCDC */
1148 GPIO_FN(LCDHSYN), GPIO_FN(LCDCS), GPIO_FN(LCDVSYN),
1149 GPIO_FN(LCDDCK), GPIO_FN(LCDWR), GPIO_FN(LCDRD),
1150 GPIO_FN(LCDDISP), GPIO_FN(LCDRS), GPIO_FN(LCDLCLK),
1151 GPIO_FN(LCDDON),
1152
1153 GPIO_FN(LCDD0), GPIO_FN(LCDD1), GPIO_FN(LCDD2),
1154 GPIO_FN(LCDD3), GPIO_FN(LCDD4), GPIO_FN(LCDD5),
1155 GPIO_FN(LCDD6), GPIO_FN(LCDD7), GPIO_FN(LCDD8),
1156 GPIO_FN(LCDD9), GPIO_FN(LCDD10), GPIO_FN(LCDD11),
1157 GPIO_FN(LCDD12), GPIO_FN(LCDD13), GPIO_FN(LCDD14),
1158 GPIO_FN(LCDD15), GPIO_FN(LCDD16), GPIO_FN(LCDD17),
1159 GPIO_FN(LCDD18), GPIO_FN(LCDD19), GPIO_FN(LCDD20),
1160 GPIO_FN(LCDD21), GPIO_FN(LCDD22), GPIO_FN(LCDD23),
1161
1162 GPIO_FN(LCDC0_SELECT),
1163 GPIO_FN(LCDC1_SELECT),
1164
1165 /* IRDA */
1166 GPIO_FN(IRDA_OUT), GPIO_FN(IRDA_IN), GPIO_FN(IRDA_FIRSEL),
1167 GPIO_FN(IROUT_139), GPIO_FN(IROUT_140),
1168
1169 /* TSIF1 */
1170 GPIO_FN(TS0_1SELECT),
1171 GPIO_FN(TS0_2SELECT),
1172 GPIO_FN(TS1_1SELECT),
1173 GPIO_FN(TS1_2SELECT),
1174
1175 GPIO_FN(TS_SPSYNC1), GPIO_FN(TS_SDAT1),
1176 GPIO_FN(TS_SDEN1), GPIO_FN(TS_SCK1),
1177
1178 /* TSIF2 */
1179 GPIO_FN(TS_SPSYNC2), GPIO_FN(TS_SDAT2),
1180 GPIO_FN(TS_SDEN2), GPIO_FN(TS_SCK2),
1181
1182 /* HDMI */
1183 GPIO_FN(HDMI_HPD), GPIO_FN(HDMI_CEC),
1184
1185 /* SDHI0 */
1186 GPIO_FN(SDHICLK0), GPIO_FN(SDHICD0), GPIO_FN(SDHICMD0),
1187 GPIO_FN(SDHIWP0), GPIO_FN(SDHID0_0), GPIO_FN(SDHID0_1),
1188 GPIO_FN(SDHID0_2), GPIO_FN(SDHID0_3),
1189
1190 /* SDHI1 */
1191 GPIO_FN(SDHICLK1), GPIO_FN(SDHICMD1), GPIO_FN(SDHID1_0),
1192 GPIO_FN(SDHID1_1), GPIO_FN(SDHID1_2), GPIO_FN(SDHID1_3),
1193
1194 /* SDHI2 */
1195 GPIO_FN(SDHICLK2), GPIO_FN(SDHICMD2), GPIO_FN(SDHID2_0),
1196 GPIO_FN(SDHID2_1), GPIO_FN(SDHID2_2), GPIO_FN(SDHID2_3),
1197
1198 /* SDENC */
1199 GPIO_FN(SDENC_CPG),
1200 GPIO_FN(SDENC_DV_CLKI),
1201};
1202
1203static struct pinmux_cfg_reg pinmux_config_regs[] = {
1204 PORTCR(0, 0xE6051000), /* PORT0CR */
1205 PORTCR(1, 0xE6051001), /* PORT1CR */
1206 PORTCR(2, 0xE6051002), /* PORT2CR */
1207 PORTCR(3, 0xE6051003), /* PORT3CR */
1208 PORTCR(4, 0xE6051004), /* PORT4CR */
1209 PORTCR(5, 0xE6051005), /* PORT5CR */
1210 PORTCR(6, 0xE6051006), /* PORT6CR */
1211 PORTCR(7, 0xE6051007), /* PORT7CR */
1212 PORTCR(8, 0xE6051008), /* PORT8CR */
1213 PORTCR(9, 0xE6051009), /* PORT9CR */
1214 PORTCR(10, 0xE605100A), /* PORT10CR */
1215 PORTCR(11, 0xE605100B), /* PORT11CR */
1216 PORTCR(12, 0xE605100C), /* PORT12CR */
1217 PORTCR(13, 0xE605100D), /* PORT13CR */
1218 PORTCR(14, 0xE605100E), /* PORT14CR */
1219 PORTCR(15, 0xE605100F), /* PORT15CR */
1220 PORTCR(16, 0xE6051010), /* PORT16CR */
1221 PORTCR(17, 0xE6051011), /* PORT17CR */
1222 PORTCR(18, 0xE6051012), /* PORT18CR */
1223 PORTCR(19, 0xE6051013), /* PORT19CR */
1224 PORTCR(20, 0xE6051014), /* PORT20CR */
1225 PORTCR(21, 0xE6051015), /* PORT21CR */
1226 PORTCR(22, 0xE6051016), /* PORT22CR */
1227 PORTCR(23, 0xE6051017), /* PORT23CR */
1228 PORTCR(24, 0xE6051018), /* PORT24CR */
1229 PORTCR(25, 0xE6051019), /* PORT25CR */
1230 PORTCR(26, 0xE605101A), /* PORT26CR */
1231 PORTCR(27, 0xE605101B), /* PORT27CR */
1232 PORTCR(28, 0xE605101C), /* PORT28CR */
1233 PORTCR(29, 0xE605101D), /* PORT29CR */
1234 PORTCR(30, 0xE605101E), /* PORT30CR */
1235 PORTCR(31, 0xE605101F), /* PORT31CR */
1236 PORTCR(32, 0xE6051020), /* PORT32CR */
1237 PORTCR(33, 0xE6051021), /* PORT33CR */
1238 PORTCR(34, 0xE6051022), /* PORT34CR */
1239 PORTCR(35, 0xE6051023), /* PORT35CR */
1240 PORTCR(36, 0xE6051024), /* PORT36CR */
1241 PORTCR(37, 0xE6051025), /* PORT37CR */
1242 PORTCR(38, 0xE6051026), /* PORT38CR */
1243 PORTCR(39, 0xE6051027), /* PORT39CR */
1244 PORTCR(40, 0xE6051028), /* PORT40CR */
1245 PORTCR(41, 0xE6051029), /* PORT41CR */
1246 PORTCR(42, 0xE605102A), /* PORT42CR */
1247 PORTCR(43, 0xE605102B), /* PORT43CR */
1248 PORTCR(44, 0xE605102C), /* PORT44CR */
1249 PORTCR(45, 0xE605102D), /* PORT45CR */
1250 PORTCR(46, 0xE605202E), /* PORT46CR */
1251 PORTCR(47, 0xE605202F), /* PORT47CR */
1252 PORTCR(48, 0xE6052030), /* PORT48CR */
1253 PORTCR(49, 0xE6052031), /* PORT49CR */
1254 PORTCR(50, 0xE6052032), /* PORT50CR */
1255 PORTCR(51, 0xE6052033), /* PORT51CR */
1256 PORTCR(52, 0xE6052034), /* PORT52CR */
1257 PORTCR(53, 0xE6052035), /* PORT53CR */
1258 PORTCR(54, 0xE6052036), /* PORT54CR */
1259 PORTCR(55, 0xE6052037), /* PORT55CR */
1260 PORTCR(56, 0xE6052038), /* PORT56CR */
1261 PORTCR(57, 0xE6052039), /* PORT57CR */
1262 PORTCR(58, 0xE605203A), /* PORT58CR */
1263 PORTCR(59, 0xE605203B), /* PORT59CR */
1264 PORTCR(60, 0xE605203C), /* PORT60CR */
1265 PORTCR(61, 0xE605203D), /* PORT61CR */
1266 PORTCR(62, 0xE605203E), /* PORT62CR */
1267 PORTCR(63, 0xE605203F), /* PORT63CR */
1268 PORTCR(64, 0xE6052040), /* PORT64CR */
1269 PORTCR(65, 0xE6052041), /* PORT65CR */
1270 PORTCR(66, 0xE6052042), /* PORT66CR */
1271 PORTCR(67, 0xE6052043), /* PORT67CR */
1272 PORTCR(68, 0xE6052044), /* PORT68CR */
1273 PORTCR(69, 0xE6052045), /* PORT69CR */
1274 PORTCR(70, 0xE6052046), /* PORT70CR */
1275 PORTCR(71, 0xE6052047), /* PORT71CR */
1276 PORTCR(72, 0xE6052048), /* PORT72CR */
1277 PORTCR(73, 0xE6052049), /* PORT73CR */
1278 PORTCR(74, 0xE605204A), /* PORT74CR */
1279 PORTCR(75, 0xE605204B), /* PORT75CR */
1280 PORTCR(76, 0xE605004C), /* PORT76CR */
1281 PORTCR(77, 0xE605004D), /* PORT77CR */
1282 PORTCR(78, 0xE605004E), /* PORT78CR */
1283 PORTCR(79, 0xE605004F), /* PORT79CR */
1284 PORTCR(80, 0xE6050050), /* PORT80CR */
1285 PORTCR(81, 0xE6050051), /* PORT81CR */
1286 PORTCR(82, 0xE6050052), /* PORT82CR */
1287 PORTCR(83, 0xE6050053), /* PORT83CR */
1288 PORTCR(84, 0xE6050054), /* PORT84CR */
1289 PORTCR(85, 0xE6050055), /* PORT85CR */
1290 PORTCR(86, 0xE6050056), /* PORT86CR */
1291 PORTCR(87, 0xE6050057), /* PORT87CR */
1292 PORTCR(88, 0xE6050058), /* PORT88CR */
1293 PORTCR(89, 0xE6050059), /* PORT89CR */
1294 PORTCR(90, 0xE605005A), /* PORT90CR */
1295 PORTCR(91, 0xE605005B), /* PORT91CR */
1296 PORTCR(92, 0xE605005C), /* PORT92CR */
1297 PORTCR(93, 0xE605005D), /* PORT93CR */
1298 PORTCR(94, 0xE605005E), /* PORT94CR */
1299 PORTCR(95, 0xE605005F), /* PORT95CR */
1300 PORTCR(96, 0xE6050060), /* PORT96CR */
1301 PORTCR(97, 0xE6050061), /* PORT97CR */
1302 PORTCR(98, 0xE6050062), /* PORT98CR */
1303 PORTCR(99, 0xE6050063), /* PORT99CR */
1304 PORTCR(100, 0xE6053064), /* PORT100CR */
1305 PORTCR(101, 0xE6053065), /* PORT101CR */
1306 PORTCR(102, 0xE6053066), /* PORT102CR */
1307 PORTCR(103, 0xE6053067), /* PORT103CR */
1308 PORTCR(104, 0xE6053068), /* PORT104CR */
1309 PORTCR(105, 0xE6053069), /* PORT105CR */
1310 PORTCR(106, 0xE605306A), /* PORT106CR */
1311 PORTCR(107, 0xE605306B), /* PORT107CR */
1312 PORTCR(108, 0xE605306C), /* PORT108CR */
1313 PORTCR(109, 0xE605306D), /* PORT109CR */
1314 PORTCR(110, 0xE605306E), /* PORT110CR */
1315 PORTCR(111, 0xE605306F), /* PORT111CR */
1316 PORTCR(112, 0xE6053070), /* PORT112CR */
1317 PORTCR(113, 0xE6053071), /* PORT113CR */
1318 PORTCR(114, 0xE6053072), /* PORT114CR */
1319 PORTCR(115, 0xE6053073), /* PORT115CR */
1320 PORTCR(116, 0xE6053074), /* PORT116CR */
1321 PORTCR(117, 0xE6053075), /* PORT117CR */
1322 PORTCR(118, 0xE6053076), /* PORT118CR */
1323 PORTCR(119, 0xE6053077), /* PORT119CR */
1324 PORTCR(120, 0xE6053078), /* PORT120CR */
1325 PORTCR(121, 0xE6050079), /* PORT121CR */
1326 PORTCR(122, 0xE605007A), /* PORT122CR */
1327 PORTCR(123, 0xE605007B), /* PORT123CR */
1328 PORTCR(124, 0xE605007C), /* PORT124CR */
1329 PORTCR(125, 0xE605007D), /* PORT125CR */
1330 PORTCR(126, 0xE605007E), /* PORT126CR */
1331 PORTCR(127, 0xE605007F), /* PORT127CR */
1332 PORTCR(128, 0xE6050080), /* PORT128CR */
1333 PORTCR(129, 0xE6050081), /* PORT129CR */
1334 PORTCR(130, 0xE6050082), /* PORT130CR */
1335 PORTCR(131, 0xE6050083), /* PORT131CR */
1336 PORTCR(132, 0xE6050084), /* PORT132CR */
1337 PORTCR(133, 0xE6050085), /* PORT133CR */
1338 PORTCR(134, 0xE6050086), /* PORT134CR */
1339 PORTCR(135, 0xE6050087), /* PORT135CR */
1340 PORTCR(136, 0xE6050088), /* PORT136CR */
1341 PORTCR(137, 0xE6050089), /* PORT137CR */
1342 PORTCR(138, 0xE605008A), /* PORT138CR */
1343 PORTCR(139, 0xE605008B), /* PORT139CR */
1344 PORTCR(140, 0xE605008C), /* PORT140CR */
1345 PORTCR(141, 0xE605008D), /* PORT141CR */
1346 PORTCR(142, 0xE605008E), /* PORT142CR */
1347 PORTCR(143, 0xE605008F), /* PORT143CR */
1348 PORTCR(144, 0xE6050090), /* PORT144CR */
1349 PORTCR(145, 0xE6050091), /* PORT145CR */
1350 PORTCR(146, 0xE6050092), /* PORT146CR */
1351 PORTCR(147, 0xE6050093), /* PORT147CR */
1352 PORTCR(148, 0xE6050094), /* PORT148CR */
1353 PORTCR(149, 0xE6050095), /* PORT149CR */
1354 PORTCR(150, 0xE6050096), /* PORT150CR */
1355 PORTCR(151, 0xE6050097), /* PORT151CR */
1356 PORTCR(152, 0xE6053098), /* PORT152CR */
1357 PORTCR(153, 0xE6053099), /* PORT153CR */
1358 PORTCR(154, 0xE605309A), /* PORT154CR */
1359 PORTCR(155, 0xE605309B), /* PORT155CR */
1360 PORTCR(156, 0xE605009C), /* PORT156CR */
1361 PORTCR(157, 0xE605009D), /* PORT157CR */
1362 PORTCR(158, 0xE605009E), /* PORT158CR */
1363 PORTCR(159, 0xE605009F), /* PORT159CR */
1364 PORTCR(160, 0xE60500A0), /* PORT160CR */
1365 PORTCR(161, 0xE60500A1), /* PORT161CR */
1366 PORTCR(162, 0xE60500A2), /* PORT162CR */
1367 PORTCR(163, 0xE60500A3), /* PORT163CR */
1368 PORTCR(164, 0xE60500A4), /* PORT164CR */
1369 PORTCR(165, 0xE60500A5), /* PORT165CR */
1370 PORTCR(166, 0xE60500A6), /* PORT166CR */
1371 PORTCR(167, 0xE60520A7), /* PORT167CR */
1372 PORTCR(168, 0xE60520A8), /* PORT168CR */
1373 PORTCR(169, 0xE60520A9), /* PORT169CR */
1374 PORTCR(170, 0xE60520AA), /* PORT170CR */
1375 PORTCR(171, 0xE60520AB), /* PORT171CR */
1376 PORTCR(172, 0xE60520AC), /* PORT172CR */
1377 PORTCR(173, 0xE60520AD), /* PORT173CR */
1378 PORTCR(174, 0xE60520AE), /* PORT174CR */
1379 PORTCR(175, 0xE60520AF), /* PORT175CR */
1380 PORTCR(176, 0xE60520B0), /* PORT176CR */
1381 PORTCR(177, 0xE60520B1), /* PORT177CR */
1382 PORTCR(178, 0xE60520B2), /* PORT178CR */
1383 PORTCR(179, 0xE60520B3), /* PORT179CR */
1384 PORTCR(180, 0xE60520B4), /* PORT180CR */
1385 PORTCR(181, 0xE60520B5), /* PORT181CR */
1386 PORTCR(182, 0xE60520B6), /* PORT182CR */
1387 PORTCR(183, 0xE60520B7), /* PORT183CR */
1388 PORTCR(184, 0xE60520B8), /* PORT184CR */
1389 PORTCR(185, 0xE60520B9), /* PORT185CR */
1390 PORTCR(186, 0xE60520BA), /* PORT186CR */
1391 PORTCR(187, 0xE60520BB), /* PORT187CR */
1392 PORTCR(188, 0xE60520BC), /* PORT188CR */
1393 PORTCR(189, 0xE60520BD), /* PORT189CR */
1394 PORTCR(190, 0xE60520BE), /* PORT190CR */
1395
1396 { PINMUX_CFG_REG("MSEL1CR", 0xE605800C, 32, 1) {
1397 MSEL1CR_31_0, MSEL1CR_31_1,
1398 MSEL1CR_30_0, MSEL1CR_30_1,
1399 MSEL1CR_29_0, MSEL1CR_29_1,
1400 MSEL1CR_28_0, MSEL1CR_28_1,
1401 MSEL1CR_27_0, MSEL1CR_27_1,
1402 MSEL1CR_26_0, MSEL1CR_26_1,
1403 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1404 0, 0, 0, 0, 0, 0, 0, 0,
1405 MSEL1CR_16_0, MSEL1CR_16_1,
1406 MSEL1CR_15_0, MSEL1CR_15_1,
1407 MSEL1CR_14_0, MSEL1CR_14_1,
1408 MSEL1CR_13_0, MSEL1CR_13_1,
1409 MSEL1CR_12_0, MSEL1CR_12_1,
1410 0, 0, 0, 0,
1411 MSEL1CR_9_0, MSEL1CR_9_1,
1412 MSEL1CR_8_0, MSEL1CR_8_1,
1413 MSEL1CR_7_0, MSEL1CR_7_1,
1414 MSEL1CR_6_0, MSEL1CR_6_1,
1415 0, 0,
1416 MSEL1CR_4_0, MSEL1CR_4_1,
1417 MSEL1CR_3_0, MSEL1CR_3_1,
1418 MSEL1CR_2_0, MSEL1CR_2_1,
1419 0, 0,
1420 MSEL1CR_0_0, MSEL1CR_0_1,
1421 }
1422 },
1423 { PINMUX_CFG_REG("MSEL3CR", 0xE6058020, 32, 1) {
1424 0, 0, 0, 0,
1425 0, 0, 0, 0,
1426 MSEL3CR_27_0, MSEL3CR_27_1,
1427 MSEL3CR_26_0, MSEL3CR_26_1,
1428 0, 0, 0, 0,
1429 0, 0, 0, 0,
1430 MSEL3CR_21_0, MSEL3CR_21_1,
1431 MSEL3CR_20_0, MSEL3CR_20_1,
1432 0, 0, 0, 0,
1433 0, 0, 0, 0,
1434 MSEL3CR_15_0, MSEL3CR_15_1,
1435 0, 0, 0, 0,
1436 0, 0, 0, 0,
1437 0, 0,
1438 MSEL3CR_9_0, MSEL3CR_9_1,
1439 0, 0, 0, 0,
1440 MSEL3CR_6_0, MSEL3CR_6_1,
1441 0, 0, 0, 0,
1442 0, 0, 0, 0,
1443 0, 0, 0, 0,
1444 }
1445 },
1446 { PINMUX_CFG_REG("MSEL4CR", 0xE6058024, 32, 1) {
1447 0, 0, 0, 0,
1448 0, 0, 0, 0,
1449 0, 0, 0, 0,
1450 0, 0, 0, 0,
1451 0, 0, 0, 0,
1452 0, 0, 0, 0,
1453 MSEL4CR_19_0, MSEL4CR_19_1,
1454 MSEL4CR_18_0, MSEL4CR_18_1,
1455 MSEL4CR_17_0, MSEL4CR_17_1,
1456 MSEL4CR_16_0, MSEL4CR_16_1,
1457 MSEL4CR_15_0, MSEL4CR_15_1,
1458 MSEL4CR_14_0, MSEL4CR_14_1,
1459 0, 0, 0, 0,
1460 0, 0,
1461 MSEL4CR_10_0, MSEL4CR_10_1,
1462 0, 0, 0, 0,
1463 0, 0,
1464 MSEL4CR_6_0, MSEL4CR_6_1,
1465 0, 0,
1466 MSEL4CR_4_0, MSEL4CR_4_1,
1467 0, 0, 0, 0,
1468 MSEL4CR_1_0, MSEL4CR_1_1,
1469 0, 0,
1470 }
1471 },
1472 { },
1473};
1474
1475static struct pinmux_data_reg pinmux_data_regs[] = {
1476 { PINMUX_DATA_REG("PORTL095_064DR", 0xE6054008, 32) {
1477 PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
1478 PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
1479 PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
1480 PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
1481 PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
1482 0, 0, 0, 0,
1483 0, 0, 0, 0,
1484 0, 0, 0, 0,
1485 }
1486 },
1487 { PINMUX_DATA_REG("PORTL127_096DR", 0xE605400C, 32) {
1488 PORT127_DATA, PORT126_DATA, PORT125_DATA, PORT124_DATA,
1489 PORT123_DATA, PORT122_DATA, PORT121_DATA, 0,
1490 0, 0, 0, 0,
1491 0, 0, 0, 0,
1492 0, 0, 0, 0,
1493 0, 0, 0, 0,
1494 0, 0, 0, 0,
1495 PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA,
1496 }
1497 },
1498 { PINMUX_DATA_REG("PORTL159_128DR", 0xE6054010, 32) {
1499 PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
1500 0, 0, 0, 0,
1501 PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
1502 PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA,
1503 PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
1504 PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
1505 PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
1506 PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA,
1507 }
1508 },
1509 { PINMUX_DATA_REG("PORTL191_160DR", 0xE6054014, 32) {
1510 0, 0, 0, 0,
1511 0, 0, 0, 0,
1512 0, 0, 0, 0,
1513 0, 0, 0, 0,
1514 0, 0, 0, 0,
1515 0, 0, 0, 0,
1516 0, PORT166_DATA, PORT165_DATA, PORT164_DATA,
1517 PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA,
1518 }
1519 },
1520 { PINMUX_DATA_REG("PORTD031_000DR", 0xE6055000, 32) {
1521 PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
1522 PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
1523 PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
1524 PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
1525 PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
1526 PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
1527 PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
1528 PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA,
1529 }
1530 },
1531 { PINMUX_DATA_REG("PORTD063_032DR", 0xE6055004, 32) {
1532 0, 0, 0, 0, 0, 0, 0, 0,
1533 0, 0, 0, 0, 0, 0, 0, 0,
1534 0, 0, PORT45_DATA, PORT44_DATA,
1535 PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
1536 PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
1537 PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA,
1538 }
1539 },
1540 { PINMUX_DATA_REG("PORTR063_032DR", 0xE6056004, 32) {
1541 PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
1542 PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
1543 PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
1544 PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA,
1545 PORT47_DATA, PORT46_DATA, 0, 0,
1546 0, 0, 0, 0,
1547 0, 0, 0, 0,
1548 0, 0, 0, 0,
1549 }
1550 },
1551 { PINMUX_DATA_REG("PORTR095_064DR", 0xE6056008, 32) {
1552 0, 0, 0, 0,
1553 0, 0, 0, 0,
1554 0, 0, 0, 0,
1555 0, 0, 0, 0,
1556 0, 0, 0, 0,
1557 PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
1558 PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
1559 PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA,
1560 }
1561 },
1562 { PINMUX_DATA_REG("PORTR191_160DR", 0xE6056014, 32) {
1563 0, PORT190_DATA, PORT189_DATA, PORT188_DATA,
1564 PORT187_DATA, PORT186_DATA, PORT185_DATA, PORT184_DATA,
1565 PORT183_DATA, PORT182_DATA, PORT181_DATA, PORT180_DATA,
1566 PORT179_DATA, PORT178_DATA, PORT177_DATA, PORT176_DATA,
1567 PORT175_DATA, PORT174_DATA, PORT173_DATA, PORT172_DATA,
1568 PORT171_DATA, PORT170_DATA, PORT169_DATA, PORT168_DATA,
1569 PORT167_DATA, 0, 0, 0,
1570 0, 0, 0, 0,
1571 }
1572 },
1573 { PINMUX_DATA_REG("PORTU127_096DR", 0xE605700C, 32) {
1574 0, 0, 0, 0,
1575 0, 0, 0, PORT120_DATA,
1576 PORT119_DATA, PORT118_DATA, PORT117_DATA, PORT116_DATA,
1577 PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA,
1578 PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
1579 PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
1580 PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
1581 0, 0, 0, 0,
1582 }
1583 },
1584 { PINMUX_DATA_REG("PORTU159_128DR", 0xE6057010, 32) {
1585 0, 0, 0, 0,
1586 PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
1587 0, 0, 0, 0,
1588 0, 0, 0, 0,
1589 0, 0, 0, 0,
1590 0, 0, 0, 0,
1591 0, 0, 0, 0,
1592 0, 0, 0, 0,
1593 }
1594 },
1595 { },
1596};
1597
1598#define EXT_IRQ16L(n) evt2irq(0x200 + ((n) << 5))
1599#define EXT_IRQ16H(n) evt2irq(0x3200 + (((n) - 16) << 5))
1600static struct pinmux_irq pinmux_irqs[] = {
1601 PINMUX_IRQ(EXT_IRQ16L(0), PORT6_FN0, PORT162_FN0),
1602 PINMUX_IRQ(EXT_IRQ16L(1), PORT12_FN0),
1603 PINMUX_IRQ(EXT_IRQ16L(2), PORT4_FN0, PORT5_FN0),
1604 PINMUX_IRQ(EXT_IRQ16L(3), PORT8_FN0, PORT16_FN0),
1605 PINMUX_IRQ(EXT_IRQ16L(4), PORT17_FN0, PORT163_FN0),
1606 PINMUX_IRQ(EXT_IRQ16L(5), PORT18_FN0),
1607 PINMUX_IRQ(EXT_IRQ16L(6), PORT39_FN0, PORT164_FN0),
1608 PINMUX_IRQ(EXT_IRQ16L(7), PORT40_FN0, PORT167_FN0),
1609 PINMUX_IRQ(EXT_IRQ16L(8), PORT41_FN0, PORT168_FN0),
1610 PINMUX_IRQ(EXT_IRQ16L(9), PORT42_FN0, PORT169_FN0),
1611 PINMUX_IRQ(EXT_IRQ16L(10), PORT65_FN0),
1612 PINMUX_IRQ(EXT_IRQ16L(11), PORT67_FN0),
1613 PINMUX_IRQ(EXT_IRQ16L(12), PORT80_FN0, PORT137_FN0),
1614 PINMUX_IRQ(EXT_IRQ16L(13), PORT81_FN0, PORT145_FN0),
1615 PINMUX_IRQ(EXT_IRQ16L(14), PORT82_FN0, PORT146_FN0),
1616 PINMUX_IRQ(EXT_IRQ16L(15), PORT83_FN0, PORT147_FN0),
1617 PINMUX_IRQ(EXT_IRQ16H(16), PORT84_FN0, PORT170_FN0),
1618 PINMUX_IRQ(EXT_IRQ16H(17), PORT85_FN0),
1619 PINMUX_IRQ(EXT_IRQ16H(18), PORT86_FN0),
1620 PINMUX_IRQ(EXT_IRQ16H(19), PORT87_FN0),
1621 PINMUX_IRQ(EXT_IRQ16H(20), PORT92_FN0),
1622 PINMUX_IRQ(EXT_IRQ16H(21), PORT93_FN0),
1623 PINMUX_IRQ(EXT_IRQ16H(22), PORT94_FN0),
1624 PINMUX_IRQ(EXT_IRQ16H(23), PORT95_FN0),
1625 PINMUX_IRQ(EXT_IRQ16H(24), PORT112_FN0),
1626 PINMUX_IRQ(EXT_IRQ16H(25), PORT119_FN0),
1627 PINMUX_IRQ(EXT_IRQ16H(26), PORT121_FN0, PORT172_FN0),
1628 PINMUX_IRQ(EXT_IRQ16H(27), PORT122_FN0, PORT180_FN0),
1629 PINMUX_IRQ(EXT_IRQ16H(28), PORT123_FN0, PORT181_FN0),
1630 PINMUX_IRQ(EXT_IRQ16H(29), PORT129_FN0, PORT182_FN0),
1631 PINMUX_IRQ(EXT_IRQ16H(30), PORT130_FN0, PORT183_FN0),
1632 PINMUX_IRQ(EXT_IRQ16H(31), PORT138_FN0, PORT184_FN0),
1633};
1634
1635struct sh_pfc_soc_info sh7372_pinmux_info = {
1636 .name = "sh7372_pfc",
1637 .reserved_id = PINMUX_RESERVED,
1638 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1639 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1640 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
1641 .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
1642 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1643 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1644 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1645
1646 .first_gpio = GPIO_PORT0,
1647 .last_gpio = GPIO_FN_SDENC_DV_CLKI,
1648
1649 .gpios = pinmux_gpios,
1650 .cfg_regs = pinmux_config_regs,
1651 .data_regs = pinmux_data_regs,
1652
1653 .gpio_data = pinmux_data,
1654 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1655
1656 .gpio_irq = pinmux_irqs,
1657 .gpio_irq_size = ARRAY_SIZE(pinmux_irqs),
1658};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh73a0.c b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
new file mode 100644
index 000000000000..709008e94124
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/pfc-sh73a0.c
@@ -0,0 +1,2798 @@
1/*
2 * sh73a0 processor support - PFC hardware block
3 *
4 * Copyright (C) 2010 Renesas Solutions Corp.
5 * Copyright (C) 2010 NISHIMOTO Hiroki
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; version 2 of the
10 * License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21#include <linux/kernel.h>
22#include <mach/sh73a0.h>
23#include <mach/irqs.h>
24
25#include "sh_pfc.h"
26
27#define CPU_ALL_PORT(fn, pfx, sfx) \
28 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
29 PORT_10(fn, pfx##2, sfx), PORT_10(fn, pfx##3, sfx), \
30 PORT_10(fn, pfx##4, sfx), PORT_10(fn, pfx##5, sfx), \
31 PORT_10(fn, pfx##6, sfx), PORT_10(fn, pfx##7, sfx), \
32 PORT_10(fn, pfx##8, sfx), PORT_10(fn, pfx##9, sfx), \
33 PORT_10(fn, pfx##10, sfx), \
34 PORT_1(fn, pfx##110, sfx), PORT_1(fn, pfx##111, sfx), \
35 PORT_1(fn, pfx##112, sfx), PORT_1(fn, pfx##113, sfx), \
36 PORT_1(fn, pfx##114, sfx), PORT_1(fn, pfx##115, sfx), \
37 PORT_1(fn, pfx##116, sfx), PORT_1(fn, pfx##117, sfx), \
38 PORT_1(fn, pfx##118, sfx), \
39 PORT_1(fn, pfx##128, sfx), PORT_1(fn, pfx##129, sfx), \
40 PORT_10(fn, pfx##13, sfx), PORT_10(fn, pfx##14, sfx), \
41 PORT_10(fn, pfx##15, sfx), \
42 PORT_1(fn, pfx##160, sfx), PORT_1(fn, pfx##161, sfx), \
43 PORT_1(fn, pfx##162, sfx), PORT_1(fn, pfx##163, sfx), \
44 PORT_1(fn, pfx##164, sfx), \
45 PORT_1(fn, pfx##192, sfx), PORT_1(fn, pfx##193, sfx), \
46 PORT_1(fn, pfx##194, sfx), PORT_1(fn, pfx##195, sfx), \
47 PORT_1(fn, pfx##196, sfx), PORT_1(fn, pfx##197, sfx), \
48 PORT_1(fn, pfx##198, sfx), PORT_1(fn, pfx##199, sfx), \
49 PORT_10(fn, pfx##20, sfx), PORT_10(fn, pfx##21, sfx), \
50 PORT_10(fn, pfx##22, sfx), PORT_10(fn, pfx##23, sfx), \
51 PORT_10(fn, pfx##24, sfx), PORT_10(fn, pfx##25, sfx), \
52 PORT_10(fn, pfx##26, sfx), PORT_10(fn, pfx##27, sfx), \
53 PORT_1(fn, pfx##280, sfx), PORT_1(fn, pfx##281, sfx), \
54 PORT_1(fn, pfx##282, sfx), \
55 PORT_1(fn, pfx##288, sfx), PORT_1(fn, pfx##289, sfx), \
56 PORT_10(fn, pfx##29, sfx), PORT_10(fn, pfx##30, sfx)
57
58enum {
59 PINMUX_RESERVED = 0,
60
61 PINMUX_DATA_BEGIN,
62 PORT_ALL(DATA), /* PORT0_DATA -> PORT309_DATA */
63 PINMUX_DATA_END,
64
65 PINMUX_INPUT_BEGIN,
66 PORT_ALL(IN), /* PORT0_IN -> PORT309_IN */
67 PINMUX_INPUT_END,
68
69 PINMUX_INPUT_PULLUP_BEGIN,
70 PORT_ALL(IN_PU), /* PORT0_IN_PU -> PORT309_IN_PU */
71 PINMUX_INPUT_PULLUP_END,
72
73 PINMUX_INPUT_PULLDOWN_BEGIN,
74 PORT_ALL(IN_PD), /* PORT0_IN_PD -> PORT309_IN_PD */
75 PINMUX_INPUT_PULLDOWN_END,
76
77 PINMUX_OUTPUT_BEGIN,
78 PORT_ALL(OUT), /* PORT0_OUT -> PORT309_OUT */
79 PINMUX_OUTPUT_END,
80
81 PINMUX_FUNCTION_BEGIN,
82 PORT_ALL(FN_IN), /* PORT0_FN_IN -> PORT309_FN_IN */
83 PORT_ALL(FN_OUT), /* PORT0_FN_OUT -> PORT309_FN_OUT */
84 PORT_ALL(FN0), /* PORT0_FN0 -> PORT309_FN0 */
85 PORT_ALL(FN1), /* PORT0_FN1 -> PORT309_FN1 */
86 PORT_ALL(FN2), /* PORT0_FN2 -> PORT309_FN2 */
87 PORT_ALL(FN3), /* PORT0_FN3 -> PORT309_FN3 */
88 PORT_ALL(FN4), /* PORT0_FN4 -> PORT309_FN4 */
89 PORT_ALL(FN5), /* PORT0_FN5 -> PORT309_FN5 */
90 PORT_ALL(FN6), /* PORT0_FN6 -> PORT309_FN6 */
91 PORT_ALL(FN7), /* PORT0_FN7 -> PORT309_FN7 */
92
93 MSEL2CR_MSEL19_0, MSEL2CR_MSEL19_1,
94 MSEL2CR_MSEL18_0, MSEL2CR_MSEL18_1,
95 MSEL2CR_MSEL17_0, MSEL2CR_MSEL17_1,
96 MSEL2CR_MSEL16_0, MSEL2CR_MSEL16_1,
97 MSEL2CR_MSEL14_0, MSEL2CR_MSEL14_1,
98 MSEL2CR_MSEL13_0, MSEL2CR_MSEL13_1,
99 MSEL2CR_MSEL12_0, MSEL2CR_MSEL12_1,
100 MSEL2CR_MSEL11_0, MSEL2CR_MSEL11_1,
101 MSEL2CR_MSEL10_0, MSEL2CR_MSEL10_1,
102 MSEL2CR_MSEL9_0, MSEL2CR_MSEL9_1,
103 MSEL2CR_MSEL8_0, MSEL2CR_MSEL8_1,
104 MSEL2CR_MSEL7_0, MSEL2CR_MSEL7_1,
105 MSEL2CR_MSEL6_0, MSEL2CR_MSEL6_1,
106 MSEL2CR_MSEL4_0, MSEL2CR_MSEL4_1,
107 MSEL2CR_MSEL5_0, MSEL2CR_MSEL5_1,
108 MSEL2CR_MSEL3_0, MSEL2CR_MSEL3_1,
109 MSEL2CR_MSEL2_0, MSEL2CR_MSEL2_1,
110 MSEL2CR_MSEL1_0, MSEL2CR_MSEL1_1,
111 MSEL2CR_MSEL0_0, MSEL2CR_MSEL0_1,
112 MSEL3CR_MSEL28_0, MSEL3CR_MSEL28_1,
113 MSEL3CR_MSEL15_0, MSEL3CR_MSEL15_1,
114 MSEL3CR_MSEL11_0, MSEL3CR_MSEL11_1,
115 MSEL3CR_MSEL9_0, MSEL3CR_MSEL9_1,
116 MSEL3CR_MSEL6_0, MSEL3CR_MSEL6_1,
117 MSEL3CR_MSEL2_0, MSEL3CR_MSEL2_1,
118 MSEL4CR_MSEL29_0, MSEL4CR_MSEL29_1,
119 MSEL4CR_MSEL27_0, MSEL4CR_MSEL27_1,
120 MSEL4CR_MSEL26_0, MSEL4CR_MSEL26_1,
121 MSEL4CR_MSEL22_0, MSEL4CR_MSEL22_1,
122 MSEL4CR_MSEL21_0, MSEL4CR_MSEL21_1,
123 MSEL4CR_MSEL20_0, MSEL4CR_MSEL20_1,
124 MSEL4CR_MSEL19_0, MSEL4CR_MSEL19_1,
125 MSEL4CR_MSEL15_0, MSEL4CR_MSEL15_1,
126 MSEL4CR_MSEL13_0, MSEL4CR_MSEL13_1,
127 MSEL4CR_MSEL12_0, MSEL4CR_MSEL12_1,
128 MSEL4CR_MSEL11_0, MSEL4CR_MSEL11_1,
129 MSEL4CR_MSEL10_0, MSEL4CR_MSEL10_1,
130 MSEL4CR_MSEL9_0, MSEL4CR_MSEL9_1,
131 MSEL4CR_MSEL8_0, MSEL4CR_MSEL8_1,
132 MSEL4CR_MSEL7_0, MSEL4CR_MSEL7_1,
133 MSEL4CR_MSEL4_0, MSEL4CR_MSEL4_1,
134 MSEL4CR_MSEL1_0, MSEL4CR_MSEL1_1,
135 PINMUX_FUNCTION_END,
136
137 PINMUX_MARK_BEGIN,
138 /* Hardware manual Table 25-1 (Function 0-7) */
139 VBUS_0_MARK,
140 GPI0_MARK,
141 GPI1_MARK,
142 GPI2_MARK,
143 GPI3_MARK,
144 GPI4_MARK,
145 GPI5_MARK,
146 GPI6_MARK,
147 GPI7_MARK,
148 SCIFA7_RXD_MARK,
149 SCIFA7_CTS__MARK,
150 GPO7_MARK, MFG0_OUT2_MARK,
151 GPO6_MARK, MFG1_OUT2_MARK,
152 GPO5_MARK, SCIFA0_SCK_MARK, FSICOSLDT3_MARK, PORT16_VIO_CKOR_MARK,
153 SCIFA0_TXD_MARK,
154 SCIFA7_TXD_MARK,
155 SCIFA7_RTS__MARK, PORT19_VIO_CKO2_MARK,
156 GPO0_MARK,
157 GPO1_MARK,
158 GPO2_MARK, STATUS0_MARK,
159 GPO3_MARK, STATUS1_MARK,
160 GPO4_MARK, STATUS2_MARK,
161 VINT_MARK,
162 TCKON_MARK,
163 XDVFS1_MARK, PORT27_I2C_SCL2_MARK, PORT27_I2C_SCL3_MARK, \
164 MFG0_OUT1_MARK, PORT27_IROUT_MARK,
165 XDVFS2_MARK, PORT28_I2C_SDA2_MARK, PORT28_I2C_SDA3_MARK, \
166 PORT28_TPU1TO1_MARK,
167 SIM_RST_MARK, PORT29_TPU1TO1_MARK,
168 SIM_CLK_MARK, PORT30_VIO_CKOR_MARK,
169 SIM_D_MARK, PORT31_IROUT_MARK,
170 SCIFA4_TXD_MARK,
171 SCIFA4_RXD_MARK, XWUP_MARK,
172 SCIFA4_RTS__MARK,
173 SCIFA4_CTS__MARK,
174 FSIBOBT_MARK, FSIBIBT_MARK,
175 FSIBOLR_MARK, FSIBILR_MARK,
176 FSIBOSLD_MARK,
177 FSIBISLD_MARK,
178 VACK_MARK,
179 XTAL1L_MARK,
180 SCIFA0_RTS__MARK, FSICOSLDT2_MARK,
181 SCIFA0_RXD_MARK,
182 SCIFA0_CTS__MARK, FSICOSLDT1_MARK,
183 FSICOBT_MARK, FSICIBT_MARK, FSIDOBT_MARK, FSIDIBT_MARK,
184 FSICOLR_MARK, FSICILR_MARK, FSIDOLR_MARK, FSIDILR_MARK,
185 FSICOSLD_MARK, PORT47_FSICSPDIF_MARK,
186 FSICISLD_MARK, FSIDISLD_MARK,
187 FSIACK_MARK, PORT49_IRDA_OUT_MARK, PORT49_IROUT_MARK, FSIAOMC_MARK,
188 FSIAOLR_MARK, BBIF2_TSYNC2_MARK, TPU2TO2_MARK, FSIAILR_MARK,
189
190 FSIAOBT_MARK, BBIF2_TSCK2_MARK, TPU2TO3_MARK, FSIAIBT_MARK,
191 FSIAOSLD_MARK, BBIF2_TXD2_MARK,
192 FSIASPDIF_MARK, PORT53_IRDA_IN_MARK, TPU3TO3_MARK, FSIBSPDIF_MARK, \
193 PORT53_FSICSPDIF_MARK,
194 FSIBCK_MARK, PORT54_IRDA_FIRSEL_MARK, TPU3TO2_MARK, FSIBOMC_MARK, \
195 FSICCK_MARK, FSICOMC_MARK,
196 FSIAISLD_MARK, TPU0TO0_MARK,
197 A0_MARK, BS__MARK,
198 A12_MARK, PORT58_KEYOUT7_MARK, TPU4TO2_MARK,
199 A13_MARK, PORT59_KEYOUT6_MARK, TPU0TO1_MARK,
200 A14_MARK, KEYOUT5_MARK,
201 A15_MARK, KEYOUT4_MARK,
202 A16_MARK, KEYOUT3_MARK, MSIOF0_SS1_MARK,
203 A17_MARK, KEYOUT2_MARK, MSIOF0_TSYNC_MARK,
204 A18_MARK, KEYOUT1_MARK, MSIOF0_TSCK_MARK,
205 A19_MARK, KEYOUT0_MARK, MSIOF0_TXD_MARK,
206 A20_MARK, KEYIN0_MARK, MSIOF0_RSCK_MARK,
207 A21_MARK, KEYIN1_MARK, MSIOF0_RSYNC_MARK,
208 A22_MARK, KEYIN2_MARK, MSIOF0_MCK0_MARK,
209 A23_MARK, KEYIN3_MARK, MSIOF0_MCK1_MARK,
210 A24_MARK, KEYIN4_MARK, MSIOF0_RXD_MARK,
211 A25_MARK, KEYIN5_MARK, MSIOF0_SS2_MARK,
212 A26_MARK, KEYIN6_MARK,
213 KEYIN7_MARK,
214 D0_NAF0_MARK,
215 D1_NAF1_MARK,
216 D2_NAF2_MARK,
217 D3_NAF3_MARK,
218 D4_NAF4_MARK,
219 D5_NAF5_MARK,
220 D6_NAF6_MARK,
221 D7_NAF7_MARK,
222 D8_NAF8_MARK,
223 D9_NAF9_MARK,
224 D10_NAF10_MARK,
225 D11_NAF11_MARK,
226 D12_NAF12_MARK,
227 D13_NAF13_MARK,
228 D14_NAF14_MARK,
229 D15_NAF15_MARK,
230 CS4__MARK,
231 CS5A__MARK, PORT91_RDWR_MARK,
232 CS5B__MARK, FCE1__MARK,
233 CS6B__MARK, DACK0_MARK,
234 FCE0__MARK, CS6A__MARK,
235 WAIT__MARK, DREQ0_MARK,
236 RD__FSC_MARK,
237 WE0__FWE_MARK, RDWR_FWE_MARK,
238 WE1__MARK,
239 FRB_MARK,
240 CKO_MARK,
241 NBRSTOUT__MARK,
242 NBRST__MARK,
243 BBIF2_TXD_MARK,
244 BBIF2_RXD_MARK,
245 BBIF2_SYNC_MARK,
246 BBIF2_SCK_MARK,
247 SCIFA3_CTS__MARK, MFG3_IN2_MARK,
248 SCIFA3_RXD_MARK, MFG3_IN1_MARK,
249 BBIF1_SS2_MARK, SCIFA3_RTS__MARK, MFG3_OUT1_MARK,
250 SCIFA3_TXD_MARK,
251 HSI_RX_DATA_MARK, BBIF1_RXD_MARK,
252 HSI_TX_WAKE_MARK, BBIF1_TSCK_MARK,
253 HSI_TX_DATA_MARK, BBIF1_TSYNC_MARK,
254 HSI_TX_READY_MARK, BBIF1_TXD_MARK,
255 HSI_RX_READY_MARK, BBIF1_RSCK_MARK, PORT115_I2C_SCL2_MARK, \
256 PORT115_I2C_SCL3_MARK,
257 HSI_RX_WAKE_MARK, BBIF1_RSYNC_MARK, PORT116_I2C_SDA2_MARK, \
258 PORT116_I2C_SDA3_MARK,
259 HSI_RX_FLAG_MARK, BBIF1_SS1_MARK, BBIF1_FLOW_MARK,
260 HSI_TX_FLAG_MARK,
261 VIO_VD_MARK, PORT128_LCD2VSYN_MARK, VIO2_VD_MARK, LCD2D0_MARK,
262
263 VIO_HD_MARK, PORT129_LCD2HSYN_MARK, PORT129_LCD2CS__MARK, \
264 VIO2_HD_MARK, LCD2D1_MARK,
265 VIO_D0_MARK, PORT130_MSIOF2_RXD_MARK, LCD2D10_MARK,
266 VIO_D1_MARK, PORT131_KEYOUT6_MARK, PORT131_MSIOF2_SS1_MARK, \
267 PORT131_KEYOUT11_MARK, LCD2D11_MARK,
268 VIO_D2_MARK, PORT132_KEYOUT7_MARK, PORT132_MSIOF2_SS2_MARK, \
269 PORT132_KEYOUT10_MARK, LCD2D12_MARK,
270 VIO_D3_MARK, MSIOF2_TSYNC_MARK, LCD2D13_MARK,
271 VIO_D4_MARK, MSIOF2_TXD_MARK, LCD2D14_MARK,
272 VIO_D5_MARK, MSIOF2_TSCK_MARK, LCD2D15_MARK,
273 VIO_D6_MARK, PORT136_KEYOUT8_MARK, LCD2D16_MARK,
274 VIO_D7_MARK, PORT137_KEYOUT9_MARK, LCD2D17_MARK,
275 VIO_D8_MARK, PORT138_KEYOUT8_MARK, VIO2_D0_MARK, LCD2D6_MARK,
276 VIO_D9_MARK, PORT139_KEYOUT9_MARK, VIO2_D1_MARK, LCD2D7_MARK,
277 VIO_D10_MARK, TPU0TO2_MARK, VIO2_D2_MARK, LCD2D8_MARK,
278 VIO_D11_MARK, TPU0TO3_MARK, VIO2_D3_MARK, LCD2D9_MARK,
279 VIO_D12_MARK, PORT142_KEYOUT10_MARK, VIO2_D4_MARK, LCD2D2_MARK,
280 VIO_D13_MARK, PORT143_KEYOUT11_MARK, PORT143_KEYOUT6_MARK, \
281 VIO2_D5_MARK, LCD2D3_MARK,
282 VIO_D14_MARK, PORT144_KEYOUT7_MARK, VIO2_D6_MARK, LCD2D4_MARK,
283 VIO_D15_MARK, TPU1TO3_MARK, PORT145_LCD2DISP_MARK, \
284 PORT145_LCD2RS_MARK, VIO2_D7_MARK, LCD2D5_MARK,
285 VIO_CLK_MARK, LCD2DCK_MARK, PORT146_LCD2WR__MARK, VIO2_CLK_MARK, \
286 LCD2D18_MARK,
287 VIO_FIELD_MARK, LCD2RD__MARK, VIO2_FIELD_MARK, LCD2D19_MARK,
288 VIO_CKO_MARK,
289 A27_MARK, PORT149_RDWR_MARK, MFG0_IN1_MARK, PORT149_KEYOUT9_MARK,
290 MFG0_IN2_MARK,
291 TS_SPSYNC3_MARK, MSIOF2_RSCK_MARK,
292 TS_SDAT3_MARK, MSIOF2_RSYNC_MARK,
293 TPU1TO2_MARK, TS_SDEN3_MARK, PORT153_MSIOF2_SS1_MARK,
294 SCIFA2_TXD1_MARK, MSIOF2_MCK0_MARK,
295 SCIFA2_RXD1_MARK, MSIOF2_MCK1_MARK,
296 SCIFA2_RTS1__MARK, PORT156_MSIOF2_SS2_MARK,
297 SCIFA2_CTS1__MARK, PORT157_MSIOF2_RXD_MARK,
298 DINT__MARK, SCIFA2_SCK1_MARK, TS_SCK3_MARK,
299 PORT159_SCIFB_SCK_MARK, PORT159_SCIFA5_SCK_MARK, NMI_MARK,
300 PORT160_SCIFB_TXD_MARK, PORT160_SCIFA5_TXD_MARK,
301 PORT161_SCIFB_CTS__MARK, PORT161_SCIFA5_CTS__MARK,
302 PORT162_SCIFB_RXD_MARK, PORT162_SCIFA5_RXD_MARK,
303 PORT163_SCIFB_RTS__MARK, PORT163_SCIFA5_RTS__MARK, TPU3TO0_MARK,
304 LCDD0_MARK,
305 LCDD1_MARK, PORT193_SCIFA5_CTS__MARK, BBIF2_TSYNC1_MARK,
306 LCDD2_MARK, PORT194_SCIFA5_RTS__MARK, BBIF2_TSCK1_MARK,
307 LCDD3_MARK, PORT195_SCIFA5_RXD_MARK, BBIF2_TXD1_MARK,
308 LCDD4_MARK, PORT196_SCIFA5_TXD_MARK,
309 LCDD5_MARK, PORT197_SCIFA5_SCK_MARK, MFG2_OUT2_MARK, TPU2TO1_MARK,
310 LCDD6_MARK,
311 LCDD7_MARK, TPU4TO1_MARK, MFG4_OUT2_MARK,
312 LCDD8_MARK, D16_MARK,
313 LCDD9_MARK, D17_MARK,
314 LCDD10_MARK, D18_MARK,
315 LCDD11_MARK, D19_MARK,
316 LCDD12_MARK, D20_MARK,
317 LCDD13_MARK, D21_MARK,
318 LCDD14_MARK, D22_MARK,
319 LCDD15_MARK, PORT207_MSIOF0L_SS1_MARK, D23_MARK,
320 LCDD16_MARK, PORT208_MSIOF0L_SS2_MARK, D24_MARK,
321 LCDD17_MARK, D25_MARK,
322 LCDD18_MARK, DREQ2_MARK, PORT210_MSIOF0L_SS1_MARK, D26_MARK,
323 LCDD19_MARK, PORT211_MSIOF0L_SS2_MARK, D27_MARK,
324 LCDD20_MARK, TS_SPSYNC1_MARK, MSIOF0L_MCK0_MARK, D28_MARK,
325 LCDD21_MARK, TS_SDAT1_MARK, MSIOF0L_MCK1_MARK, D29_MARK,
326 LCDD22_MARK, TS_SDEN1_MARK, MSIOF0L_RSCK_MARK, D30_MARK,
327 LCDD23_MARK, TS_SCK1_MARK, MSIOF0L_RSYNC_MARK, D31_MARK,
328 LCDDCK_MARK, LCDWR__MARK,
329 LCDRD__MARK, DACK2_MARK, PORT217_LCD2RS_MARK, MSIOF0L_TSYNC_MARK, \
330 VIO2_FIELD3_MARK, PORT217_LCD2DISP_MARK,
331 LCDHSYN_MARK, LCDCS__MARK, LCDCS2__MARK, DACK3_MARK, \
332 PORT218_VIO_CKOR_MARK,
333 LCDDISP_MARK, LCDRS_MARK, PORT219_LCD2WR__MARK, DREQ3_MARK, \
334 MSIOF0L_TSCK_MARK, VIO2_CLK3_MARK, LCD2DCK_2_MARK,
335 LCDVSYN_MARK, LCDVSYN2_MARK,
336 LCDLCLK_MARK, DREQ1_MARK, PORT221_LCD2CS__MARK, PWEN_MARK, \
337 MSIOF0L_RXD_MARK, VIO2_HD3_MARK, PORT221_LCD2HSYN_MARK,
338 LCDDON_MARK, LCDDON2_MARK, DACK1_MARK, OVCN_MARK, MSIOF0L_TXD_MARK, \
339 VIO2_VD3_MARK, PORT222_LCD2VSYN_MARK,
340
341 SCIFA1_TXD_MARK, OVCN2_MARK,
342 EXTLP_MARK, SCIFA1_SCK_MARK, PORT226_VIO_CKO2_MARK,
343 SCIFA1_RTS__MARK, IDIN_MARK,
344 SCIFA1_RXD_MARK,
345 SCIFA1_CTS__MARK, MFG1_IN1_MARK,
346 MSIOF1_TXD_MARK, SCIFA2_TXD2_MARK,
347 MSIOF1_TSYNC_MARK, SCIFA2_CTS2__MARK,
348 MSIOF1_TSCK_MARK, SCIFA2_SCK2_MARK,
349 MSIOF1_RXD_MARK, SCIFA2_RXD2_MARK,
350 MSIOF1_RSCK_MARK, SCIFA2_RTS2__MARK, VIO2_CLK2_MARK, LCD2D20_MARK,
351 MSIOF1_RSYNC_MARK, MFG1_IN2_MARK, VIO2_VD2_MARK, LCD2D21_MARK,
352 MSIOF1_MCK0_MARK, PORT236_I2C_SDA2_MARK,
353 MSIOF1_MCK1_MARK, PORT237_I2C_SCL2_MARK,
354 MSIOF1_SS1_MARK, VIO2_FIELD2_MARK, LCD2D22_MARK,
355 MSIOF1_SS2_MARK, VIO2_HD2_MARK, LCD2D23_MARK,
356 SCIFA6_TXD_MARK,
357 PORT241_IRDA_OUT_MARK, PORT241_IROUT_MARK, MFG4_OUT1_MARK, TPU4TO0_MARK,
358 PORT242_IRDA_IN_MARK, MFG4_IN2_MARK,
359 PORT243_IRDA_FIRSEL_MARK, PORT243_VIO_CKO2_MARK,
360 PORT244_SCIFA5_CTS__MARK, MFG2_IN1_MARK, PORT244_SCIFB_CTS__MARK, \
361 MSIOF2R_RXD_MARK,
362 PORT245_SCIFA5_RTS__MARK, MFG2_IN2_MARK, PORT245_SCIFB_RTS__MARK, \
363 MSIOF2R_TXD_MARK,
364 PORT246_SCIFA5_RXD_MARK, MFG1_OUT1_MARK, PORT246_SCIFB_RXD_MARK, \
365 TPU1TO0_MARK,
366 PORT247_SCIFA5_TXD_MARK, MFG3_OUT2_MARK, PORT247_SCIFB_TXD_MARK, \
367 TPU3TO1_MARK,
368 PORT248_SCIFA5_SCK_MARK, MFG2_OUT1_MARK, PORT248_SCIFB_SCK_MARK, \
369 TPU2TO0_MARK, PORT248_I2C_SCL3_MARK, MSIOF2R_TSCK_MARK,
370 PORT249_IROUT_MARK, MFG4_IN1_MARK, PORT249_I2C_SDA3_MARK, \
371 MSIOF2R_TSYNC_MARK,
372 SDHICLK0_MARK,
373 SDHICD0_MARK,
374 SDHID0_0_MARK,
375 SDHID0_1_MARK,
376 SDHID0_2_MARK,
377 SDHID0_3_MARK,
378 SDHICMD0_MARK,
379 SDHIWP0_MARK,
380 SDHICLK1_MARK,
381 SDHID1_0_MARK, TS_SPSYNC2_MARK,
382 SDHID1_1_MARK, TS_SDAT2_MARK,
383 SDHID1_2_MARK, TS_SDEN2_MARK,
384 SDHID1_3_MARK, TS_SCK2_MARK,
385 SDHICMD1_MARK,
386 SDHICLK2_MARK,
387 SDHID2_0_MARK, TS_SPSYNC4_MARK,
388 SDHID2_1_MARK, TS_SDAT4_MARK,
389 SDHID2_2_MARK, TS_SDEN4_MARK,
390 SDHID2_3_MARK, TS_SCK4_MARK,
391 SDHICMD2_MARK,
392 MMCCLK0_MARK,
393 MMCD0_0_MARK,
394 MMCD0_1_MARK,
395 MMCD0_2_MARK,
396 MMCD0_3_MARK,
397 MMCD0_4_MARK, TS_SPSYNC5_MARK,
398 MMCD0_5_MARK, TS_SDAT5_MARK,
399 MMCD0_6_MARK, TS_SDEN5_MARK,
400 MMCD0_7_MARK, TS_SCK5_MARK,
401 MMCCMD0_MARK,
402 RESETOUTS__MARK, EXTAL2OUT_MARK,
403 MCP_WAIT__MCP_FRB_MARK,
404 MCP_CKO_MARK, MMCCLK1_MARK,
405 MCP_D15_MCP_NAF15_MARK,
406 MCP_D14_MCP_NAF14_MARK,
407 MCP_D13_MCP_NAF13_MARK,
408 MCP_D12_MCP_NAF12_MARK,
409 MCP_D11_MCP_NAF11_MARK,
410 MCP_D10_MCP_NAF10_MARK,
411 MCP_D9_MCP_NAF9_MARK,
412 MCP_D8_MCP_NAF8_MARK, MMCCMD1_MARK,
413 MCP_D7_MCP_NAF7_MARK, MMCD1_7_MARK,
414
415 MCP_D6_MCP_NAF6_MARK, MMCD1_6_MARK,
416 MCP_D5_MCP_NAF5_MARK, MMCD1_5_MARK,
417 MCP_D4_MCP_NAF4_MARK, MMCD1_4_MARK,
418 MCP_D3_MCP_NAF3_MARK, MMCD1_3_MARK,
419 MCP_D2_MCP_NAF2_MARK, MMCD1_2_MARK,
420 MCP_D1_MCP_NAF1_MARK, MMCD1_1_MARK,
421 MCP_D0_MCP_NAF0_MARK, MMCD1_0_MARK,
422 MCP_NBRSTOUT__MARK,
423 MCP_WE0__MCP_FWE_MARK, MCP_RDWR_MCP_FWE_MARK,
424
425 /* MSEL2 special cases */
426 TSIF2_TS_XX1_MARK,
427 TSIF2_TS_XX2_MARK,
428 TSIF2_TS_XX3_MARK,
429 TSIF2_TS_XX4_MARK,
430 TSIF2_TS_XX5_MARK,
431 TSIF1_TS_XX1_MARK,
432 TSIF1_TS_XX2_MARK,
433 TSIF1_TS_XX3_MARK,
434 TSIF1_TS_XX4_MARK,
435 TSIF1_TS_XX5_MARK,
436 TSIF0_TS_XX1_MARK,
437 TSIF0_TS_XX2_MARK,
438 TSIF0_TS_XX3_MARK,
439 TSIF0_TS_XX4_MARK,
440 TSIF0_TS_XX5_MARK,
441 MST1_TS_XX1_MARK,
442 MST1_TS_XX2_MARK,
443 MST1_TS_XX3_MARK,
444 MST1_TS_XX4_MARK,
445 MST1_TS_XX5_MARK,
446 MST0_TS_XX1_MARK,
447 MST0_TS_XX2_MARK,
448 MST0_TS_XX3_MARK,
449 MST0_TS_XX4_MARK,
450 MST0_TS_XX5_MARK,
451
452 /* MSEL3 special cases */
453 SDHI0_VCCQ_MC0_ON_MARK,
454 SDHI0_VCCQ_MC0_OFF_MARK,
455 DEBUG_MON_VIO_MARK,
456 DEBUG_MON_LCDD_MARK,
457 LCDC_LCDC0_MARK,
458 LCDC_LCDC1_MARK,
459
460 /* MSEL4 special cases */
461 IRQ9_MEM_INT_MARK,
462 IRQ9_MCP_INT_MARK,
463 A11_MARK,
464 KEYOUT8_MARK,
465 TPU4TO3_MARK,
466 RESETA_N_PU_ON_MARK,
467 RESETA_N_PU_OFF_MARK,
468 EDBGREQ_PD_MARK,
469 EDBGREQ_PU_MARK,
470
471 /* Functions with pull-ups */
472 KEYIN0_PU_MARK,
473 KEYIN1_PU_MARK,
474 KEYIN2_PU_MARK,
475 KEYIN3_PU_MARK,
476 KEYIN4_PU_MARK,
477 KEYIN5_PU_MARK,
478 KEYIN6_PU_MARK,
479 KEYIN7_PU_MARK,
480 SDHICD0_PU_MARK,
481 SDHID0_0_PU_MARK,
482 SDHID0_1_PU_MARK,
483 SDHID0_2_PU_MARK,
484 SDHID0_3_PU_MARK,
485 SDHICMD0_PU_MARK,
486 SDHIWP0_PU_MARK,
487 SDHID1_0_PU_MARK,
488 SDHID1_1_PU_MARK,
489 SDHID1_2_PU_MARK,
490 SDHID1_3_PU_MARK,
491 SDHICMD1_PU_MARK,
492 SDHID2_0_PU_MARK,
493 SDHID2_1_PU_MARK,
494 SDHID2_2_PU_MARK,
495 SDHID2_3_PU_MARK,
496 SDHICMD2_PU_MARK,
497 MMCCMD0_PU_MARK,
498 MMCCMD1_PU_MARK,
499 MMCD0_0_PU_MARK,
500 MMCD0_1_PU_MARK,
501 MMCD0_2_PU_MARK,
502 MMCD0_3_PU_MARK,
503 MMCD0_4_PU_MARK,
504 MMCD0_5_PU_MARK,
505 MMCD0_6_PU_MARK,
506 MMCD0_7_PU_MARK,
507 FSIBISLD_PU_MARK,
508 FSIACK_PU_MARK,
509 FSIAILR_PU_MARK,
510 FSIAIBT_PU_MARK,
511 FSIAISLD_PU_MARK,
512
513 PINMUX_MARK_END,
514};
515
516static pinmux_enum_t pinmux_data[] = {
517 /* specify valid pin states for each pin in GPIO mode */
518
519 /* Table 25-1 (I/O and Pull U/D) */
520 PORT_DATA_I_PD(0),
521 PORT_DATA_I_PU(1),
522 PORT_DATA_I_PU(2),
523 PORT_DATA_I_PU(3),
524 PORT_DATA_I_PU(4),
525 PORT_DATA_I_PU(5),
526 PORT_DATA_I_PU(6),
527 PORT_DATA_I_PU(7),
528 PORT_DATA_I_PU(8),
529 PORT_DATA_I_PD(9),
530 PORT_DATA_I_PD(10),
531 PORT_DATA_I_PU_PD(11),
532 PORT_DATA_IO_PU_PD(12),
533 PORT_DATA_IO_PU_PD(13),
534 PORT_DATA_IO_PU_PD(14),
535 PORT_DATA_IO_PU_PD(15),
536 PORT_DATA_IO_PD(16),
537 PORT_DATA_IO_PD(17),
538 PORT_DATA_IO_PU(18),
539 PORT_DATA_IO_PU(19),
540 PORT_DATA_O(20),
541 PORT_DATA_O(21),
542 PORT_DATA_O(22),
543 PORT_DATA_O(23),
544 PORT_DATA_O(24),
545 PORT_DATA_I_PD(25),
546 PORT_DATA_I_PD(26),
547 PORT_DATA_IO_PU(27),
548 PORT_DATA_IO_PU(28),
549 PORT_DATA_IO_PD(29),
550 PORT_DATA_IO_PD(30),
551 PORT_DATA_IO_PU(31),
552 PORT_DATA_IO_PD(32),
553 PORT_DATA_I_PU_PD(33),
554 PORT_DATA_IO_PD(34),
555 PORT_DATA_I_PU_PD(35),
556 PORT_DATA_IO_PD(36),
557 PORT_DATA_IO(37),
558 PORT_DATA_O(38),
559 PORT_DATA_I_PU(39),
560 PORT_DATA_I_PU_PD(40),
561 PORT_DATA_O(41),
562 PORT_DATA_IO_PD(42),
563 PORT_DATA_IO_PU_PD(43),
564 PORT_DATA_IO_PU_PD(44),
565 PORT_DATA_IO_PD(45),
566 PORT_DATA_IO_PD(46),
567 PORT_DATA_IO_PD(47),
568 PORT_DATA_I_PD(48),
569 PORT_DATA_IO_PU_PD(49),
570 PORT_DATA_IO_PD(50),
571
572 PORT_DATA_IO_PD(51),
573 PORT_DATA_O(52),
574 PORT_DATA_IO_PU_PD(53),
575 PORT_DATA_IO_PU_PD(54),
576 PORT_DATA_IO_PD(55),
577 PORT_DATA_I_PU_PD(56),
578 PORT_DATA_IO(57),
579 PORT_DATA_IO(58),
580 PORT_DATA_IO(59),
581 PORT_DATA_IO(60),
582 PORT_DATA_IO(61),
583 PORT_DATA_IO_PD(62),
584 PORT_DATA_IO_PD(63),
585 PORT_DATA_IO_PU_PD(64),
586 PORT_DATA_IO_PD(65),
587 PORT_DATA_IO_PU_PD(66),
588 PORT_DATA_IO_PU_PD(67),
589 PORT_DATA_IO_PU_PD(68),
590 PORT_DATA_IO_PU_PD(69),
591 PORT_DATA_IO_PU_PD(70),
592 PORT_DATA_IO_PU_PD(71),
593 PORT_DATA_IO_PU_PD(72),
594 PORT_DATA_I_PU_PD(73),
595 PORT_DATA_IO_PU(74),
596 PORT_DATA_IO_PU(75),
597 PORT_DATA_IO_PU(76),
598 PORT_DATA_IO_PU(77),
599 PORT_DATA_IO_PU(78),
600 PORT_DATA_IO_PU(79),
601 PORT_DATA_IO_PU(80),
602 PORT_DATA_IO_PU(81),
603 PORT_DATA_IO_PU(82),
604 PORT_DATA_IO_PU(83),
605 PORT_DATA_IO_PU(84),
606 PORT_DATA_IO_PU(85),
607 PORT_DATA_IO_PU(86),
608 PORT_DATA_IO_PU(87),
609 PORT_DATA_IO_PU(88),
610 PORT_DATA_IO_PU(89),
611 PORT_DATA_O(90),
612 PORT_DATA_IO_PU(91),
613 PORT_DATA_O(92),
614 PORT_DATA_IO_PU(93),
615 PORT_DATA_O(94),
616 PORT_DATA_I_PU_PD(95),
617 PORT_DATA_IO(96),
618 PORT_DATA_IO(97),
619 PORT_DATA_IO(98),
620 PORT_DATA_I_PU(99),
621 PORT_DATA_O(100),
622 PORT_DATA_O(101),
623 PORT_DATA_I_PU(102),
624 PORT_DATA_IO_PD(103),
625 PORT_DATA_I_PU_PD(104),
626 PORT_DATA_I_PD(105),
627 PORT_DATA_I_PD(106),
628 PORT_DATA_I_PU_PD(107),
629 PORT_DATA_I_PU_PD(108),
630 PORT_DATA_IO_PD(109),
631 PORT_DATA_IO_PD(110),
632 PORT_DATA_IO_PU_PD(111),
633 PORT_DATA_IO_PU_PD(112),
634 PORT_DATA_IO_PU_PD(113),
635 PORT_DATA_IO_PD(114),
636 PORT_DATA_IO_PU(115),
637 PORT_DATA_IO_PU(116),
638 PORT_DATA_IO_PU_PD(117),
639 PORT_DATA_IO_PU_PD(118),
640 PORT_DATA_IO_PD(128),
641
642 PORT_DATA_IO_PD(129),
643 PORT_DATA_IO_PU_PD(130),
644 PORT_DATA_IO_PD(131),
645 PORT_DATA_IO_PD(132),
646 PORT_DATA_IO_PD(133),
647 PORT_DATA_IO_PU_PD(134),
648 PORT_DATA_IO_PU_PD(135),
649 PORT_DATA_IO_PU_PD(136),
650 PORT_DATA_IO_PU_PD(137),
651 PORT_DATA_IO_PD(138),
652 PORT_DATA_IO_PD(139),
653 PORT_DATA_IO_PD(140),
654 PORT_DATA_IO_PD(141),
655 PORT_DATA_IO_PD(142),
656 PORT_DATA_IO_PD(143),
657 PORT_DATA_IO_PU_PD(144),
658 PORT_DATA_IO_PD(145),
659 PORT_DATA_IO_PU_PD(146),
660 PORT_DATA_IO_PU_PD(147),
661 PORT_DATA_IO_PU_PD(148),
662 PORT_DATA_IO_PU_PD(149),
663 PORT_DATA_I_PU_PD(150),
664 PORT_DATA_IO_PU_PD(151),
665 PORT_DATA_IO_PU_PD(152),
666 PORT_DATA_IO_PD(153),
667 PORT_DATA_IO_PD(154),
668 PORT_DATA_I_PU_PD(155),
669 PORT_DATA_IO_PU_PD(156),
670 PORT_DATA_I_PD(157),
671 PORT_DATA_IO_PD(158),
672 PORT_DATA_IO_PU_PD(159),
673 PORT_DATA_IO_PU_PD(160),
674 PORT_DATA_I_PU_PD(161),
675 PORT_DATA_I_PU_PD(162),
676 PORT_DATA_IO_PU_PD(163),
677 PORT_DATA_I_PU_PD(164),
678 PORT_DATA_IO_PD(192),
679 PORT_DATA_IO_PU_PD(193),
680 PORT_DATA_IO_PD(194),
681 PORT_DATA_IO_PU_PD(195),
682 PORT_DATA_IO_PD(196),
683 PORT_DATA_IO_PD(197),
684 PORT_DATA_IO_PD(198),
685 PORT_DATA_IO_PD(199),
686 PORT_DATA_IO_PU_PD(200),
687 PORT_DATA_IO_PU_PD(201),
688 PORT_DATA_IO_PU_PD(202),
689 PORT_DATA_IO_PU_PD(203),
690 PORT_DATA_IO_PU_PD(204),
691 PORT_DATA_IO_PU_PD(205),
692 PORT_DATA_IO_PU_PD(206),
693 PORT_DATA_IO_PD(207),
694 PORT_DATA_IO_PD(208),
695 PORT_DATA_IO_PD(209),
696 PORT_DATA_IO_PD(210),
697 PORT_DATA_IO_PD(211),
698 PORT_DATA_IO_PD(212),
699 PORT_DATA_IO_PD(213),
700 PORT_DATA_IO_PU_PD(214),
701 PORT_DATA_IO_PU_PD(215),
702 PORT_DATA_IO_PD(216),
703 PORT_DATA_IO_PD(217),
704 PORT_DATA_O(218),
705 PORT_DATA_IO_PD(219),
706 PORT_DATA_IO_PD(220),
707 PORT_DATA_IO_PU_PD(221),
708 PORT_DATA_IO_PU_PD(222),
709 PORT_DATA_I_PU_PD(223),
710 PORT_DATA_I_PU_PD(224),
711
712 PORT_DATA_IO_PU_PD(225),
713 PORT_DATA_O(226),
714 PORT_DATA_IO_PU_PD(227),
715 PORT_DATA_I_PU_PD(228),
716 PORT_DATA_I_PD(229),
717 PORT_DATA_IO(230),
718 PORT_DATA_IO_PU_PD(231),
719 PORT_DATA_IO_PU_PD(232),
720 PORT_DATA_I_PU_PD(233),
721 PORT_DATA_IO_PU_PD(234),
722 PORT_DATA_IO_PU_PD(235),
723 PORT_DATA_IO_PU_PD(236),
724 PORT_DATA_IO_PD(237),
725 PORT_DATA_IO_PU_PD(238),
726 PORT_DATA_IO_PU_PD(239),
727 PORT_DATA_IO_PU_PD(240),
728 PORT_DATA_O(241),
729 PORT_DATA_I_PD(242),
730 PORT_DATA_IO_PU_PD(243),
731 PORT_DATA_IO_PU_PD(244),
732 PORT_DATA_IO_PU_PD(245),
733 PORT_DATA_IO_PU_PD(246),
734 PORT_DATA_IO_PU_PD(247),
735 PORT_DATA_IO_PU_PD(248),
736 PORT_DATA_IO_PU_PD(249),
737 PORT_DATA_IO_PU_PD(250),
738 PORT_DATA_IO_PU_PD(251),
739 PORT_DATA_IO_PU_PD(252),
740 PORT_DATA_IO_PU_PD(253),
741 PORT_DATA_IO_PU_PD(254),
742 PORT_DATA_IO_PU_PD(255),
743 PORT_DATA_IO_PU_PD(256),
744 PORT_DATA_IO_PU_PD(257),
745 PORT_DATA_IO_PU_PD(258),
746 PORT_DATA_IO_PU_PD(259),
747 PORT_DATA_IO_PU_PD(260),
748 PORT_DATA_IO_PU_PD(261),
749 PORT_DATA_IO_PU_PD(262),
750 PORT_DATA_IO_PU_PD(263),
751 PORT_DATA_IO_PU_PD(264),
752 PORT_DATA_IO_PU_PD(265),
753 PORT_DATA_IO_PU_PD(266),
754 PORT_DATA_IO_PU_PD(267),
755 PORT_DATA_IO_PU_PD(268),
756 PORT_DATA_IO_PU_PD(269),
757 PORT_DATA_IO_PU_PD(270),
758 PORT_DATA_IO_PU_PD(271),
759 PORT_DATA_IO_PU_PD(272),
760 PORT_DATA_IO_PU_PD(273),
761 PORT_DATA_IO_PU_PD(274),
762 PORT_DATA_IO_PU_PD(275),
763 PORT_DATA_IO_PU_PD(276),
764 PORT_DATA_IO_PU_PD(277),
765 PORT_DATA_IO_PU_PD(278),
766 PORT_DATA_IO_PU_PD(279),
767 PORT_DATA_IO_PU_PD(280),
768 PORT_DATA_O(281),
769 PORT_DATA_O(282),
770 PORT_DATA_I_PU(288),
771 PORT_DATA_IO_PU_PD(289),
772 PORT_DATA_IO_PU_PD(290),
773 PORT_DATA_IO_PU_PD(291),
774 PORT_DATA_IO_PU_PD(292),
775 PORT_DATA_IO_PU_PD(293),
776 PORT_DATA_IO_PU_PD(294),
777 PORT_DATA_IO_PU_PD(295),
778 PORT_DATA_IO_PU_PD(296),
779 PORT_DATA_IO_PU_PD(297),
780 PORT_DATA_IO_PU_PD(298),
781
782 PORT_DATA_IO_PU_PD(299),
783 PORT_DATA_IO_PU_PD(300),
784 PORT_DATA_IO_PU_PD(301),
785 PORT_DATA_IO_PU_PD(302),
786 PORT_DATA_IO_PU_PD(303),
787 PORT_DATA_IO_PU_PD(304),
788 PORT_DATA_IO_PU_PD(305),
789 PORT_DATA_O(306),
790 PORT_DATA_O(307),
791 PORT_DATA_I_PU(308),
792 PORT_DATA_O(309),
793
794 /* Table 25-1 (Function 0-7) */
795 PINMUX_DATA(VBUS_0_MARK, PORT0_FN1),
796 PINMUX_DATA(GPI0_MARK, PORT1_FN1),
797 PINMUX_DATA(GPI1_MARK, PORT2_FN1),
798 PINMUX_DATA(GPI2_MARK, PORT3_FN1),
799 PINMUX_DATA(GPI3_MARK, PORT4_FN1),
800 PINMUX_DATA(GPI4_MARK, PORT5_FN1),
801 PINMUX_DATA(GPI5_MARK, PORT6_FN1),
802 PINMUX_DATA(GPI6_MARK, PORT7_FN1),
803 PINMUX_DATA(GPI7_MARK, PORT8_FN1),
804 PINMUX_DATA(SCIFA7_RXD_MARK, PORT12_FN2),
805 PINMUX_DATA(SCIFA7_CTS__MARK, PORT13_FN2),
806 PINMUX_DATA(GPO7_MARK, PORT14_FN1), \
807 PINMUX_DATA(MFG0_OUT2_MARK, PORT14_FN4),
808 PINMUX_DATA(GPO6_MARK, PORT15_FN1), \
809 PINMUX_DATA(MFG1_OUT2_MARK, PORT15_FN4),
810 PINMUX_DATA(GPO5_MARK, PORT16_FN1), \
811 PINMUX_DATA(SCIFA0_SCK_MARK, PORT16_FN2), \
812 PINMUX_DATA(FSICOSLDT3_MARK, PORT16_FN3), \
813 PINMUX_DATA(PORT16_VIO_CKOR_MARK, PORT16_FN4),
814 PINMUX_DATA(SCIFA0_TXD_MARK, PORT17_FN2),
815 PINMUX_DATA(SCIFA7_TXD_MARK, PORT18_FN2),
816 PINMUX_DATA(SCIFA7_RTS__MARK, PORT19_FN2), \
817 PINMUX_DATA(PORT19_VIO_CKO2_MARK, PORT19_FN3),
818 PINMUX_DATA(GPO0_MARK, PORT20_FN1),
819 PINMUX_DATA(GPO1_MARK, PORT21_FN1),
820 PINMUX_DATA(GPO2_MARK, PORT22_FN1), \
821 PINMUX_DATA(STATUS0_MARK, PORT22_FN2),
822 PINMUX_DATA(GPO3_MARK, PORT23_FN1), \
823 PINMUX_DATA(STATUS1_MARK, PORT23_FN2),
824 PINMUX_DATA(GPO4_MARK, PORT24_FN1), \
825 PINMUX_DATA(STATUS2_MARK, PORT24_FN2),
826 PINMUX_DATA(VINT_MARK, PORT25_FN1),
827 PINMUX_DATA(TCKON_MARK, PORT26_FN1),
828 PINMUX_DATA(XDVFS1_MARK, PORT27_FN1), \
829 PINMUX_DATA(PORT27_I2C_SCL2_MARK, PORT27_FN2, MSEL2CR_MSEL17_0,
830 MSEL2CR_MSEL16_1), \
831 PINMUX_DATA(PORT27_I2C_SCL3_MARK, PORT27_FN3, MSEL2CR_MSEL19_0,
832 MSEL2CR_MSEL18_1), \
833 PINMUX_DATA(MFG0_OUT1_MARK, PORT27_FN4), \
834 PINMUX_DATA(PORT27_IROUT_MARK, PORT27_FN7),
835 PINMUX_DATA(XDVFS2_MARK, PORT28_FN1), \
836 PINMUX_DATA(PORT28_I2C_SDA2_MARK, PORT28_FN2, MSEL2CR_MSEL17_0,
837 MSEL2CR_MSEL16_1), \
838 PINMUX_DATA(PORT28_I2C_SDA3_MARK, PORT28_FN3, MSEL2CR_MSEL19_0,
839 MSEL2CR_MSEL18_1), \
840 PINMUX_DATA(PORT28_TPU1TO1_MARK, PORT28_FN7),
841 PINMUX_DATA(SIM_RST_MARK, PORT29_FN1), \
842 PINMUX_DATA(PORT29_TPU1TO1_MARK, PORT29_FN4),
843 PINMUX_DATA(SIM_CLK_MARK, PORT30_FN1), \
844 PINMUX_DATA(PORT30_VIO_CKOR_MARK, PORT30_FN4),
845 PINMUX_DATA(SIM_D_MARK, PORT31_FN1), \
846 PINMUX_DATA(PORT31_IROUT_MARK, PORT31_FN4),
847 PINMUX_DATA(SCIFA4_TXD_MARK, PORT32_FN2),
848 PINMUX_DATA(SCIFA4_RXD_MARK, PORT33_FN2), \
849 PINMUX_DATA(XWUP_MARK, PORT33_FN3),
850 PINMUX_DATA(SCIFA4_RTS__MARK, PORT34_FN2),
851 PINMUX_DATA(SCIFA4_CTS__MARK, PORT35_FN2),
852 PINMUX_DATA(FSIBOBT_MARK, PORT36_FN1), \
853 PINMUX_DATA(FSIBIBT_MARK, PORT36_FN2),
854 PINMUX_DATA(FSIBOLR_MARK, PORT37_FN1), \
855 PINMUX_DATA(FSIBILR_MARK, PORT37_FN2),
856 PINMUX_DATA(FSIBOSLD_MARK, PORT38_FN1),
857 PINMUX_DATA(FSIBISLD_MARK, PORT39_FN1),
858 PINMUX_DATA(VACK_MARK, PORT40_FN1),
859 PINMUX_DATA(XTAL1L_MARK, PORT41_FN1),
860 PINMUX_DATA(SCIFA0_RTS__MARK, PORT42_FN2), \
861 PINMUX_DATA(FSICOSLDT2_MARK, PORT42_FN3),
862 PINMUX_DATA(SCIFA0_RXD_MARK, PORT43_FN2),
863 PINMUX_DATA(SCIFA0_CTS__MARK, PORT44_FN2), \
864 PINMUX_DATA(FSICOSLDT1_MARK, PORT44_FN3),
865 PINMUX_DATA(FSICOBT_MARK, PORT45_FN1), \
866 PINMUX_DATA(FSICIBT_MARK, PORT45_FN2), \
867 PINMUX_DATA(FSIDOBT_MARK, PORT45_FN3), \
868 PINMUX_DATA(FSIDIBT_MARK, PORT45_FN4),
869 PINMUX_DATA(FSICOLR_MARK, PORT46_FN1), \
870 PINMUX_DATA(FSICILR_MARK, PORT46_FN2), \
871 PINMUX_DATA(FSIDOLR_MARK, PORT46_FN3), \
872 PINMUX_DATA(FSIDILR_MARK, PORT46_FN4),
873 PINMUX_DATA(FSICOSLD_MARK, PORT47_FN1), \
874 PINMUX_DATA(PORT47_FSICSPDIF_MARK, PORT47_FN2),
875 PINMUX_DATA(FSICISLD_MARK, PORT48_FN1), \
876 PINMUX_DATA(FSIDISLD_MARK, PORT48_FN3),
877 PINMUX_DATA(FSIACK_MARK, PORT49_FN1), \
878 PINMUX_DATA(PORT49_IRDA_OUT_MARK, PORT49_FN2, MSEL4CR_MSEL19_1), \
879 PINMUX_DATA(PORT49_IROUT_MARK, PORT49_FN4), \
880 PINMUX_DATA(FSIAOMC_MARK, PORT49_FN5),
881 PINMUX_DATA(FSIAOLR_MARK, PORT50_FN1), \
882 PINMUX_DATA(BBIF2_TSYNC2_MARK, PORT50_FN2), \
883 PINMUX_DATA(TPU2TO2_MARK, PORT50_FN3), \
884 PINMUX_DATA(FSIAILR_MARK, PORT50_FN5),
885
886 PINMUX_DATA(FSIAOBT_MARK, PORT51_FN1), \
887 PINMUX_DATA(BBIF2_TSCK2_MARK, PORT51_FN2), \
888 PINMUX_DATA(TPU2TO3_MARK, PORT51_FN3), \
889 PINMUX_DATA(FSIAIBT_MARK, PORT51_FN5),
890 PINMUX_DATA(FSIAOSLD_MARK, PORT52_FN1), \
891 PINMUX_DATA(BBIF2_TXD2_MARK, PORT52_FN2),
892 PINMUX_DATA(FSIASPDIF_MARK, PORT53_FN1), \
893 PINMUX_DATA(PORT53_IRDA_IN_MARK, PORT53_FN2, MSEL4CR_MSEL19_1), \
894 PINMUX_DATA(TPU3TO3_MARK, PORT53_FN3), \
895 PINMUX_DATA(FSIBSPDIF_MARK, PORT53_FN5), \
896 PINMUX_DATA(PORT53_FSICSPDIF_MARK, PORT53_FN6),
897 PINMUX_DATA(FSIBCK_MARK, PORT54_FN1), \
898 PINMUX_DATA(PORT54_IRDA_FIRSEL_MARK, PORT54_FN2, MSEL4CR_MSEL19_1), \
899 PINMUX_DATA(TPU3TO2_MARK, PORT54_FN3), \
900 PINMUX_DATA(FSIBOMC_MARK, PORT54_FN5), \
901 PINMUX_DATA(FSICCK_MARK, PORT54_FN6), \
902 PINMUX_DATA(FSICOMC_MARK, PORT54_FN7),
903 PINMUX_DATA(FSIAISLD_MARK, PORT55_FN1), \
904 PINMUX_DATA(TPU0TO0_MARK, PORT55_FN3),
905 PINMUX_DATA(A0_MARK, PORT57_FN1), \
906 PINMUX_DATA(BS__MARK, PORT57_FN2),
907 PINMUX_DATA(A12_MARK, PORT58_FN1), \
908 PINMUX_DATA(PORT58_KEYOUT7_MARK, PORT58_FN2), \
909 PINMUX_DATA(TPU4TO2_MARK, PORT58_FN4),
910 PINMUX_DATA(A13_MARK, PORT59_FN1), \
911 PINMUX_DATA(PORT59_KEYOUT6_MARK, PORT59_FN2), \
912 PINMUX_DATA(TPU0TO1_MARK, PORT59_FN4),
913 PINMUX_DATA(A14_MARK, PORT60_FN1), \
914 PINMUX_DATA(KEYOUT5_MARK, PORT60_FN2),
915 PINMUX_DATA(A15_MARK, PORT61_FN1), \
916 PINMUX_DATA(KEYOUT4_MARK, PORT61_FN2),
917 PINMUX_DATA(A16_MARK, PORT62_FN1), \
918 PINMUX_DATA(KEYOUT3_MARK, PORT62_FN2), \
919 PINMUX_DATA(MSIOF0_SS1_MARK, PORT62_FN4, MSEL3CR_MSEL11_0),
920 PINMUX_DATA(A17_MARK, PORT63_FN1), \
921 PINMUX_DATA(KEYOUT2_MARK, PORT63_FN2), \
922 PINMUX_DATA(MSIOF0_TSYNC_MARK, PORT63_FN4, MSEL3CR_MSEL11_0),
923 PINMUX_DATA(A18_MARK, PORT64_FN1), \
924 PINMUX_DATA(KEYOUT1_MARK, PORT64_FN2), \
925 PINMUX_DATA(MSIOF0_TSCK_MARK, PORT64_FN4, MSEL3CR_MSEL11_0),
926 PINMUX_DATA(A19_MARK, PORT65_FN1), \
927 PINMUX_DATA(KEYOUT0_MARK, PORT65_FN2), \
928 PINMUX_DATA(MSIOF0_TXD_MARK, PORT65_FN4, MSEL3CR_MSEL11_0),
929 PINMUX_DATA(A20_MARK, PORT66_FN1), \
930 PINMUX_DATA(KEYIN0_MARK, PORT66_FN2), \
931 PINMUX_DATA(MSIOF0_RSCK_MARK, PORT66_FN4, MSEL3CR_MSEL11_0),
932 PINMUX_DATA(A21_MARK, PORT67_FN1), \
933 PINMUX_DATA(KEYIN1_MARK, PORT67_FN2), \
934 PINMUX_DATA(MSIOF0_RSYNC_MARK, PORT67_FN4, MSEL3CR_MSEL11_0),
935 PINMUX_DATA(A22_MARK, PORT68_FN1), \
936 PINMUX_DATA(KEYIN2_MARK, PORT68_FN2), \
937 PINMUX_DATA(MSIOF0_MCK0_MARK, PORT68_FN4, MSEL3CR_MSEL11_0),
938 PINMUX_DATA(A23_MARK, PORT69_FN1), \
939 PINMUX_DATA(KEYIN3_MARK, PORT69_FN2), \
940 PINMUX_DATA(MSIOF0_MCK1_MARK, PORT69_FN4, MSEL3CR_MSEL11_0),
941 PINMUX_DATA(A24_MARK, PORT70_FN1), \
942 PINMUX_DATA(KEYIN4_MARK, PORT70_FN2), \
943 PINMUX_DATA(MSIOF0_RXD_MARK, PORT70_FN4, MSEL3CR_MSEL11_0),
944 PINMUX_DATA(A25_MARK, PORT71_FN1), \
945 PINMUX_DATA(KEYIN5_MARK, PORT71_FN2), \
946 PINMUX_DATA(MSIOF0_SS2_MARK, PORT71_FN4, MSEL3CR_MSEL11_0),
947 PINMUX_DATA(A26_MARK, PORT72_FN1), \
948 PINMUX_DATA(KEYIN6_MARK, PORT72_FN2),
949 PINMUX_DATA(KEYIN7_MARK, PORT73_FN2),
950 PINMUX_DATA(D0_NAF0_MARK, PORT74_FN1),
951 PINMUX_DATA(D1_NAF1_MARK, PORT75_FN1),
952 PINMUX_DATA(D2_NAF2_MARK, PORT76_FN1),
953 PINMUX_DATA(D3_NAF3_MARK, PORT77_FN1),
954 PINMUX_DATA(D4_NAF4_MARK, PORT78_FN1),
955 PINMUX_DATA(D5_NAF5_MARK, PORT79_FN1),
956 PINMUX_DATA(D6_NAF6_MARK, PORT80_FN1),
957 PINMUX_DATA(D7_NAF7_MARK, PORT81_FN1),
958 PINMUX_DATA(D8_NAF8_MARK, PORT82_FN1),
959 PINMUX_DATA(D9_NAF9_MARK, PORT83_FN1),
960 PINMUX_DATA(D10_NAF10_MARK, PORT84_FN1),
961 PINMUX_DATA(D11_NAF11_MARK, PORT85_FN1),
962 PINMUX_DATA(D12_NAF12_MARK, PORT86_FN1),
963 PINMUX_DATA(D13_NAF13_MARK, PORT87_FN1),
964 PINMUX_DATA(D14_NAF14_MARK, PORT88_FN1),
965 PINMUX_DATA(D15_NAF15_MARK, PORT89_FN1),
966 PINMUX_DATA(CS4__MARK, PORT90_FN1),
967 PINMUX_DATA(CS5A__MARK, PORT91_FN1), \
968 PINMUX_DATA(PORT91_RDWR_MARK, PORT91_FN2),
969 PINMUX_DATA(CS5B__MARK, PORT92_FN1), \
970 PINMUX_DATA(FCE1__MARK, PORT92_FN2),
971 PINMUX_DATA(CS6B__MARK, PORT93_FN1), \
972 PINMUX_DATA(DACK0_MARK, PORT93_FN4),
973 PINMUX_DATA(FCE0__MARK, PORT94_FN1), \
974 PINMUX_DATA(CS6A__MARK, PORT94_FN2),
975 PINMUX_DATA(WAIT__MARK, PORT95_FN1), \
976 PINMUX_DATA(DREQ0_MARK, PORT95_FN2),
977 PINMUX_DATA(RD__FSC_MARK, PORT96_FN1),
978 PINMUX_DATA(WE0__FWE_MARK, PORT97_FN1), \
979 PINMUX_DATA(RDWR_FWE_MARK, PORT97_FN2),
980 PINMUX_DATA(WE1__MARK, PORT98_FN1),
981 PINMUX_DATA(FRB_MARK, PORT99_FN1),
982 PINMUX_DATA(CKO_MARK, PORT100_FN1),
983 PINMUX_DATA(NBRSTOUT__MARK, PORT101_FN1),
984 PINMUX_DATA(NBRST__MARK, PORT102_FN1),
985 PINMUX_DATA(BBIF2_TXD_MARK, PORT103_FN3),
986 PINMUX_DATA(BBIF2_RXD_MARK, PORT104_FN3),
987 PINMUX_DATA(BBIF2_SYNC_MARK, PORT105_FN3),
988 PINMUX_DATA(BBIF2_SCK_MARK, PORT106_FN3),
989 PINMUX_DATA(SCIFA3_CTS__MARK, PORT107_FN3), \
990 PINMUX_DATA(MFG3_IN2_MARK, PORT107_FN4),
991 PINMUX_DATA(SCIFA3_RXD_MARK, PORT108_FN3), \
992 PINMUX_DATA(MFG3_IN1_MARK, PORT108_FN4),
993 PINMUX_DATA(BBIF1_SS2_MARK, PORT109_FN2), \
994 PINMUX_DATA(SCIFA3_RTS__MARK, PORT109_FN3), \
995 PINMUX_DATA(MFG3_OUT1_MARK, PORT109_FN4),
996 PINMUX_DATA(SCIFA3_TXD_MARK, PORT110_FN3),
997 PINMUX_DATA(HSI_RX_DATA_MARK, PORT111_FN1), \
998 PINMUX_DATA(BBIF1_RXD_MARK, PORT111_FN3),
999 PINMUX_DATA(HSI_TX_WAKE_MARK, PORT112_FN1), \
1000 PINMUX_DATA(BBIF1_TSCK_MARK, PORT112_FN3),
1001 PINMUX_DATA(HSI_TX_DATA_MARK, PORT113_FN1), \
1002 PINMUX_DATA(BBIF1_TSYNC_MARK, PORT113_FN3),
1003 PINMUX_DATA(HSI_TX_READY_MARK, PORT114_FN1), \
1004 PINMUX_DATA(BBIF1_TXD_MARK, PORT114_FN3),
1005 PINMUX_DATA(HSI_RX_READY_MARK, PORT115_FN1), \
1006 PINMUX_DATA(BBIF1_RSCK_MARK, PORT115_FN3), \
1007 PINMUX_DATA(PORT115_I2C_SCL2_MARK, PORT115_FN5, MSEL2CR_MSEL17_1), \
1008 PINMUX_DATA(PORT115_I2C_SCL3_MARK, PORT115_FN6, MSEL2CR_MSEL19_1),
1009 PINMUX_DATA(HSI_RX_WAKE_MARK, PORT116_FN1), \
1010 PINMUX_DATA(BBIF1_RSYNC_MARK, PORT116_FN3), \
1011 PINMUX_DATA(PORT116_I2C_SDA2_MARK, PORT116_FN5, MSEL2CR_MSEL17_1), \
1012 PINMUX_DATA(PORT116_I2C_SDA3_MARK, PORT116_FN6, MSEL2CR_MSEL19_1),
1013 PINMUX_DATA(HSI_RX_FLAG_MARK, PORT117_FN1), \
1014 PINMUX_DATA(BBIF1_SS1_MARK, PORT117_FN2), \
1015 PINMUX_DATA(BBIF1_FLOW_MARK, PORT117_FN3),
1016 PINMUX_DATA(HSI_TX_FLAG_MARK, PORT118_FN1),
1017 PINMUX_DATA(VIO_VD_MARK, PORT128_FN1), \
1018 PINMUX_DATA(PORT128_LCD2VSYN_MARK, PORT128_FN4, MSEL3CR_MSEL2_0), \
1019 PINMUX_DATA(VIO2_VD_MARK, PORT128_FN6, MSEL4CR_MSEL27_0), \
1020 PINMUX_DATA(LCD2D0_MARK, PORT128_FN7),
1021
1022 PINMUX_DATA(VIO_HD_MARK, PORT129_FN1), \
1023 PINMUX_DATA(PORT129_LCD2HSYN_MARK, PORT129_FN4), \
1024 PINMUX_DATA(PORT129_LCD2CS__MARK, PORT129_FN5), \
1025 PINMUX_DATA(VIO2_HD_MARK, PORT129_FN6, MSEL4CR_MSEL27_0), \
1026 PINMUX_DATA(LCD2D1_MARK, PORT129_FN7),
1027 PINMUX_DATA(VIO_D0_MARK, PORT130_FN1), \
1028 PINMUX_DATA(PORT130_MSIOF2_RXD_MARK, PORT130_FN3, MSEL4CR_MSEL11_0,
1029 MSEL4CR_MSEL10_1), \
1030 PINMUX_DATA(LCD2D10_MARK, PORT130_FN7),
1031 PINMUX_DATA(VIO_D1_MARK, PORT131_FN1), \
1032 PINMUX_DATA(PORT131_KEYOUT6_MARK, PORT131_FN2), \
1033 PINMUX_DATA(PORT131_MSIOF2_SS1_MARK, PORT131_FN3), \
1034 PINMUX_DATA(PORT131_KEYOUT11_MARK, PORT131_FN4), \
1035 PINMUX_DATA(LCD2D11_MARK, PORT131_FN7),
1036 PINMUX_DATA(VIO_D2_MARK, PORT132_FN1), \
1037 PINMUX_DATA(PORT132_KEYOUT7_MARK, PORT132_FN2), \
1038 PINMUX_DATA(PORT132_MSIOF2_SS2_MARK, PORT132_FN3), \
1039 PINMUX_DATA(PORT132_KEYOUT10_MARK, PORT132_FN4), \
1040 PINMUX_DATA(LCD2D12_MARK, PORT132_FN7),
1041 PINMUX_DATA(VIO_D3_MARK, PORT133_FN1), \
1042 PINMUX_DATA(MSIOF2_TSYNC_MARK, PORT133_FN3, MSEL4CR_MSEL11_0), \
1043 PINMUX_DATA(LCD2D13_MARK, PORT133_FN7),
1044 PINMUX_DATA(VIO_D4_MARK, PORT134_FN1), \
1045 PINMUX_DATA(MSIOF2_TXD_MARK, PORT134_FN3, MSEL4CR_MSEL11_0), \
1046 PINMUX_DATA(LCD2D14_MARK, PORT134_FN7),
1047 PINMUX_DATA(VIO_D5_MARK, PORT135_FN1), \
1048 PINMUX_DATA(MSIOF2_TSCK_MARK, PORT135_FN3, MSEL4CR_MSEL11_0), \
1049 PINMUX_DATA(LCD2D15_MARK, PORT135_FN7),
1050 PINMUX_DATA(VIO_D6_MARK, PORT136_FN1), \
1051 PINMUX_DATA(PORT136_KEYOUT8_MARK, PORT136_FN2), \
1052 PINMUX_DATA(LCD2D16_MARK, PORT136_FN7),
1053 PINMUX_DATA(VIO_D7_MARK, PORT137_FN1), \
1054 PINMUX_DATA(PORT137_KEYOUT9_MARK, PORT137_FN2), \
1055 PINMUX_DATA(LCD2D17_MARK, PORT137_FN7),
1056 PINMUX_DATA(VIO_D8_MARK, PORT138_FN1), \
1057 PINMUX_DATA(PORT138_KEYOUT8_MARK, PORT138_FN2), \
1058 PINMUX_DATA(VIO2_D0_MARK, PORT138_FN6), \
1059 PINMUX_DATA(LCD2D6_MARK, PORT138_FN7),
1060 PINMUX_DATA(VIO_D9_MARK, PORT139_FN1), \
1061 PINMUX_DATA(PORT139_KEYOUT9_MARK, PORT139_FN2), \
1062 PINMUX_DATA(VIO2_D1_MARK, PORT139_FN6), \
1063 PINMUX_DATA(LCD2D7_MARK, PORT139_FN7),
1064 PINMUX_DATA(VIO_D10_MARK, PORT140_FN1), \
1065 PINMUX_DATA(TPU0TO2_MARK, PORT140_FN4), \
1066 PINMUX_DATA(VIO2_D2_MARK, PORT140_FN6), \
1067 PINMUX_DATA(LCD2D8_MARK, PORT140_FN7),
1068 PINMUX_DATA(VIO_D11_MARK, PORT141_FN1), \
1069 PINMUX_DATA(TPU0TO3_MARK, PORT141_FN4), \
1070 PINMUX_DATA(VIO2_D3_MARK, PORT141_FN6), \
1071 PINMUX_DATA(LCD2D9_MARK, PORT141_FN7),
1072 PINMUX_DATA(VIO_D12_MARK, PORT142_FN1), \
1073 PINMUX_DATA(PORT142_KEYOUT10_MARK, PORT142_FN2), \
1074 PINMUX_DATA(VIO2_D4_MARK, PORT142_FN6), \
1075 PINMUX_DATA(LCD2D2_MARK, PORT142_FN7),
1076 PINMUX_DATA(VIO_D13_MARK, PORT143_FN1), \
1077 PINMUX_DATA(PORT143_KEYOUT11_MARK, PORT143_FN2), \
1078 PINMUX_DATA(PORT143_KEYOUT6_MARK, PORT143_FN3), \
1079 PINMUX_DATA(VIO2_D5_MARK, PORT143_FN6), \
1080 PINMUX_DATA(LCD2D3_MARK, PORT143_FN7),
1081 PINMUX_DATA(VIO_D14_MARK, PORT144_FN1), \
1082 PINMUX_DATA(PORT144_KEYOUT7_MARK, PORT144_FN2), \
1083 PINMUX_DATA(VIO2_D6_MARK, PORT144_FN6), \
1084 PINMUX_DATA(LCD2D4_MARK, PORT144_FN7),
1085 PINMUX_DATA(VIO_D15_MARK, PORT145_FN1), \
1086 PINMUX_DATA(TPU1TO3_MARK, PORT145_FN3), \
1087 PINMUX_DATA(PORT145_LCD2DISP_MARK, PORT145_FN4), \
1088 PINMUX_DATA(PORT145_LCD2RS_MARK, PORT145_FN5), \
1089 PINMUX_DATA(VIO2_D7_MARK, PORT145_FN6), \
1090 PINMUX_DATA(LCD2D5_MARK, PORT145_FN7),
1091 PINMUX_DATA(VIO_CLK_MARK, PORT146_FN1), \
1092 PINMUX_DATA(LCD2DCK_MARK, PORT146_FN4), \
1093 PINMUX_DATA(PORT146_LCD2WR__MARK, PORT146_FN5), \
1094 PINMUX_DATA(VIO2_CLK_MARK, PORT146_FN6, MSEL4CR_MSEL27_0), \
1095 PINMUX_DATA(LCD2D18_MARK, PORT146_FN7),
1096 PINMUX_DATA(VIO_FIELD_MARK, PORT147_FN1), \
1097 PINMUX_DATA(LCD2RD__MARK, PORT147_FN4), \
1098 PINMUX_DATA(VIO2_FIELD_MARK, PORT147_FN6, MSEL4CR_MSEL27_0), \
1099 PINMUX_DATA(LCD2D19_MARK, PORT147_FN7),
1100 PINMUX_DATA(VIO_CKO_MARK, PORT148_FN1),
1101 PINMUX_DATA(A27_MARK, PORT149_FN1), \
1102 PINMUX_DATA(PORT149_RDWR_MARK, PORT149_FN2), \
1103 PINMUX_DATA(MFG0_IN1_MARK, PORT149_FN3), \
1104 PINMUX_DATA(PORT149_KEYOUT9_MARK, PORT149_FN4),
1105 PINMUX_DATA(MFG0_IN2_MARK, PORT150_FN3),
1106 PINMUX_DATA(TS_SPSYNC3_MARK, PORT151_FN4), \
1107 PINMUX_DATA(MSIOF2_RSCK_MARK, PORT151_FN5),
1108 PINMUX_DATA(TS_SDAT3_MARK, PORT152_FN4), \
1109 PINMUX_DATA(MSIOF2_RSYNC_MARK, PORT152_FN5),
1110 PINMUX_DATA(TPU1TO2_MARK, PORT153_FN3), \
1111 PINMUX_DATA(TS_SDEN3_MARK, PORT153_FN4), \
1112 PINMUX_DATA(PORT153_MSIOF2_SS1_MARK, PORT153_FN5),
1113 PINMUX_DATA(SCIFA2_TXD1_MARK, PORT154_FN2, MSEL3CR_MSEL9_0), \
1114 PINMUX_DATA(MSIOF2_MCK0_MARK, PORT154_FN5),
1115 PINMUX_DATA(SCIFA2_RXD1_MARK, PORT155_FN2, MSEL3CR_MSEL9_0), \
1116 PINMUX_DATA(MSIOF2_MCK1_MARK, PORT155_FN5),
1117 PINMUX_DATA(SCIFA2_RTS1__MARK, PORT156_FN2, MSEL3CR_MSEL9_0), \
1118 PINMUX_DATA(PORT156_MSIOF2_SS2_MARK, PORT156_FN5),
1119 PINMUX_DATA(SCIFA2_CTS1__MARK, PORT157_FN2, MSEL3CR_MSEL9_0), \
1120 PINMUX_DATA(PORT157_MSIOF2_RXD_MARK, PORT157_FN5, MSEL4CR_MSEL11_0,
1121 MSEL4CR_MSEL10_0),
1122 PINMUX_DATA(DINT__MARK, PORT158_FN1), \
1123 PINMUX_DATA(SCIFA2_SCK1_MARK, PORT158_FN2, MSEL3CR_MSEL9_0), \
1124 PINMUX_DATA(TS_SCK3_MARK, PORT158_FN4),
1125 PINMUX_DATA(PORT159_SCIFB_SCK_MARK, PORT159_FN1, MSEL4CR_MSEL22_0), \
1126 PINMUX_DATA(PORT159_SCIFA5_SCK_MARK, PORT159_FN2, MSEL4CR_MSEL21_1), \
1127 PINMUX_DATA(NMI_MARK, PORT159_FN3),
1128 PINMUX_DATA(PORT160_SCIFB_TXD_MARK, PORT160_FN1, MSEL4CR_MSEL22_0), \
1129 PINMUX_DATA(PORT160_SCIFA5_TXD_MARK, PORT160_FN2, MSEL4CR_MSEL21_1),
1130 PINMUX_DATA(PORT161_SCIFB_CTS__MARK, PORT161_FN1, MSEL4CR_MSEL22_0), \
1131 PINMUX_DATA(PORT161_SCIFA5_CTS__MARK, PORT161_FN2, MSEL4CR_MSEL21_1),
1132 PINMUX_DATA(PORT162_SCIFB_RXD_MARK, PORT162_FN1, MSEL4CR_MSEL22_0), \
1133 PINMUX_DATA(PORT162_SCIFA5_RXD_MARK, PORT162_FN2, MSEL4CR_MSEL21_1),
1134 PINMUX_DATA(PORT163_SCIFB_RTS__MARK, PORT163_FN1, MSEL4CR_MSEL22_0), \
1135 PINMUX_DATA(PORT163_SCIFA5_RTS__MARK, PORT163_FN2, MSEL4CR_MSEL21_1), \
1136 PINMUX_DATA(TPU3TO0_MARK, PORT163_FN5),
1137 PINMUX_DATA(LCDD0_MARK, PORT192_FN1),
1138 PINMUX_DATA(LCDD1_MARK, PORT193_FN1), \
1139 PINMUX_DATA(PORT193_SCIFA5_CTS__MARK, PORT193_FN3, MSEL4CR_MSEL21_0,
1140 MSEL4CR_MSEL20_1), \
1141 PINMUX_DATA(BBIF2_TSYNC1_MARK, PORT193_FN5),
1142 PINMUX_DATA(LCDD2_MARK, PORT194_FN1), \
1143 PINMUX_DATA(PORT194_SCIFA5_RTS__MARK, PORT194_FN3, MSEL4CR_MSEL21_0,
1144 MSEL4CR_MSEL20_1), \
1145 PINMUX_DATA(BBIF2_TSCK1_MARK, PORT194_FN5),
1146 PINMUX_DATA(LCDD3_MARK, PORT195_FN1), \
1147 PINMUX_DATA(PORT195_SCIFA5_RXD_MARK, PORT195_FN3, MSEL4CR_MSEL21_0,
1148 MSEL4CR_MSEL20_1), \
1149 PINMUX_DATA(BBIF2_TXD1_MARK, PORT195_FN5),
1150 PINMUX_DATA(LCDD4_MARK, PORT196_FN1), \
1151 PINMUX_DATA(PORT196_SCIFA5_TXD_MARK, PORT196_FN3, MSEL4CR_MSEL21_0,
1152 MSEL4CR_MSEL20_1),
1153 PINMUX_DATA(LCDD5_MARK, PORT197_FN1), \
1154 PINMUX_DATA(PORT197_SCIFA5_SCK_MARK, PORT197_FN3, MSEL4CR_MSEL21_0,
1155 MSEL4CR_MSEL20_1), \
1156 PINMUX_DATA(MFG2_OUT2_MARK, PORT197_FN5), \
1157 PINMUX_DATA(TPU2TO1_MARK, PORT197_FN7),
1158 PINMUX_DATA(LCDD6_MARK, PORT198_FN1),
1159 PINMUX_DATA(LCDD7_MARK, PORT199_FN1), \
1160 PINMUX_DATA(TPU4TO1_MARK, PORT199_FN2), \
1161 PINMUX_DATA(MFG4_OUT2_MARK, PORT199_FN5),
1162 PINMUX_DATA(LCDD8_MARK, PORT200_FN1), \
1163 PINMUX_DATA(D16_MARK, PORT200_FN6),
1164 PINMUX_DATA(LCDD9_MARK, PORT201_FN1), \
1165 PINMUX_DATA(D17_MARK, PORT201_FN6),
1166 PINMUX_DATA(LCDD10_MARK, PORT202_FN1), \
1167 PINMUX_DATA(D18_MARK, PORT202_FN6),
1168 PINMUX_DATA(LCDD11_MARK, PORT203_FN1), \
1169 PINMUX_DATA(D19_MARK, PORT203_FN6),
1170 PINMUX_DATA(LCDD12_MARK, PORT204_FN1), \
1171 PINMUX_DATA(D20_MARK, PORT204_FN6),
1172 PINMUX_DATA(LCDD13_MARK, PORT205_FN1), \
1173 PINMUX_DATA(D21_MARK, PORT205_FN6),
1174 PINMUX_DATA(LCDD14_MARK, PORT206_FN1), \
1175 PINMUX_DATA(D22_MARK, PORT206_FN6),
1176 PINMUX_DATA(LCDD15_MARK, PORT207_FN1), \
1177 PINMUX_DATA(PORT207_MSIOF0L_SS1_MARK, PORT207_FN2, MSEL3CR_MSEL11_1), \
1178 PINMUX_DATA(D23_MARK, PORT207_FN6),
1179 PINMUX_DATA(LCDD16_MARK, PORT208_FN1), \
1180 PINMUX_DATA(PORT208_MSIOF0L_SS2_MARK, PORT208_FN2, MSEL3CR_MSEL11_1), \
1181 PINMUX_DATA(D24_MARK, PORT208_FN6),
1182 PINMUX_DATA(LCDD17_MARK, PORT209_FN1), \
1183 PINMUX_DATA(D25_MARK, PORT209_FN6),
1184 PINMUX_DATA(LCDD18_MARK, PORT210_FN1), \
1185 PINMUX_DATA(DREQ2_MARK, PORT210_FN2), \
1186 PINMUX_DATA(PORT210_MSIOF0L_SS1_MARK, PORT210_FN5, MSEL3CR_MSEL11_1), \
1187 PINMUX_DATA(D26_MARK, PORT210_FN6),
1188 PINMUX_DATA(LCDD19_MARK, PORT211_FN1), \
1189 PINMUX_DATA(PORT211_MSIOF0L_SS2_MARK, PORT211_FN5, MSEL3CR_MSEL11_1), \
1190 PINMUX_DATA(D27_MARK, PORT211_FN6),
1191 PINMUX_DATA(LCDD20_MARK, PORT212_FN1), \
1192 PINMUX_DATA(TS_SPSYNC1_MARK, PORT212_FN2), \
1193 PINMUX_DATA(MSIOF0L_MCK0_MARK, PORT212_FN5, MSEL3CR_MSEL11_1), \
1194 PINMUX_DATA(D28_MARK, PORT212_FN6),
1195 PINMUX_DATA(LCDD21_MARK, PORT213_FN1), \
1196 PINMUX_DATA(TS_SDAT1_MARK, PORT213_FN2), \
1197 PINMUX_DATA(MSIOF0L_MCK1_MARK, PORT213_FN5, MSEL3CR_MSEL11_1), \
1198 PINMUX_DATA(D29_MARK, PORT213_FN6),
1199 PINMUX_DATA(LCDD22_MARK, PORT214_FN1), \
1200 PINMUX_DATA(TS_SDEN1_MARK, PORT214_FN2), \
1201 PINMUX_DATA(MSIOF0L_RSCK_MARK, PORT214_FN5, MSEL3CR_MSEL11_1), \
1202 PINMUX_DATA(D30_MARK, PORT214_FN6),
1203 PINMUX_DATA(LCDD23_MARK, PORT215_FN1), \
1204 PINMUX_DATA(TS_SCK1_MARK, PORT215_FN2), \
1205 PINMUX_DATA(MSIOF0L_RSYNC_MARK, PORT215_FN5, MSEL3CR_MSEL11_1), \
1206 PINMUX_DATA(D31_MARK, PORT215_FN6),
1207 PINMUX_DATA(LCDDCK_MARK, PORT216_FN1), \
1208 PINMUX_DATA(LCDWR__MARK, PORT216_FN2),
1209 PINMUX_DATA(LCDRD__MARK, PORT217_FN1), \
1210 PINMUX_DATA(DACK2_MARK, PORT217_FN2), \
1211 PINMUX_DATA(PORT217_LCD2RS_MARK, PORT217_FN3), \
1212 PINMUX_DATA(MSIOF0L_TSYNC_MARK, PORT217_FN5, MSEL3CR_MSEL11_1), \
1213 PINMUX_DATA(VIO2_FIELD3_MARK, PORT217_FN6, MSEL4CR_MSEL27_1,
1214 MSEL4CR_MSEL26_1), \
1215 PINMUX_DATA(PORT217_LCD2DISP_MARK, PORT217_FN7),
1216 PINMUX_DATA(LCDHSYN_MARK, PORT218_FN1), \
1217 PINMUX_DATA(LCDCS__MARK, PORT218_FN2), \
1218 PINMUX_DATA(LCDCS2__MARK, PORT218_FN3), \
1219 PINMUX_DATA(DACK3_MARK, PORT218_FN4), \
1220 PINMUX_DATA(PORT218_VIO_CKOR_MARK, PORT218_FN5),
1221 PINMUX_DATA(LCDDISP_MARK, PORT219_FN1), \
1222 PINMUX_DATA(LCDRS_MARK, PORT219_FN2), \
1223 PINMUX_DATA(PORT219_LCD2WR__MARK, PORT219_FN3), \
1224 PINMUX_DATA(DREQ3_MARK, PORT219_FN4), \
1225 PINMUX_DATA(MSIOF0L_TSCK_MARK, PORT219_FN5, MSEL3CR_MSEL11_1), \
1226 PINMUX_DATA(VIO2_CLK3_MARK, PORT219_FN6, MSEL4CR_MSEL27_1,
1227 MSEL4CR_MSEL26_1), \
1228 PINMUX_DATA(LCD2DCK_2_MARK, PORT219_FN7),
1229 PINMUX_DATA(LCDVSYN_MARK, PORT220_FN1), \
1230 PINMUX_DATA(LCDVSYN2_MARK, PORT220_FN2),
1231 PINMUX_DATA(LCDLCLK_MARK, PORT221_FN1), \
1232 PINMUX_DATA(DREQ1_MARK, PORT221_FN2), \
1233 PINMUX_DATA(PORT221_LCD2CS__MARK, PORT221_FN3), \
1234 PINMUX_DATA(PWEN_MARK, PORT221_FN4), \
1235 PINMUX_DATA(MSIOF0L_RXD_MARK, PORT221_FN5, MSEL3CR_MSEL11_1), \
1236 PINMUX_DATA(VIO2_HD3_MARK, PORT221_FN6, MSEL4CR_MSEL27_1,
1237 MSEL4CR_MSEL26_1), \
1238 PINMUX_DATA(PORT221_LCD2HSYN_MARK, PORT221_FN7),
1239 PINMUX_DATA(LCDDON_MARK, PORT222_FN1), \
1240 PINMUX_DATA(LCDDON2_MARK, PORT222_FN2), \
1241 PINMUX_DATA(DACK1_MARK, PORT222_FN3), \
1242 PINMUX_DATA(OVCN_MARK, PORT222_FN4), \
1243 PINMUX_DATA(MSIOF0L_TXD_MARK, PORT222_FN5, MSEL3CR_MSEL11_1), \
1244 PINMUX_DATA(VIO2_VD3_MARK, PORT222_FN6, MSEL4CR_MSEL27_1,
1245 MSEL4CR_MSEL26_1), \
1246 PINMUX_DATA(PORT222_LCD2VSYN_MARK, PORT222_FN7, MSEL3CR_MSEL2_1),
1247
1248 PINMUX_DATA(SCIFA1_TXD_MARK, PORT225_FN2), \
1249 PINMUX_DATA(OVCN2_MARK, PORT225_FN4),
1250 PINMUX_DATA(EXTLP_MARK, PORT226_FN1), \
1251 PINMUX_DATA(SCIFA1_SCK_MARK, PORT226_FN2), \
1252 PINMUX_DATA(PORT226_VIO_CKO2_MARK, PORT226_FN5),
1253 PINMUX_DATA(SCIFA1_RTS__MARK, PORT227_FN2), \
1254 PINMUX_DATA(IDIN_MARK, PORT227_FN4),
1255 PINMUX_DATA(SCIFA1_RXD_MARK, PORT228_FN2),
1256 PINMUX_DATA(SCIFA1_CTS__MARK, PORT229_FN2), \
1257 PINMUX_DATA(MFG1_IN1_MARK, PORT229_FN3),
1258 PINMUX_DATA(MSIOF1_TXD_MARK, PORT230_FN1), \
1259 PINMUX_DATA(SCIFA2_TXD2_MARK, PORT230_FN2, MSEL3CR_MSEL9_1),
1260 PINMUX_DATA(MSIOF1_TSYNC_MARK, PORT231_FN1), \
1261 PINMUX_DATA(SCIFA2_CTS2__MARK, PORT231_FN2, MSEL3CR_MSEL9_1),
1262 PINMUX_DATA(MSIOF1_TSCK_MARK, PORT232_FN1), \
1263 PINMUX_DATA(SCIFA2_SCK2_MARK, PORT232_FN2, MSEL3CR_MSEL9_1),
1264 PINMUX_DATA(MSIOF1_RXD_MARK, PORT233_FN1), \
1265 PINMUX_DATA(SCIFA2_RXD2_MARK, PORT233_FN2, MSEL3CR_MSEL9_1),
1266 PINMUX_DATA(MSIOF1_RSCK_MARK, PORT234_FN1), \
1267 PINMUX_DATA(SCIFA2_RTS2__MARK, PORT234_FN2, MSEL3CR_MSEL9_1), \
1268 PINMUX_DATA(VIO2_CLK2_MARK, PORT234_FN6, MSEL4CR_MSEL27_1,
1269 MSEL4CR_MSEL26_0), \
1270 PINMUX_DATA(LCD2D20_MARK, PORT234_FN7),
1271 PINMUX_DATA(MSIOF1_RSYNC_MARK, PORT235_FN1), \
1272 PINMUX_DATA(MFG1_IN2_MARK, PORT235_FN3), \
1273 PINMUX_DATA(VIO2_VD2_MARK, PORT235_FN6, MSEL4CR_MSEL27_1,
1274 MSEL4CR_MSEL26_0), \
1275 PINMUX_DATA(LCD2D21_MARK, PORT235_FN7),
1276 PINMUX_DATA(MSIOF1_MCK0_MARK, PORT236_FN1), \
1277 PINMUX_DATA(PORT236_I2C_SDA2_MARK, PORT236_FN2, MSEL2CR_MSEL17_0,
1278 MSEL2CR_MSEL16_0),
1279 PINMUX_DATA(MSIOF1_MCK1_MARK, PORT237_FN1), \
1280 PINMUX_DATA(PORT237_I2C_SCL2_MARK, PORT237_FN2, MSEL2CR_MSEL17_0,
1281 MSEL2CR_MSEL16_0),
1282 PINMUX_DATA(MSIOF1_SS1_MARK, PORT238_FN1), \
1283 PINMUX_DATA(VIO2_FIELD2_MARK, PORT238_FN6, MSEL4CR_MSEL27_1,
1284 MSEL4CR_MSEL26_0), \
1285 PINMUX_DATA(LCD2D22_MARK, PORT238_FN7),
1286 PINMUX_DATA(MSIOF1_SS2_MARK, PORT239_FN1), \
1287 PINMUX_DATA(VIO2_HD2_MARK, PORT239_FN6, MSEL4CR_MSEL27_1,
1288 MSEL4CR_MSEL26_0), \
1289 PINMUX_DATA(LCD2D23_MARK, PORT239_FN7),
1290 PINMUX_DATA(SCIFA6_TXD_MARK, PORT240_FN1),
1291 PINMUX_DATA(PORT241_IRDA_OUT_MARK, PORT241_FN1, MSEL4CR_MSEL19_0), \
1292 PINMUX_DATA(PORT241_IROUT_MARK, PORT241_FN2), \
1293 PINMUX_DATA(MFG4_OUT1_MARK, PORT241_FN3), \
1294 PINMUX_DATA(TPU4TO0_MARK, PORT241_FN4),
1295 PINMUX_DATA(PORT242_IRDA_IN_MARK, PORT242_FN1, MSEL4CR_MSEL19_0), \
1296 PINMUX_DATA(MFG4_IN2_MARK, PORT242_FN3),
1297 PINMUX_DATA(PORT243_IRDA_FIRSEL_MARK, PORT243_FN1, MSEL4CR_MSEL19_0), \
1298 PINMUX_DATA(PORT243_VIO_CKO2_MARK, PORT243_FN2),
1299 PINMUX_DATA(PORT244_SCIFA5_CTS__MARK, PORT244_FN1, MSEL4CR_MSEL21_0,
1300 MSEL4CR_MSEL20_0), \
1301 PINMUX_DATA(MFG2_IN1_MARK, PORT244_FN2), \
1302 PINMUX_DATA(PORT244_SCIFB_CTS__MARK, PORT244_FN3, MSEL4CR_MSEL22_1), \
1303 PINMUX_DATA(MSIOF2R_RXD_MARK, PORT244_FN7, MSEL4CR_MSEL11_1),
1304 PINMUX_DATA(PORT245_SCIFA5_RTS__MARK, PORT245_FN1, MSEL4CR_MSEL21_0,
1305 MSEL4CR_MSEL20_0), \
1306 PINMUX_DATA(MFG2_IN2_MARK, PORT245_FN2), \
1307 PINMUX_DATA(PORT245_SCIFB_RTS__MARK, PORT245_FN3, MSEL4CR_MSEL22_1), \
1308 PINMUX_DATA(MSIOF2R_TXD_MARK, PORT245_FN7, MSEL4CR_MSEL11_1),
1309 PINMUX_DATA(PORT246_SCIFA5_RXD_MARK, PORT246_FN1, MSEL4CR_MSEL21_0,
1310 MSEL4CR_MSEL20_0), \
1311 PINMUX_DATA(MFG1_OUT1_MARK, PORT246_FN2), \
1312 PINMUX_DATA(PORT246_SCIFB_RXD_MARK, PORT246_FN3, MSEL4CR_MSEL22_1), \
1313 PINMUX_DATA(TPU1TO0_MARK, PORT246_FN4),
1314 PINMUX_DATA(PORT247_SCIFA5_TXD_MARK, PORT247_FN1, MSEL4CR_MSEL21_0,
1315 MSEL4CR_MSEL20_0), \
1316 PINMUX_DATA(MFG3_OUT2_MARK, PORT247_FN2), \
1317 PINMUX_DATA(PORT247_SCIFB_TXD_MARK, PORT247_FN3, MSEL4CR_MSEL22_1), \
1318 PINMUX_DATA(TPU3TO1_MARK, PORT247_FN4),
1319 PINMUX_DATA(PORT248_SCIFA5_SCK_MARK, PORT248_FN1, MSEL4CR_MSEL21_0,
1320 MSEL4CR_MSEL20_0), \
1321 PINMUX_DATA(MFG2_OUT1_MARK, PORT248_FN2), \
1322 PINMUX_DATA(PORT248_SCIFB_SCK_MARK, PORT248_FN3, MSEL4CR_MSEL22_1), \
1323 PINMUX_DATA(TPU2TO0_MARK, PORT248_FN4), \
1324 PINMUX_DATA(PORT248_I2C_SCL3_MARK, PORT248_FN5, MSEL2CR_MSEL19_0,
1325 MSEL2CR_MSEL18_0), \
1326 PINMUX_DATA(MSIOF2R_TSCK_MARK, PORT248_FN7, MSEL4CR_MSEL11_1),
1327 PINMUX_DATA(PORT249_IROUT_MARK, PORT249_FN1), \
1328 PINMUX_DATA(MFG4_IN1_MARK, PORT249_FN2), \
1329 PINMUX_DATA(PORT249_I2C_SDA3_MARK, PORT249_FN5, MSEL2CR_MSEL19_0,
1330 MSEL2CR_MSEL18_0), \
1331 PINMUX_DATA(MSIOF2R_TSYNC_MARK, PORT249_FN7, MSEL4CR_MSEL11_1),
1332 PINMUX_DATA(SDHICLK0_MARK, PORT250_FN1),
1333 PINMUX_DATA(SDHICD0_MARK, PORT251_FN1),
1334 PINMUX_DATA(SDHID0_0_MARK, PORT252_FN1),
1335 PINMUX_DATA(SDHID0_1_MARK, PORT253_FN1),
1336 PINMUX_DATA(SDHID0_2_MARK, PORT254_FN1),
1337 PINMUX_DATA(SDHID0_3_MARK, PORT255_FN1),
1338 PINMUX_DATA(SDHICMD0_MARK, PORT256_FN1),
1339 PINMUX_DATA(SDHIWP0_MARK, PORT257_FN1),
1340 PINMUX_DATA(SDHICLK1_MARK, PORT258_FN1),
1341 PINMUX_DATA(SDHID1_0_MARK, PORT259_FN1), \
1342 PINMUX_DATA(TS_SPSYNC2_MARK, PORT259_FN3),
1343 PINMUX_DATA(SDHID1_1_MARK, PORT260_FN1), \
1344 PINMUX_DATA(TS_SDAT2_MARK, PORT260_FN3),
1345 PINMUX_DATA(SDHID1_2_MARK, PORT261_FN1), \
1346 PINMUX_DATA(TS_SDEN2_MARK, PORT261_FN3),
1347 PINMUX_DATA(SDHID1_3_MARK, PORT262_FN1), \
1348 PINMUX_DATA(TS_SCK2_MARK, PORT262_FN3),
1349 PINMUX_DATA(SDHICMD1_MARK, PORT263_FN1),
1350 PINMUX_DATA(SDHICLK2_MARK, PORT264_FN1),
1351 PINMUX_DATA(SDHID2_0_MARK, PORT265_FN1), \
1352 PINMUX_DATA(TS_SPSYNC4_MARK, PORT265_FN3),
1353 PINMUX_DATA(SDHID2_1_MARK, PORT266_FN1), \
1354 PINMUX_DATA(TS_SDAT4_MARK, PORT266_FN3),
1355 PINMUX_DATA(SDHID2_2_MARK, PORT267_FN1), \
1356 PINMUX_DATA(TS_SDEN4_MARK, PORT267_FN3),
1357 PINMUX_DATA(SDHID2_3_MARK, PORT268_FN1), \
1358 PINMUX_DATA(TS_SCK4_MARK, PORT268_FN3),
1359 PINMUX_DATA(SDHICMD2_MARK, PORT269_FN1),
1360 PINMUX_DATA(MMCCLK0_MARK, PORT270_FN1, MSEL4CR_MSEL15_0),
1361 PINMUX_DATA(MMCD0_0_MARK, PORT271_FN1, PORT271_IN_PU,
1362 MSEL4CR_MSEL15_0),
1363 PINMUX_DATA(MMCD0_1_MARK, PORT272_FN1, PORT272_IN_PU,
1364 MSEL4CR_MSEL15_0),
1365 PINMUX_DATA(MMCD0_2_MARK, PORT273_FN1, PORT273_IN_PU,
1366 MSEL4CR_MSEL15_0),
1367 PINMUX_DATA(MMCD0_3_MARK, PORT274_FN1, PORT274_IN_PU,
1368 MSEL4CR_MSEL15_0),
1369 PINMUX_DATA(MMCD0_4_MARK, PORT275_FN1, PORT275_IN_PU,
1370 MSEL4CR_MSEL15_0), \
1371 PINMUX_DATA(TS_SPSYNC5_MARK, PORT275_FN3),
1372 PINMUX_DATA(MMCD0_5_MARK, PORT276_FN1, PORT276_IN_PU,
1373 MSEL4CR_MSEL15_0), \
1374 PINMUX_DATA(TS_SDAT5_MARK, PORT276_FN3),
1375 PINMUX_DATA(MMCD0_6_MARK, PORT277_FN1, PORT277_IN_PU,
1376 MSEL4CR_MSEL15_0), \
1377 PINMUX_DATA(TS_SDEN5_MARK, PORT277_FN3),
1378 PINMUX_DATA(MMCD0_7_MARK, PORT278_FN1, PORT278_IN_PU,
1379 MSEL4CR_MSEL15_0), \
1380 PINMUX_DATA(TS_SCK5_MARK, PORT278_FN3),
1381 PINMUX_DATA(MMCCMD0_MARK, PORT279_FN1, PORT279_IN_PU,
1382 MSEL4CR_MSEL15_0),
1383 PINMUX_DATA(RESETOUTS__MARK, PORT281_FN1), \
1384 PINMUX_DATA(EXTAL2OUT_MARK, PORT281_FN2),
1385 PINMUX_DATA(MCP_WAIT__MCP_FRB_MARK, PORT288_FN1),
1386 PINMUX_DATA(MCP_CKO_MARK, PORT289_FN1), \
1387 PINMUX_DATA(MMCCLK1_MARK, PORT289_FN2, MSEL4CR_MSEL15_1),
1388 PINMUX_DATA(MCP_D15_MCP_NAF15_MARK, PORT290_FN1),
1389 PINMUX_DATA(MCP_D14_MCP_NAF14_MARK, PORT291_FN1),
1390 PINMUX_DATA(MCP_D13_MCP_NAF13_MARK, PORT292_FN1),
1391 PINMUX_DATA(MCP_D12_MCP_NAF12_MARK, PORT293_FN1),
1392 PINMUX_DATA(MCP_D11_MCP_NAF11_MARK, PORT294_FN1),
1393 PINMUX_DATA(MCP_D10_MCP_NAF10_MARK, PORT295_FN1),
1394 PINMUX_DATA(MCP_D9_MCP_NAF9_MARK, PORT296_FN1),
1395 PINMUX_DATA(MCP_D8_MCP_NAF8_MARK, PORT297_FN1), \
1396 PINMUX_DATA(MMCCMD1_MARK, PORT297_FN2, MSEL4CR_MSEL15_1),
1397 PINMUX_DATA(MCP_D7_MCP_NAF7_MARK, PORT298_FN1), \
1398 PINMUX_DATA(MMCD1_7_MARK, PORT298_FN2, MSEL4CR_MSEL15_1),
1399
1400 PINMUX_DATA(MCP_D6_MCP_NAF6_MARK, PORT299_FN1), \
1401 PINMUX_DATA(MMCD1_6_MARK, PORT299_FN2, MSEL4CR_MSEL15_1),
1402 PINMUX_DATA(MCP_D5_MCP_NAF5_MARK, PORT300_FN1), \
1403 PINMUX_DATA(MMCD1_5_MARK, PORT300_FN2, MSEL4CR_MSEL15_1),
1404 PINMUX_DATA(MCP_D4_MCP_NAF4_MARK, PORT301_FN1), \
1405 PINMUX_DATA(MMCD1_4_MARK, PORT301_FN2, MSEL4CR_MSEL15_1),
1406 PINMUX_DATA(MCP_D3_MCP_NAF3_MARK, PORT302_FN1), \
1407 PINMUX_DATA(MMCD1_3_MARK, PORT302_FN2, MSEL4CR_MSEL15_1),
1408 PINMUX_DATA(MCP_D2_MCP_NAF2_MARK, PORT303_FN1), \
1409 PINMUX_DATA(MMCD1_2_MARK, PORT303_FN2, MSEL4CR_MSEL15_1),
1410 PINMUX_DATA(MCP_D1_MCP_NAF1_MARK, PORT304_FN1), \
1411 PINMUX_DATA(MMCD1_1_MARK, PORT304_FN2, MSEL4CR_MSEL15_1),
1412 PINMUX_DATA(MCP_D0_MCP_NAF0_MARK, PORT305_FN1), \
1413 PINMUX_DATA(MMCD1_0_MARK, PORT305_FN2, MSEL4CR_MSEL15_1),
1414 PINMUX_DATA(MCP_NBRSTOUT__MARK, PORT306_FN1),
1415 PINMUX_DATA(MCP_WE0__MCP_FWE_MARK, PORT309_FN1), \
1416 PINMUX_DATA(MCP_RDWR_MCP_FWE_MARK, PORT309_FN2),
1417
1418 /* MSEL2 special cases */
1419 PINMUX_DATA(TSIF2_TS_XX1_MARK, MSEL2CR_MSEL14_0, MSEL2CR_MSEL13_0,
1420 MSEL2CR_MSEL12_0),
1421 PINMUX_DATA(TSIF2_TS_XX2_MARK, MSEL2CR_MSEL14_0, MSEL2CR_MSEL13_0,
1422 MSEL2CR_MSEL12_1),
1423 PINMUX_DATA(TSIF2_TS_XX3_MARK, MSEL2CR_MSEL14_0, MSEL2CR_MSEL13_1,
1424 MSEL2CR_MSEL12_0),
1425 PINMUX_DATA(TSIF2_TS_XX4_MARK, MSEL2CR_MSEL14_0, MSEL2CR_MSEL13_1,
1426 MSEL2CR_MSEL12_1),
1427 PINMUX_DATA(TSIF2_TS_XX5_MARK, MSEL2CR_MSEL14_1, MSEL2CR_MSEL13_0,
1428 MSEL2CR_MSEL12_0),
1429 PINMUX_DATA(TSIF1_TS_XX1_MARK, MSEL2CR_MSEL11_0, MSEL2CR_MSEL10_0,
1430 MSEL2CR_MSEL9_0),
1431 PINMUX_DATA(TSIF1_TS_XX2_MARK, MSEL2CR_MSEL11_0, MSEL2CR_MSEL10_0,
1432 MSEL2CR_MSEL9_1),
1433 PINMUX_DATA(TSIF1_TS_XX3_MARK, MSEL2CR_MSEL11_0, MSEL2CR_MSEL10_1,
1434 MSEL2CR_MSEL9_0),
1435 PINMUX_DATA(TSIF1_TS_XX4_MARK, MSEL2CR_MSEL11_0, MSEL2CR_MSEL10_1,
1436 MSEL2CR_MSEL9_1),
1437 PINMUX_DATA(TSIF1_TS_XX5_MARK, MSEL2CR_MSEL11_1, MSEL2CR_MSEL10_0,
1438 MSEL2CR_MSEL9_0),
1439 PINMUX_DATA(TSIF0_TS_XX1_MARK, MSEL2CR_MSEL8_0, MSEL2CR_MSEL7_0,
1440 MSEL2CR_MSEL6_0),
1441 PINMUX_DATA(TSIF0_TS_XX2_MARK, MSEL2CR_MSEL8_0, MSEL2CR_MSEL7_0,
1442 MSEL2CR_MSEL6_1),
1443 PINMUX_DATA(TSIF0_TS_XX3_MARK, MSEL2CR_MSEL8_0, MSEL2CR_MSEL7_1,
1444 MSEL2CR_MSEL6_0),
1445 PINMUX_DATA(TSIF0_TS_XX4_MARK, MSEL2CR_MSEL8_0, MSEL2CR_MSEL7_1,
1446 MSEL2CR_MSEL6_1),
1447 PINMUX_DATA(TSIF0_TS_XX5_MARK, MSEL2CR_MSEL8_1, MSEL2CR_MSEL7_0,
1448 MSEL2CR_MSEL6_0),
1449 PINMUX_DATA(MST1_TS_XX1_MARK, MSEL2CR_MSEL5_0, MSEL2CR_MSEL4_0,
1450 MSEL2CR_MSEL3_0),
1451 PINMUX_DATA(MST1_TS_XX2_MARK, MSEL2CR_MSEL5_0, MSEL2CR_MSEL4_0,
1452 MSEL2CR_MSEL3_1),
1453 PINMUX_DATA(MST1_TS_XX3_MARK, MSEL2CR_MSEL5_0, MSEL2CR_MSEL4_1,
1454 MSEL2CR_MSEL3_0),
1455 PINMUX_DATA(MST1_TS_XX4_MARK, MSEL2CR_MSEL5_0, MSEL2CR_MSEL4_1,
1456 MSEL2CR_MSEL3_1),
1457 PINMUX_DATA(MST1_TS_XX5_MARK, MSEL2CR_MSEL5_1, MSEL2CR_MSEL4_0,
1458 MSEL2CR_MSEL3_0),
1459 PINMUX_DATA(MST0_TS_XX1_MARK, MSEL2CR_MSEL2_0, MSEL2CR_MSEL1_0,
1460 MSEL2CR_MSEL0_0),
1461 PINMUX_DATA(MST0_TS_XX2_MARK, MSEL2CR_MSEL2_0, MSEL2CR_MSEL1_0,
1462 MSEL2CR_MSEL0_1),
1463 PINMUX_DATA(MST0_TS_XX3_MARK, MSEL2CR_MSEL2_0, MSEL2CR_MSEL1_1,
1464 MSEL2CR_MSEL0_0),
1465 PINMUX_DATA(MST0_TS_XX4_MARK, MSEL2CR_MSEL2_0, MSEL2CR_MSEL1_1,
1466 MSEL2CR_MSEL0_1),
1467 PINMUX_DATA(MST0_TS_XX5_MARK, MSEL2CR_MSEL2_1, MSEL2CR_MSEL1_0,
1468 MSEL2CR_MSEL0_0),
1469
1470 /* MSEL3 special cases */
1471 PINMUX_DATA(SDHI0_VCCQ_MC0_ON_MARK, MSEL3CR_MSEL28_1),
1472 PINMUX_DATA(SDHI0_VCCQ_MC0_OFF_MARK, MSEL3CR_MSEL28_0),
1473 PINMUX_DATA(DEBUG_MON_VIO_MARK, MSEL3CR_MSEL15_0),
1474 PINMUX_DATA(DEBUG_MON_LCDD_MARK, MSEL3CR_MSEL15_1),
1475 PINMUX_DATA(LCDC_LCDC0_MARK, MSEL3CR_MSEL6_0),
1476 PINMUX_DATA(LCDC_LCDC1_MARK, MSEL3CR_MSEL6_1),
1477
1478 /* MSEL4 special cases */
1479 PINMUX_DATA(IRQ9_MEM_INT_MARK, MSEL4CR_MSEL29_0),
1480 PINMUX_DATA(IRQ9_MCP_INT_MARK, MSEL4CR_MSEL29_1),
1481 PINMUX_DATA(A11_MARK, MSEL4CR_MSEL13_0, MSEL4CR_MSEL12_0),
1482 PINMUX_DATA(KEYOUT8_MARK, MSEL4CR_MSEL13_0, MSEL4CR_MSEL12_1),
1483 PINMUX_DATA(TPU4TO3_MARK, MSEL4CR_MSEL13_1, MSEL4CR_MSEL12_0),
1484 PINMUX_DATA(RESETA_N_PU_ON_MARK, MSEL4CR_MSEL4_0),
1485 PINMUX_DATA(RESETA_N_PU_OFF_MARK, MSEL4CR_MSEL4_1),
1486 PINMUX_DATA(EDBGREQ_PD_MARK, MSEL4CR_MSEL1_0),
1487 PINMUX_DATA(EDBGREQ_PU_MARK, MSEL4CR_MSEL1_1),
1488
1489 /* Functions with pull-ups */
1490 PINMUX_DATA(KEYIN0_PU_MARK, PORT66_FN2, PORT66_IN_PU),
1491 PINMUX_DATA(KEYIN1_PU_MARK, PORT67_FN2, PORT67_IN_PU),
1492 PINMUX_DATA(KEYIN2_PU_MARK, PORT68_FN2, PORT68_IN_PU),
1493 PINMUX_DATA(KEYIN3_PU_MARK, PORT69_FN2, PORT69_IN_PU),
1494 PINMUX_DATA(KEYIN4_PU_MARK, PORT70_FN2, PORT70_IN_PU),
1495 PINMUX_DATA(KEYIN5_PU_MARK, PORT71_FN2, PORT71_IN_PU),
1496 PINMUX_DATA(KEYIN6_PU_MARK, PORT72_FN2, PORT72_IN_PU),
1497 PINMUX_DATA(KEYIN7_PU_MARK, PORT73_FN2, PORT73_IN_PU),
1498
1499 PINMUX_DATA(SDHICD0_PU_MARK, PORT251_FN1, PORT251_IN_PU),
1500 PINMUX_DATA(SDHID0_0_PU_MARK, PORT252_FN1, PORT252_IN_PU),
1501 PINMUX_DATA(SDHID0_1_PU_MARK, PORT253_FN1, PORT253_IN_PU),
1502 PINMUX_DATA(SDHID0_2_PU_MARK, PORT254_FN1, PORT254_IN_PU),
1503 PINMUX_DATA(SDHID0_3_PU_MARK, PORT255_FN1, PORT255_IN_PU),
1504 PINMUX_DATA(SDHICMD0_PU_MARK, PORT256_FN1, PORT256_IN_PU),
1505 PINMUX_DATA(SDHIWP0_PU_MARK, PORT257_FN1, PORT256_IN_PU),
1506 PINMUX_DATA(SDHID1_0_PU_MARK, PORT259_FN1, PORT259_IN_PU),
1507 PINMUX_DATA(SDHID1_1_PU_MARK, PORT260_FN1, PORT260_IN_PU),
1508 PINMUX_DATA(SDHID1_2_PU_MARK, PORT261_FN1, PORT261_IN_PU),
1509 PINMUX_DATA(SDHID1_3_PU_MARK, PORT262_FN1, PORT262_IN_PU),
1510 PINMUX_DATA(SDHICMD1_PU_MARK, PORT263_FN1, PORT263_IN_PU),
1511 PINMUX_DATA(SDHID2_0_PU_MARK, PORT265_FN1, PORT265_IN_PU),
1512 PINMUX_DATA(SDHID2_1_PU_MARK, PORT266_FN1, PORT266_IN_PU),
1513 PINMUX_DATA(SDHID2_2_PU_MARK, PORT267_FN1, PORT267_IN_PU),
1514 PINMUX_DATA(SDHID2_3_PU_MARK, PORT268_FN1, PORT268_IN_PU),
1515 PINMUX_DATA(SDHICMD2_PU_MARK, PORT269_FN1, PORT269_IN_PU),
1516
1517 PINMUX_DATA(MMCCMD0_PU_MARK, PORT279_FN1, PORT279_IN_PU,
1518 MSEL4CR_MSEL15_0),
1519 PINMUX_DATA(MMCCMD1_PU_MARK, PORT297_FN2, PORT297_IN_PU,
1520 MSEL4CR_MSEL15_1),
1521
1522 PINMUX_DATA(MMCD0_0_PU_MARK,
1523 PORT271_FN1, PORT271_IN_PU, MSEL4CR_MSEL15_0),
1524 PINMUX_DATA(MMCD0_1_PU_MARK,
1525 PORT272_FN1, PORT272_IN_PU, MSEL4CR_MSEL15_0),
1526 PINMUX_DATA(MMCD0_2_PU_MARK,
1527 PORT273_FN1, PORT273_IN_PU, MSEL4CR_MSEL15_0),
1528 PINMUX_DATA(MMCD0_3_PU_MARK,
1529 PORT274_FN1, PORT274_IN_PU, MSEL4CR_MSEL15_0),
1530 PINMUX_DATA(MMCD0_4_PU_MARK,
1531 PORT275_FN1, PORT275_IN_PU, MSEL4CR_MSEL15_0),
1532 PINMUX_DATA(MMCD0_5_PU_MARK,
1533 PORT276_FN1, PORT276_IN_PU, MSEL4CR_MSEL15_0),
1534 PINMUX_DATA(MMCD0_6_PU_MARK,
1535 PORT277_FN1, PORT277_IN_PU, MSEL4CR_MSEL15_0),
1536 PINMUX_DATA(MMCD0_7_PU_MARK,
1537 PORT278_FN1, PORT278_IN_PU, MSEL4CR_MSEL15_0),
1538
1539 PINMUX_DATA(FSIBISLD_PU_MARK, PORT39_FN1, PORT39_IN_PU),
1540 PINMUX_DATA(FSIACK_PU_MARK, PORT49_FN1, PORT49_IN_PU),
1541 PINMUX_DATA(FSIAILR_PU_MARK, PORT50_FN5, PORT50_IN_PU),
1542 PINMUX_DATA(FSIAIBT_PU_MARK, PORT51_FN5, PORT51_IN_PU),
1543 PINMUX_DATA(FSIAISLD_PU_MARK, PORT55_FN1, PORT55_IN_PU),
1544};
1545
1546static struct pinmux_gpio pinmux_gpios[] = {
1547 GPIO_PORT_ALL(),
1548
1549 /* Table 25-1 (Functions 0-7) */
1550 GPIO_FN(VBUS_0),
1551 GPIO_FN(GPI0),
1552 GPIO_FN(GPI1),
1553 GPIO_FN(GPI2),
1554 GPIO_FN(GPI3),
1555 GPIO_FN(GPI4),
1556 GPIO_FN(GPI5),
1557 GPIO_FN(GPI6),
1558 GPIO_FN(GPI7),
1559 GPIO_FN(SCIFA7_RXD),
1560 GPIO_FN(SCIFA7_CTS_),
1561 GPIO_FN(GPO7), \
1562 GPIO_FN(MFG0_OUT2),
1563 GPIO_FN(GPO6), \
1564 GPIO_FN(MFG1_OUT2),
1565 GPIO_FN(GPO5), \
1566 GPIO_FN(SCIFA0_SCK), \
1567 GPIO_FN(FSICOSLDT3), \
1568 GPIO_FN(PORT16_VIO_CKOR),
1569 GPIO_FN(SCIFA0_TXD),
1570 GPIO_FN(SCIFA7_TXD),
1571 GPIO_FN(SCIFA7_RTS_), \
1572 GPIO_FN(PORT19_VIO_CKO2),
1573 GPIO_FN(GPO0),
1574 GPIO_FN(GPO1),
1575 GPIO_FN(GPO2), \
1576 GPIO_FN(STATUS0),
1577 GPIO_FN(GPO3), \
1578 GPIO_FN(STATUS1),
1579 GPIO_FN(GPO4), \
1580 GPIO_FN(STATUS2),
1581 GPIO_FN(VINT),
1582 GPIO_FN(TCKON),
1583 GPIO_FN(XDVFS1), \
1584 GPIO_FN(PORT27_I2C_SCL2), \
1585 GPIO_FN(PORT27_I2C_SCL3), \
1586 GPIO_FN(MFG0_OUT1), \
1587 GPIO_FN(PORT27_IROUT),
1588 GPIO_FN(XDVFS2), \
1589 GPIO_FN(PORT28_I2C_SDA2), \
1590 GPIO_FN(PORT28_I2C_SDA3), \
1591 GPIO_FN(PORT28_TPU1TO1),
1592 GPIO_FN(SIM_RST), \
1593 GPIO_FN(PORT29_TPU1TO1),
1594 GPIO_FN(SIM_CLK), \
1595 GPIO_FN(PORT30_VIO_CKOR),
1596 GPIO_FN(SIM_D), \
1597 GPIO_FN(PORT31_IROUT),
1598 GPIO_FN(SCIFA4_TXD),
1599 GPIO_FN(SCIFA4_RXD), \
1600 GPIO_FN(XWUP),
1601 GPIO_FN(SCIFA4_RTS_),
1602 GPIO_FN(SCIFA4_CTS_),
1603 GPIO_FN(FSIBOBT), \
1604 GPIO_FN(FSIBIBT),
1605 GPIO_FN(FSIBOLR), \
1606 GPIO_FN(FSIBILR),
1607 GPIO_FN(FSIBOSLD),
1608 GPIO_FN(FSIBISLD),
1609 GPIO_FN(VACK),
1610 GPIO_FN(XTAL1L),
1611 GPIO_FN(SCIFA0_RTS_), \
1612 GPIO_FN(FSICOSLDT2),
1613 GPIO_FN(SCIFA0_RXD),
1614 GPIO_FN(SCIFA0_CTS_), \
1615 GPIO_FN(FSICOSLDT1),
1616 GPIO_FN(FSICOBT), \
1617 GPIO_FN(FSICIBT), \
1618 GPIO_FN(FSIDOBT), \
1619 GPIO_FN(FSIDIBT),
1620 GPIO_FN(FSICOLR), \
1621 GPIO_FN(FSICILR), \
1622 GPIO_FN(FSIDOLR), \
1623 GPIO_FN(FSIDILR),
1624 GPIO_FN(FSICOSLD), \
1625 GPIO_FN(PORT47_FSICSPDIF),
1626 GPIO_FN(FSICISLD), \
1627 GPIO_FN(FSIDISLD),
1628 GPIO_FN(FSIACK), \
1629 GPIO_FN(PORT49_IRDA_OUT), \
1630 GPIO_FN(PORT49_IROUT), \
1631 GPIO_FN(FSIAOMC),
1632 GPIO_FN(FSIAOLR), \
1633 GPIO_FN(BBIF2_TSYNC2), \
1634 GPIO_FN(TPU2TO2), \
1635 GPIO_FN(FSIAILR),
1636
1637 GPIO_FN(FSIAOBT), \
1638 GPIO_FN(BBIF2_TSCK2), \
1639 GPIO_FN(TPU2TO3), \
1640 GPIO_FN(FSIAIBT),
1641 GPIO_FN(FSIAOSLD), \
1642 GPIO_FN(BBIF2_TXD2),
1643 GPIO_FN(FSIASPDIF), \
1644 GPIO_FN(PORT53_IRDA_IN), \
1645 GPIO_FN(TPU3TO3), \
1646 GPIO_FN(FSIBSPDIF), \
1647 GPIO_FN(PORT53_FSICSPDIF),
1648 GPIO_FN(FSIBCK), \
1649 GPIO_FN(PORT54_IRDA_FIRSEL), \
1650 GPIO_FN(TPU3TO2), \
1651 GPIO_FN(FSIBOMC), \
1652 GPIO_FN(FSICCK), \
1653 GPIO_FN(FSICOMC),
1654 GPIO_FN(FSIAISLD), \
1655 GPIO_FN(TPU0TO0),
1656 GPIO_FN(A0), \
1657 GPIO_FN(BS_),
1658 GPIO_FN(A12), \
1659 GPIO_FN(PORT58_KEYOUT7), \
1660 GPIO_FN(TPU4TO2),
1661 GPIO_FN(A13), \
1662 GPIO_FN(PORT59_KEYOUT6), \
1663 GPIO_FN(TPU0TO1),
1664 GPIO_FN(A14), \
1665 GPIO_FN(KEYOUT5),
1666 GPIO_FN(A15), \
1667 GPIO_FN(KEYOUT4),
1668 GPIO_FN(A16), \
1669 GPIO_FN(KEYOUT3), \
1670 GPIO_FN(MSIOF0_SS1),
1671 GPIO_FN(A17), \
1672 GPIO_FN(KEYOUT2), \
1673 GPIO_FN(MSIOF0_TSYNC),
1674 GPIO_FN(A18), \
1675 GPIO_FN(KEYOUT1), \
1676 GPIO_FN(MSIOF0_TSCK),
1677 GPIO_FN(A19), \
1678 GPIO_FN(KEYOUT0), \
1679 GPIO_FN(MSIOF0_TXD),
1680 GPIO_FN(A20), \
1681 GPIO_FN(KEYIN0), \
1682 GPIO_FN(MSIOF0_RSCK),
1683 GPIO_FN(A21), \
1684 GPIO_FN(KEYIN1), \
1685 GPIO_FN(MSIOF0_RSYNC),
1686 GPIO_FN(A22), \
1687 GPIO_FN(KEYIN2), \
1688 GPIO_FN(MSIOF0_MCK0),
1689 GPIO_FN(A23), \
1690 GPIO_FN(KEYIN3), \
1691 GPIO_FN(MSIOF0_MCK1),
1692 GPIO_FN(A24), \
1693 GPIO_FN(KEYIN4), \
1694 GPIO_FN(MSIOF0_RXD),
1695 GPIO_FN(A25), \
1696 GPIO_FN(KEYIN5), \
1697 GPIO_FN(MSIOF0_SS2),
1698 GPIO_FN(A26), \
1699 GPIO_FN(KEYIN6),
1700 GPIO_FN(KEYIN7),
1701 GPIO_FN(D0_NAF0),
1702 GPIO_FN(D1_NAF1),
1703 GPIO_FN(D2_NAF2),
1704 GPIO_FN(D3_NAF3),
1705 GPIO_FN(D4_NAF4),
1706 GPIO_FN(D5_NAF5),
1707 GPIO_FN(D6_NAF6),
1708 GPIO_FN(D7_NAF7),
1709 GPIO_FN(D8_NAF8),
1710 GPIO_FN(D9_NAF9),
1711 GPIO_FN(D10_NAF10),
1712 GPIO_FN(D11_NAF11),
1713 GPIO_FN(D12_NAF12),
1714 GPIO_FN(D13_NAF13),
1715 GPIO_FN(D14_NAF14),
1716 GPIO_FN(D15_NAF15),
1717 GPIO_FN(CS4_),
1718 GPIO_FN(CS5A_), \
1719 GPIO_FN(PORT91_RDWR),
1720 GPIO_FN(CS5B_), \
1721 GPIO_FN(FCE1_),
1722 GPIO_FN(CS6B_), \
1723 GPIO_FN(DACK0),
1724 GPIO_FN(FCE0_), \
1725 GPIO_FN(CS6A_),
1726 GPIO_FN(WAIT_), \
1727 GPIO_FN(DREQ0),
1728 GPIO_FN(RD__FSC),
1729 GPIO_FN(WE0__FWE), \
1730 GPIO_FN(RDWR_FWE),
1731 GPIO_FN(WE1_),
1732 GPIO_FN(FRB),
1733 GPIO_FN(CKO),
1734 GPIO_FN(NBRSTOUT_),
1735 GPIO_FN(NBRST_),
1736 GPIO_FN(BBIF2_TXD),
1737 GPIO_FN(BBIF2_RXD),
1738 GPIO_FN(BBIF2_SYNC),
1739 GPIO_FN(BBIF2_SCK),
1740 GPIO_FN(SCIFA3_CTS_), \
1741 GPIO_FN(MFG3_IN2),
1742 GPIO_FN(SCIFA3_RXD), \
1743 GPIO_FN(MFG3_IN1),
1744 GPIO_FN(BBIF1_SS2), \
1745 GPIO_FN(SCIFA3_RTS_), \
1746 GPIO_FN(MFG3_OUT1),
1747 GPIO_FN(SCIFA3_TXD),
1748 GPIO_FN(HSI_RX_DATA), \
1749 GPIO_FN(BBIF1_RXD),
1750 GPIO_FN(HSI_TX_WAKE), \
1751 GPIO_FN(BBIF1_TSCK),
1752 GPIO_FN(HSI_TX_DATA), \
1753 GPIO_FN(BBIF1_TSYNC),
1754 GPIO_FN(HSI_TX_READY), \
1755 GPIO_FN(BBIF1_TXD),
1756 GPIO_FN(HSI_RX_READY), \
1757 GPIO_FN(BBIF1_RSCK), \
1758 GPIO_FN(PORT115_I2C_SCL2), \
1759 GPIO_FN(PORT115_I2C_SCL3),
1760 GPIO_FN(HSI_RX_WAKE), \
1761 GPIO_FN(BBIF1_RSYNC), \
1762 GPIO_FN(PORT116_I2C_SDA2), \
1763 GPIO_FN(PORT116_I2C_SDA3),
1764 GPIO_FN(HSI_RX_FLAG), \
1765 GPIO_FN(BBIF1_SS1), \
1766 GPIO_FN(BBIF1_FLOW),
1767 GPIO_FN(HSI_TX_FLAG),
1768 GPIO_FN(VIO_VD), \
1769 GPIO_FN(PORT128_LCD2VSYN), \
1770 GPIO_FN(VIO2_VD), \
1771 GPIO_FN(LCD2D0),
1772
1773 GPIO_FN(VIO_HD), \
1774 GPIO_FN(PORT129_LCD2HSYN), \
1775 GPIO_FN(PORT129_LCD2CS_), \
1776 GPIO_FN(VIO2_HD), \
1777 GPIO_FN(LCD2D1),
1778 GPIO_FN(VIO_D0), \
1779 GPIO_FN(PORT130_MSIOF2_RXD), \
1780 GPIO_FN(LCD2D10),
1781 GPIO_FN(VIO_D1), \
1782 GPIO_FN(PORT131_KEYOUT6), \
1783 GPIO_FN(PORT131_MSIOF2_SS1), \
1784 GPIO_FN(PORT131_KEYOUT11), \
1785 GPIO_FN(LCD2D11),
1786 GPIO_FN(VIO_D2), \
1787 GPIO_FN(PORT132_KEYOUT7), \
1788 GPIO_FN(PORT132_MSIOF2_SS2), \
1789 GPIO_FN(PORT132_KEYOUT10), \
1790 GPIO_FN(LCD2D12),
1791 GPIO_FN(VIO_D3), \
1792 GPIO_FN(MSIOF2_TSYNC), \
1793 GPIO_FN(LCD2D13),
1794 GPIO_FN(VIO_D4), \
1795 GPIO_FN(MSIOF2_TXD), \
1796 GPIO_FN(LCD2D14),
1797 GPIO_FN(VIO_D5), \
1798 GPIO_FN(MSIOF2_TSCK), \
1799 GPIO_FN(LCD2D15),
1800 GPIO_FN(VIO_D6), \
1801 GPIO_FN(PORT136_KEYOUT8), \
1802 GPIO_FN(LCD2D16),
1803 GPIO_FN(VIO_D7), \
1804 GPIO_FN(PORT137_KEYOUT9), \
1805 GPIO_FN(LCD2D17),
1806 GPIO_FN(VIO_D8), \
1807 GPIO_FN(PORT138_KEYOUT8), \
1808 GPIO_FN(VIO2_D0), \
1809 GPIO_FN(LCD2D6),
1810 GPIO_FN(VIO_D9), \
1811 GPIO_FN(PORT139_KEYOUT9), \
1812 GPIO_FN(VIO2_D1), \
1813 GPIO_FN(LCD2D7),
1814 GPIO_FN(VIO_D10), \
1815 GPIO_FN(TPU0TO2), \
1816 GPIO_FN(VIO2_D2), \
1817 GPIO_FN(LCD2D8),
1818 GPIO_FN(VIO_D11), \
1819 GPIO_FN(TPU0TO3), \
1820 GPIO_FN(VIO2_D3), \
1821 GPIO_FN(LCD2D9),
1822 GPIO_FN(VIO_D12), \
1823 GPIO_FN(PORT142_KEYOUT10), \
1824 GPIO_FN(VIO2_D4), \
1825 GPIO_FN(LCD2D2),
1826 GPIO_FN(VIO_D13), \
1827 GPIO_FN(PORT143_KEYOUT11), \
1828 GPIO_FN(PORT143_KEYOUT6), \
1829 GPIO_FN(VIO2_D5), \
1830 GPIO_FN(LCD2D3),
1831 GPIO_FN(VIO_D14), \
1832 GPIO_FN(PORT144_KEYOUT7), \
1833 GPIO_FN(VIO2_D6), \
1834 GPIO_FN(LCD2D4),
1835 GPIO_FN(VIO_D15), \
1836 GPIO_FN(TPU1TO3), \
1837 GPIO_FN(PORT145_LCD2DISP), \
1838 GPIO_FN(PORT145_LCD2RS), \
1839 GPIO_FN(VIO2_D7), \
1840 GPIO_FN(LCD2D5),
1841 GPIO_FN(VIO_CLK), \
1842 GPIO_FN(LCD2DCK), \
1843 GPIO_FN(PORT146_LCD2WR_), \
1844 GPIO_FN(VIO2_CLK), \
1845 GPIO_FN(LCD2D18),
1846 GPIO_FN(VIO_FIELD), \
1847 GPIO_FN(LCD2RD_), \
1848 GPIO_FN(VIO2_FIELD), \
1849 GPIO_FN(LCD2D19),
1850 GPIO_FN(VIO_CKO),
1851 GPIO_FN(A27), \
1852 GPIO_FN(PORT149_RDWR), \
1853 GPIO_FN(MFG0_IN1), \
1854 GPIO_FN(PORT149_KEYOUT9),
1855 GPIO_FN(MFG0_IN2),
1856 GPIO_FN(TS_SPSYNC3), \
1857 GPIO_FN(MSIOF2_RSCK),
1858 GPIO_FN(TS_SDAT3), \
1859 GPIO_FN(MSIOF2_RSYNC),
1860 GPIO_FN(TPU1TO2), \
1861 GPIO_FN(TS_SDEN3), \
1862 GPIO_FN(PORT153_MSIOF2_SS1),
1863 GPIO_FN(SCIFA2_TXD1), \
1864 GPIO_FN(MSIOF2_MCK0),
1865 GPIO_FN(SCIFA2_RXD1), \
1866 GPIO_FN(MSIOF2_MCK1),
1867 GPIO_FN(SCIFA2_RTS1_), \
1868 GPIO_FN(PORT156_MSIOF2_SS2),
1869 GPIO_FN(SCIFA2_CTS1_), \
1870 GPIO_FN(PORT157_MSIOF2_RXD),
1871 GPIO_FN(DINT_), \
1872 GPIO_FN(SCIFA2_SCK1), \
1873 GPIO_FN(TS_SCK3),
1874 GPIO_FN(PORT159_SCIFB_SCK), \
1875 GPIO_FN(PORT159_SCIFA5_SCK), \
1876 GPIO_FN(NMI),
1877 GPIO_FN(PORT160_SCIFB_TXD), \
1878 GPIO_FN(PORT160_SCIFA5_TXD),
1879 GPIO_FN(PORT161_SCIFB_CTS_), \
1880 GPIO_FN(PORT161_SCIFA5_CTS_),
1881 GPIO_FN(PORT162_SCIFB_RXD), \
1882 GPIO_FN(PORT162_SCIFA5_RXD),
1883 GPIO_FN(PORT163_SCIFB_RTS_), \
1884 GPIO_FN(PORT163_SCIFA5_RTS_), \
1885 GPIO_FN(TPU3TO0),
1886 GPIO_FN(LCDD0),
1887 GPIO_FN(LCDD1), \
1888 GPIO_FN(PORT193_SCIFA5_CTS_), \
1889 GPIO_FN(BBIF2_TSYNC1),
1890 GPIO_FN(LCDD2), \
1891 GPIO_FN(PORT194_SCIFA5_RTS_), \
1892 GPIO_FN(BBIF2_TSCK1),
1893 GPIO_FN(LCDD3), \
1894 GPIO_FN(PORT195_SCIFA5_RXD), \
1895 GPIO_FN(BBIF2_TXD1),
1896 GPIO_FN(LCDD4), \
1897 GPIO_FN(PORT196_SCIFA5_TXD),
1898 GPIO_FN(LCDD5), \
1899 GPIO_FN(PORT197_SCIFA5_SCK), \
1900 GPIO_FN(MFG2_OUT2), \
1901 GPIO_FN(TPU2TO1),
1902 GPIO_FN(LCDD6),
1903 GPIO_FN(LCDD7), \
1904 GPIO_FN(TPU4TO1), \
1905 GPIO_FN(MFG4_OUT2),
1906 GPIO_FN(LCDD8), \
1907 GPIO_FN(D16),
1908 GPIO_FN(LCDD9), \
1909 GPIO_FN(D17),
1910 GPIO_FN(LCDD10), \
1911 GPIO_FN(D18),
1912 GPIO_FN(LCDD11), \
1913 GPIO_FN(D19),
1914 GPIO_FN(LCDD12), \
1915 GPIO_FN(D20),
1916 GPIO_FN(LCDD13), \
1917 GPIO_FN(D21),
1918 GPIO_FN(LCDD14), \
1919 GPIO_FN(D22),
1920 GPIO_FN(LCDD15), \
1921 GPIO_FN(PORT207_MSIOF0L_SS1), \
1922 GPIO_FN(D23),
1923 GPIO_FN(LCDD16), \
1924 GPIO_FN(PORT208_MSIOF0L_SS2), \
1925 GPIO_FN(D24),
1926 GPIO_FN(LCDD17), \
1927 GPIO_FN(D25),
1928 GPIO_FN(LCDD18), \
1929 GPIO_FN(DREQ2), \
1930 GPIO_FN(PORT210_MSIOF0L_SS1), \
1931 GPIO_FN(D26),
1932 GPIO_FN(LCDD19), \
1933 GPIO_FN(PORT211_MSIOF0L_SS2), \
1934 GPIO_FN(D27),
1935 GPIO_FN(LCDD20), \
1936 GPIO_FN(TS_SPSYNC1), \
1937 GPIO_FN(MSIOF0L_MCK0), \
1938 GPIO_FN(D28),
1939 GPIO_FN(LCDD21), \
1940 GPIO_FN(TS_SDAT1), \
1941 GPIO_FN(MSIOF0L_MCK1), \
1942 GPIO_FN(D29),
1943 GPIO_FN(LCDD22), \
1944 GPIO_FN(TS_SDEN1), \
1945 GPIO_FN(MSIOF0L_RSCK), \
1946 GPIO_FN(D30),
1947 GPIO_FN(LCDD23), \
1948 GPIO_FN(TS_SCK1), \
1949 GPIO_FN(MSIOF0L_RSYNC), \
1950 GPIO_FN(D31),
1951 GPIO_FN(LCDDCK), \
1952 GPIO_FN(LCDWR_),
1953 GPIO_FN(LCDRD_), \
1954 GPIO_FN(DACK2), \
1955 GPIO_FN(PORT217_LCD2RS), \
1956 GPIO_FN(MSIOF0L_TSYNC), \
1957 GPIO_FN(VIO2_FIELD3), \
1958 GPIO_FN(PORT217_LCD2DISP),
1959 GPIO_FN(LCDHSYN), \
1960 GPIO_FN(LCDCS_), \
1961 GPIO_FN(LCDCS2_), \
1962 GPIO_FN(DACK3), \
1963 GPIO_FN(PORT218_VIO_CKOR),
1964 GPIO_FN(LCDDISP), \
1965 GPIO_FN(LCDRS), \
1966 GPIO_FN(PORT219_LCD2WR_), \
1967 GPIO_FN(DREQ3), \
1968 GPIO_FN(MSIOF0L_TSCK), \
1969 GPIO_FN(VIO2_CLK3), \
1970 GPIO_FN(LCD2DCK_2),
1971 GPIO_FN(LCDVSYN), \
1972 GPIO_FN(LCDVSYN2),
1973 GPIO_FN(LCDLCLK), \
1974 GPIO_FN(DREQ1), \
1975 GPIO_FN(PORT221_LCD2CS_), \
1976 GPIO_FN(PWEN), \
1977 GPIO_FN(MSIOF0L_RXD), \
1978 GPIO_FN(VIO2_HD3), \
1979 GPIO_FN(PORT221_LCD2HSYN),
1980 GPIO_FN(LCDDON), \
1981 GPIO_FN(LCDDON2), \
1982 GPIO_FN(DACK1), \
1983 GPIO_FN(OVCN), \
1984 GPIO_FN(MSIOF0L_TXD), \
1985 GPIO_FN(VIO2_VD3), \
1986 GPIO_FN(PORT222_LCD2VSYN),
1987
1988 GPIO_FN(SCIFA1_TXD), \
1989 GPIO_FN(OVCN2),
1990 GPIO_FN(EXTLP), \
1991 GPIO_FN(SCIFA1_SCK), \
1992 GPIO_FN(PORT226_VIO_CKO2),
1993 GPIO_FN(SCIFA1_RTS_), \
1994 GPIO_FN(IDIN),
1995 GPIO_FN(SCIFA1_RXD),
1996 GPIO_FN(SCIFA1_CTS_), \
1997 GPIO_FN(MFG1_IN1),
1998 GPIO_FN(MSIOF1_TXD), \
1999 GPIO_FN(SCIFA2_TXD2),
2000 GPIO_FN(MSIOF1_TSYNC), \
2001 GPIO_FN(SCIFA2_CTS2_),
2002 GPIO_FN(MSIOF1_TSCK), \
2003 GPIO_FN(SCIFA2_SCK2),
2004 GPIO_FN(MSIOF1_RXD), \
2005 GPIO_FN(SCIFA2_RXD2),
2006 GPIO_FN(MSIOF1_RSCK), \
2007 GPIO_FN(SCIFA2_RTS2_), \
2008 GPIO_FN(VIO2_CLK2), \
2009 GPIO_FN(LCD2D20),
2010 GPIO_FN(MSIOF1_RSYNC), \
2011 GPIO_FN(MFG1_IN2), \
2012 GPIO_FN(VIO2_VD2), \
2013 GPIO_FN(LCD2D21),
2014 GPIO_FN(MSIOF1_MCK0), \
2015 GPIO_FN(PORT236_I2C_SDA2),
2016 GPIO_FN(MSIOF1_MCK1), \
2017 GPIO_FN(PORT237_I2C_SCL2),
2018 GPIO_FN(MSIOF1_SS1), \
2019 GPIO_FN(VIO2_FIELD2), \
2020 GPIO_FN(LCD2D22),
2021 GPIO_FN(MSIOF1_SS2), \
2022 GPIO_FN(VIO2_HD2), \
2023 GPIO_FN(LCD2D23),
2024 GPIO_FN(SCIFA6_TXD),
2025 GPIO_FN(PORT241_IRDA_OUT), \
2026 GPIO_FN(PORT241_IROUT), \
2027 GPIO_FN(MFG4_OUT1), \
2028 GPIO_FN(TPU4TO0),
2029 GPIO_FN(PORT242_IRDA_IN), \
2030 GPIO_FN(MFG4_IN2),
2031 GPIO_FN(PORT243_IRDA_FIRSEL), \
2032 GPIO_FN(PORT243_VIO_CKO2),
2033 GPIO_FN(PORT244_SCIFA5_CTS_), \
2034 GPIO_FN(MFG2_IN1), \
2035 GPIO_FN(PORT244_SCIFB_CTS_), \
2036 GPIO_FN(MSIOF2R_RXD),
2037 GPIO_FN(PORT245_SCIFA5_RTS_), \
2038 GPIO_FN(MFG2_IN2), \
2039 GPIO_FN(PORT245_SCIFB_RTS_), \
2040 GPIO_FN(MSIOF2R_TXD),
2041 GPIO_FN(PORT246_SCIFA5_RXD), \
2042 GPIO_FN(MFG1_OUT1), \
2043 GPIO_FN(PORT246_SCIFB_RXD), \
2044 GPIO_FN(TPU1TO0),
2045 GPIO_FN(PORT247_SCIFA5_TXD), \
2046 GPIO_FN(MFG3_OUT2), \
2047 GPIO_FN(PORT247_SCIFB_TXD), \
2048 GPIO_FN(TPU3TO1),
2049 GPIO_FN(PORT248_SCIFA5_SCK), \
2050 GPIO_FN(MFG2_OUT1), \
2051 GPIO_FN(PORT248_SCIFB_SCK), \
2052 GPIO_FN(TPU2TO0), \
2053 GPIO_FN(PORT248_I2C_SCL3), \
2054 GPIO_FN(MSIOF2R_TSCK),
2055 GPIO_FN(PORT249_IROUT), \
2056 GPIO_FN(MFG4_IN1), \
2057 GPIO_FN(PORT249_I2C_SDA3), \
2058 GPIO_FN(MSIOF2R_TSYNC),
2059 GPIO_FN(SDHICLK0),
2060 GPIO_FN(SDHICD0),
2061 GPIO_FN(SDHID0_0),
2062 GPIO_FN(SDHID0_1),
2063 GPIO_FN(SDHID0_2),
2064 GPIO_FN(SDHID0_3),
2065 GPIO_FN(SDHICMD0),
2066 GPIO_FN(SDHIWP0),
2067 GPIO_FN(SDHICLK1),
2068 GPIO_FN(SDHID1_0), \
2069 GPIO_FN(TS_SPSYNC2),
2070 GPIO_FN(SDHID1_1), \
2071 GPIO_FN(TS_SDAT2),
2072 GPIO_FN(SDHID1_2), \
2073 GPIO_FN(TS_SDEN2),
2074 GPIO_FN(SDHID1_3), \
2075 GPIO_FN(TS_SCK2),
2076 GPIO_FN(SDHICMD1),
2077 GPIO_FN(SDHICLK2),
2078 GPIO_FN(SDHID2_0), \
2079 GPIO_FN(TS_SPSYNC4),
2080 GPIO_FN(SDHID2_1), \
2081 GPIO_FN(TS_SDAT4),
2082 GPIO_FN(SDHID2_2), \
2083 GPIO_FN(TS_SDEN4),
2084 GPIO_FN(SDHID2_3), \
2085 GPIO_FN(TS_SCK4),
2086 GPIO_FN(SDHICMD2),
2087 GPIO_FN(MMCCLK0),
2088 GPIO_FN(MMCD0_0),
2089 GPIO_FN(MMCD0_1),
2090 GPIO_FN(MMCD0_2),
2091 GPIO_FN(MMCD0_3),
2092 GPIO_FN(MMCD0_4), \
2093 GPIO_FN(TS_SPSYNC5),
2094 GPIO_FN(MMCD0_5), \
2095 GPIO_FN(TS_SDAT5),
2096 GPIO_FN(MMCD0_6), \
2097 GPIO_FN(TS_SDEN5),
2098 GPIO_FN(MMCD0_7), \
2099 GPIO_FN(TS_SCK5),
2100 GPIO_FN(MMCCMD0),
2101 GPIO_FN(RESETOUTS_), \
2102 GPIO_FN(EXTAL2OUT),
2103 GPIO_FN(MCP_WAIT__MCP_FRB),
2104 GPIO_FN(MCP_CKO), \
2105 GPIO_FN(MMCCLK1),
2106 GPIO_FN(MCP_D15_MCP_NAF15),
2107 GPIO_FN(MCP_D14_MCP_NAF14),
2108 GPIO_FN(MCP_D13_MCP_NAF13),
2109 GPIO_FN(MCP_D12_MCP_NAF12),
2110 GPIO_FN(MCP_D11_MCP_NAF11),
2111 GPIO_FN(MCP_D10_MCP_NAF10),
2112 GPIO_FN(MCP_D9_MCP_NAF9),
2113 GPIO_FN(MCP_D8_MCP_NAF8), \
2114 GPIO_FN(MMCCMD1),
2115 GPIO_FN(MCP_D7_MCP_NAF7), \
2116 GPIO_FN(MMCD1_7),
2117
2118 GPIO_FN(MCP_D6_MCP_NAF6), \
2119 GPIO_FN(MMCD1_6),
2120 GPIO_FN(MCP_D5_MCP_NAF5), \
2121 GPIO_FN(MMCD1_5),
2122 GPIO_FN(MCP_D4_MCP_NAF4), \
2123 GPIO_FN(MMCD1_4),
2124 GPIO_FN(MCP_D3_MCP_NAF3), \
2125 GPIO_FN(MMCD1_3),
2126 GPIO_FN(MCP_D2_MCP_NAF2), \
2127 GPIO_FN(MMCD1_2),
2128 GPIO_FN(MCP_D1_MCP_NAF1), \
2129 GPIO_FN(MMCD1_1),
2130 GPIO_FN(MCP_D0_MCP_NAF0), \
2131 GPIO_FN(MMCD1_0),
2132 GPIO_FN(MCP_NBRSTOUT_),
2133 GPIO_FN(MCP_WE0__MCP_FWE), \
2134 GPIO_FN(MCP_RDWR_MCP_FWE),
2135
2136 /* MSEL2 special cases */
2137 GPIO_FN(TSIF2_TS_XX1),
2138 GPIO_FN(TSIF2_TS_XX2),
2139 GPIO_FN(TSIF2_TS_XX3),
2140 GPIO_FN(TSIF2_TS_XX4),
2141 GPIO_FN(TSIF2_TS_XX5),
2142 GPIO_FN(TSIF1_TS_XX1),
2143 GPIO_FN(TSIF1_TS_XX2),
2144 GPIO_FN(TSIF1_TS_XX3),
2145 GPIO_FN(TSIF1_TS_XX4),
2146 GPIO_FN(TSIF1_TS_XX5),
2147 GPIO_FN(TSIF0_TS_XX1),
2148 GPIO_FN(TSIF0_TS_XX2),
2149 GPIO_FN(TSIF0_TS_XX3),
2150 GPIO_FN(TSIF0_TS_XX4),
2151 GPIO_FN(TSIF0_TS_XX5),
2152 GPIO_FN(MST1_TS_XX1),
2153 GPIO_FN(MST1_TS_XX2),
2154 GPIO_FN(MST1_TS_XX3),
2155 GPIO_FN(MST1_TS_XX4),
2156 GPIO_FN(MST1_TS_XX5),
2157 GPIO_FN(MST0_TS_XX1),
2158 GPIO_FN(MST0_TS_XX2),
2159 GPIO_FN(MST0_TS_XX3),
2160 GPIO_FN(MST0_TS_XX4),
2161 GPIO_FN(MST0_TS_XX5),
2162
2163 /* MSEL3 special cases */
2164 GPIO_FN(SDHI0_VCCQ_MC0_ON),
2165 GPIO_FN(SDHI0_VCCQ_MC0_OFF),
2166 GPIO_FN(DEBUG_MON_VIO),
2167 GPIO_FN(DEBUG_MON_LCDD),
2168 GPIO_FN(LCDC_LCDC0),
2169 GPIO_FN(LCDC_LCDC1),
2170
2171 /* MSEL4 special cases */
2172 GPIO_FN(IRQ9_MEM_INT),
2173 GPIO_FN(IRQ9_MCP_INT),
2174 GPIO_FN(A11),
2175 GPIO_FN(KEYOUT8),
2176 GPIO_FN(TPU4TO3),
2177 GPIO_FN(RESETA_N_PU_ON),
2178 GPIO_FN(RESETA_N_PU_OFF),
2179 GPIO_FN(EDBGREQ_PD),
2180 GPIO_FN(EDBGREQ_PU),
2181
2182 /* Functions with pull-ups */
2183 GPIO_FN(KEYIN0_PU),
2184 GPIO_FN(KEYIN1_PU),
2185 GPIO_FN(KEYIN2_PU),
2186 GPIO_FN(KEYIN3_PU),
2187 GPIO_FN(KEYIN4_PU),
2188 GPIO_FN(KEYIN5_PU),
2189 GPIO_FN(KEYIN6_PU),
2190 GPIO_FN(KEYIN7_PU),
2191 GPIO_FN(SDHICD0_PU),
2192 GPIO_FN(SDHID0_0_PU),
2193 GPIO_FN(SDHID0_1_PU),
2194 GPIO_FN(SDHID0_2_PU),
2195 GPIO_FN(SDHID0_3_PU),
2196 GPIO_FN(SDHICMD0_PU),
2197 GPIO_FN(SDHIWP0_PU),
2198 GPIO_FN(SDHID1_0_PU),
2199 GPIO_FN(SDHID1_1_PU),
2200 GPIO_FN(SDHID1_2_PU),
2201 GPIO_FN(SDHID1_3_PU),
2202 GPIO_FN(SDHICMD1_PU),
2203 GPIO_FN(SDHID2_0_PU),
2204 GPIO_FN(SDHID2_1_PU),
2205 GPIO_FN(SDHID2_2_PU),
2206 GPIO_FN(SDHID2_3_PU),
2207 GPIO_FN(SDHICMD2_PU),
2208 GPIO_FN(MMCCMD0_PU),
2209 GPIO_FN(MMCCMD1_PU),
2210 GPIO_FN(MMCD0_0_PU),
2211 GPIO_FN(MMCD0_1_PU),
2212 GPIO_FN(MMCD0_2_PU),
2213 GPIO_FN(MMCD0_3_PU),
2214 GPIO_FN(MMCD0_4_PU),
2215 GPIO_FN(MMCD0_5_PU),
2216 GPIO_FN(MMCD0_6_PU),
2217 GPIO_FN(MMCD0_7_PU),
2218 GPIO_FN(FSIACK_PU),
2219 GPIO_FN(FSIAILR_PU),
2220 GPIO_FN(FSIAIBT_PU),
2221 GPIO_FN(FSIAISLD_PU),
2222};
2223
2224static struct pinmux_cfg_reg pinmux_config_regs[] = {
2225 PORTCR(0, 0xe6050000), /* PORT0CR */
2226 PORTCR(1, 0xe6050001), /* PORT1CR */
2227 PORTCR(2, 0xe6050002), /* PORT2CR */
2228 PORTCR(3, 0xe6050003), /* PORT3CR */
2229 PORTCR(4, 0xe6050004), /* PORT4CR */
2230 PORTCR(5, 0xe6050005), /* PORT5CR */
2231 PORTCR(6, 0xe6050006), /* PORT6CR */
2232 PORTCR(7, 0xe6050007), /* PORT7CR */
2233 PORTCR(8, 0xe6050008), /* PORT8CR */
2234 PORTCR(9, 0xe6050009), /* PORT9CR */
2235
2236 PORTCR(10, 0xe605000a), /* PORT10CR */
2237 PORTCR(11, 0xe605000b), /* PORT11CR */
2238 PORTCR(12, 0xe605000c), /* PORT12CR */
2239 PORTCR(13, 0xe605000d), /* PORT13CR */
2240 PORTCR(14, 0xe605000e), /* PORT14CR */
2241 PORTCR(15, 0xe605000f), /* PORT15CR */
2242 PORTCR(16, 0xe6050010), /* PORT16CR */
2243 PORTCR(17, 0xe6050011), /* PORT17CR */
2244 PORTCR(18, 0xe6050012), /* PORT18CR */
2245 PORTCR(19, 0xe6050013), /* PORT19CR */
2246
2247 PORTCR(20, 0xe6050014), /* PORT20CR */
2248 PORTCR(21, 0xe6050015), /* PORT21CR */
2249 PORTCR(22, 0xe6050016), /* PORT22CR */
2250 PORTCR(23, 0xe6050017), /* PORT23CR */
2251 PORTCR(24, 0xe6050018), /* PORT24CR */
2252 PORTCR(25, 0xe6050019), /* PORT25CR */
2253 PORTCR(26, 0xe605001a), /* PORT26CR */
2254 PORTCR(27, 0xe605001b), /* PORT27CR */
2255 PORTCR(28, 0xe605001c), /* PORT28CR */
2256 PORTCR(29, 0xe605001d), /* PORT29CR */
2257
2258 PORTCR(30, 0xe605001e), /* PORT30CR */
2259 PORTCR(31, 0xe605001f), /* PORT31CR */
2260 PORTCR(32, 0xe6051020), /* PORT32CR */
2261 PORTCR(33, 0xe6051021), /* PORT33CR */
2262 PORTCR(34, 0xe6051022), /* PORT34CR */
2263 PORTCR(35, 0xe6051023), /* PORT35CR */
2264 PORTCR(36, 0xe6051024), /* PORT36CR */
2265 PORTCR(37, 0xe6051025), /* PORT37CR */
2266 PORTCR(38, 0xe6051026), /* PORT38CR */
2267 PORTCR(39, 0xe6051027), /* PORT39CR */
2268
2269 PORTCR(40, 0xe6051028), /* PORT40CR */
2270 PORTCR(41, 0xe6051029), /* PORT41CR */
2271 PORTCR(42, 0xe605102a), /* PORT42CR */
2272 PORTCR(43, 0xe605102b), /* PORT43CR */
2273 PORTCR(44, 0xe605102c), /* PORT44CR */
2274 PORTCR(45, 0xe605102d), /* PORT45CR */
2275 PORTCR(46, 0xe605102e), /* PORT46CR */
2276 PORTCR(47, 0xe605102f), /* PORT47CR */
2277 PORTCR(48, 0xe6051030), /* PORT48CR */
2278 PORTCR(49, 0xe6051031), /* PORT49CR */
2279
2280 PORTCR(50, 0xe6051032), /* PORT50CR */
2281 PORTCR(51, 0xe6051033), /* PORT51CR */
2282 PORTCR(52, 0xe6051034), /* PORT52CR */
2283 PORTCR(53, 0xe6051035), /* PORT53CR */
2284 PORTCR(54, 0xe6051036), /* PORT54CR */
2285 PORTCR(55, 0xe6051037), /* PORT55CR */
2286 PORTCR(56, 0xe6051038), /* PORT56CR */
2287 PORTCR(57, 0xe6051039), /* PORT57CR */
2288 PORTCR(58, 0xe605103a), /* PORT58CR */
2289 PORTCR(59, 0xe605103b), /* PORT59CR */
2290
2291 PORTCR(60, 0xe605103c), /* PORT60CR */
2292 PORTCR(61, 0xe605103d), /* PORT61CR */
2293 PORTCR(62, 0xe605103e), /* PORT62CR */
2294 PORTCR(63, 0xe605103f), /* PORT63CR */
2295 PORTCR(64, 0xe6051040), /* PORT64CR */
2296 PORTCR(65, 0xe6051041), /* PORT65CR */
2297 PORTCR(66, 0xe6051042), /* PORT66CR */
2298 PORTCR(67, 0xe6051043), /* PORT67CR */
2299 PORTCR(68, 0xe6051044), /* PORT68CR */
2300 PORTCR(69, 0xe6051045), /* PORT69CR */
2301
2302 PORTCR(70, 0xe6051046), /* PORT70CR */
2303 PORTCR(71, 0xe6051047), /* PORT71CR */
2304 PORTCR(72, 0xe6051048), /* PORT72CR */
2305 PORTCR(73, 0xe6051049), /* PORT73CR */
2306 PORTCR(74, 0xe605104a), /* PORT74CR */
2307 PORTCR(75, 0xe605104b), /* PORT75CR */
2308 PORTCR(76, 0xe605104c), /* PORT76CR */
2309 PORTCR(77, 0xe605104d), /* PORT77CR */
2310 PORTCR(78, 0xe605104e), /* PORT78CR */
2311 PORTCR(79, 0xe605104f), /* PORT79CR */
2312
2313 PORTCR(80, 0xe6051050), /* PORT80CR */
2314 PORTCR(81, 0xe6051051), /* PORT81CR */
2315 PORTCR(82, 0xe6051052), /* PORT82CR */
2316 PORTCR(83, 0xe6051053), /* PORT83CR */
2317 PORTCR(84, 0xe6051054), /* PORT84CR */
2318 PORTCR(85, 0xe6051055), /* PORT85CR */
2319 PORTCR(86, 0xe6051056), /* PORT86CR */
2320 PORTCR(87, 0xe6051057), /* PORT87CR */
2321 PORTCR(88, 0xe6051058), /* PORT88CR */
2322 PORTCR(89, 0xe6051059), /* PORT89CR */
2323
2324 PORTCR(90, 0xe605105a), /* PORT90CR */
2325 PORTCR(91, 0xe605105b), /* PORT91CR */
2326 PORTCR(92, 0xe605105c), /* PORT92CR */
2327 PORTCR(93, 0xe605105d), /* PORT93CR */
2328 PORTCR(94, 0xe605105e), /* PORT94CR */
2329 PORTCR(95, 0xe605105f), /* PORT95CR */
2330 PORTCR(96, 0xe6052060), /* PORT96CR */
2331 PORTCR(97, 0xe6052061), /* PORT97CR */
2332 PORTCR(98, 0xe6052062), /* PORT98CR */
2333 PORTCR(99, 0xe6052063), /* PORT99CR */
2334
2335 PORTCR(100, 0xe6052064), /* PORT100CR */
2336 PORTCR(101, 0xe6052065), /* PORT101CR */
2337 PORTCR(102, 0xe6052066), /* PORT102CR */
2338 PORTCR(103, 0xe6052067), /* PORT103CR */
2339 PORTCR(104, 0xe6052068), /* PORT104CR */
2340 PORTCR(105, 0xe6052069), /* PORT105CR */
2341 PORTCR(106, 0xe605206a), /* PORT106CR */
2342 PORTCR(107, 0xe605206b), /* PORT107CR */
2343 PORTCR(108, 0xe605206c), /* PORT108CR */
2344 PORTCR(109, 0xe605206d), /* PORT109CR */
2345
2346 PORTCR(110, 0xe605206e), /* PORT110CR */
2347 PORTCR(111, 0xe605206f), /* PORT111CR */
2348 PORTCR(112, 0xe6052070), /* PORT112CR */
2349 PORTCR(113, 0xe6052071), /* PORT113CR */
2350 PORTCR(114, 0xe6052072), /* PORT114CR */
2351 PORTCR(115, 0xe6052073), /* PORT115CR */
2352 PORTCR(116, 0xe6052074), /* PORT116CR */
2353 PORTCR(117, 0xe6052075), /* PORT117CR */
2354 PORTCR(118, 0xe6052076), /* PORT118CR */
2355
2356 PORTCR(128, 0xe6052080), /* PORT128CR */
2357 PORTCR(129, 0xe6052081), /* PORT129CR */
2358
2359 PORTCR(130, 0xe6052082), /* PORT130CR */
2360 PORTCR(131, 0xe6052083), /* PORT131CR */
2361 PORTCR(132, 0xe6052084), /* PORT132CR */
2362 PORTCR(133, 0xe6052085), /* PORT133CR */
2363 PORTCR(134, 0xe6052086), /* PORT134CR */
2364 PORTCR(135, 0xe6052087), /* PORT135CR */
2365 PORTCR(136, 0xe6052088), /* PORT136CR */
2366 PORTCR(137, 0xe6052089), /* PORT137CR */
2367 PORTCR(138, 0xe605208a), /* PORT138CR */
2368 PORTCR(139, 0xe605208b), /* PORT139CR */
2369
2370 PORTCR(140, 0xe605208c), /* PORT140CR */
2371 PORTCR(141, 0xe605208d), /* PORT141CR */
2372 PORTCR(142, 0xe605208e), /* PORT142CR */
2373 PORTCR(143, 0xe605208f), /* PORT143CR */
2374 PORTCR(144, 0xe6052090), /* PORT144CR */
2375 PORTCR(145, 0xe6052091), /* PORT145CR */
2376 PORTCR(146, 0xe6052092), /* PORT146CR */
2377 PORTCR(147, 0xe6052093), /* PORT147CR */
2378 PORTCR(148, 0xe6052094), /* PORT148CR */
2379 PORTCR(149, 0xe6052095), /* PORT149CR */
2380
2381 PORTCR(150, 0xe6052096), /* PORT150CR */
2382 PORTCR(151, 0xe6052097), /* PORT151CR */
2383 PORTCR(152, 0xe6052098), /* PORT152CR */
2384 PORTCR(153, 0xe6052099), /* PORT153CR */
2385 PORTCR(154, 0xe605209a), /* PORT154CR */
2386 PORTCR(155, 0xe605209b), /* PORT155CR */
2387 PORTCR(156, 0xe605209c), /* PORT156CR */
2388 PORTCR(157, 0xe605209d), /* PORT157CR */
2389 PORTCR(158, 0xe605209e), /* PORT158CR */
2390 PORTCR(159, 0xe605209f), /* PORT159CR */
2391
2392 PORTCR(160, 0xe60520a0), /* PORT160CR */
2393 PORTCR(161, 0xe60520a1), /* PORT161CR */
2394 PORTCR(162, 0xe60520a2), /* PORT162CR */
2395 PORTCR(163, 0xe60520a3), /* PORT163CR */
2396 PORTCR(164, 0xe60520a4), /* PORT164CR */
2397
2398 PORTCR(192, 0xe60520c0), /* PORT192CR */
2399 PORTCR(193, 0xe60520c1), /* PORT193CR */
2400 PORTCR(194, 0xe60520c2), /* PORT194CR */
2401 PORTCR(195, 0xe60520c3), /* PORT195CR */
2402 PORTCR(196, 0xe60520c4), /* PORT196CR */
2403 PORTCR(197, 0xe60520c5), /* PORT197CR */
2404 PORTCR(198, 0xe60520c6), /* PORT198CR */
2405 PORTCR(199, 0xe60520c7), /* PORT199CR */
2406
2407 PORTCR(200, 0xe60520c8), /* PORT200CR */
2408 PORTCR(201, 0xe60520c9), /* PORT201CR */
2409 PORTCR(202, 0xe60520ca), /* PORT202CR */
2410 PORTCR(203, 0xe60520cb), /* PORT203CR */
2411 PORTCR(204, 0xe60520cc), /* PORT204CR */
2412 PORTCR(205, 0xe60520cd), /* PORT205CR */
2413 PORTCR(206, 0xe60520ce), /* PORT206CR */
2414 PORTCR(207, 0xe60520cf), /* PORT207CR */
2415 PORTCR(208, 0xe60520d0), /* PORT208CR */
2416 PORTCR(209, 0xe60520d1), /* PORT209CR */
2417
2418 PORTCR(210, 0xe60520d2), /* PORT210CR */
2419 PORTCR(211, 0xe60520d3), /* PORT211CR */
2420 PORTCR(212, 0xe60520d4), /* PORT212CR */
2421 PORTCR(213, 0xe60520d5), /* PORT213CR */
2422 PORTCR(214, 0xe60520d6), /* PORT214CR */
2423 PORTCR(215, 0xe60520d7), /* PORT215CR */
2424 PORTCR(216, 0xe60520d8), /* PORT216CR */
2425 PORTCR(217, 0xe60520d9), /* PORT217CR */
2426 PORTCR(218, 0xe60520da), /* PORT218CR */
2427 PORTCR(219, 0xe60520db), /* PORT219CR */
2428
2429 PORTCR(220, 0xe60520dc), /* PORT220CR */
2430 PORTCR(221, 0xe60520dd), /* PORT221CR */
2431 PORTCR(222, 0xe60520de), /* PORT222CR */
2432 PORTCR(223, 0xe60520df), /* PORT223CR */
2433 PORTCR(224, 0xe60530e0), /* PORT224CR */
2434 PORTCR(225, 0xe60530e1), /* PORT225CR */
2435 PORTCR(226, 0xe60530e2), /* PORT226CR */
2436 PORTCR(227, 0xe60530e3), /* PORT227CR */
2437 PORTCR(228, 0xe60530e4), /* PORT228CR */
2438 PORTCR(229, 0xe60530e5), /* PORT229CR */
2439
2440 PORTCR(230, 0xe60530e6), /* PORT230CR */
2441 PORTCR(231, 0xe60530e7), /* PORT231CR */
2442 PORTCR(232, 0xe60530e8), /* PORT232CR */
2443 PORTCR(233, 0xe60530e9), /* PORT233CR */
2444 PORTCR(234, 0xe60530ea), /* PORT234CR */
2445 PORTCR(235, 0xe60530eb), /* PORT235CR */
2446 PORTCR(236, 0xe60530ec), /* PORT236CR */
2447 PORTCR(237, 0xe60530ed), /* PORT237CR */
2448 PORTCR(238, 0xe60530ee), /* PORT238CR */
2449 PORTCR(239, 0xe60530ef), /* PORT239CR */
2450
2451 PORTCR(240, 0xe60530f0), /* PORT240CR */
2452 PORTCR(241, 0xe60530f1), /* PORT241CR */
2453 PORTCR(242, 0xe60530f2), /* PORT242CR */
2454 PORTCR(243, 0xe60530f3), /* PORT243CR */
2455 PORTCR(244, 0xe60530f4), /* PORT244CR */
2456 PORTCR(245, 0xe60530f5), /* PORT245CR */
2457 PORTCR(246, 0xe60530f6), /* PORT246CR */
2458 PORTCR(247, 0xe60530f7), /* PORT247CR */
2459 PORTCR(248, 0xe60530f8), /* PORT248CR */
2460 PORTCR(249, 0xe60530f9), /* PORT249CR */
2461
2462 PORTCR(250, 0xe60530fa), /* PORT250CR */
2463 PORTCR(251, 0xe60530fb), /* PORT251CR */
2464 PORTCR(252, 0xe60530fc), /* PORT252CR */
2465 PORTCR(253, 0xe60530fd), /* PORT253CR */
2466 PORTCR(254, 0xe60530fe), /* PORT254CR */
2467 PORTCR(255, 0xe60530ff), /* PORT255CR */
2468 PORTCR(256, 0xe6053100), /* PORT256CR */
2469 PORTCR(257, 0xe6053101), /* PORT257CR */
2470 PORTCR(258, 0xe6053102), /* PORT258CR */
2471 PORTCR(259, 0xe6053103), /* PORT259CR */
2472
2473 PORTCR(260, 0xe6053104), /* PORT260CR */
2474 PORTCR(261, 0xe6053105), /* PORT261CR */
2475 PORTCR(262, 0xe6053106), /* PORT262CR */
2476 PORTCR(263, 0xe6053107), /* PORT263CR */
2477 PORTCR(264, 0xe6053108), /* PORT264CR */
2478 PORTCR(265, 0xe6053109), /* PORT265CR */
2479 PORTCR(266, 0xe605310a), /* PORT266CR */
2480 PORTCR(267, 0xe605310b), /* PORT267CR */
2481 PORTCR(268, 0xe605310c), /* PORT268CR */
2482 PORTCR(269, 0xe605310d), /* PORT269CR */
2483
2484 PORTCR(270, 0xe605310e), /* PORT270CR */
2485 PORTCR(271, 0xe605310f), /* PORT271CR */
2486 PORTCR(272, 0xe6053110), /* PORT272CR */
2487 PORTCR(273, 0xe6053111), /* PORT273CR */
2488 PORTCR(274, 0xe6053112), /* PORT274CR */
2489 PORTCR(275, 0xe6053113), /* PORT275CR */
2490 PORTCR(276, 0xe6053114), /* PORT276CR */
2491 PORTCR(277, 0xe6053115), /* PORT277CR */
2492 PORTCR(278, 0xe6053116), /* PORT278CR */
2493 PORTCR(279, 0xe6053117), /* PORT279CR */
2494
2495 PORTCR(280, 0xe6053118), /* PORT280CR */
2496 PORTCR(281, 0xe6053119), /* PORT281CR */
2497 PORTCR(282, 0xe605311a), /* PORT282CR */
2498
2499 PORTCR(288, 0xe6052120), /* PORT288CR */
2500 PORTCR(289, 0xe6052121), /* PORT289CR */
2501
2502 PORTCR(290, 0xe6052122), /* PORT290CR */
2503 PORTCR(291, 0xe6052123), /* PORT291CR */
2504 PORTCR(292, 0xe6052124), /* PORT292CR */
2505 PORTCR(293, 0xe6052125), /* PORT293CR */
2506 PORTCR(294, 0xe6052126), /* PORT294CR */
2507 PORTCR(295, 0xe6052127), /* PORT295CR */
2508 PORTCR(296, 0xe6052128), /* PORT296CR */
2509 PORTCR(297, 0xe6052129), /* PORT297CR */
2510 PORTCR(298, 0xe605212a), /* PORT298CR */
2511 PORTCR(299, 0xe605212b), /* PORT299CR */
2512
2513 PORTCR(300, 0xe605212c), /* PORT300CR */
2514 PORTCR(301, 0xe605212d), /* PORT301CR */
2515 PORTCR(302, 0xe605212e), /* PORT302CR */
2516 PORTCR(303, 0xe605212f), /* PORT303CR */
2517 PORTCR(304, 0xe6052130), /* PORT304CR */
2518 PORTCR(305, 0xe6052131), /* PORT305CR */
2519 PORTCR(306, 0xe6052132), /* PORT306CR */
2520 PORTCR(307, 0xe6052133), /* PORT307CR */
2521 PORTCR(308, 0xe6052134), /* PORT308CR */
2522 PORTCR(309, 0xe6052135), /* PORT309CR */
2523
2524 { PINMUX_CFG_REG("MSEL2CR", 0xe605801c, 32, 1) {
2525 0, 0,
2526 0, 0,
2527 0, 0,
2528 0, 0,
2529 0, 0,
2530 0, 0,
2531 0, 0,
2532 0, 0,
2533 0, 0,
2534 0, 0,
2535 0, 0,
2536 0, 0,
2537 MSEL2CR_MSEL19_0, MSEL2CR_MSEL19_1,
2538 MSEL2CR_MSEL18_0, MSEL2CR_MSEL18_1,
2539 MSEL2CR_MSEL17_0, MSEL2CR_MSEL17_1,
2540 MSEL2CR_MSEL16_0, MSEL2CR_MSEL16_1,
2541 0, 0,
2542 MSEL2CR_MSEL14_0, MSEL2CR_MSEL14_1,
2543 MSEL2CR_MSEL13_0, MSEL2CR_MSEL13_1,
2544 MSEL2CR_MSEL12_0, MSEL2CR_MSEL12_1,
2545 MSEL2CR_MSEL11_0, MSEL2CR_MSEL11_1,
2546 MSEL2CR_MSEL10_0, MSEL2CR_MSEL10_1,
2547 MSEL2CR_MSEL9_0, MSEL2CR_MSEL9_1,
2548 MSEL2CR_MSEL8_0, MSEL2CR_MSEL8_1,
2549 MSEL2CR_MSEL7_0, MSEL2CR_MSEL7_1,
2550 MSEL2CR_MSEL6_0, MSEL2CR_MSEL6_1,
2551 MSEL2CR_MSEL5_0, MSEL2CR_MSEL5_1,
2552 MSEL2CR_MSEL4_0, MSEL2CR_MSEL4_1,
2553 MSEL2CR_MSEL3_0, MSEL2CR_MSEL3_1,
2554 MSEL2CR_MSEL2_0, MSEL2CR_MSEL2_1,
2555 MSEL2CR_MSEL1_0, MSEL2CR_MSEL1_1,
2556 MSEL2CR_MSEL0_0, MSEL2CR_MSEL0_1,
2557 }
2558 },
2559 { PINMUX_CFG_REG("MSEL3CR", 0xe6058020, 32, 1) {
2560 0, 0,
2561 0, 0,
2562 0, 0,
2563 MSEL3CR_MSEL28_0, MSEL3CR_MSEL28_1,
2564 0, 0,
2565 0, 0,
2566 0, 0,
2567 0, 0,
2568 0, 0,
2569 0, 0,
2570 0, 0,
2571 0, 0,
2572 0, 0,
2573 0, 0,
2574 0, 0,
2575 0, 0,
2576 MSEL3CR_MSEL15_0, MSEL3CR_MSEL15_1,
2577 0, 0,
2578 0, 0,
2579 0, 0,
2580 MSEL3CR_MSEL11_0, MSEL3CR_MSEL11_1,
2581 0, 0,
2582 MSEL3CR_MSEL9_0, MSEL3CR_MSEL9_1,
2583 0, 0,
2584 0, 0,
2585 MSEL3CR_MSEL6_0, MSEL3CR_MSEL6_1,
2586 0, 0,
2587 0, 0,
2588 0, 0,
2589 MSEL3CR_MSEL2_0, MSEL3CR_MSEL2_1,
2590 0, 0,
2591 0, 0,
2592 }
2593 },
2594 { PINMUX_CFG_REG("MSEL4CR", 0xe6058024, 32, 1) {
2595 0, 0,
2596 0, 0,
2597 MSEL4CR_MSEL29_0, MSEL4CR_MSEL29_1,
2598 0, 0,
2599 MSEL4CR_MSEL27_0, MSEL4CR_MSEL27_1,
2600 MSEL4CR_MSEL26_0, MSEL4CR_MSEL26_1,
2601 0, 0,
2602 0, 0,
2603 0, 0,
2604 MSEL4CR_MSEL22_0, MSEL4CR_MSEL22_1,
2605 MSEL4CR_MSEL21_0, MSEL4CR_MSEL21_1,
2606 MSEL4CR_MSEL20_0, MSEL4CR_MSEL20_1,
2607 MSEL4CR_MSEL19_0, MSEL4CR_MSEL19_1,
2608 0, 0,
2609 0, 0,
2610 0, 0,
2611 MSEL4CR_MSEL15_0, MSEL4CR_MSEL15_1,
2612 0, 0,
2613 MSEL4CR_MSEL13_0, MSEL4CR_MSEL13_1,
2614 MSEL4CR_MSEL12_0, MSEL4CR_MSEL12_1,
2615 MSEL4CR_MSEL11_0, MSEL4CR_MSEL11_1,
2616 MSEL4CR_MSEL10_0, MSEL4CR_MSEL10_1,
2617 MSEL4CR_MSEL9_0, MSEL4CR_MSEL9_1,
2618 MSEL4CR_MSEL8_0, MSEL4CR_MSEL8_1,
2619 MSEL4CR_MSEL7_0, MSEL4CR_MSEL7_1,
2620 0, 0,
2621 0, 0,
2622 MSEL4CR_MSEL4_0, MSEL4CR_MSEL4_1,
2623 0, 0,
2624 0, 0,
2625 MSEL4CR_MSEL1_0, MSEL4CR_MSEL1_1,
2626 0, 0,
2627 }
2628 },
2629 { },
2630};
2631
2632static struct pinmux_data_reg pinmux_data_regs[] = {
2633 { PINMUX_DATA_REG("PORTL031_000DR", 0xe6054000, 32) {
2634 PORT31_DATA, PORT30_DATA, PORT29_DATA, PORT28_DATA,
2635 PORT27_DATA, PORT26_DATA, PORT25_DATA, PORT24_DATA,
2636 PORT23_DATA, PORT22_DATA, PORT21_DATA, PORT20_DATA,
2637 PORT19_DATA, PORT18_DATA, PORT17_DATA, PORT16_DATA,
2638 PORT15_DATA, PORT14_DATA, PORT13_DATA, PORT12_DATA,
2639 PORT11_DATA, PORT10_DATA, PORT9_DATA, PORT8_DATA,
2640 PORT7_DATA, PORT6_DATA, PORT5_DATA, PORT4_DATA,
2641 PORT3_DATA, PORT2_DATA, PORT1_DATA, PORT0_DATA }
2642 },
2643 { PINMUX_DATA_REG("PORTD063_032DR", 0xe6055000, 32) {
2644 PORT63_DATA, PORT62_DATA, PORT61_DATA, PORT60_DATA,
2645 PORT59_DATA, PORT58_DATA, PORT57_DATA, PORT56_DATA,
2646 PORT55_DATA, PORT54_DATA, PORT53_DATA, PORT52_DATA,
2647 PORT51_DATA, PORT50_DATA, PORT49_DATA, PORT48_DATA,
2648 PORT47_DATA, PORT46_DATA, PORT45_DATA, PORT44_DATA,
2649 PORT43_DATA, PORT42_DATA, PORT41_DATA, PORT40_DATA,
2650 PORT39_DATA, PORT38_DATA, PORT37_DATA, PORT36_DATA,
2651 PORT35_DATA, PORT34_DATA, PORT33_DATA, PORT32_DATA }
2652 },
2653 { PINMUX_DATA_REG("PORTD095_064DR", 0xe6055004, 32) {
2654 PORT95_DATA, PORT94_DATA, PORT93_DATA, PORT92_DATA,
2655 PORT91_DATA, PORT90_DATA, PORT89_DATA, PORT88_DATA,
2656 PORT87_DATA, PORT86_DATA, PORT85_DATA, PORT84_DATA,
2657 PORT83_DATA, PORT82_DATA, PORT81_DATA, PORT80_DATA,
2658 PORT79_DATA, PORT78_DATA, PORT77_DATA, PORT76_DATA,
2659 PORT75_DATA, PORT74_DATA, PORT73_DATA, PORT72_DATA,
2660 PORT71_DATA, PORT70_DATA, PORT69_DATA, PORT68_DATA,
2661 PORT67_DATA, PORT66_DATA, PORT65_DATA, PORT64_DATA }
2662 },
2663 { PINMUX_DATA_REG("PORTR127_096DR", 0xe6056000, 32) {
2664 0, 0, 0, 0,
2665 0, 0, 0, 0,
2666 0, PORT118_DATA, PORT117_DATA, PORT116_DATA,
2667 PORT115_DATA, PORT114_DATA, PORT113_DATA, PORT112_DATA,
2668 PORT111_DATA, PORT110_DATA, PORT109_DATA, PORT108_DATA,
2669 PORT107_DATA, PORT106_DATA, PORT105_DATA, PORT104_DATA,
2670 PORT103_DATA, PORT102_DATA, PORT101_DATA, PORT100_DATA,
2671 PORT99_DATA, PORT98_DATA, PORT97_DATA, PORT96_DATA }
2672 },
2673 { PINMUX_DATA_REG("PORTR159_128DR", 0xe6056004, 32) {
2674 PORT159_DATA, PORT158_DATA, PORT157_DATA, PORT156_DATA,
2675 PORT155_DATA, PORT154_DATA, PORT153_DATA, PORT152_DATA,
2676 PORT151_DATA, PORT150_DATA, PORT149_DATA, PORT148_DATA,
2677 PORT147_DATA, PORT146_DATA, PORT145_DATA, PORT144_DATA,
2678 PORT143_DATA, PORT142_DATA, PORT141_DATA, PORT140_DATA,
2679 PORT139_DATA, PORT138_DATA, PORT137_DATA, PORT136_DATA,
2680 PORT135_DATA, PORT134_DATA, PORT133_DATA, PORT132_DATA,
2681 PORT131_DATA, PORT130_DATA, PORT129_DATA, PORT128_DATA }
2682 },
2683 { PINMUX_DATA_REG("PORTR191_160DR", 0xe6056008, 32) {
2684 0, 0, 0, 0,
2685 0, 0, 0, 0,
2686 0, 0, 0, 0,
2687 0, 0, 0, 0,
2688 0, 0, 0, 0,
2689 0, 0, 0, 0,
2690 0, 0, 0, PORT164_DATA,
2691 PORT163_DATA, PORT162_DATA, PORT161_DATA, PORT160_DATA }
2692 },
2693 { PINMUX_DATA_REG("PORTR223_192DR", 0xe605600C, 32) {
2694 PORT223_DATA, PORT222_DATA, PORT221_DATA, PORT220_DATA,
2695 PORT219_DATA, PORT218_DATA, PORT217_DATA, PORT216_DATA,
2696 PORT215_DATA, PORT214_DATA, PORT213_DATA, PORT212_DATA,
2697 PORT211_DATA, PORT210_DATA, PORT209_DATA, PORT208_DATA,
2698 PORT207_DATA, PORT206_DATA, PORT205_DATA, PORT204_DATA,
2699 PORT203_DATA, PORT202_DATA, PORT201_DATA, PORT200_DATA,
2700 PORT199_DATA, PORT198_DATA, PORT197_DATA, PORT196_DATA,
2701 PORT195_DATA, PORT194_DATA, PORT193_DATA, PORT192_DATA }
2702 },
2703 { PINMUX_DATA_REG("PORTU255_224DR", 0xe6057000, 32) {
2704 PORT255_DATA, PORT254_DATA, PORT253_DATA, PORT252_DATA,
2705 PORT251_DATA, PORT250_DATA, PORT249_DATA, PORT248_DATA,
2706 PORT247_DATA, PORT246_DATA, PORT245_DATA, PORT244_DATA,
2707 PORT243_DATA, PORT242_DATA, PORT241_DATA, PORT240_DATA,
2708 PORT239_DATA, PORT238_DATA, PORT237_DATA, PORT236_DATA,
2709 PORT235_DATA, PORT234_DATA, PORT233_DATA, PORT232_DATA,
2710 PORT231_DATA, PORT230_DATA, PORT229_DATA, PORT228_DATA,
2711 PORT227_DATA, PORT226_DATA, PORT225_DATA, PORT224_DATA }
2712 },
2713 { PINMUX_DATA_REG("PORTU287_256DR", 0xe6057004, 32) {
2714 0, 0, 0, 0,
2715 0, PORT282_DATA, PORT281_DATA, PORT280_DATA,
2716 PORT279_DATA, PORT278_DATA, PORT277_DATA, PORT276_DATA,
2717 PORT275_DATA, PORT274_DATA, PORT273_DATA, PORT272_DATA,
2718 PORT271_DATA, PORT270_DATA, PORT269_DATA, PORT268_DATA,
2719 PORT267_DATA, PORT266_DATA, PORT265_DATA, PORT264_DATA,
2720 PORT263_DATA, PORT262_DATA, PORT261_DATA, PORT260_DATA,
2721 PORT259_DATA, PORT258_DATA, PORT257_DATA, PORT256_DATA }
2722 },
2723 { PINMUX_DATA_REG("PORTR319_288DR", 0xe6056010, 32) {
2724 0, 0, 0, 0,
2725 0, 0, 0, 0,
2726 0, 0, PORT309_DATA, PORT308_DATA,
2727 PORT307_DATA, PORT306_DATA, PORT305_DATA, PORT304_DATA,
2728 PORT303_DATA, PORT302_DATA, PORT301_DATA, PORT300_DATA,
2729 PORT299_DATA, PORT298_DATA, PORT297_DATA, PORT296_DATA,
2730 PORT295_DATA, PORT294_DATA, PORT293_DATA, PORT292_DATA,
2731 PORT291_DATA, PORT290_DATA, PORT289_DATA, PORT288_DATA }
2732 },
2733 { },
2734};
2735
2736/* IRQ pins through INTCS with IRQ0->15 from 0x200 and IRQ16-31 from 0x3200 */
2737#define EXT_IRQ16L(n) intcs_evt2irq(0x200 + ((n) << 5))
2738#define EXT_IRQ16H(n) intcs_evt2irq(0x3200 + ((n - 16) << 5))
2739
2740static struct pinmux_irq pinmux_irqs[] = {
2741 PINMUX_IRQ(EXT_IRQ16H(19), PORT9_FN0),
2742 PINMUX_IRQ(EXT_IRQ16L(1), PORT10_FN0),
2743 PINMUX_IRQ(EXT_IRQ16L(0), PORT11_FN0),
2744 PINMUX_IRQ(EXT_IRQ16H(18), PORT13_FN0),
2745 PINMUX_IRQ(EXT_IRQ16H(20), PORT14_FN0),
2746 PINMUX_IRQ(EXT_IRQ16H(21), PORT15_FN0),
2747 PINMUX_IRQ(EXT_IRQ16H(31), PORT26_FN0),
2748 PINMUX_IRQ(EXT_IRQ16H(30), PORT27_FN0),
2749 PINMUX_IRQ(EXT_IRQ16H(29), PORT28_FN0),
2750 PINMUX_IRQ(EXT_IRQ16H(22), PORT40_FN0),
2751 PINMUX_IRQ(EXT_IRQ16H(23), PORT53_FN0),
2752 PINMUX_IRQ(EXT_IRQ16L(10), PORT54_FN0),
2753 PINMUX_IRQ(EXT_IRQ16L(9), PORT56_FN0),
2754 PINMUX_IRQ(EXT_IRQ16H(26), PORT115_FN0),
2755 PINMUX_IRQ(EXT_IRQ16H(27), PORT116_FN0),
2756 PINMUX_IRQ(EXT_IRQ16H(28), PORT117_FN0),
2757 PINMUX_IRQ(EXT_IRQ16H(24), PORT118_FN0),
2758 PINMUX_IRQ(EXT_IRQ16L(6), PORT147_FN0),
2759 PINMUX_IRQ(EXT_IRQ16L(2), PORT149_FN0),
2760 PINMUX_IRQ(EXT_IRQ16L(7), PORT150_FN0),
2761 PINMUX_IRQ(EXT_IRQ16L(12), PORT156_FN0),
2762 PINMUX_IRQ(EXT_IRQ16L(4), PORT159_FN0),
2763 PINMUX_IRQ(EXT_IRQ16H(25), PORT164_FN0),
2764 PINMUX_IRQ(EXT_IRQ16L(8), PORT223_FN0),
2765 PINMUX_IRQ(EXT_IRQ16L(3), PORT224_FN0),
2766 PINMUX_IRQ(EXT_IRQ16L(5), PORT227_FN0),
2767 PINMUX_IRQ(EXT_IRQ16H(17), PORT234_FN0),
2768 PINMUX_IRQ(EXT_IRQ16L(11), PORT238_FN0),
2769 PINMUX_IRQ(EXT_IRQ16L(13), PORT239_FN0),
2770 PINMUX_IRQ(EXT_IRQ16H(16), PORT249_FN0),
2771 PINMUX_IRQ(EXT_IRQ16L(14), PORT251_FN0),
2772 PINMUX_IRQ(EXT_IRQ16L(9), PORT308_FN0),
2773};
2774
2775struct sh_pfc_soc_info sh73a0_pinmux_info = {
2776 .name = "sh73a0_pfc",
2777 .reserved_id = PINMUX_RESERVED,
2778 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
2779 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
2780 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
2781 .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
2782 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
2783 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
2784 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
2785
2786 .first_gpio = GPIO_PORT0,
2787 .last_gpio = GPIO_FN_FSIAISLD_PU,
2788
2789 .gpios = pinmux_gpios,
2790 .cfg_regs = pinmux_config_regs,
2791 .data_regs = pinmux_data_regs,
2792
2793 .gpio_data = pinmux_data,
2794 .gpio_data_size = ARRAY_SIZE(pinmux_data),
2795
2796 .gpio_irq = pinmux_irqs,
2797 .gpio_irq_size = ARRAY_SIZE(pinmux_irqs),
2798};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7720.c b/drivers/pinctrl/sh-pfc/pfc-sh7720.c
new file mode 100644
index 000000000000..10872ed688a6
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7720.c
@@ -0,0 +1,1236 @@
1/*
2 * SH7720 Pinmux
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/kernel.h>
12#include <linux/gpio.h>
13#include <cpu/sh7720.h>
14
15#include "sh_pfc.h"
16
17enum {
18 PINMUX_RESERVED = 0,
19
20 PINMUX_DATA_BEGIN,
21 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
22 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA,
23 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
24 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA,
25 PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
26 PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA,
27 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
28 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA,
29 PTE6_DATA, PTE5_DATA, PTE4_DATA,
30 PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA,
31 PTF6_DATA, PTF5_DATA, PTF4_DATA,
32 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA,
33 PTG6_DATA, PTG5_DATA, PTG4_DATA,
34 PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA,
35 PTH6_DATA, PTH5_DATA, PTH4_DATA,
36 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
37 PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
38 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA,
39 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
40 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA, PTL3_DATA,
41 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
42 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
43 PTP4_DATA, PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA,
44 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
45 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
46 PTS4_DATA, PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
47 PTT4_DATA, PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
48 PTU4_DATA, PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
49 PTV4_DATA, PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA,
50 PINMUX_DATA_END,
51
52 PINMUX_INPUT_BEGIN,
53 PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN,
54 PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN,
55 PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN,
56 PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN,
57 PTC7_IN, PTC6_IN, PTC5_IN, PTC4_IN,
58 PTC3_IN, PTC2_IN, PTC1_IN, PTC0_IN,
59 PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN,
60 PTD3_IN, PTD2_IN, PTD1_IN, PTD0_IN,
61 PTE6_IN, PTE5_IN, PTE4_IN,
62 PTE3_IN, PTE2_IN, PTE1_IN, PTE0_IN,
63 PTF6_IN, PTF5_IN, PTF4_IN,
64 PTF3_IN, PTF2_IN, PTF1_IN, PTF0_IN,
65 PTG6_IN, PTG5_IN, PTG4_IN,
66 PTG3_IN, PTG2_IN, PTG1_IN, PTG0_IN,
67 PTH6_IN, PTH5_IN, PTH4_IN,
68 PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN,
69 PTJ6_IN, PTJ5_IN, PTJ4_IN,
70 PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN,
71 PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN,
72 PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN, PTL3_IN,
73 PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN,
74 PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
75 PTP4_IN, PTP3_IN, PTP2_IN, PTP1_IN, PTP0_IN,
76 PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN,
77 PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN,
78 PTS4_IN, PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN,
79 PTT4_IN, PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN,
80 PTU4_IN, PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
81 PTV4_IN, PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
82 PINMUX_INPUT_END,
83
84 PINMUX_INPUT_PULLUP_BEGIN,
85 PTA7_IN_PU, PTA6_IN_PU, PTA5_IN_PU, PTA4_IN_PU,
86 PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
87 PTB7_IN_PU, PTB6_IN_PU, PTB5_IN_PU, PTB4_IN_PU,
88 PTB3_IN_PU, PTB2_IN_PU, PTB1_IN_PU, PTB0_IN_PU,
89 PTC7_IN_PU, PTC6_IN_PU, PTC5_IN_PU, PTC4_IN_PU,
90 PTC3_IN_PU, PTC2_IN_PU, PTC1_IN_PU, PTC0_IN_PU,
91 PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
92 PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU, PTD0_IN_PU,
93 PTE4_IN_PU, PTE3_IN_PU, PTE2_IN_PU, PTE1_IN_PU, PTE0_IN_PU,
94 PTF0_IN_PU,
95 PTG6_IN_PU, PTG5_IN_PU, PTG4_IN_PU,
96 PTG3_IN_PU, PTG2_IN_PU, PTG1_IN_PU, PTG0_IN_PU,
97 PTH6_IN_PU, PTH5_IN_PU, PTH4_IN_PU,
98 PTH3_IN_PU, PTH2_IN_PU, PTH1_IN_PU, PTH0_IN_PU,
99 PTJ6_IN_PU, PTJ5_IN_PU, PTJ4_IN_PU,
100 PTJ3_IN_PU, PTJ2_IN_PU, PTJ1_IN_PU, PTJ0_IN_PU,
101 PTK3_IN_PU, PTK2_IN_PU, PTK1_IN_PU, PTK0_IN_PU,
102 PTL7_IN_PU, PTL6_IN_PU, PTL5_IN_PU, PTL4_IN_PU, PTL3_IN_PU,
103 PTM7_IN_PU, PTM6_IN_PU, PTM5_IN_PU, PTM4_IN_PU,
104 PTM3_IN_PU, PTM2_IN_PU, PTM1_IN_PU, PTM0_IN_PU,
105 PTP4_IN_PU, PTP3_IN_PU, PTP2_IN_PU, PTP1_IN_PU, PTP0_IN_PU,
106 PTR7_IN_PU, PTR6_IN_PU, PTR5_IN_PU, PTR4_IN_PU,
107 PTR3_IN_PU, PTR2_IN_PU, PTR1_IN_PU, PTR0_IN_PU,
108 PTS4_IN_PU, PTS3_IN_PU, PTS2_IN_PU, PTS1_IN_PU, PTS0_IN_PU,
109 PTT4_IN_PU, PTT3_IN_PU, PTT2_IN_PU, PTT1_IN_PU, PTT0_IN_PU,
110 PTU4_IN_PU, PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU,
111 PTV4_IN_PU, PTV3_IN_PU, PTV2_IN_PU, PTV1_IN_PU, PTV0_IN_PU,
112 PINMUX_INPUT_PULLUP_END,
113
114 PINMUX_OUTPUT_BEGIN,
115 PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
116 PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
117 PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
118 PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT,
119 PTC7_OUT, PTC6_OUT, PTC5_OUT, PTC4_OUT,
120 PTC3_OUT, PTC2_OUT, PTC1_OUT, PTC0_OUT,
121 PTD7_OUT, PTD6_OUT, PTD5_OUT, PTD4_OUT,
122 PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT,
123 PTE4_OUT, PTE3_OUT, PTE2_OUT, PTE1_OUT, PTE0_OUT,
124 PTF0_OUT,
125 PTG6_OUT, PTG5_OUT, PTG4_OUT,
126 PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT,
127 PTH6_OUT, PTH5_OUT, PTH4_OUT,
128 PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
129 PTJ6_OUT, PTJ5_OUT, PTJ4_OUT,
130 PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT,
131 PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT,
132 PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT, PTL3_OUT,
133 PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT,
134 PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
135 PTP4_OUT, PTP3_OUT, PTP2_OUT, PTP1_OUT, PTP0_OUT,
136 PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT,
137 PTR3_OUT, PTR2_OUT, PTR1_OUT, PTR0_OUT,
138 PTS4_OUT, PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT,
139 PTT4_OUT, PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT,
140 PTU4_OUT, PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT,
141 PTV4_OUT, PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT,
142 PINMUX_OUTPUT_END,
143
144 PINMUX_FUNCTION_BEGIN,
145 PTA7_FN, PTA6_FN, PTA5_FN, PTA4_FN,
146 PTA3_FN, PTA2_FN, PTA1_FN, PTA0_FN,
147 PTB7_FN, PTB6_FN, PTB5_FN, PTB4_FN,
148 PTB3_FN, PTB2_FN, PTB1_FN, PTB0_FN,
149 PTC7_FN, PTC6_FN, PTC5_FN, PTC4_FN,
150 PTC3_FN, PTC2_FN, PTC1_FN, PTC0_FN,
151 PTD7_FN, PTD6_FN, PTD5_FN, PTD4_FN,
152 PTD3_FN, PTD2_FN, PTD1_FN, PTD0_FN,
153 PTE6_FN, PTE5_FN, PTE4_FN,
154 PTE3_FN, PTE2_FN, PTE1_FN, PTE0_FN,
155 PTF6_FN, PTF5_FN, PTF4_FN,
156 PTF3_FN, PTF2_FN, PTF1_FN, PTF0_FN,
157 PTG6_FN, PTG5_FN, PTG4_FN,
158 PTG3_FN, PTG2_FN, PTG1_FN, PTG0_FN,
159 PTH6_FN, PTH5_FN, PTH4_FN,
160 PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN,
161 PTJ6_FN, PTJ5_FN, PTJ4_FN,
162 PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN,
163 PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN,
164 PTL7_FN, PTL6_FN, PTL5_FN, PTL4_FN, PTL3_FN,
165 PTM7_FN, PTM6_FN, PTM5_FN, PTM4_FN,
166 PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN,
167 PTP4_FN, PTP3_FN, PTP2_FN, PTP1_FN, PTP0_FN,
168 PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN,
169 PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN,
170 PTS4_FN, PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN,
171 PTT4_FN, PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN,
172 PTU4_FN, PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN,
173 PTV4_FN, PTV3_FN, PTV2_FN, PTV1_FN, PTV0_FN,
174
175 PSELA_1_0_00, PSELA_1_0_01, PSELA_1_0_10,
176 PSELA_3_2_00, PSELA_3_2_01, PSELA_3_2_10, PSELA_3_2_11,
177 PSELA_5_4_00, PSELA_5_4_01, PSELA_5_4_10, PSELA_5_4_11,
178 PSELA_7_6_00, PSELA_7_6_01, PSELA_7_6_10,
179 PSELA_9_8_00, PSELA_9_8_01, PSELA_9_8_10,
180 PSELA_11_10_00, PSELA_11_10_01, PSELA_11_10_10,
181 PSELA_13_12_00, PSELA_13_12_10,
182 PSELA_15_14_00, PSELA_15_14_10,
183 PSELB_9_8_00, PSELB_9_8_11,
184 PSELB_11_10_00, PSELB_11_10_01, PSELB_11_10_10, PSELB_11_10_11,
185 PSELB_13_12_00, PSELB_13_12_01, PSELB_13_12_10, PSELB_13_12_11,
186 PSELB_15_14_00, PSELB_15_14_11,
187 PSELC_9_8_00, PSELC_9_8_10,
188 PSELC_11_10_00, PSELC_11_10_10,
189 PSELC_13_12_00, PSELC_13_12_01, PSELC_13_12_10,
190 PSELC_15_14_00, PSELC_15_14_01, PSELC_15_14_10,
191 PSELD_1_0_00, PSELD_1_0_10,
192 PSELD_11_10_00, PSELD_11_10_01,
193 PSELD_15_14_00, PSELD_15_14_01, PSELD_15_14_10,
194 PINMUX_FUNCTION_END,
195
196 PINMUX_MARK_BEGIN,
197 D31_MARK, D30_MARK, D29_MARK, D28_MARK,
198 D27_MARK, D26_MARK, D25_MARK, D24_MARK,
199 D23_MARK, D22_MARK, D21_MARK, D20_MARK,
200 D19_MARK, D18_MARK, D17_MARK, D16_MARK,
201 IOIS16_MARK, RAS_MARK, CAS_MARK, CKE_MARK,
202 CS5B_CE1A_MARK, CS6B_CE1B_MARK,
203 A25_MARK, A24_MARK, A23_MARK, A22_MARK,
204 A21_MARK, A20_MARK, A19_MARK, A0_MARK,
205 REFOUT_MARK, IRQOUT_MARK,
206 LCD_DATA15_MARK, LCD_DATA14_MARK,
207 LCD_DATA13_MARK, LCD_DATA12_MARK,
208 LCD_DATA11_MARK, LCD_DATA10_MARK,
209 LCD_DATA9_MARK, LCD_DATA8_MARK,
210 LCD_DATA7_MARK, LCD_DATA6_MARK,
211 LCD_DATA5_MARK, LCD_DATA4_MARK,
212 LCD_DATA3_MARK, LCD_DATA2_MARK,
213 LCD_DATA1_MARK, LCD_DATA0_MARK,
214 LCD_M_DISP_MARK,
215 LCD_CL1_MARK, LCD_CL2_MARK,
216 LCD_DON_MARK, LCD_FLM_MARK,
217 LCD_VEPWC_MARK, LCD_VCPWC_MARK,
218 AFE_RXIN_MARK, AFE_RDET_MARK,
219 AFE_FS_MARK, AFE_TXOUT_MARK,
220 AFE_SCLK_MARK, AFE_RLYCNT_MARK,
221 AFE_HC1_MARK,
222 IIC_SCL_MARK, IIC_SDA_MARK,
223 DA1_MARK, DA0_MARK,
224 AN3_MARK, AN2_MARK, AN1_MARK, AN0_MARK, ADTRG_MARK,
225 USB1D_RCV_MARK, USB1D_TXSE0_MARK,
226 USB1D_TXDPLS_MARK, USB1D_DMNS_MARK,
227 USB1D_DPLS_MARK, USB1D_SPEED_MARK,
228 USB1D_TXENL_MARK,
229 USB2_PWR_EN_MARK, USB1_PWR_EN_USBF_UPLUP_MARK, USB1D_SUSPEND_MARK,
230 IRQ5_MARK, IRQ4_MARK,
231 IRQ3_IRL3_MARK, IRQ2_IRL2_MARK,
232 IRQ1_IRL1_MARK, IRQ0_IRL0_MARK,
233 PCC_REG_MARK, PCC_DRV_MARK,
234 PCC_BVD2_MARK, PCC_BVD1_MARK,
235 PCC_CD2_MARK, PCC_CD1_MARK,
236 PCC_RESET_MARK, PCC_RDY_MARK,
237 PCC_VS2_MARK, PCC_VS1_MARK,
238 AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK,
239 AUDCK_MARK, AUDSYNC_MARK, ASEBRKAK_MARK, TRST_MARK,
240 TMS_MARK, TDO_MARK, TDI_MARK, TCK_MARK,
241 DACK1_MARK, DREQ1_MARK, DACK0_MARK, DREQ0_MARK,
242 TEND1_MARK, TEND0_MARK,
243 SIOF0_SYNC_MARK, SIOF0_MCLK_MARK,
244 SIOF0_TXD_MARK, SIOF0_RXD_MARK,
245 SIOF0_SCK_MARK,
246 SIOF1_SYNC_MARK, SIOF1_MCLK_MARK,
247 SIOF1_TXD_MARK, SIOF1_RXD_MARK,
248 SIOF1_SCK_MARK,
249 SCIF0_TXD_MARK, SCIF0_RXD_MARK,
250 SCIF0_RTS_MARK, SCIF0_CTS_MARK, SCIF0_SCK_MARK,
251 SCIF1_TXD_MARK, SCIF1_RXD_MARK,
252 SCIF1_RTS_MARK, SCIF1_CTS_MARK, SCIF1_SCK_MARK,
253 TPU_TO1_MARK, TPU_TO0_MARK,
254 TPU_TI3B_MARK, TPU_TI3A_MARK,
255 TPU_TI2B_MARK, TPU_TI2A_MARK,
256 TPU_TO3_MARK, TPU_TO2_MARK,
257 SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK,
258 MMC_DAT_MARK, MMC_CMD_MARK,
259 MMC_CLK_MARK, MMC_VDDON_MARK,
260 MMC_ODMOD_MARK,
261 STATUS0_MARK, STATUS1_MARK,
262 PINMUX_MARK_END,
263};
264
265static pinmux_enum_t pinmux_data[] = {
266 /* PTA GPIO */
267 PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU),
268 PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU),
269 PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT, PTA5_IN_PU),
270 PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT, PTA4_IN_PU),
271 PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT, PTA3_IN_PU),
272 PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT, PTA2_IN_PU),
273 PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT, PTA1_IN_PU),
274 PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT, PTA0_IN_PU),
275
276 /* PTB GPIO */
277 PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT, PTB7_IN_PU),
278 PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT, PTB6_IN_PU),
279 PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT, PTB5_IN_PU),
280 PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT, PTB4_IN_PU),
281 PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT, PTB3_IN_PU),
282 PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT, PTB2_IN_PU),
283 PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT, PTB1_IN_PU),
284 PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT, PTB0_IN_PU),
285
286 /* PTC GPIO */
287 PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT, PTC7_IN_PU),
288 PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT, PTC6_IN_PU),
289 PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT, PTC5_IN_PU),
290 PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT, PTC4_IN_PU),
291 PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT, PTC3_IN_PU),
292 PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT, PTC2_IN_PU),
293 PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT, PTC1_IN_PU),
294 PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT, PTC0_IN_PU),
295
296 /* PTD GPIO */
297 PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT, PTD7_IN_PU),
298 PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT, PTD6_IN_PU),
299 PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT, PTD5_IN_PU),
300 PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT, PTD4_IN_PU),
301 PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT, PTD3_IN_PU),
302 PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT, PTD2_IN_PU),
303 PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT, PTD1_IN_PU),
304 PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT, PTD0_IN_PU),
305
306 /* PTE GPIO */
307 PINMUX_DATA(PTE6_DATA, PTE6_IN),
308 PINMUX_DATA(PTE5_DATA, PTE5_IN),
309 PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT, PTE4_IN_PU),
310 PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT, PTE3_IN_PU),
311 PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT, PTE2_IN_PU),
312 PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT, PTE1_IN_PU),
313 PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT, PTE0_IN_PU),
314
315 /* PTF GPIO */
316 PINMUX_DATA(PTF6_DATA, PTF6_IN),
317 PINMUX_DATA(PTF5_DATA, PTF5_IN),
318 PINMUX_DATA(PTF4_DATA, PTF4_IN),
319 PINMUX_DATA(PTF3_DATA, PTF3_IN),
320 PINMUX_DATA(PTF2_DATA, PTF2_IN),
321 PINMUX_DATA(PTF1_DATA, PTF1_IN),
322 PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT, PTF0_IN_PU),
323
324 /* PTG GPIO */
325 PINMUX_DATA(PTG6_DATA, PTG6_IN, PTG6_OUT, PTG6_IN_PU),
326 PINMUX_DATA(PTG5_DATA, PTG5_IN, PTG5_OUT, PTG5_IN_PU),
327 PINMUX_DATA(PTG4_DATA, PTG4_IN, PTG4_OUT, PTG4_IN_PU),
328 PINMUX_DATA(PTG3_DATA, PTG3_IN, PTG3_OUT, PTG3_IN_PU),
329 PINMUX_DATA(PTG2_DATA, PTG2_IN, PTG2_OUT, PTG2_IN_PU),
330 PINMUX_DATA(PTG1_DATA, PTG1_IN, PTG1_OUT, PTG1_IN_PU),
331 PINMUX_DATA(PTG0_DATA, PTG0_IN, PTG0_OUT, PTG0_IN_PU),
332
333 /* PTH GPIO */
334 PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT, PTH6_IN_PU),
335 PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT, PTH5_IN_PU),
336 PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT, PTH4_IN_PU),
337 PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT, PTH3_IN_PU),
338 PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT, PTH2_IN_PU),
339 PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT, PTH1_IN_PU),
340 PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT, PTH0_IN_PU),
341
342 /* PTJ GPIO */
343 PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT, PTJ6_IN_PU),
344 PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT, PTJ5_IN_PU),
345 PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT, PTJ4_IN_PU),
346 PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT, PTJ3_IN_PU),
347 PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT, PTJ2_IN_PU),
348 PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT, PTJ1_IN_PU),
349 PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT, PTJ0_IN_PU),
350
351 /* PTK GPIO */
352 PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT, PTK3_IN_PU),
353 PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT, PTK2_IN_PU),
354 PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT, PTK1_IN_PU),
355 PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT, PTK0_IN_PU),
356
357 /* PTL GPIO */
358 PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT, PTL7_IN_PU),
359 PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT, PTL6_IN_PU),
360 PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT, PTL5_IN_PU),
361 PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT, PTL4_IN_PU),
362 PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT, PTL3_IN_PU),
363
364 /* PTM GPIO */
365 PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT, PTM7_IN_PU),
366 PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT, PTM6_IN_PU),
367 PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT, PTM5_IN_PU),
368 PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT, PTM4_IN_PU),
369 PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT, PTM3_IN_PU),
370 PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT, PTM2_IN_PU),
371 PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT, PTM1_IN_PU),
372 PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT, PTM0_IN_PU),
373
374 /* PTP GPIO */
375 PINMUX_DATA(PTP4_DATA, PTP4_IN, PTP4_OUT, PTP4_IN_PU),
376 PINMUX_DATA(PTP3_DATA, PTP3_IN, PTP3_OUT, PTP3_IN_PU),
377 PINMUX_DATA(PTP2_DATA, PTP2_IN, PTP2_OUT, PTP2_IN_PU),
378 PINMUX_DATA(PTP1_DATA, PTP1_IN, PTP1_OUT, PTP1_IN_PU),
379 PINMUX_DATA(PTP0_DATA, PTP0_IN, PTP0_OUT, PTP0_IN_PU),
380
381 /* PTR GPIO */
382 PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT, PTR7_IN_PU),
383 PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT, PTR6_IN_PU),
384 PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT, PTR5_IN_PU),
385 PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT, PTR4_IN_PU),
386 PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_OUT, PTR3_IN_PU),
387 PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_OUT, PTR2_IN_PU),
388 PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT, PTR1_IN_PU),
389 PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT, PTR0_IN_PU),
390
391 /* PTS GPIO */
392 PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT, PTS4_IN_PU),
393 PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT, PTS3_IN_PU),
394 PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT, PTS2_IN_PU),
395 PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT, PTS1_IN_PU),
396 PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT, PTS0_IN_PU),
397
398 /* PTT GPIO */
399 PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT, PTT4_IN_PU),
400 PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT, PTT3_IN_PU),
401 PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT, PTT2_IN_PU),
402 PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT, PTT1_IN_PU),
403 PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT, PTT0_IN_PU),
404
405 /* PTU GPIO */
406 PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT, PTU4_IN_PU),
407 PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT, PTU3_IN_PU),
408 PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT, PTU2_IN_PU),
409 PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT, PTU1_IN_PU),
410 PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT, PTU0_IN_PU),
411
412 /* PTV GPIO */
413 PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT, PTV4_IN_PU),
414 PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT, PTV3_IN_PU),
415 PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT, PTV2_IN_PU),
416 PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT, PTV1_IN_PU),
417 PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT, PTV0_IN_PU),
418
419 /* PTA FN */
420 PINMUX_DATA(D23_MARK, PTA7_FN),
421 PINMUX_DATA(D22_MARK, PTA6_FN),
422 PINMUX_DATA(D21_MARK, PTA5_FN),
423 PINMUX_DATA(D20_MARK, PTA4_FN),
424 PINMUX_DATA(D19_MARK, PTA3_FN),
425 PINMUX_DATA(D18_MARK, PTA2_FN),
426 PINMUX_DATA(D17_MARK, PTA1_FN),
427 PINMUX_DATA(D16_MARK, PTA0_FN),
428
429 /* PTB FN */
430 PINMUX_DATA(D31_MARK, PTB7_FN),
431 PINMUX_DATA(D30_MARK, PTB6_FN),
432 PINMUX_DATA(D29_MARK, PTB5_FN),
433 PINMUX_DATA(D28_MARK, PTB4_FN),
434 PINMUX_DATA(D27_MARK, PTB3_FN),
435 PINMUX_DATA(D26_MARK, PTB2_FN),
436 PINMUX_DATA(D25_MARK, PTB1_FN),
437 PINMUX_DATA(D24_MARK, PTB0_FN),
438
439 /* PTC FN */
440 PINMUX_DATA(LCD_DATA7_MARK, PTC7_FN),
441 PINMUX_DATA(LCD_DATA6_MARK, PTC6_FN),
442 PINMUX_DATA(LCD_DATA5_MARK, PTC5_FN),
443 PINMUX_DATA(LCD_DATA4_MARK, PTC4_FN),
444 PINMUX_DATA(LCD_DATA3_MARK, PTC3_FN),
445 PINMUX_DATA(LCD_DATA2_MARK, PTC2_FN),
446 PINMUX_DATA(LCD_DATA1_MARK, PTC1_FN),
447 PINMUX_DATA(LCD_DATA0_MARK, PTC0_FN),
448
449 /* PTD FN */
450 PINMUX_DATA(LCD_DATA15_MARK, PTD7_FN),
451 PINMUX_DATA(LCD_DATA14_MARK, PTD6_FN),
452 PINMUX_DATA(LCD_DATA13_MARK, PTD5_FN),
453 PINMUX_DATA(LCD_DATA12_MARK, PTD4_FN),
454 PINMUX_DATA(LCD_DATA11_MARK, PTD3_FN),
455 PINMUX_DATA(LCD_DATA10_MARK, PTD2_FN),
456 PINMUX_DATA(LCD_DATA9_MARK, PTD1_FN),
457 PINMUX_DATA(LCD_DATA8_MARK, PTD0_FN),
458
459 /* PTE FN */
460 PINMUX_DATA(IIC_SCL_MARK, PSELB_9_8_00, PTE6_FN),
461 PINMUX_DATA(AFE_RXIN_MARK, PSELB_9_8_11, PTE6_FN),
462 PINMUX_DATA(IIC_SDA_MARK, PSELB_9_8_00, PTE5_FN),
463 PINMUX_DATA(AFE_RDET_MARK, PSELB_9_8_11, PTE5_FN),
464 PINMUX_DATA(LCD_M_DISP_MARK, PTE4_FN),
465 PINMUX_DATA(LCD_CL1_MARK, PTE3_FN),
466 PINMUX_DATA(LCD_CL2_MARK, PTE2_FN),
467 PINMUX_DATA(LCD_DON_MARK, PTE1_FN),
468 PINMUX_DATA(LCD_FLM_MARK, PTE0_FN),
469
470 /* PTF FN */
471 PINMUX_DATA(DA1_MARK, PTF6_FN),
472 PINMUX_DATA(DA0_MARK, PTF5_FN),
473 PINMUX_DATA(AN3_MARK, PTF4_FN),
474 PINMUX_DATA(AN2_MARK, PTF3_FN),
475 PINMUX_DATA(AN1_MARK, PTF2_FN),
476 PINMUX_DATA(AN0_MARK, PTF1_FN),
477 PINMUX_DATA(ADTRG_MARK, PTF0_FN),
478
479 /* PTG FN */
480 PINMUX_DATA(USB1D_RCV_MARK, PSELA_3_2_00, PTG6_FN),
481 PINMUX_DATA(AFE_FS_MARK, PSELA_3_2_01, PTG6_FN),
482 PINMUX_DATA(PCC_REG_MARK, PSELA_3_2_10, PTG6_FN),
483 PINMUX_DATA(IRQ5_MARK, PSELA_3_2_11, PTG6_FN),
484 PINMUX_DATA(USB1D_TXSE0_MARK, PSELA_5_4_00, PTG5_FN),
485 PINMUX_DATA(AFE_TXOUT_MARK, PSELA_5_4_01, PTG5_FN),
486 PINMUX_DATA(PCC_DRV_MARK, PSELA_5_4_10, PTG5_FN),
487 PINMUX_DATA(IRQ4_MARK, PSELA_5_4_11, PTG5_FN),
488 PINMUX_DATA(USB1D_TXDPLS_MARK, PSELA_7_6_00, PTG4_FN),
489 PINMUX_DATA(AFE_SCLK_MARK, PSELA_7_6_01, PTG4_FN),
490 PINMUX_DATA(IOIS16_MARK, PSELA_7_6_10, PTG4_FN),
491 PINMUX_DATA(USB1D_DMNS_MARK, PSELA_9_8_00, PTG3_FN),
492 PINMUX_DATA(AFE_RLYCNT_MARK, PSELA_9_8_01, PTG3_FN),
493 PINMUX_DATA(PCC_BVD2_MARK, PSELA_9_8_10, PTG3_FN),
494 PINMUX_DATA(USB1D_DPLS_MARK, PSELA_11_10_00, PTG2_FN),
495 PINMUX_DATA(AFE_HC1_MARK, PSELA_11_10_01, PTG2_FN),
496 PINMUX_DATA(PCC_BVD1_MARK, PSELA_11_10_10, PTG2_FN),
497 PINMUX_DATA(USB1D_SPEED_MARK, PSELA_13_12_00, PTG1_FN),
498 PINMUX_DATA(PCC_CD2_MARK, PSELA_13_12_10, PTG1_FN),
499 PINMUX_DATA(USB1D_TXENL_MARK, PSELA_15_14_00, PTG0_FN),
500 PINMUX_DATA(PCC_CD1_MARK, PSELA_15_14_10, PTG0_FN),
501
502 /* PTH FN */
503 PINMUX_DATA(RAS_MARK, PTH6_FN),
504 PINMUX_DATA(CAS_MARK, PTH5_FN),
505 PINMUX_DATA(CKE_MARK, PTH4_FN),
506 PINMUX_DATA(STATUS1_MARK, PTH3_FN),
507 PINMUX_DATA(STATUS0_MARK, PTH2_FN),
508 PINMUX_DATA(USB2_PWR_EN_MARK, PTH1_FN),
509 PINMUX_DATA(USB1_PWR_EN_USBF_UPLUP_MARK, PTH0_FN),
510
511 /* PTJ FN */
512 PINMUX_DATA(AUDCK_MARK, PTJ6_FN),
513 PINMUX_DATA(ASEBRKAK_MARK, PTJ5_FN),
514 PINMUX_DATA(AUDATA3_MARK, PTJ4_FN),
515 PINMUX_DATA(AUDATA2_MARK, PTJ3_FN),
516 PINMUX_DATA(AUDATA1_MARK, PTJ2_FN),
517 PINMUX_DATA(AUDATA0_MARK, PTJ1_FN),
518 PINMUX_DATA(AUDSYNC_MARK, PTJ0_FN),
519
520 /* PTK FN */
521 PINMUX_DATA(PCC_RESET_MARK, PTK3_FN),
522 PINMUX_DATA(PCC_RDY_MARK, PTK2_FN),
523 PINMUX_DATA(PCC_VS2_MARK, PTK1_FN),
524 PINMUX_DATA(PCC_VS1_MARK, PTK0_FN),
525
526 /* PTL FN */
527 PINMUX_DATA(TRST_MARK, PTL7_FN),
528 PINMUX_DATA(TMS_MARK, PTL6_FN),
529 PINMUX_DATA(TDO_MARK, PTL5_FN),
530 PINMUX_DATA(TDI_MARK, PTL4_FN),
531 PINMUX_DATA(TCK_MARK, PTL3_FN),
532
533 /* PTM FN */
534 PINMUX_DATA(DREQ1_MARK, PTM7_FN),
535 PINMUX_DATA(DREQ0_MARK, PTM6_FN),
536 PINMUX_DATA(DACK1_MARK, PTM5_FN),
537 PINMUX_DATA(DACK0_MARK, PTM4_FN),
538 PINMUX_DATA(TEND1_MARK, PTM3_FN),
539 PINMUX_DATA(TEND0_MARK, PTM2_FN),
540 PINMUX_DATA(CS5B_CE1A_MARK, PTM1_FN),
541 PINMUX_DATA(CS6B_CE1B_MARK, PTM0_FN),
542
543 /* PTP FN */
544 PINMUX_DATA(USB1D_SUSPEND_MARK, PSELA_1_0_00, PTP4_FN),
545 PINMUX_DATA(REFOUT_MARK, PSELA_1_0_01, PTP4_FN),
546 PINMUX_DATA(IRQOUT_MARK, PSELA_1_0_10, PTP4_FN),
547 PINMUX_DATA(IRQ3_IRL3_MARK, PTP3_FN),
548 PINMUX_DATA(IRQ2_IRL2_MARK, PTP2_FN),
549 PINMUX_DATA(IRQ1_IRL1_MARK, PTP1_FN),
550 PINMUX_DATA(IRQ0_IRL0_MARK, PTP0_FN),
551
552 /* PTR FN */
553 PINMUX_DATA(A25_MARK, PTR7_FN),
554 PINMUX_DATA(A24_MARK, PTR6_FN),
555 PINMUX_DATA(A23_MARK, PTR5_FN),
556 PINMUX_DATA(A22_MARK, PTR4_FN),
557 PINMUX_DATA(A21_MARK, PTR3_FN),
558 PINMUX_DATA(A20_MARK, PTR2_FN),
559 PINMUX_DATA(A19_MARK, PTR1_FN),
560 PINMUX_DATA(A0_MARK, PTR0_FN),
561
562 /* PTS FN */
563 PINMUX_DATA(SIOF0_SYNC_MARK, PTS4_FN),
564 PINMUX_DATA(SIOF0_MCLK_MARK, PTS3_FN),
565 PINMUX_DATA(SIOF0_TXD_MARK, PTS2_FN),
566 PINMUX_DATA(SIOF0_RXD_MARK, PTS1_FN),
567 PINMUX_DATA(SIOF0_SCK_MARK, PTS0_FN),
568
569 /* PTT FN */
570 PINMUX_DATA(SCIF0_CTS_MARK, PSELB_15_14_00, PTT4_FN),
571 PINMUX_DATA(TPU_TO1_MARK, PSELB_15_14_11, PTT4_FN),
572 PINMUX_DATA(SCIF0_RTS_MARK, PSELB_15_14_00, PTT3_FN),
573 PINMUX_DATA(TPU_TO0_MARK, PSELB_15_14_11, PTT3_FN),
574 PINMUX_DATA(SCIF0_TXD_MARK, PTT2_FN),
575 PINMUX_DATA(SCIF0_RXD_MARK, PTT1_FN),
576 PINMUX_DATA(SCIF0_SCK_MARK, PTT0_FN),
577
578 /* PTU FN */
579 PINMUX_DATA(SIOF1_SYNC_MARK, PTU4_FN),
580 PINMUX_DATA(SIOF1_MCLK_MARK, PSELD_11_10_00, PTU3_FN),
581 PINMUX_DATA(TPU_TI3B_MARK, PSELD_11_10_01, PTU3_FN),
582 PINMUX_DATA(SIOF1_TXD_MARK, PSELD_15_14_00, PTU2_FN),
583 PINMUX_DATA(TPU_TI3A_MARK, PSELD_15_14_01, PTU2_FN),
584 PINMUX_DATA(MMC_DAT_MARK, PSELD_15_14_10, PTU2_FN),
585 PINMUX_DATA(SIOF1_RXD_MARK, PSELC_13_12_00, PTU1_FN),
586 PINMUX_DATA(TPU_TI2B_MARK, PSELC_13_12_01, PTU1_FN),
587 PINMUX_DATA(MMC_CMD_MARK, PSELC_13_12_10, PTU1_FN),
588 PINMUX_DATA(SIOF1_SCK_MARK, PSELC_15_14_00, PTU0_FN),
589 PINMUX_DATA(TPU_TI2A_MARK, PSELC_15_14_01, PTU0_FN),
590 PINMUX_DATA(MMC_CLK_MARK, PSELC_15_14_10, PTU0_FN),
591
592 /* PTV FN */
593 PINMUX_DATA(SCIF1_CTS_MARK, PSELB_11_10_00, PTV4_FN),
594 PINMUX_DATA(TPU_TO3_MARK, PSELB_11_10_01, PTV4_FN),
595 PINMUX_DATA(MMC_VDDON_MARK, PSELB_11_10_10, PTV4_FN),
596 PINMUX_DATA(LCD_VEPWC_MARK, PSELB_11_10_11, PTV4_FN),
597 PINMUX_DATA(SCIF1_RTS_MARK, PSELB_13_12_00, PTV3_FN),
598 PINMUX_DATA(TPU_TO2_MARK, PSELB_13_12_01, PTV3_FN),
599 PINMUX_DATA(MMC_ODMOD_MARK, PSELB_13_12_10, PTV3_FN),
600 PINMUX_DATA(LCD_VCPWC_MARK, PSELB_13_12_11, PTV3_FN),
601 PINMUX_DATA(SCIF1_TXD_MARK, PSELC_9_8_00, PTV2_FN),
602 PINMUX_DATA(SIM_D_MARK, PSELC_9_8_10, PTV2_FN),
603 PINMUX_DATA(SCIF1_RXD_MARK, PSELC_11_10_00, PTV1_FN),
604 PINMUX_DATA(SIM_RST_MARK, PSELC_11_10_10, PTV1_FN),
605 PINMUX_DATA(SCIF1_SCK_MARK, PSELD_1_0_00, PTV0_FN),
606 PINMUX_DATA(SIM_CLK_MARK, PSELD_1_0_10, PTV0_FN),
607};
608
609static struct pinmux_gpio pinmux_gpios[] = {
610 /* PTA */
611 PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
612 PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
613 PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
614 PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
615 PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
616 PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
617 PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
618 PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
619
620 /* PTB */
621 PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
622 PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
623 PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
624 PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
625 PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
626 PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
627 PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
628 PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
629
630 /* PTC */
631 PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
632 PINMUX_GPIO(GPIO_PTC6, PTC6_DATA),
633 PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
634 PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
635 PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
636 PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
637 PINMUX_GPIO(GPIO_PTC1, PTC1_DATA),
638 PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
639
640 /* PTD */
641 PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
642 PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
643 PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
644 PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
645 PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
646 PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
647 PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
648 PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
649
650 /* PTE */
651 PINMUX_GPIO(GPIO_PTE6, PTE6_DATA),
652 PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
653 PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
654 PINMUX_GPIO(GPIO_PTE3, PTE3_DATA),
655 PINMUX_GPIO(GPIO_PTE2, PTE2_DATA),
656 PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
657 PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
658
659 /* PTF */
660 PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
661 PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
662 PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
663 PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
664 PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
665 PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
666 PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
667
668 /* PTG */
669 PINMUX_GPIO(GPIO_PTG6, PTG6_DATA),
670 PINMUX_GPIO(GPIO_PTG5, PTG5_DATA),
671 PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
672 PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
673 PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
674 PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
675 PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
676
677 /* PTH */
678 PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
679 PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
680 PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
681 PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
682 PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
683 PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
684 PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
685
686 /* PTJ */
687 PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
688 PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
689 PINMUX_GPIO(GPIO_PTJ4, PTJ4_DATA),
690 PINMUX_GPIO(GPIO_PTJ3, PTJ3_DATA),
691 PINMUX_GPIO(GPIO_PTJ2, PTJ2_DATA),
692 PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
693 PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
694
695 /* PTK */
696 PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
697 PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
698 PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
699 PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
700
701 /* PTL */
702 PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
703 PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
704 PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
705 PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
706 PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
707
708 /* PTM */
709 PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
710 PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
711 PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
712 PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
713 PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
714 PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
715 PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
716 PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
717
718 /* PTP */
719 PINMUX_GPIO(GPIO_PTP4, PTP4_DATA),
720 PINMUX_GPIO(GPIO_PTP3, PTP3_DATA),
721 PINMUX_GPIO(GPIO_PTP2, PTP2_DATA),
722 PINMUX_GPIO(GPIO_PTP1, PTP1_DATA),
723 PINMUX_GPIO(GPIO_PTP0, PTP0_DATA),
724
725 /* PTR */
726 PINMUX_GPIO(GPIO_PTR7, PTR7_DATA),
727 PINMUX_GPIO(GPIO_PTR6, PTR6_DATA),
728 PINMUX_GPIO(GPIO_PTR5, PTR5_DATA),
729 PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
730 PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
731 PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
732 PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
733 PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
734
735 /* PTS */
736 PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
737 PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
738 PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
739 PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
740 PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
741
742 /* PTT */
743 PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
744 PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
745 PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
746 PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
747 PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
748
749 /* PTU */
750 PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
751 PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
752 PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
753 PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
754 PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
755
756 /* PTV */
757 PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
758 PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
759 PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
760 PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
761 PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
762
763 /* BSC */
764 PINMUX_GPIO(GPIO_FN_D31, D31_MARK),
765 PINMUX_GPIO(GPIO_FN_D30, D30_MARK),
766 PINMUX_GPIO(GPIO_FN_D29, D29_MARK),
767 PINMUX_GPIO(GPIO_FN_D28, D28_MARK),
768 PINMUX_GPIO(GPIO_FN_D27, D27_MARK),
769 PINMUX_GPIO(GPIO_FN_D26, D26_MARK),
770 PINMUX_GPIO(GPIO_FN_D25, D25_MARK),
771 PINMUX_GPIO(GPIO_FN_D24, D24_MARK),
772 PINMUX_GPIO(GPIO_FN_D23, D23_MARK),
773 PINMUX_GPIO(GPIO_FN_D22, D22_MARK),
774 PINMUX_GPIO(GPIO_FN_D21, D21_MARK),
775 PINMUX_GPIO(GPIO_FN_D20, D20_MARK),
776 PINMUX_GPIO(GPIO_FN_D19, D19_MARK),
777 PINMUX_GPIO(GPIO_FN_D18, D18_MARK),
778 PINMUX_GPIO(GPIO_FN_D17, D17_MARK),
779 PINMUX_GPIO(GPIO_FN_D16, D16_MARK),
780 PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
781 PINMUX_GPIO(GPIO_FN_RAS, RAS_MARK),
782 PINMUX_GPIO(GPIO_FN_CAS, CAS_MARK),
783 PINMUX_GPIO(GPIO_FN_CKE, CKE_MARK),
784 PINMUX_GPIO(GPIO_FN_CS5B_CE1A, CS5B_CE1A_MARK),
785 PINMUX_GPIO(GPIO_FN_CS6B_CE1B, CS6B_CE1B_MARK),
786 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
787 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
788 PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
789 PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
790 PINMUX_GPIO(GPIO_FN_A21, A21_MARK),
791 PINMUX_GPIO(GPIO_FN_A20, A20_MARK),
792 PINMUX_GPIO(GPIO_FN_A19, A19_MARK),
793 PINMUX_GPIO(GPIO_FN_A0, A0_MARK),
794 PINMUX_GPIO(GPIO_FN_REFOUT, REFOUT_MARK),
795 PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK),
796
797 /* LCDC */
798 PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK),
799 PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK),
800 PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK),
801 PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK),
802 PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK),
803 PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK),
804 PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK),
805 PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK),
806 PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK),
807 PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK),
808 PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK),
809 PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK),
810 PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK),
811 PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK),
812 PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK),
813 PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK),
814 PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK),
815 PINMUX_GPIO(GPIO_FN_LCD_CL1, LCD_CL1_MARK),
816 PINMUX_GPIO(GPIO_FN_LCD_CL2, LCD_CL2_MARK),
817 PINMUX_GPIO(GPIO_FN_LCD_DON, LCD_DON_MARK),
818 PINMUX_GPIO(GPIO_FN_LCD_FLM, LCD_FLM_MARK),
819 PINMUX_GPIO(GPIO_FN_LCD_VEPWC, LCD_VEPWC_MARK),
820 PINMUX_GPIO(GPIO_FN_LCD_VCPWC, LCD_VCPWC_MARK),
821
822 /* AFEIF */
823 PINMUX_GPIO(GPIO_FN_AFE_RXIN, AFE_RXIN_MARK),
824 PINMUX_GPIO(GPIO_FN_AFE_RDET, AFE_RDET_MARK),
825 PINMUX_GPIO(GPIO_FN_AFE_FS, AFE_FS_MARK),
826 PINMUX_GPIO(GPIO_FN_AFE_TXOUT, AFE_TXOUT_MARK),
827 PINMUX_GPIO(GPIO_FN_AFE_SCLK, AFE_SCLK_MARK),
828 PINMUX_GPIO(GPIO_FN_AFE_RLYCNT, AFE_RLYCNT_MARK),
829 PINMUX_GPIO(GPIO_FN_AFE_HC1, AFE_HC1_MARK),
830
831 /* IIC */
832 PINMUX_GPIO(GPIO_FN_IIC_SCL, IIC_SCL_MARK),
833 PINMUX_GPIO(GPIO_FN_IIC_SDA, IIC_SDA_MARK),
834
835 /* DAC */
836 PINMUX_GPIO(GPIO_FN_DA1, DA1_MARK),
837 PINMUX_GPIO(GPIO_FN_DA0, DA0_MARK),
838
839 /* ADC */
840 PINMUX_GPIO(GPIO_FN_AN3, AN3_MARK),
841 PINMUX_GPIO(GPIO_FN_AN2, AN2_MARK),
842 PINMUX_GPIO(GPIO_FN_AN1, AN1_MARK),
843 PINMUX_GPIO(GPIO_FN_AN0, AN0_MARK),
844 PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK),
845
846 /* USB */
847 PINMUX_GPIO(GPIO_FN_USB1D_RCV, USB1D_RCV_MARK),
848 PINMUX_GPIO(GPIO_FN_USB1D_TXSE0, USB1D_TXSE0_MARK),
849 PINMUX_GPIO(GPIO_FN_USB1D_TXDPLS, USB1D_TXDPLS_MARK),
850 PINMUX_GPIO(GPIO_FN_USB1D_DMNS, USB1D_DMNS_MARK),
851 PINMUX_GPIO(GPIO_FN_USB1D_DPLS, USB1D_DPLS_MARK),
852 PINMUX_GPIO(GPIO_FN_USB1D_SPEED, USB1D_SPEED_MARK),
853 PINMUX_GPIO(GPIO_FN_USB1D_TXENL, USB1D_TXENL_MARK),
854
855 PINMUX_GPIO(GPIO_FN_USB2_PWR_EN, USB2_PWR_EN_MARK),
856 PINMUX_GPIO(GPIO_FN_USB1_PWR_EN_USBF_UPLUP,
857 USB1_PWR_EN_USBF_UPLUP_MARK),
858 PINMUX_GPIO(GPIO_FN_USB1D_SUSPEND, USB1D_SUSPEND_MARK),
859
860 /* INTC */
861 PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK),
862 PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK),
863 PINMUX_GPIO(GPIO_FN_IRQ3_IRL3, IRQ3_IRL3_MARK),
864 PINMUX_GPIO(GPIO_FN_IRQ2_IRL2, IRQ2_IRL2_MARK),
865 PINMUX_GPIO(GPIO_FN_IRQ1_IRL1, IRQ1_IRL1_MARK),
866 PINMUX_GPIO(GPIO_FN_IRQ0_IRL0, IRQ0_IRL0_MARK),
867
868 /* PCC */
869 PINMUX_GPIO(GPIO_FN_PCC_REG, PCC_REG_MARK),
870 PINMUX_GPIO(GPIO_FN_PCC_DRV, PCC_DRV_MARK),
871 PINMUX_GPIO(GPIO_FN_PCC_BVD2, PCC_BVD2_MARK),
872 PINMUX_GPIO(GPIO_FN_PCC_BVD1, PCC_BVD1_MARK),
873 PINMUX_GPIO(GPIO_FN_PCC_CD2, PCC_CD2_MARK),
874 PINMUX_GPIO(GPIO_FN_PCC_CD1, PCC_CD1_MARK),
875 PINMUX_GPIO(GPIO_FN_PCC_RESET, PCC_RESET_MARK),
876 PINMUX_GPIO(GPIO_FN_PCC_RDY, PCC_RDY_MARK),
877 PINMUX_GPIO(GPIO_FN_PCC_VS2, PCC_VS2_MARK),
878 PINMUX_GPIO(GPIO_FN_PCC_VS1, PCC_VS1_MARK),
879
880 /* HUDI */
881 PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK),
882 PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK),
883 PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK),
884 PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK),
885 PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK),
886 PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK),
887 PINMUX_GPIO(GPIO_FN_ASEBRKAK, ASEBRKAK_MARK),
888 PINMUX_GPIO(GPIO_FN_TRST, TRST_MARK),
889 PINMUX_GPIO(GPIO_FN_TMS, TMS_MARK),
890 PINMUX_GPIO(GPIO_FN_TDO, TDO_MARK),
891 PINMUX_GPIO(GPIO_FN_TDI, TDI_MARK),
892 PINMUX_GPIO(GPIO_FN_TCK, TCK_MARK),
893
894 /* DMAC */
895 PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
896 PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
897 PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
898 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
899 PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK),
900 PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK),
901
902 /* SIOF0 */
903 PINMUX_GPIO(GPIO_FN_SIOF0_SYNC, SIOF0_SYNC_MARK),
904 PINMUX_GPIO(GPIO_FN_SIOF0_MCLK, SIOF0_MCLK_MARK),
905 PINMUX_GPIO(GPIO_FN_SIOF0_TXD, SIOF0_TXD_MARK),
906 PINMUX_GPIO(GPIO_FN_SIOF0_RXD, SIOF0_RXD_MARK),
907 PINMUX_GPIO(GPIO_FN_SIOF0_SCK, SIOF0_SCK_MARK),
908
909 /* SIOF1 */
910 PINMUX_GPIO(GPIO_FN_SIOF1_SYNC, SIOF1_SYNC_MARK),
911 PINMUX_GPIO(GPIO_FN_SIOF1_MCLK, SIOF1_MCLK_MARK),
912 PINMUX_GPIO(GPIO_FN_SIOF1_TXD, SIOF1_TXD_MARK),
913 PINMUX_GPIO(GPIO_FN_SIOF1_RXD, SIOF1_RXD_MARK),
914 PINMUX_GPIO(GPIO_FN_SIOF1_SCK, SIOF1_SCK_MARK),
915
916 /* SCIF0 */
917 PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK),
918 PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK),
919 PINMUX_GPIO(GPIO_FN_SCIF0_RTS, SCIF0_RTS_MARK),
920 PINMUX_GPIO(GPIO_FN_SCIF0_CTS, SCIF0_CTS_MARK),
921 PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK),
922
923 /* SCIF1 */
924 PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK),
925 PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK),
926 PINMUX_GPIO(GPIO_FN_SCIF1_RTS, SCIF1_RTS_MARK),
927 PINMUX_GPIO(GPIO_FN_SCIF1_CTS, SCIF1_CTS_MARK),
928 PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK),
929
930 /* TPU */
931 PINMUX_GPIO(GPIO_FN_TPU_TO1, TPU_TO1_MARK),
932 PINMUX_GPIO(GPIO_FN_TPU_TO0, TPU_TO0_MARK),
933 PINMUX_GPIO(GPIO_FN_TPU_TI3B, TPU_TI3B_MARK),
934 PINMUX_GPIO(GPIO_FN_TPU_TI3A, TPU_TI3A_MARK),
935 PINMUX_GPIO(GPIO_FN_TPU_TI2B, TPU_TI2B_MARK),
936 PINMUX_GPIO(GPIO_FN_TPU_TI2A, TPU_TI2A_MARK),
937 PINMUX_GPIO(GPIO_FN_TPU_TO3, TPU_TO3_MARK),
938 PINMUX_GPIO(GPIO_FN_TPU_TO2, TPU_TO2_MARK),
939
940 /* SIM */
941 PINMUX_GPIO(GPIO_FN_SIM_D, SIM_D_MARK),
942 PINMUX_GPIO(GPIO_FN_SIM_CLK, SIM_CLK_MARK),
943 PINMUX_GPIO(GPIO_FN_SIM_RST, SIM_RST_MARK),
944
945 /* MMC */
946 PINMUX_GPIO(GPIO_FN_MMC_DAT, MMC_DAT_MARK),
947 PINMUX_GPIO(GPIO_FN_MMC_CMD, MMC_CMD_MARK),
948 PINMUX_GPIO(GPIO_FN_MMC_CLK, MMC_CLK_MARK),
949 PINMUX_GPIO(GPIO_FN_MMC_VDDON, MMC_VDDON_MARK),
950 PINMUX_GPIO(GPIO_FN_MMC_ODMOD, MMC_ODMOD_MARK),
951
952 /* SYSC */
953 PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
954 PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK),
955};
956
957static struct pinmux_cfg_reg pinmux_config_regs[] = {
958 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
959 PTA7_FN, PTA7_OUT, PTA7_IN_PU, PTA7_IN,
960 PTA6_FN, PTA6_OUT, PTA6_IN_PU, PTA6_IN,
961 PTA5_FN, PTA5_OUT, PTA5_IN_PU, PTA5_IN,
962 PTA4_FN, PTA4_OUT, PTA4_IN_PU, PTA4_IN,
963 PTA3_FN, PTA3_OUT, PTA3_IN_PU, PTA3_IN,
964 PTA2_FN, PTA2_OUT, PTA2_IN_PU, PTA2_IN,
965 PTA1_FN, PTA1_OUT, PTA1_IN_PU, PTA1_IN,
966 PTA0_FN, PTA0_OUT, PTA0_IN_PU, PTA0_IN }
967 },
968 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) {
969 PTB7_FN, PTB7_OUT, PTB7_IN_PU, PTB7_IN,
970 PTB6_FN, PTB6_OUT, PTB6_IN_PU, PTB6_IN,
971 PTB5_FN, PTB5_OUT, PTB5_IN_PU, PTB5_IN,
972 PTB4_FN, PTB4_OUT, PTB4_IN_PU, PTB4_IN,
973 PTB3_FN, PTB3_OUT, PTB3_IN_PU, PTB3_IN,
974 PTB2_FN, PTB2_OUT, PTB2_IN_PU, PTB2_IN,
975 PTB1_FN, PTB1_OUT, PTB1_IN_PU, PTB1_IN,
976 PTB0_FN, PTB0_OUT, PTB0_IN_PU, PTB0_IN }
977 },
978 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) {
979 PTC7_FN, PTC7_OUT, PTC7_IN_PU, PTC7_IN,
980 PTC6_FN, PTC6_OUT, PTC6_IN_PU, PTC6_IN,
981 PTC5_FN, PTC5_OUT, PTC5_IN_PU, PTC5_IN,
982 PTC4_FN, PTC4_OUT, PTC4_IN_PU, PTC4_IN,
983 PTC3_FN, PTC3_OUT, PTC3_IN_PU, PTC3_IN,
984 PTC2_FN, PTC2_OUT, PTC2_IN_PU, PTC2_IN,
985 PTC1_FN, PTC1_OUT, PTC1_IN_PU, PTC1_IN,
986 PTC0_FN, PTC0_OUT, PTC0_IN_PU, PTC0_IN }
987 },
988 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) {
989 PTD7_FN, PTD7_OUT, PTD7_IN_PU, PTD7_IN,
990 PTD6_FN, PTD6_OUT, PTD6_IN_PU, PTD6_IN,
991 PTD5_FN, PTD5_OUT, PTD5_IN_PU, PTD5_IN,
992 PTD4_FN, PTD4_OUT, PTD4_IN_PU, PTD4_IN,
993 PTD3_FN, PTD3_OUT, PTD3_IN_PU, PTD3_IN,
994 PTD2_FN, PTD2_OUT, PTD2_IN_PU, PTD2_IN,
995 PTD1_FN, PTD1_OUT, PTD1_IN_PU, PTD1_IN,
996 PTD0_FN, PTD0_OUT, PTD0_IN_PU, PTD0_IN }
997 },
998 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) {
999 0, 0, 0, 0,
1000 PTE6_FN, 0, 0, PTE6_IN,
1001 PTE5_FN, 0, 0, PTE5_IN,
1002 PTE4_FN, PTE4_OUT, PTE4_IN_PU, PTE4_IN,
1003 PTE3_FN, PTE3_OUT, PTE3_IN_PU, PTE3_IN,
1004 PTE2_FN, PTE2_OUT, PTE2_IN_PU, PTE2_IN,
1005 PTE1_FN, PTE1_OUT, PTE1_IN_PU, PTE1_IN,
1006 PTE0_FN, PTE0_OUT, PTE0_IN_PU, PTE0_IN }
1007 },
1008 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) {
1009 0, 0, 0, 0,
1010 PTF6_FN, 0, 0, PTF6_IN,
1011 PTF5_FN, 0, 0, PTF5_IN,
1012 PTF4_FN, 0, 0, PTF4_IN,
1013 PTF3_FN, 0, 0, PTF3_IN,
1014 PTF2_FN, 0, 0, PTF2_IN,
1015 PTF1_FN, 0, 0, PTF1_IN,
1016 PTF0_FN, 0, 0, PTF0_IN }
1017 },
1018 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) {
1019 0, 0, 0, 0,
1020 PTG6_FN, PTG6_OUT, PTG6_IN_PU, PTG6_IN,
1021 PTG5_FN, PTG5_OUT, PTG5_IN_PU, PTG5_IN,
1022 PTG4_FN, PTG4_OUT, PTG4_IN_PU, PTG4_IN,
1023 PTG3_FN, PTG3_OUT, PTG3_IN_PU, PTG3_IN,
1024 PTG2_FN, PTG2_OUT, PTG2_IN_PU, PTG2_IN,
1025 PTG1_FN, PTG1_OUT, PTG1_IN_PU, PTG1_IN,
1026 PTG0_FN, PTG0_OUT, PTG0_IN_PU, PTG0_IN }
1027 },
1028 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) {
1029 0, 0, 0, 0,
1030 PTH6_FN, PTH6_OUT, PTH6_IN_PU, PTH6_IN,
1031 PTH5_FN, PTH5_OUT, PTH5_IN_PU, PTH5_IN,
1032 PTH4_FN, PTH4_OUT, PTH4_IN_PU, PTH4_IN,
1033 PTH3_FN, PTH3_OUT, PTH3_IN_PU, PTH3_IN,
1034 PTH2_FN, PTH2_OUT, PTH2_IN_PU, PTH2_IN,
1035 PTH1_FN, PTH1_OUT, PTH1_IN_PU, PTH1_IN,
1036 PTH0_FN, PTH0_OUT, PTH0_IN_PU, PTH0_IN }
1037 },
1038 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) {
1039 0, 0, 0, 0,
1040 PTJ6_FN, PTJ6_OUT, PTJ6_IN_PU, PTJ6_IN,
1041 PTJ5_FN, PTJ5_OUT, PTJ5_IN_PU, PTJ5_IN,
1042 PTJ4_FN, PTJ4_OUT, PTJ4_IN_PU, PTJ4_IN,
1043 PTJ3_FN, PTJ3_OUT, PTJ3_IN_PU, PTJ3_IN,
1044 PTJ2_FN, PTJ2_OUT, PTJ2_IN_PU, PTJ2_IN,
1045 PTJ1_FN, PTJ1_OUT, PTJ1_IN_PU, PTJ1_IN,
1046 PTJ0_FN, PTJ0_OUT, PTJ0_IN_PU, PTJ0_IN }
1047 },
1048 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) {
1049 0, 0, 0, 0,
1050 0, 0, 0, 0,
1051 0, 0, 0, 0,
1052 0, 0, 0, 0,
1053 PTK3_FN, PTK3_OUT, PTK3_IN_PU, PTK3_IN,
1054 PTK2_FN, PTK2_OUT, PTK2_IN_PU, PTK2_IN,
1055 PTK1_FN, PTK1_OUT, PTK1_IN_PU, PTK1_IN,
1056 PTK0_FN, PTK0_OUT, PTK0_IN_PU, PTK0_IN }
1057 },
1058 { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) {
1059 PTL7_FN, PTL7_OUT, PTL7_IN_PU, PTL7_IN,
1060 PTL6_FN, PTL6_OUT, PTL6_IN_PU, PTL6_IN,
1061 PTL5_FN, PTL5_OUT, PTL5_IN_PU, PTL5_IN,
1062 PTL4_FN, PTL4_OUT, PTL4_IN_PU, PTL4_IN,
1063 PTL3_FN, PTL3_OUT, PTL3_IN_PU, PTL3_IN,
1064 0, 0, 0, 0,
1065 0, 0, 0, 0,
1066 0, 0, 0, 0 }
1067 },
1068 { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) {
1069 PTM7_FN, PTM7_OUT, PTM7_IN_PU, PTM7_IN,
1070 PTM6_FN, PTM6_OUT, PTM6_IN_PU, PTM6_IN,
1071 PTM5_FN, PTM5_OUT, PTM5_IN_PU, PTM5_IN,
1072 PTM4_FN, PTM4_OUT, PTM4_IN_PU, PTM4_IN,
1073 PTM3_FN, PTM3_OUT, PTM3_IN_PU, PTM3_IN,
1074 PTM2_FN, PTM2_OUT, PTM2_IN_PU, PTM2_IN,
1075 PTM1_FN, PTM1_OUT, PTM1_IN_PU, PTM1_IN,
1076 PTM0_FN, PTM0_OUT, PTM0_IN_PU, PTM0_IN }
1077 },
1078 { PINMUX_CFG_REG("PPCR", 0xa4050118, 16, 2) {
1079 0, 0, 0, 0,
1080 0, 0, 0, 0,
1081 0, 0, 0, 0,
1082 PTP4_FN, PTP4_OUT, PTP4_IN_PU, PTP4_IN,
1083 PTP3_FN, PTP3_OUT, PTP3_IN_PU, PTP3_IN,
1084 PTP2_FN, PTP2_OUT, PTP2_IN_PU, PTP2_IN,
1085 PTP1_FN, PTP1_OUT, PTP1_IN_PU, PTP1_IN,
1086 PTP0_FN, PTP0_OUT, PTP0_IN_PU, PTP0_IN }
1087 },
1088 { PINMUX_CFG_REG("PRCR", 0xa405011a, 16, 2) {
1089 PTR7_FN, PTR7_OUT, PTR7_IN_PU, PTR7_IN,
1090 PTR6_FN, PTR6_OUT, PTR6_IN_PU, PTR6_IN,
1091 PTR5_FN, PTR5_OUT, PTR5_IN_PU, PTR5_IN,
1092 PTR4_FN, PTR4_OUT, PTR4_IN_PU, PTR4_IN,
1093 PTR3_FN, PTR3_OUT, PTR3_IN_PU, PTR3_IN,
1094 PTR2_FN, PTR2_OUT, PTR2_IN_PU, PTR2_IN,
1095 PTR1_FN, PTR1_OUT, PTR1_IN_PU, PTR1_IN,
1096 PTR0_FN, PTR0_OUT, PTR0_IN_PU, PTR0_IN }
1097 },
1098 { PINMUX_CFG_REG("PSCR", 0xa405011c, 16, 2) {
1099 0, 0, 0, 0,
1100 0, 0, 0, 0,
1101 0, 0, 0, 0,
1102 PTS4_FN, PTS4_OUT, PTS4_IN_PU, PTS4_IN,
1103 PTS3_FN, PTS3_OUT, PTS3_IN_PU, PTS3_IN,
1104 PTS2_FN, PTS2_OUT, PTS2_IN_PU, PTS2_IN,
1105 PTS1_FN, PTS1_OUT, PTS1_IN_PU, PTS1_IN,
1106 PTS0_FN, PTS0_OUT, PTS0_IN_PU, PTS0_IN }
1107 },
1108 { PINMUX_CFG_REG("PTCR", 0xa405011e, 16, 2) {
1109 0, 0, 0, 0,
1110 0, 0, 0, 0,
1111 0, 0, 0, 0,
1112 PTT4_FN, PTT4_OUT, PTT4_IN_PU, PTT4_IN,
1113 PTT3_FN, PTT3_OUT, PTT3_IN_PU, PTT3_IN,
1114 PTT2_FN, PTT2_OUT, PTT2_IN_PU, PTT2_IN,
1115 PTT1_FN, PTT1_OUT, PTT1_IN_PU, PTT1_IN,
1116 PTT0_FN, PTT0_OUT, PTT0_IN_PU, PTT0_IN }
1117 },
1118 { PINMUX_CFG_REG("PUCR", 0xa4050120, 16, 2) {
1119 0, 0, 0, 0,
1120 0, 0, 0, 0,
1121 0, 0, 0, 0,
1122 PTU4_FN, PTU4_OUT, PTU4_IN_PU, PTU4_IN,
1123 PTU3_FN, PTU3_OUT, PTU3_IN_PU, PTU3_IN,
1124 PTU2_FN, PTU2_OUT, PTU2_IN_PU, PTU2_IN,
1125 PTU1_FN, PTU1_OUT, PTU1_IN_PU, PTU1_IN,
1126 PTU0_FN, PTU0_OUT, PTU0_IN_PU, PTU0_IN }
1127 },
1128 { PINMUX_CFG_REG("PVCR", 0xa4050122, 16, 2) {
1129 0, 0, 0, 0,
1130 0, 0, 0, 0,
1131 0, 0, 0, 0,
1132 PTV4_FN, PTV4_OUT, PTV4_IN_PU, PTV4_IN,
1133 PTV3_FN, PTV3_OUT, PTV3_IN_PU, PTV3_IN,
1134 PTV2_FN, PTV2_OUT, PTV2_IN_PU, PTV2_IN,
1135 PTV1_FN, PTV1_OUT, PTV1_IN_PU, PTV1_IN,
1136 PTV0_FN, PTV0_OUT, PTV0_IN_PU, PTV0_IN }
1137 },
1138 {}
1139};
1140
1141static struct pinmux_data_reg pinmux_data_regs[] = {
1142 { PINMUX_DATA_REG("PADR", 0xa4050140, 8) {
1143 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
1144 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
1145 },
1146 { PINMUX_DATA_REG("PBDR", 0xa4050142, 8) {
1147 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
1148 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
1149 },
1150 { PINMUX_DATA_REG("PCDR", 0xa4050144, 8) {
1151 PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
1152 PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA }
1153 },
1154 { PINMUX_DATA_REG("PDDR", 0xa4050126, 8) {
1155 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
1156 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
1157 },
1158 { PINMUX_DATA_REG("PEDR", 0xa4050148, 8) {
1159 0, PTE6_DATA, PTE5_DATA, PTE4_DATA,
1160 PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA }
1161 },
1162 { PINMUX_DATA_REG("PFDR", 0xa405014a, 8) {
1163 0, PTF6_DATA, PTF5_DATA, PTF4_DATA,
1164 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
1165 },
1166 { PINMUX_DATA_REG("PGDR", 0xa405014c, 8) {
1167 0, PTG6_DATA, PTG5_DATA, PTG4_DATA,
1168 PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
1169 },
1170 { PINMUX_DATA_REG("PHDR", 0xa405014e, 8) {
1171 0, PTH6_DATA, PTH5_DATA, PTH4_DATA,
1172 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
1173 },
1174 { PINMUX_DATA_REG("PJDR", 0xa4050150, 8) {
1175 0, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
1176 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA }
1177 },
1178 { PINMUX_DATA_REG("PKDR", 0xa4050152, 8) {
1179 0, 0, 0, 0,
1180 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
1181 },
1182 { PINMUX_DATA_REG("PLDR", 0xa4050154, 8) {
1183 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
1184 PTL3_DATA, 0, 0, 0 }
1185 },
1186 { PINMUX_DATA_REG("PMDR", 0xa4050156, 8) {
1187 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
1188 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
1189 },
1190 { PINMUX_DATA_REG("PPDR", 0xa4050158, 8) {
1191 0, 0, 0, PTP4_DATA,
1192 PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA }
1193 },
1194 { PINMUX_DATA_REG("PRDR", 0xa405015a, 8) {
1195 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
1196 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
1197 },
1198 { PINMUX_DATA_REG("PSDR", 0xa405015c, 8) {
1199 0, 0, 0, PTS4_DATA,
1200 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
1201 },
1202 { PINMUX_DATA_REG("PTDR", 0xa405015e, 8) {
1203 0, 0, 0, PTT4_DATA,
1204 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
1205 },
1206 { PINMUX_DATA_REG("PUDR", 0xa4050160, 8) {
1207 0, 0, 0, PTU4_DATA,
1208 PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
1209 },
1210 { PINMUX_DATA_REG("PVDR", 0xa4050162, 8) {
1211 0, 0, 0, PTV4_DATA,
1212 PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
1213 },
1214 { },
1215};
1216
1217struct sh_pfc_soc_info sh7720_pinmux_info = {
1218 .name = "sh7720_pfc",
1219 .reserved_id = PINMUX_RESERVED,
1220 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1221 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1222 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
1223 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1224 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1225 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1226
1227 .first_gpio = GPIO_PTA7,
1228 .last_gpio = GPIO_FN_STATUS1,
1229
1230 .gpios = pinmux_gpios,
1231 .cfg_regs = pinmux_config_regs,
1232 .data_regs = pinmux_data_regs,
1233
1234 .gpio_data = pinmux_data,
1235 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1236};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7722.c b/drivers/pinctrl/sh-pfc/pfc-sh7722.c
new file mode 100644
index 000000000000..2de0929315e6
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7722.c
@@ -0,0 +1,1779 @@
1#include <linux/init.h>
2#include <linux/kernel.h>
3#include <linux/gpio.h>
4#include <cpu/sh7722.h>
5
6#include "sh_pfc.h"
7
8enum {
9 PINMUX_RESERVED = 0,
10
11 PINMUX_DATA_BEGIN,
12 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
13 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA,
14 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
15 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA,
16 PTC7_DATA, PTC5_DATA, PTC4_DATA, PTC3_DATA, PTC2_DATA, PTC0_DATA,
17 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
18 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA,
19 PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA, PTE1_DATA, PTE0_DATA,
20 PTF6_DATA, PTF5_DATA, PTF4_DATA,
21 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA,
22 PTG4_DATA, PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA,
23 PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
24 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
25 PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, PTJ1_DATA, PTJ0_DATA,
26 PTK6_DATA, PTK5_DATA, PTK4_DATA,
27 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
28 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
29 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA,
30 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
31 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
32 PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
33 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA,
34 PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
35 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA,
36 PTR4_DATA, PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
37 PTS4_DATA, PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
38 PTT4_DATA, PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
39 PTU4_DATA, PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
40 PTV4_DATA, PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA,
41 PTW6_DATA, PTW5_DATA, PTW4_DATA,
42 PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA,
43 PTX6_DATA, PTX5_DATA, PTX4_DATA,
44 PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA,
45 PTY6_DATA, PTY5_DATA, PTY4_DATA,
46 PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA,
47 PTZ5_DATA, PTZ4_DATA, PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA,
48 PINMUX_DATA_END,
49
50 PINMUX_INPUT_BEGIN,
51 PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN,
52 PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN,
53 PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN,
54 PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN,
55 PTC7_IN, PTC5_IN, PTC4_IN, PTC3_IN, PTC2_IN, PTC0_IN,
56 PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN, PTD3_IN, PTD2_IN, PTD1_IN,
57 PTE7_IN, PTE6_IN, PTE5_IN, PTE4_IN, PTE1_IN, PTE0_IN,
58 PTF6_IN, PTF5_IN, PTF4_IN, PTF3_IN, PTF2_IN, PTF1_IN,
59 PTH6_IN, PTH5_IN, PTH1_IN, PTH0_IN,
60 PTJ1_IN, PTJ0_IN,
61 PTK6_IN, PTK5_IN, PTK4_IN, PTK3_IN, PTK2_IN, PTK0_IN,
62 PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN,
63 PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN,
64 PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN,
65 PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
66 PTN7_IN, PTN6_IN, PTN5_IN, PTN4_IN,
67 PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN,
68 PTQ5_IN, PTQ4_IN, PTQ3_IN, PTQ2_IN, PTQ0_IN,
69 PTR2_IN,
70 PTS4_IN, PTS2_IN, PTS1_IN,
71 PTT4_IN, PTT3_IN, PTT2_IN, PTT1_IN,
72 PTU4_IN, PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
73 PTV4_IN, PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
74 PTW6_IN, PTW4_IN, PTW3_IN, PTW2_IN, PTW1_IN, PTW0_IN,
75 PTX6_IN, PTX5_IN, PTX4_IN, PTX3_IN, PTX2_IN, PTX1_IN, PTX0_IN,
76 PTY5_IN, PTY4_IN, PTY3_IN, PTY2_IN, PTY0_IN,
77 PTZ5_IN, PTZ4_IN, PTZ3_IN, PTZ2_IN, PTZ1_IN,
78 PINMUX_INPUT_END,
79
80 PINMUX_INPUT_PULLDOWN_BEGIN,
81 PTA7_IN_PD, PTA6_IN_PD, PTA5_IN_PD, PTA4_IN_PD,
82 PTA3_IN_PD, PTA2_IN_PD, PTA1_IN_PD, PTA0_IN_PD,
83 PTE7_IN_PD, PTE6_IN_PD, PTE5_IN_PD, PTE4_IN_PD, PTE1_IN_PD, PTE0_IN_PD,
84 PTF6_IN_PD, PTF5_IN_PD, PTF4_IN_PD, PTF3_IN_PD, PTF2_IN_PD, PTF1_IN_PD,
85 PTH6_IN_PD, PTH5_IN_PD, PTH1_IN_PD, PTH0_IN_PD,
86 PTK6_IN_PD, PTK5_IN_PD, PTK4_IN_PD, PTK3_IN_PD, PTK2_IN_PD, PTK0_IN_PD,
87 PTL7_IN_PD, PTL6_IN_PD, PTL5_IN_PD, PTL4_IN_PD,
88 PTL3_IN_PD, PTL2_IN_PD, PTL1_IN_PD, PTL0_IN_PD,
89 PTM7_IN_PD, PTM6_IN_PD, PTM5_IN_PD, PTM4_IN_PD,
90 PTM3_IN_PD, PTM2_IN_PD, PTM1_IN_PD, PTM0_IN_PD,
91 PTQ5_IN_PD, PTQ4_IN_PD, PTQ3_IN_PD, PTQ2_IN_PD,
92 PTS4_IN_PD, PTS2_IN_PD, PTS1_IN_PD,
93 PTT4_IN_PD, PTT3_IN_PD, PTT2_IN_PD, PTT1_IN_PD,
94 PTU4_IN_PD, PTU3_IN_PD, PTU2_IN_PD, PTU1_IN_PD, PTU0_IN_PD,
95 PTV4_IN_PD, PTV3_IN_PD, PTV2_IN_PD, PTV1_IN_PD, PTV0_IN_PD,
96 PTW6_IN_PD, PTW4_IN_PD, PTW3_IN_PD, PTW2_IN_PD, PTW1_IN_PD, PTW0_IN_PD,
97 PTX6_IN_PD, PTX5_IN_PD, PTX4_IN_PD,
98 PTX3_IN_PD, PTX2_IN_PD, PTX1_IN_PD, PTX0_IN_PD,
99 PINMUX_INPUT_PULLDOWN_END,
100
101 PINMUX_INPUT_PULLUP_BEGIN,
102 PTC7_IN_PU, PTC5_IN_PU,
103 PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
104 PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU,
105 PTJ1_IN_PU, PTJ0_IN_PU,
106 PTQ0_IN_PU,
107 PTR2_IN_PU,
108 PTX6_IN_PU,
109 PTY5_IN_PU, PTY4_IN_PU, PTY3_IN_PU, PTY2_IN_PU, PTY0_IN_PU,
110 PTZ5_IN_PU, PTZ4_IN_PU, PTZ3_IN_PU, PTZ2_IN_PU, PTZ1_IN_PU,
111 PINMUX_INPUT_PULLUP_END,
112
113 PINMUX_OUTPUT_BEGIN,
114 PTA7_OUT, PTA5_OUT,
115 PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
116 PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT,
117 PTC4_OUT, PTC3_OUT, PTC2_OUT, PTC0_OUT,
118 PTD6_OUT, PTD5_OUT, PTD4_OUT,
119 PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT,
120 PTE7_OUT, PTE6_OUT, PTE5_OUT, PTE4_OUT, PTE1_OUT, PTE0_OUT,
121 PTF6_OUT, PTF5_OUT, PTF4_OUT, PTF3_OUT, PTF2_OUT, PTF0_OUT,
122 PTG4_OUT, PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT,
123 PTH7_OUT, PTH6_OUT, PTH5_OUT, PTH4_OUT,
124 PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
125 PTJ7_OUT, PTJ6_OUT, PTJ5_OUT, PTJ1_OUT, PTJ0_OUT,
126 PTK6_OUT, PTK5_OUT, PTK4_OUT, PTK3_OUT, PTK1_OUT, PTK0_OUT,
127 PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT,
128 PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT,
129 PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT,
130 PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
131 PTN7_OUT, PTN6_OUT, PTN5_OUT, PTN4_OUT,
132 PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT, PTQ6_OUT, PTQ5_OUT, PTQ4_OUT,
133 PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT,
134 PTR4_OUT, PTR3_OUT, PTR1_OUT, PTR0_OUT,
135 PTS3_OUT, PTS2_OUT, PTS0_OUT,
136 PTT4_OUT, PTT3_OUT, PTT2_OUT, PTT0_OUT,
137 PTU4_OUT, PTU3_OUT, PTU2_OUT, PTU0_OUT,
138 PTV4_OUT, PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT,
139 PTW5_OUT, PTW4_OUT, PTW3_OUT, PTW2_OUT, PTW1_OUT, PTW0_OUT,
140 PTX6_OUT, PTX5_OUT, PTX4_OUT, PTX3_OUT, PTX2_OUT, PTX1_OUT, PTX0_OUT,
141 PTY5_OUT, PTY4_OUT, PTY3_OUT, PTY2_OUT, PTY1_OUT, PTY0_OUT,
142 PINMUX_OUTPUT_END,
143
144 PINMUX_MARK_BEGIN,
145 SCIF0_TXD_MARK, SCIF0_RXD_MARK,
146 SCIF0_RTS_MARK, SCIF0_CTS_MARK, SCIF0_SCK_MARK,
147 SCIF1_TXD_MARK, SCIF1_RXD_MARK,
148 SCIF1_RTS_MARK, SCIF1_CTS_MARK, SCIF1_SCK_MARK,
149 SCIF2_TXD_MARK, SCIF2_RXD_MARK,
150 SCIF2_RTS_MARK, SCIF2_CTS_MARK, SCIF2_SCK_MARK,
151 SIOTXD_MARK, SIORXD_MARK,
152 SIOD_MARK, SIOSTRB0_MARK, SIOSTRB1_MARK,
153 SIOSCK_MARK, SIOMCK_MARK,
154 VIO_D15_MARK, VIO_D14_MARK, VIO_D13_MARK, VIO_D12_MARK,
155 VIO_D11_MARK, VIO_D10_MARK, VIO_D9_MARK, VIO_D8_MARK,
156 VIO_D7_MARK, VIO_D6_MARK, VIO_D5_MARK, VIO_D4_MARK,
157 VIO_D3_MARK, VIO_D2_MARK, VIO_D1_MARK, VIO_D0_MARK,
158 VIO_CLK_MARK, VIO_VD_MARK, VIO_HD_MARK, VIO_FLD_MARK,
159 VIO_CKO_MARK, VIO_STEX_MARK, VIO_STEM_MARK, VIO_VD2_MARK,
160 VIO_HD2_MARK, VIO_CLK2_MARK,
161 LCDD23_MARK, LCDD22_MARK, LCDD21_MARK, LCDD20_MARK,
162 LCDD19_MARK, LCDD18_MARK, LCDD17_MARK, LCDD16_MARK,
163 LCDD15_MARK, LCDD14_MARK, LCDD13_MARK, LCDD12_MARK,
164 LCDD11_MARK, LCDD10_MARK, LCDD9_MARK, LCDD8_MARK,
165 LCDD7_MARK, LCDD6_MARK, LCDD5_MARK, LCDD4_MARK,
166 LCDD3_MARK, LCDD2_MARK, LCDD1_MARK, LCDD0_MARK,
167 LCDLCLK_MARK, LCDDON_MARK, LCDVCPWC_MARK, LCDVEPWC_MARK,
168 LCDVSYN_MARK, LCDDCK_MARK, LCDHSYN_MARK, LCDDISP_MARK,
169 LCDRS_MARK, LCDCS_MARK, LCDWR_MARK, LCDRD_MARK,
170 LCDDON2_MARK, LCDVCPWC2_MARK, LCDVEPWC2_MARK, LCDVSYN2_MARK,
171 LCDCS2_MARK,
172 IOIS16_MARK, A25_MARK, A24_MARK, A23_MARK, A22_MARK,
173 BS_MARK, CS6B_CE1B_MARK, WAIT_MARK, CS6A_CE2B_MARK,
174 HPD63_MARK, HPD62_MARK, HPD61_MARK, HPD60_MARK,
175 HPD59_MARK, HPD58_MARK, HPD57_MARK, HPD56_MARK,
176 HPD55_MARK, HPD54_MARK, HPD53_MARK, HPD52_MARK,
177 HPD51_MARK, HPD50_MARK, HPD49_MARK, HPD48_MARK,
178 HPDQM7_MARK, HPDQM6_MARK, HPDQM5_MARK, HPDQM4_MARK,
179 IRQ0_MARK, IRQ1_MARK, IRQ2_MARK, IRQ3_MARK,
180 IRQ4_MARK, IRQ5_MARK, IRQ6_MARK, IRQ7_MARK,
181 SDHICD_MARK, SDHIWP_MARK, SDHID3_MARK, SDHID2_MARK,
182 SDHID1_MARK, SDHID0_MARK, SDHICMD_MARK, SDHICLK_MARK,
183 SIUAOLR_MARK, SIUAOBT_MARK, SIUAISLD_MARK, SIUAILR_MARK,
184 SIUAIBT_MARK, SIUAOSLD_MARK, SIUMCKA_MARK, SIUFCKA_MARK,
185 SIUBOLR_MARK, SIUBOBT_MARK, SIUBISLD_MARK, SIUBILR_MARK,
186 SIUBIBT_MARK, SIUBOSLD_MARK, SIUMCKB_MARK, SIUFCKB_MARK,
187 AUDSYNC_MARK, AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK,
188 DACK_MARK, DREQ0_MARK,
189 DV_CLKI_MARK, DV_CLK_MARK, DV_HSYNC_MARK, DV_VSYNC_MARK,
190 DV_D15_MARK, DV_D14_MARK, DV_D13_MARK, DV_D12_MARK,
191 DV_D11_MARK, DV_D10_MARK, DV_D9_MARK, DV_D8_MARK,
192 DV_D7_MARK, DV_D6_MARK, DV_D5_MARK, DV_D4_MARK,
193 DV_D3_MARK, DV_D2_MARK, DV_D1_MARK, DV_D0_MARK,
194 STATUS0_MARK, PDSTATUS_MARK,
195 SIOF0_MCK_MARK, SIOF0_SCK_MARK,
196 SIOF0_SYNC_MARK, SIOF0_SS1_MARK, SIOF0_SS2_MARK,
197 SIOF0_TXD_MARK, SIOF0_RXD_MARK,
198 SIOF1_MCK_MARK, SIOF1_SCK_MARK,
199 SIOF1_SYNC_MARK, SIOF1_SS1_MARK, SIOF1_SS2_MARK,
200 SIOF1_TXD_MARK, SIOF1_RXD_MARK,
201 SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK,
202 TS_SDAT_MARK, TS_SCK_MARK, TS_SDEN_MARK, TS_SPSYNC_MARK,
203 IRDA_IN_MARK, IRDA_OUT_MARK,
204 TPUTO_MARK,
205 FCE_MARK, NAF7_MARK, NAF6_MARK, NAF5_MARK, NAF4_MARK,
206 NAF3_MARK, NAF2_MARK, NAF1_MARK, NAF0_MARK, FCDE_MARK,
207 FOE_MARK, FSC_MARK, FWE_MARK, FRB_MARK,
208 KEYIN0_MARK, KEYIN1_MARK, KEYIN2_MARK, KEYIN3_MARK, KEYIN4_MARK,
209 KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
210 KEYOUT4_IN6_MARK, KEYOUT5_IN5_MARK,
211 PINMUX_MARK_END,
212
213 PINMUX_FUNCTION_BEGIN,
214 VIO_D7_SCIF1_SCK, VIO_D6_SCIF1_RXD, VIO_D5_SCIF1_TXD, VIO_D4,
215 VIO_D3, VIO_D2, VIO_D1, VIO_D0_LCDLCLK,
216 HPD55, HPD54, HPD53, HPD52, HPD51, HPD50, HPD49, HPD48,
217 IOIS16, HPDQM7, HPDQM6, HPDQM5, HPDQM4,
218 SDHICD, SDHIWP, SDHID3, IRQ2_SDHID2, SDHID1, SDHID0, SDHICMD, SDHICLK,
219 A25, A24, A23, A22, IRQ5, IRQ4_BS,
220 PTF6, SIOSCK_SIUBOBT, SIOSTRB1_SIUBOLR,
221 SIOSTRB0_SIUBIBT, SIOD_SIUBILR, SIORXD_SIUBISLD, SIOTXD_SIUBOSLD,
222 AUDSYNC, AUDATA3, AUDATA2, AUDATA1, AUDATA0,
223 LCDVCPWC_LCDVCPWC2, LCDVSYN2_DACK, LCDVSYN, LCDDISP_LCDRS,
224 LCDHSYN_LCDCS, LCDDON_LCDDON2, LCDD17_DV_HSYNC, LCDD16_DV_VSYNC,
225 STATUS0, PDSTATUS, IRQ1, IRQ0,
226 SIUAILR_SIOF1_SS2, SIUAIBT_SIOF1_SS1, SIUAOLR_SIOF1_SYNC,
227 SIUAOBT_SIOF1_SCK, SIUAISLD_SIOF1_RXD, SIUAOSLD_SIOF1_TXD, PTK0,
228 LCDD15_DV_D15, LCDD14_DV_D14, LCDD13_DV_D13, LCDD12_DV_D12,
229 LCDD11_DV_D11, LCDD10_DV_D10, LCDD9_DV_D9, LCDD8_DV_D8,
230 LCDD7_DV_D7, LCDD6_DV_D6, LCDD5_DV_D5, LCDD4_DV_D4,
231 LCDD3_DV_D3, LCDD2_DV_D2, LCDD1_DV_D1, LCDD0_DV_D0,
232 HPD63, HPD62, HPD61, HPD60, HPD59, HPD58, HPD57, HPD56,
233 SIOF0_SS2_SIM_RST, SIOF0_SS1_TS_SPSYNC, SIOF0_SYNC_TS_SDEN,
234 SIOF0_SCK_TS_SCK, PTQ2, PTQ1, PTQ0,
235 LCDRD, CS6B_CE1B_LCDCS2, WAIT, LCDDCK_LCDWR, LCDVEPWC_LCDVEPWC2,
236 SCIF0_CTS_SIUAISPD, SCIF0_RTS_SIUAOSPD,
237 SCIF0_SCK_TPUTO, SCIF0_RXD, SCIF0_TXD,
238 FOE_VIO_VD2, FWE, FSC, DREQ0, FCDE,
239 NAF2_VIO_D10, NAF1_VIO_D9, NAF0_VIO_D8,
240 FRB_VIO_CLK2, FCE_VIO_HD2,
241 NAF7_VIO_D15, NAF6_VIO_D14, NAF5_VIO_D13, NAF4_VIO_D12, NAF3_VIO_D11,
242 VIO_FLD_SCIF2_CTS, VIO_CKO_SCIF2_RTS, VIO_STEX_SCIF2_SCK,
243 VIO_STEM_SCIF2_TXD, VIO_HD_SCIF2_RXD,
244 VIO_VD_SCIF1_CTS, VIO_CLK_SCIF1_RTS,
245 CS6A_CE2B, LCDD23, LCDD22, LCDD21, LCDD20,
246 LCDD19_DV_CLKI, LCDD18_DV_CLK,
247 KEYOUT5_IN5, KEYOUT4_IN6, KEYOUT3, KEYOUT2, KEYOUT1, KEYOUT0,
248 KEYIN4_IRQ7, KEYIN3, KEYIN2, KEYIN1, KEYIN0_IRQ6,
249
250 PSA15_KEYIN0, PSA15_IRQ6, PSA14_KEYIN4, PSA14_IRQ7,
251 PSA9_IRQ4, PSA9_BS, PSA4_IRQ2, PSA4_SDHID2,
252 PSB15_SIOTXD, PSB15_SIUBOSLD, PSB14_SIORXD, PSB14_SIUBISLD,
253 PSB13_SIOD, PSB13_SIUBILR, PSB12_SIOSTRB0, PSB12_SIUBIBT,
254 PSB11_SIOSTRB1, PSB11_SIUBOLR, PSB10_SIOSCK, PSB10_SIUBOBT,
255 PSB9_SIOMCK, PSB9_SIUMCKB, PSB8_SIOF0_MCK, PSB8_IRQ3,
256 PSB7_SIOF0_TXD, PSB7_IRDA_OUT, PSB6_SIOF0_RXD, PSB6_IRDA_IN,
257 PSB5_SIOF0_SCK, PSB5_TS_SCK, PSB4_SIOF0_SYNC, PSB4_TS_SDEN,
258 PSB3_SIOF0_SS1, PSB3_TS_SPSYNC, PSB2_SIOF0_SS2, PSB2_SIM_RST,
259 PSB1_SIUMCKA, PSB1_SIOF1_MCK, PSB0_SIUAOSLD, PSB0_SIOF1_TXD,
260 PSC15_SIUAISLD, PSC15_SIOF1_RXD, PSC14_SIUAOBT, PSC14_SIOF1_SCK,
261 PSC13_SIUAOLR, PSC13_SIOF1_SYNC, PSC12_SIUAIBT, PSC12_SIOF1_SS1,
262 PSC11_SIUAILR, PSC11_SIOF1_SS2, PSC0_NAF, PSC0_VIO,
263 PSD13_VIO, PSD13_SCIF2, PSD12_VIO, PSD12_SCIF1,
264 PSD11_VIO, PSD11_SCIF1, PSD10_VIO_D0, PSD10_LCDLCLK,
265 PSD9_SIOMCK_SIUMCKB, PSD9_SIUFCKB, PSD8_SCIF0_SCK, PSD8_TPUTO,
266 PSD7_SCIF0_RTS, PSD7_SIUAOSPD, PSD6_SCIF0_CTS, PSD6_SIUAISPD,
267 PSD5_CS6B_CE1B, PSD5_LCDCS2,
268 PSD3_LCDVEPWC_LCDVCPWC, PSD3_LCDVEPWC2_LCDVCPWC2,
269 PSD2_LCDDON, PSD2_LCDDON2, PSD0_LCDD19_LCDD0, PSD0_DV,
270 PSE15_SIOF0_MCK_IRQ3, PSE15_SIM_D,
271 PSE14_SIOF0_TXD_IRDA_OUT, PSE14_SIM_CLK,
272 PSE13_SIOF0_RXD_IRDA_IN, PSE13_TS_SDAT, PSE12_LCDVSYN2, PSE12_DACK,
273 PSE11_SIUMCKA_SIOF1_MCK, PSE11_SIUFCKA,
274 PSE3_FLCTL, PSE3_VIO, PSE2_NAF2, PSE2_VIO_D10,
275 PSE1_NAF1, PSE1_VIO_D9, PSE0_NAF0, PSE0_VIO_D8,
276
277 HIZA14_KEYSC, HIZA14_HIZ,
278 HIZA10_NAF, HIZA10_HIZ,
279 HIZA9_VIO, HIZA9_HIZ,
280 HIZA8_LCDC, HIZA8_HIZ,
281 HIZA7_LCDC, HIZA7_HIZ,
282 HIZA6_LCDC, HIZA6_HIZ,
283 HIZB4_SIUA, HIZB4_HIZ,
284 HIZB1_VIO, HIZB1_HIZ,
285 HIZB0_VIO, HIZB0_HIZ,
286 HIZC15_IRQ7, HIZC15_HIZ,
287 HIZC14_IRQ6, HIZC14_HIZ,
288 HIZC13_IRQ5, HIZC13_HIZ,
289 HIZC12_IRQ4, HIZC12_HIZ,
290 HIZC11_IRQ3, HIZC11_HIZ,
291 HIZC10_IRQ2, HIZC10_HIZ,
292 HIZC9_IRQ1, HIZC9_HIZ,
293 HIZC8_IRQ0, HIZC8_HIZ,
294 MSELB9_VIO, MSELB9_VIO2,
295 MSELB8_RGB, MSELB8_SYS,
296 PINMUX_FUNCTION_END,
297};
298
299static pinmux_enum_t pinmux_data[] = {
300 /* PTA */
301 PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_IN_PD, PTA7_OUT),
302 PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_IN_PD),
303 PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_IN_PD, PTA5_OUT),
304 PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_IN_PD),
305 PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_IN_PD),
306 PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_IN_PD),
307 PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_IN_PD),
308 PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_IN_PD),
309
310 /* PTB */
311 PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
312 PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT),
313 PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT),
314 PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT),
315 PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT),
316 PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT),
317 PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT),
318 PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT),
319
320 /* PTC */
321 PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_IN_PU),
322 PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_IN_PU),
323 PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT),
324 PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT),
325 PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT),
326 PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT),
327
328 /* PTD */
329 PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_IN_PU),
330 PINMUX_DATA(PTD6_DATA, PTD6_OUT, PTD6_IN, PTD6_IN_PU),
331 PINMUX_DATA(PTD5_DATA, PTD5_OUT, PTD5_IN, PTD5_IN_PU),
332 PINMUX_DATA(PTD4_DATA, PTD4_OUT, PTD4_IN, PTD4_IN_PU),
333 PINMUX_DATA(PTD3_DATA, PTD3_OUT, PTD3_IN, PTD3_IN_PU),
334 PINMUX_DATA(PTD2_DATA, PTD2_OUT, PTD2_IN, PTD2_IN_PU),
335 PINMUX_DATA(PTD1_DATA, PTD1_OUT, PTD1_IN, PTD1_IN_PU),
336 PINMUX_DATA(PTD0_DATA, PTD0_OUT),
337
338 /* PTE */
339 PINMUX_DATA(PTE7_DATA, PTE7_OUT, PTE7_IN, PTE7_IN_PD),
340 PINMUX_DATA(PTE6_DATA, PTE6_OUT, PTE6_IN, PTE6_IN_PD),
341 PINMUX_DATA(PTE5_DATA, PTE5_OUT, PTE5_IN, PTE5_IN_PD),
342 PINMUX_DATA(PTE4_DATA, PTE4_OUT, PTE4_IN, PTE4_IN_PD),
343 PINMUX_DATA(PTE1_DATA, PTE1_OUT, PTE1_IN, PTE1_IN_PD),
344 PINMUX_DATA(PTE0_DATA, PTE0_OUT, PTE0_IN, PTE0_IN_PD),
345
346 /* PTF */
347 PINMUX_DATA(PTF6_DATA, PTF6_OUT, PTF6_IN, PTF6_IN_PD),
348 PINMUX_DATA(PTF5_DATA, PTF5_OUT, PTF5_IN, PTF5_IN_PD),
349 PINMUX_DATA(PTF4_DATA, PTF4_OUT, PTF4_IN, PTF4_IN_PD),
350 PINMUX_DATA(PTF3_DATA, PTF3_OUT, PTF3_IN, PTF3_IN_PD),
351 PINMUX_DATA(PTF2_DATA, PTF2_OUT, PTF2_IN, PTF2_IN_PD),
352 PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_IN_PD),
353 PINMUX_DATA(PTF0_DATA, PTF0_OUT),
354
355 /* PTG */
356 PINMUX_DATA(PTG4_DATA, PTG4_OUT),
357 PINMUX_DATA(PTG3_DATA, PTG3_OUT),
358 PINMUX_DATA(PTG2_DATA, PTG2_OUT),
359 PINMUX_DATA(PTG1_DATA, PTG1_OUT),
360 PINMUX_DATA(PTG0_DATA, PTG0_OUT),
361
362 /* PTH */
363 PINMUX_DATA(PTH7_DATA, PTH7_OUT),
364 PINMUX_DATA(PTH6_DATA, PTH6_OUT, PTH6_IN, PTH6_IN_PD),
365 PINMUX_DATA(PTH5_DATA, PTH5_OUT, PTH5_IN, PTH5_IN_PD),
366 PINMUX_DATA(PTH4_DATA, PTH4_OUT),
367 PINMUX_DATA(PTH3_DATA, PTH3_OUT),
368 PINMUX_DATA(PTH2_DATA, PTH2_OUT),
369 PINMUX_DATA(PTH1_DATA, PTH1_OUT, PTH1_IN, PTH1_IN_PD),
370 PINMUX_DATA(PTH0_DATA, PTH0_OUT, PTH0_IN, PTH0_IN_PD),
371
372 /* PTJ */
373 PINMUX_DATA(PTJ7_DATA, PTJ7_OUT),
374 PINMUX_DATA(PTJ6_DATA, PTJ6_OUT),
375 PINMUX_DATA(PTJ5_DATA, PTJ5_OUT),
376 PINMUX_DATA(PTJ1_DATA, PTJ1_OUT, PTJ1_IN, PTJ1_IN_PU),
377 PINMUX_DATA(PTJ0_DATA, PTJ0_OUT, PTJ0_IN, PTJ0_IN_PU),
378
379 /* PTK */
380 PINMUX_DATA(PTK6_DATA, PTK6_OUT, PTK6_IN, PTK6_IN_PD),
381 PINMUX_DATA(PTK5_DATA, PTK5_OUT, PTK5_IN, PTK5_IN_PD),
382 PINMUX_DATA(PTK4_DATA, PTK4_OUT, PTK4_IN, PTK4_IN_PD),
383 PINMUX_DATA(PTK3_DATA, PTK3_OUT, PTK3_IN, PTK3_IN_PD),
384 PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_IN_PD),
385 PINMUX_DATA(PTK1_DATA, PTK1_OUT),
386 PINMUX_DATA(PTK0_DATA, PTK0_OUT, PTK0_IN, PTK0_IN_PD),
387
388 /* PTL */
389 PINMUX_DATA(PTL7_DATA, PTL7_OUT, PTL7_IN, PTL7_IN_PD),
390 PINMUX_DATA(PTL6_DATA, PTL6_OUT, PTL6_IN, PTL6_IN_PD),
391 PINMUX_DATA(PTL5_DATA, PTL5_OUT, PTL5_IN, PTL5_IN_PD),
392 PINMUX_DATA(PTL4_DATA, PTL4_OUT, PTL4_IN, PTL4_IN_PD),
393 PINMUX_DATA(PTL3_DATA, PTL3_OUT, PTL3_IN, PTL3_IN_PD),
394 PINMUX_DATA(PTL2_DATA, PTL2_OUT, PTL2_IN, PTL2_IN_PD),
395 PINMUX_DATA(PTL1_DATA, PTL1_OUT, PTL1_IN, PTL1_IN_PD),
396 PINMUX_DATA(PTL0_DATA, PTL0_OUT, PTL0_IN, PTL0_IN_PD),
397
398 /* PTM */
399 PINMUX_DATA(PTM7_DATA, PTM7_OUT, PTM7_IN, PTM7_IN_PD),
400 PINMUX_DATA(PTM6_DATA, PTM6_OUT, PTM6_IN, PTM6_IN_PD),
401 PINMUX_DATA(PTM5_DATA, PTM5_OUT, PTM5_IN, PTM5_IN_PD),
402 PINMUX_DATA(PTM4_DATA, PTM4_OUT, PTM4_IN, PTM4_IN_PD),
403 PINMUX_DATA(PTM3_DATA, PTM3_OUT, PTM3_IN, PTM3_IN_PD),
404 PINMUX_DATA(PTM2_DATA, PTM2_OUT, PTM2_IN, PTM2_IN_PD),
405 PINMUX_DATA(PTM1_DATA, PTM1_OUT, PTM1_IN, PTM1_IN_PD),
406 PINMUX_DATA(PTM0_DATA, PTM0_OUT, PTM0_IN, PTM0_IN_PD),
407
408 /* PTN */
409 PINMUX_DATA(PTN7_DATA, PTN7_OUT, PTN7_IN),
410 PINMUX_DATA(PTN6_DATA, PTN6_OUT, PTN6_IN),
411 PINMUX_DATA(PTN5_DATA, PTN5_OUT, PTN5_IN),
412 PINMUX_DATA(PTN4_DATA, PTN4_OUT, PTN4_IN),
413 PINMUX_DATA(PTN3_DATA, PTN3_OUT, PTN3_IN),
414 PINMUX_DATA(PTN2_DATA, PTN2_OUT, PTN2_IN),
415 PINMUX_DATA(PTN1_DATA, PTN1_OUT, PTN1_IN),
416 PINMUX_DATA(PTN0_DATA, PTN0_OUT, PTN0_IN),
417
418 /* PTQ */
419 PINMUX_DATA(PTQ6_DATA, PTQ6_OUT),
420 PINMUX_DATA(PTQ5_DATA, PTQ5_OUT, PTQ5_IN, PTQ5_IN_PD),
421 PINMUX_DATA(PTQ4_DATA, PTQ4_OUT, PTQ4_IN, PTQ4_IN_PD),
422 PINMUX_DATA(PTQ3_DATA, PTQ3_OUT, PTQ3_IN, PTQ3_IN_PD),
423 PINMUX_DATA(PTQ2_DATA, PTQ2_IN, PTQ2_IN_PD),
424 PINMUX_DATA(PTQ1_DATA, PTQ1_OUT),
425 PINMUX_DATA(PTQ0_DATA, PTQ0_OUT, PTQ0_IN, PTQ0_IN_PU),
426
427 /* PTR */
428 PINMUX_DATA(PTR4_DATA, PTR4_OUT),
429 PINMUX_DATA(PTR3_DATA, PTR3_OUT),
430 PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_IN_PU),
431 PINMUX_DATA(PTR1_DATA, PTR1_OUT),
432 PINMUX_DATA(PTR0_DATA, PTR0_OUT),
433
434 /* PTS */
435 PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_IN_PD),
436 PINMUX_DATA(PTS3_DATA, PTS3_OUT),
437 PINMUX_DATA(PTS2_DATA, PTS2_OUT, PTS2_IN, PTS2_IN_PD),
438 PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_IN_PD),
439 PINMUX_DATA(PTS0_DATA, PTS0_OUT),
440
441 /* PTT */
442 PINMUX_DATA(PTT4_DATA, PTT4_OUT, PTT4_IN, PTT4_IN_PD),
443 PINMUX_DATA(PTT3_DATA, PTT3_OUT, PTT3_IN, PTT3_IN_PD),
444 PINMUX_DATA(PTT2_DATA, PTT2_OUT, PTT2_IN, PTT2_IN_PD),
445 PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_IN_PD),
446 PINMUX_DATA(PTT0_DATA, PTT0_OUT),
447
448 /* PTU */
449 PINMUX_DATA(PTU4_DATA, PTU4_OUT, PTU4_IN, PTU4_IN_PD),
450 PINMUX_DATA(PTU3_DATA, PTU3_OUT, PTU3_IN, PTU3_IN_PD),
451 PINMUX_DATA(PTU2_DATA, PTU2_OUT, PTU2_IN, PTU2_IN_PD),
452 PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_IN_PD),
453 PINMUX_DATA(PTU0_DATA, PTU0_OUT, PTU0_IN, PTU0_IN_PD),
454
455 /* PTV */
456 PINMUX_DATA(PTV4_DATA, PTV4_OUT, PTV4_IN, PTV4_IN_PD),
457 PINMUX_DATA(PTV3_DATA, PTV3_OUT, PTV3_IN, PTV3_IN_PD),
458 PINMUX_DATA(PTV2_DATA, PTV2_OUT, PTV2_IN, PTV2_IN_PD),
459 PINMUX_DATA(PTV1_DATA, PTV1_OUT, PTV1_IN, PTV1_IN_PD),
460 PINMUX_DATA(PTV0_DATA, PTV0_OUT, PTV0_IN, PTV0_IN_PD),
461
462 /* PTW */
463 PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_IN_PD),
464 PINMUX_DATA(PTW5_DATA, PTW5_OUT),
465 PINMUX_DATA(PTW4_DATA, PTW4_OUT, PTW4_IN, PTW4_IN_PD),
466 PINMUX_DATA(PTW3_DATA, PTW3_OUT, PTW3_IN, PTW3_IN_PD),
467 PINMUX_DATA(PTW2_DATA, PTW2_OUT, PTW2_IN, PTW2_IN_PD),
468 PINMUX_DATA(PTW1_DATA, PTW1_OUT, PTW1_IN, PTW1_IN_PD),
469 PINMUX_DATA(PTW0_DATA, PTW0_OUT, PTW0_IN, PTW0_IN_PD),
470
471 /* PTX */
472 PINMUX_DATA(PTX6_DATA, PTX6_OUT, PTX6_IN, PTX6_IN_PD),
473 PINMUX_DATA(PTX5_DATA, PTX5_OUT, PTX5_IN, PTX5_IN_PD),
474 PINMUX_DATA(PTX4_DATA, PTX4_OUT, PTX4_IN, PTX4_IN_PD),
475 PINMUX_DATA(PTX3_DATA, PTX3_OUT, PTX3_IN, PTX3_IN_PD),
476 PINMUX_DATA(PTX2_DATA, PTX2_OUT, PTX2_IN, PTX2_IN_PD),
477 PINMUX_DATA(PTX1_DATA, PTX1_OUT, PTX1_IN, PTX1_IN_PD),
478 PINMUX_DATA(PTX0_DATA, PTX0_OUT, PTX0_IN, PTX0_IN_PD),
479
480 /* PTY */
481 PINMUX_DATA(PTY5_DATA, PTY5_OUT, PTY5_IN, PTY5_IN_PU),
482 PINMUX_DATA(PTY4_DATA, PTY4_OUT, PTY4_IN, PTY4_IN_PU),
483 PINMUX_DATA(PTY3_DATA, PTY3_OUT, PTY3_IN, PTY3_IN_PU),
484 PINMUX_DATA(PTY2_DATA, PTY2_OUT, PTY2_IN, PTY2_IN_PU),
485 PINMUX_DATA(PTY1_DATA, PTY1_OUT),
486 PINMUX_DATA(PTY0_DATA, PTY0_OUT, PTY0_IN, PTY0_IN_PU),
487
488 /* PTZ */
489 PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_IN_PU),
490 PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_IN_PU),
491 PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_IN_PU),
492 PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_IN_PU),
493 PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_IN_PU),
494
495 /* SCIF0 */
496 PINMUX_DATA(SCIF0_TXD_MARK, SCIF0_TXD),
497 PINMUX_DATA(SCIF0_RXD_MARK, SCIF0_RXD),
498 PINMUX_DATA(SCIF0_RTS_MARK, PSD7_SCIF0_RTS, SCIF0_RTS_SIUAOSPD),
499 PINMUX_DATA(SCIF0_CTS_MARK, PSD6_SCIF0_CTS, SCIF0_CTS_SIUAISPD),
500 PINMUX_DATA(SCIF0_SCK_MARK, PSD8_SCIF0_SCK, SCIF0_SCK_TPUTO),
501
502 /* SCIF1 */
503 PINMUX_DATA(SCIF1_TXD_MARK, PSD11_SCIF1, VIO_D5_SCIF1_TXD),
504 PINMUX_DATA(SCIF1_RXD_MARK, PSD11_SCIF1, VIO_D6_SCIF1_RXD),
505 PINMUX_DATA(SCIF1_RTS_MARK, PSD12_SCIF1, VIO_CLK_SCIF1_RTS),
506 PINMUX_DATA(SCIF1_CTS_MARK, PSD12_SCIF1, VIO_VD_SCIF1_CTS),
507 PINMUX_DATA(SCIF1_SCK_MARK, PSD11_SCIF1, VIO_D7_SCIF1_SCK),
508
509 /* SCIF2 */
510 PINMUX_DATA(SCIF2_TXD_MARK, PSD13_SCIF2, VIO_STEM_SCIF2_TXD),
511 PINMUX_DATA(SCIF2_RXD_MARK, PSD13_SCIF2, VIO_HD_SCIF2_RXD),
512 PINMUX_DATA(SCIF2_RTS_MARK, PSD13_SCIF2, VIO_CKO_SCIF2_RTS),
513 PINMUX_DATA(SCIF2_CTS_MARK, PSD13_SCIF2, VIO_FLD_SCIF2_CTS),
514 PINMUX_DATA(SCIF2_SCK_MARK, PSD13_SCIF2, VIO_STEX_SCIF2_SCK),
515
516 /* SIO */
517 PINMUX_DATA(SIOTXD_MARK, PSB15_SIOTXD, SIOTXD_SIUBOSLD),
518 PINMUX_DATA(SIORXD_MARK, PSB14_SIORXD, SIORXD_SIUBISLD),
519 PINMUX_DATA(SIOD_MARK, PSB13_SIOD, SIOD_SIUBILR),
520 PINMUX_DATA(SIOSTRB0_MARK, PSB12_SIOSTRB0, SIOSTRB0_SIUBIBT),
521 PINMUX_DATA(SIOSTRB1_MARK, PSB11_SIOSTRB1, SIOSTRB1_SIUBOLR),
522 PINMUX_DATA(SIOSCK_MARK, PSB10_SIOSCK, SIOSCK_SIUBOBT),
523 PINMUX_DATA(SIOMCK_MARK, PSD9_SIOMCK_SIUMCKB, PSB9_SIOMCK, PTF6),
524
525 /* CEU */
526 PINMUX_DATA(VIO_D15_MARK, PSC0_VIO, HIZA10_NAF, NAF7_VIO_D15),
527 PINMUX_DATA(VIO_D14_MARK, PSC0_VIO, HIZA10_NAF, NAF6_VIO_D14),
528 PINMUX_DATA(VIO_D13_MARK, PSC0_VIO, HIZA10_NAF, NAF5_VIO_D13),
529 PINMUX_DATA(VIO_D12_MARK, PSC0_VIO, HIZA10_NAF, NAF4_VIO_D12),
530 PINMUX_DATA(VIO_D11_MARK, PSC0_VIO, HIZA10_NAF, NAF3_VIO_D11),
531 PINMUX_DATA(VIO_D10_MARK, PSE2_VIO_D10, HIZB0_VIO, NAF2_VIO_D10),
532 PINMUX_DATA(VIO_D9_MARK, PSE1_VIO_D9, HIZB0_VIO, NAF1_VIO_D9),
533 PINMUX_DATA(VIO_D8_MARK, PSE0_VIO_D8, HIZB0_VIO, NAF0_VIO_D8),
534 PINMUX_DATA(VIO_D7_MARK, PSD11_VIO, VIO_D7_SCIF1_SCK),
535 PINMUX_DATA(VIO_D6_MARK, PSD11_VIO, VIO_D6_SCIF1_RXD),
536 PINMUX_DATA(VIO_D5_MARK, PSD11_VIO, VIO_D5_SCIF1_TXD),
537 PINMUX_DATA(VIO_D4_MARK, VIO_D4),
538 PINMUX_DATA(VIO_D3_MARK, VIO_D3),
539 PINMUX_DATA(VIO_D2_MARK, VIO_D2),
540 PINMUX_DATA(VIO_D1_MARK, VIO_D1),
541 PINMUX_DATA(VIO_D0_MARK, PSD10_VIO_D0, VIO_D0_LCDLCLK),
542 PINMUX_DATA(VIO_CLK_MARK, PSD12_VIO, MSELB9_VIO, VIO_CLK_SCIF1_RTS),
543 PINMUX_DATA(VIO_VD_MARK, PSD12_VIO, MSELB9_VIO, VIO_VD_SCIF1_CTS),
544 PINMUX_DATA(VIO_HD_MARK, PSD13_VIO, MSELB9_VIO, VIO_HD_SCIF2_RXD),
545 PINMUX_DATA(VIO_FLD_MARK, PSD13_VIO, HIZA9_VIO, VIO_FLD_SCIF2_CTS),
546 PINMUX_DATA(VIO_CKO_MARK, PSD13_VIO, HIZA9_VIO, VIO_CKO_SCIF2_RTS),
547 PINMUX_DATA(VIO_STEX_MARK, PSD13_VIO, HIZA9_VIO, VIO_STEX_SCIF2_SCK),
548 PINMUX_DATA(VIO_STEM_MARK, PSD13_VIO, HIZA9_VIO, VIO_STEM_SCIF2_TXD),
549 PINMUX_DATA(VIO_VD2_MARK, PSE3_VIO, MSELB9_VIO2,
550 HIZB0_VIO, FOE_VIO_VD2),
551 PINMUX_DATA(VIO_HD2_MARK, PSE3_VIO, MSELB9_VIO2,
552 HIZB1_VIO, FCE_VIO_HD2),
553 PINMUX_DATA(VIO_CLK2_MARK, PSE3_VIO, MSELB9_VIO2,
554 HIZB1_VIO, FRB_VIO_CLK2),
555
556 /* LCDC */
557 PINMUX_DATA(LCDD23_MARK, HIZA8_LCDC, LCDD23),
558 PINMUX_DATA(LCDD22_MARK, HIZA8_LCDC, LCDD22),
559 PINMUX_DATA(LCDD21_MARK, HIZA8_LCDC, LCDD21),
560 PINMUX_DATA(LCDD20_MARK, HIZA8_LCDC, LCDD20),
561 PINMUX_DATA(LCDD19_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD19_DV_CLKI),
562 PINMUX_DATA(LCDD18_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD18_DV_CLK),
563 PINMUX_DATA(LCDD17_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC,
564 LCDD17_DV_HSYNC),
565 PINMUX_DATA(LCDD16_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC,
566 LCDD16_DV_VSYNC),
567 PINMUX_DATA(LCDD15_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD15_DV_D15),
568 PINMUX_DATA(LCDD14_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD14_DV_D14),
569 PINMUX_DATA(LCDD13_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD13_DV_D13),
570 PINMUX_DATA(LCDD12_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD12_DV_D12),
571 PINMUX_DATA(LCDD11_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD11_DV_D11),
572 PINMUX_DATA(LCDD10_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD10_DV_D10),
573 PINMUX_DATA(LCDD9_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD9_DV_D9),
574 PINMUX_DATA(LCDD8_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD8_DV_D8),
575 PINMUX_DATA(LCDD7_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD7_DV_D7),
576 PINMUX_DATA(LCDD6_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD6_DV_D6),
577 PINMUX_DATA(LCDD5_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD5_DV_D5),
578 PINMUX_DATA(LCDD4_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD4_DV_D4),
579 PINMUX_DATA(LCDD3_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD3_DV_D3),
580 PINMUX_DATA(LCDD2_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD2_DV_D2),
581 PINMUX_DATA(LCDD1_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD1_DV_D1),
582 PINMUX_DATA(LCDD0_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD0_DV_D0),
583 PINMUX_DATA(LCDLCLK_MARK, PSD10_LCDLCLK, VIO_D0_LCDLCLK),
584 /* Main LCD */
585 PINMUX_DATA(LCDDON_MARK, PSD2_LCDDON, HIZA7_LCDC, LCDDON_LCDDON2),
586 PINMUX_DATA(LCDVCPWC_MARK, PSD3_LCDVEPWC_LCDVCPWC,
587 HIZA6_LCDC, LCDVCPWC_LCDVCPWC2),
588 PINMUX_DATA(LCDVEPWC_MARK, PSD3_LCDVEPWC_LCDVCPWC,
589 HIZA6_LCDC, LCDVEPWC_LCDVEPWC2),
590 PINMUX_DATA(LCDVSYN_MARK, HIZA7_LCDC, LCDVSYN),
591 /* Main LCD - RGB Mode */
592 PINMUX_DATA(LCDDCK_MARK, MSELB8_RGB, HIZA8_LCDC, LCDDCK_LCDWR),
593 PINMUX_DATA(LCDHSYN_MARK, MSELB8_RGB, HIZA7_LCDC, LCDHSYN_LCDCS),
594 PINMUX_DATA(LCDDISP_MARK, MSELB8_RGB, HIZA7_LCDC, LCDDISP_LCDRS),
595 /* Main LCD - SYS Mode */
596 PINMUX_DATA(LCDRS_MARK, MSELB8_SYS, HIZA7_LCDC, LCDDISP_LCDRS),
597 PINMUX_DATA(LCDCS_MARK, MSELB8_SYS, HIZA7_LCDC, LCDHSYN_LCDCS),
598 PINMUX_DATA(LCDWR_MARK, MSELB8_SYS, HIZA8_LCDC, LCDDCK_LCDWR),
599 PINMUX_DATA(LCDRD_MARK, HIZA7_LCDC, LCDRD),
600 /* Sub LCD - SYS Mode */
601 PINMUX_DATA(LCDDON2_MARK, PSD2_LCDDON2, HIZA7_LCDC, LCDDON_LCDDON2),
602 PINMUX_DATA(LCDVCPWC2_MARK, PSD3_LCDVEPWC2_LCDVCPWC2,
603 HIZA6_LCDC, LCDVCPWC_LCDVCPWC2),
604 PINMUX_DATA(LCDVEPWC2_MARK, PSD3_LCDVEPWC2_LCDVCPWC2,
605 HIZA6_LCDC, LCDVEPWC_LCDVEPWC2),
606 PINMUX_DATA(LCDVSYN2_MARK, PSE12_LCDVSYN2, HIZA8_LCDC, LCDVSYN2_DACK),
607 PINMUX_DATA(LCDCS2_MARK, PSD5_LCDCS2, CS6B_CE1B_LCDCS2),
608
609 /* BSC */
610 PINMUX_DATA(IOIS16_MARK, IOIS16),
611 PINMUX_DATA(A25_MARK, A25),
612 PINMUX_DATA(A24_MARK, A24),
613 PINMUX_DATA(A23_MARK, A23),
614 PINMUX_DATA(A22_MARK, A22),
615 PINMUX_DATA(BS_MARK, PSA9_BS, IRQ4_BS),
616 PINMUX_DATA(CS6B_CE1B_MARK, PSD5_CS6B_CE1B, CS6B_CE1B_LCDCS2),
617 PINMUX_DATA(WAIT_MARK, WAIT),
618 PINMUX_DATA(CS6A_CE2B_MARK, CS6A_CE2B),
619
620 /* SBSC */
621 PINMUX_DATA(HPD63_MARK, HPD63),
622 PINMUX_DATA(HPD62_MARK, HPD62),
623 PINMUX_DATA(HPD61_MARK, HPD61),
624 PINMUX_DATA(HPD60_MARK, HPD60),
625 PINMUX_DATA(HPD59_MARK, HPD59),
626 PINMUX_DATA(HPD58_MARK, HPD58),
627 PINMUX_DATA(HPD57_MARK, HPD57),
628 PINMUX_DATA(HPD56_MARK, HPD56),
629 PINMUX_DATA(HPD55_MARK, HPD55),
630 PINMUX_DATA(HPD54_MARK, HPD54),
631 PINMUX_DATA(HPD53_MARK, HPD53),
632 PINMUX_DATA(HPD52_MARK, HPD52),
633 PINMUX_DATA(HPD51_MARK, HPD51),
634 PINMUX_DATA(HPD50_MARK, HPD50),
635 PINMUX_DATA(HPD49_MARK, HPD49),
636 PINMUX_DATA(HPD48_MARK, HPD48),
637 PINMUX_DATA(HPDQM7_MARK, HPDQM7),
638 PINMUX_DATA(HPDQM6_MARK, HPDQM6),
639 PINMUX_DATA(HPDQM5_MARK, HPDQM5),
640 PINMUX_DATA(HPDQM4_MARK, HPDQM4),
641
642 /* IRQ */
643 PINMUX_DATA(IRQ0_MARK, HIZC8_IRQ0, IRQ0),
644 PINMUX_DATA(IRQ1_MARK, HIZC9_IRQ1, IRQ1),
645 PINMUX_DATA(IRQ2_MARK, PSA4_IRQ2, HIZC10_IRQ2, IRQ2_SDHID2),
646 PINMUX_DATA(IRQ3_MARK, PSE15_SIOF0_MCK_IRQ3, PSB8_IRQ3,
647 HIZC11_IRQ3, PTQ0),
648 PINMUX_DATA(IRQ4_MARK, PSA9_IRQ4, HIZC12_IRQ4, IRQ4_BS),
649 PINMUX_DATA(IRQ5_MARK, HIZC13_IRQ5, IRQ5),
650 PINMUX_DATA(IRQ6_MARK, PSA15_IRQ6, HIZC14_IRQ6, KEYIN0_IRQ6),
651 PINMUX_DATA(IRQ7_MARK, PSA14_IRQ7, HIZC15_IRQ7, KEYIN4_IRQ7),
652
653 /* SDHI */
654 PINMUX_DATA(SDHICD_MARK, SDHICD),
655 PINMUX_DATA(SDHIWP_MARK, SDHIWP),
656 PINMUX_DATA(SDHID3_MARK, SDHID3),
657 PINMUX_DATA(SDHID2_MARK, PSA4_SDHID2, IRQ2_SDHID2),
658 PINMUX_DATA(SDHID1_MARK, SDHID1),
659 PINMUX_DATA(SDHID0_MARK, SDHID0),
660 PINMUX_DATA(SDHICMD_MARK, SDHICMD),
661 PINMUX_DATA(SDHICLK_MARK, SDHICLK),
662
663 /* SIU - Port A */
664 PINMUX_DATA(SIUAOLR_MARK, PSC13_SIUAOLR, HIZB4_SIUA, SIUAOLR_SIOF1_SYNC),
665 PINMUX_DATA(SIUAOBT_MARK, PSC14_SIUAOBT, HIZB4_SIUA, SIUAOBT_SIOF1_SCK),
666 PINMUX_DATA(SIUAISLD_MARK, PSC15_SIUAISLD, HIZB4_SIUA, SIUAISLD_SIOF1_RXD),
667 PINMUX_DATA(SIUAILR_MARK, PSC11_SIUAILR, HIZB4_SIUA, SIUAILR_SIOF1_SS2),
668 PINMUX_DATA(SIUAIBT_MARK, PSC12_SIUAIBT, HIZB4_SIUA, SIUAIBT_SIOF1_SS1),
669 PINMUX_DATA(SIUAOSLD_MARK, PSB0_SIUAOSLD, HIZB4_SIUA, SIUAOSLD_SIOF1_TXD),
670 PINMUX_DATA(SIUMCKA_MARK, PSE11_SIUMCKA_SIOF1_MCK, HIZB4_SIUA, PSB1_SIUMCKA, PTK0),
671 PINMUX_DATA(SIUFCKA_MARK, PSE11_SIUFCKA, HIZB4_SIUA, PTK0),
672
673 /* SIU - Port B */
674 PINMUX_DATA(SIUBOLR_MARK, PSB11_SIUBOLR, SIOSTRB1_SIUBOLR),
675 PINMUX_DATA(SIUBOBT_MARK, PSB10_SIUBOBT, SIOSCK_SIUBOBT),
676 PINMUX_DATA(SIUBISLD_MARK, PSB14_SIUBISLD, SIORXD_SIUBISLD),
677 PINMUX_DATA(SIUBILR_MARK, PSB13_SIUBILR, SIOD_SIUBILR),
678 PINMUX_DATA(SIUBIBT_MARK, PSB12_SIUBIBT, SIOSTRB0_SIUBIBT),
679 PINMUX_DATA(SIUBOSLD_MARK, PSB15_SIUBOSLD, SIOTXD_SIUBOSLD),
680 PINMUX_DATA(SIUMCKB_MARK, PSD9_SIOMCK_SIUMCKB, PSB9_SIUMCKB, PTF6),
681 PINMUX_DATA(SIUFCKB_MARK, PSD9_SIUFCKB, PTF6),
682
683 /* AUD */
684 PINMUX_DATA(AUDSYNC_MARK, AUDSYNC),
685 PINMUX_DATA(AUDATA3_MARK, AUDATA3),
686 PINMUX_DATA(AUDATA2_MARK, AUDATA2),
687 PINMUX_DATA(AUDATA1_MARK, AUDATA1),
688 PINMUX_DATA(AUDATA0_MARK, AUDATA0),
689
690 /* DMAC */
691 PINMUX_DATA(DACK_MARK, PSE12_DACK, LCDVSYN2_DACK),
692 PINMUX_DATA(DREQ0_MARK, DREQ0),
693
694 /* VOU */
695 PINMUX_DATA(DV_CLKI_MARK, PSD0_DV, LCDD19_DV_CLKI),
696 PINMUX_DATA(DV_CLK_MARK, PSD0_DV, LCDD18_DV_CLK),
697 PINMUX_DATA(DV_HSYNC_MARK, PSD0_DV, LCDD17_DV_HSYNC),
698 PINMUX_DATA(DV_VSYNC_MARK, PSD0_DV, LCDD16_DV_VSYNC),
699 PINMUX_DATA(DV_D15_MARK, PSD0_DV, LCDD15_DV_D15),
700 PINMUX_DATA(DV_D14_MARK, PSD0_DV, LCDD14_DV_D14),
701 PINMUX_DATA(DV_D13_MARK, PSD0_DV, LCDD13_DV_D13),
702 PINMUX_DATA(DV_D12_MARK, PSD0_DV, LCDD12_DV_D12),
703 PINMUX_DATA(DV_D11_MARK, PSD0_DV, LCDD11_DV_D11),
704 PINMUX_DATA(DV_D10_MARK, PSD0_DV, LCDD10_DV_D10),
705 PINMUX_DATA(DV_D9_MARK, PSD0_DV, LCDD9_DV_D9),
706 PINMUX_DATA(DV_D8_MARK, PSD0_DV, LCDD8_DV_D8),
707 PINMUX_DATA(DV_D7_MARK, PSD0_DV, LCDD7_DV_D7),
708 PINMUX_DATA(DV_D6_MARK, PSD0_DV, LCDD6_DV_D6),
709 PINMUX_DATA(DV_D5_MARK, PSD0_DV, LCDD5_DV_D5),
710 PINMUX_DATA(DV_D4_MARK, PSD0_DV, LCDD4_DV_D4),
711 PINMUX_DATA(DV_D3_MARK, PSD0_DV, LCDD3_DV_D3),
712 PINMUX_DATA(DV_D2_MARK, PSD0_DV, LCDD2_DV_D2),
713 PINMUX_DATA(DV_D1_MARK, PSD0_DV, LCDD1_DV_D1),
714 PINMUX_DATA(DV_D0_MARK, PSD0_DV, LCDD0_DV_D0),
715
716 /* CPG */
717 PINMUX_DATA(STATUS0_MARK, STATUS0),
718 PINMUX_DATA(PDSTATUS_MARK, PDSTATUS),
719
720 /* SIOF0 */
721 PINMUX_DATA(SIOF0_MCK_MARK, PSE15_SIOF0_MCK_IRQ3, PSB8_SIOF0_MCK, PTQ0),
722 PINMUX_DATA(SIOF0_SCK_MARK, PSB5_SIOF0_SCK, SIOF0_SCK_TS_SCK),
723 PINMUX_DATA(SIOF0_SYNC_MARK, PSB4_SIOF0_SYNC, SIOF0_SYNC_TS_SDEN),
724 PINMUX_DATA(SIOF0_SS1_MARK, PSB3_SIOF0_SS1, SIOF0_SS1_TS_SPSYNC),
725 PINMUX_DATA(SIOF0_SS2_MARK, PSB2_SIOF0_SS2, SIOF0_SS2_SIM_RST),
726 PINMUX_DATA(SIOF0_TXD_MARK, PSE14_SIOF0_TXD_IRDA_OUT,
727 PSB7_SIOF0_TXD, PTQ1),
728 PINMUX_DATA(SIOF0_RXD_MARK, PSE13_SIOF0_RXD_IRDA_IN,
729 PSB6_SIOF0_RXD, PTQ2),
730
731 /* SIOF1 */
732 PINMUX_DATA(SIOF1_MCK_MARK, PSE11_SIUMCKA_SIOF1_MCK,
733 PSB1_SIOF1_MCK, PTK0),
734 PINMUX_DATA(SIOF1_SCK_MARK, PSC14_SIOF1_SCK, SIUAOBT_SIOF1_SCK),
735 PINMUX_DATA(SIOF1_SYNC_MARK, PSC13_SIOF1_SYNC, SIUAOLR_SIOF1_SYNC),
736 PINMUX_DATA(SIOF1_SS1_MARK, PSC12_SIOF1_SS1, SIUAIBT_SIOF1_SS1),
737 PINMUX_DATA(SIOF1_SS2_MARK, PSC11_SIOF1_SS2, SIUAILR_SIOF1_SS2),
738 PINMUX_DATA(SIOF1_TXD_MARK, PSB0_SIOF1_TXD, SIUAOSLD_SIOF1_TXD),
739 PINMUX_DATA(SIOF1_RXD_MARK, PSC15_SIOF1_RXD, SIUAISLD_SIOF1_RXD),
740
741 /* SIM */
742 PINMUX_DATA(SIM_D_MARK, PSE15_SIM_D, PTQ0),
743 PINMUX_DATA(SIM_CLK_MARK, PSE14_SIM_CLK, PTQ1),
744 PINMUX_DATA(SIM_RST_MARK, PSB2_SIM_RST, SIOF0_SS2_SIM_RST),
745
746 /* TSIF */
747 PINMUX_DATA(TS_SDAT_MARK, PSE13_TS_SDAT, PTQ2),
748 PINMUX_DATA(TS_SCK_MARK, PSB5_TS_SCK, SIOF0_SCK_TS_SCK),
749 PINMUX_DATA(TS_SDEN_MARK, PSB4_TS_SDEN, SIOF0_SYNC_TS_SDEN),
750 PINMUX_DATA(TS_SPSYNC_MARK, PSB3_TS_SPSYNC, SIOF0_SS1_TS_SPSYNC),
751
752 /* IRDA */
753 PINMUX_DATA(IRDA_IN_MARK, PSE13_SIOF0_RXD_IRDA_IN, PSB6_IRDA_IN, PTQ2),
754 PINMUX_DATA(IRDA_OUT_MARK, PSE14_SIOF0_TXD_IRDA_OUT,
755 PSB7_IRDA_OUT, PTQ1),
756
757 /* TPU */
758 PINMUX_DATA(TPUTO_MARK, PSD8_TPUTO, SCIF0_SCK_TPUTO),
759
760 /* FLCTL */
761 PINMUX_DATA(FCE_MARK, PSE3_FLCTL, FCE_VIO_HD2),
762 PINMUX_DATA(NAF7_MARK, PSC0_NAF, HIZA10_NAF, NAF7_VIO_D15),
763 PINMUX_DATA(NAF6_MARK, PSC0_NAF, HIZA10_NAF, NAF6_VIO_D14),
764 PINMUX_DATA(NAF5_MARK, PSC0_NAF, HIZA10_NAF, NAF5_VIO_D13),
765 PINMUX_DATA(NAF4_MARK, PSC0_NAF, HIZA10_NAF, NAF4_VIO_D12),
766 PINMUX_DATA(NAF3_MARK, PSC0_NAF, HIZA10_NAF, NAF3_VIO_D11),
767 PINMUX_DATA(NAF2_MARK, PSE2_NAF2, HIZB0_VIO, NAF2_VIO_D10),
768 PINMUX_DATA(NAF1_MARK, PSE1_NAF1, HIZB0_VIO, NAF1_VIO_D9),
769 PINMUX_DATA(NAF0_MARK, PSE0_NAF0, HIZB0_VIO, NAF0_VIO_D8),
770 PINMUX_DATA(FCDE_MARK, FCDE),
771 PINMUX_DATA(FOE_MARK, PSE3_FLCTL, HIZB0_VIO, FOE_VIO_VD2),
772 PINMUX_DATA(FSC_MARK, FSC),
773 PINMUX_DATA(FWE_MARK, FWE),
774 PINMUX_DATA(FRB_MARK, PSE3_FLCTL, FRB_VIO_CLK2),
775
776 /* KEYSC */
777 PINMUX_DATA(KEYIN0_MARK, PSA15_KEYIN0, HIZC14_IRQ6, KEYIN0_IRQ6),
778 PINMUX_DATA(KEYIN1_MARK, HIZA14_KEYSC, KEYIN1),
779 PINMUX_DATA(KEYIN2_MARK, HIZA14_KEYSC, KEYIN2),
780 PINMUX_DATA(KEYIN3_MARK, HIZA14_KEYSC, KEYIN3),
781 PINMUX_DATA(KEYIN4_MARK, PSA14_KEYIN4, HIZC15_IRQ7, KEYIN4_IRQ7),
782 PINMUX_DATA(KEYOUT0_MARK, HIZA14_KEYSC, KEYOUT0),
783 PINMUX_DATA(KEYOUT1_MARK, HIZA14_KEYSC, KEYOUT1),
784 PINMUX_DATA(KEYOUT2_MARK, HIZA14_KEYSC, KEYOUT2),
785 PINMUX_DATA(KEYOUT3_MARK, HIZA14_KEYSC, KEYOUT3),
786 PINMUX_DATA(KEYOUT4_IN6_MARK, HIZA14_KEYSC, KEYOUT4_IN6),
787 PINMUX_DATA(KEYOUT5_IN5_MARK, HIZA14_KEYSC, KEYOUT5_IN5),
788};
789
790static struct pinmux_gpio pinmux_gpios[] = {
791 /* PTA */
792 PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
793 PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
794 PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
795 PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
796 PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
797 PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
798 PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
799 PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
800
801 /* PTB */
802 PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
803 PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
804 PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
805 PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
806 PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
807 PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
808 PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
809 PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
810
811 /* PTC */
812 PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
813 PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
814 PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
815 PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
816 PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
817 PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
818
819 /* PTD */
820 PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
821 PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
822 PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
823 PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
824 PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
825 PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
826 PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
827 PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
828
829 /* PTE */
830 PINMUX_GPIO(GPIO_PTE7, PTE7_DATA),
831 PINMUX_GPIO(GPIO_PTE6, PTE6_DATA),
832 PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
833 PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
834 PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
835 PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
836
837 /* PTF */
838 PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
839 PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
840 PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
841 PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
842 PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
843 PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
844 PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
845
846 /* PTG */
847 PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
848 PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
849 PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
850 PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
851 PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
852
853 /* PTH */
854 PINMUX_GPIO(GPIO_PTH7, PTH7_DATA),
855 PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
856 PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
857 PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
858 PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
859 PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
860 PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
861 PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
862
863 /* PTJ */
864 PINMUX_GPIO(GPIO_PTJ7, PTJ7_DATA),
865 PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
866 PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
867 PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
868 PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
869
870 /* PTK */
871 PINMUX_GPIO(GPIO_PTK6, PTK6_DATA),
872 PINMUX_GPIO(GPIO_PTK5, PTK5_DATA),
873 PINMUX_GPIO(GPIO_PTK4, PTK4_DATA),
874 PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
875 PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
876 PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
877 PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
878
879 /* PTL */
880 PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
881 PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
882 PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
883 PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
884 PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
885 PINMUX_GPIO(GPIO_PTL2, PTL2_DATA),
886 PINMUX_GPIO(GPIO_PTL1, PTL1_DATA),
887 PINMUX_GPIO(GPIO_PTL0, PTL0_DATA),
888
889 /* PTM */
890 PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
891 PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
892 PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
893 PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
894 PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
895 PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
896 PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
897 PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
898
899 /* PTN */
900 PINMUX_GPIO(GPIO_PTN7, PTN7_DATA),
901 PINMUX_GPIO(GPIO_PTN6, PTN6_DATA),
902 PINMUX_GPIO(GPIO_PTN5, PTN5_DATA),
903 PINMUX_GPIO(GPIO_PTN4, PTN4_DATA),
904 PINMUX_GPIO(GPIO_PTN3, PTN3_DATA),
905 PINMUX_GPIO(GPIO_PTN2, PTN2_DATA),
906 PINMUX_GPIO(GPIO_PTN1, PTN1_DATA),
907 PINMUX_GPIO(GPIO_PTN0, PTN0_DATA),
908
909 /* PTQ */
910 PINMUX_GPIO(GPIO_PTQ6, PTQ6_DATA),
911 PINMUX_GPIO(GPIO_PTQ5, PTQ5_DATA),
912 PINMUX_GPIO(GPIO_PTQ4, PTQ4_DATA),
913 PINMUX_GPIO(GPIO_PTQ3, PTQ3_DATA),
914 PINMUX_GPIO(GPIO_PTQ2, PTQ2_DATA),
915 PINMUX_GPIO(GPIO_PTQ1, PTQ1_DATA),
916 PINMUX_GPIO(GPIO_PTQ0, PTQ0_DATA),
917
918 /* PTR */
919 PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
920 PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
921 PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
922 PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
923 PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
924
925 /* PTS */
926 PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
927 PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
928 PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
929 PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
930 PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
931
932 /* PTT */
933 PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
934 PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
935 PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
936 PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
937 PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
938
939 /* PTU */
940 PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
941 PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
942 PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
943 PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
944 PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
945
946 /* PTV */
947 PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
948 PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
949 PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
950 PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
951 PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
952
953 /* PTW */
954 PINMUX_GPIO(GPIO_PTW6, PTW6_DATA),
955 PINMUX_GPIO(GPIO_PTW5, PTW5_DATA),
956 PINMUX_GPIO(GPIO_PTW4, PTW4_DATA),
957 PINMUX_GPIO(GPIO_PTW3, PTW3_DATA),
958 PINMUX_GPIO(GPIO_PTW2, PTW2_DATA),
959 PINMUX_GPIO(GPIO_PTW1, PTW1_DATA),
960 PINMUX_GPIO(GPIO_PTW0, PTW0_DATA),
961
962 /* PTX */
963 PINMUX_GPIO(GPIO_PTX6, PTX6_DATA),
964 PINMUX_GPIO(GPIO_PTX5, PTX5_DATA),
965 PINMUX_GPIO(GPIO_PTX4, PTX4_DATA),
966 PINMUX_GPIO(GPIO_PTX3, PTX3_DATA),
967 PINMUX_GPIO(GPIO_PTX2, PTX2_DATA),
968 PINMUX_GPIO(GPIO_PTX1, PTX1_DATA),
969 PINMUX_GPIO(GPIO_PTX0, PTX0_DATA),
970
971 /* PTY */
972 PINMUX_GPIO(GPIO_PTY5, PTY5_DATA),
973 PINMUX_GPIO(GPIO_PTY4, PTY4_DATA),
974 PINMUX_GPIO(GPIO_PTY3, PTY3_DATA),
975 PINMUX_GPIO(GPIO_PTY2, PTY2_DATA),
976 PINMUX_GPIO(GPIO_PTY1, PTY1_DATA),
977 PINMUX_GPIO(GPIO_PTY0, PTY0_DATA),
978
979 /* PTZ */
980 PINMUX_GPIO(GPIO_PTZ5, PTZ5_DATA),
981 PINMUX_GPIO(GPIO_PTZ4, PTZ4_DATA),
982 PINMUX_GPIO(GPIO_PTZ3, PTZ3_DATA),
983 PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
984 PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
985
986 /* SCIF0 */
987 PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK),
988 PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK),
989 PINMUX_GPIO(GPIO_FN_SCIF0_RTS, SCIF0_RTS_MARK),
990 PINMUX_GPIO(GPIO_FN_SCIF0_CTS, SCIF0_CTS_MARK),
991 PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK),
992
993 /* SCIF1 */
994 PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK),
995 PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK),
996 PINMUX_GPIO(GPIO_FN_SCIF1_RTS, SCIF1_RTS_MARK),
997 PINMUX_GPIO(GPIO_FN_SCIF1_CTS, SCIF1_CTS_MARK),
998 PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK),
999
1000 /* SCIF2 */
1001 PINMUX_GPIO(GPIO_FN_SCIF2_TXD, SCIF2_TXD_MARK),
1002 PINMUX_GPIO(GPIO_FN_SCIF2_RXD, SCIF2_RXD_MARK),
1003 PINMUX_GPIO(GPIO_FN_SCIF2_RTS, SCIF2_RTS_MARK),
1004 PINMUX_GPIO(GPIO_FN_SCIF2_CTS, SCIF2_CTS_MARK),
1005 PINMUX_GPIO(GPIO_FN_SCIF2_SCK, SCIF2_SCK_MARK),
1006
1007 /* SIO */
1008 PINMUX_GPIO(GPIO_FN_SIOTXD, SIOTXD_MARK),
1009 PINMUX_GPIO(GPIO_FN_SIORXD, SIORXD_MARK),
1010 PINMUX_GPIO(GPIO_FN_SIOD, SIOD_MARK),
1011 PINMUX_GPIO(GPIO_FN_SIOSTRB0, SIOSTRB0_MARK),
1012 PINMUX_GPIO(GPIO_FN_SIOSTRB1, SIOSTRB1_MARK),
1013 PINMUX_GPIO(GPIO_FN_SIOSCK, SIOSCK_MARK),
1014 PINMUX_GPIO(GPIO_FN_SIOMCK, SIOMCK_MARK),
1015
1016 /* CEU */
1017 PINMUX_GPIO(GPIO_FN_VIO_D15, VIO_D15_MARK),
1018 PINMUX_GPIO(GPIO_FN_VIO_D14, VIO_D14_MARK),
1019 PINMUX_GPIO(GPIO_FN_VIO_D13, VIO_D13_MARK),
1020 PINMUX_GPIO(GPIO_FN_VIO_D12, VIO_D12_MARK),
1021 PINMUX_GPIO(GPIO_FN_VIO_D11, VIO_D11_MARK),
1022 PINMUX_GPIO(GPIO_FN_VIO_D10, VIO_D10_MARK),
1023 PINMUX_GPIO(GPIO_FN_VIO_D9, VIO_D9_MARK),
1024 PINMUX_GPIO(GPIO_FN_VIO_D8, VIO_D8_MARK),
1025 PINMUX_GPIO(GPIO_FN_VIO_D7, VIO_D7_MARK),
1026 PINMUX_GPIO(GPIO_FN_VIO_D6, VIO_D6_MARK),
1027 PINMUX_GPIO(GPIO_FN_VIO_D5, VIO_D5_MARK),
1028 PINMUX_GPIO(GPIO_FN_VIO_D4, VIO_D4_MARK),
1029 PINMUX_GPIO(GPIO_FN_VIO_D3, VIO_D3_MARK),
1030 PINMUX_GPIO(GPIO_FN_VIO_D2, VIO_D2_MARK),
1031 PINMUX_GPIO(GPIO_FN_VIO_D1, VIO_D1_MARK),
1032 PINMUX_GPIO(GPIO_FN_VIO_D0, VIO_D0_MARK),
1033 PINMUX_GPIO(GPIO_FN_VIO_CLK, VIO_CLK_MARK),
1034 PINMUX_GPIO(GPIO_FN_VIO_VD, VIO_VD_MARK),
1035 PINMUX_GPIO(GPIO_FN_VIO_HD, VIO_HD_MARK),
1036 PINMUX_GPIO(GPIO_FN_VIO_FLD, VIO_FLD_MARK),
1037 PINMUX_GPIO(GPIO_FN_VIO_CKO, VIO_CKO_MARK),
1038 PINMUX_GPIO(GPIO_FN_VIO_STEX, VIO_STEX_MARK),
1039 PINMUX_GPIO(GPIO_FN_VIO_STEM, VIO_STEM_MARK),
1040 PINMUX_GPIO(GPIO_FN_VIO_VD2, VIO_VD2_MARK),
1041 PINMUX_GPIO(GPIO_FN_VIO_HD2, VIO_HD2_MARK),
1042 PINMUX_GPIO(GPIO_FN_VIO_CLK2, VIO_CLK2_MARK),
1043
1044 /* LCDC */
1045 PINMUX_GPIO(GPIO_FN_LCDD23, LCDD23_MARK),
1046 PINMUX_GPIO(GPIO_FN_LCDD22, LCDD22_MARK),
1047 PINMUX_GPIO(GPIO_FN_LCDD21, LCDD21_MARK),
1048 PINMUX_GPIO(GPIO_FN_LCDD20, LCDD20_MARK),
1049 PINMUX_GPIO(GPIO_FN_LCDD19, LCDD19_MARK),
1050 PINMUX_GPIO(GPIO_FN_LCDD18, LCDD18_MARK),
1051 PINMUX_GPIO(GPIO_FN_LCDD17, LCDD17_MARK),
1052 PINMUX_GPIO(GPIO_FN_LCDD16, LCDD16_MARK),
1053 PINMUX_GPIO(GPIO_FN_LCDD15, LCDD15_MARK),
1054 PINMUX_GPIO(GPIO_FN_LCDD14, LCDD14_MARK),
1055 PINMUX_GPIO(GPIO_FN_LCDD13, LCDD13_MARK),
1056 PINMUX_GPIO(GPIO_FN_LCDD12, LCDD12_MARK),
1057 PINMUX_GPIO(GPIO_FN_LCDD11, LCDD11_MARK),
1058 PINMUX_GPIO(GPIO_FN_LCDD10, LCDD10_MARK),
1059 PINMUX_GPIO(GPIO_FN_LCDD9, LCDD9_MARK),
1060 PINMUX_GPIO(GPIO_FN_LCDD8, LCDD8_MARK),
1061 PINMUX_GPIO(GPIO_FN_LCDD7, LCDD7_MARK),
1062 PINMUX_GPIO(GPIO_FN_LCDD6, LCDD6_MARK),
1063 PINMUX_GPIO(GPIO_FN_LCDD5, LCDD5_MARK),
1064 PINMUX_GPIO(GPIO_FN_LCDD4, LCDD4_MARK),
1065 PINMUX_GPIO(GPIO_FN_LCDD3, LCDD3_MARK),
1066 PINMUX_GPIO(GPIO_FN_LCDD2, LCDD2_MARK),
1067 PINMUX_GPIO(GPIO_FN_LCDD1, LCDD1_MARK),
1068 PINMUX_GPIO(GPIO_FN_LCDD0, LCDD0_MARK),
1069 PINMUX_GPIO(GPIO_FN_LCDLCLK, LCDLCLK_MARK),
1070 /* Main LCD */
1071 PINMUX_GPIO(GPIO_FN_LCDDON, LCDDON_MARK),
1072 PINMUX_GPIO(GPIO_FN_LCDVCPWC, LCDVCPWC_MARK),
1073 PINMUX_GPIO(GPIO_FN_LCDVEPWC, LCDVEPWC_MARK),
1074 PINMUX_GPIO(GPIO_FN_LCDVSYN, LCDVSYN_MARK),
1075 /* Main LCD - RGB Mode */
1076 PINMUX_GPIO(GPIO_FN_LCDDCK, LCDDCK_MARK),
1077 PINMUX_GPIO(GPIO_FN_LCDHSYN, LCDHSYN_MARK),
1078 PINMUX_GPIO(GPIO_FN_LCDDISP, LCDDISP_MARK),
1079 /* Main LCD - SYS Mode */
1080 PINMUX_GPIO(GPIO_FN_LCDRS, LCDRS_MARK),
1081 PINMUX_GPIO(GPIO_FN_LCDCS, LCDCS_MARK),
1082 PINMUX_GPIO(GPIO_FN_LCDWR, LCDWR_MARK),
1083 PINMUX_GPIO(GPIO_FN_LCDRD, LCDRD_MARK),
1084 /* Sub LCD - SYS Mode */
1085 PINMUX_GPIO(GPIO_FN_LCDDON2, LCDDON2_MARK),
1086 PINMUX_GPIO(GPIO_FN_LCDVCPWC2, LCDVCPWC2_MARK),
1087 PINMUX_GPIO(GPIO_FN_LCDVEPWC2, LCDVEPWC2_MARK),
1088 PINMUX_GPIO(GPIO_FN_LCDVSYN2, LCDVSYN2_MARK),
1089 PINMUX_GPIO(GPIO_FN_LCDCS2, LCDCS2_MARK),
1090
1091 /* BSC */
1092 PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
1093 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
1094 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
1095 PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
1096 PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
1097 PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
1098 PINMUX_GPIO(GPIO_FN_CS6B_CE1B, CS6B_CE1B_MARK),
1099 PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK),
1100 PINMUX_GPIO(GPIO_FN_CS6A_CE2B, CS6A_CE2B_MARK),
1101
1102 /* SBSC */
1103 PINMUX_GPIO(GPIO_FN_HPD63, HPD63_MARK),
1104 PINMUX_GPIO(GPIO_FN_HPD62, HPD62_MARK),
1105 PINMUX_GPIO(GPIO_FN_HPD61, HPD61_MARK),
1106 PINMUX_GPIO(GPIO_FN_HPD60, HPD60_MARK),
1107 PINMUX_GPIO(GPIO_FN_HPD59, HPD59_MARK),
1108 PINMUX_GPIO(GPIO_FN_HPD58, HPD58_MARK),
1109 PINMUX_GPIO(GPIO_FN_HPD57, HPD57_MARK),
1110 PINMUX_GPIO(GPIO_FN_HPD56, HPD56_MARK),
1111 PINMUX_GPIO(GPIO_FN_HPD55, HPD55_MARK),
1112 PINMUX_GPIO(GPIO_FN_HPD54, HPD54_MARK),
1113 PINMUX_GPIO(GPIO_FN_HPD53, HPD53_MARK),
1114 PINMUX_GPIO(GPIO_FN_HPD52, HPD52_MARK),
1115 PINMUX_GPIO(GPIO_FN_HPD51, HPD51_MARK),
1116 PINMUX_GPIO(GPIO_FN_HPD50, HPD50_MARK),
1117 PINMUX_GPIO(GPIO_FN_HPD49, HPD49_MARK),
1118 PINMUX_GPIO(GPIO_FN_HPD48, HPD48_MARK),
1119 PINMUX_GPIO(GPIO_FN_HPDQM7, HPDQM7_MARK),
1120 PINMUX_GPIO(GPIO_FN_HPDQM6, HPDQM6_MARK),
1121 PINMUX_GPIO(GPIO_FN_HPDQM5, HPDQM5_MARK),
1122 PINMUX_GPIO(GPIO_FN_HPDQM4, HPDQM4_MARK),
1123
1124 /* IRQ */
1125 PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK),
1126 PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK),
1127 PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK),
1128 PINMUX_GPIO(GPIO_FN_IRQ3, IRQ3_MARK),
1129 PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK),
1130 PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK),
1131 PINMUX_GPIO(GPIO_FN_IRQ6, IRQ6_MARK),
1132 PINMUX_GPIO(GPIO_FN_IRQ7, IRQ7_MARK),
1133
1134 /* SDHI */
1135 PINMUX_GPIO(GPIO_FN_SDHICD, SDHICD_MARK),
1136 PINMUX_GPIO(GPIO_FN_SDHIWP, SDHIWP_MARK),
1137 PINMUX_GPIO(GPIO_FN_SDHID3, SDHID3_MARK),
1138 PINMUX_GPIO(GPIO_FN_SDHID2, SDHID2_MARK),
1139 PINMUX_GPIO(GPIO_FN_SDHID1, SDHID1_MARK),
1140 PINMUX_GPIO(GPIO_FN_SDHID0, SDHID0_MARK),
1141 PINMUX_GPIO(GPIO_FN_SDHICMD, SDHICMD_MARK),
1142 PINMUX_GPIO(GPIO_FN_SDHICLK, SDHICLK_MARK),
1143
1144 /* SIU - Port A */
1145 PINMUX_GPIO(GPIO_FN_SIUAOLR, SIUAOLR_MARK),
1146 PINMUX_GPIO(GPIO_FN_SIUAOBT, SIUAOBT_MARK),
1147 PINMUX_GPIO(GPIO_FN_SIUAISLD, SIUAISLD_MARK),
1148 PINMUX_GPIO(GPIO_FN_SIUAILR, SIUAILR_MARK),
1149 PINMUX_GPIO(GPIO_FN_SIUAIBT, SIUAIBT_MARK),
1150 PINMUX_GPIO(GPIO_FN_SIUAOSLD, SIUAOSLD_MARK),
1151 PINMUX_GPIO(GPIO_FN_SIUMCKA, SIUMCKA_MARK),
1152 PINMUX_GPIO(GPIO_FN_SIUFCKA, SIUFCKA_MARK),
1153
1154 /* SIU - Port B */
1155 PINMUX_GPIO(GPIO_FN_SIUBOLR, SIUBOLR_MARK),
1156 PINMUX_GPIO(GPIO_FN_SIUBOBT, SIUBOBT_MARK),
1157 PINMUX_GPIO(GPIO_FN_SIUBISLD, SIUBISLD_MARK),
1158 PINMUX_GPIO(GPIO_FN_SIUBILR, SIUBILR_MARK),
1159 PINMUX_GPIO(GPIO_FN_SIUBIBT, SIUBIBT_MARK),
1160 PINMUX_GPIO(GPIO_FN_SIUBOSLD, SIUBOSLD_MARK),
1161 PINMUX_GPIO(GPIO_FN_SIUMCKB, SIUMCKB_MARK),
1162 PINMUX_GPIO(GPIO_FN_SIUFCKB, SIUFCKB_MARK),
1163
1164 /* AUD */
1165 PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK),
1166 PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK),
1167 PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK),
1168 PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK),
1169 PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK),
1170
1171 /* DMAC */
1172 PINMUX_GPIO(GPIO_FN_DACK, DACK_MARK),
1173 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
1174
1175 /* VOU */
1176 PINMUX_GPIO(GPIO_FN_DV_CLKI, DV_CLKI_MARK),
1177 PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK),
1178 PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK),
1179 PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK),
1180 PINMUX_GPIO(GPIO_FN_DV_D15, DV_D15_MARK),
1181 PINMUX_GPIO(GPIO_FN_DV_D14, DV_D14_MARK),
1182 PINMUX_GPIO(GPIO_FN_DV_D13, DV_D13_MARK),
1183 PINMUX_GPIO(GPIO_FN_DV_D12, DV_D12_MARK),
1184 PINMUX_GPIO(GPIO_FN_DV_D11, DV_D11_MARK),
1185 PINMUX_GPIO(GPIO_FN_DV_D10, DV_D10_MARK),
1186 PINMUX_GPIO(GPIO_FN_DV_D9, DV_D9_MARK),
1187 PINMUX_GPIO(GPIO_FN_DV_D8, DV_D8_MARK),
1188 PINMUX_GPIO(GPIO_FN_DV_D7, DV_D7_MARK),
1189 PINMUX_GPIO(GPIO_FN_DV_D6, DV_D6_MARK),
1190 PINMUX_GPIO(GPIO_FN_DV_D5, DV_D5_MARK),
1191 PINMUX_GPIO(GPIO_FN_DV_D4, DV_D4_MARK),
1192 PINMUX_GPIO(GPIO_FN_DV_D3, DV_D3_MARK),
1193 PINMUX_GPIO(GPIO_FN_DV_D2, DV_D2_MARK),
1194 PINMUX_GPIO(GPIO_FN_DV_D1, DV_D1_MARK),
1195 PINMUX_GPIO(GPIO_FN_DV_D0, DV_D0_MARK),
1196
1197 /* CPG */
1198 PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
1199 PINMUX_GPIO(GPIO_FN_PDSTATUS, PDSTATUS_MARK),
1200
1201 /* SIOF0 */
1202 PINMUX_GPIO(GPIO_FN_SIOF0_MCK, SIOF0_MCK_MARK),
1203 PINMUX_GPIO(GPIO_FN_SIOF0_SCK, SIOF0_SCK_MARK),
1204 PINMUX_GPIO(GPIO_FN_SIOF0_SYNC, SIOF0_SYNC_MARK),
1205 PINMUX_GPIO(GPIO_FN_SIOF0_SS1, SIOF0_SS1_MARK),
1206 PINMUX_GPIO(GPIO_FN_SIOF0_SS2, SIOF0_SS2_MARK),
1207 PINMUX_GPIO(GPIO_FN_SIOF0_TXD, SIOF0_TXD_MARK),
1208 PINMUX_GPIO(GPIO_FN_SIOF0_RXD, SIOF0_RXD_MARK),
1209
1210 /* SIOF1 */
1211 PINMUX_GPIO(GPIO_FN_SIOF1_MCK, SIOF1_MCK_MARK),
1212 PINMUX_GPIO(GPIO_FN_SIOF1_SCK, SIOF1_SCK_MARK),
1213 PINMUX_GPIO(GPIO_FN_SIOF1_SYNC, SIOF1_SYNC_MARK),
1214 PINMUX_GPIO(GPIO_FN_SIOF1_SS1, SIOF1_SS1_MARK),
1215 PINMUX_GPIO(GPIO_FN_SIOF1_SS2, SIOF1_SS2_MARK),
1216 PINMUX_GPIO(GPIO_FN_SIOF1_TXD, SIOF1_TXD_MARK),
1217 PINMUX_GPIO(GPIO_FN_SIOF1_RXD, SIOF1_RXD_MARK),
1218
1219 /* SIM */
1220 PINMUX_GPIO(GPIO_FN_SIM_D, SIM_D_MARK),
1221 PINMUX_GPIO(GPIO_FN_SIM_CLK, SIM_CLK_MARK),
1222 PINMUX_GPIO(GPIO_FN_SIM_RST, SIM_RST_MARK),
1223
1224 /* TSIF */
1225 PINMUX_GPIO(GPIO_FN_TS_SDAT, TS_SDAT_MARK),
1226 PINMUX_GPIO(GPIO_FN_TS_SCK, TS_SCK_MARK),
1227 PINMUX_GPIO(GPIO_FN_TS_SDEN, TS_SDEN_MARK),
1228 PINMUX_GPIO(GPIO_FN_TS_SPSYNC, TS_SPSYNC_MARK),
1229
1230 /* IRDA */
1231 PINMUX_GPIO(GPIO_FN_IRDA_IN, IRDA_IN_MARK),
1232 PINMUX_GPIO(GPIO_FN_IRDA_OUT, IRDA_OUT_MARK),
1233
1234 /* TPU */
1235 PINMUX_GPIO(GPIO_FN_TPUTO, TPUTO_MARK),
1236
1237 /* FLCTL */
1238 PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK),
1239 PINMUX_GPIO(GPIO_FN_NAF7, NAF7_MARK),
1240 PINMUX_GPIO(GPIO_FN_NAF6, NAF6_MARK),
1241 PINMUX_GPIO(GPIO_FN_NAF5, NAF5_MARK),
1242 PINMUX_GPIO(GPIO_FN_NAF4, NAF4_MARK),
1243 PINMUX_GPIO(GPIO_FN_NAF3, NAF3_MARK),
1244 PINMUX_GPIO(GPIO_FN_NAF2, NAF2_MARK),
1245 PINMUX_GPIO(GPIO_FN_NAF1, NAF1_MARK),
1246 PINMUX_GPIO(GPIO_FN_NAF0, NAF0_MARK),
1247 PINMUX_GPIO(GPIO_FN_FCDE, FCDE_MARK),
1248 PINMUX_GPIO(GPIO_FN_FOE, FOE_MARK),
1249 PINMUX_GPIO(GPIO_FN_FSC, FSC_MARK),
1250 PINMUX_GPIO(GPIO_FN_FWE, FWE_MARK),
1251 PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),
1252
1253 /* KEYSC */
1254 PINMUX_GPIO(GPIO_FN_KEYIN0, KEYIN0_MARK),
1255 PINMUX_GPIO(GPIO_FN_KEYIN1, KEYIN1_MARK),
1256 PINMUX_GPIO(GPIO_FN_KEYIN2, KEYIN2_MARK),
1257 PINMUX_GPIO(GPIO_FN_KEYIN3, KEYIN3_MARK),
1258 PINMUX_GPIO(GPIO_FN_KEYIN4, KEYIN4_MARK),
1259 PINMUX_GPIO(GPIO_FN_KEYOUT0, KEYOUT0_MARK),
1260 PINMUX_GPIO(GPIO_FN_KEYOUT1, KEYOUT1_MARK),
1261 PINMUX_GPIO(GPIO_FN_KEYOUT2, KEYOUT2_MARK),
1262 PINMUX_GPIO(GPIO_FN_KEYOUT3, KEYOUT3_MARK),
1263 PINMUX_GPIO(GPIO_FN_KEYOUT4_IN6, KEYOUT4_IN6_MARK),
1264 PINMUX_GPIO(GPIO_FN_KEYOUT5_IN5, KEYOUT5_IN5_MARK),
1265};
1266
1267static struct pinmux_cfg_reg pinmux_config_regs[] = {
1268 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
1269 VIO_D7_SCIF1_SCK, PTA7_OUT, PTA7_IN_PD, PTA7_IN,
1270 VIO_D6_SCIF1_RXD, 0, PTA6_IN_PD, PTA6_IN,
1271 VIO_D5_SCIF1_TXD, PTA5_OUT, PTA5_IN_PD, PTA5_IN,
1272 VIO_D4, 0, PTA4_IN_PD, PTA4_IN,
1273 VIO_D3, 0, PTA3_IN_PD, PTA3_IN,
1274 VIO_D2, 0, PTA2_IN_PD, PTA2_IN,
1275 VIO_D1, 0, PTA1_IN_PD, PTA1_IN,
1276 VIO_D0_LCDLCLK, 0, PTA0_IN_PD, PTA0_IN }
1277 },
1278 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) {
1279 HPD55, PTB7_OUT, 0, PTB7_IN,
1280 HPD54, PTB6_OUT, 0, PTB6_IN,
1281 HPD53, PTB5_OUT, 0, PTB5_IN,
1282 HPD52, PTB4_OUT, 0, PTB4_IN,
1283 HPD51, PTB3_OUT, 0, PTB3_IN,
1284 HPD50, PTB2_OUT, 0, PTB2_IN,
1285 HPD49, PTB1_OUT, 0, PTB1_IN,
1286 HPD48, PTB0_OUT, 0, PTB0_IN }
1287 },
1288 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) {
1289 0, 0, PTC7_IN_PU, PTC7_IN,
1290 0, 0, 0, 0,
1291 IOIS16, 0, PTC5_IN_PU, PTC5_IN,
1292 HPDQM7, PTC4_OUT, 0, PTC4_IN,
1293 HPDQM6, PTC3_OUT, 0, PTC3_IN,
1294 HPDQM5, PTC2_OUT, 0, PTC2_IN,
1295 0, 0, 0, 0,
1296 HPDQM4, PTC0_OUT, 0, PTC0_IN }
1297 },
1298 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) {
1299 SDHICD, 0, PTD7_IN_PU, PTD7_IN,
1300 SDHIWP, PTD6_OUT, PTD6_IN_PU, PTD6_IN,
1301 SDHID3, PTD5_OUT, PTD5_IN_PU, PTD5_IN,
1302 IRQ2_SDHID2, PTD4_OUT, PTD4_IN_PU, PTD4_IN,
1303 SDHID1, PTD3_OUT, PTD3_IN_PU, PTD3_IN,
1304 SDHID0, PTD2_OUT, PTD2_IN_PU, PTD2_IN,
1305 SDHICMD, PTD1_OUT, PTD1_IN_PU, PTD1_IN,
1306 SDHICLK, PTD0_OUT, 0, 0 }
1307 },
1308 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) {
1309 A25, PTE7_OUT, PTE7_IN_PD, PTE7_IN,
1310 A24, PTE6_OUT, PTE6_IN_PD, PTE6_IN,
1311 A23, PTE5_OUT, PTE5_IN_PD, PTE5_IN,
1312 A22, PTE4_OUT, PTE4_IN_PD, PTE4_IN,
1313 0, 0, 0, 0,
1314 0, 0, 0, 0,
1315 IRQ5, PTE1_OUT, PTE1_IN_PD, PTE1_IN,
1316 IRQ4_BS, PTE0_OUT, PTE0_IN_PD, PTE0_IN }
1317 },
1318 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) {
1319 0, 0, 0, 0,
1320 PTF6, PTF6_OUT, PTF6_IN_PD, PTF6_IN,
1321 SIOSCK_SIUBOBT, PTF5_OUT, PTF5_IN_PD, PTF5_IN,
1322 SIOSTRB1_SIUBOLR, PTF4_OUT, PTF4_IN_PD, PTF4_IN,
1323 SIOSTRB0_SIUBIBT, PTF3_OUT, PTF3_IN_PD, PTF3_IN,
1324 SIOD_SIUBILR, PTF2_OUT, PTF2_IN_PD, PTF2_IN,
1325 SIORXD_SIUBISLD, 0, PTF1_IN_PD, PTF1_IN,
1326 SIOTXD_SIUBOSLD, PTF0_OUT, 0, 0 }
1327 },
1328 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) {
1329 0, 0, 0, 0,
1330 0, 0, 0, 0,
1331 0, 0, 0, 0,
1332 AUDSYNC, PTG4_OUT, 0, 0,
1333 AUDATA3, PTG3_OUT, 0, 0,
1334 AUDATA2, PTG2_OUT, 0, 0,
1335 AUDATA1, PTG1_OUT, 0, 0,
1336 AUDATA0, PTG0_OUT, 0, 0 }
1337 },
1338 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) {
1339 LCDVCPWC_LCDVCPWC2, PTH7_OUT, 0, 0,
1340 LCDVSYN2_DACK, PTH6_OUT, PTH6_IN_PD, PTH6_IN,
1341 LCDVSYN, PTH5_OUT, PTH5_IN_PD, PTH5_IN,
1342 LCDDISP_LCDRS, PTH4_OUT, 0, 0,
1343 LCDHSYN_LCDCS, PTH3_OUT, 0, 0,
1344 LCDDON_LCDDON2, PTH2_OUT, 0, 0,
1345 LCDD17_DV_HSYNC, PTH1_OUT, PTH1_IN_PD, PTH1_IN,
1346 LCDD16_DV_VSYNC, PTH0_OUT, PTH0_IN_PD, PTH0_IN }
1347 },
1348 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) {
1349 STATUS0, PTJ7_OUT, 0, 0,
1350 0, PTJ6_OUT, 0, 0,
1351 PDSTATUS, PTJ5_OUT, 0, 0,
1352 0, 0, 0, 0,
1353 0, 0, 0, 0,
1354 0, 0, 0, 0,
1355 IRQ1, PTJ1_OUT, PTJ1_IN_PU, PTJ1_IN,
1356 IRQ0, PTJ0_OUT, PTJ0_IN_PU, PTJ0_IN }
1357 },
1358 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) {
1359 0, 0, 0, 0,
1360 SIUAILR_SIOF1_SS2, PTK6_OUT, PTK6_IN_PD, PTK6_IN,
1361 SIUAIBT_SIOF1_SS1, PTK5_OUT, PTK5_IN_PD, PTK5_IN,
1362 SIUAOLR_SIOF1_SYNC, PTK4_OUT, PTK4_IN_PD, PTK4_IN,
1363 SIUAOBT_SIOF1_SCK, PTK3_OUT, PTK3_IN_PD, PTK3_IN,
1364 SIUAISLD_SIOF1_RXD, 0, PTK2_IN_PD, PTK2_IN,
1365 SIUAOSLD_SIOF1_TXD, PTK1_OUT, 0, 0,
1366 PTK0, PTK0_OUT, PTK0_IN_PD, PTK0_IN }
1367 },
1368 { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) {
1369 LCDD15_DV_D15, PTL7_OUT, PTL7_IN_PD, PTL7_IN,
1370 LCDD14_DV_D14, PTL6_OUT, PTL6_IN_PD, PTL6_IN,
1371 LCDD13_DV_D13, PTL5_OUT, PTL5_IN_PD, PTL5_IN,
1372 LCDD12_DV_D12, PTL4_OUT, PTL4_IN_PD, PTL4_IN,
1373 LCDD11_DV_D11, PTL3_OUT, PTL3_IN_PD, PTL3_IN,
1374 LCDD10_DV_D10, PTL2_OUT, PTL2_IN_PD, PTL2_IN,
1375 LCDD9_DV_D9, PTL1_OUT, PTL1_IN_PD, PTL1_IN,
1376 LCDD8_DV_D8, PTL0_OUT, PTL0_IN_PD, PTL0_IN }
1377 },
1378 { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) {
1379 LCDD7_DV_D7, PTM7_OUT, PTM7_IN_PD, PTM7_IN,
1380 LCDD6_DV_D6, PTM6_OUT, PTM6_IN_PD, PTM6_IN,
1381 LCDD5_DV_D5, PTM5_OUT, PTM5_IN_PD, PTM5_IN,
1382 LCDD4_DV_D4, PTM4_OUT, PTM4_IN_PD, PTM4_IN,
1383 LCDD3_DV_D3, PTM3_OUT, PTM3_IN_PD, PTM3_IN,
1384 LCDD2_DV_D2, PTM2_OUT, PTM2_IN_PD, PTM2_IN,
1385 LCDD1_DV_D1, PTM1_OUT, PTM1_IN_PD, PTM1_IN,
1386 LCDD0_DV_D0, PTM0_OUT, PTM0_IN_PD, PTM0_IN }
1387 },
1388 { PINMUX_CFG_REG("PNCR", 0xa4050118, 16, 2) {
1389 HPD63, PTN7_OUT, 0, PTN7_IN,
1390 HPD62, PTN6_OUT, 0, PTN6_IN,
1391 HPD61, PTN5_OUT, 0, PTN5_IN,
1392 HPD60, PTN4_OUT, 0, PTN4_IN,
1393 HPD59, PTN3_OUT, 0, PTN3_IN,
1394 HPD58, PTN2_OUT, 0, PTN2_IN,
1395 HPD57, PTN1_OUT, 0, PTN1_IN,
1396 HPD56, PTN0_OUT, 0, PTN0_IN }
1397 },
1398 { PINMUX_CFG_REG("PQCR", 0xa405011a, 16, 2) {
1399 0, 0, 0, 0,
1400 SIOF0_SS2_SIM_RST, PTQ6_OUT, 0, 0,
1401 SIOF0_SS1_TS_SPSYNC, PTQ5_OUT, PTQ5_IN_PD, PTQ5_IN,
1402 SIOF0_SYNC_TS_SDEN, PTQ4_OUT, PTQ4_IN_PD, PTQ4_IN,
1403 SIOF0_SCK_TS_SCK, PTQ3_OUT, PTQ3_IN_PD, PTQ3_IN,
1404 PTQ2, 0, PTQ2_IN_PD, PTQ2_IN,
1405 PTQ1, PTQ1_OUT, 0, 0,
1406 PTQ0, PTQ0_OUT, PTQ0_IN_PU, PTQ0_IN }
1407 },
1408 { PINMUX_CFG_REG("PRCR", 0xa405011c, 16, 2) {
1409 0, 0, 0, 0,
1410 0, 0, 0, 0,
1411 0, 0, 0, 0,
1412 LCDRD, PTR4_OUT, 0, 0,
1413 CS6B_CE1B_LCDCS2, PTR3_OUT, 0, 0,
1414 WAIT, 0, PTR2_IN_PU, PTR2_IN,
1415 LCDDCK_LCDWR, PTR1_OUT, 0, 0,
1416 LCDVEPWC_LCDVEPWC2, PTR0_OUT, 0, 0 }
1417 },
1418 { PINMUX_CFG_REG("PSCR", 0xa405011e, 16, 2) {
1419 0, 0, 0, 0,
1420 0, 0, 0, 0,
1421 0, 0, 0, 0,
1422 SCIF0_CTS_SIUAISPD, 0, PTS4_IN_PD, PTS4_IN,
1423 SCIF0_RTS_SIUAOSPD, PTS3_OUT, 0, 0,
1424 SCIF0_SCK_TPUTO, PTS2_OUT, PTS2_IN_PD, PTS2_IN,
1425 SCIF0_RXD, 0, PTS1_IN_PD, PTS1_IN,
1426 SCIF0_TXD, PTS0_OUT, 0, 0 }
1427 },
1428 { PINMUX_CFG_REG("PTCR", 0xa4050140, 16, 2) {
1429 0, 0, 0, 0,
1430 0, 0, 0, 0,
1431 0, 0, 0, 0,
1432 FOE_VIO_VD2, PTT4_OUT, PTT4_IN_PD, PTT4_IN,
1433 FWE, PTT3_OUT, PTT3_IN_PD, PTT3_IN,
1434 FSC, PTT2_OUT, PTT2_IN_PD, PTT2_IN,
1435 DREQ0, 0, PTT1_IN_PD, PTT1_IN,
1436 FCDE, PTT0_OUT, 0, 0 }
1437 },
1438 { PINMUX_CFG_REG("PUCR", 0xa4050142, 16, 2) {
1439 0, 0, 0, 0,
1440 0, 0, 0, 0,
1441 0, 0, 0, 0,
1442 NAF2_VIO_D10, PTU4_OUT, PTU4_IN_PD, PTU4_IN,
1443 NAF1_VIO_D9, PTU3_OUT, PTU3_IN_PD, PTU3_IN,
1444 NAF0_VIO_D8, PTU2_OUT, PTU2_IN_PD, PTU2_IN,
1445 FRB_VIO_CLK2, 0, PTU1_IN_PD, PTU1_IN,
1446 FCE_VIO_HD2, PTU0_OUT, PTU0_IN_PD, PTU0_IN }
1447 },
1448 { PINMUX_CFG_REG("PVCR", 0xa4050144, 16, 2) {
1449 0, 0, 0, 0,
1450 0, 0, 0, 0,
1451 0, 0, 0, 0,
1452 NAF7_VIO_D15, PTV4_OUT, PTV4_IN_PD, PTV4_IN,
1453 NAF6_VIO_D14, PTV3_OUT, PTV3_IN_PD, PTV3_IN,
1454 NAF5_VIO_D13, PTV2_OUT, PTV2_IN_PD, PTV2_IN,
1455 NAF4_VIO_D12, PTV1_OUT, PTV1_IN_PD, PTV1_IN,
1456 NAF3_VIO_D11, PTV0_OUT, PTV0_IN_PD, PTV0_IN }
1457 },
1458 { PINMUX_CFG_REG("PWCR", 0xa4050146, 16, 2) {
1459 0, 0, 0, 0,
1460 VIO_FLD_SCIF2_CTS, 0, PTW6_IN_PD, PTW6_IN,
1461 VIO_CKO_SCIF2_RTS, PTW5_OUT, 0, 0,
1462 VIO_STEX_SCIF2_SCK, PTW4_OUT, PTW4_IN_PD, PTW4_IN,
1463 VIO_STEM_SCIF2_TXD, PTW3_OUT, PTW3_IN_PD, PTW3_IN,
1464 VIO_HD_SCIF2_RXD, PTW2_OUT, PTW2_IN_PD, PTW2_IN,
1465 VIO_VD_SCIF1_CTS, PTW1_OUT, PTW1_IN_PD, PTW1_IN,
1466 VIO_CLK_SCIF1_RTS, PTW0_OUT, PTW0_IN_PD, PTW0_IN }
1467 },
1468 { PINMUX_CFG_REG("PXCR", 0xa4050148, 16, 2) {
1469 0, 0, 0, 0,
1470 CS6A_CE2B, PTX6_OUT, PTX6_IN_PU, PTX6_IN,
1471 LCDD23, PTX5_OUT, PTX5_IN_PD, PTX5_IN,
1472 LCDD22, PTX4_OUT, PTX4_IN_PD, PTX4_IN,
1473 LCDD21, PTX3_OUT, PTX3_IN_PD, PTX3_IN,
1474 LCDD20, PTX2_OUT, PTX2_IN_PD, PTX2_IN,
1475 LCDD19_DV_CLKI, PTX1_OUT, PTX1_IN_PD, PTX1_IN,
1476 LCDD18_DV_CLK, PTX0_OUT, PTX0_IN_PD, PTX0_IN }
1477 },
1478 { PINMUX_CFG_REG("PYCR", 0xa405014a, 16, 2) {
1479 0, 0, 0, 0,
1480 0, 0, 0, 0,
1481 KEYOUT5_IN5, PTY5_OUT, PTY5_IN_PU, PTY5_IN,
1482 KEYOUT4_IN6, PTY4_OUT, PTY4_IN_PU, PTY4_IN,
1483 KEYOUT3, PTY3_OUT, PTY3_IN_PU, PTY3_IN,
1484 KEYOUT2, PTY2_OUT, PTY2_IN_PU, PTY2_IN,
1485 KEYOUT1, PTY1_OUT, 0, 0,
1486 KEYOUT0, PTY0_OUT, PTY0_IN_PU, PTY0_IN }
1487 },
1488 { PINMUX_CFG_REG("PZCR", 0xa405014c, 16, 2) {
1489 0, 0, 0, 0,
1490 0, 0, 0, 0,
1491 KEYIN4_IRQ7, 0, PTZ5_IN_PU, PTZ5_IN,
1492 KEYIN3, 0, PTZ4_IN_PU, PTZ4_IN,
1493 KEYIN2, 0, PTZ3_IN_PU, PTZ3_IN,
1494 KEYIN1, 0, PTZ2_IN_PU, PTZ2_IN,
1495 KEYIN0_IRQ6, 0, PTZ1_IN_PU, PTZ1_IN,
1496 0, 0, 0, 0 }
1497 },
1498 { PINMUX_CFG_REG("PSELA", 0xa405014e, 16, 1) {
1499 PSA15_KEYIN0, PSA15_IRQ6,
1500 PSA14_KEYIN4, PSA14_IRQ7,
1501 0, 0,
1502 0, 0,
1503 0, 0,
1504 0, 0,
1505 PSA9_IRQ4, PSA9_BS,
1506 0, 0,
1507 0, 0,
1508 0, 0,
1509 0, 0,
1510 PSA4_IRQ2, PSA4_SDHID2,
1511 0, 0,
1512 0, 0,
1513 0, 0,
1514 0, 0 }
1515 },
1516 { PINMUX_CFG_REG("PSELB", 0xa4050150, 16, 1) {
1517 PSB15_SIOTXD, PSB15_SIUBOSLD,
1518 PSB14_SIORXD, PSB14_SIUBISLD,
1519 PSB13_SIOD, PSB13_SIUBILR,
1520 PSB12_SIOSTRB0, PSB12_SIUBIBT,
1521 PSB11_SIOSTRB1, PSB11_SIUBOLR,
1522 PSB10_SIOSCK, PSB10_SIUBOBT,
1523 PSB9_SIOMCK, PSB9_SIUMCKB,
1524 PSB8_SIOF0_MCK, PSB8_IRQ3,
1525 PSB7_SIOF0_TXD, PSB7_IRDA_OUT,
1526 PSB6_SIOF0_RXD, PSB6_IRDA_IN,
1527 PSB5_SIOF0_SCK, PSB5_TS_SCK,
1528 PSB4_SIOF0_SYNC, PSB4_TS_SDEN,
1529 PSB3_SIOF0_SS1, PSB3_TS_SPSYNC,
1530 PSB2_SIOF0_SS2, PSB2_SIM_RST,
1531 PSB1_SIUMCKA, PSB1_SIOF1_MCK,
1532 PSB0_SIUAOSLD, PSB0_SIOF1_TXD }
1533 },
1534 { PINMUX_CFG_REG("PSELC", 0xa4050152, 16, 1) {
1535 PSC15_SIUAISLD, PSC15_SIOF1_RXD,
1536 PSC14_SIUAOBT, PSC14_SIOF1_SCK,
1537 PSC13_SIUAOLR, PSC13_SIOF1_SYNC,
1538 PSC12_SIUAIBT, PSC12_SIOF1_SS1,
1539 PSC11_SIUAILR, PSC11_SIOF1_SS2,
1540 0, 0,
1541 0, 0,
1542 0, 0,
1543 0, 0,
1544 0, 0,
1545 0, 0,
1546 0, 0,
1547 0, 0,
1548 0, 0,
1549 0, 0,
1550 PSC0_NAF, PSC0_VIO }
1551 },
1552 { PINMUX_CFG_REG("PSELD", 0xa4050154, 16, 1) {
1553 0, 0,
1554 0, 0,
1555 PSD13_VIO, PSD13_SCIF2,
1556 PSD12_VIO, PSD12_SCIF1,
1557 PSD11_VIO, PSD11_SCIF1,
1558 PSD10_VIO_D0, PSD10_LCDLCLK,
1559 PSD9_SIOMCK_SIUMCKB, PSD9_SIUFCKB,
1560 PSD8_SCIF0_SCK, PSD8_TPUTO,
1561 PSD7_SCIF0_RTS, PSD7_SIUAOSPD,
1562 PSD6_SCIF0_CTS, PSD6_SIUAISPD,
1563 PSD5_CS6B_CE1B, PSD5_LCDCS2,
1564 0, 0,
1565 PSD3_LCDVEPWC_LCDVCPWC, PSD3_LCDVEPWC2_LCDVCPWC2,
1566 PSD2_LCDDON, PSD2_LCDDON2,
1567 0, 0,
1568 PSD0_LCDD19_LCDD0, PSD0_DV }
1569 },
1570 { PINMUX_CFG_REG("PSELE", 0xa4050156, 16, 1) {
1571 PSE15_SIOF0_MCK_IRQ3, PSE15_SIM_D,
1572 PSE14_SIOF0_TXD_IRDA_OUT, PSE14_SIM_CLK,
1573 PSE13_SIOF0_RXD_IRDA_IN, PSE13_TS_SDAT,
1574 PSE12_LCDVSYN2, PSE12_DACK,
1575 PSE11_SIUMCKA_SIOF1_MCK, PSE11_SIUFCKA,
1576 0, 0,
1577 0, 0,
1578 0, 0,
1579 0, 0,
1580 0, 0,
1581 0, 0,
1582 0, 0,
1583 PSE3_FLCTL, PSE3_VIO,
1584 PSE2_NAF2, PSE2_VIO_D10,
1585 PSE1_NAF1, PSE1_VIO_D9,
1586 PSE0_NAF0, PSE0_VIO_D8 }
1587 },
1588 { PINMUX_CFG_REG("HIZCRA", 0xa4050158, 16, 1) {
1589 0, 0,
1590 HIZA14_KEYSC, HIZA14_HIZ,
1591 0, 0,
1592 0, 0,
1593 0, 0,
1594 HIZA10_NAF, HIZA10_HIZ,
1595 HIZA9_VIO, HIZA9_HIZ,
1596 HIZA8_LCDC, HIZA8_HIZ,
1597 HIZA7_LCDC, HIZA7_HIZ,
1598 HIZA6_LCDC, HIZA6_HIZ,
1599 0, 0,
1600 0, 0,
1601 0, 0,
1602 0, 0,
1603 0, 0,
1604 0, 0 }
1605 },
1606 { PINMUX_CFG_REG("HIZCRB", 0xa405015a, 16, 1) {
1607 0, 0,
1608 0, 0,
1609 0, 0,
1610 0, 0,
1611 0, 0,
1612 0, 0,
1613 0, 0,
1614 0, 0,
1615 0, 0,
1616 0, 0,
1617 0, 0,
1618 HIZB4_SIUA, HIZB4_HIZ,
1619 0, 0,
1620 0, 0,
1621 HIZB1_VIO, HIZB1_HIZ,
1622 HIZB0_VIO, HIZB0_HIZ }
1623 },
1624 { PINMUX_CFG_REG("HIZCRC", 0xa405015c, 16, 1) {
1625 HIZC15_IRQ7, HIZC15_HIZ,
1626 HIZC14_IRQ6, HIZC14_HIZ,
1627 HIZC13_IRQ5, HIZC13_HIZ,
1628 HIZC12_IRQ4, HIZC12_HIZ,
1629 HIZC11_IRQ3, HIZC11_HIZ,
1630 HIZC10_IRQ2, HIZC10_HIZ,
1631 HIZC9_IRQ1, HIZC9_HIZ,
1632 HIZC8_IRQ0, HIZC8_HIZ,
1633 0, 0,
1634 0, 0,
1635 0, 0,
1636 0, 0,
1637 0, 0,
1638 0, 0,
1639 0, 0,
1640 0, 0 }
1641 },
1642 { PINMUX_CFG_REG("MSELCRB", 0xa4050182, 16, 1) {
1643 0, 0,
1644 0, 0,
1645 0, 0,
1646 0, 0,
1647 0, 0,
1648 0, 0,
1649 MSELB9_VIO, MSELB9_VIO2,
1650 MSELB8_RGB, MSELB8_SYS,
1651 0, 0,
1652 0, 0,
1653 0, 0,
1654 0, 0,
1655 0, 0,
1656 0, 0,
1657 0, 0,
1658 0, 0 }
1659 },
1660 {}
1661};
1662
1663static struct pinmux_data_reg pinmux_data_regs[] = {
1664 { PINMUX_DATA_REG("PADR", 0xa4050120, 8) {
1665 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
1666 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
1667 },
1668 { PINMUX_DATA_REG("PBDR", 0xa4050122, 8) {
1669 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
1670 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
1671 },
1672 { PINMUX_DATA_REG("PCDR", 0xa4050124, 8) {
1673 PTC7_DATA, 0, PTC5_DATA, PTC4_DATA,
1674 PTC3_DATA, PTC2_DATA, 0, PTC0_DATA }
1675 },
1676 { PINMUX_DATA_REG("PDDR", 0xa4050126, 8) {
1677 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
1678 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
1679 },
1680 { PINMUX_DATA_REG("PEDR", 0xa4050128, 8) {
1681 PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
1682 0, 0, PTE1_DATA, PTE0_DATA }
1683 },
1684 { PINMUX_DATA_REG("PFDR", 0xa405012a, 8) {
1685 0, PTF6_DATA, PTF5_DATA, PTF4_DATA,
1686 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
1687 },
1688 { PINMUX_DATA_REG("PGDR", 0xa405012c, 8) {
1689 0, 0, 0, PTG4_DATA,
1690 PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
1691 },
1692 { PINMUX_DATA_REG("PHDR", 0xa405012e, 8) {
1693 PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
1694 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
1695 },
1696 { PINMUX_DATA_REG("PJDR", 0xa4050130, 8) {
1697 PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, 0,
1698 0, 0, PTJ1_DATA, PTJ0_DATA }
1699 },
1700 { PINMUX_DATA_REG("PKDR", 0xa4050132, 8) {
1701 0, PTK6_DATA, PTK5_DATA, PTK4_DATA,
1702 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
1703 },
1704 { PINMUX_DATA_REG("PLDR", 0xa4050134, 8) {
1705 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
1706 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA }
1707 },
1708 { PINMUX_DATA_REG("PMDR", 0xa4050136, 8) {
1709 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
1710 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
1711 },
1712 { PINMUX_DATA_REG("PNDR", 0xa4050138, 8) {
1713 PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
1714 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA }
1715 },
1716 { PINMUX_DATA_REG("PQDR", 0xa405013a, 8) {
1717 0, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
1718 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA }
1719 },
1720 { PINMUX_DATA_REG("PRDR", 0xa405013c, 8) {
1721 0, 0, 0, PTR4_DATA,
1722 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
1723 },
1724 { PINMUX_DATA_REG("PSDR", 0xa405013e, 8) {
1725 0, 0, 0, PTS4_DATA,
1726 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
1727 },
1728 { PINMUX_DATA_REG("PTDR", 0xa4050160, 8) {
1729 0, 0, 0, PTT4_DATA,
1730 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
1731 },
1732 { PINMUX_DATA_REG("PUDR", 0xa4050162, 8) {
1733 0, 0, 0, PTU4_DATA,
1734 PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
1735 },
1736 { PINMUX_DATA_REG("PVDR", 0xa4050164, 8) {
1737 0, 0, 0, PTV4_DATA,
1738 PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
1739 },
1740 { PINMUX_DATA_REG("PWDR", 0xa4050166, 8) {
1741 0, PTW6_DATA, PTW5_DATA, PTW4_DATA,
1742 PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA }
1743 },
1744 { PINMUX_DATA_REG("PXDR", 0xa4050168, 8) {
1745 0, PTX6_DATA, PTX5_DATA, PTX4_DATA,
1746 PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA }
1747 },
1748 { PINMUX_DATA_REG("PYDR", 0xa405016a, 8) {
1749 0, PTY6_DATA, PTY5_DATA, PTY4_DATA,
1750 PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA }
1751 },
1752 { PINMUX_DATA_REG("PZDR", 0xa405016c, 8) {
1753 0, 0, PTZ5_DATA, PTZ4_DATA,
1754 PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA }
1755 },
1756 { },
1757};
1758
1759struct sh_pfc_soc_info sh7722_pinmux_info = {
1760 .name = "sh7722_pfc",
1761 .reserved_id = PINMUX_RESERVED,
1762 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1763 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1764 .input_pd = { PINMUX_INPUT_PULLDOWN_BEGIN, PINMUX_INPUT_PULLDOWN_END },
1765 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
1766 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1767 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1768 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1769
1770 .first_gpio = GPIO_PTA7,
1771 .last_gpio = GPIO_FN_KEYOUT5_IN5,
1772
1773 .gpios = pinmux_gpios,
1774 .cfg_regs = pinmux_config_regs,
1775 .data_regs = pinmux_data_regs,
1776
1777 .gpio_data = pinmux_data,
1778 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1779};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7723.c b/drivers/pinctrl/sh-pfc/pfc-sh7723.c
new file mode 100644
index 000000000000..609673d3d70e
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7723.c
@@ -0,0 +1,1903 @@
1/*
2 * SH7723 Pinmux
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <cpu/sh7723.h>
14
15#include "sh_pfc.h"
16
17enum {
18 PINMUX_RESERVED = 0,
19
20 PINMUX_DATA_BEGIN,
21 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
22 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA,
23 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
24 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA,
25 PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
26 PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA,
27 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
28 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA,
29 PTE5_DATA, PTE4_DATA, PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA,
30 PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
31 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA,
32 PTG5_DATA, PTG4_DATA, PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA,
33 PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
34 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
35 PTJ7_DATA, PTJ5_DATA, PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA,
36 PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
37 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
38 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
39 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA,
40 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
41 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
42 PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
43 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA,
44 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA,
45 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
46 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
47 PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA,
48 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
49 PTT5_DATA, PTT4_DATA, PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
50 PTU5_DATA, PTU4_DATA, PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
51 PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
52 PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA,
53 PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
54 PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA,
55 PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
56 PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA,
57 PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
58 PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA,
59 PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
60 PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA,
61 PINMUX_DATA_END,
62
63 PINMUX_INPUT_BEGIN,
64 PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN,
65 PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN,
66 PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN,
67 PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN,
68 PTC7_IN, PTC6_IN, PTC5_IN, PTC4_IN,
69 PTC3_IN, PTC2_IN, PTC1_IN, PTC0_IN,
70 PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN,
71 PTD3_IN, PTD2_IN, PTD1_IN, PTD0_IN,
72 PTE5_IN, PTE4_IN, PTE3_IN, PTE2_IN, PTE1_IN, PTE0_IN,
73 PTF7_IN, PTF6_IN, PTF5_IN, PTF4_IN,
74 PTF3_IN, PTF2_IN, PTF1_IN, PTF0_IN,
75 PTH7_IN, PTH6_IN, PTH5_IN, PTH4_IN,
76 PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN,
77 PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN,
78 PTK7_IN, PTK6_IN, PTK5_IN, PTK4_IN,
79 PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN,
80 PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN,
81 PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN,
82 PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN,
83 PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
84 PTN7_IN, PTN6_IN, PTN5_IN, PTN4_IN,
85 PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN,
86 PTQ3_IN, PTQ2_IN, PTQ1_IN, PTQ0_IN,
87 PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN,
88 PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN,
89 PTS7_IN, PTS6_IN, PTS5_IN, PTS4_IN,
90 PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN,
91 PTT5_IN, PTT4_IN, PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN,
92 PTU5_IN, PTU4_IN, PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
93 PTV7_IN, PTV6_IN, PTV5_IN, PTV4_IN,
94 PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
95 PTW7_IN, PTW6_IN, PTW5_IN, PTW4_IN,
96 PTW3_IN, PTW2_IN, PTW1_IN, PTW0_IN,
97 PTX7_IN, PTX6_IN, PTX5_IN, PTX4_IN,
98 PTX3_IN, PTX2_IN, PTX1_IN, PTX0_IN,
99 PTY7_IN, PTY6_IN, PTY5_IN, PTY4_IN,
100 PTY3_IN, PTY2_IN, PTY1_IN, PTY0_IN,
101 PTZ7_IN, PTZ6_IN, PTZ5_IN, PTZ4_IN,
102 PTZ3_IN, PTZ2_IN, PTZ1_IN, PTZ0_IN,
103 PINMUX_INPUT_END,
104
105 PINMUX_INPUT_PULLUP_BEGIN,
106 PTA4_IN_PU, PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
107 PTB2_IN_PU, PTB1_IN_PU,
108 PTR2_IN_PU,
109 PINMUX_INPUT_PULLUP_END,
110
111 PINMUX_OUTPUT_BEGIN,
112 PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
113 PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
114 PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
115 PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT,
116 PTC7_OUT, PTC6_OUT, PTC5_OUT, PTC4_OUT,
117 PTC3_OUT, PTC2_OUT, PTC1_OUT, PTC0_OUT,
118 PTD7_OUT, PTD6_OUT, PTD5_OUT, PTD4_OUT,
119 PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT,
120 PTE5_OUT, PTE4_OUT, PTE3_OUT, PTE2_OUT, PTE1_OUT, PTE0_OUT,
121 PTF7_OUT, PTF6_OUT, PTF5_OUT, PTF4_OUT,
122 PTF3_OUT, PTF2_OUT, PTF1_OUT, PTF0_OUT,
123 PTG5_OUT, PTG4_OUT, PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT,
124 PTH7_OUT, PTH6_OUT, PTH5_OUT, PTH4_OUT,
125 PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
126 PTJ7_OUT, PTJ5_OUT, PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT,
127 PTK7_OUT, PTK6_OUT, PTK5_OUT, PTK4_OUT,
128 PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT,
129 PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT,
130 PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT,
131 PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT,
132 PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
133 PTN7_OUT, PTN6_OUT, PTN5_OUT, PTN4_OUT,
134 PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT,
135 PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT,
136 PTR1_OUT, PTR0_OUT,
137 PTS7_OUT, PTS6_OUT, PTS5_OUT, PTS4_OUT,
138 PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT,
139 PTT5_OUT, PTT4_OUT, PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT,
140 PTU5_OUT, PTU4_OUT, PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT,
141 PTV7_OUT, PTV6_OUT, PTV5_OUT, PTV4_OUT,
142 PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT,
143 PTW7_OUT, PTW6_OUT, PTW5_OUT, PTW4_OUT,
144 PTW3_OUT, PTW2_OUT, PTW1_OUT, PTW0_OUT,
145 PTX7_OUT, PTX6_OUT, PTX5_OUT, PTX4_OUT,
146 PTX3_OUT, PTX2_OUT, PTX1_OUT, PTX0_OUT,
147 PTY7_OUT, PTY6_OUT, PTY5_OUT, PTY4_OUT,
148 PTY3_OUT, PTY2_OUT, PTY1_OUT, PTY0_OUT,
149 PTZ7_OUT, PTZ6_OUT, PTZ5_OUT, PTZ4_OUT,
150 PTZ3_OUT, PTZ2_OUT, PTZ1_OUT, PTZ0_OUT,
151 PINMUX_OUTPUT_END,
152
153 PINMUX_FUNCTION_BEGIN,
154 PTA7_FN, PTA6_FN, PTA5_FN, PTA4_FN,
155 PTA3_FN, PTA2_FN, PTA1_FN, PTA0_FN,
156 PTB7_FN, PTB6_FN, PTB5_FN, PTB4_FN,
157 PTB3_FN, PTB2_FN, PTB1_FN, PTB0_FN,
158 PTC7_FN, PTC6_FN, PTC5_FN, PTC4_FN,
159 PTC3_FN, PTC2_FN, PTC1_FN, PTC0_FN,
160 PTD7_FN, PTD6_FN, PTD5_FN, PTD4_FN,
161 PTD3_FN, PTD2_FN, PTD1_FN, PTD0_FN,
162 PTE5_FN, PTE4_FN, PTE3_FN, PTE2_FN, PTE1_FN, PTE0_FN,
163 PTF7_FN, PTF6_FN, PTF5_FN, PTF4_FN,
164 PTF3_FN, PTF2_FN, PTF1_FN, PTF0_FN,
165 PTG5_FN, PTG4_FN, PTG3_FN, PTG2_FN, PTG1_FN, PTG0_FN,
166 PTH7_FN, PTH6_FN, PTH5_FN, PTH4_FN,
167 PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN,
168 PTJ7_FN, PTJ5_FN, PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN,
169 PTK7_FN, PTK6_FN, PTK5_FN, PTK4_FN,
170 PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN,
171 PTL7_FN, PTL6_FN, PTL5_FN, PTL4_FN,
172 PTL3_FN, PTL2_FN, PTL1_FN, PTL0_FN,
173 PTM7_FN, PTM6_FN, PTM5_FN, PTM4_FN,
174 PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN,
175 PTN7_FN, PTN6_FN, PTN5_FN, PTN4_FN,
176 PTN3_FN, PTN2_FN, PTN1_FN, PTN0_FN,
177 PTQ3_FN, PTQ2_FN, PTQ1_FN, PTQ0_FN,
178 PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN,
179 PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN,
180 PTS7_FN, PTS6_FN, PTS5_FN, PTS4_FN,
181 PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN,
182 PTT5_FN, PTT4_FN, PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN,
183 PTU5_FN, PTU4_FN, PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN,
184 PTV7_FN, PTV6_FN, PTV5_FN, PTV4_FN,
185 PTV3_FN, PTV2_FN, PTV1_FN, PTV0_FN,
186 PTW7_FN, PTW6_FN, PTW5_FN, PTW4_FN,
187 PTW3_FN, PTW2_FN, PTW1_FN, PTW0_FN,
188 PTX7_FN, PTX6_FN, PTX5_FN, PTX4_FN,
189 PTX3_FN, PTX2_FN, PTX1_FN, PTX0_FN,
190 PTY7_FN, PTY6_FN, PTY5_FN, PTY4_FN,
191 PTY3_FN, PTY2_FN, PTY1_FN, PTY0_FN,
192 PTZ7_FN, PTZ6_FN, PTZ5_FN, PTZ4_FN,
193 PTZ3_FN, PTZ2_FN, PTZ1_FN, PTZ0_FN,
194
195
196 PSA15_PSA14_FN1, PSA15_PSA14_FN2,
197 PSA13_PSA12_FN1, PSA13_PSA12_FN2,
198 PSA11_PSA10_FN1, PSA11_PSA10_FN2,
199 PSA5_PSA4_FN1, PSA5_PSA4_FN2, PSA5_PSA4_FN3,
200 PSA3_PSA2_FN1, PSA3_PSA2_FN2,
201 PSB15_PSB14_FN1, PSB15_PSB14_FN2,
202 PSB13_PSB12_LCDC_RGB, PSB13_PSB12_LCDC_SYS,
203 PSB9_PSB8_FN1, PSB9_PSB8_FN2, PSB9_PSB8_FN3,
204 PSB7_PSB6_FN1, PSB7_PSB6_FN2,
205 PSB5_PSB4_FN1, PSB5_PSB4_FN2,
206 PSB3_PSB2_FN1, PSB3_PSB2_FN2,
207 PSC15_PSC14_FN1, PSC15_PSC14_FN2,
208 PSC13_PSC12_FN1, PSC13_PSC12_FN2,
209 PSC11_PSC10_FN1, PSC11_PSC10_FN2, PSC11_PSC10_FN3,
210 PSC9_PSC8_FN1, PSC9_PSC8_FN2,
211 PSC7_PSC6_FN1, PSC7_PSC6_FN2, PSC7_PSC6_FN3,
212 PSD15_PSD14_FN1, PSD15_PSD14_FN2,
213 PSD13_PSD12_FN1, PSD13_PSD12_FN2,
214 PSD11_PSD10_FN1, PSD11_PSD10_FN2, PSD11_PSD10_FN3,
215 PSD9_PSD8_FN1, PSD9_PSD8_FN2,
216 PSD7_PSD6_FN1, PSD7_PSD6_FN2,
217 PSD5_PSD4_FN1, PSD5_PSD4_FN2,
218 PSD3_PSD2_FN1, PSD3_PSD2_FN2,
219 PSD1_PSD0_FN1, PSD1_PSD0_FN2,
220 PINMUX_FUNCTION_END,
221
222 PINMUX_MARK_BEGIN,
223 SCIF0_PTT_TXD_MARK, SCIF0_PTT_RXD_MARK,
224 SCIF0_PTT_SCK_MARK, SCIF0_PTU_TXD_MARK,
225 SCIF0_PTU_RXD_MARK, SCIF0_PTU_SCK_MARK,
226
227 SCIF1_PTS_TXD_MARK, SCIF1_PTS_RXD_MARK,
228 SCIF1_PTS_SCK_MARK, SCIF1_PTV_TXD_MARK,
229 SCIF1_PTV_RXD_MARK, SCIF1_PTV_SCK_MARK,
230
231 SCIF2_PTT_TXD_MARK, SCIF2_PTT_RXD_MARK,
232 SCIF2_PTT_SCK_MARK, SCIF2_PTU_TXD_MARK,
233 SCIF2_PTU_RXD_MARK, SCIF2_PTU_SCK_MARK,
234
235 SCIF3_PTS_TXD_MARK, SCIF3_PTS_RXD_MARK,
236 SCIF3_PTS_SCK_MARK, SCIF3_PTS_RTS_MARK,
237 SCIF3_PTS_CTS_MARK, SCIF3_PTV_TXD_MARK,
238 SCIF3_PTV_RXD_MARK, SCIF3_PTV_SCK_MARK,
239 SCIF3_PTV_RTS_MARK, SCIF3_PTV_CTS_MARK,
240
241 SCIF4_PTE_TXD_MARK, SCIF4_PTE_RXD_MARK,
242 SCIF4_PTE_SCK_MARK, SCIF4_PTN_TXD_MARK,
243 SCIF4_PTN_RXD_MARK, SCIF4_PTN_SCK_MARK,
244
245 SCIF5_PTE_TXD_MARK, SCIF5_PTE_RXD_MARK,
246 SCIF5_PTE_SCK_MARK, SCIF5_PTN_TXD_MARK,
247 SCIF5_PTN_RXD_MARK, SCIF5_PTN_SCK_MARK,
248
249 VIO_D15_MARK, VIO_D14_MARK, VIO_D13_MARK, VIO_D12_MARK,
250 VIO_D11_MARK, VIO_D10_MARK, VIO_D9_MARK, VIO_D8_MARK,
251 VIO_D7_MARK, VIO_D6_MARK, VIO_D5_MARK, VIO_D4_MARK,
252 VIO_D3_MARK, VIO_D2_MARK, VIO_D1_MARK, VIO_D0_MARK,
253 VIO_FLD_MARK, VIO_CKO_MARK,
254 VIO_VD1_MARK, VIO_HD1_MARK, VIO_CLK1_MARK,
255 VIO_HD2_MARK, VIO_VD2_MARK, VIO_CLK2_MARK,
256
257 LCDD23_MARK, LCDD22_MARK, LCDD21_MARK, LCDD20_MARK,
258 LCDD19_MARK, LCDD18_MARK, LCDD17_MARK, LCDD16_MARK,
259 LCDD15_MARK, LCDD14_MARK, LCDD13_MARK, LCDD12_MARK,
260 LCDD11_MARK, LCDD10_MARK, LCDD9_MARK, LCDD8_MARK,
261 LCDD7_MARK, LCDD6_MARK, LCDD5_MARK, LCDD4_MARK,
262 LCDD3_MARK, LCDD2_MARK, LCDD1_MARK, LCDD0_MARK,
263 LCDDON_MARK, LCDVCPWC_MARK, LCDVEPWC_MARK,
264 LCDVSYN_MARK, LCDDCK_MARK, LCDHSYN_MARK, LCDDISP_MARK,
265 LCDRS_MARK, LCDCS_MARK, LCDWR_MARK, LCDRD_MARK,
266 LCDLCLK_PTR_MARK, LCDLCLK_PTW_MARK,
267
268 IRQ0_MARK, IRQ1_MARK, IRQ2_MARK, IRQ3_MARK,
269 IRQ4_MARK, IRQ5_MARK, IRQ6_MARK, IRQ7_MARK,
270
271 AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK,
272 AUDCK_MARK, AUDSYNC_MARK,
273
274 SDHI0CD_PTD_MARK, SDHI0WP_PTD_MARK,
275 SDHI0D3_PTD_MARK, SDHI0D2_PTD_MARK,
276 SDHI0D1_PTD_MARK, SDHI0D0_PTD_MARK,
277 SDHI0CMD_PTD_MARK, SDHI0CLK_PTD_MARK,
278
279 SDHI0CD_PTS_MARK, SDHI0WP_PTS_MARK,
280 SDHI0D3_PTS_MARK, SDHI0D2_PTS_MARK,
281 SDHI0D1_PTS_MARK, SDHI0D0_PTS_MARK,
282 SDHI0CMD_PTS_MARK, SDHI0CLK_PTS_MARK,
283
284 SDHI1CD_MARK, SDHI1WP_MARK, SDHI1D3_MARK, SDHI1D2_MARK,
285 SDHI1D1_MARK, SDHI1D0_MARK, SDHI1CMD_MARK, SDHI1CLK_MARK,
286
287 SIUAFCK_MARK, SIUAILR_MARK, SIUAIBT_MARK, SIUAISLD_MARK,
288 SIUAOLR_MARK, SIUAOBT_MARK, SIUAOSLD_MARK, SIUAMCK_MARK,
289 SIUAISPD_MARK, SIUAOSPD_MARK,
290
291 SIUBFCK_MARK, SIUBILR_MARK, SIUBIBT_MARK, SIUBISLD_MARK,
292 SIUBOLR_MARK, SIUBOBT_MARK, SIUBOSLD_MARK, SIUBMCK_MARK,
293
294 IRDA_IN_MARK, IRDA_OUT_MARK,
295
296 DV_CLKI_MARK, DV_CLK_MARK, DV_HSYNC_MARK, DV_VSYNC_MARK,
297 DV_D15_MARK, DV_D14_MARK, DV_D13_MARK, DV_D12_MARK,
298 DV_D11_MARK, DV_D10_MARK, DV_D9_MARK, DV_D8_MARK,
299 DV_D7_MARK, DV_D6_MARK, DV_D5_MARK, DV_D4_MARK,
300 DV_D3_MARK, DV_D2_MARK, DV_D1_MARK, DV_D0_MARK,
301
302 KEYIN0_MARK, KEYIN1_MARK, KEYIN2_MARK, KEYIN3_MARK, KEYIN4_MARK,
303 KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
304 KEYOUT4_IN6_MARK, KEYOUT5_IN5_MARK,
305
306 MSIOF0_PTF_TXD_MARK, MSIOF0_PTF_RXD_MARK, MSIOF0_PTF_MCK_MARK,
307 MSIOF0_PTF_TSYNC_MARK, MSIOF0_PTF_TSCK_MARK, MSIOF0_PTF_RSYNC_MARK,
308 MSIOF0_PTF_RSCK_MARK, MSIOF0_PTF_SS1_MARK, MSIOF0_PTF_SS2_MARK,
309
310 MSIOF0_PTT_TXD_MARK, MSIOF0_PTT_RXD_MARK, MSIOF0_PTX_MCK_MARK,
311 MSIOF0_PTT_TSYNC_MARK, MSIOF0_PTT_TSCK_MARK, MSIOF0_PTT_RSYNC_MARK,
312 MSIOF0_PTT_RSCK_MARK, MSIOF0_PTT_SS1_MARK, MSIOF0_PTT_SS2_MARK,
313
314 MSIOF1_TXD_MARK, MSIOF1_RXD_MARK, MSIOF1_MCK_MARK,
315 MSIOF1_TSYNC_MARK, MSIOF1_TSCK_MARK, MSIOF1_RSYNC_MARK,
316 MSIOF1_RSCK_MARK, MSIOF1_SS1_MARK, MSIOF1_SS2_MARK,
317
318 TS0_SDAT_MARK, TS0_SCK_MARK, TS0_SDEN_MARK, TS0_SPSYNC_MARK,
319
320 FCE_MARK, NAF7_MARK, NAF6_MARK, NAF5_MARK, NAF4_MARK,
321 NAF3_MARK, NAF2_MARK, NAF1_MARK, NAF0_MARK, FCDE_MARK,
322 FOE_MARK, FSC_MARK, FWE_MARK, FRB_MARK,
323
324 DACK1_MARK, DREQ1_MARK, DACK0_MARK, DREQ0_MARK,
325
326 AN3_MARK, AN2_MARK, AN1_MARK, AN0_MARK, ADTRG_MARK,
327
328 STATUS0_MARK, PDSTATUS_MARK,
329
330 TPUTO3_MARK, TPUTO2_MARK, TPUTO1_MARK, TPUTO0_MARK,
331
332 D31_MARK, D30_MARK, D29_MARK, D28_MARK,
333 D27_MARK, D26_MARK, D25_MARK, D24_MARK,
334 D23_MARK, D22_MARK, D21_MARK, D20_MARK,
335 D19_MARK, D18_MARK, D17_MARK, D16_MARK,
336 IOIS16_MARK, WAIT_MARK, BS_MARK,
337 A25_MARK, A24_MARK, A23_MARK, A22_MARK,
338 CS6B_CE1B_MARK, CS6A_CE2B_MARK,
339 CS5B_CE1A_MARK, CS5A_CE2A_MARK,
340 WE3_ICIOWR_MARK, WE2_ICIORD_MARK,
341
342 IDED15_MARK, IDED14_MARK, IDED13_MARK, IDED12_MARK,
343 IDED11_MARK, IDED10_MARK, IDED9_MARK, IDED8_MARK,
344 IDED7_MARK, IDED6_MARK, IDED5_MARK, IDED4_MARK,
345 IDED3_MARK, IDED2_MARK, IDED1_MARK, IDED0_MARK,
346 DIRECTION_MARK, EXBUF_ENB_MARK, IDERST_MARK, IODACK_MARK,
347 IODREQ_MARK, IDEIORDY_MARK, IDEINT_MARK, IDEIOWR_MARK,
348 IDEIORD_MARK, IDECS1_MARK, IDECS0_MARK, IDEA2_MARK,
349 IDEA1_MARK, IDEA0_MARK,
350 PINMUX_MARK_END,
351};
352
353static pinmux_enum_t pinmux_data[] = {
354 /* PTA GPIO */
355 PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
356 PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT),
357 PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT),
358 PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT, PTA4_IN_PU),
359 PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT, PTA3_IN_PU),
360 PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT, PTA2_IN_PU),
361 PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT, PTA1_IN_PU),
362 PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT, PTA0_IN_PU),
363
364 /* PTB GPIO */
365 PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
366 PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT),
367 PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT),
368 PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT),
369 PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT),
370 PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT, PTB2_IN_PU),
371 PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT, PTB1_IN_PU),
372 PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT),
373
374 /* PTC GPIO */
375 PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT),
376 PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT),
377 PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT),
378 PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT),
379 PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT),
380 PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT),
381 PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT),
382 PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT),
383
384 /* PTD GPIO */
385 PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT),
386 PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT),
387 PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT),
388 PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT),
389 PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT),
390 PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT),
391 PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT),
392 PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT),
393
394 /* PTE GPIO */
395 PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT),
396 PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT),
397 PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT),
398 PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT),
399 PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT),
400 PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT),
401
402 /* PTF GPIO */
403 PINMUX_DATA(PTF7_DATA, PTF7_IN, PTF7_OUT),
404 PINMUX_DATA(PTF6_DATA, PTF6_IN, PTF6_OUT),
405 PINMUX_DATA(PTF5_DATA, PTF5_IN, PTF5_OUT),
406 PINMUX_DATA(PTF4_DATA, PTF4_IN, PTF4_OUT),
407 PINMUX_DATA(PTF3_DATA, PTF3_IN, PTF3_OUT),
408 PINMUX_DATA(PTF2_DATA, PTF2_IN, PTF2_OUT),
409 PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_OUT),
410 PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT),
411
412 /* PTG GPIO */
413 PINMUX_DATA(PTG5_DATA, PTG5_OUT),
414 PINMUX_DATA(PTG4_DATA, PTG4_OUT),
415 PINMUX_DATA(PTG3_DATA, PTG3_OUT),
416 PINMUX_DATA(PTG2_DATA, PTG2_OUT),
417 PINMUX_DATA(PTG1_DATA, PTG1_OUT),
418 PINMUX_DATA(PTG0_DATA, PTG0_OUT),
419
420 /* PTH GPIO */
421 PINMUX_DATA(PTH7_DATA, PTH7_IN, PTH7_OUT),
422 PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT),
423 PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT),
424 PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT),
425 PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT),
426 PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT),
427 PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT),
428 PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT),
429
430 /* PTJ GPIO */
431 PINMUX_DATA(PTJ7_DATA, PTJ7_OUT),
432 PINMUX_DATA(PTJ5_DATA, PTJ5_OUT),
433 PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT),
434 PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT),
435 PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT),
436 PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT),
437
438 /* PTK GPIO */
439 PINMUX_DATA(PTK7_DATA, PTK7_IN, PTK7_OUT),
440 PINMUX_DATA(PTK6_DATA, PTK6_IN, PTK6_OUT),
441 PINMUX_DATA(PTK5_DATA, PTK5_IN, PTK5_OUT),
442 PINMUX_DATA(PTK4_DATA, PTK4_IN, PTK4_OUT),
443 PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT),
444 PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT),
445 PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT),
446 PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT),
447
448 /* PTL GPIO */
449 PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT),
450 PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT),
451 PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT),
452 PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT),
453 PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT),
454 PINMUX_DATA(PTL2_DATA, PTL2_IN, PTL2_OUT),
455 PINMUX_DATA(PTL1_DATA, PTL1_IN, PTL1_OUT),
456 PINMUX_DATA(PTL0_DATA, PTL0_IN, PTL0_OUT),
457
458 /* PTM GPIO */
459 PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT),
460 PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT),
461 PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT),
462 PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT),
463 PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT),
464 PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT),
465 PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT),
466 PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT),
467
468 /* PTN GPIO */
469 PINMUX_DATA(PTN7_DATA, PTN7_IN, PTN7_OUT),
470 PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT),
471 PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT),
472 PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT),
473 PINMUX_DATA(PTN3_DATA, PTN3_IN, PTN3_OUT),
474 PINMUX_DATA(PTN2_DATA, PTN2_IN, PTN2_OUT),
475 PINMUX_DATA(PTN1_DATA, PTN1_IN, PTN1_OUT),
476 PINMUX_DATA(PTN0_DATA, PTN0_IN, PTN0_OUT),
477
478 /* PTQ GPIO */
479 PINMUX_DATA(PTQ3_DATA, PTQ3_IN),
480 PINMUX_DATA(PTQ2_DATA, PTQ2_IN),
481 PINMUX_DATA(PTQ1_DATA, PTQ1_IN),
482 PINMUX_DATA(PTQ0_DATA, PTQ0_IN),
483
484 /* PTR GPIO */
485 PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT),
486 PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT),
487 PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT),
488 PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT),
489 PINMUX_DATA(PTR3_DATA, PTR3_IN),
490 PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_IN_PU),
491 PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT),
492 PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT),
493
494 /* PTS GPIO */
495 PINMUX_DATA(PTS7_DATA, PTS7_IN, PTS7_OUT),
496 PINMUX_DATA(PTS6_DATA, PTS6_IN, PTS6_OUT),
497 PINMUX_DATA(PTS5_DATA, PTS5_IN, PTS5_OUT),
498 PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT),
499 PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT),
500 PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT),
501 PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT),
502 PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT),
503
504 /* PTT GPIO */
505 PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT),
506 PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT),
507 PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT),
508 PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT),
509 PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT),
510 PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT),
511
512 /* PTU GPIO */
513 PINMUX_DATA(PTU5_DATA, PTU5_IN, PTU5_OUT),
514 PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT),
515 PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT),
516 PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT),
517 PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT),
518 PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT),
519
520 /* PTV GPIO */
521 PINMUX_DATA(PTV7_DATA, PTV7_IN, PTV7_OUT),
522 PINMUX_DATA(PTV6_DATA, PTV6_IN, PTV6_OUT),
523 PINMUX_DATA(PTV5_DATA, PTV5_IN, PTV5_OUT),
524 PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT),
525 PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT),
526 PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT),
527 PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT),
528 PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT),
529
530 /* PTW GPIO */
531 PINMUX_DATA(PTW7_DATA, PTW7_IN, PTW7_OUT),
532 PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_OUT),
533 PINMUX_DATA(PTW5_DATA, PTW5_IN, PTW5_OUT),
534 PINMUX_DATA(PTW4_DATA, PTW4_IN, PTW4_OUT),
535 PINMUX_DATA(PTW3_DATA, PTW3_IN, PTW3_OUT),
536 PINMUX_DATA(PTW2_DATA, PTW2_IN, PTW2_OUT),
537 PINMUX_DATA(PTW1_DATA, PTW1_IN, PTW1_OUT),
538 PINMUX_DATA(PTW0_DATA, PTW0_IN, PTW0_OUT),
539
540 /* PTX GPIO */
541 PINMUX_DATA(PTX7_DATA, PTX7_IN, PTX7_OUT),
542 PINMUX_DATA(PTX6_DATA, PTX6_IN, PTX6_OUT),
543 PINMUX_DATA(PTX5_DATA, PTX5_IN, PTX5_OUT),
544 PINMUX_DATA(PTX4_DATA, PTX4_IN, PTX4_OUT),
545 PINMUX_DATA(PTX3_DATA, PTX3_IN, PTX3_OUT),
546 PINMUX_DATA(PTX2_DATA, PTX2_IN, PTX2_OUT),
547 PINMUX_DATA(PTX1_DATA, PTX1_IN, PTX1_OUT),
548 PINMUX_DATA(PTX0_DATA, PTX0_IN, PTX0_OUT),
549
550 /* PTY GPIO */
551 PINMUX_DATA(PTY7_DATA, PTY7_IN, PTY7_OUT),
552 PINMUX_DATA(PTY6_DATA, PTY6_IN, PTY6_OUT),
553 PINMUX_DATA(PTY5_DATA, PTY5_IN, PTY5_OUT),
554 PINMUX_DATA(PTY4_DATA, PTY4_IN, PTY4_OUT),
555 PINMUX_DATA(PTY3_DATA, PTY3_IN, PTY3_OUT),
556 PINMUX_DATA(PTY2_DATA, PTY2_IN, PTY2_OUT),
557 PINMUX_DATA(PTY1_DATA, PTY1_IN, PTY1_OUT),
558 PINMUX_DATA(PTY0_DATA, PTY0_IN, PTY0_OUT),
559
560 /* PTZ GPIO */
561 PINMUX_DATA(PTZ7_DATA, PTZ7_IN, PTZ7_OUT),
562 PINMUX_DATA(PTZ6_DATA, PTZ6_IN, PTZ6_OUT),
563 PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_OUT),
564 PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_OUT),
565 PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_OUT),
566 PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_OUT),
567 PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_OUT),
568 PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT),
569
570 /* PTA FN */
571 PINMUX_DATA(D23_MARK, PSA15_PSA14_FN1, PTA7_FN),
572 PINMUX_DATA(KEYOUT2_MARK, PSA15_PSA14_FN2, PTA7_FN),
573 PINMUX_DATA(D22_MARK, PSA15_PSA14_FN1, PTA6_FN),
574 PINMUX_DATA(KEYOUT1_MARK, PSA15_PSA14_FN2, PTA6_FN),
575 PINMUX_DATA(D21_MARK, PSA15_PSA14_FN1, PTA5_FN),
576 PINMUX_DATA(KEYOUT0_MARK, PSA15_PSA14_FN2, PTA5_FN),
577 PINMUX_DATA(D20_MARK, PSA15_PSA14_FN1, PTA4_FN),
578 PINMUX_DATA(KEYIN4_MARK, PSA15_PSA14_FN2, PTA4_FN),
579 PINMUX_DATA(D19_MARK, PSA15_PSA14_FN1, PTA3_FN),
580 PINMUX_DATA(KEYIN3_MARK, PSA15_PSA14_FN2, PTA3_FN),
581 PINMUX_DATA(D18_MARK, PSA15_PSA14_FN1, PTA2_FN),
582 PINMUX_DATA(KEYIN2_MARK, PSA15_PSA14_FN2, PTA2_FN),
583 PINMUX_DATA(D17_MARK, PSA15_PSA14_FN1, PTA1_FN),
584 PINMUX_DATA(KEYIN1_MARK, PSA15_PSA14_FN2, PTA1_FN),
585 PINMUX_DATA(D16_MARK, PSA15_PSA14_FN1, PTA0_FN),
586 PINMUX_DATA(KEYIN0_MARK, PSA15_PSA14_FN2, PTA0_FN),
587
588 /* PTB FN */
589 PINMUX_DATA(D31_MARK, PTB7_FN),
590 PINMUX_DATA(D30_MARK, PTB6_FN),
591 PINMUX_DATA(D29_MARK, PTB5_FN),
592 PINMUX_DATA(D28_MARK, PTB4_FN),
593 PINMUX_DATA(D27_MARK, PTB3_FN),
594 PINMUX_DATA(D26_MARK, PSA15_PSA14_FN1, PTB2_FN),
595 PINMUX_DATA(KEYOUT5_IN5_MARK, PSA15_PSA14_FN2, PTB2_FN),
596 PINMUX_DATA(D25_MARK, PSA15_PSA14_FN1, PTB1_FN),
597 PINMUX_DATA(KEYOUT4_IN6_MARK, PSA15_PSA14_FN2, PTB1_FN),
598 PINMUX_DATA(D24_MARK, PSA15_PSA14_FN1, PTB0_FN),
599 PINMUX_DATA(KEYOUT3_MARK, PSA15_PSA14_FN2, PTB0_FN),
600
601 /* PTC FN */
602 PINMUX_DATA(IDED15_MARK, PSA11_PSA10_FN1, PTC7_FN),
603 PINMUX_DATA(SDHI1CD_MARK, PSA11_PSA10_FN2, PTC7_FN),
604 PINMUX_DATA(IDED14_MARK, PSA11_PSA10_FN1, PTC6_FN),
605 PINMUX_DATA(SDHI1WP_MARK, PSA11_PSA10_FN2, PTC6_FN),
606 PINMUX_DATA(IDED13_MARK, PSA11_PSA10_FN1, PTC5_FN),
607 PINMUX_DATA(SDHI1D3_MARK, PSA11_PSA10_FN2, PTC5_FN),
608 PINMUX_DATA(IDED12_MARK, PSA11_PSA10_FN1, PTC4_FN),
609 PINMUX_DATA(SDHI1D2_MARK, PSA11_PSA10_FN2, PTC4_FN),
610 PINMUX_DATA(IDED11_MARK, PSA11_PSA10_FN1, PTC3_FN),
611 PINMUX_DATA(SDHI1D1_MARK, PSA11_PSA10_FN2, PTC3_FN),
612 PINMUX_DATA(IDED10_MARK, PSA11_PSA10_FN1, PTC2_FN),
613 PINMUX_DATA(SDHI1D0_MARK, PSA11_PSA10_FN2, PTC2_FN),
614 PINMUX_DATA(IDED9_MARK, PSA11_PSA10_FN1, PTC1_FN),
615 PINMUX_DATA(SDHI1CMD_MARK, PSA11_PSA10_FN2, PTC1_FN),
616 PINMUX_DATA(IDED8_MARK, PSA11_PSA10_FN1, PTC0_FN),
617 PINMUX_DATA(SDHI1CLK_MARK, PSA11_PSA10_FN2, PTC0_FN),
618
619 /* PTD FN */
620 PINMUX_DATA(IDED7_MARK, PSA11_PSA10_FN1, PTD7_FN),
621 PINMUX_DATA(SDHI0CD_PTD_MARK, PSA11_PSA10_FN2, PTD7_FN),
622 PINMUX_DATA(IDED6_MARK, PSA11_PSA10_FN1, PTD6_FN),
623 PINMUX_DATA(SDHI0WP_PTD_MARK, PSA11_PSA10_FN2, PTD6_FN),
624 PINMUX_DATA(IDED5_MARK, PSA11_PSA10_FN1, PTD5_FN),
625 PINMUX_DATA(SDHI0D3_PTD_MARK, PSA11_PSA10_FN2, PTD5_FN),
626 PINMUX_DATA(IDED4_MARK, PSA11_PSA10_FN1, PTD4_FN),
627 PINMUX_DATA(SDHI0D2_PTD_MARK, PSA11_PSA10_FN2, PTD4_FN),
628 PINMUX_DATA(IDED3_MARK, PSA11_PSA10_FN1, PTD3_FN),
629 PINMUX_DATA(SDHI0D1_PTD_MARK, PSA11_PSA10_FN2, PTD3_FN),
630 PINMUX_DATA(IDED2_MARK, PSA11_PSA10_FN1, PTD2_FN),
631 PINMUX_DATA(SDHI0D0_PTD_MARK, PSA11_PSA10_FN2, PTD2_FN),
632 PINMUX_DATA(IDED1_MARK, PSA11_PSA10_FN1, PTD1_FN),
633 PINMUX_DATA(SDHI0CMD_PTD_MARK, PSA11_PSA10_FN2, PTD1_FN),
634 PINMUX_DATA(IDED0_MARK, PSA11_PSA10_FN1, PTD0_FN),
635 PINMUX_DATA(SDHI0CLK_PTD_MARK, PSA11_PSA10_FN2, PTD0_FN),
636
637 /* PTE FN */
638 PINMUX_DATA(DIRECTION_MARK, PSA11_PSA10_FN1, PTE5_FN),
639 PINMUX_DATA(SCIF5_PTE_SCK_MARK, PSA11_PSA10_FN2, PTE5_FN),
640 PINMUX_DATA(EXBUF_ENB_MARK, PSA11_PSA10_FN1, PTE4_FN),
641 PINMUX_DATA(SCIF5_PTE_RXD_MARK, PSA11_PSA10_FN2, PTE4_FN),
642 PINMUX_DATA(IDERST_MARK, PSA11_PSA10_FN1, PTE3_FN),
643 PINMUX_DATA(SCIF5_PTE_TXD_MARK, PSA11_PSA10_FN2, PTE3_FN),
644 PINMUX_DATA(IODACK_MARK, PSA11_PSA10_FN1, PTE2_FN),
645 PINMUX_DATA(SCIF4_PTE_SCK_MARK, PSA11_PSA10_FN2, PTE2_FN),
646 PINMUX_DATA(IODREQ_MARK, PSA11_PSA10_FN1, PTE1_FN),
647 PINMUX_DATA(SCIF4_PTE_RXD_MARK, PSA11_PSA10_FN2, PTE1_FN),
648 PINMUX_DATA(IDEIORDY_MARK, PSA11_PSA10_FN1, PTE0_FN),
649 PINMUX_DATA(SCIF4_PTE_TXD_MARK, PSA11_PSA10_FN2, PTE0_FN),
650
651 /* PTF FN */
652 PINMUX_DATA(IDEINT_MARK, PTF7_FN),
653 PINMUX_DATA(IDEIOWR_MARK, PSA5_PSA4_FN1, PTF6_FN),
654 PINMUX_DATA(MSIOF0_PTF_SS2_MARK, PSA5_PSA4_FN2, PTF6_FN),
655 PINMUX_DATA(MSIOF0_PTF_RSYNC_MARK, PSA5_PSA4_FN3, PTF6_FN),
656 PINMUX_DATA(IDEIORD_MARK, PSA5_PSA4_FN1, PTF5_FN),
657 PINMUX_DATA(MSIOF0_PTF_SS1_MARK, PSA5_PSA4_FN2, PTF5_FN),
658 PINMUX_DATA(MSIOF0_PTF_RSCK_MARK, PSA5_PSA4_FN3, PTF5_FN),
659 PINMUX_DATA(IDECS1_MARK, PSA11_PSA10_FN1, PTF4_FN),
660 PINMUX_DATA(MSIOF0_PTF_TSYNC_MARK, PSA11_PSA10_FN2, PTF4_FN),
661 PINMUX_DATA(IDECS0_MARK, PSA11_PSA10_FN1, PTF3_FN),
662 PINMUX_DATA(MSIOF0_PTF_TSCK_MARK, PSA11_PSA10_FN2, PTF3_FN),
663 PINMUX_DATA(IDEA2_MARK, PSA11_PSA10_FN1, PTF2_FN),
664 PINMUX_DATA(MSIOF0_PTF_RXD_MARK, PSA11_PSA10_FN2, PTF2_FN),
665 PINMUX_DATA(IDEA1_MARK, PSA11_PSA10_FN1, PTF1_FN),
666 PINMUX_DATA(MSIOF0_PTF_TXD_MARK, PSA11_PSA10_FN2, PTF1_FN),
667 PINMUX_DATA(IDEA0_MARK, PSA11_PSA10_FN1, PTF0_FN),
668 PINMUX_DATA(MSIOF0_PTF_MCK_MARK, PSA11_PSA10_FN2, PTF0_FN),
669
670 /* PTG FN */
671 PINMUX_DATA(AUDCK_MARK, PTG5_FN),
672 PINMUX_DATA(AUDSYNC_MARK, PTG4_FN),
673 PINMUX_DATA(AUDATA3_MARK, PSA3_PSA2_FN1, PTG3_FN),
674 PINMUX_DATA(TPUTO3_MARK, PSA3_PSA2_FN2, PTG3_FN),
675 PINMUX_DATA(AUDATA2_MARK, PSA3_PSA2_FN1, PTG2_FN),
676 PINMUX_DATA(TPUTO2_MARK, PSA3_PSA2_FN2, PTG2_FN),
677 PINMUX_DATA(AUDATA1_MARK, PSA3_PSA2_FN1, PTG1_FN),
678 PINMUX_DATA(TPUTO1_MARK, PSA3_PSA2_FN2, PTG1_FN),
679 PINMUX_DATA(AUDATA0_MARK, PSA3_PSA2_FN1, PTG0_FN),
680 PINMUX_DATA(TPUTO0_MARK, PSA3_PSA2_FN2, PTG0_FN),
681
682 /* PTG FN */
683 PINMUX_DATA(LCDVCPWC_MARK, PTH7_FN),
684 PINMUX_DATA(LCDRD_MARK, PSB15_PSB14_FN1, PTH6_FN),
685 PINMUX_DATA(DV_CLKI_MARK, PSB15_PSB14_FN2, PTH6_FN),
686 PINMUX_DATA(LCDVSYN_MARK, PSB15_PSB14_FN1, PTH5_FN),
687 PINMUX_DATA(DV_CLK_MARK, PSB15_PSB14_FN2, PTH5_FN),
688 PINMUX_DATA(LCDDISP_MARK, PSB13_PSB12_LCDC_RGB, PTH4_FN),
689 PINMUX_DATA(LCDRS_MARK, PSB13_PSB12_LCDC_SYS, PTH4_FN),
690 PINMUX_DATA(LCDHSYN_MARK, PSB13_PSB12_LCDC_RGB, PTH3_FN),
691 PINMUX_DATA(LCDCS_MARK, PSB13_PSB12_LCDC_SYS, PTH3_FN),
692 PINMUX_DATA(LCDDON_MARK, PTH2_FN),
693 PINMUX_DATA(LCDDCK_MARK, PSB13_PSB12_LCDC_RGB, PTH1_FN),
694 PINMUX_DATA(LCDWR_MARK, PSB13_PSB12_LCDC_SYS, PTH1_FN),
695 PINMUX_DATA(LCDVEPWC_MARK, PTH0_FN),
696
697 /* PTJ FN */
698 PINMUX_DATA(STATUS0_MARK, PTJ7_FN),
699 PINMUX_DATA(PDSTATUS_MARK, PTJ5_FN),
700 PINMUX_DATA(A25_MARK, PTJ3_FN),
701 PINMUX_DATA(A24_MARK, PTJ2_FN),
702 PINMUX_DATA(A23_MARK, PTJ1_FN),
703 PINMUX_DATA(A22_MARK, PTJ0_FN),
704
705 /* PTK FN */
706 PINMUX_DATA(SIUAFCK_MARK, PTK7_FN),
707 PINMUX_DATA(SIUAILR_MARK, PSB9_PSB8_FN1, PTK6_FN),
708 PINMUX_DATA(MSIOF1_SS2_MARK, PSB9_PSB8_FN2, PTK6_FN),
709 PINMUX_DATA(MSIOF1_RSYNC_MARK, PSB9_PSB8_FN3, PTK6_FN),
710 PINMUX_DATA(SIUAIBT_MARK, PSB9_PSB8_FN1, PTK5_FN),
711 PINMUX_DATA(MSIOF1_SS1_MARK, PSB9_PSB8_FN2, PTK5_FN),
712 PINMUX_DATA(MSIOF1_RSCK_MARK, PSB9_PSB8_FN3, PTK5_FN),
713 PINMUX_DATA(SIUAISLD_MARK, PSB7_PSB6_FN1, PTK4_FN),
714 PINMUX_DATA(MSIOF1_RXD_MARK, PSB7_PSB6_FN2, PTK4_FN),
715 PINMUX_DATA(SIUAOLR_MARK, PSB7_PSB6_FN1, PTK3_FN),
716 PINMUX_DATA(MSIOF1_TSYNC_MARK, PSB7_PSB6_FN2, PTK3_FN),
717 PINMUX_DATA(SIUAOBT_MARK, PSB7_PSB6_FN1, PTK2_FN),
718 PINMUX_DATA(MSIOF1_TSCK_MARK, PSB7_PSB6_FN2, PTK2_FN),
719 PINMUX_DATA(SIUAOSLD_MARK, PSB7_PSB6_FN1, PTK1_FN),
720 PINMUX_DATA(MSIOF1_RXD_MARK, PSB7_PSB6_FN2, PTK1_FN),
721 PINMUX_DATA(SIUAMCK_MARK, PSB7_PSB6_FN1, PTK0_FN),
722 PINMUX_DATA(MSIOF1_MCK_MARK, PSB7_PSB6_FN2, PTK0_FN),
723
724 /* PTL FN */
725 PINMUX_DATA(LCDD15_MARK, PSB5_PSB4_FN1, PTL7_FN),
726 PINMUX_DATA(DV_D15_MARK, PSB5_PSB4_FN2, PTL7_FN),
727 PINMUX_DATA(LCDD14_MARK, PSB5_PSB4_FN1, PTL6_FN),
728 PINMUX_DATA(DV_D14_MARK, PSB5_PSB4_FN2, PTL6_FN),
729 PINMUX_DATA(LCDD13_MARK, PSB5_PSB4_FN1, PTL5_FN),
730 PINMUX_DATA(DV_D13_MARK, PSB5_PSB4_FN2, PTL5_FN),
731 PINMUX_DATA(LCDD12_MARK, PSB5_PSB4_FN1, PTL4_FN),
732 PINMUX_DATA(DV_D12_MARK, PSB5_PSB4_FN2, PTL4_FN),
733 PINMUX_DATA(LCDD11_MARK, PSB5_PSB4_FN1, PTL3_FN),
734 PINMUX_DATA(DV_D11_MARK, PSB5_PSB4_FN2, PTL3_FN),
735 PINMUX_DATA(LCDD10_MARK, PSB5_PSB4_FN1, PTL2_FN),
736 PINMUX_DATA(DV_D10_MARK, PSB5_PSB4_FN2, PTL2_FN),
737 PINMUX_DATA(LCDD9_MARK, PSB5_PSB4_FN1, PTL1_FN),
738 PINMUX_DATA(DV_D9_MARK, PSB5_PSB4_FN2, PTL1_FN),
739 PINMUX_DATA(LCDD8_MARK, PSB5_PSB4_FN1, PTL0_FN),
740 PINMUX_DATA(DV_D8_MARK, PSB5_PSB4_FN2, PTL0_FN),
741
742 /* PTM FN */
743 PINMUX_DATA(LCDD7_MARK, PSB5_PSB4_FN1, PTM7_FN),
744 PINMUX_DATA(DV_D7_MARK, PSB5_PSB4_FN2, PTM7_FN),
745 PINMUX_DATA(LCDD6_MARK, PSB5_PSB4_FN1, PTM6_FN),
746 PINMUX_DATA(DV_D6_MARK, PSB5_PSB4_FN2, PTM6_FN),
747 PINMUX_DATA(LCDD5_MARK, PSB5_PSB4_FN1, PTM5_FN),
748 PINMUX_DATA(DV_D5_MARK, PSB5_PSB4_FN2, PTM5_FN),
749 PINMUX_DATA(LCDD4_MARK, PSB5_PSB4_FN1, PTM4_FN),
750 PINMUX_DATA(DV_D4_MARK, PSB5_PSB4_FN2, PTM4_FN),
751 PINMUX_DATA(LCDD3_MARK, PSB5_PSB4_FN1, PTM3_FN),
752 PINMUX_DATA(DV_D3_MARK, PSB5_PSB4_FN2, PTM3_FN),
753 PINMUX_DATA(LCDD2_MARK, PSB5_PSB4_FN1, PTM2_FN),
754 PINMUX_DATA(DV_D2_MARK, PSB5_PSB4_FN2, PTM2_FN),
755 PINMUX_DATA(LCDD1_MARK, PSB5_PSB4_FN1, PTM1_FN),
756 PINMUX_DATA(DV_D1_MARK, PSB5_PSB4_FN2, PTM1_FN),
757 PINMUX_DATA(LCDD0_MARK, PSB5_PSB4_FN1, PTM0_FN),
758 PINMUX_DATA(DV_D0_MARK, PSB5_PSB4_FN2, PTM0_FN),
759
760 /* PTN FN */
761 PINMUX_DATA(LCDD23_MARK, PSB3_PSB2_FN1, PTN7_FN),
762 PINMUX_DATA(SCIF5_PTN_SCK_MARK, PSB3_PSB2_FN2, PTN7_FN),
763 PINMUX_DATA(LCDD22_MARK, PSB3_PSB2_FN1, PTN6_FN),
764 PINMUX_DATA(SCIF5_PTN_RXD_MARK, PSB3_PSB2_FN2, PTN6_FN),
765 PINMUX_DATA(LCDD21_MARK, PSB3_PSB2_FN1, PTN5_FN),
766 PINMUX_DATA(SCIF5_PTN_TXD_MARK, PSB3_PSB2_FN2, PTN5_FN),
767 PINMUX_DATA(LCDD20_MARK, PSB3_PSB2_FN1, PTN4_FN),
768 PINMUX_DATA(SCIF4_PTN_SCK_MARK, PSB3_PSB2_FN2, PTN4_FN),
769 PINMUX_DATA(LCDD19_MARK, PSB3_PSB2_FN1, PTN3_FN),
770 PINMUX_DATA(SCIF4_PTN_RXD_MARK, PSB3_PSB2_FN2, PTN3_FN),
771 PINMUX_DATA(LCDD18_MARK, PSB3_PSB2_FN1, PTN2_FN),
772 PINMUX_DATA(SCIF4_PTN_TXD_MARK, PSB3_PSB2_FN2, PTN2_FN),
773 PINMUX_DATA(LCDD17_MARK, PSB5_PSB4_FN1, PTN1_FN),
774 PINMUX_DATA(DV_VSYNC_MARK, PSB5_PSB4_FN2, PTN1_FN),
775 PINMUX_DATA(LCDD16_MARK, PSB5_PSB4_FN1, PTN0_FN),
776 PINMUX_DATA(DV_HSYNC_MARK, PSB5_PSB4_FN2, PTN0_FN),
777
778 /* PTQ FN */
779 PINMUX_DATA(AN3_MARK, PTQ3_FN),
780 PINMUX_DATA(AN2_MARK, PTQ2_FN),
781 PINMUX_DATA(AN1_MARK, PTQ1_FN),
782 PINMUX_DATA(AN0_MARK, PTQ0_FN),
783
784 /* PTR FN */
785 PINMUX_DATA(CS6B_CE1B_MARK, PTR7_FN),
786 PINMUX_DATA(CS6A_CE2B_MARK, PTR6_FN),
787 PINMUX_DATA(CS5B_CE1A_MARK, PTR5_FN),
788 PINMUX_DATA(CS5A_CE2A_MARK, PTR4_FN),
789 PINMUX_DATA(IOIS16_MARK, PSA13_PSA12_FN1, PTR3_FN),
790 PINMUX_DATA(LCDLCLK_PTR_MARK, PSA13_PSA12_FN2, PTR3_FN),
791 PINMUX_DATA(WAIT_MARK, PTR2_FN),
792 PINMUX_DATA(WE3_ICIOWR_MARK, PTR1_FN),
793 PINMUX_DATA(WE2_ICIORD_MARK, PTR0_FN),
794
795 /* PTS FN */
796 PINMUX_DATA(SCIF1_PTS_SCK_MARK, PSC15_PSC14_FN1, PTS7_FN),
797 PINMUX_DATA(SDHI0CD_PTS_MARK, PSC15_PSC14_FN2, PTS7_FN),
798 PINMUX_DATA(SCIF1_PTS_RXD_MARK, PSC15_PSC14_FN1, PTS6_FN),
799 PINMUX_DATA(SDHI0WP_PTS_MARK, PSC15_PSC14_FN2, PTS6_FN),
800 PINMUX_DATA(SCIF1_PTS_TXD_MARK, PSC15_PSC14_FN1, PTS5_FN),
801 PINMUX_DATA(SDHI0D3_PTS_MARK, PSC15_PSC14_FN2, PTS5_FN),
802 PINMUX_DATA(SCIF3_PTS_CTS_MARK, PSC15_PSC14_FN1, PTS4_FN),
803 PINMUX_DATA(SDHI0D2_PTS_MARK, PSC15_PSC14_FN2, PTS4_FN),
804 PINMUX_DATA(SCIF3_PTS_RTS_MARK, PSC15_PSC14_FN1, PTS3_FN),
805 PINMUX_DATA(SDHI0D1_PTS_MARK, PSC15_PSC14_FN2, PTS3_FN),
806 PINMUX_DATA(SCIF3_PTS_SCK_MARK, PSC15_PSC14_FN1, PTS2_FN),
807 PINMUX_DATA(SDHI0D0_PTS_MARK, PSC15_PSC14_FN2, PTS2_FN),
808 PINMUX_DATA(SCIF3_PTS_RXD_MARK, PSC15_PSC14_FN1, PTS1_FN),
809 PINMUX_DATA(SDHI0CMD_PTS_MARK, PSC15_PSC14_FN2, PTS1_FN),
810 PINMUX_DATA(SCIF3_PTS_TXD_MARK, PSC15_PSC14_FN1, PTS0_FN),
811 PINMUX_DATA(SDHI0CLK_PTS_MARK, PSC15_PSC14_FN2, PTS0_FN),
812
813 /* PTT FN */
814 PINMUX_DATA(SCIF0_PTT_SCK_MARK, PSC13_PSC12_FN1, PTT5_FN),
815 PINMUX_DATA(MSIOF0_PTT_TSCK_MARK, PSC13_PSC12_FN2, PTT5_FN),
816 PINMUX_DATA(SCIF0_PTT_RXD_MARK, PSC13_PSC12_FN1, PTT4_FN),
817 PINMUX_DATA(MSIOF0_PTT_RXD_MARK, PSC13_PSC12_FN2, PTT4_FN),
818 PINMUX_DATA(SCIF0_PTT_TXD_MARK, PSC13_PSC12_FN1, PTT3_FN),
819 PINMUX_DATA(MSIOF0_PTT_TXD_MARK, PSC13_PSC12_FN2, PTT3_FN),
820 PINMUX_DATA(SCIF2_PTT_SCK_MARK, PSC11_PSC10_FN1, PTT2_FN),
821 PINMUX_DATA(MSIOF0_PTT_TSYNC_MARK, PSC11_PSC10_FN2, PTT2_FN),
822 PINMUX_DATA(SCIF2_PTT_RXD_MARK, PSC11_PSC10_FN1, PTT1_FN),
823 PINMUX_DATA(MSIOF0_PTT_SS1_MARK, PSC11_PSC10_FN2, PTT1_FN),
824 PINMUX_DATA(MSIOF0_PTT_RSCK_MARK, PSC11_PSC10_FN3, PTT1_FN),
825 PINMUX_DATA(SCIF2_PTT_TXD_MARK, PSC11_PSC10_FN1, PTT0_FN),
826 PINMUX_DATA(MSIOF0_PTT_SS2_MARK, PSC11_PSC10_FN2, PTT0_FN),
827 PINMUX_DATA(MSIOF0_PTT_RSYNC_MARK, PSC11_PSC10_FN3, PTT0_FN),
828
829 /* PTU FN */
830 PINMUX_DATA(FCDE_MARK, PSC9_PSC8_FN1, PTU5_FN),
831 PINMUX_DATA(SCIF0_PTU_SCK_MARK, PSC9_PSC8_FN2, PTU5_FN),
832 PINMUX_DATA(FSC_MARK, PSC9_PSC8_FN1, PTU4_FN),
833 PINMUX_DATA(SCIF0_PTU_RXD_MARK, PSC9_PSC8_FN2, PTU4_FN),
834 PINMUX_DATA(FWE_MARK, PSC9_PSC8_FN1, PTU3_FN),
835 PINMUX_DATA(SCIF0_PTU_TXD_MARK, PSC9_PSC8_FN2, PTU3_FN),
836 PINMUX_DATA(FOE_MARK, PSC7_PSC6_FN1, PTU2_FN),
837 PINMUX_DATA(SCIF2_PTU_SCK_MARK, PSC7_PSC6_FN2, PTU2_FN),
838 PINMUX_DATA(VIO_VD2_MARK, PSC7_PSC6_FN3, PTU2_FN),
839 PINMUX_DATA(FRB_MARK, PSC7_PSC6_FN1, PTU1_FN),
840 PINMUX_DATA(SCIF2_PTU_RXD_MARK, PSC7_PSC6_FN2, PTU1_FN),
841 PINMUX_DATA(VIO_CLK2_MARK, PSC7_PSC6_FN3, PTU1_FN),
842 PINMUX_DATA(FCE_MARK, PSC7_PSC6_FN1, PTU0_FN),
843 PINMUX_DATA(SCIF2_PTU_TXD_MARK, PSC7_PSC6_FN2, PTU0_FN),
844 PINMUX_DATA(VIO_HD2_MARK, PSC7_PSC6_FN3, PTU0_FN),
845
846 /* PTV FN */
847 PINMUX_DATA(NAF7_MARK, PSC7_PSC6_FN1, PTV7_FN),
848 PINMUX_DATA(SCIF1_PTV_SCK_MARK, PSC7_PSC6_FN2, PTV7_FN),
849 PINMUX_DATA(VIO_D15_MARK, PSC7_PSC6_FN3, PTV7_FN),
850 PINMUX_DATA(NAF6_MARK, PSC7_PSC6_FN1, PTV6_FN),
851 PINMUX_DATA(SCIF1_PTV_RXD_MARK, PSC7_PSC6_FN2, PTV6_FN),
852 PINMUX_DATA(VIO_D14_MARK, PSC7_PSC6_FN3, PTV6_FN),
853 PINMUX_DATA(NAF5_MARK, PSC7_PSC6_FN1, PTV5_FN),
854 PINMUX_DATA(SCIF1_PTV_TXD_MARK, PSC7_PSC6_FN2, PTV5_FN),
855 PINMUX_DATA(VIO_D13_MARK, PSC7_PSC6_FN3, PTV5_FN),
856 PINMUX_DATA(NAF4_MARK, PSC7_PSC6_FN1, PTV4_FN),
857 PINMUX_DATA(SCIF3_PTV_CTS_MARK, PSC7_PSC6_FN2, PTV4_FN),
858 PINMUX_DATA(VIO_D12_MARK, PSC7_PSC6_FN3, PTV4_FN),
859 PINMUX_DATA(NAF3_MARK, PSC7_PSC6_FN1, PTV3_FN),
860 PINMUX_DATA(SCIF3_PTV_RTS_MARK, PSC7_PSC6_FN2, PTV3_FN),
861 PINMUX_DATA(VIO_D11_MARK, PSC7_PSC6_FN3, PTV3_FN),
862 PINMUX_DATA(NAF2_MARK, PSC7_PSC6_FN1, PTV2_FN),
863 PINMUX_DATA(SCIF3_PTV_SCK_MARK, PSC7_PSC6_FN2, PTV2_FN),
864 PINMUX_DATA(VIO_D10_MARK, PSC7_PSC6_FN3, PTV2_FN),
865 PINMUX_DATA(NAF1_MARK, PSC7_PSC6_FN1, PTV1_FN),
866 PINMUX_DATA(SCIF3_PTV_RXD_MARK, PSC7_PSC6_FN2, PTV1_FN),
867 PINMUX_DATA(VIO_D9_MARK, PSC7_PSC6_FN3, PTV1_FN),
868 PINMUX_DATA(NAF0_MARK, PSC7_PSC6_FN1, PTV0_FN),
869 PINMUX_DATA(SCIF3_PTV_TXD_MARK, PSC7_PSC6_FN2, PTV0_FN),
870 PINMUX_DATA(VIO_D8_MARK, PSC7_PSC6_FN3, PTV0_FN),
871
872 /* PTW FN */
873 PINMUX_DATA(IRQ7_MARK, PTW7_FN),
874 PINMUX_DATA(IRQ6_MARK, PTW6_FN),
875 PINMUX_DATA(IRQ5_MARK, PTW5_FN),
876 PINMUX_DATA(IRQ4_MARK, PSD15_PSD14_FN1, PTW4_FN),
877 PINMUX_DATA(LCDLCLK_PTW_MARK, PSD15_PSD14_FN2, PTW4_FN),
878 PINMUX_DATA(IRQ3_MARK, PSD13_PSD12_FN1, PTW3_FN),
879 PINMUX_DATA(ADTRG_MARK, PSD13_PSD12_FN2, PTW3_FN),
880 PINMUX_DATA(IRQ2_MARK, PSD11_PSD10_FN1, PTW2_FN),
881 PINMUX_DATA(BS_MARK, PSD11_PSD10_FN2, PTW2_FN),
882 PINMUX_DATA(VIO_CKO_MARK, PSD11_PSD10_FN3, PTW2_FN),
883 PINMUX_DATA(IRQ1_MARK, PSD9_PSD8_FN1, PTW1_FN),
884 PINMUX_DATA(SIUAISPD_MARK, PSD9_PSD8_FN2, PTW1_FN),
885 PINMUX_DATA(IRQ0_MARK, PSD7_PSD6_FN1, PTW0_FN),
886 PINMUX_DATA(SIUAOSPD_MARK, PSD7_PSD6_FN2, PTW0_FN),
887
888 /* PTX FN */
889 PINMUX_DATA(DACK1_MARK, PTX7_FN),
890 PINMUX_DATA(DREQ1_MARK, PSD3_PSD2_FN1, PTX6_FN),
891 PINMUX_DATA(MSIOF0_PTX_MCK_MARK, PSD3_PSD2_FN2, PTX6_FN),
892 PINMUX_DATA(DACK1_MARK, PTX5_FN),
893 PINMUX_DATA(IRDA_OUT_MARK, PSD5_PSD4_FN2, PTX5_FN),
894 PINMUX_DATA(DREQ1_MARK, PTX4_FN),
895 PINMUX_DATA(IRDA_IN_MARK, PSD5_PSD4_FN2, PTX4_FN),
896 PINMUX_DATA(TS0_SDAT_MARK, PTX3_FN),
897 PINMUX_DATA(TS0_SCK_MARK, PTX2_FN),
898 PINMUX_DATA(TS0_SDEN_MARK, PTX1_FN),
899 PINMUX_DATA(TS0_SPSYNC_MARK, PTX0_FN),
900
901 /* PTY FN */
902 PINMUX_DATA(VIO_D7_MARK, PTY7_FN),
903 PINMUX_DATA(VIO_D6_MARK, PTY6_FN),
904 PINMUX_DATA(VIO_D5_MARK, PTY5_FN),
905 PINMUX_DATA(VIO_D4_MARK, PTY4_FN),
906 PINMUX_DATA(VIO_D3_MARK, PTY3_FN),
907 PINMUX_DATA(VIO_D2_MARK, PTY2_FN),
908 PINMUX_DATA(VIO_D1_MARK, PTY1_FN),
909 PINMUX_DATA(VIO_D0_MARK, PTY0_FN),
910
911 /* PTZ FN */
912 PINMUX_DATA(SIUBOBT_MARK, PTZ7_FN),
913 PINMUX_DATA(SIUBOLR_MARK, PTZ6_FN),
914 PINMUX_DATA(SIUBOSLD_MARK, PTZ5_FN),
915 PINMUX_DATA(SIUBMCK_MARK, PTZ4_FN),
916 PINMUX_DATA(VIO_FLD_MARK, PSD1_PSD0_FN1, PTZ3_FN),
917 PINMUX_DATA(SIUBFCK_MARK, PSD1_PSD0_FN2, PTZ3_FN),
918 PINMUX_DATA(VIO_HD1_MARK, PSD1_PSD0_FN1, PTZ2_FN),
919 PINMUX_DATA(SIUBILR_MARK, PSD1_PSD0_FN2, PTZ2_FN),
920 PINMUX_DATA(VIO_VD1_MARK, PSD1_PSD0_FN1, PTZ1_FN),
921 PINMUX_DATA(SIUBIBT_MARK, PSD1_PSD0_FN2, PTZ1_FN),
922 PINMUX_DATA(VIO_CLK1_MARK, PSD1_PSD0_FN1, PTZ0_FN),
923 PINMUX_DATA(SIUBISLD_MARK, PSD1_PSD0_FN2, PTZ0_FN),
924};
925
926static struct pinmux_gpio pinmux_gpios[] = {
927 /* PTA */
928 PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
929 PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
930 PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
931 PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
932 PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
933 PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
934 PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
935 PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
936
937 /* PTB */
938 PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
939 PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
940 PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
941 PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
942 PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
943 PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
944 PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
945 PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
946
947 /* PTC */
948 PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
949 PINMUX_GPIO(GPIO_PTC6, PTC6_DATA),
950 PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
951 PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
952 PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
953 PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
954 PINMUX_GPIO(GPIO_PTC1, PTC1_DATA),
955 PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
956
957 /* PTD */
958 PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
959 PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
960 PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
961 PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
962 PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
963 PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
964 PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
965 PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
966
967 /* PTE */
968 PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
969 PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
970 PINMUX_GPIO(GPIO_PTE3, PTE3_DATA),
971 PINMUX_GPIO(GPIO_PTE2, PTE2_DATA),
972 PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
973 PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
974
975 /* PTF */
976 PINMUX_GPIO(GPIO_PTF7, PTF7_DATA),
977 PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
978 PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
979 PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
980 PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
981 PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
982 PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
983 PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
984
985 /* PTG */
986 PINMUX_GPIO(GPIO_PTG5, PTG5_DATA),
987 PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
988 PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
989 PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
990 PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
991 PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
992
993 /* PTH */
994 PINMUX_GPIO(GPIO_PTH7, PTH7_DATA),
995 PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
996 PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
997 PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
998 PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
999 PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
1000 PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
1001 PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
1002
1003 /* PTJ */
1004 PINMUX_GPIO(GPIO_PTJ7, PTJ7_DATA),
1005 PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
1006 PINMUX_GPIO(GPIO_PTJ3, PTJ3_DATA),
1007 PINMUX_GPIO(GPIO_PTJ2, PTJ2_DATA),
1008 PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
1009 PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
1010
1011 /* PTK */
1012 PINMUX_GPIO(GPIO_PTK7, PTK7_DATA),
1013 PINMUX_GPIO(GPIO_PTK6, PTK6_DATA),
1014 PINMUX_GPIO(GPIO_PTK5, PTK5_DATA),
1015 PINMUX_GPIO(GPIO_PTK4, PTK4_DATA),
1016 PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
1017 PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
1018 PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
1019 PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
1020
1021 /* PTL */
1022 PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
1023 PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
1024 PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
1025 PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
1026 PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
1027 PINMUX_GPIO(GPIO_PTL2, PTL2_DATA),
1028 PINMUX_GPIO(GPIO_PTL1, PTL1_DATA),
1029 PINMUX_GPIO(GPIO_PTL0, PTL0_DATA),
1030
1031 /* PTM */
1032 PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
1033 PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
1034 PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
1035 PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
1036 PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
1037 PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
1038 PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
1039 PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
1040
1041 /* PTN */
1042 PINMUX_GPIO(GPIO_PTN7, PTN7_DATA),
1043 PINMUX_GPIO(GPIO_PTN6, PTN6_DATA),
1044 PINMUX_GPIO(GPIO_PTN5, PTN5_DATA),
1045 PINMUX_GPIO(GPIO_PTN4, PTN4_DATA),
1046 PINMUX_GPIO(GPIO_PTN3, PTN3_DATA),
1047 PINMUX_GPIO(GPIO_PTN2, PTN2_DATA),
1048 PINMUX_GPIO(GPIO_PTN1, PTN1_DATA),
1049 PINMUX_GPIO(GPIO_PTN0, PTN0_DATA),
1050
1051 /* PTQ */
1052 PINMUX_GPIO(GPIO_PTQ3, PTQ3_DATA),
1053 PINMUX_GPIO(GPIO_PTQ2, PTQ2_DATA),
1054 PINMUX_GPIO(GPIO_PTQ1, PTQ1_DATA),
1055 PINMUX_GPIO(GPIO_PTQ0, PTQ0_DATA),
1056
1057 /* PTR */
1058 PINMUX_GPIO(GPIO_PTR7, PTR7_DATA),
1059 PINMUX_GPIO(GPIO_PTR6, PTR6_DATA),
1060 PINMUX_GPIO(GPIO_PTR5, PTR5_DATA),
1061 PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
1062 PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
1063 PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
1064 PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
1065 PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
1066
1067 /* PTS */
1068 PINMUX_GPIO(GPIO_PTS7, PTS7_DATA),
1069 PINMUX_GPIO(GPIO_PTS6, PTS6_DATA),
1070 PINMUX_GPIO(GPIO_PTS5, PTS5_DATA),
1071 PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
1072 PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
1073 PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
1074 PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
1075 PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
1076
1077 /* PTT */
1078 PINMUX_GPIO(GPIO_PTT5, PTT5_DATA),
1079 PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
1080 PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
1081 PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
1082 PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
1083 PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
1084
1085 /* PTU */
1086 PINMUX_GPIO(GPIO_PTU5, PTU5_DATA),
1087 PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
1088 PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
1089 PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
1090 PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
1091 PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
1092
1093 /* PTV */
1094 PINMUX_GPIO(GPIO_PTV7, PTV7_DATA),
1095 PINMUX_GPIO(GPIO_PTV6, PTV6_DATA),
1096 PINMUX_GPIO(GPIO_PTV5, PTV5_DATA),
1097 PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
1098 PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
1099 PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
1100 PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
1101 PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
1102
1103 /* PTW */
1104 PINMUX_GPIO(GPIO_PTW7, PTW7_DATA),
1105 PINMUX_GPIO(GPIO_PTW6, PTW6_DATA),
1106 PINMUX_GPIO(GPIO_PTW5, PTW5_DATA),
1107 PINMUX_GPIO(GPIO_PTW4, PTW4_DATA),
1108 PINMUX_GPIO(GPIO_PTW3, PTW3_DATA),
1109 PINMUX_GPIO(GPIO_PTW2, PTW2_DATA),
1110 PINMUX_GPIO(GPIO_PTW1, PTW1_DATA),
1111 PINMUX_GPIO(GPIO_PTW0, PTW0_DATA),
1112
1113 /* PTX */
1114 PINMUX_GPIO(GPIO_PTX7, PTX7_DATA),
1115 PINMUX_GPIO(GPIO_PTX6, PTX6_DATA),
1116 PINMUX_GPIO(GPIO_PTX5, PTX5_DATA),
1117 PINMUX_GPIO(GPIO_PTX4, PTX4_DATA),
1118 PINMUX_GPIO(GPIO_PTX3, PTX3_DATA),
1119 PINMUX_GPIO(GPIO_PTX2, PTX2_DATA),
1120 PINMUX_GPIO(GPIO_PTX1, PTX1_DATA),
1121 PINMUX_GPIO(GPIO_PTX0, PTX0_DATA),
1122
1123 /* PTY */
1124 PINMUX_GPIO(GPIO_PTY7, PTY7_DATA),
1125 PINMUX_GPIO(GPIO_PTY6, PTY6_DATA),
1126 PINMUX_GPIO(GPIO_PTY5, PTY5_DATA),
1127 PINMUX_GPIO(GPIO_PTY4, PTY4_DATA),
1128 PINMUX_GPIO(GPIO_PTY3, PTY3_DATA),
1129 PINMUX_GPIO(GPIO_PTY2, PTY2_DATA),
1130 PINMUX_GPIO(GPIO_PTY1, PTY1_DATA),
1131 PINMUX_GPIO(GPIO_PTY0, PTY0_DATA),
1132
1133 /* PTZ */
1134 PINMUX_GPIO(GPIO_PTZ7, PTZ7_DATA),
1135 PINMUX_GPIO(GPIO_PTZ6, PTZ6_DATA),
1136 PINMUX_GPIO(GPIO_PTZ5, PTZ5_DATA),
1137 PINMUX_GPIO(GPIO_PTZ4, PTZ4_DATA),
1138 PINMUX_GPIO(GPIO_PTZ3, PTZ3_DATA),
1139 PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
1140 PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
1141 PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA),
1142
1143 /* SCIF0 */
1144 PINMUX_GPIO(GPIO_FN_SCIF0_PTT_TXD, SCIF0_PTT_TXD_MARK),
1145 PINMUX_GPIO(GPIO_FN_SCIF0_PTT_RXD, SCIF0_PTT_RXD_MARK),
1146 PINMUX_GPIO(GPIO_FN_SCIF0_PTT_SCK, SCIF0_PTT_SCK_MARK),
1147 PINMUX_GPIO(GPIO_FN_SCIF0_PTU_TXD, SCIF0_PTU_TXD_MARK),
1148 PINMUX_GPIO(GPIO_FN_SCIF0_PTU_RXD, SCIF0_PTU_RXD_MARK),
1149 PINMUX_GPIO(GPIO_FN_SCIF0_PTU_SCK, SCIF0_PTU_SCK_MARK),
1150
1151 /* SCIF1 */
1152 PINMUX_GPIO(GPIO_FN_SCIF1_PTS_TXD, SCIF1_PTS_TXD_MARK),
1153 PINMUX_GPIO(GPIO_FN_SCIF1_PTS_RXD, SCIF1_PTS_RXD_MARK),
1154 PINMUX_GPIO(GPIO_FN_SCIF1_PTS_SCK, SCIF1_PTS_SCK_MARK),
1155 PINMUX_GPIO(GPIO_FN_SCIF1_PTV_TXD, SCIF1_PTV_TXD_MARK),
1156 PINMUX_GPIO(GPIO_FN_SCIF1_PTV_RXD, SCIF1_PTV_RXD_MARK),
1157 PINMUX_GPIO(GPIO_FN_SCIF1_PTV_SCK, SCIF1_PTV_SCK_MARK),
1158
1159 /* SCIF2 */
1160 PINMUX_GPIO(GPIO_FN_SCIF2_PTT_TXD, SCIF2_PTT_TXD_MARK),
1161 PINMUX_GPIO(GPIO_FN_SCIF2_PTT_RXD, SCIF2_PTT_RXD_MARK),
1162 PINMUX_GPIO(GPIO_FN_SCIF2_PTT_SCK, SCIF2_PTT_SCK_MARK),
1163 PINMUX_GPIO(GPIO_FN_SCIF2_PTU_TXD, SCIF2_PTU_TXD_MARK),
1164 PINMUX_GPIO(GPIO_FN_SCIF2_PTU_RXD, SCIF2_PTU_RXD_MARK),
1165 PINMUX_GPIO(GPIO_FN_SCIF2_PTU_SCK, SCIF2_PTU_SCK_MARK),
1166
1167 /* SCIF3 */
1168 PINMUX_GPIO(GPIO_FN_SCIF3_PTS_TXD, SCIF3_PTS_TXD_MARK),
1169 PINMUX_GPIO(GPIO_FN_SCIF3_PTS_RXD, SCIF3_PTS_RXD_MARK),
1170 PINMUX_GPIO(GPIO_FN_SCIF3_PTS_SCK, SCIF3_PTS_SCK_MARK),
1171 PINMUX_GPIO(GPIO_FN_SCIF3_PTS_RTS, SCIF3_PTS_RTS_MARK),
1172 PINMUX_GPIO(GPIO_FN_SCIF3_PTS_CTS, SCIF3_PTS_CTS_MARK),
1173 PINMUX_GPIO(GPIO_FN_SCIF3_PTV_TXD, SCIF3_PTV_TXD_MARK),
1174 PINMUX_GPIO(GPIO_FN_SCIF3_PTV_RXD, SCIF3_PTV_RXD_MARK),
1175 PINMUX_GPIO(GPIO_FN_SCIF3_PTV_SCK, SCIF3_PTV_SCK_MARK),
1176 PINMUX_GPIO(GPIO_FN_SCIF3_PTV_RTS, SCIF3_PTV_RTS_MARK),
1177 PINMUX_GPIO(GPIO_FN_SCIF3_PTV_CTS, SCIF3_PTV_CTS_MARK),
1178
1179 /* SCIF4 */
1180 PINMUX_GPIO(GPIO_FN_SCIF4_PTE_TXD, SCIF4_PTE_TXD_MARK),
1181 PINMUX_GPIO(GPIO_FN_SCIF4_PTE_RXD, SCIF4_PTE_RXD_MARK),
1182 PINMUX_GPIO(GPIO_FN_SCIF4_PTE_SCK, SCIF4_PTE_SCK_MARK),
1183 PINMUX_GPIO(GPIO_FN_SCIF4_PTN_TXD, SCIF4_PTN_TXD_MARK),
1184 PINMUX_GPIO(GPIO_FN_SCIF4_PTN_RXD, SCIF4_PTN_RXD_MARK),
1185 PINMUX_GPIO(GPIO_FN_SCIF4_PTN_SCK, SCIF4_PTN_SCK_MARK),
1186
1187 /* SCIF5 */
1188 PINMUX_GPIO(GPIO_FN_SCIF5_PTE_TXD, SCIF5_PTE_TXD_MARK),
1189 PINMUX_GPIO(GPIO_FN_SCIF5_PTE_RXD, SCIF5_PTE_RXD_MARK),
1190 PINMUX_GPIO(GPIO_FN_SCIF5_PTE_SCK, SCIF5_PTE_SCK_MARK),
1191 PINMUX_GPIO(GPIO_FN_SCIF5_PTN_TXD, SCIF5_PTN_TXD_MARK),
1192 PINMUX_GPIO(GPIO_FN_SCIF5_PTN_RXD, SCIF5_PTN_RXD_MARK),
1193 PINMUX_GPIO(GPIO_FN_SCIF5_PTN_SCK, SCIF5_PTN_SCK_MARK),
1194
1195 /* CEU */
1196 PINMUX_GPIO(GPIO_FN_VIO_D15, VIO_D15_MARK),
1197 PINMUX_GPIO(GPIO_FN_VIO_D14, VIO_D14_MARK),
1198 PINMUX_GPIO(GPIO_FN_VIO_D13, VIO_D13_MARK),
1199 PINMUX_GPIO(GPIO_FN_VIO_D12, VIO_D12_MARK),
1200 PINMUX_GPIO(GPIO_FN_VIO_D11, VIO_D11_MARK),
1201 PINMUX_GPIO(GPIO_FN_VIO_D10, VIO_D10_MARK),
1202 PINMUX_GPIO(GPIO_FN_VIO_D9, VIO_D9_MARK),
1203 PINMUX_GPIO(GPIO_FN_VIO_D8, VIO_D8_MARK),
1204 PINMUX_GPIO(GPIO_FN_VIO_D7, VIO_D7_MARK),
1205 PINMUX_GPIO(GPIO_FN_VIO_D6, VIO_D6_MARK),
1206 PINMUX_GPIO(GPIO_FN_VIO_D5, VIO_D5_MARK),
1207 PINMUX_GPIO(GPIO_FN_VIO_D4, VIO_D4_MARK),
1208 PINMUX_GPIO(GPIO_FN_VIO_D3, VIO_D3_MARK),
1209 PINMUX_GPIO(GPIO_FN_VIO_D2, VIO_D2_MARK),
1210 PINMUX_GPIO(GPIO_FN_VIO_D1, VIO_D1_MARK),
1211 PINMUX_GPIO(GPIO_FN_VIO_D0, VIO_D0_MARK),
1212 PINMUX_GPIO(GPIO_FN_VIO_CLK1, VIO_CLK1_MARK),
1213 PINMUX_GPIO(GPIO_FN_VIO_VD1, VIO_VD1_MARK),
1214 PINMUX_GPIO(GPIO_FN_VIO_HD1, VIO_HD1_MARK),
1215 PINMUX_GPIO(GPIO_FN_VIO_FLD, VIO_FLD_MARK),
1216 PINMUX_GPIO(GPIO_FN_VIO_CKO, VIO_CKO_MARK),
1217 PINMUX_GPIO(GPIO_FN_VIO_VD2, VIO_VD2_MARK),
1218 PINMUX_GPIO(GPIO_FN_VIO_HD2, VIO_HD2_MARK),
1219 PINMUX_GPIO(GPIO_FN_VIO_CLK2, VIO_CLK2_MARK),
1220
1221 /* LCDC */
1222 PINMUX_GPIO(GPIO_FN_LCDD23, LCDD23_MARK),
1223 PINMUX_GPIO(GPIO_FN_LCDD22, LCDD22_MARK),
1224 PINMUX_GPIO(GPIO_FN_LCDD21, LCDD21_MARK),
1225 PINMUX_GPIO(GPIO_FN_LCDD20, LCDD20_MARK),
1226 PINMUX_GPIO(GPIO_FN_LCDD19, LCDD19_MARK),
1227 PINMUX_GPIO(GPIO_FN_LCDD18, LCDD18_MARK),
1228 PINMUX_GPIO(GPIO_FN_LCDD17, LCDD17_MARK),
1229 PINMUX_GPIO(GPIO_FN_LCDD16, LCDD16_MARK),
1230 PINMUX_GPIO(GPIO_FN_LCDD15, LCDD15_MARK),
1231 PINMUX_GPIO(GPIO_FN_LCDD14, LCDD14_MARK),
1232 PINMUX_GPIO(GPIO_FN_LCDD13, LCDD13_MARK),
1233 PINMUX_GPIO(GPIO_FN_LCDD12, LCDD12_MARK),
1234 PINMUX_GPIO(GPIO_FN_LCDD11, LCDD11_MARK),
1235 PINMUX_GPIO(GPIO_FN_LCDD10, LCDD10_MARK),
1236 PINMUX_GPIO(GPIO_FN_LCDD9, LCDD9_MARK),
1237 PINMUX_GPIO(GPIO_FN_LCDD8, LCDD8_MARK),
1238 PINMUX_GPIO(GPIO_FN_LCDD7, LCDD7_MARK),
1239 PINMUX_GPIO(GPIO_FN_LCDD6, LCDD6_MARK),
1240 PINMUX_GPIO(GPIO_FN_LCDD5, LCDD5_MARK),
1241 PINMUX_GPIO(GPIO_FN_LCDD4, LCDD4_MARK),
1242 PINMUX_GPIO(GPIO_FN_LCDD3, LCDD3_MARK),
1243 PINMUX_GPIO(GPIO_FN_LCDD2, LCDD2_MARK),
1244 PINMUX_GPIO(GPIO_FN_LCDD1, LCDD1_MARK),
1245 PINMUX_GPIO(GPIO_FN_LCDD0, LCDD0_MARK),
1246 PINMUX_GPIO(GPIO_FN_LCDLCLK_PTR, LCDLCLK_PTR_MARK),
1247 PINMUX_GPIO(GPIO_FN_LCDLCLK_PTW, LCDLCLK_PTW_MARK),
1248 /* Main LCD */
1249 PINMUX_GPIO(GPIO_FN_LCDDON, LCDDON_MARK),
1250 PINMUX_GPIO(GPIO_FN_LCDVCPWC, LCDVCPWC_MARK),
1251 PINMUX_GPIO(GPIO_FN_LCDVEPWC, LCDVEPWC_MARK),
1252 PINMUX_GPIO(GPIO_FN_LCDVSYN, LCDVSYN_MARK),
1253 /* Main LCD - RGB Mode */
1254 PINMUX_GPIO(GPIO_FN_LCDDCK, LCDDCK_MARK),
1255 PINMUX_GPIO(GPIO_FN_LCDHSYN, LCDHSYN_MARK),
1256 PINMUX_GPIO(GPIO_FN_LCDDISP, LCDDISP_MARK),
1257 /* Main LCD - SYS Mode */
1258 PINMUX_GPIO(GPIO_FN_LCDRS, LCDRS_MARK),
1259 PINMUX_GPIO(GPIO_FN_LCDCS, LCDCS_MARK),
1260 PINMUX_GPIO(GPIO_FN_LCDWR, LCDWR_MARK),
1261 PINMUX_GPIO(GPIO_FN_LCDRD, LCDRD_MARK),
1262
1263 /* IRQ */
1264 PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK),
1265 PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK),
1266 PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK),
1267 PINMUX_GPIO(GPIO_FN_IRQ3, IRQ3_MARK),
1268 PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK),
1269 PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK),
1270 PINMUX_GPIO(GPIO_FN_IRQ6, IRQ6_MARK),
1271 PINMUX_GPIO(GPIO_FN_IRQ7, IRQ7_MARK),
1272
1273 /* AUD */
1274 PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK),
1275 PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK),
1276 PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK),
1277 PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK),
1278 PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK),
1279 PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK),
1280
1281 /* SDHI0 (PTD) */
1282 PINMUX_GPIO(GPIO_FN_SDHI0CD_PTD, SDHI0CD_PTD_MARK),
1283 PINMUX_GPIO(GPIO_FN_SDHI0WP_PTD, SDHI0WP_PTD_MARK),
1284 PINMUX_GPIO(GPIO_FN_SDHI0D3_PTD, SDHI0D3_PTD_MARK),
1285 PINMUX_GPIO(GPIO_FN_SDHI0D2_PTD, SDHI0D2_PTD_MARK),
1286 PINMUX_GPIO(GPIO_FN_SDHI0D1_PTD, SDHI0D1_PTD_MARK),
1287 PINMUX_GPIO(GPIO_FN_SDHI0D0_PTD, SDHI0D0_PTD_MARK),
1288 PINMUX_GPIO(GPIO_FN_SDHI0CMD_PTD, SDHI0CMD_PTD_MARK),
1289 PINMUX_GPIO(GPIO_FN_SDHI0CLK_PTD, SDHI0CLK_PTD_MARK),
1290
1291 /* SDHI0 (PTS) */
1292 PINMUX_GPIO(GPIO_FN_SDHI0CD_PTS, SDHI0CD_PTS_MARK),
1293 PINMUX_GPIO(GPIO_FN_SDHI0WP_PTS, SDHI0WP_PTS_MARK),
1294 PINMUX_GPIO(GPIO_FN_SDHI0D3_PTS, SDHI0D3_PTS_MARK),
1295 PINMUX_GPIO(GPIO_FN_SDHI0D2_PTS, SDHI0D2_PTS_MARK),
1296 PINMUX_GPIO(GPIO_FN_SDHI0D1_PTS, SDHI0D1_PTS_MARK),
1297 PINMUX_GPIO(GPIO_FN_SDHI0D0_PTS, SDHI0D0_PTS_MARK),
1298 PINMUX_GPIO(GPIO_FN_SDHI0CMD_PTS, SDHI0CMD_PTS_MARK),
1299 PINMUX_GPIO(GPIO_FN_SDHI0CLK_PTS, SDHI0CLK_PTS_MARK),
1300
1301 /* SDHI1 */
1302 PINMUX_GPIO(GPIO_FN_SDHI1CD, SDHI1CD_MARK),
1303 PINMUX_GPIO(GPIO_FN_SDHI1WP, SDHI1WP_MARK),
1304 PINMUX_GPIO(GPIO_FN_SDHI1D3, SDHI1D3_MARK),
1305 PINMUX_GPIO(GPIO_FN_SDHI1D2, SDHI1D2_MARK),
1306 PINMUX_GPIO(GPIO_FN_SDHI1D1, SDHI1D1_MARK),
1307 PINMUX_GPIO(GPIO_FN_SDHI1D0, SDHI1D0_MARK),
1308 PINMUX_GPIO(GPIO_FN_SDHI1CMD, SDHI1CMD_MARK),
1309 PINMUX_GPIO(GPIO_FN_SDHI1CLK, SDHI1CLK_MARK),
1310
1311 /* SIUA */
1312 PINMUX_GPIO(GPIO_FN_SIUAFCK, SIUAFCK_MARK),
1313 PINMUX_GPIO(GPIO_FN_SIUAILR, SIUAILR_MARK),
1314 PINMUX_GPIO(GPIO_FN_SIUAIBT, SIUAIBT_MARK),
1315 PINMUX_GPIO(GPIO_FN_SIUAISLD, SIUAISLD_MARK),
1316 PINMUX_GPIO(GPIO_FN_SIUAOLR, SIUAOLR_MARK),
1317 PINMUX_GPIO(GPIO_FN_SIUAOBT, SIUAOBT_MARK),
1318 PINMUX_GPIO(GPIO_FN_SIUAOSLD, SIUAOSLD_MARK),
1319 PINMUX_GPIO(GPIO_FN_SIUAMCK, SIUAMCK_MARK),
1320 PINMUX_GPIO(GPIO_FN_SIUAISPD, SIUAISPD_MARK),
1321 PINMUX_GPIO(GPIO_FN_SIUAOSPD, SIUAOSPD_MARK),
1322
1323 /* SIUB */
1324 PINMUX_GPIO(GPIO_FN_SIUBFCK, SIUBFCK_MARK),
1325 PINMUX_GPIO(GPIO_FN_SIUBILR, SIUBILR_MARK),
1326 PINMUX_GPIO(GPIO_FN_SIUBIBT, SIUBIBT_MARK),
1327 PINMUX_GPIO(GPIO_FN_SIUBISLD, SIUBISLD_MARK),
1328 PINMUX_GPIO(GPIO_FN_SIUBOLR, SIUBOLR_MARK),
1329 PINMUX_GPIO(GPIO_FN_SIUBOBT, SIUBOBT_MARK),
1330 PINMUX_GPIO(GPIO_FN_SIUBOSLD, SIUBOSLD_MARK),
1331 PINMUX_GPIO(GPIO_FN_SIUBMCK, SIUBMCK_MARK),
1332
1333 /* IRDA */
1334 PINMUX_GPIO(GPIO_FN_IRDA_IN, IRDA_IN_MARK),
1335 PINMUX_GPIO(GPIO_FN_IRDA_OUT, IRDA_OUT_MARK),
1336
1337 /* VOU */
1338 PINMUX_GPIO(GPIO_FN_DV_CLKI, DV_CLKI_MARK),
1339 PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK),
1340 PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK),
1341 PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK),
1342 PINMUX_GPIO(GPIO_FN_DV_D15, DV_D15_MARK),
1343 PINMUX_GPIO(GPIO_FN_DV_D14, DV_D14_MARK),
1344 PINMUX_GPIO(GPIO_FN_DV_D13, DV_D13_MARK),
1345 PINMUX_GPIO(GPIO_FN_DV_D12, DV_D12_MARK),
1346 PINMUX_GPIO(GPIO_FN_DV_D11, DV_D11_MARK),
1347 PINMUX_GPIO(GPIO_FN_DV_D10, DV_D10_MARK),
1348 PINMUX_GPIO(GPIO_FN_DV_D9, DV_D9_MARK),
1349 PINMUX_GPIO(GPIO_FN_DV_D8, DV_D8_MARK),
1350 PINMUX_GPIO(GPIO_FN_DV_D7, DV_D7_MARK),
1351 PINMUX_GPIO(GPIO_FN_DV_D6, DV_D6_MARK),
1352 PINMUX_GPIO(GPIO_FN_DV_D5, DV_D5_MARK),
1353 PINMUX_GPIO(GPIO_FN_DV_D4, DV_D4_MARK),
1354 PINMUX_GPIO(GPIO_FN_DV_D3, DV_D3_MARK),
1355 PINMUX_GPIO(GPIO_FN_DV_D2, DV_D2_MARK),
1356 PINMUX_GPIO(GPIO_FN_DV_D1, DV_D1_MARK),
1357 PINMUX_GPIO(GPIO_FN_DV_D0, DV_D0_MARK),
1358
1359 /* KEYSC */
1360 PINMUX_GPIO(GPIO_FN_KEYIN0, KEYIN0_MARK),
1361 PINMUX_GPIO(GPIO_FN_KEYIN1, KEYIN1_MARK),
1362 PINMUX_GPIO(GPIO_FN_KEYIN2, KEYIN2_MARK),
1363 PINMUX_GPIO(GPIO_FN_KEYIN3, KEYIN3_MARK),
1364 PINMUX_GPIO(GPIO_FN_KEYIN4, KEYIN4_MARK),
1365 PINMUX_GPIO(GPIO_FN_KEYOUT0, KEYOUT0_MARK),
1366 PINMUX_GPIO(GPIO_FN_KEYOUT1, KEYOUT1_MARK),
1367 PINMUX_GPIO(GPIO_FN_KEYOUT2, KEYOUT2_MARK),
1368 PINMUX_GPIO(GPIO_FN_KEYOUT3, KEYOUT3_MARK),
1369 PINMUX_GPIO(GPIO_FN_KEYOUT4_IN6, KEYOUT4_IN6_MARK),
1370 PINMUX_GPIO(GPIO_FN_KEYOUT5_IN5, KEYOUT5_IN5_MARK),
1371
1372 /* MSIOF0 (PTF) */
1373 PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_TXD, MSIOF0_PTF_TXD_MARK),
1374 PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_RXD, MSIOF0_PTF_RXD_MARK),
1375 PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_MCK, MSIOF0_PTF_MCK_MARK),
1376 PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_TSYNC, MSIOF0_PTF_TSYNC_MARK),
1377 PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_TSCK, MSIOF0_PTF_TSCK_MARK),
1378 PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_RSYNC, MSIOF0_PTF_RSYNC_MARK),
1379 PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_RSCK, MSIOF0_PTF_RSCK_MARK),
1380 PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_SS1, MSIOF0_PTF_SS1_MARK),
1381 PINMUX_GPIO(GPIO_FN_MSIOF0_PTF_SS2, MSIOF0_PTF_SS2_MARK),
1382
1383 /* MSIOF0 (PTT+PTX) */
1384 PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_TXD, MSIOF0_PTT_TXD_MARK),
1385 PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_RXD, MSIOF0_PTT_RXD_MARK),
1386 PINMUX_GPIO(GPIO_FN_MSIOF0_PTX_MCK, MSIOF0_PTX_MCK_MARK),
1387 PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_TSYNC, MSIOF0_PTT_TSYNC_MARK),
1388 PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_TSCK, MSIOF0_PTT_TSCK_MARK),
1389 PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_RSYNC, MSIOF0_PTT_RSYNC_MARK),
1390 PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_RSCK, MSIOF0_PTT_RSCK_MARK),
1391 PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_SS1, MSIOF0_PTT_SS1_MARK),
1392 PINMUX_GPIO(GPIO_FN_MSIOF0_PTT_SS2, MSIOF0_PTT_SS2_MARK),
1393
1394 /* MSIOF1 */
1395 PINMUX_GPIO(GPIO_FN_MSIOF1_TXD, MSIOF1_TXD_MARK),
1396 PINMUX_GPIO(GPIO_FN_MSIOF1_RXD, MSIOF1_RXD_MARK),
1397 PINMUX_GPIO(GPIO_FN_MSIOF1_MCK, MSIOF1_MCK_MARK),
1398 PINMUX_GPIO(GPIO_FN_MSIOF1_TSYNC, MSIOF1_TSYNC_MARK),
1399 PINMUX_GPIO(GPIO_FN_MSIOF1_TSCK, MSIOF1_TSCK_MARK),
1400 PINMUX_GPIO(GPIO_FN_MSIOF1_RSYNC, MSIOF1_RSYNC_MARK),
1401 PINMUX_GPIO(GPIO_FN_MSIOF1_RSCK, MSIOF1_RSCK_MARK),
1402 PINMUX_GPIO(GPIO_FN_MSIOF1_SS1, MSIOF1_SS1_MARK),
1403 PINMUX_GPIO(GPIO_FN_MSIOF1_SS2, MSIOF1_SS2_MARK),
1404
1405 /* TSIF */
1406 PINMUX_GPIO(GPIO_FN_TS0_SDAT, TS0_SDAT_MARK),
1407 PINMUX_GPIO(GPIO_FN_TS0_SCK, TS0_SCK_MARK),
1408 PINMUX_GPIO(GPIO_FN_TS0_SDEN, TS0_SDEN_MARK),
1409 PINMUX_GPIO(GPIO_FN_TS0_SPSYNC, TS0_SPSYNC_MARK),
1410
1411 /* FLCTL */
1412 PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK),
1413 PINMUX_GPIO(GPIO_FN_NAF7, NAF7_MARK),
1414 PINMUX_GPIO(GPIO_FN_NAF6, NAF6_MARK),
1415 PINMUX_GPIO(GPIO_FN_NAF5, NAF5_MARK),
1416 PINMUX_GPIO(GPIO_FN_NAF4, NAF4_MARK),
1417 PINMUX_GPIO(GPIO_FN_NAF3, NAF3_MARK),
1418 PINMUX_GPIO(GPIO_FN_NAF2, NAF2_MARK),
1419 PINMUX_GPIO(GPIO_FN_NAF1, NAF1_MARK),
1420 PINMUX_GPIO(GPIO_FN_NAF0, NAF0_MARK),
1421 PINMUX_GPIO(GPIO_FN_FCDE, FCDE_MARK),
1422 PINMUX_GPIO(GPIO_FN_FOE, FOE_MARK),
1423 PINMUX_GPIO(GPIO_FN_FSC, FSC_MARK),
1424 PINMUX_GPIO(GPIO_FN_FWE, FWE_MARK),
1425 PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),
1426
1427 /* DMAC */
1428 PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
1429 PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
1430 PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
1431 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
1432
1433 /* ADC */
1434 PINMUX_GPIO(GPIO_FN_AN3, AN3_MARK),
1435 PINMUX_GPIO(GPIO_FN_AN2, AN2_MARK),
1436 PINMUX_GPIO(GPIO_FN_AN1, AN1_MARK),
1437 PINMUX_GPIO(GPIO_FN_AN0, AN0_MARK),
1438 PINMUX_GPIO(GPIO_FN_ADTRG, ADTRG_MARK),
1439
1440 /* CPG */
1441 PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
1442 PINMUX_GPIO(GPIO_FN_PDSTATUS, PDSTATUS_MARK),
1443
1444 /* TPU */
1445 PINMUX_GPIO(GPIO_FN_TPUTO0, TPUTO0_MARK),
1446 PINMUX_GPIO(GPIO_FN_TPUTO1, TPUTO1_MARK),
1447 PINMUX_GPIO(GPIO_FN_TPUTO2, TPUTO2_MARK),
1448 PINMUX_GPIO(GPIO_FN_TPUTO3, TPUTO3_MARK),
1449
1450 /* BSC */
1451 PINMUX_GPIO(GPIO_FN_D31, D31_MARK),
1452 PINMUX_GPIO(GPIO_FN_D30, D30_MARK),
1453 PINMUX_GPIO(GPIO_FN_D29, D29_MARK),
1454 PINMUX_GPIO(GPIO_FN_D28, D28_MARK),
1455 PINMUX_GPIO(GPIO_FN_D27, D27_MARK),
1456 PINMUX_GPIO(GPIO_FN_D26, D26_MARK),
1457 PINMUX_GPIO(GPIO_FN_D25, D25_MARK),
1458 PINMUX_GPIO(GPIO_FN_D24, D24_MARK),
1459 PINMUX_GPIO(GPIO_FN_D23, D23_MARK),
1460 PINMUX_GPIO(GPIO_FN_D22, D22_MARK),
1461 PINMUX_GPIO(GPIO_FN_D21, D21_MARK),
1462 PINMUX_GPIO(GPIO_FN_D20, D20_MARK),
1463 PINMUX_GPIO(GPIO_FN_D19, D19_MARK),
1464 PINMUX_GPIO(GPIO_FN_D18, D18_MARK),
1465 PINMUX_GPIO(GPIO_FN_D17, D17_MARK),
1466 PINMUX_GPIO(GPIO_FN_D16, D16_MARK),
1467 PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
1468 PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK),
1469 PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
1470 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
1471 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
1472 PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
1473 PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
1474 PINMUX_GPIO(GPIO_FN_CS6B_CE1B, CS6B_CE1B_MARK),
1475 PINMUX_GPIO(GPIO_FN_CS6A_CE2B, CS6A_CE2B_MARK),
1476 PINMUX_GPIO(GPIO_FN_CS5B_CE1A, CS5B_CE1A_MARK),
1477 PINMUX_GPIO(GPIO_FN_CS5A_CE2A, CS5A_CE2A_MARK),
1478 PINMUX_GPIO(GPIO_FN_WE3_ICIOWR, WE3_ICIOWR_MARK),
1479 PINMUX_GPIO(GPIO_FN_WE2_ICIORD, WE2_ICIORD_MARK),
1480
1481 /* ATAPI */
1482 PINMUX_GPIO(GPIO_FN_IDED15, IDED15_MARK),
1483 PINMUX_GPIO(GPIO_FN_IDED14, IDED14_MARK),
1484 PINMUX_GPIO(GPIO_FN_IDED13, IDED13_MARK),
1485 PINMUX_GPIO(GPIO_FN_IDED12, IDED12_MARK),
1486 PINMUX_GPIO(GPIO_FN_IDED11, IDED11_MARK),
1487 PINMUX_GPIO(GPIO_FN_IDED10, IDED10_MARK),
1488 PINMUX_GPIO(GPIO_FN_IDED9, IDED9_MARK),
1489 PINMUX_GPIO(GPIO_FN_IDED8, IDED8_MARK),
1490 PINMUX_GPIO(GPIO_FN_IDED7, IDED7_MARK),
1491 PINMUX_GPIO(GPIO_FN_IDED6, IDED6_MARK),
1492 PINMUX_GPIO(GPIO_FN_IDED5, IDED5_MARK),
1493 PINMUX_GPIO(GPIO_FN_IDED4, IDED4_MARK),
1494 PINMUX_GPIO(GPIO_FN_IDED3, IDED3_MARK),
1495 PINMUX_GPIO(GPIO_FN_IDED2, IDED2_MARK),
1496 PINMUX_GPIO(GPIO_FN_IDED1, IDED1_MARK),
1497 PINMUX_GPIO(GPIO_FN_IDED0, IDED0_MARK),
1498 PINMUX_GPIO(GPIO_FN_DIRECTION, DIRECTION_MARK),
1499 PINMUX_GPIO(GPIO_FN_EXBUF_ENB, EXBUF_ENB_MARK),
1500 PINMUX_GPIO(GPIO_FN_IDERST, IDERST_MARK),
1501 PINMUX_GPIO(GPIO_FN_IODACK, IODACK_MARK),
1502 PINMUX_GPIO(GPIO_FN_IODREQ, IODREQ_MARK),
1503 PINMUX_GPIO(GPIO_FN_IDEIORDY, IDEIORDY_MARK),
1504 PINMUX_GPIO(GPIO_FN_IDEINT, IDEINT_MARK),
1505 PINMUX_GPIO(GPIO_FN_IDEIOWR, IDEIOWR_MARK),
1506 PINMUX_GPIO(GPIO_FN_IDEIORD, IDEIORD_MARK),
1507 PINMUX_GPIO(GPIO_FN_IDECS1, IDECS1_MARK),
1508 PINMUX_GPIO(GPIO_FN_IDECS0, IDECS0_MARK),
1509 PINMUX_GPIO(GPIO_FN_IDEA2, IDEA2_MARK),
1510 PINMUX_GPIO(GPIO_FN_IDEA1, IDEA1_MARK),
1511 PINMUX_GPIO(GPIO_FN_IDEA0, IDEA0_MARK),
1512};
1513
1514static struct pinmux_cfg_reg pinmux_config_regs[] = {
1515 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
1516 PTA7_FN, PTA7_OUT, 0, PTA7_IN,
1517 PTA6_FN, PTA6_OUT, 0, PTA6_IN,
1518 PTA5_FN, PTA5_OUT, 0, PTA5_IN,
1519 PTA4_FN, PTA4_OUT, PTA4_IN_PU, PTA4_IN,
1520 PTA3_FN, PTA3_OUT, PTA3_IN_PU, PTA3_IN,
1521 PTA2_FN, PTA2_OUT, PTA2_IN_PU, PTA2_IN,
1522 PTA1_FN, PTA1_OUT, PTA1_IN_PU, PTA1_IN,
1523 PTA0_FN, PTA0_OUT, PTA0_IN_PU, PTA0_IN }
1524 },
1525 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) {
1526 PTB7_FN, PTB7_OUT, 0, PTB7_IN,
1527 PTB6_FN, PTB6_OUT, 0, PTB6_IN,
1528 PTB5_FN, PTB5_OUT, 0, PTB5_IN,
1529 PTB4_FN, PTB4_OUT, 0, PTB4_IN,
1530 PTB3_FN, PTB3_OUT, 0, PTB3_IN,
1531 PTB2_FN, PTB2_OUT, PTB2_IN_PU, PTB2_IN,
1532 PTB1_FN, PTB1_OUT, PTB1_IN_PU, PTB1_IN,
1533 PTB0_FN, PTB0_OUT, 0, PTB0_IN }
1534 },
1535 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) {
1536 PTC7_FN, PTC7_OUT, 0, PTC7_IN,
1537 PTC6_FN, PTC6_OUT, 0, PTC6_IN,
1538 PTC5_FN, PTC5_OUT, 0, PTC5_IN,
1539 PTC4_FN, PTC4_OUT, 0, PTC4_IN,
1540 PTC3_FN, PTC3_OUT, 0, PTC3_IN,
1541 PTC2_FN, PTC2_OUT, 0, PTC2_IN,
1542 PTC1_FN, PTC1_OUT, 0, PTC1_IN,
1543 PTC0_FN, PTC0_OUT, 0, PTC0_IN }
1544 },
1545 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) {
1546 PTD7_FN, PTD7_OUT, 0, PTD7_IN,
1547 PTD6_FN, PTD6_OUT, 0, PTD6_IN,
1548 PTD5_FN, PTD5_OUT, 0, PTD5_IN,
1549 PTD4_FN, PTD4_OUT, 0, PTD4_IN,
1550 PTD3_FN, PTD3_OUT, 0, PTD3_IN,
1551 PTD2_FN, PTD2_OUT, 0, PTD2_IN,
1552 PTD1_FN, PTD1_OUT, 0, PTD1_IN,
1553 PTD0_FN, PTD0_OUT, 0, PTD0_IN }
1554 },
1555 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) {
1556 0, 0, 0, 0,
1557 0, 0, 0, 0,
1558 PTE5_FN, PTE5_OUT, 0, PTE5_IN,
1559 PTE4_FN, PTE4_OUT, 0, PTE4_IN,
1560 PTE3_FN, PTE3_OUT, 0, PTE3_IN,
1561 PTE2_FN, PTE2_OUT, 0, PTE2_IN,
1562 PTE1_FN, PTE1_OUT, 0, PTE1_IN,
1563 PTE0_FN, PTE0_OUT, 0, PTE0_IN }
1564 },
1565 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) {
1566 PTF7_FN, PTF7_OUT, 0, PTF7_IN,
1567 PTF6_FN, PTF6_OUT, 0, PTF6_IN,
1568 PTF5_FN, PTF5_OUT, 0, PTF5_IN,
1569 PTF4_FN, PTF4_OUT, 0, PTF4_IN,
1570 PTF3_FN, PTF3_OUT, 0, PTF3_IN,
1571 PTF2_FN, PTF2_OUT, 0, PTF2_IN,
1572 PTF1_FN, PTF1_OUT, 0, PTF1_IN,
1573 PTF0_FN, PTF0_OUT, 0, PTF0_IN }
1574 },
1575 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) {
1576 0, 0, 0, 0,
1577 0, 0, 0, 0,
1578 PTG5_FN, PTG5_OUT, 0, 0,
1579 PTG4_FN, PTG4_OUT, 0, 0,
1580 PTG3_FN, PTG3_OUT, 0, 0,
1581 PTG2_FN, PTG2_OUT, 0, 0,
1582 PTG1_FN, PTG1_OUT, 0, 0,
1583 PTG0_FN, PTG0_OUT, 0, 0 }
1584 },
1585 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) {
1586 PTH7_FN, PTH7_OUT, 0, PTH7_IN,
1587 PTH6_FN, PTH6_OUT, 0, PTH6_IN,
1588 PTH5_FN, PTH5_OUT, 0, PTH5_IN,
1589 PTH4_FN, PTH4_OUT, 0, PTH4_IN,
1590 PTH3_FN, PTH3_OUT, 0, PTH3_IN,
1591 PTH2_FN, PTH2_OUT, 0, PTH2_IN,
1592 PTH1_FN, PTH1_OUT, 0, PTH1_IN,
1593 PTH0_FN, PTH0_OUT, 0, PTH0_IN }
1594 },
1595 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) {
1596 PTJ7_FN, PTJ7_OUT, 0, 0,
1597 0, 0, 0, 0,
1598 PTJ5_FN, PTJ5_OUT, 0, 0,
1599 0, 0, 0, 0,
1600 PTJ3_FN, PTJ3_OUT, 0, PTJ3_IN,
1601 PTJ2_FN, PTJ2_OUT, 0, PTJ2_IN,
1602 PTJ1_FN, PTJ1_OUT, 0, PTJ1_IN,
1603 PTJ0_FN, PTJ0_OUT, 0, PTJ0_IN }
1604 },
1605 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) {
1606 PTK7_FN, PTK7_OUT, 0, PTK7_IN,
1607 PTK6_FN, PTK6_OUT, 0, PTK6_IN,
1608 PTK5_FN, PTK5_OUT, 0, PTK5_IN,
1609 PTK4_FN, PTK4_OUT, 0, PTK4_IN,
1610 PTK3_FN, PTK3_OUT, 0, PTK3_IN,
1611 PTK2_FN, PTK2_OUT, 0, PTK2_IN,
1612 PTK1_FN, PTK1_OUT, 0, PTK1_IN,
1613 PTK0_FN, PTK0_OUT, 0, PTK0_IN }
1614 },
1615 { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) {
1616 PTL7_FN, PTL7_OUT, 0, PTL7_IN,
1617 PTL6_FN, PTL6_OUT, 0, PTL6_IN,
1618 PTL5_FN, PTL5_OUT, 0, PTL5_IN,
1619 PTL4_FN, PTL4_OUT, 0, PTL4_IN,
1620 PTL3_FN, PTL3_OUT, 0, PTL3_IN,
1621 PTL2_FN, PTL2_OUT, 0, PTL2_IN,
1622 PTL1_FN, PTL1_OUT, 0, PTL1_IN,
1623 PTL0_FN, PTL0_OUT, 0, PTL0_IN }
1624 },
1625 { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) {
1626 PTM7_FN, PTM7_OUT, 0, PTM7_IN,
1627 PTM6_FN, PTM6_OUT, 0, PTM6_IN,
1628 PTM5_FN, PTM5_OUT, 0, PTM5_IN,
1629 PTM4_FN, PTM4_OUT, 0, PTM4_IN,
1630 PTM3_FN, PTM3_OUT, 0, PTM3_IN,
1631 PTM2_FN, PTM2_OUT, 0, PTM2_IN,
1632 PTM1_FN, PTM1_OUT, 0, PTM1_IN,
1633 PTM0_FN, PTM0_OUT, 0, PTM0_IN }
1634 },
1635 { PINMUX_CFG_REG("PNCR", 0xa4050118, 16, 2) {
1636 PTN7_FN, PTN7_OUT, 0, PTN7_IN,
1637 PTN6_FN, PTN6_OUT, 0, PTN6_IN,
1638 PTN5_FN, PTN5_OUT, 0, PTN5_IN,
1639 PTN4_FN, PTN4_OUT, 0, PTN4_IN,
1640 PTN3_FN, PTN3_OUT, 0, PTN3_IN,
1641 PTN2_FN, PTN2_OUT, 0, PTN2_IN,
1642 PTN1_FN, PTN1_OUT, 0, PTN1_IN,
1643 PTN0_FN, PTN0_OUT, 0, PTN0_IN }
1644 },
1645 { PINMUX_CFG_REG("PQCR", 0xa405011a, 16, 2) {
1646 0, 0, 0, 0,
1647 0, 0, 0, 0,
1648 0, 0, 0, 0,
1649 0, 0, 0, 0,
1650 PTQ3_FN, 0, 0, PTQ3_IN,
1651 PTQ2_FN, 0, 0, PTQ2_IN,
1652 PTQ1_FN, 0, 0, PTQ1_IN,
1653 PTQ0_FN, 0, 0, PTQ0_IN }
1654 },
1655 { PINMUX_CFG_REG("PRCR", 0xa405011c, 16, 2) {
1656 PTR7_FN, PTR7_OUT, 0, PTR7_IN,
1657 PTR6_FN, PTR6_OUT, 0, PTR6_IN,
1658 PTR5_FN, PTR5_OUT, 0, PTR5_IN,
1659 PTR4_FN, PTR4_OUT, 0, PTR4_IN,
1660 PTR3_FN, 0, 0, PTR3_IN,
1661 PTR2_FN, 0, PTR2_IN_PU, PTR2_IN,
1662 PTR1_FN, PTR1_OUT, 0, PTR1_IN,
1663 PTR0_FN, PTR0_OUT, 0, PTR0_IN }
1664 },
1665 { PINMUX_CFG_REG("PSCR", 0xa405011e, 16, 2) {
1666 PTS7_FN, PTS7_OUT, 0, PTS7_IN,
1667 PTS6_FN, PTS6_OUT, 0, PTS6_IN,
1668 PTS5_FN, PTS5_OUT, 0, PTS5_IN,
1669 PTS4_FN, PTS4_OUT, 0, PTS4_IN,
1670 PTS3_FN, PTS3_OUT, 0, PTS3_IN,
1671 PTS2_FN, PTS2_OUT, 0, PTS2_IN,
1672 PTS1_FN, PTS1_OUT, 0, PTS1_IN,
1673 PTS0_FN, PTS0_OUT, 0, PTS0_IN }
1674 },
1675 { PINMUX_CFG_REG("PTCR", 0xa4050140, 16, 2) {
1676 0, 0, 0, 0,
1677 0, 0, 0, 0,
1678 PTT5_FN, PTT5_OUT, 0, PTT5_IN,
1679 PTT4_FN, PTT4_OUT, 0, PTT4_IN,
1680 PTT3_FN, PTT3_OUT, 0, PTT3_IN,
1681 PTT2_FN, PTT2_OUT, 0, PTT2_IN,
1682 PTT1_FN, PTT1_OUT, 0, PTT1_IN,
1683 PTT0_FN, PTT0_OUT, 0, PTT0_IN }
1684 },
1685 { PINMUX_CFG_REG("PUCR", 0xa4050142, 16, 2) {
1686 0, 0, 0, 0,
1687 0, 0, 0, 0,
1688 PTU5_FN, PTU5_OUT, 0, PTU5_IN,
1689 PTU4_FN, PTU4_OUT, 0, PTU4_IN,
1690 PTU3_FN, PTU3_OUT, 0, PTU3_IN,
1691 PTU2_FN, PTU2_OUT, 0, PTU2_IN,
1692 PTU1_FN, PTU1_OUT, 0, PTU1_IN,
1693 PTU0_FN, PTU0_OUT, 0, PTU0_IN }
1694 },
1695 { PINMUX_CFG_REG("PVCR", 0xa4050144, 16, 2) {
1696 PTV7_FN, PTV7_OUT, 0, PTV7_IN,
1697 PTV6_FN, PTV6_OUT, 0, PTV6_IN,
1698 PTV5_FN, PTV5_OUT, 0, PTV5_IN,
1699 PTV4_FN, PTV4_OUT, 0, PTV4_IN,
1700 PTV3_FN, PTV3_OUT, 0, PTV3_IN,
1701 PTV2_FN, PTV2_OUT, 0, PTV2_IN,
1702 PTV1_FN, PTV1_OUT, 0, PTV1_IN,
1703 PTV0_FN, PTV0_OUT, 0, PTV0_IN }
1704 },
1705 { PINMUX_CFG_REG("PWCR", 0xa4050146, 16, 2) {
1706 PTW7_FN, PTW7_OUT, 0, PTW7_IN,
1707 PTW6_FN, PTW6_OUT, 0, PTW6_IN,
1708 PTW5_FN, PTW5_OUT, 0, PTW5_IN,
1709 PTW4_FN, PTW4_OUT, 0, PTW4_IN,
1710 PTW3_FN, PTW3_OUT, 0, PTW3_IN,
1711 PTW2_FN, PTW2_OUT, 0, PTW2_IN,
1712 PTW1_FN, PTW1_OUT, 0, PTW1_IN,
1713 PTW0_FN, PTW0_OUT, 0, PTW0_IN }
1714 },
1715 { PINMUX_CFG_REG("PXCR", 0xa4050148, 16, 2) {
1716 PTX7_FN, PTX7_OUT, 0, PTX7_IN,
1717 PTX6_FN, PTX6_OUT, 0, PTX6_IN,
1718 PTX5_FN, PTX5_OUT, 0, PTX5_IN,
1719 PTX4_FN, PTX4_OUT, 0, PTX4_IN,
1720 PTX3_FN, PTX3_OUT, 0, PTX3_IN,
1721 PTX2_FN, PTX2_OUT, 0, PTX2_IN,
1722 PTX1_FN, PTX1_OUT, 0, PTX1_IN,
1723 PTX0_FN, PTX0_OUT, 0, PTX0_IN }
1724 },
1725 { PINMUX_CFG_REG("PYCR", 0xa405014a, 16, 2) {
1726 PTY7_FN, PTY7_OUT, 0, PTY7_IN,
1727 PTY6_FN, PTY6_OUT, 0, PTY6_IN,
1728 PTY5_FN, PTY5_OUT, 0, PTY5_IN,
1729 PTY4_FN, PTY4_OUT, 0, PTY4_IN,
1730 PTY3_FN, PTY3_OUT, 0, PTY3_IN,
1731 PTY2_FN, PTY2_OUT, 0, PTY2_IN,
1732 PTY1_FN, PTY1_OUT, 0, PTY1_IN,
1733 PTY0_FN, PTY0_OUT, 0, PTY0_IN }
1734 },
1735 { PINMUX_CFG_REG("PZCR", 0xa405014c, 16, 2) {
1736 PTZ7_FN, PTZ7_OUT, 0, PTZ7_IN,
1737 PTZ6_FN, PTZ6_OUT, 0, PTZ6_IN,
1738 PTZ5_FN, PTZ5_OUT, 0, PTZ5_IN,
1739 PTZ4_FN, PTZ4_OUT, 0, PTZ4_IN,
1740 PTZ3_FN, PTZ3_OUT, 0, PTZ3_IN,
1741 PTZ2_FN, PTZ2_OUT, 0, PTZ2_IN,
1742 PTZ1_FN, PTZ1_OUT, 0, PTZ1_IN,
1743 PTZ0_FN, PTZ0_OUT, 0, PTZ0_IN }
1744 },
1745 { PINMUX_CFG_REG("PSELA", 0xa405014e, 16, 2) {
1746 PSA15_PSA14_FN1, PSA15_PSA14_FN2, 0, 0,
1747 PSA13_PSA12_FN1, PSA13_PSA12_FN2, 0, 0,
1748 PSA11_PSA10_FN1, PSA11_PSA10_FN2, 0, 0,
1749 0, 0, 0, 0,
1750 0, 0, 0, 0,
1751 PSA5_PSA4_FN1, PSA5_PSA4_FN2, PSA5_PSA4_FN3, 0,
1752 PSA3_PSA2_FN1, PSA3_PSA2_FN2, 0, 0,
1753 0, 0, 0, 0 }
1754 },
1755 { PINMUX_CFG_REG("PSELB", 0xa4050150, 16, 2) {
1756 PSB15_PSB14_FN1, PSB15_PSB14_FN2, 0, 0,
1757 PSB13_PSB12_LCDC_RGB, PSB13_PSB12_LCDC_SYS, 0, 0,
1758 0, 0, 0, 0,
1759 PSB9_PSB8_FN1, PSB9_PSB8_FN2, PSB9_PSB8_FN3, 0,
1760 PSB7_PSB6_FN1, PSB7_PSB6_FN2, 0, 0,
1761 PSB5_PSB4_FN1, PSB5_PSB4_FN2, 0, 0,
1762 PSB3_PSB2_FN1, PSB3_PSB2_FN2, 0, 0,
1763 0, 0, 0, 0 }
1764 },
1765 { PINMUX_CFG_REG("PSELC", 0xa4050152, 16, 2) {
1766 PSC15_PSC14_FN1, PSC15_PSC14_FN2, 0, 0,
1767 PSC13_PSC12_FN1, PSC13_PSC12_FN2, 0, 0,
1768 PSC11_PSC10_FN1, PSC11_PSC10_FN2, PSC11_PSC10_FN3, 0,
1769 PSC9_PSC8_FN1, PSC9_PSC8_FN2, 0, 0,
1770 PSC7_PSC6_FN1, PSC7_PSC6_FN2, PSC7_PSC6_FN3, 0,
1771 0, 0, 0, 0,
1772 0, 0, 0, 0,
1773 0, 0, 0, 0 }
1774 },
1775 { PINMUX_CFG_REG("PSELD", 0xa4050154, 16, 2) {
1776 PSD15_PSD14_FN1, PSD15_PSD14_FN2, 0, 0,
1777 PSD13_PSD12_FN1, PSD13_PSD12_FN2, 0, 0,
1778 PSD11_PSD10_FN1, PSD11_PSD10_FN2, PSD11_PSD10_FN3, 0,
1779 PSD9_PSD8_FN1, PSD9_PSD8_FN2, 0, 0,
1780 PSD7_PSD6_FN1, PSD7_PSD6_FN2, 0, 0,
1781 PSD5_PSD4_FN1, PSD5_PSD4_FN2, 0, 0,
1782 PSD3_PSD2_FN1, PSD3_PSD2_FN2, 0, 0,
1783 PSD1_PSD0_FN1, PSD1_PSD0_FN2, 0, 0 }
1784 },
1785 {}
1786};
1787
1788static struct pinmux_data_reg pinmux_data_regs[] = {
1789 { PINMUX_DATA_REG("PADR", 0xa4050120, 8) {
1790 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
1791 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
1792 },
1793 { PINMUX_DATA_REG("PBDR", 0xa4050122, 8) {
1794 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
1795 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
1796 },
1797 { PINMUX_DATA_REG("PCDR", 0xa4050124, 8) {
1798 PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
1799 PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA }
1800 },
1801 { PINMUX_DATA_REG("PDDR", 0xa4050126, 8) {
1802 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
1803 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
1804 },
1805 { PINMUX_DATA_REG("PEDR", 0xa4050128, 8) {
1806 0, 0, PTE5_DATA, PTE4_DATA,
1807 PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA }
1808 },
1809 { PINMUX_DATA_REG("PFDR", 0xa405012a, 8) {
1810 PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
1811 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
1812 },
1813 { PINMUX_DATA_REG("PGDR", 0xa405012c, 8) {
1814 0, 0, PTG5_DATA, PTG4_DATA,
1815 PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
1816 },
1817 { PINMUX_DATA_REG("PHDR", 0xa405012e, 8) {
1818 PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
1819 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
1820 },
1821 { PINMUX_DATA_REG("PJDR", 0xa4050130, 8) {
1822 PTJ7_DATA, 0, PTJ5_DATA, 0,
1823 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA }
1824 },
1825 { PINMUX_DATA_REG("PKDR", 0xa4050132, 8) {
1826 PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
1827 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
1828 },
1829 { PINMUX_DATA_REG("PLDR", 0xa4050134, 8) {
1830 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
1831 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA }
1832 },
1833 { PINMUX_DATA_REG("PMDR", 0xa4050136, 8) {
1834 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
1835 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
1836 },
1837 { PINMUX_DATA_REG("PNDR", 0xa4050138, 8) {
1838 PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
1839 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA }
1840 },
1841 { PINMUX_DATA_REG("PQDR", 0xa405013a, 8) {
1842 0, 0, 0, 0,
1843 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA }
1844 },
1845 { PINMUX_DATA_REG("PRDR", 0xa405013c, 8) {
1846 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
1847 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
1848 },
1849 { PINMUX_DATA_REG("PSDR", 0xa405013e, 8) {
1850 PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA,
1851 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
1852 },
1853 { PINMUX_DATA_REG("PTDR", 0xa4050160, 8) {
1854 0, 0, PTT5_DATA, PTT4_DATA,
1855 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
1856 },
1857 { PINMUX_DATA_REG("PUDR", 0xa4050162, 8) {
1858 0, 0, PTU5_DATA, PTU4_DATA,
1859 PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
1860 },
1861 { PINMUX_DATA_REG("PVDR", 0xa4050164, 8) {
1862 PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
1863 PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
1864 },
1865 { PINMUX_DATA_REG("PWDR", 0xa4050166, 8) {
1866 PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
1867 PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA }
1868 },
1869 { PINMUX_DATA_REG("PXDR", 0xa4050168, 8) {
1870 PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
1871 PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA }
1872 },
1873 { PINMUX_DATA_REG("PYDR", 0xa405016a, 8) {
1874 PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
1875 PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA }
1876 },
1877 { PINMUX_DATA_REG("PZDR", 0xa405016c, 8) {
1878 PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
1879 PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA }
1880 },
1881 { },
1882};
1883
1884struct sh_pfc_soc_info sh7723_pinmux_info = {
1885 .name = "sh7723_pfc",
1886 .reserved_id = PINMUX_RESERVED,
1887 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1888 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1889 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
1890 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1891 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1892 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1893
1894 .first_gpio = GPIO_PTA7,
1895 .last_gpio = GPIO_FN_IDEA0,
1896
1897 .gpios = pinmux_gpios,
1898 .cfg_regs = pinmux_config_regs,
1899 .data_regs = pinmux_data_regs,
1900
1901 .gpio_data = pinmux_data,
1902 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1903};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7724.c b/drivers/pinctrl/sh-pfc/pfc-sh7724.c
new file mode 100644
index 000000000000..233fbf750b39
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7724.c
@@ -0,0 +1,2225 @@
1/*
2 * SH7724 Pinmux
3 *
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 *
6 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
7 *
8 * Based on SH7723 Pinmux
9 * Copyright (C) 2008 Magnus Damm
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15
16#include <linux/init.h>
17#include <linux/kernel.h>
18#include <cpu/sh7724.h>
19
20#include "sh_pfc.h"
21
22enum {
23 PINMUX_RESERVED = 0,
24
25 PINMUX_DATA_BEGIN,
26 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
27 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA,
28 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
29 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA,
30 PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
31 PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA,
32 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
33 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA,
34 PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
35 PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA,
36 PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
37 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA,
38 PTG5_DATA, PTG4_DATA,
39 PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA,
40 PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
41 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
42 PTJ7_DATA, PTJ6_DATA, PTJ5_DATA,
43 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA,
44 PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
45 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
46 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
47 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA,
48 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
49 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
50 PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
51 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA,
52 PTQ7_DATA, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
53 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA,
54 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
55 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
56 PTS6_DATA, PTS5_DATA, PTS4_DATA,
57 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
58 PTT7_DATA, PTT6_DATA, PTT5_DATA, PTT4_DATA,
59 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
60 PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA,
61 PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
62 PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
63 PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA,
64 PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
65 PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA,
66 PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
67 PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA,
68 PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
69 PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA,
70 PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
71 PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA,
72 PINMUX_DATA_END,
73
74 PINMUX_INPUT_BEGIN,
75 PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN,
76 PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN,
77 PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN,
78 PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN,
79 PTC7_IN, PTC6_IN, PTC5_IN, PTC4_IN,
80 PTC3_IN, PTC2_IN, PTC1_IN, PTC0_IN,
81 PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN,
82 PTD3_IN, PTD2_IN, PTD1_IN, PTD0_IN,
83 PTE7_IN, PTE6_IN, PTE5_IN, PTE4_IN,
84 PTE3_IN, PTE2_IN, PTE1_IN, PTE0_IN,
85 PTF7_IN, PTF6_IN, PTF5_IN, PTF4_IN,
86 PTF3_IN, PTF2_IN, PTF1_IN, PTF0_IN,
87 PTH7_IN, PTH6_IN, PTH5_IN, PTH4_IN,
88 PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN,
89 PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN,
90 PTK7_IN, PTK6_IN, PTK5_IN, PTK4_IN,
91 PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN,
92 PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN,
93 PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN,
94 PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN,
95 PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
96 PTN7_IN, PTN6_IN, PTN5_IN, PTN4_IN,
97 PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN,
98 PTQ7_IN, PTQ6_IN, PTQ5_IN, PTQ4_IN,
99 PTQ3_IN, PTQ2_IN, PTQ1_IN, PTQ0_IN,
100 PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN,
101 PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN,
102 PTS6_IN, PTS5_IN, PTS4_IN,
103 PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN,
104 PTT7_IN, PTT6_IN, PTT5_IN, PTT4_IN,
105 PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN,
106 PTU7_IN, PTU6_IN, PTU5_IN, PTU4_IN,
107 PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
108 PTV7_IN, PTV6_IN, PTV5_IN, PTV4_IN,
109 PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
110 PTW7_IN, PTW6_IN, PTW5_IN, PTW4_IN,
111 PTW3_IN, PTW2_IN, PTW1_IN, PTW0_IN,
112 PTX7_IN, PTX6_IN, PTX5_IN, PTX4_IN,
113 PTX3_IN, PTX2_IN, PTX1_IN, PTX0_IN,
114 PTY7_IN, PTY6_IN, PTY5_IN, PTY4_IN,
115 PTY3_IN, PTY2_IN, PTY1_IN, PTY0_IN,
116 PTZ7_IN, PTZ6_IN, PTZ5_IN, PTZ4_IN,
117 PTZ3_IN, PTZ2_IN, PTZ1_IN, PTZ0_IN,
118 PINMUX_INPUT_END,
119
120 PINMUX_INPUT_PULLUP_BEGIN,
121 PTA7_IN_PU, PTA6_IN_PU, PTA5_IN_PU, PTA4_IN_PU,
122 PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
123 PTB7_IN_PU, PTB6_IN_PU, PTB5_IN_PU, PTB4_IN_PU,
124 PTB3_IN_PU, PTB2_IN_PU, PTB1_IN_PU, PTB0_IN_PU,
125 PTC7_IN_PU, PTC6_IN_PU, PTC5_IN_PU, PTC4_IN_PU,
126 PTC3_IN_PU, PTC2_IN_PU, PTC1_IN_PU, PTC0_IN_PU,
127 PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
128 PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU, PTD0_IN_PU,
129 PTE7_IN_PU, PTE6_IN_PU, PTE5_IN_PU, PTE4_IN_PU,
130 PTE3_IN_PU, PTE2_IN_PU, PTE1_IN_PU, PTE0_IN_PU,
131 PTF7_IN_PU, PTF6_IN_PU, PTF5_IN_PU, PTF4_IN_PU,
132 PTF3_IN_PU, PTF2_IN_PU, PTF1_IN_PU, PTF0_IN_PU,
133 PTH7_IN_PU, PTH6_IN_PU, PTH5_IN_PU, PTH4_IN_PU,
134 PTH3_IN_PU, PTH2_IN_PU, PTH1_IN_PU, PTH0_IN_PU,
135 PTJ3_IN_PU, PTJ2_IN_PU, PTJ1_IN_PU, PTJ0_IN_PU,
136 PTK7_IN_PU, PTK6_IN_PU, PTK5_IN_PU, PTK4_IN_PU,
137 PTK3_IN_PU, PTK2_IN_PU, PTK1_IN_PU, PTK0_IN_PU,
138 PTL7_IN_PU, PTL6_IN_PU, PTL5_IN_PU, PTL4_IN_PU,
139 PTL3_IN_PU, PTL2_IN_PU, PTL1_IN_PU, PTL0_IN_PU,
140 PTM7_IN_PU, PTM6_IN_PU, PTM5_IN_PU, PTM4_IN_PU,
141 PTM3_IN_PU, PTM2_IN_PU, PTM1_IN_PU, PTM0_IN_PU,
142 PTN7_IN_PU, PTN6_IN_PU, PTN5_IN_PU, PTN4_IN_PU,
143 PTN3_IN_PU, PTN2_IN_PU, PTN1_IN_PU, PTN0_IN_PU,
144 PTQ7_IN_PU, PTQ6_IN_PU, PTQ5_IN_PU, PTQ4_IN_PU,
145 PTQ3_IN_PU, PTQ2_IN_PU, PTQ1_IN_PU, PTQ0_IN_PU,
146 PTR7_IN_PU, PTR6_IN_PU, PTR5_IN_PU, PTR4_IN_PU,
147 PTR3_IN_PU, PTR2_IN_PU, PTR1_IN_PU, PTR0_IN_PU,
148 PTS6_IN_PU, PTS5_IN_PU, PTS4_IN_PU,
149 PTS3_IN_PU, PTS2_IN_PU, PTS1_IN_PU, PTS0_IN_PU,
150 PTT7_IN_PU, PTT6_IN_PU, PTT5_IN_PU, PTT4_IN_PU,
151 PTT3_IN_PU, PTT2_IN_PU, PTT1_IN_PU, PTT0_IN_PU,
152 PTU7_IN_PU, PTU6_IN_PU, PTU5_IN_PU, PTU4_IN_PU,
153 PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU,
154 PTV7_IN_PU, PTV6_IN_PU, PTV5_IN_PU, PTV4_IN_PU,
155 PTV3_IN_PU, PTV2_IN_PU, PTV1_IN_PU, PTV0_IN_PU,
156 PTW7_IN_PU, PTW6_IN_PU, PTW5_IN_PU, PTW4_IN_PU,
157 PTW3_IN_PU, PTW2_IN_PU, PTW1_IN_PU, PTW0_IN_PU,
158 PTX7_IN_PU, PTX6_IN_PU, PTX5_IN_PU, PTX4_IN_PU,
159 PTX3_IN_PU, PTX2_IN_PU, PTX1_IN_PU, PTX0_IN_PU,
160 PTY7_IN_PU, PTY6_IN_PU, PTY5_IN_PU, PTY4_IN_PU,
161 PTY3_IN_PU, PTY2_IN_PU, PTY1_IN_PU, PTY0_IN_PU,
162 PTZ7_IN_PU, PTZ6_IN_PU, PTZ5_IN_PU, PTZ4_IN_PU,
163 PTZ3_IN_PU, PTZ2_IN_PU, PTZ1_IN_PU, PTZ0_IN_PU,
164 PINMUX_INPUT_PULLUP_END,
165
166 PINMUX_OUTPUT_BEGIN,
167 PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
168 PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
169 PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
170 PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT,
171 PTC7_OUT, PTC6_OUT, PTC5_OUT, PTC4_OUT,
172 PTC3_OUT, PTC2_OUT, PTC1_OUT, PTC0_OUT,
173 PTD7_OUT, PTD6_OUT, PTD5_OUT, PTD4_OUT,
174 PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT,
175 PTE7_OUT, PTE6_OUT, PTE5_OUT, PTE4_OUT,
176 PTE3_OUT, PTE2_OUT, PTE1_OUT, PTE0_OUT,
177 PTF7_OUT, PTF6_OUT, PTF5_OUT, PTF4_OUT,
178 PTF3_OUT, PTF2_OUT, PTF1_OUT, PTF0_OUT,
179 PTG5_OUT, PTG4_OUT,
180 PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT,
181 PTH7_OUT, PTH6_OUT, PTH5_OUT, PTH4_OUT,
182 PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
183 PTJ7_OUT, PTJ6_OUT, PTJ5_OUT,
184 PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT,
185 PTK7_OUT, PTK6_OUT, PTK5_OUT, PTK4_OUT,
186 PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT,
187 PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT,
188 PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT,
189 PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT,
190 PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
191 PTN7_OUT, PTN6_OUT, PTN5_OUT, PTN4_OUT,
192 PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT,
193 PTQ7_OUT, PTQ6_OUT, PTQ5_OUT, PTQ4_OUT,
194 PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT,
195 PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT,
196 PTR1_OUT, PTR0_OUT,
197 PTS6_OUT, PTS5_OUT, PTS4_OUT,
198 PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT,
199 PTT7_OUT, PTT6_OUT, PTT5_OUT, PTT4_OUT,
200 PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT,
201 PTU7_OUT, PTU6_OUT, PTU5_OUT, PTU4_OUT,
202 PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT,
203 PTV7_OUT, PTV6_OUT, PTV5_OUT, PTV4_OUT,
204 PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT,
205 PTW7_OUT, PTW6_OUT, PTW5_OUT, PTW4_OUT,
206 PTW3_OUT, PTW2_OUT, PTW1_OUT, PTW0_OUT,
207 PTX7_OUT, PTX6_OUT, PTX5_OUT, PTX4_OUT,
208 PTX3_OUT, PTX2_OUT, PTX1_OUT, PTX0_OUT,
209 PTY7_OUT, PTY6_OUT, PTY5_OUT, PTY4_OUT,
210 PTY3_OUT, PTY2_OUT, PTY1_OUT, PTY0_OUT,
211 PTZ7_OUT, PTZ6_OUT, PTZ5_OUT, PTZ4_OUT,
212 PTZ3_OUT, PTZ2_OUT, PTZ1_OUT, PTZ0_OUT,
213 PINMUX_OUTPUT_END,
214
215 PINMUX_FUNCTION_BEGIN,
216 PTA7_FN, PTA6_FN, PTA5_FN, PTA4_FN,
217 PTA3_FN, PTA2_FN, PTA1_FN, PTA0_FN,
218 PTB7_FN, PTB6_FN, PTB5_FN, PTB4_FN,
219 PTB3_FN, PTB2_FN, PTB1_FN, PTB0_FN,
220 PTC7_FN, PTC6_FN, PTC5_FN, PTC4_FN,
221 PTC3_FN, PTC2_FN, PTC1_FN, PTC0_FN,
222 PTD7_FN, PTD6_FN, PTD5_FN, PTD4_FN,
223 PTD3_FN, PTD2_FN, PTD1_FN, PTD0_FN,
224 PTE7_FN, PTE6_FN, PTE5_FN, PTE4_FN,
225 PTE3_FN, PTE2_FN, PTE1_FN, PTE0_FN,
226 PTF7_FN, PTF6_FN, PTF5_FN, PTF4_FN,
227 PTF3_FN, PTF2_FN, PTF1_FN, PTF0_FN,
228 PTG5_FN, PTG4_FN,
229 PTG3_FN, PTG2_FN, PTG1_FN, PTG0_FN,
230 PTH7_FN, PTH6_FN, PTH5_FN, PTH4_FN,
231 PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN,
232 PTJ7_FN, PTJ6_FN, PTJ5_FN,
233 PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN,
234 PTK7_FN, PTK6_FN, PTK5_FN, PTK4_FN,
235 PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN,
236 PTL7_FN, PTL6_FN, PTL5_FN, PTL4_FN,
237 PTL3_FN, PTL2_FN, PTL1_FN, PTL0_FN,
238 PTM7_FN, PTM6_FN, PTM5_FN, PTM4_FN,
239 PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN,
240 PTN7_FN, PTN6_FN, PTN5_FN, PTN4_FN,
241 PTN3_FN, PTN2_FN, PTN1_FN, PTN0_FN,
242 PTQ7_FN, PTQ6_FN, PTQ5_FN, PTQ4_FN,
243 PTQ3_FN, PTQ2_FN, PTQ1_FN, PTQ0_FN,
244 PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN,
245 PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN,
246 PTS6_FN, PTS5_FN, PTS4_FN,
247 PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN,
248 PTT7_FN, PTT6_FN, PTT5_FN, PTT4_FN,
249 PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN,
250 PTU7_FN, PTU6_FN, PTU5_FN, PTU4_FN,
251 PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN,
252 PTV7_FN, PTV6_FN, PTV5_FN, PTV4_FN,
253 PTV3_FN, PTV2_FN, PTV1_FN, PTV0_FN,
254 PTW7_FN, PTW6_FN, PTW5_FN, PTW4_FN,
255 PTW3_FN, PTW2_FN, PTW1_FN, PTW0_FN,
256 PTX7_FN, PTX6_FN, PTX5_FN, PTX4_FN,
257 PTX3_FN, PTX2_FN, PTX1_FN, PTX0_FN,
258 PTY7_FN, PTY6_FN, PTY5_FN, PTY4_FN,
259 PTY3_FN, PTY2_FN, PTY1_FN, PTY0_FN,
260 PTZ7_FN, PTZ6_FN, PTZ5_FN, PTZ4_FN,
261 PTZ3_FN, PTZ2_FN, PTZ1_FN, PTZ0_FN,
262
263
264 PSA15_0, PSA15_1,
265 PSA14_0, PSA14_1,
266 PSA13_0, PSA13_1,
267 PSA12_0, PSA12_1,
268 PSA10_0, PSA10_1,
269 PSA9_0, PSA9_1,
270 PSA8_0, PSA8_1,
271 PSA7_0, PSA7_1,
272 PSA6_0, PSA6_1,
273 PSA5_0, PSA5_1,
274 PSA3_0, PSA3_1,
275 PSA2_0, PSA2_1,
276 PSA1_0, PSA1_1,
277 PSA0_0, PSA0_1,
278
279 PSB14_0, PSB14_1,
280 PSB13_0, PSB13_1,
281 PSB12_0, PSB12_1,
282 PSB11_0, PSB11_1,
283 PSB10_0, PSB10_1,
284 PSB9_0, PSB9_1,
285 PSB8_0, PSB8_1,
286 PSB7_0, PSB7_1,
287 PSB6_0, PSB6_1,
288 PSB5_0, PSB5_1,
289 PSB4_0, PSB4_1,
290 PSB3_0, PSB3_1,
291 PSB2_0, PSB2_1,
292 PSB1_0, PSB1_1,
293 PSB0_0, PSB0_1,
294
295 PSC15_0, PSC15_1,
296 PSC14_0, PSC14_1,
297 PSC13_0, PSC13_1,
298 PSC12_0, PSC12_1,
299 PSC11_0, PSC11_1,
300 PSC10_0, PSC10_1,
301 PSC9_0, PSC9_1,
302 PSC8_0, PSC8_1,
303 PSC7_0, PSC7_1,
304 PSC6_0, PSC6_1,
305 PSC5_0, PSC5_1,
306 PSC4_0, PSC4_1,
307 PSC2_0, PSC2_1,
308 PSC1_0, PSC1_1,
309 PSC0_0, PSC0_1,
310
311 PSD15_0, PSD15_1,
312 PSD14_0, PSD14_1,
313 PSD13_0, PSD13_1,
314 PSD12_0, PSD12_1,
315 PSD11_0, PSD11_1,
316 PSD10_0, PSD10_1,
317 PSD9_0, PSD9_1,
318 PSD8_0, PSD8_1,
319 PSD7_0, PSD7_1,
320 PSD6_0, PSD6_1,
321 PSD5_0, PSD5_1,
322 PSD4_0, PSD4_1,
323 PSD3_0, PSD3_1,
324 PSD2_0, PSD2_1,
325 PSD1_0, PSD1_1,
326 PSD0_0, PSD0_1,
327
328 PSE15_0, PSE15_1,
329 PSE14_0, PSE14_1,
330 PSE13_0, PSE13_1,
331 PSE12_0, PSE12_1,
332 PSE11_0, PSE11_1,
333 PSE10_0, PSE10_1,
334 PSE9_0, PSE9_1,
335 PSE8_0, PSE8_1,
336 PSE7_0, PSE7_1,
337 PSE6_0, PSE6_1,
338 PSE5_0, PSE5_1,
339 PSE4_0, PSE4_1,
340 PSE3_0, PSE3_1,
341 PSE2_0, PSE2_1,
342 PSE1_0, PSE1_1,
343 PSE0_0, PSE0_1,
344 PINMUX_FUNCTION_END,
345
346 PINMUX_MARK_BEGIN,
347 /*PTA*/
348 D23_MARK, KEYOUT2_MARK, IDED15_MARK,
349 D22_MARK, KEYOUT1_MARK, IDED14_MARK,
350 D21_MARK, KEYOUT0_MARK, IDED13_MARK,
351 D20_MARK, KEYIN4_MARK, IDED12_MARK,
352 D19_MARK, KEYIN3_MARK, IDED11_MARK,
353 D18_MARK, KEYIN2_MARK, IDED10_MARK,
354 D17_MARK, KEYIN1_MARK, IDED9_MARK,
355 D16_MARK, KEYIN0_MARK, IDED8_MARK,
356
357 /*PTB*/
358 D31_MARK, TPUTO1_MARK, IDEA1_MARK,
359 D30_MARK, TPUTO0_MARK, IDEA0_MARK,
360 D29_MARK, IODREQ_MARK,
361 D28_MARK, IDECS0_MARK,
362 D27_MARK, IDECS1_MARK,
363 D26_MARK, KEYOUT5_IN5_MARK, IDEIORD_MARK,
364 D25_MARK, KEYOUT4_IN6_MARK, IDEIOWR_MARK,
365 D24_MARK, KEYOUT3_MARK, IDEINT_MARK,
366
367 /*PTC*/
368 LCDD7_MARK,
369 LCDD6_MARK,
370 LCDD5_MARK,
371 LCDD4_MARK,
372 LCDD3_MARK,
373 LCDD2_MARK,
374 LCDD1_MARK,
375 LCDD0_MARK,
376
377 /*PTD*/
378 LCDD15_MARK,
379 LCDD14_MARK,
380 LCDD13_MARK,
381 LCDD12_MARK,
382 LCDD11_MARK,
383 LCDD10_MARK,
384 LCDD9_MARK,
385 LCDD8_MARK,
386
387 /*PTE*/
388 FSIMCKB_MARK,
389 FSIMCKA_MARK,
390 LCDD21_MARK, SCIF2_L_TXD_MARK,
391 LCDD20_MARK, SCIF4_SCK_MARK,
392 LCDD19_MARK, SCIF4_RXD_MARK,
393 LCDD18_MARK, SCIF4_TXD_MARK,
394 LCDD17_MARK,
395 LCDD16_MARK,
396
397 /*PTF*/
398 LCDVSYN_MARK,
399 LCDDISP_MARK, LCDRS_MARK,
400 LCDHSYN_MARK, LCDCS_MARK,
401 LCDDON_MARK,
402 LCDDCK_MARK, LCDWR_MARK,
403 LCDVEPWC_MARK, SCIF0_TXD_MARK,
404 LCDD23_MARK, SCIF2_L_SCK_MARK,
405 LCDD22_MARK, SCIF2_L_RXD_MARK,
406
407 /*PTG*/
408 AUDCK_MARK,
409 AUDSYNC_MARK,
410 AUDATA3_MARK,
411 AUDATA2_MARK,
412 AUDATA1_MARK,
413 AUDATA0_MARK,
414
415 /*PTH*/
416 VIO0_VD_MARK,
417 VIO0_CLK_MARK,
418 VIO0_D7_MARK,
419 VIO0_D6_MARK,
420 VIO0_D5_MARK,
421 VIO0_D4_MARK,
422 VIO0_D3_MARK,
423 VIO0_D2_MARK,
424
425 /*PTJ*/
426 PDSTATUS_MARK,
427 STATUS2_MARK,
428 STATUS0_MARK,
429 A25_MARK, BS_MARK,
430 A24_MARK,
431 A23_MARK,
432 A22_MARK,
433
434 /*PTK*/
435 VIO1_D5_MARK, VIO0_D13_MARK, IDED5_MARK,
436 VIO1_D4_MARK, VIO0_D12_MARK, IDED4_MARK,
437 VIO1_D3_MARK, VIO0_D11_MARK, IDED3_MARK,
438 VIO1_D2_MARK, VIO0_D10_MARK, IDED2_MARK,
439 VIO1_D1_MARK, VIO0_D9_MARK, IDED1_MARK,
440 VIO1_D0_MARK, VIO0_D8_MARK, IDED0_MARK,
441 VIO0_FLD_MARK,
442 VIO0_HD_MARK,
443
444 /*PTL*/
445 DV_D5_MARK, SCIF3_V_SCK_MARK, RMII_RXD0_MARK,
446 DV_D4_MARK, SCIF3_V_RXD_MARK, RMII_RXD1_MARK,
447 DV_D3_MARK, SCIF3_V_TXD_MARK, RMII_REF_CLK_MARK,
448 DV_D2_MARK, SCIF1_SCK_MARK, RMII_TX_EN_MARK,
449 DV_D1_MARK, SCIF1_RXD_MARK, RMII_TXD0_MARK,
450 DV_D0_MARK, SCIF1_TXD_MARK, RMII_TXD1_MARK,
451 DV_D15_MARK,
452 DV_D14_MARK, MSIOF0_MCK_MARK,
453
454 /*PTM*/
455 DV_D13_MARK, MSIOF0_TSCK_MARK,
456 DV_D12_MARK, MSIOF0_RXD_MARK,
457 DV_D11_MARK, MSIOF0_TXD_MARK,
458 DV_D10_MARK, MSIOF0_TSYNC_MARK,
459 DV_D9_MARK, MSIOF0_SS1_MARK, MSIOF0_RSCK_MARK,
460 DV_D8_MARK, MSIOF0_SS2_MARK, MSIOF0_RSYNC_MARK,
461 LCDVCPWC_MARK, SCIF0_RXD_MARK,
462 LCDRD_MARK, SCIF0_SCK_MARK,
463
464 /*PTN*/
465 VIO0_D1_MARK,
466 VIO0_D0_MARK,
467 DV_CLKI_MARK,
468 DV_CLK_MARK, SCIF2_V_SCK_MARK,
469 DV_VSYNC_MARK, SCIF2_V_RXD_MARK,
470 DV_HSYNC_MARK, SCIF2_V_TXD_MARK,
471 DV_D7_MARK, SCIF3_V_CTS_MARK, RMII_RX_ER_MARK,
472 DV_D6_MARK, SCIF3_V_RTS_MARK, RMII_CRS_DV_MARK,
473
474 /*PTQ*/
475 D7_MARK,
476 D6_MARK,
477 D5_MARK,
478 D4_MARK,
479 D3_MARK,
480 D2_MARK,
481 D1_MARK,
482 D0_MARK,
483
484 /*PTR*/
485 CS6B_CE1B_MARK,
486 CS6A_CE2B_MARK,
487 CS5B_CE1A_MARK,
488 CS5A_CE2A_MARK,
489 IOIS16_MARK, LCDLCLK_MARK,
490 WAIT_MARK,
491 WE3_ICIOWR_MARK, TPUTO3_MARK, TPUTI3_MARK,
492 WE2_ICIORD_MARK, TPUTO2_MARK, IDEA2_MARK,
493
494 /*PTS*/
495 VIO_CKO_MARK,
496 VIO1_FLD_MARK, TPUTI2_MARK, IDEIORDY_MARK,
497 VIO1_HD_MARK, SCIF5_SCK_MARK,
498 VIO1_VD_MARK, SCIF5_RXD_MARK,
499 VIO1_CLK_MARK, SCIF5_TXD_MARK,
500 VIO1_D7_MARK, VIO0_D15_MARK, IDED7_MARK,
501 VIO1_D6_MARK, VIO0_D14_MARK, IDED6_MARK,
502
503 /*PTT*/
504 D15_MARK,
505 D14_MARK,
506 D13_MARK,
507 D12_MARK,
508 D11_MARK,
509 D10_MARK,
510 D9_MARK,
511 D8_MARK,
512
513 /*PTU*/
514 DMAC_DACK0_MARK,
515 DMAC_DREQ0_MARK,
516 FSIOASD_MARK,
517 FSIIABCK_MARK,
518 FSIIALRCK_MARK,
519 FSIOABCK_MARK,
520 FSIOALRCK_MARK,
521 CLKAUDIOAO_MARK,
522
523 /*PTV*/
524 FSIIBSD_MARK, MSIOF1_SS2_MARK, MSIOF1_RSYNC_MARK,
525 FSIOBSD_MARK, MSIOF1_SS1_MARK, MSIOF1_RSCK_MARK,
526 FSIIBBCK_MARK, MSIOF1_RXD_MARK,
527 FSIIBLRCK_MARK, MSIOF1_TSYNC_MARK,
528 FSIOBBCK_MARK, MSIOF1_TSCK_MARK,
529 FSIOBLRCK_MARK, MSIOF1_TXD_MARK,
530 CLKAUDIOBO_MARK, MSIOF1_MCK_MARK,
531 FSIIASD_MARK,
532
533 /*PTW*/
534 MMC_D7_MARK, SDHI1CD_MARK, IODACK_MARK,
535 MMC_D6_MARK, SDHI1WP_MARK, IDERST_MARK,
536 MMC_D5_MARK, SDHI1D3_MARK, EXBUF_ENB_MARK,
537 MMC_D4_MARK, SDHI1D2_MARK, DIRECTION_MARK,
538 MMC_D3_MARK, SDHI1D1_MARK,
539 MMC_D2_MARK, SDHI1D0_MARK,
540 MMC_D1_MARK, SDHI1CMD_MARK,
541 MMC_D0_MARK, SDHI1CLK_MARK,
542
543 /*PTX*/
544 DMAC_DACK1_MARK, IRDA_OUT_MARK,
545 DMAC_DREQ1_MARK, IRDA_IN_MARK,
546 TSIF_TS0_SDAT_MARK, LNKSTA_MARK,
547 TSIF_TS0_SCK_MARK, MDIO_MARK,
548 TSIF_TS0_SDEN_MARK, MDC_MARK,
549 TSIF_TS0_SPSYNC_MARK,
550 MMC_CLK_MARK,
551 MMC_CMD_MARK,
552
553 /*PTY*/
554 SDHI0CD_MARK,
555 SDHI0WP_MARK,
556 SDHI0D3_MARK,
557 SDHI0D2_MARK,
558 SDHI0D1_MARK,
559 SDHI0D0_MARK,
560 SDHI0CMD_MARK,
561 SDHI0CLK_MARK,
562
563 /*PTZ*/
564 INTC_IRQ7_MARK, SCIF3_I_CTS_MARK,
565 INTC_IRQ6_MARK, SCIF3_I_RTS_MARK,
566 INTC_IRQ5_MARK, SCIF3_I_SCK_MARK,
567 INTC_IRQ4_MARK, SCIF3_I_RXD_MARK,
568 INTC_IRQ3_MARK, SCIF3_I_TXD_MARK,
569 INTC_IRQ2_MARK,
570 INTC_IRQ1_MARK,
571 INTC_IRQ0_MARK,
572 PINMUX_MARK_END,
573};
574
575static pinmux_enum_t pinmux_data[] = {
576 /* PTA GPIO */
577 PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU),
578 PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU),
579 PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT, PTA5_IN_PU),
580 PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT, PTA4_IN_PU),
581 PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT, PTA3_IN_PU),
582 PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT, PTA2_IN_PU),
583 PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT, PTA1_IN_PU),
584 PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT, PTA0_IN_PU),
585
586 /* PTB GPIO */
587 PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT, PTB7_IN_PU),
588 PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT, PTB6_IN_PU),
589 PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT, PTB5_IN_PU),
590 PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT, PTB4_IN_PU),
591 PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT, PTB3_IN_PU),
592 PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT, PTB2_IN_PU),
593 PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT, PTB1_IN_PU),
594 PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT, PTB0_IN_PU),
595
596 /* PTC GPIO */
597 PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT, PTC7_IN_PU),
598 PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT, PTC6_IN_PU),
599 PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT, PTC5_IN_PU),
600 PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT, PTC4_IN_PU),
601 PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT, PTC3_IN_PU),
602 PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT, PTC2_IN_PU),
603 PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT, PTC1_IN_PU),
604 PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT, PTC0_IN_PU),
605
606 /* PTD GPIO */
607 PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT, PTD7_IN_PU),
608 PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT, PTD6_IN_PU),
609 PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT, PTD5_IN_PU),
610 PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT, PTD4_IN_PU),
611 PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT, PTD3_IN_PU),
612 PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT, PTD2_IN_PU),
613 PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT, PTD1_IN_PU),
614 PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT, PTD0_IN_PU),
615
616 /* PTE GPIO */
617 PINMUX_DATA(PTE7_DATA, PTE7_IN, PTE7_OUT, PTE7_IN_PU),
618 PINMUX_DATA(PTE6_DATA, PTE6_IN, PTE6_OUT, PTE6_IN_PU),
619 PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT, PTE5_IN_PU),
620 PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT, PTE4_IN_PU),
621 PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT, PTE3_IN_PU),
622 PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT, PTE2_IN_PU),
623 PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT, PTE1_IN_PU),
624 PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT, PTE0_IN_PU),
625
626 /* PTF GPIO */
627 PINMUX_DATA(PTF7_DATA, PTF7_IN, PTF7_OUT, PTF7_IN_PU),
628 PINMUX_DATA(PTF6_DATA, PTF6_IN, PTF6_OUT, PTF6_IN_PU),
629 PINMUX_DATA(PTF5_DATA, PTF5_IN, PTF5_OUT, PTF5_IN_PU),
630 PINMUX_DATA(PTF4_DATA, PTF4_IN, PTF4_OUT, PTF4_IN_PU),
631 PINMUX_DATA(PTF3_DATA, PTF3_IN, PTF3_OUT, PTF3_IN_PU),
632 PINMUX_DATA(PTF2_DATA, PTF2_IN, PTF2_OUT, PTF2_IN_PU),
633 PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_OUT, PTF1_IN_PU),
634 PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT, PTF0_IN_PU),
635
636 /* PTG GPIO */
637 PINMUX_DATA(PTG5_DATA, PTG5_OUT),
638 PINMUX_DATA(PTG4_DATA, PTG4_OUT),
639 PINMUX_DATA(PTG3_DATA, PTG3_OUT),
640 PINMUX_DATA(PTG2_DATA, PTG2_OUT),
641 PINMUX_DATA(PTG1_DATA, PTG1_OUT),
642 PINMUX_DATA(PTG0_DATA, PTG0_OUT),
643
644 /* PTH GPIO */
645 PINMUX_DATA(PTH7_DATA, PTH7_IN, PTH7_OUT, PTH7_IN_PU),
646 PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT, PTH6_IN_PU),
647 PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT, PTH5_IN_PU),
648 PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT, PTH4_IN_PU),
649 PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT, PTH3_IN_PU),
650 PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT, PTH2_IN_PU),
651 PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT, PTH1_IN_PU),
652 PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT, PTH0_IN_PU),
653
654 /* PTJ GPIO */
655 PINMUX_DATA(PTJ7_DATA, PTJ7_OUT),
656 PINMUX_DATA(PTJ6_DATA, PTJ6_OUT),
657 PINMUX_DATA(PTJ5_DATA, PTJ5_OUT),
658 PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT, PTJ3_IN_PU),
659 PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT, PTJ2_IN_PU),
660 PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT, PTJ1_IN_PU),
661 PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT, PTJ0_IN_PU),
662
663 /* PTK GPIO */
664 PINMUX_DATA(PTK7_DATA, PTK7_IN, PTK7_OUT, PTK7_IN_PU),
665 PINMUX_DATA(PTK6_DATA, PTK6_IN, PTK6_OUT, PTK6_IN_PU),
666 PINMUX_DATA(PTK5_DATA, PTK5_IN, PTK5_OUT, PTK5_IN_PU),
667 PINMUX_DATA(PTK4_DATA, PTK4_IN, PTK4_OUT, PTK4_IN_PU),
668 PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT, PTK3_IN_PU),
669 PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT, PTK2_IN_PU),
670 PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT, PTK1_IN_PU),
671 PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT, PTK0_IN_PU),
672
673 /* PTL GPIO */
674 PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT, PTL7_IN_PU),
675 PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT, PTL6_IN_PU),
676 PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT, PTL5_IN_PU),
677 PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT, PTL4_IN_PU),
678 PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT, PTL3_IN_PU),
679 PINMUX_DATA(PTL2_DATA, PTL2_IN, PTL2_OUT, PTL2_IN_PU),
680 PINMUX_DATA(PTL1_DATA, PTL1_IN, PTL1_OUT, PTL1_IN_PU),
681 PINMUX_DATA(PTL0_DATA, PTL0_IN, PTL0_OUT, PTL0_IN_PU),
682
683 /* PTM GPIO */
684 PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT, PTM7_IN_PU),
685 PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT, PTM6_IN_PU),
686 PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT, PTM5_IN_PU),
687 PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT, PTM4_IN_PU),
688 PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT, PTM3_IN_PU),
689 PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT, PTM2_IN_PU),
690 PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT, PTM1_IN_PU),
691 PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT, PTM0_IN_PU),
692
693 /* PTN GPIO */
694 PINMUX_DATA(PTN7_DATA, PTN7_IN, PTN7_OUT, PTN7_IN_PU),
695 PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT, PTN6_IN_PU),
696 PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT, PTN5_IN_PU),
697 PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT, PTN4_IN_PU),
698 PINMUX_DATA(PTN3_DATA, PTN3_IN, PTN3_OUT, PTN3_IN_PU),
699 PINMUX_DATA(PTN2_DATA, PTN2_IN, PTN2_OUT, PTN2_IN_PU),
700 PINMUX_DATA(PTN1_DATA, PTN1_IN, PTN1_OUT, PTN1_IN_PU),
701 PINMUX_DATA(PTN0_DATA, PTN0_IN, PTN0_OUT, PTN0_IN_PU),
702
703 /* PTQ GPIO */
704 PINMUX_DATA(PTQ7_DATA, PTQ7_IN, PTQ7_OUT, PTQ7_IN_PU),
705 PINMUX_DATA(PTQ6_DATA, PTQ6_IN, PTQ6_OUT, PTQ6_IN_PU),
706 PINMUX_DATA(PTQ5_DATA, PTQ5_IN, PTQ5_OUT, PTQ5_IN_PU),
707 PINMUX_DATA(PTQ4_DATA, PTQ4_IN, PTQ4_OUT, PTQ4_IN_PU),
708 PINMUX_DATA(PTQ3_DATA, PTQ3_IN, PTQ3_OUT, PTQ3_IN_PU),
709 PINMUX_DATA(PTQ2_DATA, PTQ2_IN, PTQ2_OUT, PTQ2_IN_PU),
710 PINMUX_DATA(PTQ1_DATA, PTQ1_IN, PTQ1_OUT, PTQ1_IN_PU),
711 PINMUX_DATA(PTQ0_DATA, PTQ0_IN, PTQ0_OUT, PTQ0_IN_PU),
712
713 /* PTR GPIO */
714 PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT, PTR7_IN_PU),
715 PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT, PTR6_IN_PU),
716 PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT, PTR5_IN_PU),
717 PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT, PTR4_IN_PU),
718 PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_IN_PU),
719 PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_IN_PU),
720 PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT, PTR1_IN_PU),
721 PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT, PTR0_IN_PU),
722
723 /* PTS GPIO */
724 PINMUX_DATA(PTS6_DATA, PTS6_IN, PTS6_OUT, PTS6_IN_PU),
725 PINMUX_DATA(PTS5_DATA, PTS5_IN, PTS5_OUT, PTS5_IN_PU),
726 PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT, PTS4_IN_PU),
727 PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT, PTS3_IN_PU),
728 PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT, PTS2_IN_PU),
729 PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT, PTS1_IN_PU),
730 PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT, PTS0_IN_PU),
731
732 /* PTT GPIO */
733 PINMUX_DATA(PTT7_DATA, PTT7_IN, PTT7_OUT, PTT7_IN_PU),
734 PINMUX_DATA(PTT6_DATA, PTT6_IN, PTT6_OUT, PTT6_IN_PU),
735 PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT, PTT5_IN_PU),
736 PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT, PTT4_IN_PU),
737 PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT, PTT3_IN_PU),
738 PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT, PTT2_IN_PU),
739 PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT, PTT1_IN_PU),
740 PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT, PTT0_IN_PU),
741
742 /* PTU GPIO */
743 PINMUX_DATA(PTU7_DATA, PTU7_IN, PTU7_OUT, PTU7_IN_PU),
744 PINMUX_DATA(PTU6_DATA, PTU6_IN, PTU6_OUT, PTU6_IN_PU),
745 PINMUX_DATA(PTU5_DATA, PTU5_IN, PTU5_OUT, PTU5_IN_PU),
746 PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT, PTU4_IN_PU),
747 PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT, PTU3_IN_PU),
748 PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT, PTU2_IN_PU),
749 PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT, PTU1_IN_PU),
750 PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT, PTU0_IN_PU),
751
752 /* PTV GPIO */
753 PINMUX_DATA(PTV7_DATA, PTV7_IN, PTV7_OUT, PTV7_IN_PU),
754 PINMUX_DATA(PTV6_DATA, PTV6_IN, PTV6_OUT, PTV6_IN_PU),
755 PINMUX_DATA(PTV5_DATA, PTV5_IN, PTV5_OUT, PTV5_IN_PU),
756 PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT, PTV4_IN_PU),
757 PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT, PTV3_IN_PU),
758 PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT, PTV2_IN_PU),
759 PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT, PTV1_IN_PU),
760 PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT, PTV0_IN_PU),
761
762 /* PTW GPIO */
763 PINMUX_DATA(PTW7_DATA, PTW7_IN, PTW7_OUT, PTW7_IN_PU),
764 PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_OUT, PTW6_IN_PU),
765 PINMUX_DATA(PTW5_DATA, PTW5_IN, PTW5_OUT, PTW5_IN_PU),
766 PINMUX_DATA(PTW4_DATA, PTW4_IN, PTW4_OUT, PTW4_IN_PU),
767 PINMUX_DATA(PTW3_DATA, PTW3_IN, PTW3_OUT, PTW3_IN_PU),
768 PINMUX_DATA(PTW2_DATA, PTW2_IN, PTW2_OUT, PTW2_IN_PU),
769 PINMUX_DATA(PTW1_DATA, PTW1_IN, PTW1_OUT, PTW1_IN_PU),
770 PINMUX_DATA(PTW0_DATA, PTW0_IN, PTW0_OUT, PTW0_IN_PU),
771
772 /* PTX GPIO */
773 PINMUX_DATA(PTX7_DATA, PTX7_IN, PTX7_OUT, PTX7_IN_PU),
774 PINMUX_DATA(PTX6_DATA, PTX6_IN, PTX6_OUT, PTX6_IN_PU),
775 PINMUX_DATA(PTX5_DATA, PTX5_IN, PTX5_OUT, PTX5_IN_PU),
776 PINMUX_DATA(PTX4_DATA, PTX4_IN, PTX4_OUT, PTX4_IN_PU),
777 PINMUX_DATA(PTX3_DATA, PTX3_IN, PTX3_OUT, PTX3_IN_PU),
778 PINMUX_DATA(PTX2_DATA, PTX2_IN, PTX2_OUT, PTX2_IN_PU),
779 PINMUX_DATA(PTX1_DATA, PTX1_IN, PTX1_OUT, PTX1_IN_PU),
780 PINMUX_DATA(PTX0_DATA, PTX0_IN, PTX0_OUT, PTX0_IN_PU),
781
782 /* PTY GPIO */
783 PINMUX_DATA(PTY7_DATA, PTY7_IN, PTY7_OUT, PTY7_IN_PU),
784 PINMUX_DATA(PTY6_DATA, PTY6_IN, PTY6_OUT, PTY6_IN_PU),
785 PINMUX_DATA(PTY5_DATA, PTY5_IN, PTY5_OUT, PTY5_IN_PU),
786 PINMUX_DATA(PTY4_DATA, PTY4_IN, PTY4_OUT, PTY4_IN_PU),
787 PINMUX_DATA(PTY3_DATA, PTY3_IN, PTY3_OUT, PTY3_IN_PU),
788 PINMUX_DATA(PTY2_DATA, PTY2_IN, PTY2_OUT, PTY2_IN_PU),
789 PINMUX_DATA(PTY1_DATA, PTY1_IN, PTY1_OUT, PTY1_IN_PU),
790 PINMUX_DATA(PTY0_DATA, PTY0_IN, PTY0_OUT, PTY0_IN_PU),
791
792 /* PTZ GPIO */
793 PINMUX_DATA(PTZ7_DATA, PTZ7_IN, PTZ7_OUT, PTZ7_IN_PU),
794 PINMUX_DATA(PTZ6_DATA, PTZ6_IN, PTZ6_OUT, PTZ6_IN_PU),
795 PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_OUT, PTZ5_IN_PU),
796 PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_OUT, PTZ4_IN_PU),
797 PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_OUT, PTZ3_IN_PU),
798 PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_OUT, PTZ2_IN_PU),
799 PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_OUT, PTZ1_IN_PU),
800 PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT, PTZ0_IN_PU),
801
802 /* PTA FN */
803 PINMUX_DATA(D23_MARK, PSA15_0, PSA14_0, PTA7_FN),
804 PINMUX_DATA(D22_MARK, PSA15_0, PSA14_0, PTA6_FN),
805 PINMUX_DATA(D21_MARK, PSA15_0, PSA14_0, PTA5_FN),
806 PINMUX_DATA(D20_MARK, PSA15_0, PSA14_0, PTA4_FN),
807 PINMUX_DATA(D19_MARK, PSA15_0, PSA14_0, PTA3_FN),
808 PINMUX_DATA(D18_MARK, PSA15_0, PSA14_0, PTA2_FN),
809 PINMUX_DATA(D17_MARK, PSA15_0, PSA14_0, PTA1_FN),
810 PINMUX_DATA(D16_MARK, PSA15_0, PSA14_0, PTA0_FN),
811
812 PINMUX_DATA(KEYOUT2_MARK, PSA15_0, PSA14_1, PTA7_FN),
813 PINMUX_DATA(KEYOUT1_MARK, PSA15_0, PSA14_1, PTA6_FN),
814 PINMUX_DATA(KEYOUT0_MARK, PSA15_0, PSA14_1, PTA5_FN),
815 PINMUX_DATA(KEYIN4_MARK, PSA15_0, PSA14_1, PTA4_FN),
816 PINMUX_DATA(KEYIN3_MARK, PSA15_0, PSA14_1, PTA3_FN),
817 PINMUX_DATA(KEYIN2_MARK, PSA15_0, PSA14_1, PTA2_FN),
818 PINMUX_DATA(KEYIN1_MARK, PSA15_0, PSA14_1, PTA1_FN),
819 PINMUX_DATA(KEYIN0_MARK, PSA15_0, PSA14_1, PTA0_FN),
820
821 PINMUX_DATA(IDED15_MARK, PSA15_1, PSA14_0, PTA7_FN),
822 PINMUX_DATA(IDED14_MARK, PSA15_1, PSA14_0, PTA6_FN),
823 PINMUX_DATA(IDED13_MARK, PSA15_1, PSA14_0, PTA5_FN),
824 PINMUX_DATA(IDED12_MARK, PSA15_1, PSA14_0, PTA4_FN),
825 PINMUX_DATA(IDED11_MARK, PSA15_1, PSA14_0, PTA3_FN),
826 PINMUX_DATA(IDED10_MARK, PSA15_1, PSA14_0, PTA2_FN),
827 PINMUX_DATA(IDED9_MARK, PSA15_1, PSA14_0, PTA1_FN),
828 PINMUX_DATA(IDED8_MARK, PSA15_1, PSA14_0, PTA0_FN),
829
830 /* PTB FN */
831 PINMUX_DATA(D31_MARK, PSE15_0, PSE14_0, PTB7_FN),
832 PINMUX_DATA(D30_MARK, PSE15_0, PSE14_0, PTB6_FN),
833 PINMUX_DATA(D29_MARK, PSE11_0, PTB5_FN),
834 PINMUX_DATA(D28_MARK, PSE11_0, PTB4_FN),
835 PINMUX_DATA(D27_MARK, PSE11_0, PTB3_FN),
836 PINMUX_DATA(D26_MARK, PSA15_0, PSA14_0, PTB2_FN),
837 PINMUX_DATA(D25_MARK, PSA15_0, PSA14_0, PTB1_FN),
838 PINMUX_DATA(D24_MARK, PSA15_0, PSA14_0, PTB0_FN),
839
840 PINMUX_DATA(IDEA1_MARK, PSE15_1, PSE14_0, PTB7_FN),
841 PINMUX_DATA(IDEA0_MARK, PSE15_1, PSE14_0, PTB6_FN),
842 PINMUX_DATA(IODREQ_MARK, PSE11_1, PTB5_FN),
843 PINMUX_DATA(IDECS0_MARK, PSE11_1, PTB4_FN),
844 PINMUX_DATA(IDECS1_MARK, PSE11_1, PTB3_FN),
845 PINMUX_DATA(IDEIORD_MARK, PSA15_1, PSA14_0, PTB2_FN),
846 PINMUX_DATA(IDEIOWR_MARK, PSA15_1, PSA14_0, PTB1_FN),
847 PINMUX_DATA(IDEINT_MARK, PSA15_1, PSA14_0, PTB0_FN),
848
849 PINMUX_DATA(TPUTO1_MARK, PSE15_0, PSE14_1, PTB7_FN),
850 PINMUX_DATA(TPUTO0_MARK, PSE15_0, PSE14_1, PTB6_FN),
851
852 PINMUX_DATA(KEYOUT5_IN5_MARK, PSA15_0, PSA14_1, PTB2_FN),
853 PINMUX_DATA(KEYOUT4_IN6_MARK, PSA15_0, PSA14_1, PTB1_FN),
854 PINMUX_DATA(KEYOUT3_MARK, PSA15_0, PSA14_1, PTB0_FN),
855
856 /* PTC FN */
857 PINMUX_DATA(LCDD7_MARK, PSD5_0, PTC7_FN),
858 PINMUX_DATA(LCDD6_MARK, PSD5_0, PTC6_FN),
859 PINMUX_DATA(LCDD5_MARK, PSD5_0, PTC5_FN),
860 PINMUX_DATA(LCDD4_MARK, PSD5_0, PTC4_FN),
861 PINMUX_DATA(LCDD3_MARK, PSD5_0, PTC3_FN),
862 PINMUX_DATA(LCDD2_MARK, PSD5_0, PTC2_FN),
863 PINMUX_DATA(LCDD1_MARK, PSD5_0, PTC1_FN),
864 PINMUX_DATA(LCDD0_MARK, PSD5_0, PTC0_FN),
865
866 /* PTD FN */
867 PINMUX_DATA(LCDD15_MARK, PSD5_0, PTD7_FN),
868 PINMUX_DATA(LCDD14_MARK, PSD5_0, PTD6_FN),
869 PINMUX_DATA(LCDD13_MARK, PSD5_0, PTD5_FN),
870 PINMUX_DATA(LCDD12_MARK, PSD5_0, PTD4_FN),
871 PINMUX_DATA(LCDD11_MARK, PSD5_0, PTD3_FN),
872 PINMUX_DATA(LCDD10_MARK, PSD5_0, PTD2_FN),
873 PINMUX_DATA(LCDD9_MARK, PSD5_0, PTD1_FN),
874 PINMUX_DATA(LCDD8_MARK, PSD5_0, PTD0_FN),
875
876 /* PTE FN */
877 PINMUX_DATA(FSIMCKB_MARK, PTE7_FN),
878 PINMUX_DATA(FSIMCKA_MARK, PTE6_FN),
879
880 PINMUX_DATA(LCDD21_MARK, PSC5_0, PSC4_0, PTE5_FN),
881 PINMUX_DATA(LCDD20_MARK, PSD3_0, PSD2_0, PTE4_FN),
882 PINMUX_DATA(LCDD19_MARK, PSA3_0, PSA2_0, PTE3_FN),
883 PINMUX_DATA(LCDD18_MARK, PSA3_0, PSA2_0, PTE2_FN),
884 PINMUX_DATA(LCDD17_MARK, PSD5_0, PTE1_FN),
885 PINMUX_DATA(LCDD16_MARK, PSD5_0, PTE0_FN),
886
887 PINMUX_DATA(SCIF2_L_TXD_MARK, PSC5_0, PSC4_1, PTE5_FN),
888 PINMUX_DATA(SCIF4_SCK_MARK, PSD3_0, PSD2_1, PTE4_FN),
889 PINMUX_DATA(SCIF4_RXD_MARK, PSA3_0, PSA2_1, PTE3_FN),
890 PINMUX_DATA(SCIF4_TXD_MARK, PSA3_0, PSA2_1, PTE2_FN),
891
892 /* PTF FN */
893 PINMUX_DATA(LCDVSYN_MARK, PSD8_0, PTF7_FN),
894 PINMUX_DATA(LCDDISP_MARK, PSD10_0, PSD9_0, PTF6_FN),
895 PINMUX_DATA(LCDHSYN_MARK, PSD10_0, PSD9_0, PTF5_FN),
896 PINMUX_DATA(LCDDON_MARK, PSD8_0, PTF4_FN),
897 PINMUX_DATA(LCDDCK_MARK, PSD10_0, PSD9_0, PTF3_FN),
898 PINMUX_DATA(LCDVEPWC_MARK, PSA6_0, PTF2_FN),
899 PINMUX_DATA(LCDD23_MARK, PSC7_0, PSC6_0, PTF1_FN),
900 PINMUX_DATA(LCDD22_MARK, PSC5_0, PSC4_0, PTF0_FN),
901
902 PINMUX_DATA(LCDRS_MARK, PSD10_0, PSD9_1, PTF6_FN),
903 PINMUX_DATA(LCDCS_MARK, PSD10_0, PSD9_1, PTF5_FN),
904 PINMUX_DATA(LCDWR_MARK, PSD10_0, PSD9_1, PTF3_FN),
905
906 PINMUX_DATA(SCIF0_TXD_MARK, PSA6_1, PTF2_FN),
907 PINMUX_DATA(SCIF2_L_SCK_MARK, PSC7_0, PSC6_1, PTF1_FN),
908 PINMUX_DATA(SCIF2_L_RXD_MARK, PSC5_0, PSC4_1, PTF0_FN),
909
910 /* PTG FN */
911 PINMUX_DATA(AUDCK_MARK, PTG5_FN),
912 PINMUX_DATA(AUDSYNC_MARK, PTG4_FN),
913 PINMUX_DATA(AUDATA3_MARK, PTG3_FN),
914 PINMUX_DATA(AUDATA2_MARK, PTG2_FN),
915 PINMUX_DATA(AUDATA1_MARK, PTG1_FN),
916 PINMUX_DATA(AUDATA0_MARK, PTG0_FN),
917
918 /* PTH FN */
919 PINMUX_DATA(VIO0_VD_MARK, PTH7_FN),
920 PINMUX_DATA(VIO0_CLK_MARK, PTH6_FN),
921 PINMUX_DATA(VIO0_D7_MARK, PTH5_FN),
922 PINMUX_DATA(VIO0_D6_MARK, PTH4_FN),
923 PINMUX_DATA(VIO0_D5_MARK, PTH3_FN),
924 PINMUX_DATA(VIO0_D4_MARK, PTH2_FN),
925 PINMUX_DATA(VIO0_D3_MARK, PTH1_FN),
926 PINMUX_DATA(VIO0_D2_MARK, PTH0_FN),
927
928 /* PTJ FN */
929 PINMUX_DATA(PDSTATUS_MARK, PTJ7_FN),
930 PINMUX_DATA(STATUS2_MARK, PTJ6_FN),
931 PINMUX_DATA(STATUS0_MARK, PTJ5_FN),
932 PINMUX_DATA(A25_MARK, PSA8_0, PTJ3_FN),
933 PINMUX_DATA(BS_MARK, PSA8_1, PTJ3_FN),
934 PINMUX_DATA(A24_MARK, PTJ2_FN),
935 PINMUX_DATA(A23_MARK, PTJ1_FN),
936 PINMUX_DATA(A22_MARK, PTJ0_FN),
937
938 /* PTK FN */
939 PINMUX_DATA(VIO1_D5_MARK, PSB7_0, PSB6_0, PTK7_FN),
940 PINMUX_DATA(VIO1_D4_MARK, PSB7_0, PSB6_0, PTK6_FN),
941 PINMUX_DATA(VIO1_D3_MARK, PSB7_0, PSB6_0, PTK5_FN),
942 PINMUX_DATA(VIO1_D2_MARK, PSB7_0, PSB6_0, PTK4_FN),
943 PINMUX_DATA(VIO1_D1_MARK, PSB7_0, PSB6_0, PTK3_FN),
944 PINMUX_DATA(VIO1_D0_MARK, PSB7_0, PSB6_0, PTK2_FN),
945
946 PINMUX_DATA(VIO0_D13_MARK, PSB7_0, PSB6_1, PTK7_FN),
947 PINMUX_DATA(VIO0_D12_MARK, PSB7_0, PSB6_1, PTK6_FN),
948 PINMUX_DATA(VIO0_D11_MARK, PSB7_0, PSB6_1, PTK5_FN),
949 PINMUX_DATA(VIO0_D10_MARK, PSB7_0, PSB6_1, PTK4_FN),
950 PINMUX_DATA(VIO0_D9_MARK, PSB7_0, PSB6_1, PTK3_FN),
951 PINMUX_DATA(VIO0_D8_MARK, PSB7_0, PSB6_1, PTK2_FN),
952
953 PINMUX_DATA(IDED5_MARK, PSB7_1, PSB6_0, PTK7_FN),
954 PINMUX_DATA(IDED4_MARK, PSB7_1, PSB6_0, PTK6_FN),
955 PINMUX_DATA(IDED3_MARK, PSB7_1, PSB6_0, PTK5_FN),
956 PINMUX_DATA(IDED2_MARK, PSB7_1, PSB6_0, PTK4_FN),
957 PINMUX_DATA(IDED1_MARK, PSB7_1, PSB6_0, PTK3_FN),
958 PINMUX_DATA(IDED0_MARK, PSB7_1, PSB6_0, PTK2_FN),
959
960 PINMUX_DATA(VIO0_FLD_MARK, PTK1_FN),
961 PINMUX_DATA(VIO0_HD_MARK, PTK0_FN),
962
963 /* PTL FN */
964 PINMUX_DATA(DV_D5_MARK, PSB9_0, PSB8_0, PTL7_FN),
965 PINMUX_DATA(DV_D4_MARK, PSB9_0, PSB8_0, PTL6_FN),
966 PINMUX_DATA(DV_D3_MARK, PSE7_0, PSE6_0, PTL5_FN),
967 PINMUX_DATA(DV_D2_MARK, PSC9_0, PSC8_0, PTL4_FN),
968 PINMUX_DATA(DV_D1_MARK, PSC9_0, PSC8_0, PTL3_FN),
969 PINMUX_DATA(DV_D0_MARK, PSC9_0, PSC8_0, PTL2_FN),
970 PINMUX_DATA(DV_D15_MARK, PSD4_0, PTL1_FN),
971 PINMUX_DATA(DV_D14_MARK, PSE5_0, PSE4_0, PTL0_FN),
972
973 PINMUX_DATA(SCIF3_V_SCK_MARK, PSB9_0, PSB8_1, PTL7_FN),
974 PINMUX_DATA(SCIF3_V_RXD_MARK, PSB9_0, PSB8_1, PTL6_FN),
975 PINMUX_DATA(SCIF3_V_TXD_MARK, PSE7_0, PSE6_1, PTL5_FN),
976 PINMUX_DATA(SCIF1_SCK_MARK, PSC9_0, PSC8_1, PTL4_FN),
977 PINMUX_DATA(SCIF1_RXD_MARK, PSC9_0, PSC8_1, PTL3_FN),
978 PINMUX_DATA(SCIF1_TXD_MARK, PSC9_0, PSC8_1, PTL2_FN),
979
980 PINMUX_DATA(RMII_RXD0_MARK, PSB9_1, PSB8_0, PTL7_FN),
981 PINMUX_DATA(RMII_RXD1_MARK, PSB9_1, PSB8_0, PTL6_FN),
982 PINMUX_DATA(RMII_REF_CLK_MARK, PSE7_1, PSE6_0, PTL5_FN),
983 PINMUX_DATA(RMII_TX_EN_MARK, PSC9_1, PSC8_0, PTL4_FN),
984 PINMUX_DATA(RMII_TXD0_MARK, PSC9_1, PSC8_0, PTL3_FN),
985 PINMUX_DATA(RMII_TXD1_MARK, PSC9_1, PSC8_0, PTL2_FN),
986
987 PINMUX_DATA(MSIOF0_MCK_MARK, PSE5_0, PSE4_1, PTL0_FN),
988
989 /* PTM FN */
990 PINMUX_DATA(DV_D13_MARK, PSC13_0, PSC12_0, PTM7_FN),
991 PINMUX_DATA(DV_D12_MARK, PSC13_0, PSC12_0, PTM6_FN),
992 PINMUX_DATA(DV_D11_MARK, PSC13_0, PSC12_0, PTM5_FN),
993 PINMUX_DATA(DV_D10_MARK, PSC13_0, PSC12_0, PTM4_FN),
994 PINMUX_DATA(DV_D9_MARK, PSC11_0, PSC10_0, PTM3_FN),
995 PINMUX_DATA(DV_D8_MARK, PSC11_0, PSC10_0, PTM2_FN),
996
997 PINMUX_DATA(MSIOF0_TSCK_MARK, PSC13_0, PSC12_1, PTM7_FN),
998 PINMUX_DATA(MSIOF0_RXD_MARK, PSC13_0, PSC12_1, PTM6_FN),
999 PINMUX_DATA(MSIOF0_TXD_MARK, PSC13_0, PSC12_1, PTM5_FN),
1000 PINMUX_DATA(MSIOF0_TSYNC_MARK, PSC13_0, PSC12_1, PTM4_FN),
1001 PINMUX_DATA(MSIOF0_SS1_MARK, PSC11_0, PSC10_1, PTM3_FN),
1002 PINMUX_DATA(MSIOF0_RSCK_MARK, PSC11_1, PSC10_0, PTM3_FN),
1003 PINMUX_DATA(MSIOF0_SS2_MARK, PSC11_0, PSC10_1, PTM2_FN),
1004 PINMUX_DATA(MSIOF0_RSYNC_MARK, PSC11_1, PSC10_0, PTM2_FN),
1005
1006 PINMUX_DATA(LCDVCPWC_MARK, PSA6_0, PTM1_FN),
1007 PINMUX_DATA(LCDRD_MARK, PSA7_0, PTM0_FN),
1008
1009 PINMUX_DATA(SCIF0_RXD_MARK, PSA6_1, PTM1_FN),
1010 PINMUX_DATA(SCIF0_SCK_MARK, PSA7_1, PTM0_FN),
1011
1012 /* PTN FN */
1013 PINMUX_DATA(VIO0_D1_MARK, PTN7_FN),
1014 PINMUX_DATA(VIO0_D0_MARK, PTN6_FN),
1015
1016 PINMUX_DATA(DV_CLKI_MARK, PSD11_0, PTN5_FN),
1017 PINMUX_DATA(DV_CLK_MARK, PSD13_0, PSD12_0, PTN4_FN),
1018 PINMUX_DATA(DV_VSYNC_MARK, PSD15_0, PSD14_0, PTN3_FN),
1019 PINMUX_DATA(DV_HSYNC_MARK, PSB5_0, PSB4_0, PTN2_FN),
1020 PINMUX_DATA(DV_D7_MARK, PSB3_0, PSB2_0, PTN1_FN),
1021 PINMUX_DATA(DV_D6_MARK, PSB1_0, PSB0_0, PTN0_FN),
1022
1023 PINMUX_DATA(SCIF2_V_SCK_MARK, PSD13_0, PSD12_1, PTN4_FN),
1024 PINMUX_DATA(SCIF2_V_RXD_MARK, PSD15_0, PSD14_1, PTN3_FN),
1025 PINMUX_DATA(SCIF2_V_TXD_MARK, PSB5_0, PSB4_1, PTN2_FN),
1026 PINMUX_DATA(SCIF3_V_CTS_MARK, PSB3_0, PSB2_1, PTN1_FN),
1027 PINMUX_DATA(SCIF3_V_RTS_MARK, PSB1_0, PSB0_1, PTN0_FN),
1028
1029 PINMUX_DATA(RMII_RX_ER_MARK, PSB3_1, PSB2_0, PTN1_FN),
1030 PINMUX_DATA(RMII_CRS_DV_MARK, PSB1_1, PSB0_0, PTN0_FN),
1031
1032 /* PTQ FN */
1033 PINMUX_DATA(D7_MARK, PTQ7_FN),
1034 PINMUX_DATA(D6_MARK, PTQ6_FN),
1035 PINMUX_DATA(D5_MARK, PTQ5_FN),
1036 PINMUX_DATA(D4_MARK, PTQ4_FN),
1037 PINMUX_DATA(D3_MARK, PTQ3_FN),
1038 PINMUX_DATA(D2_MARK, PTQ2_FN),
1039 PINMUX_DATA(D1_MARK, PTQ1_FN),
1040 PINMUX_DATA(D0_MARK, PTQ0_FN),
1041
1042 /* PTR FN */
1043 PINMUX_DATA(CS6B_CE1B_MARK, PTR7_FN),
1044 PINMUX_DATA(CS6A_CE2B_MARK, PTR6_FN),
1045 PINMUX_DATA(CS5B_CE1A_MARK, PTR5_FN),
1046 PINMUX_DATA(CS5A_CE2A_MARK, PTR4_FN),
1047 PINMUX_DATA(IOIS16_MARK, PSA5_0, PTR3_FN),
1048 PINMUX_DATA(WAIT_MARK, PTR2_FN),
1049 PINMUX_DATA(WE3_ICIOWR_MARK, PSA1_0, PSA0_0, PTR1_FN),
1050 PINMUX_DATA(WE2_ICIORD_MARK, PSD1_0, PSD0_0, PTR0_FN),
1051
1052 PINMUX_DATA(LCDLCLK_MARK, PSA5_1, PTR3_FN),
1053
1054 PINMUX_DATA(IDEA2_MARK, PSD1_1, PSD0_0, PTR0_FN),
1055
1056 PINMUX_DATA(TPUTO3_MARK, PSA1_0, PSA0_1, PTR1_FN),
1057 PINMUX_DATA(TPUTI3_MARK, PSA1_1, PSA0_0, PTR1_FN),
1058 PINMUX_DATA(TPUTO2_MARK, PSD1_0, PSD0_1, PTR0_FN),
1059
1060 /* PTS FN */
1061 PINMUX_DATA(VIO_CKO_MARK, PTS6_FN),
1062
1063 PINMUX_DATA(TPUTI2_MARK, PSE9_0, PSE8_1, PTS5_FN),
1064
1065 PINMUX_DATA(IDEIORDY_MARK, PSE9_1, PSE8_0, PTS5_FN),
1066
1067 PINMUX_DATA(VIO1_FLD_MARK, PSE9_0, PSE8_0, PTS5_FN),
1068 PINMUX_DATA(VIO1_HD_MARK, PSA10_0, PTS4_FN),
1069 PINMUX_DATA(VIO1_VD_MARK, PSA9_0, PTS3_FN),
1070 PINMUX_DATA(VIO1_CLK_MARK, PSA9_0, PTS2_FN),
1071 PINMUX_DATA(VIO1_D7_MARK, PSB7_0, PSB6_0, PTS1_FN),
1072 PINMUX_DATA(VIO1_D6_MARK, PSB7_0, PSB6_0, PTS0_FN),
1073
1074 PINMUX_DATA(SCIF5_SCK_MARK, PSA10_1, PTS4_FN),
1075 PINMUX_DATA(SCIF5_RXD_MARK, PSA9_1, PTS3_FN),
1076 PINMUX_DATA(SCIF5_TXD_MARK, PSA9_1, PTS2_FN),
1077
1078 PINMUX_DATA(VIO0_D15_MARK, PSB7_0, PSB6_1, PTS1_FN),
1079 PINMUX_DATA(VIO0_D14_MARK, PSB7_0, PSB6_1, PTS0_FN),
1080
1081 PINMUX_DATA(IDED7_MARK, PSB7_1, PSB6_0, PTS1_FN),
1082 PINMUX_DATA(IDED6_MARK, PSB7_1, PSB6_0, PTS0_FN),
1083
1084 /* PTT FN */
1085 PINMUX_DATA(D15_MARK, PTT7_FN),
1086 PINMUX_DATA(D14_MARK, PTT6_FN),
1087 PINMUX_DATA(D13_MARK, PTT5_FN),
1088 PINMUX_DATA(D12_MARK, PTT4_FN),
1089 PINMUX_DATA(D11_MARK, PTT3_FN),
1090 PINMUX_DATA(D10_MARK, PTT2_FN),
1091 PINMUX_DATA(D9_MARK, PTT1_FN),
1092 PINMUX_DATA(D8_MARK, PTT0_FN),
1093
1094 /* PTU FN */
1095 PINMUX_DATA(DMAC_DACK0_MARK, PTU7_FN),
1096 PINMUX_DATA(DMAC_DREQ0_MARK, PTU6_FN),
1097
1098 PINMUX_DATA(FSIOASD_MARK, PSE1_0, PTU5_FN),
1099 PINMUX_DATA(FSIIABCK_MARK, PSE1_0, PTU4_FN),
1100 PINMUX_DATA(FSIIALRCK_MARK, PSE1_0, PTU3_FN),
1101 PINMUX_DATA(FSIOABCK_MARK, PSE1_0, PTU2_FN),
1102 PINMUX_DATA(FSIOALRCK_MARK, PSE1_0, PTU1_FN),
1103 PINMUX_DATA(CLKAUDIOAO_MARK, PSE0_0, PTU0_FN),
1104
1105 /* PTV FN */
1106 PINMUX_DATA(FSIIBSD_MARK, PSD7_0, PSD6_0, PTV7_FN),
1107 PINMUX_DATA(FSIOBSD_MARK, PSD7_0, PSD6_0, PTV6_FN),
1108 PINMUX_DATA(FSIIBBCK_MARK, PSC15_0, PSC14_0, PTV5_FN),
1109 PINMUX_DATA(FSIIBLRCK_MARK, PSC15_0, PSC14_0, PTV4_FN),
1110 PINMUX_DATA(FSIOBBCK_MARK, PSC15_0, PSC14_0, PTV3_FN),
1111 PINMUX_DATA(FSIOBLRCK_MARK, PSC15_0, PSC14_0, PTV2_FN),
1112 PINMUX_DATA(CLKAUDIOBO_MARK, PSE3_0, PSE2_0, PTV1_FN),
1113 PINMUX_DATA(FSIIASD_MARK, PSE10_0, PTV0_FN),
1114
1115 PINMUX_DATA(MSIOF1_SS2_MARK, PSD7_0, PSD6_1, PTV7_FN),
1116 PINMUX_DATA(MSIOF1_RSYNC_MARK, PSD7_1, PSD6_0, PTV7_FN),
1117 PINMUX_DATA(MSIOF1_SS1_MARK, PSD7_0, PSD6_1, PTV6_FN),
1118 PINMUX_DATA(MSIOF1_RSCK_MARK, PSD7_1, PSD6_0, PTV6_FN),
1119 PINMUX_DATA(MSIOF1_RXD_MARK, PSC15_0, PSC14_1, PTV5_FN),
1120 PINMUX_DATA(MSIOF1_TSYNC_MARK, PSC15_0, PSC14_1, PTV4_FN),
1121 PINMUX_DATA(MSIOF1_TSCK_MARK, PSC15_0, PSC14_1, PTV3_FN),
1122 PINMUX_DATA(MSIOF1_TXD_MARK, PSC15_0, PSC14_1, PTV2_FN),
1123 PINMUX_DATA(MSIOF1_MCK_MARK, PSE3_0, PSE2_1, PTV1_FN),
1124
1125 /* PTW FN */
1126 PINMUX_DATA(MMC_D7_MARK, PSE13_0, PSE12_0, PTW7_FN),
1127 PINMUX_DATA(MMC_D6_MARK, PSE13_0, PSE12_0, PTW6_FN),
1128 PINMUX_DATA(MMC_D5_MARK, PSE13_0, PSE12_0, PTW5_FN),
1129 PINMUX_DATA(MMC_D4_MARK, PSE13_0, PSE12_0, PTW4_FN),
1130 PINMUX_DATA(MMC_D3_MARK, PSA13_0, PTW3_FN),
1131 PINMUX_DATA(MMC_D2_MARK, PSA13_0, PTW2_FN),
1132 PINMUX_DATA(MMC_D1_MARK, PSA13_0, PTW1_FN),
1133 PINMUX_DATA(MMC_D0_MARK, PSA13_0, PTW0_FN),
1134
1135 PINMUX_DATA(SDHI1CD_MARK, PSE13_0, PSE12_1, PTW7_FN),
1136 PINMUX_DATA(SDHI1WP_MARK, PSE13_0, PSE12_1, PTW6_FN),
1137 PINMUX_DATA(SDHI1D3_MARK, PSE13_0, PSE12_1, PTW5_FN),
1138 PINMUX_DATA(SDHI1D2_MARK, PSE13_0, PSE12_1, PTW4_FN),
1139 PINMUX_DATA(SDHI1D1_MARK, PSA13_1, PTW3_FN),
1140 PINMUX_DATA(SDHI1D0_MARK, PSA13_1, PTW2_FN),
1141 PINMUX_DATA(SDHI1CMD_MARK, PSA13_1, PTW1_FN),
1142 PINMUX_DATA(SDHI1CLK_MARK, PSA13_1, PTW0_FN),
1143
1144 PINMUX_DATA(IODACK_MARK, PSE13_1, PSE12_0, PTW7_FN),
1145 PINMUX_DATA(IDERST_MARK, PSE13_1, PSE12_0, PTW6_FN),
1146 PINMUX_DATA(EXBUF_ENB_MARK, PSE13_1, PSE12_0, PTW5_FN),
1147 PINMUX_DATA(DIRECTION_MARK, PSE13_1, PSE12_0, PTW4_FN),
1148
1149 /* PTX FN */
1150 PINMUX_DATA(DMAC_DACK1_MARK, PSA12_0, PTX7_FN),
1151 PINMUX_DATA(DMAC_DREQ1_MARK, PSA12_0, PTX6_FN),
1152
1153 PINMUX_DATA(IRDA_OUT_MARK, PSA12_1, PTX7_FN),
1154 PINMUX_DATA(IRDA_IN_MARK, PSA12_1, PTX6_FN),
1155
1156 PINMUX_DATA(TSIF_TS0_SDAT_MARK, PSC0_0, PTX5_FN),
1157 PINMUX_DATA(TSIF_TS0_SCK_MARK, PSC1_0, PTX4_FN),
1158 PINMUX_DATA(TSIF_TS0_SDEN_MARK, PSC2_0, PTX3_FN),
1159 PINMUX_DATA(TSIF_TS0_SPSYNC_MARK, PTX2_FN),
1160
1161 PINMUX_DATA(LNKSTA_MARK, PSC0_1, PTX5_FN),
1162 PINMUX_DATA(MDIO_MARK, PSC1_1, PTX4_FN),
1163 PINMUX_DATA(MDC_MARK, PSC2_1, PTX3_FN),
1164
1165 PINMUX_DATA(MMC_CLK_MARK, PTX1_FN),
1166 PINMUX_DATA(MMC_CMD_MARK, PTX0_FN),
1167
1168 /* PTY FN */
1169 PINMUX_DATA(SDHI0CD_MARK, PTY7_FN),
1170 PINMUX_DATA(SDHI0WP_MARK, PTY6_FN),
1171 PINMUX_DATA(SDHI0D3_MARK, PTY5_FN),
1172 PINMUX_DATA(SDHI0D2_MARK, PTY4_FN),
1173 PINMUX_DATA(SDHI0D1_MARK, PTY3_FN),
1174 PINMUX_DATA(SDHI0D0_MARK, PTY2_FN),
1175 PINMUX_DATA(SDHI0CMD_MARK, PTY1_FN),
1176 PINMUX_DATA(SDHI0CLK_MARK, PTY0_FN),
1177
1178 /* PTZ FN */
1179 PINMUX_DATA(INTC_IRQ7_MARK, PSB10_0, PTZ7_FN),
1180 PINMUX_DATA(INTC_IRQ6_MARK, PSB11_0, PTZ6_FN),
1181 PINMUX_DATA(INTC_IRQ5_MARK, PSB12_0, PTZ5_FN),
1182 PINMUX_DATA(INTC_IRQ4_MARK, PSB13_0, PTZ4_FN),
1183 PINMUX_DATA(INTC_IRQ3_MARK, PSB14_0, PTZ3_FN),
1184 PINMUX_DATA(INTC_IRQ2_MARK, PTZ2_FN),
1185 PINMUX_DATA(INTC_IRQ1_MARK, PTZ1_FN),
1186 PINMUX_DATA(INTC_IRQ0_MARK, PTZ0_FN),
1187
1188 PINMUX_DATA(SCIF3_I_CTS_MARK, PSB10_1, PTZ7_FN),
1189 PINMUX_DATA(SCIF3_I_RTS_MARK, PSB11_1, PTZ6_FN),
1190 PINMUX_DATA(SCIF3_I_SCK_MARK, PSB12_1, PTZ5_FN),
1191 PINMUX_DATA(SCIF3_I_RXD_MARK, PSB13_1, PTZ4_FN),
1192 PINMUX_DATA(SCIF3_I_TXD_MARK, PSB14_1, PTZ3_FN),
1193};
1194
1195static struct pinmux_gpio pinmux_gpios[] = {
1196 /* PTA */
1197 PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
1198 PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
1199 PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
1200 PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
1201 PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
1202 PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
1203 PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
1204 PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
1205
1206 /* PTB */
1207 PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
1208 PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
1209 PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
1210 PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
1211 PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
1212 PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
1213 PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
1214 PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
1215
1216 /* PTC */
1217 PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
1218 PINMUX_GPIO(GPIO_PTC6, PTC6_DATA),
1219 PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
1220 PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
1221 PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
1222 PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
1223 PINMUX_GPIO(GPIO_PTC1, PTC1_DATA),
1224 PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
1225
1226 /* PTD */
1227 PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
1228 PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
1229 PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
1230 PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
1231 PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
1232 PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
1233 PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
1234 PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
1235
1236 /* PTE */
1237 PINMUX_GPIO(GPIO_PTE7, PTE7_DATA),
1238 PINMUX_GPIO(GPIO_PTE6, PTE6_DATA),
1239 PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
1240 PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
1241 PINMUX_GPIO(GPIO_PTE3, PTE3_DATA),
1242 PINMUX_GPIO(GPIO_PTE2, PTE2_DATA),
1243 PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
1244 PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
1245
1246 /* PTF */
1247 PINMUX_GPIO(GPIO_PTF7, PTF7_DATA),
1248 PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
1249 PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
1250 PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
1251 PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
1252 PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
1253 PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
1254 PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
1255
1256 /* PTG */
1257 PINMUX_GPIO(GPIO_PTG5, PTG5_DATA),
1258 PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
1259 PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
1260 PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
1261 PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
1262 PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
1263
1264 /* PTH */
1265 PINMUX_GPIO(GPIO_PTH7, PTH7_DATA),
1266 PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
1267 PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
1268 PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
1269 PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
1270 PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
1271 PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
1272 PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
1273
1274 /* PTJ */
1275 PINMUX_GPIO(GPIO_PTJ7, PTJ7_DATA),
1276 PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
1277 PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
1278 PINMUX_GPIO(GPIO_PTJ3, PTJ3_DATA),
1279 PINMUX_GPIO(GPIO_PTJ2, PTJ2_DATA),
1280 PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
1281 PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
1282
1283 /* PTK */
1284 PINMUX_GPIO(GPIO_PTK7, PTK7_DATA),
1285 PINMUX_GPIO(GPIO_PTK6, PTK6_DATA),
1286 PINMUX_GPIO(GPIO_PTK5, PTK5_DATA),
1287 PINMUX_GPIO(GPIO_PTK4, PTK4_DATA),
1288 PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
1289 PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
1290 PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
1291 PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
1292
1293 /* PTL */
1294 PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
1295 PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
1296 PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
1297 PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
1298 PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
1299 PINMUX_GPIO(GPIO_PTL2, PTL2_DATA),
1300 PINMUX_GPIO(GPIO_PTL1, PTL1_DATA),
1301 PINMUX_GPIO(GPIO_PTL0, PTL0_DATA),
1302
1303 /* PTM */
1304 PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
1305 PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
1306 PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
1307 PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
1308 PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
1309 PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
1310 PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
1311 PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
1312
1313 /* PTN */
1314 PINMUX_GPIO(GPIO_PTN7, PTN7_DATA),
1315 PINMUX_GPIO(GPIO_PTN6, PTN6_DATA),
1316 PINMUX_GPIO(GPIO_PTN5, PTN5_DATA),
1317 PINMUX_GPIO(GPIO_PTN4, PTN4_DATA),
1318 PINMUX_GPIO(GPIO_PTN3, PTN3_DATA),
1319 PINMUX_GPIO(GPIO_PTN2, PTN2_DATA),
1320 PINMUX_GPIO(GPIO_PTN1, PTN1_DATA),
1321 PINMUX_GPIO(GPIO_PTN0, PTN0_DATA),
1322
1323 /* PTQ */
1324 PINMUX_GPIO(GPIO_PTQ7, PTQ7_DATA),
1325 PINMUX_GPIO(GPIO_PTQ6, PTQ6_DATA),
1326 PINMUX_GPIO(GPIO_PTQ5, PTQ5_DATA),
1327 PINMUX_GPIO(GPIO_PTQ4, PTQ4_DATA),
1328 PINMUX_GPIO(GPIO_PTQ3, PTQ3_DATA),
1329 PINMUX_GPIO(GPIO_PTQ2, PTQ2_DATA),
1330 PINMUX_GPIO(GPIO_PTQ1, PTQ1_DATA),
1331 PINMUX_GPIO(GPIO_PTQ0, PTQ0_DATA),
1332
1333 /* PTR */
1334 PINMUX_GPIO(GPIO_PTR7, PTR7_DATA),
1335 PINMUX_GPIO(GPIO_PTR6, PTR6_DATA),
1336 PINMUX_GPIO(GPIO_PTR5, PTR5_DATA),
1337 PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
1338 PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
1339 PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
1340 PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
1341 PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
1342
1343 /* PTS */
1344 PINMUX_GPIO(GPIO_PTS6, PTS6_DATA),
1345 PINMUX_GPIO(GPIO_PTS5, PTS5_DATA),
1346 PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
1347 PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
1348 PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
1349 PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
1350 PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
1351
1352 /* PTT */
1353 PINMUX_GPIO(GPIO_PTT7, PTT7_DATA),
1354 PINMUX_GPIO(GPIO_PTT6, PTT6_DATA),
1355 PINMUX_GPIO(GPIO_PTT5, PTT5_DATA),
1356 PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
1357 PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
1358 PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
1359 PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
1360 PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
1361
1362 /* PTU */
1363 PINMUX_GPIO(GPIO_PTU7, PTU7_DATA),
1364 PINMUX_GPIO(GPIO_PTU6, PTU6_DATA),
1365 PINMUX_GPIO(GPIO_PTU5, PTU5_DATA),
1366 PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
1367 PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
1368 PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
1369 PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
1370 PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
1371
1372 /* PTV */
1373 PINMUX_GPIO(GPIO_PTV7, PTV7_DATA),
1374 PINMUX_GPIO(GPIO_PTV6, PTV6_DATA),
1375 PINMUX_GPIO(GPIO_PTV5, PTV5_DATA),
1376 PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
1377 PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
1378 PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
1379 PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
1380 PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
1381
1382 /* PTW */
1383 PINMUX_GPIO(GPIO_PTW7, PTW7_DATA),
1384 PINMUX_GPIO(GPIO_PTW6, PTW6_DATA),
1385 PINMUX_GPIO(GPIO_PTW5, PTW5_DATA),
1386 PINMUX_GPIO(GPIO_PTW4, PTW4_DATA),
1387 PINMUX_GPIO(GPIO_PTW3, PTW3_DATA),
1388 PINMUX_GPIO(GPIO_PTW2, PTW2_DATA),
1389 PINMUX_GPIO(GPIO_PTW1, PTW1_DATA),
1390 PINMUX_GPIO(GPIO_PTW0, PTW0_DATA),
1391
1392 /* PTX */
1393 PINMUX_GPIO(GPIO_PTX7, PTX7_DATA),
1394 PINMUX_GPIO(GPIO_PTX6, PTX6_DATA),
1395 PINMUX_GPIO(GPIO_PTX5, PTX5_DATA),
1396 PINMUX_GPIO(GPIO_PTX4, PTX4_DATA),
1397 PINMUX_GPIO(GPIO_PTX3, PTX3_DATA),
1398 PINMUX_GPIO(GPIO_PTX2, PTX2_DATA),
1399 PINMUX_GPIO(GPIO_PTX1, PTX1_DATA),
1400 PINMUX_GPIO(GPIO_PTX0, PTX0_DATA),
1401
1402 /* PTY */
1403 PINMUX_GPIO(GPIO_PTY7, PTY7_DATA),
1404 PINMUX_GPIO(GPIO_PTY6, PTY6_DATA),
1405 PINMUX_GPIO(GPIO_PTY5, PTY5_DATA),
1406 PINMUX_GPIO(GPIO_PTY4, PTY4_DATA),
1407 PINMUX_GPIO(GPIO_PTY3, PTY3_DATA),
1408 PINMUX_GPIO(GPIO_PTY2, PTY2_DATA),
1409 PINMUX_GPIO(GPIO_PTY1, PTY1_DATA),
1410 PINMUX_GPIO(GPIO_PTY0, PTY0_DATA),
1411
1412 /* PTZ */
1413 PINMUX_GPIO(GPIO_PTZ7, PTZ7_DATA),
1414 PINMUX_GPIO(GPIO_PTZ6, PTZ6_DATA),
1415 PINMUX_GPIO(GPIO_PTZ5, PTZ5_DATA),
1416 PINMUX_GPIO(GPIO_PTZ4, PTZ4_DATA),
1417 PINMUX_GPIO(GPIO_PTZ3, PTZ3_DATA),
1418 PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
1419 PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
1420 PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA),
1421
1422 /* BSC */
1423 PINMUX_GPIO(GPIO_FN_D31, D31_MARK),
1424 PINMUX_GPIO(GPIO_FN_D30, D30_MARK),
1425 PINMUX_GPIO(GPIO_FN_D29, D29_MARK),
1426 PINMUX_GPIO(GPIO_FN_D28, D28_MARK),
1427 PINMUX_GPIO(GPIO_FN_D27, D27_MARK),
1428 PINMUX_GPIO(GPIO_FN_D26, D26_MARK),
1429 PINMUX_GPIO(GPIO_FN_D25, D25_MARK),
1430 PINMUX_GPIO(GPIO_FN_D24, D24_MARK),
1431 PINMUX_GPIO(GPIO_FN_D23, D23_MARK),
1432 PINMUX_GPIO(GPIO_FN_D22, D22_MARK),
1433 PINMUX_GPIO(GPIO_FN_D21, D21_MARK),
1434 PINMUX_GPIO(GPIO_FN_D20, D20_MARK),
1435 PINMUX_GPIO(GPIO_FN_D19, D19_MARK),
1436 PINMUX_GPIO(GPIO_FN_D18, D18_MARK),
1437 PINMUX_GPIO(GPIO_FN_D17, D17_MARK),
1438 PINMUX_GPIO(GPIO_FN_D16, D16_MARK),
1439 PINMUX_GPIO(GPIO_FN_D15, D15_MARK),
1440 PINMUX_GPIO(GPIO_FN_D14, D14_MARK),
1441 PINMUX_GPIO(GPIO_FN_D13, D13_MARK),
1442 PINMUX_GPIO(GPIO_FN_D12, D12_MARK),
1443 PINMUX_GPIO(GPIO_FN_D11, D11_MARK),
1444 PINMUX_GPIO(GPIO_FN_D10, D10_MARK),
1445 PINMUX_GPIO(GPIO_FN_D9, D9_MARK),
1446 PINMUX_GPIO(GPIO_FN_D8, D8_MARK),
1447 PINMUX_GPIO(GPIO_FN_D7, D7_MARK),
1448 PINMUX_GPIO(GPIO_FN_D6, D6_MARK),
1449 PINMUX_GPIO(GPIO_FN_D5, D5_MARK),
1450 PINMUX_GPIO(GPIO_FN_D4, D4_MARK),
1451 PINMUX_GPIO(GPIO_FN_D3, D3_MARK),
1452 PINMUX_GPIO(GPIO_FN_D2, D2_MARK),
1453 PINMUX_GPIO(GPIO_FN_D1, D1_MARK),
1454 PINMUX_GPIO(GPIO_FN_D0, D0_MARK),
1455 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
1456 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
1457 PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
1458 PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
1459 PINMUX_GPIO(GPIO_FN_CS6B_CE1B, CS6B_CE1B_MARK),
1460 PINMUX_GPIO(GPIO_FN_CS6A_CE2B, CS6A_CE2B_MARK),
1461 PINMUX_GPIO(GPIO_FN_CS5B_CE1A, CS5B_CE1A_MARK),
1462 PINMUX_GPIO(GPIO_FN_CS5A_CE2A, CS5A_CE2A_MARK),
1463 PINMUX_GPIO(GPIO_FN_WE3_ICIOWR, WE3_ICIOWR_MARK),
1464 PINMUX_GPIO(GPIO_FN_WE2_ICIORD, WE2_ICIORD_MARK),
1465 PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
1466 PINMUX_GPIO(GPIO_FN_WAIT, WAIT_MARK),
1467 PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
1468
1469 /* KEYSC */
1470 PINMUX_GPIO(GPIO_FN_KEYOUT5_IN5, KEYOUT5_IN5_MARK),
1471 PINMUX_GPIO(GPIO_FN_KEYOUT4_IN6, KEYOUT4_IN6_MARK),
1472 PINMUX_GPIO(GPIO_FN_KEYIN4, KEYIN4_MARK),
1473 PINMUX_GPIO(GPIO_FN_KEYIN3, KEYIN3_MARK),
1474 PINMUX_GPIO(GPIO_FN_KEYIN2, KEYIN2_MARK),
1475 PINMUX_GPIO(GPIO_FN_KEYIN1, KEYIN1_MARK),
1476 PINMUX_GPIO(GPIO_FN_KEYIN0, KEYIN0_MARK),
1477 PINMUX_GPIO(GPIO_FN_KEYOUT3, KEYOUT3_MARK),
1478 PINMUX_GPIO(GPIO_FN_KEYOUT2, KEYOUT2_MARK),
1479 PINMUX_GPIO(GPIO_FN_KEYOUT1, KEYOUT1_MARK),
1480 PINMUX_GPIO(GPIO_FN_KEYOUT0, KEYOUT0_MARK),
1481
1482 /* ATAPI */
1483 PINMUX_GPIO(GPIO_FN_IDED15, IDED15_MARK),
1484 PINMUX_GPIO(GPIO_FN_IDED14, IDED14_MARK),
1485 PINMUX_GPIO(GPIO_FN_IDED13, IDED13_MARK),
1486 PINMUX_GPIO(GPIO_FN_IDED12, IDED12_MARK),
1487 PINMUX_GPIO(GPIO_FN_IDED11, IDED11_MARK),
1488 PINMUX_GPIO(GPIO_FN_IDED10, IDED10_MARK),
1489 PINMUX_GPIO(GPIO_FN_IDED9, IDED9_MARK),
1490 PINMUX_GPIO(GPIO_FN_IDED8, IDED8_MARK),
1491 PINMUX_GPIO(GPIO_FN_IDED7, IDED7_MARK),
1492 PINMUX_GPIO(GPIO_FN_IDED6, IDED6_MARK),
1493 PINMUX_GPIO(GPIO_FN_IDED5, IDED5_MARK),
1494 PINMUX_GPIO(GPIO_FN_IDED4, IDED4_MARK),
1495 PINMUX_GPIO(GPIO_FN_IDED3, IDED3_MARK),
1496 PINMUX_GPIO(GPIO_FN_IDED2, IDED2_MARK),
1497 PINMUX_GPIO(GPIO_FN_IDED1, IDED1_MARK),
1498 PINMUX_GPIO(GPIO_FN_IDED0, IDED0_MARK),
1499 PINMUX_GPIO(GPIO_FN_IDEA2, IDEA2_MARK),
1500 PINMUX_GPIO(GPIO_FN_IDEA1, IDEA1_MARK),
1501 PINMUX_GPIO(GPIO_FN_IDEA0, IDEA0_MARK),
1502 PINMUX_GPIO(GPIO_FN_IDEIOWR, IDEIOWR_MARK),
1503 PINMUX_GPIO(GPIO_FN_IODREQ, IODREQ_MARK),
1504 PINMUX_GPIO(GPIO_FN_IDECS0, IDECS0_MARK),
1505 PINMUX_GPIO(GPIO_FN_IDECS1, IDECS1_MARK),
1506 PINMUX_GPIO(GPIO_FN_IDEIORD, IDEIORD_MARK),
1507 PINMUX_GPIO(GPIO_FN_DIRECTION, DIRECTION_MARK),
1508 PINMUX_GPIO(GPIO_FN_EXBUF_ENB, EXBUF_ENB_MARK),
1509 PINMUX_GPIO(GPIO_FN_IDERST, IDERST_MARK),
1510 PINMUX_GPIO(GPIO_FN_IODACK, IODACK_MARK),
1511 PINMUX_GPIO(GPIO_FN_IDEINT, IDEINT_MARK),
1512 PINMUX_GPIO(GPIO_FN_IDEIORDY, IDEIORDY_MARK),
1513
1514 /* TPU */
1515 PINMUX_GPIO(GPIO_FN_TPUTO3, TPUTO3_MARK),
1516 PINMUX_GPIO(GPIO_FN_TPUTO2, TPUTO2_MARK),
1517 PINMUX_GPIO(GPIO_FN_TPUTO1, TPUTO1_MARK),
1518 PINMUX_GPIO(GPIO_FN_TPUTO0, TPUTO0_MARK),
1519 PINMUX_GPIO(GPIO_FN_TPUTI3, TPUTI3_MARK),
1520 PINMUX_GPIO(GPIO_FN_TPUTI2, TPUTI2_MARK),
1521
1522 /* LCDC */
1523 PINMUX_GPIO(GPIO_FN_LCDD23, LCDD23_MARK),
1524 PINMUX_GPIO(GPIO_FN_LCDD22, LCDD22_MARK),
1525 PINMUX_GPIO(GPIO_FN_LCDD21, LCDD21_MARK),
1526 PINMUX_GPIO(GPIO_FN_LCDD20, LCDD20_MARK),
1527 PINMUX_GPIO(GPIO_FN_LCDD19, LCDD19_MARK),
1528 PINMUX_GPIO(GPIO_FN_LCDD18, LCDD18_MARK),
1529 PINMUX_GPIO(GPIO_FN_LCDD17, LCDD17_MARK),
1530 PINMUX_GPIO(GPIO_FN_LCDD16, LCDD16_MARK),
1531 PINMUX_GPIO(GPIO_FN_LCDD15, LCDD15_MARK),
1532 PINMUX_GPIO(GPIO_FN_LCDD14, LCDD14_MARK),
1533 PINMUX_GPIO(GPIO_FN_LCDD13, LCDD13_MARK),
1534 PINMUX_GPIO(GPIO_FN_LCDD12, LCDD12_MARK),
1535 PINMUX_GPIO(GPIO_FN_LCDD11, LCDD11_MARK),
1536 PINMUX_GPIO(GPIO_FN_LCDD10, LCDD10_MARK),
1537 PINMUX_GPIO(GPIO_FN_LCDD9, LCDD9_MARK),
1538 PINMUX_GPIO(GPIO_FN_LCDD8, LCDD8_MARK),
1539 PINMUX_GPIO(GPIO_FN_LCDD7, LCDD7_MARK),
1540 PINMUX_GPIO(GPIO_FN_LCDD6, LCDD6_MARK),
1541 PINMUX_GPIO(GPIO_FN_LCDD5, LCDD5_MARK),
1542 PINMUX_GPIO(GPIO_FN_LCDD4, LCDD4_MARK),
1543 PINMUX_GPIO(GPIO_FN_LCDD3, LCDD3_MARK),
1544 PINMUX_GPIO(GPIO_FN_LCDD2, LCDD2_MARK),
1545 PINMUX_GPIO(GPIO_FN_LCDD1, LCDD1_MARK),
1546 PINMUX_GPIO(GPIO_FN_LCDD0, LCDD0_MARK),
1547 PINMUX_GPIO(GPIO_FN_LCDVSYN, LCDVSYN_MARK),
1548 PINMUX_GPIO(GPIO_FN_LCDDISP, LCDDISP_MARK),
1549 PINMUX_GPIO(GPIO_FN_LCDRS, LCDRS_MARK),
1550 PINMUX_GPIO(GPIO_FN_LCDHSYN, LCDHSYN_MARK),
1551 PINMUX_GPIO(GPIO_FN_LCDCS, LCDCS_MARK),
1552 PINMUX_GPIO(GPIO_FN_LCDDON, LCDDON_MARK),
1553 PINMUX_GPIO(GPIO_FN_LCDDCK, LCDDCK_MARK),
1554 PINMUX_GPIO(GPIO_FN_LCDWR, LCDWR_MARK),
1555 PINMUX_GPIO(GPIO_FN_LCDVEPWC, LCDVEPWC_MARK),
1556 PINMUX_GPIO(GPIO_FN_LCDVCPWC, LCDVCPWC_MARK),
1557 PINMUX_GPIO(GPIO_FN_LCDRD, LCDRD_MARK),
1558 PINMUX_GPIO(GPIO_FN_LCDLCLK, LCDLCLK_MARK),
1559
1560 /* SCIF0 */
1561 PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK),
1562 PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK),
1563 PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK),
1564
1565 /* SCIF1 */
1566 PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK),
1567 PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK),
1568 PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK),
1569
1570 /* SCIF2 */
1571 PINMUX_GPIO(GPIO_FN_SCIF2_L_TXD, SCIF2_L_TXD_MARK),
1572 PINMUX_GPIO(GPIO_FN_SCIF2_L_SCK, SCIF2_L_SCK_MARK),
1573 PINMUX_GPIO(GPIO_FN_SCIF2_L_RXD, SCIF2_L_RXD_MARK),
1574 PINMUX_GPIO(GPIO_FN_SCIF2_V_TXD, SCIF2_V_TXD_MARK),
1575 PINMUX_GPIO(GPIO_FN_SCIF2_V_SCK, SCIF2_V_SCK_MARK),
1576 PINMUX_GPIO(GPIO_FN_SCIF2_V_RXD, SCIF2_V_RXD_MARK),
1577
1578 /* SCIF3 */
1579 PINMUX_GPIO(GPIO_FN_SCIF3_V_SCK, SCIF3_V_SCK_MARK),
1580 PINMUX_GPIO(GPIO_FN_SCIF3_V_RXD, SCIF3_V_RXD_MARK),
1581 PINMUX_GPIO(GPIO_FN_SCIF3_V_TXD, SCIF3_V_TXD_MARK),
1582 PINMUX_GPIO(GPIO_FN_SCIF3_V_CTS, SCIF3_V_CTS_MARK),
1583 PINMUX_GPIO(GPIO_FN_SCIF3_V_RTS, SCIF3_V_RTS_MARK),
1584 PINMUX_GPIO(GPIO_FN_SCIF3_I_SCK, SCIF3_I_SCK_MARK),
1585 PINMUX_GPIO(GPIO_FN_SCIF3_I_RXD, SCIF3_I_RXD_MARK),
1586 PINMUX_GPIO(GPIO_FN_SCIF3_I_TXD, SCIF3_I_TXD_MARK),
1587 PINMUX_GPIO(GPIO_FN_SCIF3_I_CTS, SCIF3_I_CTS_MARK),
1588 PINMUX_GPIO(GPIO_FN_SCIF3_I_RTS, SCIF3_I_RTS_MARK),
1589
1590 /* SCIF4 */
1591 PINMUX_GPIO(GPIO_FN_SCIF4_SCK, SCIF4_SCK_MARK),
1592 PINMUX_GPIO(GPIO_FN_SCIF4_RXD, SCIF4_RXD_MARK),
1593 PINMUX_GPIO(GPIO_FN_SCIF4_TXD, SCIF4_TXD_MARK),
1594
1595 /* SCIF5 */
1596 PINMUX_GPIO(GPIO_FN_SCIF5_SCK, SCIF5_SCK_MARK),
1597 PINMUX_GPIO(GPIO_FN_SCIF5_RXD, SCIF5_RXD_MARK),
1598 PINMUX_GPIO(GPIO_FN_SCIF5_TXD, SCIF5_TXD_MARK),
1599
1600 /* FSI */
1601 PINMUX_GPIO(GPIO_FN_FSIMCKB, FSIMCKB_MARK),
1602 PINMUX_GPIO(GPIO_FN_FSIMCKA, FSIMCKA_MARK),
1603 PINMUX_GPIO(GPIO_FN_FSIOASD, FSIOASD_MARK),
1604 PINMUX_GPIO(GPIO_FN_FSIIABCK, FSIIABCK_MARK),
1605 PINMUX_GPIO(GPIO_FN_FSIIALRCK, FSIIALRCK_MARK),
1606 PINMUX_GPIO(GPIO_FN_FSIOABCK, FSIOABCK_MARK),
1607 PINMUX_GPIO(GPIO_FN_FSIOALRCK, FSIOALRCK_MARK),
1608 PINMUX_GPIO(GPIO_FN_CLKAUDIOAO, CLKAUDIOAO_MARK),
1609 PINMUX_GPIO(GPIO_FN_FSIIBSD, FSIIBSD_MARK),
1610 PINMUX_GPIO(GPIO_FN_FSIOBSD, FSIOBSD_MARK),
1611 PINMUX_GPIO(GPIO_FN_FSIIBBCK, FSIIBBCK_MARK),
1612 PINMUX_GPIO(GPIO_FN_FSIIBLRCK, FSIIBLRCK_MARK),
1613 PINMUX_GPIO(GPIO_FN_FSIOBBCK, FSIOBBCK_MARK),
1614 PINMUX_GPIO(GPIO_FN_FSIOBLRCK, FSIOBLRCK_MARK),
1615 PINMUX_GPIO(GPIO_FN_CLKAUDIOBO, CLKAUDIOBO_MARK),
1616 PINMUX_GPIO(GPIO_FN_FSIIASD, FSIIASD_MARK),
1617
1618 /* AUD */
1619 PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK),
1620 PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK),
1621 PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK),
1622 PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK),
1623 PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK),
1624 PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK),
1625
1626 /* VIO */
1627 PINMUX_GPIO(GPIO_FN_VIO_CKO, VIO_CKO_MARK),
1628
1629 /* VIO0 */
1630 PINMUX_GPIO(GPIO_FN_VIO0_D15, VIO0_D15_MARK),
1631 PINMUX_GPIO(GPIO_FN_VIO0_D14, VIO0_D14_MARK),
1632 PINMUX_GPIO(GPIO_FN_VIO0_D13, VIO0_D13_MARK),
1633 PINMUX_GPIO(GPIO_FN_VIO0_D12, VIO0_D12_MARK),
1634 PINMUX_GPIO(GPIO_FN_VIO0_D11, VIO0_D11_MARK),
1635 PINMUX_GPIO(GPIO_FN_VIO0_D10, VIO0_D10_MARK),
1636 PINMUX_GPIO(GPIO_FN_VIO0_D9, VIO0_D9_MARK),
1637 PINMUX_GPIO(GPIO_FN_VIO0_D8, VIO0_D8_MARK),
1638 PINMUX_GPIO(GPIO_FN_VIO0_D7, VIO0_D7_MARK),
1639 PINMUX_GPIO(GPIO_FN_VIO0_D6, VIO0_D6_MARK),
1640 PINMUX_GPIO(GPIO_FN_VIO0_D5, VIO0_D5_MARK),
1641 PINMUX_GPIO(GPIO_FN_VIO0_D4, VIO0_D4_MARK),
1642 PINMUX_GPIO(GPIO_FN_VIO0_D3, VIO0_D3_MARK),
1643 PINMUX_GPIO(GPIO_FN_VIO0_D2, VIO0_D2_MARK),
1644 PINMUX_GPIO(GPIO_FN_VIO0_D1, VIO0_D1_MARK),
1645 PINMUX_GPIO(GPIO_FN_VIO0_D0, VIO0_D0_MARK),
1646 PINMUX_GPIO(GPIO_FN_VIO0_VD, VIO0_VD_MARK),
1647 PINMUX_GPIO(GPIO_FN_VIO0_CLK, VIO0_CLK_MARK),
1648 PINMUX_GPIO(GPIO_FN_VIO0_FLD, VIO0_FLD_MARK),
1649 PINMUX_GPIO(GPIO_FN_VIO0_HD, VIO0_HD_MARK),
1650
1651 /* VIO1 */
1652 PINMUX_GPIO(GPIO_FN_VIO1_D7, VIO1_D7_MARK),
1653 PINMUX_GPIO(GPIO_FN_VIO1_D6, VIO1_D6_MARK),
1654 PINMUX_GPIO(GPIO_FN_VIO1_D5, VIO1_D5_MARK),
1655 PINMUX_GPIO(GPIO_FN_VIO1_D4, VIO1_D4_MARK),
1656 PINMUX_GPIO(GPIO_FN_VIO1_D3, VIO1_D3_MARK),
1657 PINMUX_GPIO(GPIO_FN_VIO1_D2, VIO1_D2_MARK),
1658 PINMUX_GPIO(GPIO_FN_VIO1_D1, VIO1_D1_MARK),
1659 PINMUX_GPIO(GPIO_FN_VIO1_D0, VIO1_D0_MARK),
1660 PINMUX_GPIO(GPIO_FN_VIO1_FLD, VIO1_FLD_MARK),
1661 PINMUX_GPIO(GPIO_FN_VIO1_HD, VIO1_HD_MARK),
1662 PINMUX_GPIO(GPIO_FN_VIO1_VD, VIO1_VD_MARK),
1663 PINMUX_GPIO(GPIO_FN_VIO1_CLK, VIO1_CLK_MARK),
1664
1665 /* Eth */
1666 PINMUX_GPIO(GPIO_FN_RMII_RXD0, RMII_RXD0_MARK),
1667 PINMUX_GPIO(GPIO_FN_RMII_RXD1, RMII_RXD1_MARK),
1668 PINMUX_GPIO(GPIO_FN_RMII_TXD0, RMII_TXD0_MARK),
1669 PINMUX_GPIO(GPIO_FN_RMII_TXD1, RMII_TXD1_MARK),
1670 PINMUX_GPIO(GPIO_FN_RMII_REF_CLK, RMII_REF_CLK_MARK),
1671 PINMUX_GPIO(GPIO_FN_RMII_TX_EN, RMII_TX_EN_MARK),
1672 PINMUX_GPIO(GPIO_FN_RMII_RX_ER, RMII_RX_ER_MARK),
1673 PINMUX_GPIO(GPIO_FN_RMII_CRS_DV, RMII_CRS_DV_MARK),
1674 PINMUX_GPIO(GPIO_FN_LNKSTA, LNKSTA_MARK),
1675 PINMUX_GPIO(GPIO_FN_MDIO, MDIO_MARK),
1676 PINMUX_GPIO(GPIO_FN_MDC, MDC_MARK),
1677
1678 /* System */
1679 PINMUX_GPIO(GPIO_FN_PDSTATUS, PDSTATUS_MARK),
1680 PINMUX_GPIO(GPIO_FN_STATUS2, STATUS2_MARK),
1681 PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
1682
1683 /* VOU */
1684 PINMUX_GPIO(GPIO_FN_DV_D15, DV_D15_MARK),
1685 PINMUX_GPIO(GPIO_FN_DV_D14, DV_D14_MARK),
1686 PINMUX_GPIO(GPIO_FN_DV_D13, DV_D13_MARK),
1687 PINMUX_GPIO(GPIO_FN_DV_D12, DV_D12_MARK),
1688 PINMUX_GPIO(GPIO_FN_DV_D11, DV_D11_MARK),
1689 PINMUX_GPIO(GPIO_FN_DV_D10, DV_D10_MARK),
1690 PINMUX_GPIO(GPIO_FN_DV_D9, DV_D9_MARK),
1691 PINMUX_GPIO(GPIO_FN_DV_D8, DV_D8_MARK),
1692 PINMUX_GPIO(GPIO_FN_DV_D7, DV_D7_MARK),
1693 PINMUX_GPIO(GPIO_FN_DV_D6, DV_D6_MARK),
1694 PINMUX_GPIO(GPIO_FN_DV_D5, DV_D5_MARK),
1695 PINMUX_GPIO(GPIO_FN_DV_D4, DV_D4_MARK),
1696 PINMUX_GPIO(GPIO_FN_DV_D3, DV_D3_MARK),
1697 PINMUX_GPIO(GPIO_FN_DV_D2, DV_D2_MARK),
1698 PINMUX_GPIO(GPIO_FN_DV_D1, DV_D1_MARK),
1699 PINMUX_GPIO(GPIO_FN_DV_D0, DV_D0_MARK),
1700 PINMUX_GPIO(GPIO_FN_DV_CLKI, DV_CLKI_MARK),
1701 PINMUX_GPIO(GPIO_FN_DV_CLK, DV_CLK_MARK),
1702 PINMUX_GPIO(GPIO_FN_DV_VSYNC, DV_VSYNC_MARK),
1703 PINMUX_GPIO(GPIO_FN_DV_HSYNC, DV_HSYNC_MARK),
1704
1705 /* MSIOF0 */
1706 PINMUX_GPIO(GPIO_FN_MSIOF0_RXD, MSIOF0_RXD_MARK),
1707 PINMUX_GPIO(GPIO_FN_MSIOF0_TXD, MSIOF0_TXD_MARK),
1708 PINMUX_GPIO(GPIO_FN_MSIOF0_MCK, MSIOF0_MCK_MARK),
1709 PINMUX_GPIO(GPIO_FN_MSIOF0_TSCK, MSIOF0_TSCK_MARK),
1710 PINMUX_GPIO(GPIO_FN_MSIOF0_SS1, MSIOF0_SS1_MARK),
1711 PINMUX_GPIO(GPIO_FN_MSIOF0_SS2, MSIOF0_SS2_MARK),
1712 PINMUX_GPIO(GPIO_FN_MSIOF0_TSYNC, MSIOF0_TSYNC_MARK),
1713 PINMUX_GPIO(GPIO_FN_MSIOF0_RSCK, MSIOF0_RSCK_MARK),
1714 PINMUX_GPIO(GPIO_FN_MSIOF0_RSYNC, MSIOF0_RSYNC_MARK),
1715
1716 /* MSIOF1 */
1717 PINMUX_GPIO(GPIO_FN_MSIOF1_RXD, MSIOF1_RXD_MARK),
1718 PINMUX_GPIO(GPIO_FN_MSIOF1_TXD, MSIOF1_TXD_MARK),
1719 PINMUX_GPIO(GPIO_FN_MSIOF1_MCK, MSIOF1_MCK_MARK),
1720 PINMUX_GPIO(GPIO_FN_MSIOF1_TSCK, MSIOF1_TSCK_MARK),
1721 PINMUX_GPIO(GPIO_FN_MSIOF1_SS1, MSIOF1_SS1_MARK),
1722 PINMUX_GPIO(GPIO_FN_MSIOF1_SS2, MSIOF1_SS2_MARK),
1723 PINMUX_GPIO(GPIO_FN_MSIOF1_TSYNC, MSIOF1_TSYNC_MARK),
1724 PINMUX_GPIO(GPIO_FN_MSIOF1_RSCK, MSIOF1_RSCK_MARK),
1725 PINMUX_GPIO(GPIO_FN_MSIOF1_RSYNC, MSIOF1_RSYNC_MARK),
1726
1727 /* DMAC */
1728 PINMUX_GPIO(GPIO_FN_DMAC_DACK0, DMAC_DACK0_MARK),
1729 PINMUX_GPIO(GPIO_FN_DMAC_DREQ0, DMAC_DREQ0_MARK),
1730 PINMUX_GPIO(GPIO_FN_DMAC_DACK1, DMAC_DACK1_MARK),
1731 PINMUX_GPIO(GPIO_FN_DMAC_DREQ1, DMAC_DREQ1_MARK),
1732
1733 /* SDHI0 */
1734 PINMUX_GPIO(GPIO_FN_SDHI0CD, SDHI0CD_MARK),
1735 PINMUX_GPIO(GPIO_FN_SDHI0WP, SDHI0WP_MARK),
1736 PINMUX_GPIO(GPIO_FN_SDHI0CMD, SDHI0CMD_MARK),
1737 PINMUX_GPIO(GPIO_FN_SDHI0CLK, SDHI0CLK_MARK),
1738 PINMUX_GPIO(GPIO_FN_SDHI0D3, SDHI0D3_MARK),
1739 PINMUX_GPIO(GPIO_FN_SDHI0D2, SDHI0D2_MARK),
1740 PINMUX_GPIO(GPIO_FN_SDHI0D1, SDHI0D1_MARK),
1741 PINMUX_GPIO(GPIO_FN_SDHI0D0, SDHI0D0_MARK),
1742
1743 /* SDHI1 */
1744 PINMUX_GPIO(GPIO_FN_SDHI1CD, SDHI1CD_MARK),
1745 PINMUX_GPIO(GPIO_FN_SDHI1WP, SDHI1WP_MARK),
1746 PINMUX_GPIO(GPIO_FN_SDHI1CMD, SDHI1CMD_MARK),
1747 PINMUX_GPIO(GPIO_FN_SDHI1CLK, SDHI1CLK_MARK),
1748 PINMUX_GPIO(GPIO_FN_SDHI1D3, SDHI1D3_MARK),
1749 PINMUX_GPIO(GPIO_FN_SDHI1D2, SDHI1D2_MARK),
1750 PINMUX_GPIO(GPIO_FN_SDHI1D1, SDHI1D1_MARK),
1751 PINMUX_GPIO(GPIO_FN_SDHI1D0, SDHI1D0_MARK),
1752
1753 /* MMC */
1754 PINMUX_GPIO(GPIO_FN_MMC_D7, MMC_D7_MARK),
1755 PINMUX_GPIO(GPIO_FN_MMC_D6, MMC_D6_MARK),
1756 PINMUX_GPIO(GPIO_FN_MMC_D5, MMC_D5_MARK),
1757 PINMUX_GPIO(GPIO_FN_MMC_D4, MMC_D4_MARK),
1758 PINMUX_GPIO(GPIO_FN_MMC_D3, MMC_D3_MARK),
1759 PINMUX_GPIO(GPIO_FN_MMC_D2, MMC_D2_MARK),
1760 PINMUX_GPIO(GPIO_FN_MMC_D1, MMC_D1_MARK),
1761 PINMUX_GPIO(GPIO_FN_MMC_D0, MMC_D0_MARK),
1762 PINMUX_GPIO(GPIO_FN_MMC_CLK, MMC_CLK_MARK),
1763 PINMUX_GPIO(GPIO_FN_MMC_CMD, MMC_CMD_MARK),
1764
1765 /* IrDA */
1766 PINMUX_GPIO(GPIO_FN_IRDA_OUT, IRDA_OUT_MARK),
1767 PINMUX_GPIO(GPIO_FN_IRDA_IN, IRDA_IN_MARK),
1768
1769 /* TSIF */
1770 PINMUX_GPIO(GPIO_FN_TSIF_TS0_SDAT, TSIF_TS0_SDAT_MARK),
1771 PINMUX_GPIO(GPIO_FN_TSIF_TS0_SCK, TSIF_TS0_SCK_MARK),
1772 PINMUX_GPIO(GPIO_FN_TSIF_TS0_SDEN, TSIF_TS0_SDEN_MARK),
1773 PINMUX_GPIO(GPIO_FN_TSIF_TS0_SPSYNC, TSIF_TS0_SPSYNC_MARK),
1774
1775 /* IRQ */
1776 PINMUX_GPIO(GPIO_FN_INTC_IRQ7, INTC_IRQ7_MARK),
1777 PINMUX_GPIO(GPIO_FN_INTC_IRQ6, INTC_IRQ6_MARK),
1778 PINMUX_GPIO(GPIO_FN_INTC_IRQ5, INTC_IRQ5_MARK),
1779 PINMUX_GPIO(GPIO_FN_INTC_IRQ4, INTC_IRQ4_MARK),
1780 PINMUX_GPIO(GPIO_FN_INTC_IRQ3, INTC_IRQ3_MARK),
1781 PINMUX_GPIO(GPIO_FN_INTC_IRQ2, INTC_IRQ2_MARK),
1782 PINMUX_GPIO(GPIO_FN_INTC_IRQ1, INTC_IRQ1_MARK),
1783 PINMUX_GPIO(GPIO_FN_INTC_IRQ0, INTC_IRQ0_MARK),
1784};
1785
1786static struct pinmux_cfg_reg pinmux_config_regs[] = {
1787 { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
1788 PTA7_FN, PTA7_OUT, PTA7_IN_PU, PTA7_IN,
1789 PTA6_FN, PTA6_OUT, PTA6_IN_PU, PTA6_IN,
1790 PTA5_FN, PTA5_OUT, PTA5_IN_PU, PTA5_IN,
1791 PTA4_FN, PTA4_OUT, PTA4_IN_PU, PTA4_IN,
1792 PTA3_FN, PTA3_OUT, PTA3_IN_PU, PTA3_IN,
1793 PTA2_FN, PTA2_OUT, PTA2_IN_PU, PTA2_IN,
1794 PTA1_FN, PTA1_OUT, PTA1_IN_PU, PTA1_IN,
1795 PTA0_FN, PTA0_OUT, PTA0_IN_PU, PTA0_IN }
1796 },
1797 { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) {
1798 PTB7_FN, PTB7_OUT, PTB7_IN_PU, PTB7_IN,
1799 PTB6_FN, PTB6_OUT, PTB6_IN_PU, PTB6_IN,
1800 PTB5_FN, PTB5_OUT, PTB5_IN_PU, PTB5_IN,
1801 PTB4_FN, PTB4_OUT, PTB4_IN_PU, PTB4_IN,
1802 PTB3_FN, PTB3_OUT, PTB3_IN_PU, PTB3_IN,
1803 PTB2_FN, PTB2_OUT, PTB2_IN_PU, PTB2_IN,
1804 PTB1_FN, PTB1_OUT, PTB1_IN_PU, PTB1_IN,
1805 PTB0_FN, PTB0_OUT, PTB0_IN_PU, PTB0_IN }
1806 },
1807 { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) {
1808 PTC7_FN, PTC7_OUT, PTC7_IN_PU, PTC7_IN,
1809 PTC6_FN, PTC6_OUT, PTC6_IN_PU, PTC6_IN,
1810 PTC5_FN, PTC5_OUT, PTC5_IN_PU, PTC5_IN,
1811 PTC4_FN, PTC4_OUT, PTC4_IN_PU, PTC4_IN,
1812 PTC3_FN, PTC3_OUT, PTC3_IN_PU, PTC3_IN,
1813 PTC2_FN, PTC2_OUT, PTC2_IN_PU, PTC2_IN,
1814 PTC1_FN, PTC1_OUT, PTC1_IN_PU, PTC1_IN,
1815 PTC0_FN, PTC0_OUT, PTC0_IN_PU, PTC0_IN }
1816 },
1817 { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) {
1818 PTD7_FN, PTD7_OUT, PTD7_IN_PU, PTD7_IN,
1819 PTD6_FN, PTD6_OUT, PTD6_IN_PU, PTD6_IN,
1820 PTD5_FN, PTD5_OUT, PTD5_IN_PU, PTD5_IN,
1821 PTD4_FN, PTD4_OUT, PTD4_IN_PU, PTD4_IN,
1822 PTD3_FN, PTD3_OUT, PTD3_IN_PU, PTD3_IN,
1823 PTD2_FN, PTD2_OUT, PTD2_IN_PU, PTD2_IN,
1824 PTD1_FN, PTD1_OUT, PTD1_IN_PU, PTD1_IN,
1825 PTD0_FN, PTD0_OUT, PTD0_IN_PU, PTD0_IN }
1826 },
1827 { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) {
1828 PTE7_FN, PTE7_OUT, PTE7_IN_PU, PTE7_IN,
1829 PTE6_FN, PTE6_OUT, PTE6_IN_PU, PTE6_IN,
1830 PTE5_FN, PTE5_OUT, PTE5_IN_PU, PTE5_IN,
1831 PTE4_FN, PTE4_OUT, PTE4_IN_PU, PTE4_IN,
1832 PTE3_FN, PTE3_OUT, PTE3_IN_PU, PTE3_IN,
1833 PTE2_FN, PTE2_OUT, PTE2_IN_PU, PTE2_IN,
1834 PTE1_FN, PTE1_OUT, PTE1_IN_PU, PTE1_IN,
1835 PTE0_FN, PTE0_OUT, PTE0_IN_PU, PTE0_IN }
1836 },
1837 { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) {
1838 PTF7_FN, PTF7_OUT, PTF7_IN_PU, PTF7_IN,
1839 PTF6_FN, PTF6_OUT, PTF6_IN_PU, PTF6_IN,
1840 PTF5_FN, PTF5_OUT, PTF5_IN_PU, PTF5_IN,
1841 PTF4_FN, PTF4_OUT, PTF4_IN_PU, PTF4_IN,
1842 PTF3_FN, PTF3_OUT, PTF3_IN_PU, PTF3_IN,
1843 PTF2_FN, PTF2_OUT, PTF2_IN_PU, PTF2_IN,
1844 PTF1_FN, PTF1_OUT, PTF1_IN_PU, PTF1_IN,
1845 PTF0_FN, PTF0_OUT, PTF0_IN_PU, PTF0_IN }
1846 },
1847 { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) {
1848 0, 0, 0, 0,
1849 0, 0, 0, 0,
1850 PTG5_FN, PTG5_OUT, 0, 0,
1851 PTG4_FN, PTG4_OUT, 0, 0,
1852 PTG3_FN, PTG3_OUT, 0, 0,
1853 PTG2_FN, PTG2_OUT, 0, 0,
1854 PTG1_FN, PTG1_OUT, 0, 0,
1855 PTG0_FN, PTG0_OUT, 0, 0 }
1856 },
1857 { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) {
1858 PTH7_FN, PTH7_OUT, PTH7_IN_PU, PTH7_IN,
1859 PTH6_FN, PTH6_OUT, PTH6_IN_PU, PTH6_IN,
1860 PTH5_FN, PTH5_OUT, PTH5_IN_PU, PTH5_IN,
1861 PTH4_FN, PTH4_OUT, PTH4_IN_PU, PTH4_IN,
1862 PTH3_FN, PTH3_OUT, PTH3_IN_PU, PTH3_IN,
1863 PTH2_FN, PTH2_OUT, PTH2_IN_PU, PTH2_IN,
1864 PTH1_FN, PTH1_OUT, PTH1_IN_PU, PTH1_IN,
1865 PTH0_FN, PTH0_OUT, PTH0_IN_PU, PTH0_IN }
1866 },
1867 { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) {
1868 PTJ7_FN, PTJ7_OUT, 0, 0,
1869 PTJ6_FN, PTJ6_OUT, 0, 0,
1870 PTJ5_FN, PTJ5_OUT, 0, 0,
1871 0, 0, 0, 0,
1872 PTJ3_FN, PTJ3_OUT, PTJ3_IN_PU, PTJ3_IN,
1873 PTJ2_FN, PTJ2_OUT, PTJ2_IN_PU, PTJ2_IN,
1874 PTJ1_FN, PTJ1_OUT, PTJ1_IN_PU, PTJ1_IN,
1875 PTJ0_FN, PTJ0_OUT, PTJ0_IN_PU, PTJ0_IN }
1876 },
1877 { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) {
1878 PTK7_FN, PTK7_OUT, PTK7_IN_PU, PTK7_IN,
1879 PTK6_FN, PTK6_OUT, PTK6_IN_PU, PTK6_IN,
1880 PTK5_FN, PTK5_OUT, PTK5_IN_PU, PTK5_IN,
1881 PTK4_FN, PTK4_OUT, PTK4_IN_PU, PTK4_IN,
1882 PTK3_FN, PTK3_OUT, PTK3_IN_PU, PTK3_IN,
1883 PTK2_FN, PTK2_OUT, PTK2_IN_PU, PTK2_IN,
1884 PTK1_FN, PTK1_OUT, PTK1_IN_PU, PTK1_IN,
1885 PTK0_FN, PTK0_OUT, PTK0_IN_PU, PTK0_IN }
1886 },
1887 { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) {
1888 PTL7_FN, PTL7_OUT, PTL7_IN_PU, PTL7_IN,
1889 PTL6_FN, PTL6_OUT, PTL6_IN_PU, PTL6_IN,
1890 PTL5_FN, PTL5_OUT, PTL5_IN_PU, PTL5_IN,
1891 PTL4_FN, PTL4_OUT, PTL4_IN_PU, PTL4_IN,
1892 PTL3_FN, PTL3_OUT, PTL3_IN_PU, PTL3_IN,
1893 PTL2_FN, PTL2_OUT, PTL2_IN_PU, PTL2_IN,
1894 PTL1_FN, PTL1_OUT, PTL1_IN_PU, PTL1_IN,
1895 PTL0_FN, PTL0_OUT, PTL0_IN_PU, PTL0_IN }
1896 },
1897 { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) {
1898 PTM7_FN, PTM7_OUT, PTM7_IN_PU, PTM7_IN,
1899 PTM6_FN, PTM6_OUT, PTM6_IN_PU, PTM6_IN,
1900 PTM5_FN, PTM5_OUT, PTM5_IN_PU, PTM5_IN,
1901 PTM4_FN, PTM4_OUT, PTM4_IN_PU, PTM4_IN,
1902 PTM3_FN, PTM3_OUT, PTM3_IN_PU, PTM3_IN,
1903 PTM2_FN, PTM2_OUT, PTM2_IN_PU, PTM2_IN,
1904 PTM1_FN, PTM1_OUT, PTM1_IN_PU, PTM1_IN,
1905 PTM0_FN, PTM0_OUT, PTM0_IN_PU, PTM0_IN }
1906 },
1907 { PINMUX_CFG_REG("PNCR", 0xa4050118, 16, 2) {
1908 PTN7_FN, PTN7_OUT, PTN7_IN_PU, PTN7_IN,
1909 PTN6_FN, PTN6_OUT, PTN6_IN_PU, PTN6_IN,
1910 PTN5_FN, PTN5_OUT, PTN5_IN_PU, PTN5_IN,
1911 PTN4_FN, PTN4_OUT, PTN4_IN_PU, PTN4_IN,
1912 PTN3_FN, PTN3_OUT, PTN3_IN_PU, PTN3_IN,
1913 PTN2_FN, PTN2_OUT, PTN2_IN_PU, PTN2_IN,
1914 PTN1_FN, PTN1_OUT, PTN1_IN_PU, PTN1_IN,
1915 PTN0_FN, PTN0_OUT, PTN0_IN_PU, PTN0_IN }
1916 },
1917 { PINMUX_CFG_REG("PQCR", 0xa405011a, 16, 2) {
1918 PTQ7_FN, PTQ7_OUT, PTQ7_IN_PU, PTQ7_IN,
1919 PTQ6_FN, PTQ6_OUT, PTQ6_IN_PU, PTQ6_IN,
1920 PTQ5_FN, PTQ5_OUT, PTQ5_IN_PU, PTQ5_IN,
1921 PTQ4_FN, PTQ4_OUT, PTQ4_IN_PU, PTQ4_IN,
1922 PTQ3_FN, PTQ3_OUT, PTQ3_IN_PU, PTQ3_IN,
1923 PTQ2_FN, PTQ2_OUT, PTQ2_IN_PU, PTQ2_IN,
1924 PTQ1_FN, PTQ1_OUT, PTQ1_IN_PU, PTQ1_IN,
1925 PTQ0_FN, PTQ0_OUT, PTQ0_IN_PU, PTQ0_IN }
1926 },
1927 { PINMUX_CFG_REG("PRCR", 0xa405011c, 16, 2) {
1928 PTR7_FN, PTR7_OUT, PTR7_IN_PU, PTR7_IN,
1929 PTR6_FN, PTR6_OUT, PTR6_IN_PU, PTR6_IN,
1930 PTR5_FN, PTR5_OUT, PTR5_IN_PU, PTR5_IN,
1931 PTR4_FN, PTR4_OUT, PTR4_IN_PU, PTR4_IN,
1932 PTR3_FN, 0, PTR3_IN_PU, PTR3_IN,
1933 PTR2_FN, 0, PTR2_IN_PU, PTR2_IN,
1934 PTR1_FN, PTR1_OUT, PTR1_IN_PU, PTR1_IN,
1935 PTR0_FN, PTR0_OUT, PTR0_IN_PU, PTR0_IN }
1936 },
1937 { PINMUX_CFG_REG("PSCR", 0xa405011e, 16, 2) {
1938 0, 0, 0, 0,
1939 PTS6_FN, PTS6_OUT, PTS6_IN_PU, PTS6_IN,
1940 PTS5_FN, PTS5_OUT, PTS5_IN_PU, PTS5_IN,
1941 PTS4_FN, PTS4_OUT, PTS4_IN_PU, PTS4_IN,
1942 PTS3_FN, PTS3_OUT, PTS3_IN_PU, PTS3_IN,
1943 PTS2_FN, PTS2_OUT, PTS2_IN_PU, PTS2_IN,
1944 PTS1_FN, PTS1_OUT, PTS1_IN_PU, PTS1_IN,
1945 PTS0_FN, PTS0_OUT, PTS0_IN_PU, PTS0_IN }
1946 },
1947 { PINMUX_CFG_REG("PTCR", 0xa4050140, 16, 2) {
1948 PTT7_FN, PTT7_OUT, PTT7_IN_PU, PTT7_IN,
1949 PTT6_FN, PTT6_OUT, PTT6_IN_PU, PTT6_IN,
1950 PTT5_FN, PTT5_OUT, PTT5_IN_PU, PTT5_IN,
1951 PTT4_FN, PTT4_OUT, PTT4_IN_PU, PTT4_IN,
1952 PTT3_FN, PTT3_OUT, PTT3_IN_PU, PTT3_IN,
1953 PTT2_FN, PTT2_OUT, PTT2_IN_PU, PTT2_IN,
1954 PTT1_FN, PTT1_OUT, PTT1_IN_PU, PTT1_IN,
1955 PTT0_FN, PTT0_OUT, PTT0_IN_PU, PTT0_IN }
1956 },
1957 { PINMUX_CFG_REG("PUCR", 0xa4050142, 16, 2) {
1958 PTU7_FN, PTU7_OUT, PTU7_IN_PU, PTU7_IN,
1959 PTU6_FN, PTU6_OUT, PTU6_IN_PU, PTU6_IN,
1960 PTU5_FN, PTU5_OUT, PTU5_IN_PU, PTU5_IN,
1961 PTU4_FN, PTU4_OUT, PTU4_IN_PU, PTU4_IN,
1962 PTU3_FN, PTU3_OUT, PTU3_IN_PU, PTU3_IN,
1963 PTU2_FN, PTU2_OUT, PTU2_IN_PU, PTU2_IN,
1964 PTU1_FN, PTU1_OUT, PTU1_IN_PU, PTU1_IN,
1965 PTU0_FN, PTU0_OUT, PTU0_IN_PU, PTU0_IN }
1966 },
1967 { PINMUX_CFG_REG("PVCR", 0xa4050144, 16, 2) {
1968 PTV7_FN, PTV7_OUT, PTV7_IN_PU, PTV7_IN,
1969 PTV6_FN, PTV6_OUT, PTV6_IN_PU, PTV6_IN,
1970 PTV5_FN, PTV5_OUT, PTV5_IN_PU, PTV5_IN,
1971 PTV4_FN, PTV4_OUT, PTV4_IN_PU, PTV4_IN,
1972 PTV3_FN, PTV3_OUT, PTV3_IN_PU, PTV3_IN,
1973 PTV2_FN, PTV2_OUT, PTV2_IN_PU, PTV2_IN,
1974 PTV1_FN, PTV1_OUT, PTV1_IN_PU, PTV1_IN,
1975 PTV0_FN, PTV0_OUT, PTV0_IN_PU, PTV0_IN }
1976 },
1977 { PINMUX_CFG_REG("PWCR", 0xa4050146, 16, 2) {
1978 PTW7_FN, PTW7_OUT, PTW7_IN_PU, PTW7_IN,
1979 PTW6_FN, PTW6_OUT, PTW6_IN_PU, PTW6_IN,
1980 PTW5_FN, PTW5_OUT, PTW5_IN_PU, PTW5_IN,
1981 PTW4_FN, PTW4_OUT, PTW4_IN_PU, PTW4_IN,
1982 PTW3_FN, PTW3_OUT, PTW3_IN_PU, PTW3_IN,
1983 PTW2_FN, PTW2_OUT, PTW2_IN_PU, PTW2_IN,
1984 PTW1_FN, PTW1_OUT, PTW1_IN_PU, PTW1_IN,
1985 PTW0_FN, PTW0_OUT, PTW0_IN_PU, PTW0_IN }
1986 },
1987 { PINMUX_CFG_REG("PXCR", 0xa4050148, 16, 2) {
1988 PTX7_FN, PTX7_OUT, PTX7_IN_PU, PTX7_IN,
1989 PTX6_FN, PTX6_OUT, PTX6_IN_PU, PTX6_IN,
1990 PTX5_FN, PTX5_OUT, PTX5_IN_PU, PTX5_IN,
1991 PTX4_FN, PTX4_OUT, PTX4_IN_PU, PTX4_IN,
1992 PTX3_FN, PTX3_OUT, PTX3_IN_PU, PTX3_IN,
1993 PTX2_FN, PTX2_OUT, PTX2_IN_PU, PTX2_IN,
1994 PTX1_FN, PTX1_OUT, PTX1_IN_PU, PTX1_IN,
1995 PTX0_FN, PTX0_OUT, PTX0_IN_PU, PTX0_IN }
1996 },
1997 { PINMUX_CFG_REG("PYCR", 0xa405014a, 16, 2) {
1998 PTY7_FN, PTY7_OUT, PTY7_IN_PU, PTY7_IN,
1999 PTY6_FN, PTY6_OUT, PTY6_IN_PU, PTY6_IN,
2000 PTY5_FN, PTY5_OUT, PTY5_IN_PU, PTY5_IN,
2001 PTY4_FN, PTY4_OUT, PTY4_IN_PU, PTY4_IN,
2002 PTY3_FN, PTY3_OUT, PTY3_IN_PU, PTY3_IN,
2003 PTY2_FN, PTY2_OUT, PTY2_IN_PU, PTY2_IN,
2004 PTY1_FN, PTY1_OUT, PTY1_IN_PU, PTY1_IN,
2005 PTY0_FN, PTY0_OUT, PTY0_IN_PU, PTY0_IN }
2006 },
2007 { PINMUX_CFG_REG("PZCR", 0xa405014c, 16, 2) {
2008 PTZ7_FN, PTZ7_OUT, PTZ7_IN_PU, PTZ7_IN,
2009 PTZ6_FN, PTZ6_OUT, PTZ6_IN_PU, PTZ6_IN,
2010 PTZ5_FN, PTZ5_OUT, PTZ5_IN_PU, PTZ5_IN,
2011 PTZ4_FN, PTZ4_OUT, PTZ4_IN_PU, PTZ4_IN,
2012 PTZ3_FN, PTZ3_OUT, PTZ3_IN_PU, PTZ3_IN,
2013 PTZ2_FN, PTZ2_OUT, PTZ2_IN_PU, PTZ2_IN,
2014 PTZ1_FN, PTZ1_OUT, PTZ1_IN_PU, PTZ1_IN,
2015 PTZ0_FN, PTZ0_OUT, PTZ0_IN_PU, PTZ0_IN }
2016 },
2017 { PINMUX_CFG_REG("PSELA", 0xa405014e, 16, 1) {
2018 PSA15_0, PSA15_1,
2019 PSA14_0, PSA14_1,
2020 PSA13_0, PSA13_1,
2021 PSA12_0, PSA12_1,
2022 0, 0,
2023 PSA10_0, PSA10_1,
2024 PSA9_0, PSA9_1,
2025 PSA8_0, PSA8_1,
2026 PSA7_0, PSA7_1,
2027 PSA6_0, PSA6_1,
2028 PSA5_0, PSA5_1,
2029 0, 0,
2030 PSA3_0, PSA3_1,
2031 PSA2_0, PSA2_1,
2032 PSA1_0, PSA1_1,
2033 PSA0_0, PSA0_1}
2034 },
2035 { PINMUX_CFG_REG("PSELB", 0xa4050150, 16, 1) {
2036 0, 0,
2037 PSB14_0, PSB14_1,
2038 PSB13_0, PSB13_1,
2039 PSB12_0, PSB12_1,
2040 PSB11_0, PSB11_1,
2041 PSB10_0, PSB10_1,
2042 PSB9_0, PSB9_1,
2043 PSB8_0, PSB8_1,
2044 PSB7_0, PSB7_1,
2045 PSB6_0, PSB6_1,
2046 PSB5_0, PSB5_1,
2047 PSB4_0, PSB4_1,
2048 PSB3_0, PSB3_1,
2049 PSB2_0, PSB2_1,
2050 PSB1_0, PSB1_1,
2051 PSB0_0, PSB0_1}
2052 },
2053 { PINMUX_CFG_REG("PSELC", 0xa4050152, 16, 1) {
2054 PSC15_0, PSC15_1,
2055 PSC14_0, PSC14_1,
2056 PSC13_0, PSC13_1,
2057 PSC12_0, PSC12_1,
2058 PSC11_0, PSC11_1,
2059 PSC10_0, PSC10_1,
2060 PSC9_0, PSC9_1,
2061 PSC8_0, PSC8_1,
2062 PSC7_0, PSC7_1,
2063 PSC6_0, PSC6_1,
2064 PSC5_0, PSC5_1,
2065 PSC4_0, PSC4_1,
2066 0, 0,
2067 PSC2_0, PSC2_1,
2068 PSC1_0, PSC1_1,
2069 PSC0_0, PSC0_1}
2070 },
2071 { PINMUX_CFG_REG("PSELD", 0xa4050154, 16, 1) {
2072 PSD15_0, PSD15_1,
2073 PSD14_0, PSD14_1,
2074 PSD13_0, PSD13_1,
2075 PSD12_0, PSD12_1,
2076 PSD11_0, PSD11_1,
2077 PSD10_0, PSD10_1,
2078 PSD9_0, PSD9_1,
2079 PSD8_0, PSD8_1,
2080 PSD7_0, PSD7_1,
2081 PSD6_0, PSD6_1,
2082 PSD5_0, PSD5_1,
2083 PSD4_0, PSD4_1,
2084 PSD3_0, PSD3_1,
2085 PSD2_0, PSD2_1,
2086 PSD1_0, PSD1_1,
2087 PSD0_0, PSD0_1}
2088 },
2089 { PINMUX_CFG_REG("PSELE", 0xa4050156, 16, 1) {
2090 PSE15_0, PSE15_1,
2091 PSE14_0, PSE14_1,
2092 PSE13_0, PSE13_1,
2093 PSE12_0, PSE12_1,
2094 PSE11_0, PSE11_1,
2095 PSE10_0, PSE10_1,
2096 PSE9_0, PSE9_1,
2097 PSE8_0, PSE8_1,
2098 PSE7_0, PSE7_1,
2099 PSE6_0, PSE6_1,
2100 PSE5_0, PSE5_1,
2101 PSE4_0, PSE4_1,
2102 PSE3_0, PSE3_1,
2103 PSE2_0, PSE2_1,
2104 PSE1_0, PSE1_1,
2105 PSE0_0, PSE0_1}
2106 },
2107 {}
2108};
2109
2110static struct pinmux_data_reg pinmux_data_regs[] = {
2111 { PINMUX_DATA_REG("PADR", 0xa4050120, 8) {
2112 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
2113 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
2114 },
2115 { PINMUX_DATA_REG("PBDR", 0xa4050122, 8) {
2116 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
2117 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
2118 },
2119 { PINMUX_DATA_REG("PCDR", 0xa4050124, 8) {
2120 PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
2121 PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA }
2122 },
2123 { PINMUX_DATA_REG("PDDR", 0xa4050126, 8) {
2124 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
2125 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
2126 },
2127 { PINMUX_DATA_REG("PEDR", 0xa4050128, 8) {
2128 PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
2129 PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA }
2130 },
2131 { PINMUX_DATA_REG("PFDR", 0xa405012a, 8) {
2132 PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
2133 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
2134 },
2135 { PINMUX_DATA_REG("PGDR", 0xa405012c, 8) {
2136 0, 0, PTG5_DATA, PTG4_DATA,
2137 PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
2138 },
2139 { PINMUX_DATA_REG("PHDR", 0xa405012e, 8) {
2140 PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
2141 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
2142 },
2143 { PINMUX_DATA_REG("PJDR", 0xa4050130, 8) {
2144 PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, 0,
2145 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA }
2146 },
2147 { PINMUX_DATA_REG("PKDR", 0xa4050132, 8) {
2148 PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
2149 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
2150 },
2151 { PINMUX_DATA_REG("PLDR", 0xa4050134, 8) {
2152 PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
2153 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA }
2154 },
2155 { PINMUX_DATA_REG("PMDR", 0xa4050136, 8) {
2156 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
2157 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
2158 },
2159 { PINMUX_DATA_REG("PNDR", 0xa4050138, 8) {
2160 PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
2161 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA }
2162 },
2163 { PINMUX_DATA_REG("PQDR", 0xa405013a, 8) {
2164 PTQ7_DATA, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
2165 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA }
2166 },
2167 { PINMUX_DATA_REG("PRDR", 0xa405013c, 8) {
2168 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
2169 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
2170 },
2171 { PINMUX_DATA_REG("PSDR", 0xa405013e, 8) {
2172 0, PTS6_DATA, PTS5_DATA, PTS4_DATA,
2173 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
2174 },
2175 { PINMUX_DATA_REG("PTDR", 0xa4050160, 8) {
2176 PTT7_DATA, PTT6_DATA, PTT5_DATA, PTT4_DATA,
2177 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
2178 },
2179 { PINMUX_DATA_REG("PUDR", 0xa4050162, 8) {
2180 PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA,
2181 PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
2182 },
2183 { PINMUX_DATA_REG("PVDR", 0xa4050164, 8) {
2184 PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
2185 PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
2186 },
2187 { PINMUX_DATA_REG("PWDR", 0xa4050166, 8) {
2188 PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
2189 PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA }
2190 },
2191 { PINMUX_DATA_REG("PXDR", 0xa4050168, 8) {
2192 PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
2193 PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA }
2194 },
2195 { PINMUX_DATA_REG("PYDR", 0xa405016a, 8) {
2196 PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
2197 PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA }
2198 },
2199 { PINMUX_DATA_REG("PZDR", 0xa405016c, 8) {
2200 PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
2201 PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA }
2202 },
2203 { },
2204};
2205
2206struct sh_pfc_soc_info sh7724_pinmux_info = {
2207 .name = "sh7724_pfc",
2208 .reserved_id = PINMUX_RESERVED,
2209 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
2210 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
2211 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
2212 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
2213 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
2214 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
2215
2216 .first_gpio = GPIO_PTA7,
2217 .last_gpio = GPIO_FN_INTC_IRQ0,
2218
2219 .gpios = pinmux_gpios,
2220 .cfg_regs = pinmux_config_regs,
2221 .data_regs = pinmux_data_regs,
2222
2223 .gpio_data = pinmux_data,
2224 .gpio_data_size = ARRAY_SIZE(pinmux_data),
2225};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7734.c b/drivers/pinctrl/sh-pfc/pfc-sh7734.c
new file mode 100644
index 000000000000..23d76d262c32
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7734.c
@@ -0,0 +1,2475 @@
1/*
2 * SH7734 processor support - PFC hardware block
3 *
4 * Copyright (C) 2012 Renesas Solutions Corp.
5 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <cpu/sh7734.h>
14
15#include "sh_pfc.h"
16
17#define CPU_32_PORT(fn, pfx, sfx) \
18 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
19 PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \
20 PORT_1(fn, pfx##31, sfx)
21
22#define CPU_32_PORT5(fn, pfx, sfx) \
23 PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \
24 PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \
25 PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \
26 PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \
27 PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx), \
28 PORT_1(fn, pfx##10, sfx), PORT_1(fn, pfx##11, sfx)
29
30/* GPSR0 - GPSR5 */
31#define CPU_ALL_PORT(fn, pfx, sfx) \
32 CPU_32_PORT(fn, pfx##_0_, sfx), \
33 CPU_32_PORT(fn, pfx##_1_, sfx), \
34 CPU_32_PORT(fn, pfx##_2_, sfx), \
35 CPU_32_PORT(fn, pfx##_3_, sfx), \
36 CPU_32_PORT(fn, pfx##_4_, sfx), \
37 CPU_32_PORT5(fn, pfx##_5_, sfx)
38
39#define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
40#define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \
41 GP##pfx##_IN, GP##pfx##_OUT)
42
43#define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT
44#define _GP_INDT(pfx, sfx) GP##pfx##_DATA
45
46#define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str)
47#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused)
48#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused)
49
50#define PORT_10_REV(fn, pfx, sfx) \
51 PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \
52 PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \
53 PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \
54 PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \
55 PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
56
57#define CPU_32_PORT_REV(fn, pfx, sfx) \
58 PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \
59 PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \
60 PORT_10_REV(fn, pfx, sfx)
61
62#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused)
63#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused)
64
65#define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
66#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
67 FN_##ipsr, FN_##fn)
68
69enum {
70 PINMUX_RESERVED = 0,
71
72 PINMUX_DATA_BEGIN,
73 GP_ALL(DATA), /* GP_0_0_DATA -> GP_5_11_DATA */
74 PINMUX_DATA_END,
75
76 PINMUX_INPUT_BEGIN,
77 GP_ALL(IN), /* GP_0_0_IN -> GP_5_11_IN */
78 PINMUX_INPUT_END,
79
80 PINMUX_OUTPUT_BEGIN,
81 GP_ALL(OUT), /* GP_0_0_OUT -> GP_5_11_OUT */
82 PINMUX_OUTPUT_END,
83
84 PINMUX_FUNCTION_BEGIN,
85 GP_ALL(FN), /* GP_0_0_FN -> GP_5_11_FN */
86
87 /* GPSR0 */
88 FN_IP1_9_8, FN_IP1_11_10, FN_IP1_13_12, FN_IP1_15_14,
89 FN_IP0_7_6, FN_IP0_9_8, FN_IP0_11_10, FN_IP0_13_12,
90 FN_IP0_15_14, FN_IP0_17_16, FN_IP0_19_18, FN_IP0_21_20,
91 FN_IP0_23_22, FN_IP0_25_24, FN_IP0_27_26, FN_IP0_29_28,
92 FN_IP0_31_30, FN_IP1_1_0, FN_IP1_3_2, FN_IP1_5_4,
93 FN_IP1_7_6, FN_IP11_28, FN_IP0_1_0, FN_IP0_3_2,
94 FN_IP0_5_4, FN_IP1_17_16, FN_IP1_19_18, FN_IP1_22_20,
95 FN_IP1_25_23, FN_IP1_28_26, FN_IP1_31_29, FN_IP2_2_0,
96
97 /* GPSR1 */
98 FN_IP3_20, FN_IP3_29_27, FN_IP11_20_19, FN_IP11_22_21,
99 FN_IP2_16_14, FN_IP2_19_17, FN_IP2_22_20, FN_IP2_24_23,
100 FN_IP2_27_25, FN_IP2_30_28, FN_IP3_1_0, FN_CLKOUT,
101 FN_BS, FN_CS0, FN_IP3_2, FN_EX_CS0,
102 FN_IP3_5_3, FN_IP3_8_6, FN_IP3_11_9, FN_IP3_14_12,
103 FN_IP3_17_15, FN_RD, FN_IP3_19_18, FN_WE0,
104 FN_WE1, FN_IP2_4_3, FN_IP3_23_21, FN_IP3_26_24,
105 FN_IP2_7_5, FN_IP2_10_8, FN_IP2_13_11, FN_IP11_25_23,
106
107 /* GPSR2 */
108 FN_IP11_6_4, FN_IP11_9_7, FN_IP11_11_10, FN_IP4_2_0,
109 FN_IP8_29_28, FN_IP11_27_26, FN_IP8_22_20, FN_IP8_25_23,
110 FN_IP11_12, FN_IP8_27_26, FN_IP4_5_3, FN_IP4_8_6,
111 FN_IP4_11_9, FN_IP4_14_12, FN_IP4_17_15, FN_IP4_19_18,
112 FN_IP4_21_20, FN_IP4_23_22, FN_IP4_25_24, FN_IP4_27_26,
113 FN_IP4_29_28, FN_IP4_31_30, FN_IP5_2_0, FN_IP5_5_3,
114 FN_IP5_8_6, FN_IP5_11_9, FN_IP5_14_12, FN_IP5_17_15,
115 FN_IP5_20_18, FN_IP5_22_21, FN_IP5_24_23, FN_IP5_26_25,
116
117 /* GPSR3 */
118 FN_IP6_2_0, FN_IP6_5_3, FN_IP6_7_6, FN_IP6_9_8,
119 FN_IP6_11_10, FN_IP6_13_12, FN_IP6_15_14, FN_IP6_17_16,
120 FN_IP6_20_18, FN_IP6_23_21, FN_IP7_2_0, FN_IP7_5_3,
121 FN_IP7_8_6, FN_IP7_11_9, FN_IP7_14_12, FN_IP7_17_15,
122 FN_IP7_20_18, FN_IP7_23_21, FN_IP7_26_24, FN_IP7_28_27,
123 FN_IP7_30_29, FN_IP8_1_0, FN_IP8_3_2, FN_IP8_5_4,
124 FN_IP8_7_6, FN_IP8_9_8, FN_IP8_11_10, FN_IP8_13_12,
125 FN_IP8_15_14, FN_IP8_17_16, FN_IP8_19_18, FN_IP9_1_0,
126
127 /* GPSR4 */
128 FN_IP9_19_18, FN_IP9_21_20, FN_IP9_23_22, FN_IP9_25_24,
129 FN_IP9_11_10, FN_IP9_13_12, FN_IP9_15_14, FN_IP9_17_16,
130 FN_IP9_3_2, FN_IP9_5_4, FN_IP9_7_6, FN_IP9_9_8,
131 FN_IP9_27_26, FN_IP9_29_28, FN_IP10_2_0, FN_IP10_5_3,
132 FN_IP10_8_6, FN_IP10_11_9, FN_IP10_14_12, FN_IP10_15,
133 FN_IP10_18_16, FN_IP10_21_19, FN_IP11_0, FN_IP11_1,
134 FN_SCL0, FN_IP11_2, FN_PENC0, FN_IP11_15_13, /* Need check*/
135 FN_USB_OVC0, FN_IP11_18_16,
136 FN_IP10_22, FN_IP10_24_23,
137
138 /* GPSR5 */
139 FN_IP10_25, FN_IP11_3, FN_IRQ2_B, FN_IRQ3_B,
140 FN_IP10_27_26, /* 10 */
141 FN_IP10_29_28, /* 11 */
142
143 /* IPSR0 */
144 FN_A15, FN_ST0_VCO_CLKIN, FN_LCD_DATA15_A, FN_TIOC3D_C,
145 FN_A14, FN_LCD_DATA14_A, FN_TIOC3C_C,
146 FN_A13, FN_LCD_DATA13_A, FN_TIOC3B_C,
147 FN_A12, FN_LCD_DATA12_A, FN_TIOC3A_C,
148 FN_A11, FN_ST0_D7, FN_LCD_DATA11_A, FN_TIOC2B_C,
149 FN_A10, FN_ST0_D6, FN_LCD_DATA10_A, FN_TIOC2A_C,
150 FN_A9, FN_ST0_D5, FN_LCD_DATA9_A, FN_TIOC1B_C,
151 FN_A8, FN_ST0_D4, FN_LCD_DATA8_A, FN_TIOC1A_C,
152 FN_A7, FN_ST0_D3, FN_LCD_DATA7_A, FN_TIOC0D_C,
153 FN_A6, FN_ST0_D2, FN_LCD_DATA6_A, FN_TIOC0C_C,
154 FN_A5, FN_ST0_D1, FN_LCD_DATA5_A, FN_TIOC0B_C,
155 FN_A4, FN_ST0_D0, FN_LCD_DATA4_A, FN_TIOC0A_C,
156 FN_A3, FN_ST0_VLD, FN_LCD_DATA3_A, FN_TCLKD_C,
157 FN_A2, FN_ST0_SYC, FN_LCD_DATA2_A, FN_TCLKC_C,
158 FN_A1, FN_ST0_REQ, FN_LCD_DATA1_A, FN_TCLKB_C,
159 FN_A0, FN_ST0_CLKIN, FN_LCD_DATA0_A, FN_TCLKA_C,
160
161 /* IPSR1 */
162 FN_D3, FN_SD0_DAT3_A, FN_MMC_D3_A, FN_ST1_D6, FN_FD3_A,
163 FN_D2, FN_SD0_DAT2_A, FN_MMC_D2_A, FN_ST1_D5, FN_FD2_A,
164 FN_D1, FN_SD0_DAT1_A, FN_MMC_D1_A, FN_ST1_D4, FN_FD1_A,
165 FN_D0, FN_SD0_DAT0_A, FN_MMC_D0_A, FN_ST1_D3, FN_FD0_A,
166 FN_A25, FN_TX2_D, FN_ST1_D2,
167 FN_A24, FN_RX2_D, FN_ST1_D1,
168 FN_A23, FN_ST1_D0, FN_LCD_M_DISP_A,
169 FN_A22, FN_ST1_VLD, FN_LCD_VEPWC_A,
170 FN_A21, FN_ST1_SYC, FN_LCD_VCPWC_A,
171 FN_A20, FN_ST1_REQ, FN_LCD_FLM_A,
172 FN_A19, FN_ST1_CLKIN, FN_LCD_CLK_A, FN_TIOC4D_C,
173 FN_A18, FN_ST1_PWM, FN_LCD_CL2_A, FN_TIOC4C_C,
174 FN_A17, FN_ST1_VCO_CLKIN, FN_LCD_CL1_A, FN_TIOC4B_C,
175 FN_A16, FN_ST0_PWM, FN_LCD_DON_A, FN_TIOC4A_C,
176
177 /* IPSR2 */
178 FN_D14, FN_TX2_B, FN_FSE_A, FN_ET0_TX_CLK_B,
179 FN_D13, FN_RX2_B, FN_FRB_A, FN_ET0_ETXD6_B,
180 FN_D12, FN_FWE_A, FN_ET0_ETXD5_B,
181 FN_D11, FN_RSPI_MISO_A, FN_QMI_QIO1_A, FN_FRE_A,
182 FN_ET0_ETXD3_B,
183 FN_D10, FN_RSPI_MOSI_A, FN_QMO_QIO0_A, FN_FALE_A,
184 FN_ET0_ETXD2_B,
185 FN_D9, FN_SD0_CMD_A, FN_MMC_CMD_A, FN_QIO3_A, FN_FCLE_A,
186 FN_ET0_ETXD1_B,
187 FN_D8, FN_SD0_CLK_A, FN_MMC_CLK_A, FN_QIO2_A, FN_FCE_A,
188 FN_ET0_GTX_CLK_B,
189 FN_D7, FN_RSPI_SSL_A, FN_MMC_D7_A, FN_QSSL_A, FN_FD7_A,
190 FN_D6, FN_RSPI_RSPCK_A, FN_MMC_D6_A, FN_QSPCLK_A, FN_FD6_A,
191 FN_D5, FN_SD0_WP_A, FN_MMC_D5_A, FN_FD5_A,
192 FN_D4, FN_SD0_CD_A, FN_MMC_D4_A, FN_ST1_D7, FN_FD4_A,
193
194 /* IPSR3 */
195 FN_DRACK0, FN_SD1_DAT2_A, FN_ATAG, FN_TCLK1_A, FN_ET0_ETXD7,
196 FN_EX_WAIT2, FN_SD1_DAT1_A, FN_DACK2, FN_CAN1_RX_C,
197 FN_ET0_MAGIC_C, FN_ET0_ETXD6_A,
198 FN_EX_WAIT1, FN_SD1_DAT0_A, FN_DREQ2, FN_CAN1_TX_C,
199 FN_ET0_LINK_C, FN_ET0_ETXD5_A,
200 FN_EX_WAIT0, FN_TCLK1_B,
201 FN_RD_WR, FN_TCLK0, FN_CAN_CLK_B, FN_ET0_ETXD4,
202 FN_EX_CS5, FN_SD1_CMD_A, FN_ATADIR, FN_QSSL_B, FN_ET0_ETXD3_A,
203 FN_EX_CS4, FN_SD1_WP_A, FN_ATAWR, FN_QMI_QIO1_B, FN_ET0_ETXD2_A,
204 FN_EX_CS3, FN_SD1_CD_A, FN_ATARD, FN_QMO_QIO0_B, FN_ET0_ETXD1_A,
205 FN_EX_CS2, FN_TX3_B, FN_ATACS1, FN_QSPCLK_B, FN_ET0_GTX_CLK_A,
206 FN_EX_CS1, FN_RX3_B, FN_ATACS0, FN_QIO2_B, FN_ET0_ETXD0,
207 FN_CS1_A26, FN_QIO3_B,
208 FN_D15, FN_SCK2_B,
209
210 /* IPSR4 */
211 FN_SCK2_A, FN_VI0_G3,
212 FN_RTS1_B, FN_VI0_G2,
213 FN_CTS1_B, FN_VI0_DATA7_VI0_G1,
214 FN_TX1_B, FN_VI0_DATA6_VI0_G0, FN_ET0_PHY_INT_A,
215 FN_RX1_B, FN_VI0_DATA5_VI0_B5, FN_ET0_MAGIC_A,
216 FN_SCK1_B, FN_VI0_DATA4_VI0_B4, FN_ET0_LINK_A,
217 FN_RTS0_B, FN_VI0_DATA3_VI0_B3, FN_ET0_MDIO_A,
218 FN_CTS0_B, FN_VI0_DATA2_VI0_B2, FN_RMII0_MDIO_A, FN_ET0_MDC,
219 FN_HTX0_A, FN_TX1_A, FN_VI0_DATA1_VI0_B1, FN_RMII0_MDC_A, FN_ET0_COL,
220 FN_HRX0_A, FN_RX1_A, FN_VI0_DATA0_VI0_B0, FN_RMII0_CRS_DV_A, FN_ET0_CRS,
221 FN_HSCK0_A, FN_SCK1_A, FN_VI0_VSYNC, FN_RMII0_RX_ER_A, FN_ET0_RX_ER,
222 FN_HRTS0_A, FN_RTS1_A, FN_VI0_HSYNC, FN_RMII0_TXD_EN_A, FN_ET0_RX_DV,
223 FN_HCTS0_A, FN_CTS1_A, FN_VI0_FIELD, FN_RMII0_RXD1_A, FN_ET0_ERXD7,
224
225 /* IPSR5 */
226 FN_SD2_CLK_A, FN_RX2_A, FN_VI0_G4, FN_ET0_RX_CLK_B,
227 FN_SD2_CMD_A, FN_TX2_A, FN_VI0_G5, FN_ET0_ERXD2_B,
228 FN_SD2_DAT0_A, FN_RX3_A, FN_VI0_R0, FN_ET0_ERXD3_B,
229 FN_SD2_DAT1_A, FN_TX3_A, FN_VI0_R1, FN_ET0_MDIO_B,
230 FN_SD2_DAT2_A, FN_RX4_A, FN_VI0_R2, FN_ET0_LINK_B,
231 FN_SD2_DAT3_A, FN_TX4_A, FN_VI0_R3, FN_ET0_MAGIC_B,
232 FN_SD2_CD_A, FN_RX5_A, FN_VI0_R4, FN_ET0_PHY_INT_B,
233 FN_SD2_WP_A, FN_TX5_A, FN_VI0_R5,
234 FN_REF125CK, FN_ADTRG, FN_RX5_C,
235 FN_REF50CK, FN_CTS1_E, FN_HCTS0_D,
236
237 /* IPSR6 */
238 FN_DU0_DR0, FN_SCIF_CLK_B, FN_HRX0_D, FN_IETX_A, FN_TCLKA_A, FN_HIFD00,
239 FN_DU0_DR1, FN_SCK0_B, FN_HTX0_D, FN_IERX_A, FN_TCLKB_A, FN_HIFD01,
240 FN_DU0_DR2, FN_RX0_B, FN_TCLKC_A, FN_HIFD02,
241 FN_DU0_DR3, FN_TX0_B, FN_TCLKD_A, FN_HIFD03,
242 FN_DU0_DR4, FN_CTS0_C, FN_TIOC0A_A, FN_HIFD04,
243 FN_DU0_DR5, FN_RTS0_C, FN_TIOC0B_A, FN_HIFD05,
244 FN_DU0_DR6, FN_SCK1_C, FN_TIOC0C_A, FN_HIFD06,
245 FN_DU0_DR7, FN_RX1_C, FN_TIOC0D_A, FN_HIFD07,
246 FN_DU0_DG0, FN_TX1_C, FN_HSCK0_D, FN_IECLK_A, FN_TIOC1A_A, FN_HIFD08,
247 FN_DU0_DG1, FN_CTS1_C, FN_HRTS0_D, FN_TIOC1B_A, FN_HIFD09,
248
249 /* IPSR7 */
250 FN_DU0_DG2, FN_RTS1_C, FN_RMII0_MDC_B, FN_TIOC2A_A, FN_HIFD10,
251 FN_DU0_DG3, FN_SCK2_C, FN_RMII0_MDIO_B, FN_TIOC2B_A, FN_HIFD11,
252 FN_DU0_DG4, FN_RX2_C, FN_RMII0_CRS_DV_B, FN_TIOC3A_A, FN_HIFD12,
253 FN_DU0_DG5, FN_TX2_C, FN_RMII0_RX_ER_B, FN_TIOC3B_A, FN_HIFD13,
254 FN_DU0_DG6, FN_RX3_C, FN_RMII0_RXD0_B, FN_TIOC3C_A, FN_HIFD14,
255 FN_DU0_DG7, FN_TX3_C, FN_RMII0_RXD1_B, FN_TIOC3D_A, FN_HIFD15,
256 FN_DU0_DB0, FN_RX4_C, FN_RMII0_TXD_EN_B, FN_TIOC4A_A, FN_HIFCS,
257 FN_DU0_DB1, FN_TX4_C, FN_RMII0_TXD0_B, FN_TIOC4B_A, FN_HIFRS,
258 FN_DU0_DB2, FN_RX5_B, FN_RMII0_TXD1_B, FN_TIOC4C_A, FN_HIFWR,
259 FN_DU0_DB3, FN_TX5_B, FN_TIOC4D_A, FN_HIFRD,
260 FN_DU0_DB4, FN_HIFINT,
261
262 /* IPSR8 */
263 FN_DU0_DB5, FN_HIFDREQ,
264 FN_DU0_DB6, FN_HIFRDY,
265 FN_DU0_DB7, FN_SSI_SCK0_B, FN_HIFEBL_B,
266 FN_DU0_DOTCLKIN, FN_HSPI_CS0_C, FN_SSI_WS0_B,
267 FN_DU0_DOTCLKOUT, FN_HSPI_CLK0_C, FN_SSI_SDATA0_B,
268 FN_DU0_EXHSYNC_DU0_HSYNC, FN_HSPI_TX0_C, FN_SSI_SCK1_B,
269 FN_DU0_EXVSYNC_DU0_VSYNC, FN_HSPI_RX0_C, FN_SSI_WS1_B,
270 FN_DU0_EXODDF_DU0_ODDF, FN_CAN0_RX_B, FN_HSCK0_B, FN_SSI_SDATA1_B,
271 FN_DU0_DISP, FN_CAN0_TX_B, FN_HRX0_B, FN_AUDIO_CLKA_B,
272 FN_DU0_CDE, FN_HTX0_B, FN_AUDIO_CLKB_B, FN_LCD_VCPWC_B,
273 FN_IRQ0_A, FN_HSPI_TX_B, FN_RX3_E, FN_ET0_ERXD0,
274 FN_IRQ1_A, FN_HSPI_RX_B, FN_TX3_E, FN_ET0_ERXD1,
275 FN_IRQ2_A, FN_CTS0_A, FN_HCTS0_B, FN_ET0_ERXD2_A,
276 FN_IRQ3_A, FN_RTS0_A, FN_HRTS0_B, FN_ET0_ERXD3_A,
277
278 /* IPSR9 */
279 FN_VI1_CLK_A, FN_FD0_B, FN_LCD_DATA0_B,
280 FN_VI1_0_A, FN_FD1_B, FN_LCD_DATA1_B,
281 FN_VI1_1_A, FN_FD2_B, FN_LCD_DATA2_B,
282 FN_VI1_2_A, FN_FD3_B, FN_LCD_DATA3_B,
283 FN_VI1_3_A, FN_FD4_B, FN_LCD_DATA4_B,
284 FN_VI1_4_A, FN_FD5_B, FN_LCD_DATA5_B,
285 FN_VI1_5_A, FN_FD6_B, FN_LCD_DATA6_B,
286 FN_VI1_6_A, FN_FD7_B, FN_LCD_DATA7_B,
287 FN_VI1_7_A, FN_FCE_B, FN_LCD_DATA8_B,
288 FN_SSI_SCK0_A, FN_TIOC1A_B, FN_LCD_DATA9_B,
289 FN_SSI_WS0_A, FN_TIOC1B_B, FN_LCD_DATA10_B,
290 FN_SSI_SDATA0_A, FN_VI1_0_B, FN_TIOC2A_B, FN_LCD_DATA11_B,
291 FN_SSI_SCK1_A, FN_VI1_1_B, FN_TIOC2B_B, FN_LCD_DATA12_B,
292 FN_SSI_WS1_A, FN_VI1_2_B, FN_LCD_DATA13_B,
293 FN_SSI_SDATA1_A, FN_VI1_3_B, FN_LCD_DATA14_B,
294
295 /* IPSR10 */
296 FN_SSI_SCK23, FN_VI1_4_B, FN_RX1_D, FN_FCLE_B, FN_LCD_DATA15_B,
297 FN_SSI_WS23, FN_VI1_5_B, FN_TX1_D, FN_HSCK0_C, FN_FALE_B, FN_LCD_DON_B,
298 FN_SSI_SDATA2, FN_VI1_6_B, FN_HRX0_C, FN_FRE_B, FN_LCD_CL1_B,
299 FN_SSI_SDATA3, FN_VI1_7_B, FN_HTX0_C, FN_FWE_B, FN_LCD_CL2_B,
300 FN_AUDIO_CLKA_A, FN_VI1_CLK_B, FN_SCK1_D, FN_IECLK_B, FN_LCD_FLM_B,
301 FN_AUDIO_CLKB_A, FN_LCD_CLK_B,
302 FN_AUDIO_CLKC, FN_SCK1_E, FN_HCTS0_C, FN_FRB_B, FN_LCD_VEPWC_B,
303 FN_AUDIO_CLKOUT, FN_TX1_E, FN_HRTS0_C, FN_FSE_B, FN_LCD_M_DISP_B,
304 FN_CAN_CLK_A, FN_RX4_D,
305 FN_CAN0_TX_A, FN_TX4_D, FN_MLB_CLK,
306 FN_CAN1_RX_A, FN_IRQ1_B,
307 FN_CAN0_RX_A, FN_IRQ0_B, FN_MLB_SIG,
308 FN_CAN1_TX_A, FN_TX5_C, FN_MLB_DAT,
309
310 /* IPSR11 */
311 FN_SCL1, FN_SCIF_CLK_C,
312 FN_SDA1, FN_RX1_E,
313 FN_SDA0, FN_HIFEBL_A,
314 FN_SDSELF, FN_RTS1_E,
315 FN_SCIF_CLK_A, FN_HSPI_CLK_A, FN_VI0_CLK, FN_RMII0_TXD0_A, FN_ET0_ERXD4,
316 FN_SCK0_A, FN_HSPI_CS_A, FN_VI0_CLKENB, FN_RMII0_TXD1_A, FN_ET0_ERXD5,
317 FN_RX0_A, FN_HSPI_RX_A, FN_RMII0_RXD0_A, FN_ET0_ERXD6,
318 FN_TX0_A, FN_HSPI_TX_A,
319 FN_PENC1, FN_TX3_D, FN_CAN1_TX_B, FN_TX5_D, FN_IETX_B,
320 FN_USB_OVC1, FN_RX3_D, FN_CAN1_RX_B, FN_RX5_D, FN_IERX_B,
321 FN_DREQ0, FN_SD1_CLK_A, FN_ET0_TX_EN,
322 FN_DACK0, FN_SD1_DAT3_A, FN_ET0_TX_ER,
323 FN_DREQ1, FN_HSPI_CLK_B, FN_RX4_B, FN_ET0_PHY_INT_C, FN_ET0_TX_CLK_A,
324 FN_DACK1, FN_HSPI_CS_B, FN_TX4_B, FN_ET0_RX_CLK_A,
325 FN_PRESETOUT, FN_ST_CLKOUT,
326
327 /* MOD_SEL1 */
328 FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,
329 FN_SEL_RQSPI_0, FN_SEL_RQSPI_1,
330 FN_SEL_VIN1_0, FN_SEL_VIN1_1,
331 FN_SEL_HIF_0, FN_SEL_HIF_1,
332 FN_SEL_RSPI_0, FN_SEL_RSPI_1,
333 FN_SEL_LCDC_0, FN_SEL_LCDC_1,
334 FN_SEL_ET0_CTL_0, FN_SEL_ET0_CTL_1, FN_SEL_ET0_CTL_2,
335 FN_SEL_ET0_0, FN_SEL_ET0_1,
336 FN_SEL_RMII_0, FN_SEL_RMII_1,
337 FN_SEL_TMU_0, FN_SEL_TMU_1,
338 FN_SEL_HSPI_0, FN_SEL_HSPI_1, FN_SEL_HSPI_2,
339 FN_SEL_HSCIF_0, FN_SEL_HSCIF_1, FN_SEL_HSCIF_2, FN_SEL_HSCIF_3,
340 FN_SEL_RCAN_CLK_0, FN_SEL_RCAN_CLK_1,
341 FN_SEL_RCAN1_0, FN_SEL_RCAN1_1, FN_SEL_RCAN1_2,
342 FN_SEL_RCAN0_0, FN_SEL_RCAN0_1,
343 FN_SEL_SDHI2_0, FN_SEL_SDHI2_1,
344 FN_SEL_SDHI1_0, FN_SEL_SDHI1_1,
345 FN_SEL_SDHI0_0, FN_SEL_SDHI0_1,
346 FN_SEL_SSI1_0, FN_SEL_SSI1_1,
347 FN_SEL_SSI0_0, FN_SEL_SSI0_1,
348 FN_SEL_AUDIO_CLKB_0, FN_SEL_AUDIO_CLKB_1,
349 FN_SEL_AUDIO_CLKA_0, FN_SEL_AUDIO_CLKA_1,
350 FN_SEL_FLCTL_0, FN_SEL_FLCTL_1,
351 FN_SEL_MMC_0, FN_SEL_MMC_1,
352 FN_SEL_INTC_0, FN_SEL_INTC_1,
353
354 /* MOD_SEL2 */
355 FN_SEL_MTU2_CLK_0, FN_SEL_MTU2_CLK_1,
356 FN_SEL_MTU2_CH4_0, FN_SEL_MTU2_CH4_1,
357 FN_SEL_MTU2_CH3_0, FN_SEL_MTU2_CH3_1,
358 FN_SEL_MTU2_CH2_0, FN_SEL_MTU2_CH2_1, FN_SEL_MTU2_CH2_2,
359 FN_SEL_MTU2_CH1_0, FN_SEL_MTU2_CH1_1, FN_SEL_MTU2_CH1_2,
360 FN_SEL_MTU2_CH0_0, FN_SEL_MTU2_CH0_1,
361 FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,
362 FN_SEL_SCIF5_2, FN_SEL_SCIF5_3,
363 FN_SEL_SCIF4_0, FN_SEL_SCIF4_1,
364 FN_SEL_SCIF4_2, FN_SEL_SCIF4_3,
365 FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2,
366 FN_SEL_SCIF3_3, FN_SEL_SCIF3_4,
367 FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2,
368 FN_SEL_SCIF2_3,
369 FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2,
370 FN_SEL_SCIF1_3, FN_SEL_SCIF1_4,
371 FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2,
372 FN_SEL_SCIF_CLK_0, FN_SEL_SCIF_CLK_1, FN_SEL_SCIF_CLK_2,
373
374 PINMUX_FUNCTION_END,
375
376 PINMUX_MARK_BEGIN,
377
378 CLKOUT_MARK, BS_MARK, CS0_MARK, EX_CS0_MARK, RD_MARK,
379 WE0_MARK, WE1_MARK,
380
381 SCL0_MARK, PENC0_MARK, USB_OVC0_MARK,
382
383 IRQ2_B_MARK, IRQ3_B_MARK,
384
385 /* IPSR0 */
386 A15_MARK, ST0_VCO_CLKIN_MARK, LCD_DATA15_A_MARK, TIOC3D_C_MARK,
387 A14_MARK, LCD_DATA14_A_MARK, TIOC3C_C_MARK,
388 A13_MARK, LCD_DATA13_A_MARK, TIOC3B_C_MARK,
389 A12_MARK, LCD_DATA12_A_MARK, TIOC3A_C_MARK,
390 A11_MARK, ST0_D7_MARK, LCD_DATA11_A_MARK, TIOC2B_C_MARK,
391 A10_MARK, ST0_D6_MARK, LCD_DATA10_A_MARK, TIOC2A_C_MARK,
392 A9_MARK, ST0_D5_MARK, LCD_DATA9_A_MARK, TIOC1B_C_MARK,
393 A8_MARK, ST0_D4_MARK, LCD_DATA8_A_MARK, TIOC1A_C_MARK,
394 A7_MARK, ST0_D3_MARK, LCD_DATA7_A_MARK, TIOC0D_C_MARK,
395 A6_MARK, ST0_D2_MARK, LCD_DATA6_A_MARK, TIOC0C_C_MARK,
396 A5_MARK, ST0_D1_MARK, LCD_DATA5_A_MARK, TIOC0B_C_MARK,
397 A4_MARK, ST0_D0_MARK, LCD_DATA4_A_MARK, TIOC0A_C_MARK,
398 A3_MARK, ST0_VLD_MARK, LCD_DATA3_A_MARK, TCLKD_C_MARK,
399 A2_MARK, ST0_SYC_MARK, LCD_DATA2_A_MARK, TCLKC_C_MARK,
400 A1_MARK, ST0_REQ_MARK, LCD_DATA1_A_MARK, TCLKB_C_MARK,
401 A0_MARK, ST0_CLKIN_MARK, LCD_DATA0_A_MARK, TCLKA_C_MARK,
402
403 /* IPSR1 */
404 D3_MARK, SD0_DAT3_A_MARK, MMC_D3_A_MARK, ST1_D6_MARK, FD3_A_MARK,
405 D2_MARK, SD0_DAT2_A_MARK, MMC_D2_A_MARK, ST1_D5_MARK, FD2_A_MARK,
406 D1_MARK, SD0_DAT1_A_MARK, MMC_D1_A_MARK, ST1_D4_MARK, FD1_A_MARK,
407 D0_MARK, SD0_DAT0_A_MARK, MMC_D0_A_MARK, ST1_D3_MARK, FD0_A_MARK,
408 A25_MARK, TX2_D_MARK, ST1_D2_MARK,
409 A24_MARK, RX2_D_MARK, ST1_D1_MARK,
410 A23_MARK, ST1_D0_MARK, LCD_M_DISP_A_MARK,
411 A22_MARK, ST1_VLD_MARK, LCD_VEPWC_A_MARK,
412 A21_MARK, ST1_SYC_MARK, LCD_VCPWC_A_MARK,
413 A20_MARK, ST1_REQ_MARK, LCD_FLM_A_MARK,
414 A19_MARK, ST1_CLKIN_MARK, LCD_CLK_A_MARK, TIOC4D_C_MARK,
415 A18_MARK, ST1_PWM_MARK, LCD_CL2_A_MARK, TIOC4C_C_MARK,
416 A17_MARK, ST1_VCO_CLKIN_MARK, LCD_CL1_A_MARK, TIOC4B_C_MARK,
417 A16_MARK, ST0_PWM_MARK, LCD_DON_A_MARK, TIOC4A_C_MARK,
418
419 /* IPSR2 */
420 D14_MARK, TX2_B_MARK, FSE_A_MARK, ET0_TX_CLK_B_MARK,
421 D13_MARK, RX2_B_MARK, FRB_A_MARK, ET0_ETXD6_B_MARK,
422 D12_MARK, FWE_A_MARK, ET0_ETXD5_B_MARK,
423 D11_MARK, RSPI_MISO_A_MARK, QMI_QIO1_A_MARK, FRE_A_MARK,
424 ET0_ETXD3_B_MARK,
425 D10_MARK, RSPI_MOSI_A_MARK, QMO_QIO0_A_MARK, FALE_A_MARK,
426 ET0_ETXD2_B_MARK,
427 D9_MARK, SD0_CMD_A_MARK, MMC_CMD_A_MARK, QIO3_A_MARK,
428 FCLE_A_MARK, ET0_ETXD1_B_MARK,
429 D8_MARK, SD0_CLK_A_MARK, MMC_CLK_A_MARK, QIO2_A_MARK,
430 FCE_A_MARK, ET0_GTX_CLK_B_MARK,
431 D7_MARK, RSPI_SSL_A_MARK, MMC_D7_A_MARK, QSSL_A_MARK,
432 FD7_A_MARK,
433 D6_MARK, RSPI_RSPCK_A_MARK, MMC_D6_A_MARK, QSPCLK_A_MARK,
434 FD6_A_MARK,
435 D5_MARK, SD0_WP_A_MARK, MMC_D5_A_MARK, FD5_A_MARK,
436 D4_MARK, SD0_CD_A_MARK, MMC_D4_A_MARK, ST1_D7_MARK,
437 FD4_A_MARK,
438
439 /* IPSR3 */
440 DRACK0_MARK, SD1_DAT2_A_MARK, ATAG_MARK, TCLK1_A_MARK, ET0_ETXD7_MARK,
441 EX_WAIT2_MARK, SD1_DAT1_A_MARK, DACK2_MARK, CAN1_RX_C_MARK,
442 ET0_MAGIC_C_MARK, ET0_ETXD6_A_MARK,
443 EX_WAIT1_MARK, SD1_DAT0_A_MARK, DREQ2_MARK, CAN1_TX_C_MARK,
444 ET0_LINK_C_MARK, ET0_ETXD5_A_MARK,
445 EX_WAIT0_MARK, TCLK1_B_MARK,
446 RD_WR_MARK, TCLK0_MARK, CAN_CLK_B_MARK, ET0_ETXD4_MARK,
447 EX_CS5_MARK, SD1_CMD_A_MARK, ATADIR_MARK, QSSL_B_MARK,
448 ET0_ETXD3_A_MARK,
449 EX_CS4_MARK, SD1_WP_A_MARK, ATAWR_MARK, QMI_QIO1_B_MARK,
450 ET0_ETXD2_A_MARK,
451 EX_CS3_MARK, SD1_CD_A_MARK, ATARD_MARK, QMO_QIO0_B_MARK,
452 ET0_ETXD1_A_MARK,
453 EX_CS2_MARK, TX3_B_MARK, ATACS1_MARK, QSPCLK_B_MARK,
454 ET0_GTX_CLK_A_MARK,
455 EX_CS1_MARK, RX3_B_MARK, ATACS0_MARK, QIO2_B_MARK,
456 ET0_ETXD0_MARK,
457 CS1_A26_MARK, QIO3_B_MARK,
458 D15_MARK, SCK2_B_MARK,
459
460 /* IPSR4 */
461 SCK2_A_MARK, VI0_G3_MARK,
462 RTS1_B_MARK, VI0_G2_MARK,
463 CTS1_B_MARK, VI0_DATA7_VI0_G1_MARK,
464 TX1_B_MARK, VI0_DATA6_VI0_G0_MARK, ET0_PHY_INT_A_MARK,
465 RX1_B_MARK, VI0_DATA5_VI0_B5_MARK, ET0_MAGIC_A_MARK,
466 SCK1_B_MARK, VI0_DATA4_VI0_B4_MARK, ET0_LINK_A_MARK,
467 RTS0_B_MARK, VI0_DATA3_VI0_B3_MARK, ET0_MDIO_A_MARK,
468 CTS0_B_MARK, VI0_DATA2_VI0_B2_MARK, RMII0_MDIO_A_MARK,
469 ET0_MDC_MARK,
470 HTX0_A_MARK, TX1_A_MARK, VI0_DATA1_VI0_B1_MARK,
471 RMII0_MDC_A_MARK, ET0_COL_MARK,
472 HRX0_A_MARK, RX1_A_MARK, VI0_DATA0_VI0_B0_MARK,
473 RMII0_CRS_DV_A_MARK, ET0_CRS_MARK,
474 HSCK0_A_MARK, SCK1_A_MARK, VI0_VSYNC_MARK,
475 RMII0_RX_ER_A_MARK, ET0_RX_ER_MARK,
476 HRTS0_A_MARK, RTS1_A_MARK, VI0_HSYNC_MARK,
477 RMII0_TXD_EN_A_MARK, ET0_RX_DV_MARK,
478 HCTS0_A_MARK, CTS1_A_MARK, VI0_FIELD_MARK,
479 RMII0_RXD1_A_MARK, ET0_ERXD7_MARK,
480
481 /* IPSR5 */
482 SD2_CLK_A_MARK, RX2_A_MARK, VI0_G4_MARK, ET0_RX_CLK_B_MARK,
483 SD2_CMD_A_MARK, TX2_A_MARK, VI0_G5_MARK, ET0_ERXD2_B_MARK,
484 SD2_DAT0_A_MARK, RX3_A_MARK, VI0_R0_MARK, ET0_ERXD3_B_MARK,
485 SD2_DAT1_A_MARK, TX3_A_MARK, VI0_R1_MARK, ET0_MDIO_B_MARK,
486 SD2_DAT2_A_MARK, RX4_A_MARK, VI0_R2_MARK, ET0_LINK_B_MARK,
487 SD2_DAT3_A_MARK, TX4_A_MARK, VI0_R3_MARK, ET0_MAGIC_B_MARK,
488 SD2_CD_A_MARK, RX5_A_MARK, VI0_R4_MARK, ET0_PHY_INT_B_MARK,
489 SD2_WP_A_MARK, TX5_A_MARK, VI0_R5_MARK,
490 REF125CK_MARK, ADTRG_MARK, RX5_C_MARK,
491 REF50CK_MARK, CTS1_E_MARK, HCTS0_D_MARK,
492
493 /* IPSR6 */
494 DU0_DR0_MARK, SCIF_CLK_B_MARK, HRX0_D_MARK, IETX_A_MARK,
495 TCLKA_A_MARK, HIFD00_MARK,
496 DU0_DR1_MARK, SCK0_B_MARK, HTX0_D_MARK, IERX_A_MARK,
497 TCLKB_A_MARK, HIFD01_MARK,
498 DU0_DR2_MARK, RX0_B_MARK, TCLKC_A_MARK, HIFD02_MARK,
499 DU0_DR3_MARK, TX0_B_MARK, TCLKD_A_MARK, HIFD03_MARK,
500 DU0_DR4_MARK, CTS0_C_MARK, TIOC0A_A_MARK, HIFD04_MARK,
501 DU0_DR5_MARK, RTS0_C_MARK, TIOC0B_A_MARK, HIFD05_MARK,
502 DU0_DR6_MARK, SCK1_C_MARK, TIOC0C_A_MARK, HIFD06_MARK,
503 DU0_DR7_MARK, RX1_C_MARK, TIOC0D_A_MARK, HIFD07_MARK,
504 DU0_DG0_MARK, TX1_C_MARK, HSCK0_D_MARK, IECLK_A_MARK,
505 TIOC1A_A_MARK, HIFD08_MARK,
506 DU0_DG1_MARK, CTS1_C_MARK, HRTS0_D_MARK, TIOC1B_A_MARK,
507 HIFD09_MARK,
508
509 /* IPSR7 */
510 DU0_DG2_MARK, RTS1_C_MARK, RMII0_MDC_B_MARK, TIOC2A_A_MARK,
511 HIFD10_MARK,
512 DU0_DG3_MARK, SCK2_C_MARK, RMII0_MDIO_B_MARK, TIOC2B_A_MARK,
513 HIFD11_MARK,
514 DU0_DG4_MARK, RX2_C_MARK, RMII0_CRS_DV_B_MARK, TIOC3A_A_MARK,
515 HIFD12_MARK,
516 DU0_DG5_MARK, TX2_C_MARK, RMII0_RX_ER_B_MARK, TIOC3B_A_MARK,
517 HIFD13_MARK,
518 DU0_DG6_MARK, RX3_C_MARK, RMII0_RXD0_B_MARK, TIOC3C_A_MARK,
519 HIFD14_MARK,
520 DU0_DG7_MARK, TX3_C_MARK, RMII0_RXD1_B_MARK, TIOC3D_A_MARK,
521 HIFD15_MARK,
522 DU0_DB0_MARK, RX4_C_MARK, RMII0_TXD_EN_B_MARK, TIOC4A_A_MARK,
523 HIFCS_MARK,
524 DU0_DB1_MARK, TX4_C_MARK, RMII0_TXD0_B_MARK, TIOC4B_A_MARK,
525 HIFRS_MARK,
526 DU0_DB2_MARK, RX5_B_MARK, RMII0_TXD1_B_MARK, TIOC4C_A_MARK,
527 HIFWR_MARK,
528 DU0_DB3_MARK, TX5_B_MARK, TIOC4D_A_MARK, HIFRD_MARK,
529 DU0_DB4_MARK, HIFINT_MARK,
530
531 /* IPSR8 */
532 DU0_DB5_MARK, HIFDREQ_MARK,
533 DU0_DB6_MARK, HIFRDY_MARK,
534 DU0_DB7_MARK, SSI_SCK0_B_MARK, HIFEBL_B_MARK,
535 DU0_DOTCLKIN_MARK, HSPI_CS0_C_MARK, SSI_WS0_B_MARK,
536 DU0_DOTCLKOUT_MARK, HSPI_CLK0_C_MARK, SSI_SDATA0_B_MARK,
537 DU0_EXHSYNC_DU0_HSYNC_MARK, HSPI_TX0_C_MARK, SSI_SCK1_B_MARK,
538 DU0_EXVSYNC_DU0_VSYNC_MARK, HSPI_RX0_C_MARK, SSI_WS1_B_MARK,
539 DU0_EXODDF_DU0_ODDF_MARK, CAN0_RX_B_MARK, HSCK0_B_MARK,
540 SSI_SDATA1_B_MARK,
541 DU0_DISP_MARK, CAN0_TX_B_MARK, HRX0_B_MARK, AUDIO_CLKA_B_MARK,
542 DU0_CDE_MARK, HTX0_B_MARK, AUDIO_CLKB_B_MARK, LCD_VCPWC_B_MARK,
543 IRQ0_A_MARK, HSPI_TX_B_MARK, RX3_E_MARK, ET0_ERXD0_MARK,
544 IRQ1_A_MARK, HSPI_RX_B_MARK, TX3_E_MARK, ET0_ERXD1_MARK,
545 IRQ2_A_MARK, CTS0_A_MARK, HCTS0_B_MARK, ET0_ERXD2_A_MARK,
546 IRQ3_A_MARK, RTS0_A_MARK, HRTS0_B_MARK, ET0_ERXD3_A_MARK,
547
548 /* IPSR9 */
549 VI1_CLK_A_MARK, FD0_B_MARK, LCD_DATA0_B_MARK,
550 VI1_0_A_MARK, FD1_B_MARK, LCD_DATA1_B_MARK,
551 VI1_1_A_MARK, FD2_B_MARK, LCD_DATA2_B_MARK,
552 VI1_2_A_MARK, FD3_B_MARK, LCD_DATA3_B_MARK,
553 VI1_3_A_MARK, FD4_B_MARK, LCD_DATA4_B_MARK,
554 VI1_4_A_MARK, FD5_B_MARK, LCD_DATA5_B_MARK,
555 VI1_5_A_MARK, FD6_B_MARK, LCD_DATA6_B_MARK,
556 VI1_6_A_MARK, FD7_B_MARK, LCD_DATA7_B_MARK,
557 VI1_7_A_MARK, FCE_B_MARK, LCD_DATA8_B_MARK,
558 SSI_SCK0_A_MARK, TIOC1A_B_MARK, LCD_DATA9_B_MARK,
559 SSI_WS0_A_MARK, TIOC1B_B_MARK, LCD_DATA10_B_MARK,
560 SSI_SDATA0_A_MARK, VI1_0_B_MARK, TIOC2A_B_MARK, LCD_DATA11_B_MARK,
561 SSI_SCK1_A_MARK, VI1_1_B_MARK, TIOC2B_B_MARK, LCD_DATA12_B_MARK,
562 SSI_WS1_A_MARK, VI1_2_B_MARK, LCD_DATA13_B_MARK,
563 SSI_SDATA1_A_MARK, VI1_3_B_MARK, LCD_DATA14_B_MARK,
564
565 /* IPSR10 */
566 SSI_SCK23_MARK, VI1_4_B_MARK, RX1_D_MARK, FCLE_B_MARK,
567 LCD_DATA15_B_MARK,
568 SSI_WS23_MARK, VI1_5_B_MARK, TX1_D_MARK, HSCK0_C_MARK,
569 FALE_B_MARK, LCD_DON_B_MARK,
570 SSI_SDATA2_MARK, VI1_6_B_MARK, HRX0_C_MARK, FRE_B_MARK,
571 LCD_CL1_B_MARK,
572 SSI_SDATA3_MARK, VI1_7_B_MARK, HTX0_C_MARK, FWE_B_MARK,
573 LCD_CL2_B_MARK,
574 AUDIO_CLKA_A_MARK, VI1_CLK_B_MARK, SCK1_D_MARK, IECLK_B_MARK,
575 LCD_FLM_B_MARK,
576 AUDIO_CLKB_A_MARK, LCD_CLK_B_MARK,
577 AUDIO_CLKC_MARK, SCK1_E_MARK, HCTS0_C_MARK, FRB_B_MARK,
578 LCD_VEPWC_B_MARK,
579 AUDIO_CLKOUT_MARK, TX1_E_MARK, HRTS0_C_MARK, FSE_B_MARK,
580 LCD_M_DISP_B_MARK,
581 CAN_CLK_A_MARK, RX4_D_MARK,
582 CAN0_TX_A_MARK, TX4_D_MARK, MLB_CLK_MARK,
583 CAN1_RX_A_MARK, IRQ1_B_MARK,
584 CAN0_RX_A_MARK, IRQ0_B_MARK, MLB_SIG_MARK,
585 CAN1_TX_A_MARK, TX5_C_MARK, MLB_DAT_MARK,
586
587 /* IPSR11 */
588 SCL1_MARK, SCIF_CLK_C_MARK,
589 SDA1_MARK, RX1_E_MARK,
590 SDA0_MARK, HIFEBL_A_MARK,
591 SDSELF_MARK, RTS1_E_MARK,
592 SCIF_CLK_A_MARK, HSPI_CLK_A_MARK, VI0_CLK_MARK, RMII0_TXD0_A_MARK,
593 ET0_ERXD4_MARK,
594 SCK0_A_MARK, HSPI_CS_A_MARK, VI0_CLKENB_MARK, RMII0_TXD1_A_MARK,
595 ET0_ERXD5_MARK,
596 RX0_A_MARK, HSPI_RX_A_MARK, RMII0_RXD0_A_MARK, ET0_ERXD6_MARK,
597 TX0_A_MARK, HSPI_TX_A_MARK,
598 PENC1_MARK, TX3_D_MARK, CAN1_TX_B_MARK, TX5_D_MARK,
599 IETX_B_MARK,
600 USB_OVC1_MARK, RX3_D_MARK, CAN1_RX_B_MARK, RX5_D_MARK,
601 IERX_B_MARK,
602 DREQ0_MARK, SD1_CLK_A_MARK, ET0_TX_EN_MARK,
603 DACK0_MARK, SD1_DAT3_A_MARK, ET0_TX_ER_MARK,
604 DREQ1_MARK, HSPI_CLK_B_MARK, RX4_B_MARK, ET0_PHY_INT_C_MARK,
605 ET0_TX_CLK_A_MARK,
606 DACK1_MARK, HSPI_CS_B_MARK, TX4_B_MARK, ET0_RX_CLK_A_MARK,
607 PRESETOUT_MARK, ST_CLKOUT_MARK,
608
609 PINMUX_MARK_END,
610};
611
612static pinmux_enum_t pinmux_data[] = {
613 PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
614
615 PINMUX_DATA(CLKOUT_MARK, FN_CLKOUT),
616 PINMUX_DATA(BS_MARK, FN_BS), PINMUX_DATA(CS0_MARK, FN_CS0),
617 PINMUX_DATA(EX_CS0_MARK, FN_EX_CS0),
618 PINMUX_DATA(RD_MARK, FN_RD), PINMUX_DATA(WE0_MARK, FN_WE0),
619 PINMUX_DATA(WE1_MARK, FN_WE1),
620 PINMUX_DATA(SCL0_MARK, FN_SCL0), PINMUX_DATA(PENC0_MARK, FN_PENC0),
621 PINMUX_DATA(USB_OVC0_MARK, FN_USB_OVC0),
622 PINMUX_DATA(IRQ2_B_MARK, FN_IRQ2_B),
623 PINMUX_DATA(IRQ3_B_MARK, FN_IRQ3_B),
624
625 /* IPSR0 */
626 PINMUX_IPSR_DATA(IP0_1_0, A0),
627 PINMUX_IPSR_DATA(IP0_1_0, ST0_CLKIN),
628 PINMUX_IPSR_MODSEL_DATA(IP0_1_0, LCD_DATA0_A, SEL_LCDC_0),
629 PINMUX_IPSR_MODSEL_DATA(IP0_1_0, TCLKA_C, SEL_MTU2_CLK_1),
630
631 PINMUX_IPSR_DATA(IP0_3_2, A1),
632 PINMUX_IPSR_DATA(IP0_3_2, ST0_REQ),
633 PINMUX_IPSR_MODSEL_DATA(IP0_3_2, LCD_DATA1_A, SEL_LCDC_0),
634 PINMUX_IPSR_MODSEL_DATA(IP0_3_2, TCLKB_C, SEL_MTU2_CLK_1),
635
636 PINMUX_IPSR_DATA(IP0_5_4, A2),
637 PINMUX_IPSR_DATA(IP0_5_4, ST0_SYC),
638 PINMUX_IPSR_MODSEL_DATA(IP0_5_4, LCD_DATA2_A, SEL_LCDC_0),
639 PINMUX_IPSR_MODSEL_DATA(IP0_5_4, TCLKC_C, SEL_MTU2_CLK_1),
640
641 PINMUX_IPSR_DATA(IP0_7_6, A3),
642 PINMUX_IPSR_DATA(IP0_7_6, ST0_VLD),
643 PINMUX_IPSR_MODSEL_DATA(IP0_7_6, LCD_DATA3_A, SEL_LCDC_0),
644 PINMUX_IPSR_MODSEL_DATA(IP0_7_6, TCLKD_C, SEL_MTU2_CLK_1),
645
646 PINMUX_IPSR_DATA(IP0_9_8, A4),
647 PINMUX_IPSR_DATA(IP0_9_8, ST0_D0),
648 PINMUX_IPSR_MODSEL_DATA(IP0_9_8, LCD_DATA4_A, SEL_LCDC_0),
649 PINMUX_IPSR_MODSEL_DATA(IP0_9_8, TIOC0A_C, SEL_MTU2_CH0_1),
650
651 PINMUX_IPSR_DATA(IP0_11_10, A5),
652 PINMUX_IPSR_DATA(IP0_11_10, ST0_D1),
653 PINMUX_IPSR_MODSEL_DATA(IP0_11_10, LCD_DATA5_A, SEL_LCDC_0),
654 PINMUX_IPSR_MODSEL_DATA(IP0_11_10, TIOC0B_C, SEL_MTU2_CH0_1),
655
656 PINMUX_IPSR_DATA(IP0_13_12, A6),
657 PINMUX_IPSR_DATA(IP0_13_12, ST0_D2),
658 PINMUX_IPSR_MODSEL_DATA(IP0_13_12, LCD_DATA6_A, SEL_LCDC_0),
659 PINMUX_IPSR_MODSEL_DATA(IP0_13_12, TIOC0C_C, SEL_MTU2_CH0_1),
660
661 PINMUX_IPSR_DATA(IP0_15_14, A7),
662 PINMUX_IPSR_DATA(IP0_15_14, ST0_D3),
663 PINMUX_IPSR_MODSEL_DATA(IP0_15_14, LCD_DATA7_A, SEL_LCDC_0),
664 PINMUX_IPSR_MODSEL_DATA(IP0_15_14, TIOC0D_C, SEL_MTU2_CH0_1),
665
666 PINMUX_IPSR_DATA(IP0_17_16, A8),
667 PINMUX_IPSR_DATA(IP0_17_16, ST0_D4),
668 PINMUX_IPSR_MODSEL_DATA(IP0_17_16, LCD_DATA8_A, SEL_LCDC_0),
669 PINMUX_IPSR_MODSEL_DATA(IP0_17_16, TIOC1A_C, SEL_MTU2_CH1_2),
670
671 PINMUX_IPSR_DATA(IP0_19_18, A9),
672 PINMUX_IPSR_DATA(IP0_19_18, ST0_D5),
673 PINMUX_IPSR_MODSEL_DATA(IP0_19_18, LCD_DATA9_A, SEL_LCDC_0),
674 PINMUX_IPSR_MODSEL_DATA(IP0_19_18, TIOC1B_C, SEL_MTU2_CH1_2),
675
676 PINMUX_IPSR_DATA(IP0_21_20, A10),
677 PINMUX_IPSR_DATA(IP0_21_20, ST0_D6),
678 PINMUX_IPSR_MODSEL_DATA(IP0_21_20, LCD_DATA10_A, SEL_LCDC_0),
679 PINMUX_IPSR_MODSEL_DATA(IP0_21_20, TIOC2A_C, SEL_MTU2_CH2_2),
680
681 PINMUX_IPSR_DATA(IP0_23_22, A11),
682 PINMUX_IPSR_DATA(IP0_23_22, ST0_D7),
683 PINMUX_IPSR_MODSEL_DATA(IP0_23_22, LCD_DATA11_A, SEL_LCDC_0),
684 PINMUX_IPSR_MODSEL_DATA(IP0_23_22, TIOC2B_C, SEL_MTU2_CH2_2),
685
686 PINMUX_IPSR_DATA(IP0_25_24, A12),
687 PINMUX_IPSR_MODSEL_DATA(IP0_25_24, LCD_DATA12_A, SEL_LCDC_0),
688 PINMUX_IPSR_MODSEL_DATA(IP0_25_24, TIOC3A_C, SEL_MTU2_CH3_1),
689
690 PINMUX_IPSR_DATA(IP0_27_26, A13),
691 PINMUX_IPSR_MODSEL_DATA(IP0_27_26, LCD_DATA13_A, SEL_LCDC_0),
692 PINMUX_IPSR_MODSEL_DATA(IP0_27_26, TIOC3B_C, SEL_MTU2_CH3_1),
693
694 PINMUX_IPSR_DATA(IP0_29_28, A14),
695 PINMUX_IPSR_MODSEL_DATA(IP0_29_28, LCD_DATA14_A, SEL_LCDC_0),
696 PINMUX_IPSR_MODSEL_DATA(IP0_29_28, TIOC3C_C, SEL_MTU2_CH3_1),
697
698 PINMUX_IPSR_DATA(IP0_31_30, A15),
699 PINMUX_IPSR_DATA(IP0_31_30, ST0_VCO_CLKIN),
700 PINMUX_IPSR_MODSEL_DATA(IP0_31_30, LCD_DATA15_A, SEL_LCDC_0),
701 PINMUX_IPSR_MODSEL_DATA(IP0_31_30, TIOC3D_C, SEL_MTU2_CH3_1),
702
703
704 /* IPSR1 */
705 PINMUX_IPSR_DATA(IP1_1_0, A16),
706 PINMUX_IPSR_DATA(IP1_1_0, ST0_PWM),
707 PINMUX_IPSR_MODSEL_DATA(IP1_1_0, LCD_DON_A, SEL_LCDC_0),
708 PINMUX_IPSR_MODSEL_DATA(IP1_1_0, TIOC4A_C, SEL_MTU2_CH4_1),
709
710 PINMUX_IPSR_DATA(IP1_3_2, A17),
711 PINMUX_IPSR_DATA(IP1_3_2, ST1_VCO_CLKIN),
712 PINMUX_IPSR_MODSEL_DATA(IP1_3_2, LCD_CL1_A, SEL_LCDC_0),
713 PINMUX_IPSR_MODSEL_DATA(IP1_3_2, TIOC4B_C, SEL_MTU2_CH4_1),
714
715 PINMUX_IPSR_DATA(IP1_5_4, A18),
716 PINMUX_IPSR_DATA(IP1_5_4, ST1_PWM),
717 PINMUX_IPSR_MODSEL_DATA(IP1_5_4, LCD_CL2_A, SEL_LCDC_0),
718 PINMUX_IPSR_MODSEL_DATA(IP1_5_4, TIOC4C_C, SEL_MTU2_CH4_1),
719
720 PINMUX_IPSR_DATA(IP1_7_6, A19),
721 PINMUX_IPSR_DATA(IP1_7_6, ST1_CLKIN),
722 PINMUX_IPSR_MODSEL_DATA(IP1_7_6, LCD_CLK_A, SEL_LCDC_0),
723 PINMUX_IPSR_MODSEL_DATA(IP1_7_6, TIOC4D_C, SEL_MTU2_CH4_1),
724
725 PINMUX_IPSR_DATA(IP1_9_8, A20),
726 PINMUX_IPSR_DATA(IP1_9_8, ST1_REQ),
727 PINMUX_IPSR_MODSEL_DATA(IP1_9_8, LCD_FLM_A, SEL_LCDC_0),
728
729 PINMUX_IPSR_DATA(IP1_11_10, A21),
730 PINMUX_IPSR_DATA(IP1_11_10, ST1_SYC),
731 PINMUX_IPSR_MODSEL_DATA(IP1_11_10, LCD_VCPWC_A, SEL_LCDC_0),
732
733 PINMUX_IPSR_DATA(IP1_13_12, A22),
734 PINMUX_IPSR_DATA(IP1_13_12, ST1_VLD),
735 PINMUX_IPSR_MODSEL_DATA(IP1_13_12, LCD_VEPWC_A, SEL_LCDC_0),
736
737 PINMUX_IPSR_DATA(IP1_15_14, A23),
738 PINMUX_IPSR_DATA(IP1_15_14, ST1_D0),
739 PINMUX_IPSR_MODSEL_DATA(IP1_15_14, LCD_M_DISP_A, SEL_LCDC_0),
740
741 PINMUX_IPSR_DATA(IP1_17_16, A24),
742 PINMUX_IPSR_MODSEL_DATA(IP1_17_16, RX2_D, SEL_SCIF2_3),
743 PINMUX_IPSR_DATA(IP1_17_16, ST1_D1),
744
745 PINMUX_IPSR_DATA(IP1_19_18, A25),
746 PINMUX_IPSR_MODSEL_DATA(IP1_17_16, RX2_D, SEL_SCIF2_3),
747 PINMUX_IPSR_DATA(IP1_17_16, ST1_D2),
748
749 PINMUX_IPSR_DATA(IP1_22_20, D0),
750 PINMUX_IPSR_MODSEL_DATA(IP1_22_20, SD0_DAT0_A, SEL_SDHI0_0),
751 PINMUX_IPSR_MODSEL_DATA(IP1_22_20, MMC_D0_A, SEL_MMC_0),
752 PINMUX_IPSR_DATA(IP1_22_20, ST1_D3),
753 PINMUX_IPSR_MODSEL_DATA(IP1_22_20, FD0_A, SEL_FLCTL_0),
754
755 PINMUX_IPSR_DATA(IP1_25_23, D1),
756 PINMUX_IPSR_MODSEL_DATA(IP1_25_23, SD0_DAT0_A, SEL_SDHI0_0),
757 PINMUX_IPSR_MODSEL_DATA(IP1_25_23, MMC_D1_A, SEL_MMC_0),
758 PINMUX_IPSR_DATA(IP1_25_23, ST1_D4),
759 PINMUX_IPSR_MODSEL_DATA(IP1_25_23, FD1_A, SEL_FLCTL_0),
760
761 PINMUX_IPSR_DATA(IP1_28_26, D2),
762 PINMUX_IPSR_MODSEL_DATA(IP1_28_26, SD0_DAT0_A, SEL_SDHI0_0),
763 PINMUX_IPSR_MODSEL_DATA(IP1_28_26, MMC_D2_A, SEL_MMC_0),
764 PINMUX_IPSR_DATA(IP1_28_26, ST1_D5),
765 PINMUX_IPSR_MODSEL_DATA(IP1_28_26, FD2_A, SEL_FLCTL_0),
766
767 PINMUX_IPSR_DATA(IP1_31_29, D3),
768 PINMUX_IPSR_MODSEL_DATA(IP1_31_29, SD0_DAT0_A, SEL_SDHI0_0),
769 PINMUX_IPSR_MODSEL_DATA(IP1_31_29, MMC_D3_A, SEL_MMC_0),
770 PINMUX_IPSR_DATA(IP1_31_29, ST1_D6),
771 PINMUX_IPSR_MODSEL_DATA(IP1_31_29, FD3_A, SEL_FLCTL_0),
772
773 /* IPSR2 */
774 PINMUX_IPSR_DATA(IP2_2_0, D4),
775 PINMUX_IPSR_MODSEL_DATA(IP2_2_0, SD0_CD_A, SEL_SDHI0_0),
776 PINMUX_IPSR_MODSEL_DATA(IP2_2_0, MMC_D4_A, SEL_MMC_0),
777 PINMUX_IPSR_DATA(IP2_2_0, ST1_D7),
778 PINMUX_IPSR_MODSEL_DATA(IP2_2_0, FD4_A, SEL_FLCTL_0),
779
780 PINMUX_IPSR_DATA(IP2_4_3, D5),
781 PINMUX_IPSR_MODSEL_DATA(IP2_4_3, SD0_WP_A, SEL_SDHI0_0),
782 PINMUX_IPSR_MODSEL_DATA(IP2_4_3, MMC_D5_A, SEL_MMC_0),
783 PINMUX_IPSR_MODSEL_DATA(IP2_4_3, FD5_A, SEL_FLCTL_0),
784
785 PINMUX_IPSR_DATA(IP2_7_5, D6),
786 PINMUX_IPSR_MODSEL_DATA(IP2_7_5, RSPI_RSPCK_A, SEL_RSPI_0),
787 PINMUX_IPSR_MODSEL_DATA(IP2_7_5, MMC_D6_A, SEL_MMC_0),
788 PINMUX_IPSR_MODSEL_DATA(IP2_7_5, QSPCLK_A, SEL_RQSPI_0),
789 PINMUX_IPSR_MODSEL_DATA(IP2_7_5, FD6_A, SEL_FLCTL_0),
790
791 PINMUX_IPSR_DATA(IP2_10_8, D7),
792 PINMUX_IPSR_MODSEL_DATA(IP2_10_8, RSPI_SSL_A, SEL_RSPI_0),
793 PINMUX_IPSR_MODSEL_DATA(IP2_10_8, MMC_D7_A, SEL_MMC_0),
794 PINMUX_IPSR_MODSEL_DATA(IP2_10_8, QSSL_A, SEL_RQSPI_0),
795 PINMUX_IPSR_MODSEL_DATA(IP2_10_8, FD7_A, SEL_FLCTL_0),
796
797 PINMUX_IPSR_DATA(IP2_13_11, D8),
798 PINMUX_IPSR_MODSEL_DATA(IP2_13_11, SD0_CLK_A, SEL_SDHI0_0),
799 PINMUX_IPSR_MODSEL_DATA(IP2_13_11, MMC_CLK_A, SEL_MMC_0),
800 PINMUX_IPSR_MODSEL_DATA(IP2_13_11, QIO2_A, SEL_RQSPI_0),
801 PINMUX_IPSR_MODSEL_DATA(IP2_13_11, FCE_A, SEL_FLCTL_0),
802 PINMUX_IPSR_MODSEL_DATA(IP2_13_11, ET0_GTX_CLK_B, SEL_ET0_1),
803
804 PINMUX_IPSR_DATA(IP2_16_14, D9),
805 PINMUX_IPSR_MODSEL_DATA(IP2_16_14, SD0_CMD_A, SEL_SDHI0_0),
806 PINMUX_IPSR_MODSEL_DATA(IP2_16_14, MMC_CMD_A, SEL_MMC_0),
807 PINMUX_IPSR_MODSEL_DATA(IP2_16_14, QIO3_A, SEL_RQSPI_0),
808 PINMUX_IPSR_MODSEL_DATA(IP2_16_14, FCLE_A, SEL_FLCTL_0),
809 PINMUX_IPSR_MODSEL_DATA(IP2_16_14, ET0_ETXD1_B, SEL_ET0_1),
810
811 PINMUX_IPSR_DATA(IP2_19_17, D10),
812 PINMUX_IPSR_MODSEL_DATA(IP2_19_17, RSPI_MOSI_A, SEL_RSPI_0),
813 PINMUX_IPSR_MODSEL_DATA(IP2_19_17, QMO_QIO0_A, SEL_RQSPI_0),
814 PINMUX_IPSR_MODSEL_DATA(IP2_19_17, FALE_A, SEL_FLCTL_0),
815 PINMUX_IPSR_MODSEL_DATA(IP2_19_17, ET0_ETXD2_B, SEL_ET0_1),
816
817 PINMUX_IPSR_DATA(IP2_22_20, D11),
818 PINMUX_IPSR_MODSEL_DATA(IP2_22_20, RSPI_MISO_A, SEL_RSPI_0),
819 PINMUX_IPSR_MODSEL_DATA(IP2_22_20, QMI_QIO1_A, SEL_RQSPI_0),
820 PINMUX_IPSR_MODSEL_DATA(IP2_22_20, FRE_A, SEL_FLCTL_0),
821
822 PINMUX_IPSR_DATA(IP2_24_23, D12),
823 PINMUX_IPSR_MODSEL_DATA(IP2_24_23, FWE_A, SEL_FLCTL_0),
824 PINMUX_IPSR_MODSEL_DATA(IP2_24_23, ET0_ETXD5_B, SEL_ET0_1),
825
826 PINMUX_IPSR_DATA(IP2_27_25, D13),
827 PINMUX_IPSR_MODSEL_DATA(IP2_27_25, RX2_B, SEL_SCIF2_1),
828 PINMUX_IPSR_MODSEL_DATA(IP2_27_25, FRB_A, SEL_FLCTL_0),
829 PINMUX_IPSR_MODSEL_DATA(IP2_27_25, ET0_ETXD6_B, SEL_ET0_1),
830
831 PINMUX_IPSR_DATA(IP2_30_28, D14),
832 PINMUX_IPSR_MODSEL_DATA(IP2_30_28, TX2_B, SEL_SCIF2_1),
833 PINMUX_IPSR_MODSEL_DATA(IP2_30_28, FSE_A, SEL_FLCTL_0),
834 PINMUX_IPSR_MODSEL_DATA(IP2_30_28, ET0_TX_CLK_B, SEL_ET0_1),
835
836 /* IPSR3 */
837 PINMUX_IPSR_DATA(IP3_1_0, D15),
838 PINMUX_IPSR_MODSEL_DATA(IP3_1_0, SCK2_B, SEL_SCIF2_1),
839
840 PINMUX_IPSR_DATA(IP3_2, CS1_A26),
841 PINMUX_IPSR_MODSEL_DATA(IP3_2, QIO3_B, SEL_RQSPI_1),
842
843 PINMUX_IPSR_DATA(IP3_5_3, EX_CS1),
844 PINMUX_IPSR_MODSEL_DATA(IP3_5_3, RX3_B, SEL_SCIF2_1),
845 PINMUX_IPSR_DATA(IP3_5_3, ATACS0),
846 PINMUX_IPSR_MODSEL_DATA(IP3_5_3, QIO2_B, SEL_RQSPI_1),
847 PINMUX_IPSR_DATA(IP3_5_3, ET0_ETXD0),
848
849 PINMUX_IPSR_DATA(IP3_8_6, EX_CS2),
850 PINMUX_IPSR_MODSEL_DATA(IP3_8_6, TX3_B, SEL_SCIF3_1),
851 PINMUX_IPSR_DATA(IP3_8_6, ATACS1),
852 PINMUX_IPSR_MODSEL_DATA(IP3_8_6, QSPCLK_B, SEL_RQSPI_1),
853 PINMUX_IPSR_MODSEL_DATA(IP3_8_6, ET0_GTX_CLK_A, SEL_ET0_0),
854
855 PINMUX_IPSR_DATA(IP3_11_9, EX_CS3),
856 PINMUX_IPSR_MODSEL_DATA(IP3_11_9, SD1_CD_A, SEL_SDHI1_0),
857 PINMUX_IPSR_DATA(IP3_11_9, ATARD),
858 PINMUX_IPSR_MODSEL_DATA(IP3_11_9, QMO_QIO0_B, SEL_RQSPI_1),
859 PINMUX_IPSR_MODSEL_DATA(IP3_11_9, ET0_ETXD1_A, SEL_ET0_0),
860
861 PINMUX_IPSR_DATA(IP3_14_12, EX_CS4),
862 PINMUX_IPSR_MODSEL_DATA(IP3_14_12, SD1_WP_A, SEL_SDHI1_0),
863 PINMUX_IPSR_DATA(IP3_14_12, ATAWR),
864 PINMUX_IPSR_MODSEL_DATA(IP3_14_12, QMI_QIO1_B, SEL_RQSPI_1),
865 PINMUX_IPSR_MODSEL_DATA(IP3_14_12, ET0_ETXD2_A, SEL_ET0_0),
866
867 PINMUX_IPSR_DATA(IP3_17_15, EX_CS5),
868 PINMUX_IPSR_MODSEL_DATA(IP3_17_15, SD1_CMD_A, SEL_SDHI1_0),
869 PINMUX_IPSR_DATA(IP3_17_15, ATADIR),
870 PINMUX_IPSR_MODSEL_DATA(IP3_17_15, QSSL_B, SEL_RQSPI_1),
871 PINMUX_IPSR_MODSEL_DATA(IP3_17_15, ET0_ETXD3_A, SEL_ET0_0),
872
873 PINMUX_IPSR_DATA(IP3_19_18, RD_WR),
874 PINMUX_IPSR_DATA(IP3_19_18, TCLK0),
875 PINMUX_IPSR_MODSEL_DATA(IP3_19_18, CAN_CLK_B, SEL_RCAN_CLK_1),
876 PINMUX_IPSR_DATA(IP3_19_18, ET0_ETXD4),
877
878 PINMUX_IPSR_DATA(IP3_20, EX_WAIT0),
879 PINMUX_IPSR_MODSEL_DATA(IP3_20, TCLK1_B, SEL_TMU_1),
880
881 PINMUX_IPSR_DATA(IP3_23_21, EX_WAIT1),
882 PINMUX_IPSR_MODSEL_DATA(IP3_23_21, SD1_DAT0_A, SEL_SDHI1_0),
883 PINMUX_IPSR_DATA(IP3_23_21, DREQ2),
884 PINMUX_IPSR_MODSEL_DATA(IP3_23_21, CAN1_TX_C, SEL_RCAN1_2),
885 PINMUX_IPSR_MODSEL_DATA(IP3_23_21, ET0_LINK_C, SEL_ET0_CTL_2),
886 PINMUX_IPSR_MODSEL_DATA(IP3_23_21, ET0_ETXD5_A, SEL_ET0_0),
887
888 PINMUX_IPSR_DATA(IP3_26_24, EX_WAIT2),
889 PINMUX_IPSR_MODSEL_DATA(IP3_26_24, SD1_DAT1_A, SEL_SDHI1_0),
890 PINMUX_IPSR_DATA(IP3_26_24, DACK2),
891 PINMUX_IPSR_MODSEL_DATA(IP3_26_24, CAN1_RX_C, SEL_RCAN1_2),
892 PINMUX_IPSR_MODSEL_DATA(IP3_26_24, ET0_MAGIC_C, SEL_ET0_CTL_2),
893 PINMUX_IPSR_MODSEL_DATA(IP3_26_24, ET0_ETXD6_A, SEL_ET0_0),
894
895 PINMUX_IPSR_DATA(IP3_29_27, DRACK0),
896 PINMUX_IPSR_MODSEL_DATA(IP3_29_27, SD1_DAT2_A, SEL_SDHI1_0),
897 PINMUX_IPSR_DATA(IP3_29_27, ATAG),
898 PINMUX_IPSR_MODSEL_DATA(IP3_29_27, TCLK1_A, SEL_TMU_0),
899 PINMUX_IPSR_DATA(IP3_29_27, ET0_ETXD7),
900
901 /* IPSR4 */
902 PINMUX_IPSR_MODSEL_DATA(IP4_2_0, HCTS0_A, SEL_HSCIF_0),
903 PINMUX_IPSR_MODSEL_DATA(IP4_2_0, CTS1_A, SEL_SCIF1_0),
904 PINMUX_IPSR_DATA(IP4_2_0, VI0_FIELD),
905 PINMUX_IPSR_MODSEL_DATA(IP4_2_0, RMII0_RXD1_A, SEL_RMII_0),
906 PINMUX_IPSR_DATA(IP4_2_0, ET0_ERXD7),
907
908 PINMUX_IPSR_MODSEL_DATA(IP4_5_3, HRTS0_A, SEL_HSCIF_0),
909 PINMUX_IPSR_MODSEL_DATA(IP4_5_3, RTS1_A, SEL_SCIF1_0),
910 PINMUX_IPSR_DATA(IP4_5_3, VI0_HSYNC),
911 PINMUX_IPSR_MODSEL_DATA(IP4_5_3, RMII0_TXD_EN_A, SEL_RMII_0),
912 PINMUX_IPSR_DATA(IP4_5_3, ET0_RX_DV),
913
914 PINMUX_IPSR_MODSEL_DATA(IP4_8_6, HSCK0_A, SEL_HSCIF_0),
915 PINMUX_IPSR_MODSEL_DATA(IP4_8_6, SCK1_A, SEL_SCIF1_0),
916 PINMUX_IPSR_DATA(IP4_8_6, VI0_VSYNC),
917 PINMUX_IPSR_MODSEL_DATA(IP4_8_6, RMII0_RX_ER_A, SEL_RMII_0),
918 PINMUX_IPSR_DATA(IP4_8_6, ET0_RX_ER),
919
920 PINMUX_IPSR_MODSEL_DATA(IP4_11_9, HRX0_A, SEL_HSCIF_0),
921 PINMUX_IPSR_MODSEL_DATA(IP4_11_9, RX1_A, SEL_SCIF1_0),
922 PINMUX_IPSR_DATA(IP4_11_9, VI0_DATA0_VI0_B0),
923 PINMUX_IPSR_MODSEL_DATA(IP4_11_9, RMII0_CRS_DV_A, SEL_RMII_0),
924 PINMUX_IPSR_DATA(IP4_11_9, ET0_CRS),
925
926 PINMUX_IPSR_MODSEL_DATA(IP4_14_12, HTX0_A, SEL_HSCIF_0),
927 PINMUX_IPSR_MODSEL_DATA(IP4_14_12, TX1_A, SEL_SCIF1_0),
928 PINMUX_IPSR_DATA(IP4_14_12, VI0_DATA1_VI0_B1),
929 PINMUX_IPSR_MODSEL_DATA(IP4_14_12, RMII0_MDC_A, SEL_RMII_0),
930 PINMUX_IPSR_DATA(IP4_14_12, ET0_COL),
931
932 PINMUX_IPSR_MODSEL_DATA(IP4_17_15, CTS0_B, SEL_SCIF0_1),
933 PINMUX_IPSR_DATA(IP4_17_15, VI0_DATA2_VI0_B2),
934 PINMUX_IPSR_MODSEL_DATA(IP4_17_15, RMII0_MDIO_A, SEL_RMII_0),
935 PINMUX_IPSR_DATA(IP4_17_15, ET0_MDC),
936
937 PINMUX_IPSR_MODSEL_DATA(IP4_19_18, RTS0_B, SEL_SCIF0_1),
938 PINMUX_IPSR_DATA(IP4_19_18, VI0_DATA3_VI0_B3),
939 PINMUX_IPSR_MODSEL_DATA(IP4_19_18, ET0_MDIO_A, SEL_ET0_0),
940
941 PINMUX_IPSR_MODSEL_DATA(IP4_21_20, SCK1_B, SEL_SCIF1_1),
942 PINMUX_IPSR_DATA(IP4_21_20, VI0_DATA4_VI0_B4),
943 PINMUX_IPSR_MODSEL_DATA(IP4_21_20, ET0_LINK_A, SEL_ET0_CTL_0),
944
945 PINMUX_IPSR_MODSEL_DATA(IP4_23_22, RX1_B, SEL_SCIF1_1),
946 PINMUX_IPSR_DATA(IP4_23_22, VI0_DATA5_VI0_B5),
947 PINMUX_IPSR_MODSEL_DATA(IP4_23_22, ET0_MAGIC_A, SEL_ET0_CTL_0),
948
949 PINMUX_IPSR_MODSEL_DATA(IP4_25_24, TX1_B, SEL_SCIF1_1),
950 PINMUX_IPSR_DATA(IP4_25_24, VI0_DATA6_VI0_G0),
951 PINMUX_IPSR_MODSEL_DATA(IP4_25_24, ET0_PHY_INT_A, SEL_ET0_CTL_0),
952
953 PINMUX_IPSR_MODSEL_DATA(IP4_27_26, CTS1_B, SEL_SCIF1_1),
954 PINMUX_IPSR_DATA(IP4_27_26, VI0_DATA7_VI0_G1),
955
956 PINMUX_IPSR_MODSEL_DATA(IP4_29_28, RTS1_B, SEL_SCIF1_1),
957 PINMUX_IPSR_DATA(IP4_29_28, VI0_G2),
958
959 PINMUX_IPSR_MODSEL_DATA(IP4_31_30, SCK2_A, SEL_SCIF2_0),
960 PINMUX_IPSR_DATA(IP4_31_30, VI0_G3),
961
962 /* IPSR5 */
963 PINMUX_IPSR_MODSEL_DATA(IP5_2_0, SD2_CLK_A, SEL_SDHI2_0),
964 PINMUX_IPSR_MODSEL_DATA(IP5_2_0, RX2_A, SEL_SCIF2_0),
965 PINMUX_IPSR_DATA(IP5_2_0, VI0_G4),
966 PINMUX_IPSR_MODSEL_DATA(IP5_2_0, ET0_RX_CLK_B, SEL_ET0_1),
967
968 PINMUX_IPSR_MODSEL_DATA(IP5_5_3, SD2_CMD_A, SEL_SDHI2_0),
969 PINMUX_IPSR_MODSEL_DATA(IP5_5_3, TX2_A, SEL_SCIF2_0),
970 PINMUX_IPSR_DATA(IP5_5_3, VI0_G5),
971 PINMUX_IPSR_MODSEL_DATA(IP5_5_3, ET0_ERXD2_B, SEL_ET0_1),
972
973 PINMUX_IPSR_MODSEL_DATA(IP5_8_6, SD2_DAT0_A, SEL_SDHI2_0),
974 PINMUX_IPSR_MODSEL_DATA(IP5_8_6, RX3_A, SEL_SCIF3_0),
975 PINMUX_IPSR_DATA(IP4_8_6, VI0_R0),
976 PINMUX_IPSR_MODSEL_DATA(IP4_8_6, ET0_ERXD2_B, SEL_ET0_1),
977
978 PINMUX_IPSR_MODSEL_DATA(IP5_11_9, SD2_DAT1_A, SEL_SDHI2_0),
979 PINMUX_IPSR_MODSEL_DATA(IP5_11_9, TX3_A, SEL_SCIF3_0),
980 PINMUX_IPSR_DATA(IP5_11_9, VI0_R1),
981 PINMUX_IPSR_MODSEL_DATA(IP5_11_9, ET0_MDIO_B, SEL_ET0_1),
982
983 PINMUX_IPSR_MODSEL_DATA(IP5_14_12, SD2_DAT2_A, SEL_SDHI2_0),
984 PINMUX_IPSR_MODSEL_DATA(IP5_14_12, RX4_A, SEL_SCIF4_0),
985 PINMUX_IPSR_DATA(IP5_14_12, VI0_R2),
986 PINMUX_IPSR_MODSEL_DATA(IP5_14_12, ET0_LINK_B, SEL_ET0_CTL_1),
987
988 PINMUX_IPSR_MODSEL_DATA(IP5_17_15, SD2_DAT3_A, SEL_SDHI2_0),
989 PINMUX_IPSR_MODSEL_DATA(IP5_17_15, TX4_A, SEL_SCIF4_0),
990 PINMUX_IPSR_DATA(IP5_17_15, VI0_R3),
991 PINMUX_IPSR_MODSEL_DATA(IP5_17_15, ET0_MAGIC_B, SEL_ET0_CTL_1),
992
993 PINMUX_IPSR_MODSEL_DATA(IP5_20_18, SD2_CD_A, SEL_SDHI2_0),
994 PINMUX_IPSR_MODSEL_DATA(IP5_20_18, RX5_A, SEL_SCIF5_0),
995 PINMUX_IPSR_DATA(IP5_20_18, VI0_R4),
996 PINMUX_IPSR_MODSEL_DATA(IP5_20_18, ET0_PHY_INT_B, SEL_ET0_CTL_1),
997
998 PINMUX_IPSR_MODSEL_DATA(IP5_22_21, SD2_WP_A, SEL_SDHI2_0),
999 PINMUX_IPSR_MODSEL_DATA(IP5_22_21, TX5_A, SEL_SCIF5_0),
1000 PINMUX_IPSR_DATA(IP5_22_21, VI0_R5),
1001
1002 PINMUX_IPSR_DATA(IP5_24_23, REF125CK),
1003 PINMUX_IPSR_DATA(IP5_24_23, ADTRG),
1004 PINMUX_IPSR_MODSEL_DATA(IP5_24_23, RX5_C, SEL_SCIF5_2),
1005 PINMUX_IPSR_DATA(IP5_26_25, REF50CK),
1006 PINMUX_IPSR_MODSEL_DATA(IP5_26_25, CTS1_E, SEL_SCIF1_3),
1007 PINMUX_IPSR_MODSEL_DATA(IP5_26_25, HCTS0_D, SEL_HSCIF_3),
1008
1009 /* IPSR6 */
1010 PINMUX_IPSR_DATA(IP6_2_0, DU0_DR0),
1011 PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SCIF_CLK_B, SEL_SCIF_CLK_1),
1012 PINMUX_IPSR_MODSEL_DATA(IP6_2_0, HRX0_D, SEL_HSCIF_3),
1013 PINMUX_IPSR_MODSEL_DATA(IP6_2_0, IETX_A, SEL_IEBUS_0),
1014 PINMUX_IPSR_MODSEL_DATA(IP6_2_0, TCLKA_A, SEL_MTU2_CLK_0),
1015 PINMUX_IPSR_DATA(IP6_2_0, HIFD00),
1016
1017 PINMUX_IPSR_DATA(IP6_5_3, DU0_DR1),
1018 PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SCK0_B, SEL_SCIF0_1),
1019 PINMUX_IPSR_MODSEL_DATA(IP6_5_3, HTX0_D, SEL_HSCIF_3),
1020 PINMUX_IPSR_MODSEL_DATA(IP6_5_3, IERX_A, SEL_IEBUS_0),
1021 PINMUX_IPSR_MODSEL_DATA(IP6_5_3, TCLKB_A, SEL_MTU2_CLK_0),
1022 PINMUX_IPSR_DATA(IP6_5_3, HIFD01),
1023
1024 PINMUX_IPSR_DATA(IP6_7_6, DU0_DR2),
1025 PINMUX_IPSR_MODSEL_DATA(IP6_7_6, RX0_B, SEL_SCIF0_1),
1026 PINMUX_IPSR_MODSEL_DATA(IP6_7_6, TCLKC_A, SEL_MTU2_CLK_0),
1027 PINMUX_IPSR_DATA(IP6_7_6, HIFD02),
1028
1029 PINMUX_IPSR_DATA(IP6_9_8, DU0_DR3),
1030 PINMUX_IPSR_MODSEL_DATA(IP6_9_8, TX0_B, SEL_SCIF0_1),
1031 PINMUX_IPSR_MODSEL_DATA(IP6_9_8, TCLKD_A, SEL_MTU2_CLK_0),
1032 PINMUX_IPSR_DATA(IP6_9_8, HIFD03),
1033
1034 PINMUX_IPSR_DATA(IP6_11_10, DU0_DR4),
1035 PINMUX_IPSR_MODSEL_DATA(IP6_11_10, CTS0_C, SEL_SCIF0_2),
1036 PINMUX_IPSR_MODSEL_DATA(IP6_11_10, TIOC0A_A, SEL_MTU2_CH0_0),
1037 PINMUX_IPSR_DATA(IP6_11_10, HIFD04),
1038
1039 PINMUX_IPSR_DATA(IP6_13_12, DU0_DR5),
1040 PINMUX_IPSR_MODSEL_DATA(IP6_13_12, RTS0_C, SEL_SCIF0_1),
1041 PINMUX_IPSR_MODSEL_DATA(IP6_13_12, TIOC0B_A, SEL_MTU2_CH0_0),
1042 PINMUX_IPSR_DATA(IP6_13_12, HIFD05),
1043
1044 PINMUX_IPSR_DATA(IP6_15_14, DU0_DR6),
1045 PINMUX_IPSR_MODSEL_DATA(IP6_15_14, SCK1_C, SEL_SCIF1_2),
1046 PINMUX_IPSR_MODSEL_DATA(IP6_15_14, TIOC0C_A, SEL_MTU2_CH0_0),
1047 PINMUX_IPSR_DATA(IP6_15_14, HIFD06),
1048
1049 PINMUX_IPSR_DATA(IP6_17_16, DU0_DR7),
1050 PINMUX_IPSR_MODSEL_DATA(IP6_17_16, RX1_C, SEL_SCIF1_2),
1051 PINMUX_IPSR_MODSEL_DATA(IP6_17_16, TIOC0D_A, SEL_MTU2_CH0_0),
1052 PINMUX_IPSR_DATA(IP6_17_16, HIFD07),
1053
1054 PINMUX_IPSR_DATA(IP6_20_18, DU0_DG0),
1055 PINMUX_IPSR_MODSEL_DATA(IP6_20_18, TX1_C, SEL_SCIF1_2),
1056 PINMUX_IPSR_MODSEL_DATA(IP6_20_18, HSCK0_D, SEL_HSCIF_3),
1057 PINMUX_IPSR_MODSEL_DATA(IP6_20_18, IECLK_A, SEL_IEBUS_0),
1058 PINMUX_IPSR_MODSEL_DATA(IP6_20_18, TIOC1A_A, SEL_MTU2_CH1_0),
1059 PINMUX_IPSR_DATA(IP6_20_18, HIFD08),
1060
1061 PINMUX_IPSR_DATA(IP6_23_21, DU0_DG1),
1062 PINMUX_IPSR_MODSEL_DATA(IP6_23_21, CTS1_C, SEL_SCIF1_2),
1063 PINMUX_IPSR_MODSEL_DATA(IP6_23_21, HRTS0_D, SEL_HSCIF_3),
1064 PINMUX_IPSR_MODSEL_DATA(IP6_23_21, TIOC1B_A, SEL_MTU2_CH1_0),
1065 PINMUX_IPSR_DATA(IP6_23_21, HIFD09),
1066
1067 /* IPSR7 */
1068 PINMUX_IPSR_DATA(IP7_2_0, DU0_DG2),
1069 PINMUX_IPSR_MODSEL_DATA(IP7_2_0, RTS1_C, SEL_SCIF1_2),
1070 PINMUX_IPSR_MODSEL_DATA(IP7_2_0, RMII0_MDC_B, SEL_RMII_1),
1071 PINMUX_IPSR_MODSEL_DATA(IP7_2_0, TIOC2A_A, SEL_MTU2_CH2_0),
1072 PINMUX_IPSR_DATA(IP7_2_0, HIFD10),
1073
1074 PINMUX_IPSR_DATA(IP7_5_3, DU0_DG3),
1075 PINMUX_IPSR_MODSEL_DATA(IP7_5_3, SCK2_C, SEL_SCIF2_2),
1076 PINMUX_IPSR_MODSEL_DATA(IP7_5_3, RMII0_MDIO_B, SEL_RMII_1),
1077 PINMUX_IPSR_MODSEL_DATA(IP7_5_3, TIOC2B_A, SEL_MTU2_CH2_0),
1078 PINMUX_IPSR_DATA(IP7_5_3, HIFD11),
1079
1080 PINMUX_IPSR_DATA(IP7_8_6, DU0_DG4),
1081 PINMUX_IPSR_MODSEL_DATA(IP7_8_6, RX2_C, SEL_SCIF2_2),
1082 PINMUX_IPSR_MODSEL_DATA(IP7_8_6, RMII0_CRS_DV_B, SEL_RMII_1),
1083 PINMUX_IPSR_MODSEL_DATA(IP7_8_6, TIOC3A_A, SEL_MTU2_CH3_0),
1084 PINMUX_IPSR_DATA(IP7_8_6, HIFD12),
1085
1086 PINMUX_IPSR_DATA(IP7_11_9, DU0_DG5),
1087 PINMUX_IPSR_MODSEL_DATA(IP7_11_9, TX2_C, SEL_SCIF2_2),
1088 PINMUX_IPSR_MODSEL_DATA(IP7_11_9, RMII0_RX_ER_B, SEL_RMII_1),
1089 PINMUX_IPSR_MODSEL_DATA(IP7_11_9, TIOC3B_A, SEL_MTU2_CH3_0),
1090 PINMUX_IPSR_DATA(IP7_11_9, HIFD13),
1091
1092 PINMUX_IPSR_DATA(IP7_14_12, DU0_DG6),
1093 PINMUX_IPSR_MODSEL_DATA(IP7_14_12, RX3_C, SEL_SCIF3_2),
1094 PINMUX_IPSR_MODSEL_DATA(IP7_14_12, RMII0_RXD0_B, SEL_RMII_1),
1095 PINMUX_IPSR_MODSEL_DATA(IP7_14_12, TIOC3C_A, SEL_MTU2_CH3_0),
1096 PINMUX_IPSR_DATA(IP7_14_12, HIFD14),
1097
1098 PINMUX_IPSR_DATA(IP7_17_15, DU0_DG7),
1099 PINMUX_IPSR_MODSEL_DATA(IP7_17_15, TX3_C, SEL_SCIF3_2),
1100 PINMUX_IPSR_MODSEL_DATA(IP7_17_15, RMII0_RXD1_B, SEL_RMII_1),
1101 PINMUX_IPSR_MODSEL_DATA(IP7_17_15, TIOC3D_A, SEL_MTU2_CH3_0),
1102 PINMUX_IPSR_DATA(IP7_17_15, HIFD15),
1103
1104 PINMUX_IPSR_DATA(IP7_20_18, DU0_DB0),
1105 PINMUX_IPSR_MODSEL_DATA(IP7_20_18, RX4_C, SEL_SCIF4_2),
1106 PINMUX_IPSR_MODSEL_DATA(IP7_20_18, RMII0_TXD_EN_B, SEL_RMII_1),
1107 PINMUX_IPSR_MODSEL_DATA(IP7_20_18, TIOC4A_A, SEL_MTU2_CH4_0),
1108 PINMUX_IPSR_DATA(IP7_20_18, HIFCS),
1109
1110 PINMUX_IPSR_DATA(IP7_23_21, DU0_DB1),
1111 PINMUX_IPSR_MODSEL_DATA(IP7_23_21, TX4_C, SEL_SCIF4_2),
1112 PINMUX_IPSR_MODSEL_DATA(IP7_23_21, RMII0_TXD0_B, SEL_RMII_1),
1113 PINMUX_IPSR_MODSEL_DATA(IP7_23_21, TIOC4B_A, SEL_MTU2_CH4_0),
1114 PINMUX_IPSR_DATA(IP7_23_21, HIFWR),
1115
1116 PINMUX_IPSR_DATA(IP7_26_24, DU0_DB2),
1117 PINMUX_IPSR_MODSEL_DATA(IP7_26_24, RX5_B, SEL_SCIF5_1),
1118 PINMUX_IPSR_MODSEL_DATA(IP7_26_24, RMII0_TXD1_B, SEL_RMII_1),
1119 PINMUX_IPSR_MODSEL_DATA(IP7_26_24, TIOC4C_A, SEL_MTU2_CH4_0),
1120
1121 PINMUX_IPSR_DATA(IP7_28_27, DU0_DB3),
1122 PINMUX_IPSR_MODSEL_DATA(IP7_28_27, TX5_B, SEL_SCIF5_1),
1123 PINMUX_IPSR_MODSEL_DATA(IP7_28_27, TIOC4D_A, SEL_MTU2_CH4_0),
1124 PINMUX_IPSR_DATA(IP7_28_27, HIFRD),
1125
1126 PINMUX_IPSR_DATA(IP7_30_29, DU0_DB4),
1127 PINMUX_IPSR_DATA(IP7_30_29, HIFINT),
1128
1129 /* IPSR8 */
1130 PINMUX_IPSR_DATA(IP8_1_0, DU0_DB5),
1131 PINMUX_IPSR_DATA(IP8_1_0, HIFDREQ),
1132
1133 PINMUX_IPSR_DATA(IP8_3_2, DU0_DB6),
1134 PINMUX_IPSR_DATA(IP8_3_2, HIFRDY),
1135
1136 PINMUX_IPSR_DATA(IP8_5_4, DU0_DB7),
1137 PINMUX_IPSR_MODSEL_DATA(IP8_5_4, SSI_SCK0_B, SEL_SSI0_1),
1138 PINMUX_IPSR_MODSEL_DATA(IP8_5_4, HIFEBL_B, SEL_HIF_1),
1139
1140 PINMUX_IPSR_DATA(IP8_7_6, DU0_DOTCLKIN),
1141 PINMUX_IPSR_MODSEL_DATA(IP8_7_6, HSPI_CS0_C, SEL_HSPI_2),
1142 PINMUX_IPSR_MODSEL_DATA(IP8_7_6, SSI_WS0_B, SEL_SSI0_1),
1143
1144 PINMUX_IPSR_DATA(IP8_9_8, DU0_DOTCLKOUT),
1145 PINMUX_IPSR_MODSEL_DATA(IP8_9_8, HSPI_CLK0_C, SEL_HSPI_2),
1146 PINMUX_IPSR_MODSEL_DATA(IP8_9_8, SSI_SDATA0_B, SEL_SSI0_1),
1147
1148 PINMUX_IPSR_DATA(IP8_11_10, DU0_EXHSYNC_DU0_HSYNC),
1149 PINMUX_IPSR_MODSEL_DATA(IP8_11_10, HSPI_TX0_C, SEL_HSPI_2),
1150 PINMUX_IPSR_MODSEL_DATA(IP8_11_10, SSI_SCK1_B, SEL_SSI1_1),
1151
1152 PINMUX_IPSR_DATA(IP8_13_12, DU0_EXVSYNC_DU0_VSYNC),
1153 PINMUX_IPSR_MODSEL_DATA(IP8_13_12, HSPI_RX0_C, SEL_HSPI_2),
1154 PINMUX_IPSR_MODSEL_DATA(IP8_13_12, SSI_WS1_B, SEL_SSI1_1),
1155
1156 PINMUX_IPSR_DATA(IP8_15_14, DU0_EXODDF_DU0_ODDF),
1157 PINMUX_IPSR_MODSEL_DATA(IP8_15_14, CAN0_RX_B, SEL_RCAN0_1),
1158 PINMUX_IPSR_MODSEL_DATA(IP8_15_14, HSCK0_B, SEL_HSCIF_1),
1159 PINMUX_IPSR_MODSEL_DATA(IP8_15_14, SSI_SDATA1_B, SEL_SSI1_1),
1160
1161 PINMUX_IPSR_DATA(IP8_17_16, DU0_DISP),
1162 PINMUX_IPSR_MODSEL_DATA(IP8_17_16, CAN0_TX_B, SEL_RCAN0_1),
1163 PINMUX_IPSR_MODSEL_DATA(IP8_17_16, HRX0_B, SEL_HSCIF_1),
1164 PINMUX_IPSR_MODSEL_DATA(IP8_17_16, AUDIO_CLKA_B, SEL_AUDIO_CLKA_1),
1165
1166 PINMUX_IPSR_DATA(IP8_19_18, DU0_CDE),
1167 PINMUX_IPSR_MODSEL_DATA(IP8_19_18, HTX0_B, SEL_HSCIF_1),
1168 PINMUX_IPSR_MODSEL_DATA(IP8_19_18, AUDIO_CLKB_B, SEL_AUDIO_CLKB_1),
1169 PINMUX_IPSR_MODSEL_DATA(IP8_19_18, LCD_VCPWC_B, SEL_LCDC_1),
1170
1171 PINMUX_IPSR_MODSEL_DATA(IP8_22_20, IRQ0_A, SEL_INTC_0),
1172 PINMUX_IPSR_MODSEL_DATA(IP8_22_20, HSPI_TX_B, SEL_HSPI_1),
1173 PINMUX_IPSR_MODSEL_DATA(IP8_22_20, RX3_E, SEL_SCIF3_4),
1174 PINMUX_IPSR_DATA(IP8_22_20, ET0_ERXD0),
1175
1176 PINMUX_IPSR_MODSEL_DATA(IP8_25_23, IRQ1_A, SEL_INTC_0),
1177 PINMUX_IPSR_MODSEL_DATA(IP8_25_23, HSPI_RX_B, SEL_HSPI_1),
1178 PINMUX_IPSR_MODSEL_DATA(IP8_25_23, TX3_E, SEL_SCIF3_4),
1179 PINMUX_IPSR_DATA(IP8_25_23, ET0_ERXD1),
1180
1181 PINMUX_IPSR_MODSEL_DATA(IP8_27_26, IRQ2_A, SEL_INTC_0),
1182 PINMUX_IPSR_MODSEL_DATA(IP8_27_26, CTS0_A, SEL_SCIF0_0),
1183 PINMUX_IPSR_MODSEL_DATA(IP8_27_26, HCTS0_B, SEL_HSCIF_1),
1184 PINMUX_IPSR_MODSEL_DATA(IP8_27_26, ET0_ERXD2_A, SEL_ET0_0),
1185
1186 PINMUX_IPSR_MODSEL_DATA(IP8_29_28, IRQ3_A, SEL_INTC_0),
1187 PINMUX_IPSR_MODSEL_DATA(IP8_29_28, RTS0_A, SEL_SCIF0_0),
1188 PINMUX_IPSR_MODSEL_DATA(IP8_29_28, HRTS0_B, SEL_HSCIF_1),
1189 PINMUX_IPSR_MODSEL_DATA(IP8_29_28, ET0_ERXD3_A, SEL_ET0_0),
1190
1191 /* IPSR9 */
1192 PINMUX_IPSR_MODSEL_DATA(IP9_1_0, VI1_CLK_A, SEL_VIN1_0),
1193 PINMUX_IPSR_MODSEL_DATA(IP9_1_0, FD0_B, SEL_FLCTL_1),
1194 PINMUX_IPSR_MODSEL_DATA(IP9_1_0, LCD_DATA0_B, SEL_LCDC_1),
1195
1196 PINMUX_IPSR_MODSEL_DATA(IP9_3_2, VI1_0_A, SEL_VIN1_0),
1197 PINMUX_IPSR_MODSEL_DATA(IP9_3_2, FD1_B, SEL_FLCTL_1),
1198 PINMUX_IPSR_MODSEL_DATA(IP9_3_2, LCD_DATA1_B, SEL_LCDC_1),
1199
1200 PINMUX_IPSR_MODSEL_DATA(IP9_5_4, VI1_1_A, SEL_VIN1_0),
1201 PINMUX_IPSR_MODSEL_DATA(IP9_5_4, FD2_B, SEL_FLCTL_1),
1202 PINMUX_IPSR_MODSEL_DATA(IP9_5_4, LCD_DATA2_B, SEL_LCDC_1),
1203
1204 PINMUX_IPSR_MODSEL_DATA(IP9_7_6, VI1_2_A, SEL_VIN1_0),
1205 PINMUX_IPSR_MODSEL_DATA(IP9_7_6, FD3_B, SEL_FLCTL_1),
1206 PINMUX_IPSR_MODSEL_DATA(IP9_7_6, LCD_DATA3_B, SEL_LCDC_1),
1207
1208 PINMUX_IPSR_MODSEL_DATA(IP9_9_8, VI1_3_A, SEL_VIN1_0),
1209 PINMUX_IPSR_MODSEL_DATA(IP9_9_8, FD4_B, SEL_FLCTL_1),
1210 PINMUX_IPSR_MODSEL_DATA(IP9_9_8, LCD_DATA4_B, SEL_LCDC_1),
1211
1212 PINMUX_IPSR_MODSEL_DATA(IP9_11_10, VI1_4_A, SEL_VIN1_0),
1213 PINMUX_IPSR_MODSEL_DATA(IP9_11_10, FD5_B, SEL_FLCTL_1),
1214 PINMUX_IPSR_MODSEL_DATA(IP9_11_10, LCD_DATA5_B, SEL_LCDC_1),
1215
1216 PINMUX_IPSR_MODSEL_DATA(IP9_13_12, VI1_5_A, SEL_VIN1_0),
1217 PINMUX_IPSR_MODSEL_DATA(IP9_13_12, FD6_B, SEL_FLCTL_1),
1218 PINMUX_IPSR_MODSEL_DATA(IP9_13_12, LCD_DATA6_B, SEL_LCDC_1),
1219
1220 PINMUX_IPSR_MODSEL_DATA(IP9_15_14, VI1_6_A, SEL_VIN1_0),
1221 PINMUX_IPSR_MODSEL_DATA(IP9_15_14, FD7_B, SEL_FLCTL_1),
1222 PINMUX_IPSR_MODSEL_DATA(IP9_15_14, LCD_DATA7_B, SEL_LCDC_1),
1223
1224 PINMUX_IPSR_MODSEL_DATA(IP9_17_16, VI1_7_A, SEL_VIN1_0),
1225 PINMUX_IPSR_MODSEL_DATA(IP9_17_16, FCE_B, SEL_FLCTL_1),
1226 PINMUX_IPSR_MODSEL_DATA(IP9_17_16, LCD_DATA8_B, SEL_LCDC_1),
1227
1228 PINMUX_IPSR_MODSEL_DATA(IP9_19_18, SSI_SCK0_A, SEL_SSI0_0),
1229 PINMUX_IPSR_MODSEL_DATA(IP9_19_18, TIOC1A_B, SEL_MTU2_CH1_1),
1230 PINMUX_IPSR_MODSEL_DATA(IP9_19_18, LCD_DATA9_B, SEL_LCDC_1),
1231
1232 PINMUX_IPSR_MODSEL_DATA(IP9_21_20, SSI_WS0_A, SEL_SSI0_0),
1233 PINMUX_IPSR_MODSEL_DATA(IP9_21_20, TIOC1B_B, SEL_MTU2_CH1_1),
1234 PINMUX_IPSR_MODSEL_DATA(IP9_21_20, LCD_DATA10_B, SEL_LCDC_1),
1235
1236 PINMUX_IPSR_MODSEL_DATA(IP9_23_22, SSI_SDATA0_A, SEL_SSI0_0),
1237 PINMUX_IPSR_MODSEL_DATA(IP9_23_22, VI1_0_B, SEL_VIN1_1),
1238 PINMUX_IPSR_MODSEL_DATA(IP9_23_22, TIOC2A_B, SEL_MTU2_CH2_1),
1239 PINMUX_IPSR_MODSEL_DATA(IP9_23_22, LCD_DATA11_B, SEL_LCDC_1),
1240
1241 PINMUX_IPSR_MODSEL_DATA(IP9_25_24, SSI_SCK1_A, SEL_SSI1_0),
1242 PINMUX_IPSR_MODSEL_DATA(IP9_25_24, VI1_1_B, SEL_VIN1_1),
1243 PINMUX_IPSR_MODSEL_DATA(IP9_25_24, TIOC2B_B, SEL_MTU2_CH2_1),
1244 PINMUX_IPSR_MODSEL_DATA(IP9_25_24, LCD_DATA12_B, SEL_LCDC_1),
1245
1246 PINMUX_IPSR_MODSEL_DATA(IP9_27_26, SSI_WS1_A, SEL_SSI1_0),
1247 PINMUX_IPSR_MODSEL_DATA(IP9_27_26, VI1_2_B, SEL_VIN1_1),
1248 PINMUX_IPSR_MODSEL_DATA(IP9_27_26, LCD_DATA13_B, SEL_LCDC_1),
1249
1250 PINMUX_IPSR_MODSEL_DATA(IP9_29_28, SSI_SDATA1_A, SEL_SSI1_0),
1251 PINMUX_IPSR_MODSEL_DATA(IP9_29_28, VI1_3_B, SEL_VIN1_1),
1252 PINMUX_IPSR_MODSEL_DATA(IP9_29_28, LCD_DATA14_B, SEL_LCDC_1),
1253
1254 /* IPSE10 */
1255 PINMUX_IPSR_DATA(IP10_2_0, SSI_SCK23),
1256 PINMUX_IPSR_MODSEL_DATA(IP10_2_0, VI1_4_B, SEL_VIN1_1),
1257 PINMUX_IPSR_MODSEL_DATA(IP10_2_0, RX1_D, SEL_SCIF1_3),
1258 PINMUX_IPSR_MODSEL_DATA(IP10_2_0, FCLE_B, SEL_FLCTL_1),
1259 PINMUX_IPSR_MODSEL_DATA(IP10_2_0, LCD_DATA15_B, SEL_LCDC_1),
1260
1261 PINMUX_IPSR_DATA(IP10_5_3, SSI_WS23),
1262 PINMUX_IPSR_MODSEL_DATA(IP10_5_3, VI1_5_B, SEL_VIN1_1),
1263 PINMUX_IPSR_MODSEL_DATA(IP10_5_3, TX1_D, SEL_SCIF1_3),
1264 PINMUX_IPSR_MODSEL_DATA(IP10_5_3, HSCK0_C, SEL_HSCIF_2),
1265 PINMUX_IPSR_MODSEL_DATA(IP10_5_3, FALE_B, SEL_FLCTL_1),
1266 PINMUX_IPSR_MODSEL_DATA(IP10_5_3, LCD_DON_B, SEL_LCDC_1),
1267
1268 PINMUX_IPSR_DATA(IP10_8_6, SSI_SDATA2),
1269 PINMUX_IPSR_MODSEL_DATA(IP10_8_6, VI1_6_B, SEL_VIN1_1),
1270 PINMUX_IPSR_MODSEL_DATA(IP10_8_6, HRX0_C, SEL_HSCIF_2),
1271 PINMUX_IPSR_MODSEL_DATA(IP10_8_6, FRE_B, SEL_FLCTL_1),
1272 PINMUX_IPSR_MODSEL_DATA(IP10_8_6, LCD_CL1_B, SEL_LCDC_1),
1273
1274 PINMUX_IPSR_DATA(IP10_11_9, SSI_SDATA3),
1275 PINMUX_IPSR_MODSEL_DATA(IP10_11_9, VI1_7_B, SEL_VIN1_1),
1276 PINMUX_IPSR_MODSEL_DATA(IP10_11_9, HTX0_C, SEL_HSCIF_2),
1277 PINMUX_IPSR_MODSEL_DATA(IP10_11_9, FWE_B, SEL_FLCTL_1),
1278 PINMUX_IPSR_MODSEL_DATA(IP10_11_9, LCD_CL2_B, SEL_LCDC_1),
1279
1280 PINMUX_IPSR_MODSEL_DATA(IP10_14_12, AUDIO_CLKA_A, SEL_AUDIO_CLKA_0),
1281 PINMUX_IPSR_MODSEL_DATA(IP10_14_12, VI1_CLK_B, SEL_VIN1_1),
1282 PINMUX_IPSR_MODSEL_DATA(IP10_14_12, SCK1_D, SEL_SCIF1_3),
1283 PINMUX_IPSR_MODSEL_DATA(IP10_14_12, IECLK_B, SEL_IEBUS_1),
1284 PINMUX_IPSR_MODSEL_DATA(IP10_14_12, LCD_FLM_B, SEL_LCDC_1),
1285
1286 PINMUX_IPSR_MODSEL_DATA(IP10_15, AUDIO_CLKB_A, SEL_AUDIO_CLKB_0),
1287 PINMUX_IPSR_MODSEL_DATA(IP10_15, LCD_CLK_B, SEL_LCDC_1),
1288
1289 PINMUX_IPSR_DATA(IP10_18_16, AUDIO_CLKC),
1290 PINMUX_IPSR_MODSEL_DATA(IP10_18_16, SCK1_E, SEL_SCIF1_4),
1291 PINMUX_IPSR_MODSEL_DATA(IP10_18_16, HCTS0_C, SEL_HSCIF_2),
1292 PINMUX_IPSR_MODSEL_DATA(IP10_18_16, FRB_B, SEL_FLCTL_1),
1293 PINMUX_IPSR_MODSEL_DATA(IP10_18_16, LCD_VEPWC_B, SEL_LCDC_1),
1294
1295 PINMUX_IPSR_DATA(IP10_21_19, AUDIO_CLKOUT),
1296 PINMUX_IPSR_MODSEL_DATA(IP10_21_19, TX1_E, SEL_SCIF1_4),
1297 PINMUX_IPSR_MODSEL_DATA(IP10_21_19, HRTS0_C, SEL_HSCIF_2),
1298 PINMUX_IPSR_MODSEL_DATA(IP10_21_19, FSE_B, SEL_FLCTL_1),
1299 PINMUX_IPSR_MODSEL_DATA(IP10_21_19, LCD_M_DISP_B, SEL_LCDC_1),
1300
1301 PINMUX_IPSR_MODSEL_DATA(IP10_22, CAN_CLK_A, SEL_RCAN_CLK_0),
1302 PINMUX_IPSR_MODSEL_DATA(IP10_22, RX4_D, SEL_SCIF4_3),
1303
1304 PINMUX_IPSR_MODSEL_DATA(IP10_24_23, CAN0_TX_A, SEL_RCAN0_0),
1305 PINMUX_IPSR_MODSEL_DATA(IP10_24_23, TX4_D, SEL_SCIF4_3),
1306 PINMUX_IPSR_DATA(IP10_24_23, MLB_CLK),
1307
1308 PINMUX_IPSR_MODSEL_DATA(IP10_25, CAN1_RX_A, SEL_RCAN1_0),
1309 PINMUX_IPSR_MODSEL_DATA(IP10_25, IRQ1_B, SEL_INTC_1),
1310
1311 PINMUX_IPSR_MODSEL_DATA(IP10_27_26, CAN0_RX_A, SEL_RCAN0_0),
1312 PINMUX_IPSR_MODSEL_DATA(IP10_27_26, IRQ0_B, SEL_INTC_1),
1313 PINMUX_IPSR_DATA(IP10_27_26, MLB_SIG),
1314
1315 PINMUX_IPSR_MODSEL_DATA(IP10_29_28, CAN1_TX_A, SEL_RCAN1_0),
1316 PINMUX_IPSR_MODSEL_DATA(IP10_29_28, TX5_C, SEL_SCIF1_2),
1317 PINMUX_IPSR_DATA(IP10_29_28, MLB_DAT),
1318
1319 /* IPSR11 */
1320 PINMUX_IPSR_DATA(IP11_0, SCL1),
1321 PINMUX_IPSR_MODSEL_DATA(IP11_0, SCIF_CLK_C, SEL_SCIF_CLK_2),
1322
1323 PINMUX_IPSR_DATA(IP11_1, SDA1),
1324 PINMUX_IPSR_MODSEL_DATA(IP11_0, RX1_E, SEL_SCIF1_4),
1325
1326 PINMUX_IPSR_DATA(IP11_2, SDA0),
1327 PINMUX_IPSR_MODSEL_DATA(IP11_2, HIFEBL_A, SEL_HIF_0),
1328
1329 PINMUX_IPSR_DATA(IP11_3, SDSELF),
1330 PINMUX_IPSR_MODSEL_DATA(IP11_3, RTS1_E, SEL_SCIF1_3),
1331
1332 PINMUX_IPSR_MODSEL_DATA(IP11_6_4, SCIF_CLK_A, SEL_SCIF_CLK_0),
1333 PINMUX_IPSR_MODSEL_DATA(IP11_6_4, HSPI_CLK_A, SEL_HSPI_0),
1334 PINMUX_IPSR_DATA(IP11_6_4, VI0_CLK),
1335 PINMUX_IPSR_MODSEL_DATA(IP11_6_4, RMII0_TXD0_A, SEL_RMII_0),
1336 PINMUX_IPSR_DATA(IP11_6_4, ET0_ERXD4),
1337
1338 PINMUX_IPSR_MODSEL_DATA(IP11_9_7, SCK0_A, SEL_SCIF0_0),
1339 PINMUX_IPSR_MODSEL_DATA(IP11_9_7, HSPI_CS_A, SEL_HSPI_0),
1340 PINMUX_IPSR_DATA(IP11_9_7, VI0_CLKENB),
1341 PINMUX_IPSR_MODSEL_DATA(IP11_9_7, RMII0_TXD1_A, SEL_RMII_0),
1342 PINMUX_IPSR_DATA(IP11_9_7, ET0_ERXD5),
1343
1344 PINMUX_IPSR_MODSEL_DATA(IP11_11_10, RX0_A, SEL_SCIF0_0),
1345 PINMUX_IPSR_MODSEL_DATA(IP11_11_10, HSPI_RX_A, SEL_HSPI_0),
1346 PINMUX_IPSR_MODSEL_DATA(IP11_11_10, RMII0_RXD0_A, SEL_RMII_0),
1347 PINMUX_IPSR_DATA(IP11_11_10, ET0_ERXD6),
1348
1349 PINMUX_IPSR_MODSEL_DATA(IP11_12, TX0_A, SEL_SCIF0_0),
1350 PINMUX_IPSR_MODSEL_DATA(IP11_12, HSPI_TX_A, SEL_HSPI_0),
1351
1352 PINMUX_IPSR_DATA(IP11_15_13, PENC1),
1353 PINMUX_IPSR_MODSEL_DATA(IP11_15_13, TX3_D, SEL_SCIF3_3),
1354 PINMUX_IPSR_MODSEL_DATA(IP11_15_13, CAN1_TX_B, SEL_RCAN1_1),
1355 PINMUX_IPSR_MODSEL_DATA(IP11_15_13, TX5_D, SEL_SCIF5_3),
1356 PINMUX_IPSR_MODSEL_DATA(IP11_15_13, IETX_B, SEL_IEBUS_1),
1357
1358 PINMUX_IPSR_DATA(IP11_18_16, USB_OVC1),
1359 PINMUX_IPSR_MODSEL_DATA(IP11_18_16, RX3_D, SEL_SCIF3_3),
1360 PINMUX_IPSR_MODSEL_DATA(IP11_18_16, CAN1_RX_B, SEL_RCAN1_1),
1361 PINMUX_IPSR_MODSEL_DATA(IP11_18_16, RX5_D, SEL_SCIF5_3),
1362 PINMUX_IPSR_MODSEL_DATA(IP11_18_16, IERX_B, SEL_IEBUS_1),
1363
1364 PINMUX_IPSR_DATA(IP11_20_19, DREQ0),
1365 PINMUX_IPSR_MODSEL_DATA(IP11_20_19, SD1_CLK_A, SEL_SDHI1_0),
1366 PINMUX_IPSR_DATA(IP11_20_19, ET0_TX_EN),
1367
1368 PINMUX_IPSR_DATA(IP11_22_21, DACK0),
1369 PINMUX_IPSR_MODSEL_DATA(IP11_22_21, SD1_DAT3_A, SEL_SDHI1_0),
1370 PINMUX_IPSR_DATA(IP11_22_21, ET0_TX_ER),
1371
1372 PINMUX_IPSR_DATA(IP11_25_23, DREQ1),
1373 PINMUX_IPSR_MODSEL_DATA(IP11_25_23, HSPI_CLK_B, SEL_HSPI_1),
1374 PINMUX_IPSR_MODSEL_DATA(IP11_25_23, RX4_B, SEL_SCIF4_1),
1375 PINMUX_IPSR_MODSEL_DATA(IP11_25_23, ET0_PHY_INT_C, SEL_ET0_CTL_0),
1376 PINMUX_IPSR_MODSEL_DATA(IP11_25_23, ET0_TX_CLK_A, SEL_ET0_0),
1377
1378 PINMUX_IPSR_DATA(IP11_27_26, DACK1),
1379 PINMUX_IPSR_MODSEL_DATA(IP11_27_26, HSPI_CS_B, SEL_HSPI_1),
1380 PINMUX_IPSR_MODSEL_DATA(IP11_27_26, TX4_B, SEL_SCIF3_1),
1381 PINMUX_IPSR_MODSEL_DATA(IP11_27_26, ET0_RX_CLK_A, SEL_ET0_0),
1382
1383 PINMUX_IPSR_DATA(IP11_28, PRESETOUT),
1384 PINMUX_IPSR_DATA(IP11_28, ST_CLKOUT),
1385};
1386
1387static struct pinmux_gpio pinmux_gpios[] = {
1388 PINMUX_GPIO_GP_ALL(),
1389
1390 GPIO_FN(CLKOUT), GPIO_FN(BS), GPIO_FN(CS0), GPIO_FN(EX_CS0),
1391 GPIO_FN(RD), GPIO_FN(WE0), GPIO_FN(WE1),
1392 GPIO_FN(SCL0), GPIO_FN(PENC0), GPIO_FN(USB_OVC0),
1393 GPIO_FN(IRQ2_B), GPIO_FN(IRQ3_B),
1394
1395 /* IPSR0 */
1396 GPIO_FN(A0), GPIO_FN(ST0_CLKIN), GPIO_FN(LCD_DATA0_A),
1397 GPIO_FN(TCLKA_C),
1398 GPIO_FN(A1), GPIO_FN(ST0_REQ), GPIO_FN(LCD_DATA1_A),
1399 GPIO_FN(TCLKB_C),
1400 GPIO_FN(A2), GPIO_FN(ST0_SYC), GPIO_FN(LCD_DATA2_A),
1401 GPIO_FN(TCLKC_C),
1402 GPIO_FN(A3), GPIO_FN(ST0_VLD), GPIO_FN(LCD_DATA3_A),
1403 GPIO_FN(TCLKD_C),
1404 GPIO_FN(A4), GPIO_FN(ST0_D0), GPIO_FN(LCD_DATA4_A),
1405 GPIO_FN(TIOC0A_C),
1406 GPIO_FN(A5), GPIO_FN(ST0_D1), GPIO_FN(LCD_DATA5_A),
1407 GPIO_FN(TIOC0B_C),
1408 GPIO_FN(A6), GPIO_FN(ST0_D2), GPIO_FN(LCD_DATA6_A),
1409 GPIO_FN(TIOC0C_C),
1410 GPIO_FN(A7), GPIO_FN(ST0_D3), GPIO_FN(LCD_DATA7_A),
1411 GPIO_FN(TIOC0D_C),
1412 GPIO_FN(A8), GPIO_FN(ST0_D4), GPIO_FN(LCD_DATA8_A),
1413 GPIO_FN(TIOC1A_C),
1414 GPIO_FN(A9), GPIO_FN(ST0_D5), GPIO_FN(LCD_DATA9_A),
1415 GPIO_FN(TIOC1B_C),
1416 GPIO_FN(A10), GPIO_FN(ST0_D6), GPIO_FN(LCD_DATA10_A),
1417 GPIO_FN(TIOC2A_C),
1418 GPIO_FN(A11), GPIO_FN(ST0_D7), GPIO_FN(LCD_DATA11_A),
1419 GPIO_FN(TIOC2B_C),
1420 GPIO_FN(A12), GPIO_FN(LCD_DATA12_A), GPIO_FN(TIOC3A_C),
1421 GPIO_FN(A13), GPIO_FN(LCD_DATA13_A), GPIO_FN(TIOC3B_C),
1422 GPIO_FN(A14), GPIO_FN(LCD_DATA14_A), GPIO_FN(TIOC3C_C),
1423 GPIO_FN(A15), GPIO_FN(ST0_VCO_CLKIN), GPIO_FN(LCD_DATA15_A),
1424 GPIO_FN(TIOC3D_C),
1425
1426 /* IPSR1 */
1427 GPIO_FN(A16), GPIO_FN(ST0_PWM), GPIO_FN(LCD_DON_A),
1428 GPIO_FN(TIOC4A_C),
1429 GPIO_FN(A17), GPIO_FN(ST1_VCO_CLKIN), GPIO_FN(LCD_CL1_A),
1430 GPIO_FN(TIOC4B_C),
1431 GPIO_FN(A18), GPIO_FN(ST1_PWM), GPIO_FN(LCD_CL2_A),
1432 GPIO_FN(TIOC4C_C),
1433 GPIO_FN(A19), GPIO_FN(ST1_CLKIN), GPIO_FN(LCD_CLK_A),
1434 GPIO_FN(TIOC4D_C),
1435 GPIO_FN(A20), GPIO_FN(ST1_REQ), GPIO_FN(LCD_FLM_A),
1436 GPIO_FN(A21), GPIO_FN(ST1_SYC), GPIO_FN(LCD_VCPWC_A),
1437 GPIO_FN(A22), GPIO_FN(ST1_VLD), GPIO_FN(LCD_VEPWC_A),
1438 GPIO_FN(A23), GPIO_FN(ST1_D0), GPIO_FN(LCD_M_DISP_A),
1439 GPIO_FN(A24), GPIO_FN(RX2_D), GPIO_FN(ST1_D1),
1440 GPIO_FN(A25), GPIO_FN(TX2_D), GPIO_FN(ST1_D2),
1441 GPIO_FN(D0), GPIO_FN(SD0_DAT0_A), GPIO_FN(MMC_D0_A),
1442 GPIO_FN(ST1_D3), GPIO_FN(FD0_A),
1443 GPIO_FN(D1), GPIO_FN(SD0_DAT1_A), GPIO_FN(MMC_D1_A),
1444 GPIO_FN(ST1_D4), GPIO_FN(FD1_A),
1445 GPIO_FN(D2), GPIO_FN(SD0_DAT2_A), GPIO_FN(MMC_D2_A),
1446 GPIO_FN(ST1_D5), GPIO_FN(FD2_A),
1447 GPIO_FN(D3), GPIO_FN(SD0_DAT3_A), GPIO_FN(MMC_D3_A),
1448 GPIO_FN(ST1_D6), GPIO_FN(FD3_A),
1449
1450 /* IPSR2 */
1451 GPIO_FN(D4), GPIO_FN(SD0_CD_A), GPIO_FN(MMC_D4_A), GPIO_FN(ST1_D7),
1452 GPIO_FN(FD4_A),
1453 GPIO_FN(D5), GPIO_FN(SD0_WP_A), GPIO_FN(MMC_D5_A), GPIO_FN(FD5_A),
1454 GPIO_FN(D6), GPIO_FN(RSPI_RSPCK_A), GPIO_FN(MMC_D6_A),
1455 GPIO_FN(QSPCLK_A),
1456 GPIO_FN(FD6_A),
1457 GPIO_FN(D7), GPIO_FN(RSPI_SSL_A), GPIO_FN(MMC_D7_A), GPIO_FN(QSSL_A),
1458 GPIO_FN(FD7_A),
1459 GPIO_FN(D8), GPIO_FN(SD0_CLK_A), GPIO_FN(MMC_CLK_A), GPIO_FN(QIO2_A),
1460 GPIO_FN(FCE_A), GPIO_FN(ET0_GTX_CLK_B),
1461 GPIO_FN(D9), GPIO_FN(SD0_CMD_A), GPIO_FN(MMC_CMD_A), GPIO_FN(QIO3_A),
1462 GPIO_FN(FCLE_A), GPIO_FN(ET0_ETXD1_B),
1463 GPIO_FN(D10), GPIO_FN(RSPI_MOSI_A), GPIO_FN(QMO_QIO0_A),
1464 GPIO_FN(FALE_A), GPIO_FN(ET0_ETXD2_B),
1465 GPIO_FN(D11), GPIO_FN(RSPI_MISO_A), GPIO_FN(QMI_QIO1_A), GPIO_FN(FRE_A),
1466 GPIO_FN(ET0_ETXD3_B),
1467 GPIO_FN(D12), GPIO_FN(FWE_A), GPIO_FN(ET0_ETXD5_B),
1468 GPIO_FN(D13), GPIO_FN(RX2_B), GPIO_FN(FRB_A), GPIO_FN(ET0_ETXD6_B),
1469 GPIO_FN(D14), GPIO_FN(TX2_B), GPIO_FN(FSE_A), GPIO_FN(ET0_TX_CLK_B),
1470
1471 /* IPSR3 */
1472 GPIO_FN(D15), GPIO_FN(SCK2_B),
1473 GPIO_FN(CS1_A26), GPIO_FN(QIO3_B),
1474 GPIO_FN(EX_CS1), GPIO_FN(RX3_B), GPIO_FN(ATACS0), GPIO_FN(QIO2_B),
1475 GPIO_FN(ET0_ETXD0),
1476 GPIO_FN(EX_CS2), GPIO_FN(TX3_B), GPIO_FN(ATACS1), GPIO_FN(QSPCLK_B),
1477 GPIO_FN(ET0_GTX_CLK_A),
1478 GPIO_FN(EX_CS3), GPIO_FN(SD1_CD_A), GPIO_FN(ATARD), GPIO_FN(QMO_QIO0_B),
1479 GPIO_FN(ET0_ETXD1_A),
1480 GPIO_FN(EX_CS4), GPIO_FN(SD1_WP_A), GPIO_FN(ATAWR), GPIO_FN(QMI_QIO1_B),
1481 GPIO_FN(ET0_ETXD2_A),
1482 GPIO_FN(EX_CS5), GPIO_FN(SD1_CMD_A), GPIO_FN(ATADIR), GPIO_FN(QSSL_B),
1483 GPIO_FN(ET0_ETXD3_A),
1484 GPIO_FN(RD_WR), GPIO_FN(TCLK1_B),
1485 GPIO_FN(EX_WAIT0), GPIO_FN(TCLK1_B),
1486 GPIO_FN(EX_WAIT1), GPIO_FN(SD1_DAT0_A), GPIO_FN(DREQ2),
1487 GPIO_FN(CAN1_TX_C), GPIO_FN(ET0_LINK_C), GPIO_FN(ET0_ETXD5_A),
1488 GPIO_FN(EX_WAIT2), GPIO_FN(SD1_DAT1_A), GPIO_FN(DACK2),
1489 GPIO_FN(CAN1_RX_C), GPIO_FN(ET0_MAGIC_C), GPIO_FN(ET0_ETXD6_A),
1490 GPIO_FN(DRACK0), GPIO_FN(SD1_DAT2_A), GPIO_FN(ATAG), GPIO_FN(TCLK1_A),
1491 GPIO_FN(ET0_ETXD7),
1492
1493 /* IPSR4 */
1494 GPIO_FN(HCTS0_A), GPIO_FN(CTS1_A), GPIO_FN(VI0_FIELD),
1495 GPIO_FN(RMII0_RXD1_A), GPIO_FN(ET0_ERXD7),
1496 GPIO_FN(HRTS0_A), GPIO_FN(RTS1_A), GPIO_FN(VI0_HSYNC),
1497 GPIO_FN(RMII0_TXD_EN_A), GPIO_FN(ET0_RX_DV),
1498 GPIO_FN(HSCK0_A), GPIO_FN(SCK1_A), GPIO_FN(VI0_VSYNC),
1499 GPIO_FN(RMII0_RX_ER_A), GPIO_FN(ET0_RX_ER),
1500 GPIO_FN(HRX0_A), GPIO_FN(RX1_A), GPIO_FN(VI0_DATA0_VI0_B0),
1501 GPIO_FN(RMII0_CRS_DV_A), GPIO_FN(ET0_CRS),
1502 GPIO_FN(HTX0_A), GPIO_FN(TX1_A), GPIO_FN(VI0_DATA1_VI0_B1),
1503 GPIO_FN(RMII0_MDC_A), GPIO_FN(ET0_COL),
1504 GPIO_FN(CTS0_B), GPIO_FN(VI0_DATA2_VI0_B2), GPIO_FN(RMII0_MDIO_A),
1505 GPIO_FN(ET0_MDC),
1506 GPIO_FN(RTS0_B), GPIO_FN(VI0_DATA3_VI0_B3), GPIO_FN(ET0_MDIO_A),
1507 GPIO_FN(SCK1_B), GPIO_FN(VI0_DATA4_VI0_B4), GPIO_FN(ET0_LINK_A),
1508 GPIO_FN(RX1_B), GPIO_FN(VI0_DATA5_VI0_B5), GPIO_FN(ET0_MAGIC_A),
1509 GPIO_FN(TX1_B), GPIO_FN(VI0_DATA6_VI0_G0), GPIO_FN(ET0_PHY_INT_A),
1510 GPIO_FN(CTS1_B), GPIO_FN(VI0_DATA7_VI0_G1),
1511 GPIO_FN(RTS1_B), GPIO_FN(VI0_G2),
1512 GPIO_FN(SCK2_A), GPIO_FN(VI0_G3),
1513
1514 /* IPSR5 */
1515 GPIO_FN(REF50CK), GPIO_FN(CTS1_E), GPIO_FN(HCTS0_D),
1516 GPIO_FN(REF125CK), GPIO_FN(ADTRG), GPIO_FN(RX5_C),
1517 GPIO_FN(SD2_WP_A), GPIO_FN(TX5_A), GPIO_FN(VI0_R5),
1518 GPIO_FN(SD2_CD_A), GPIO_FN(RX5_A), GPIO_FN(VI0_R4),
1519 GPIO_FN(ET0_PHY_INT_B),
1520 GPIO_FN(SD2_DAT3_A), GPIO_FN(TX4_A), GPIO_FN(VI0_R3),
1521 GPIO_FN(ET0_MAGIC_B),
1522 GPIO_FN(SD2_DAT2_A), GPIO_FN(RX4_A), GPIO_FN(VI0_R2),
1523 GPIO_FN(ET0_LINK_B),
1524 GPIO_FN(SD2_DAT1_A), GPIO_FN(TX3_A), GPIO_FN(VI0_R1),
1525 GPIO_FN(ET0_MDIO_B),
1526 GPIO_FN(SD2_DAT0_A), GPIO_FN(RX3_A), GPIO_FN(VI0_R0),
1527 GPIO_FN(ET0_ERXD3_B),
1528 GPIO_FN(SD2_CMD_A), GPIO_FN(TX2_A), GPIO_FN(VI0_G5),
1529 GPIO_FN(ET0_ERXD2_B),
1530 GPIO_FN(SD2_CLK_A), GPIO_FN(RX2_A), GPIO_FN(VI0_G4),
1531 GPIO_FN(ET0_RX_CLK_B),
1532
1533 /* IPSR6 */
1534 GPIO_FN(DU0_DG1), GPIO_FN(CTS1_C), GPIO_FN(HRTS0_D),
1535 GPIO_FN(TIOC1B_A), GPIO_FN(HIFD09),
1536 GPIO_FN(DU0_DG0), GPIO_FN(TX1_C), GPIO_FN(HSCK0_D),
1537 GPIO_FN(IECLK_A), GPIO_FN(TIOC1A_A), GPIO_FN(HIFD08),
1538 GPIO_FN(DU0_DR7), GPIO_FN(RX1_C), GPIO_FN(TIOC0D_A),
1539 GPIO_FN(HIFD07),
1540 GPIO_FN(DU0_DR6), GPIO_FN(SCK1_C), GPIO_FN(TIOC0C_A),
1541 GPIO_FN(HIFD06),
1542 GPIO_FN(DU0_DR5), GPIO_FN(RTS0_C), GPIO_FN(TIOC0B_A),
1543 GPIO_FN(HIFD05),
1544 GPIO_FN(DU0_DR4), GPIO_FN(CTS0_C), GPIO_FN(TIOC0A_A),
1545 GPIO_FN(HIFD04),
1546 GPIO_FN(DU0_DR3), GPIO_FN(TX0_B), GPIO_FN(TCLKD_A), GPIO_FN(HIFD03),
1547 GPIO_FN(DU0_DR2), GPIO_FN(RX0_B), GPIO_FN(TCLKC_A), GPIO_FN(HIFD02),
1548 GPIO_FN(DU0_DR1), GPIO_FN(SCK0_B), GPIO_FN(HTX0_D),
1549 GPIO_FN(IERX_A), GPIO_FN(TCLKB_A), GPIO_FN(HIFD01),
1550 GPIO_FN(DU0_DR0), GPIO_FN(SCIF_CLK_B), GPIO_FN(HRX0_D),
1551 GPIO_FN(IETX_A), GPIO_FN(TCLKA_A), GPIO_FN(HIFD00),
1552
1553 /* IPSR7 */
1554 GPIO_FN(DU0_DB4), GPIO_FN(HIFINT),
1555 GPIO_FN(DU0_DB3), GPIO_FN(TX5_B), GPIO_FN(TIOC4D_A), GPIO_FN(HIFRD),
1556 GPIO_FN(DU0_DB2), GPIO_FN(RX5_B), GPIO_FN(RMII0_TXD1_B),
1557 GPIO_FN(TIOC4C_A), GPIO_FN(HIFWR),
1558 GPIO_FN(DU0_DB1), GPIO_FN(TX4_C), GPIO_FN(RMII0_TXD0_B),
1559 GPIO_FN(TIOC4B_A), GPIO_FN(HIFRS),
1560 GPIO_FN(DU0_DB0), GPIO_FN(RX4_C), GPIO_FN(RMII0_TXD_EN_B),
1561 GPIO_FN(TIOC4A_A), GPIO_FN(HIFCS),
1562 GPIO_FN(DU0_DG7), GPIO_FN(TX3_C), GPIO_FN(RMII0_RXD1_B),
1563 GPIO_FN(TIOC3D_A), GPIO_FN(HIFD15),
1564 GPIO_FN(DU0_DG6), GPIO_FN(RX3_C), GPIO_FN(RMII0_RXD0_B),
1565 GPIO_FN(TIOC3C_A), GPIO_FN(HIFD14),
1566 GPIO_FN(DU0_DG5), GPIO_FN(TX2_C), GPIO_FN(RMII0_RX_ER_B),
1567 GPIO_FN(TIOC3B_A), GPIO_FN(HIFD13),
1568 GPIO_FN(DU0_DG4), GPIO_FN(RX2_C), GPIO_FN(RMII0_CRS_DV_B),
1569 GPIO_FN(TIOC3A_A), GPIO_FN(HIFD12),
1570 GPIO_FN(DU0_DG3), GPIO_FN(SCK2_C), GPIO_FN(RMII0_MDIO_B),
1571 GPIO_FN(TIOC2B_A), GPIO_FN(HIFD11),
1572 GPIO_FN(DU0_DG2), GPIO_FN(RTS1_C), GPIO_FN(RMII0_MDC_B),
1573 GPIO_FN(TIOC2A_A), GPIO_FN(HIFD10),
1574
1575 /* IPSR8 */
1576 GPIO_FN(IRQ3_A), GPIO_FN(RTS0_A), GPIO_FN(HRTS0_B),
1577 GPIO_FN(ET0_ERXD3_A),
1578 GPIO_FN(IRQ2_A), GPIO_FN(CTS0_A), GPIO_FN(HCTS0_B),
1579 GPIO_FN(ET0_ERXD2_A),
1580 GPIO_FN(IRQ1_A), GPIO_FN(HSPI_RX_B), GPIO_FN(TX3_E),
1581 GPIO_FN(ET0_ERXD1),
1582 GPIO_FN(IRQ0_A), GPIO_FN(HSPI_TX_B), GPIO_FN(RX3_E),
1583 GPIO_FN(ET0_ERXD0),
1584 GPIO_FN(DU0_CDE), GPIO_FN(HTX0_B), GPIO_FN(AUDIO_CLKB_B),
1585 GPIO_FN(LCD_VCPWC_B),
1586 GPIO_FN(DU0_DISP), GPIO_FN(CAN0_TX_B), GPIO_FN(HRX0_B),
1587 GPIO_FN(AUDIO_CLKA_B),
1588 GPIO_FN(DU0_EXODDF_DU0_ODDF), GPIO_FN(CAN0_RX_B), GPIO_FN(HSCK0_B),
1589 GPIO_FN(SSI_SDATA1_B),
1590 GPIO_FN(DU0_EXVSYNC_DU0_VSYNC), GPIO_FN(HSPI_RX0_C),
1591 GPIO_FN(SSI_WS1_B),
1592 GPIO_FN(DU0_EXHSYNC_DU0_HSYNC), GPIO_FN(HSPI_TX0_C),
1593 GPIO_FN(SSI_SCK1_B),
1594 GPIO_FN(DU0_DOTCLKOUT), GPIO_FN(HSPI_CLK0_C),
1595 GPIO_FN(SSI_SDATA0_B),
1596 GPIO_FN(DU0_DOTCLKIN), GPIO_FN(HSPI_CS0_C),
1597 GPIO_FN(SSI_WS0_B),
1598 GPIO_FN(DU0_DB7), GPIO_FN(SSI_SCK0_B), GPIO_FN(HIFEBL_B),
1599 GPIO_FN(DU0_DB6), GPIO_FN(HIFRDY),
1600 GPIO_FN(DU0_DB5), GPIO_FN(HIFDREQ),
1601
1602 /* IPSR9 */
1603 GPIO_FN(SSI_SDATA1_A), GPIO_FN(VI1_3_B), GPIO_FN(LCD_DATA14_B),
1604 GPIO_FN(SSI_WS1_A), GPIO_FN(VI1_2_B), GPIO_FN(LCD_DATA13_B),
1605 GPIO_FN(SSI_SCK1_A), GPIO_FN(VI1_1_B), GPIO_FN(TIOC2B_B),
1606 GPIO_FN(LCD_DATA12_B),
1607 GPIO_FN(SSI_SDATA0_A), GPIO_FN(VI1_0_B), GPIO_FN(TIOC2A_B),
1608 GPIO_FN(LCD_DATA11_B),
1609 GPIO_FN(SSI_WS0_A), GPIO_FN(TIOC1B_B), GPIO_FN(LCD_DATA10_B),
1610 GPIO_FN(SSI_SCK0_A), GPIO_FN(TIOC1A_B), GPIO_FN(LCD_DATA9_B),
1611 GPIO_FN(VI1_7_A), GPIO_FN(FCE_B), GPIO_FN(LCD_DATA8_B),
1612 GPIO_FN(VI1_6_A), GPIO_FN(FD7_B), GPIO_FN(LCD_DATA7_B),
1613 GPIO_FN(VI1_5_A), GPIO_FN(FD6_B), GPIO_FN(LCD_DATA6_B),
1614 GPIO_FN(VI1_4_A), GPIO_FN(FD5_B), GPIO_FN(LCD_DATA5_B),
1615 GPIO_FN(VI1_3_A), GPIO_FN(FD4_B), GPIO_FN(LCD_DATA4_B),
1616 GPIO_FN(VI1_2_A), GPIO_FN(FD3_B), GPIO_FN(LCD_DATA3_B),
1617 GPIO_FN(VI1_1_A), GPIO_FN(FD2_B), GPIO_FN(LCD_DATA2_B),
1618 GPIO_FN(VI1_0_A), GPIO_FN(FD1_B), GPIO_FN(LCD_DATA1_B),
1619 GPIO_FN(VI1_CLK_A), GPIO_FN(FD0_B), GPIO_FN(LCD_DATA0_B),
1620
1621 /* IPSR10 */
1622 GPIO_FN(CAN1_TX_A), GPIO_FN(TX5_C), GPIO_FN(MLB_DAT),
1623 GPIO_FN(CAN0_RX_A), GPIO_FN(IRQ0_B), GPIO_FN(MLB_SIG),
1624 GPIO_FN(CAN1_RX_A), GPIO_FN(IRQ1_B),
1625 GPIO_FN(CAN0_TX_A), GPIO_FN(TX4_D), GPIO_FN(MLB_CLK),
1626 GPIO_FN(CAN_CLK_A), GPIO_FN(RX4_D),
1627 GPIO_FN(AUDIO_CLKOUT), GPIO_FN(TX1_E), GPIO_FN(HRTS0_C),
1628 GPIO_FN(FSE_B), GPIO_FN(LCD_M_DISP_B),
1629 GPIO_FN(AUDIO_CLKC), GPIO_FN(SCK1_E), GPIO_FN(HCTS0_C),
1630 GPIO_FN(FRB_B), GPIO_FN(LCD_VEPWC_B),
1631 GPIO_FN(AUDIO_CLKB_A), GPIO_FN(LCD_CLK_B),
1632 GPIO_FN(AUDIO_CLKA_A), GPIO_FN(VI1_CLK_B), GPIO_FN(SCK1_D),
1633 GPIO_FN(IECLK_B), GPIO_FN(LCD_FLM_B),
1634 GPIO_FN(SSI_SDATA3), GPIO_FN(VI1_7_B), GPIO_FN(HTX0_C),
1635 GPIO_FN(FWE_B), GPIO_FN(LCD_CL2_B),
1636 GPIO_FN(SSI_SDATA2), GPIO_FN(VI1_6_B), GPIO_FN(HRX0_C),
1637 GPIO_FN(FRE_B), GPIO_FN(LCD_CL1_B),
1638 GPIO_FN(SSI_WS23), GPIO_FN(VI1_5_B), GPIO_FN(TX1_D),
1639 GPIO_FN(HSCK0_C), GPIO_FN(FALE_B), GPIO_FN(LCD_DON_B),
1640 GPIO_FN(SSI_SCK23), GPIO_FN(VI1_4_B), GPIO_FN(RX1_D),
1641 GPIO_FN(FCLE_B), GPIO_FN(LCD_DATA15_B),
1642
1643 /* IPSR11 */
1644 GPIO_FN(PRESETOUT), GPIO_FN(ST_CLKOUT),
1645 GPIO_FN(DACK1), GPIO_FN(HSPI_CS_B), GPIO_FN(TX4_B),
1646 GPIO_FN(ET0_RX_CLK_A),
1647 GPIO_FN(DREQ1), GPIO_FN(HSPI_CLK_B), GPIO_FN(RX4_B),
1648 GPIO_FN(ET0_PHY_INT_C), GPIO_FN(ET0_TX_CLK_A),
1649 GPIO_FN(DACK0), GPIO_FN(SD1_DAT3_A), GPIO_FN(ET0_TX_ER),
1650 GPIO_FN(DREQ0), GPIO_FN(SD1_CLK_A), GPIO_FN(ET0_TX_EN),
1651 GPIO_FN(USB_OVC1), GPIO_FN(RX3_D), GPIO_FN(CAN1_RX_B),
1652 GPIO_FN(RX5_D), GPIO_FN(IERX_B),
1653 GPIO_FN(PENC1), GPIO_FN(TX3_D), GPIO_FN(CAN1_TX_B),
1654 GPIO_FN(TX5_D), GPIO_FN(IETX_B),
1655 GPIO_FN(TX0_A), GPIO_FN(HSPI_TX_A),
1656 GPIO_FN(RX0_A), GPIO_FN(HSPI_RX_A), GPIO_FN(RMII0_RXD0_A),
1657 GPIO_FN(ET0_ERXD6),
1658 GPIO_FN(SCK0_A), GPIO_FN(HSPI_CS_A), GPIO_FN(VI0_CLKENB),
1659 GPIO_FN(RMII0_TXD1_A), GPIO_FN(ET0_ERXD5),
1660 GPIO_FN(SCIF_CLK_A), GPIO_FN(HSPI_CLK_A), GPIO_FN(VI0_CLK),
1661 GPIO_FN(RMII0_TXD0_A), GPIO_FN(ET0_ERXD4),
1662 GPIO_FN(SDSELF), GPIO_FN(RTS1_E),
1663 GPIO_FN(SDA0), GPIO_FN(HIFEBL_A),
1664 GPIO_FN(SDA1), GPIO_FN(RX1_E),
1665 GPIO_FN(SCL1), GPIO_FN(SCIF_CLK_C),
1666};
1667
1668static struct pinmux_cfg_reg pinmux_config_regs[] = {
1669 { PINMUX_CFG_REG("GPSR0", 0xFFFC0004, 32, 1) {
1670 GP_0_31_FN, FN_IP2_2_0,
1671 GP_0_30_FN, FN_IP1_31_29,
1672 GP_0_29_FN, FN_IP1_28_26,
1673 GP_0_28_FN, FN_IP1_25_23,
1674 GP_0_27_FN, FN_IP1_22_20,
1675 GP_0_26_FN, FN_IP1_19_18,
1676 GP_0_25_FN, FN_IP1_17_16,
1677 GP_0_24_FN, FN_IP0_5_4,
1678 GP_0_23_FN, FN_IP0_3_2,
1679 GP_0_22_FN, FN_IP0_1_0,
1680 GP_0_21_FN, FN_IP11_28,
1681 GP_0_20_FN, FN_IP1_7_6,
1682 GP_0_19_FN, FN_IP1_5_4,
1683 GP_0_18_FN, FN_IP1_3_2,
1684 GP_0_17_FN, FN_IP1_1_0,
1685 GP_0_16_FN, FN_IP0_31_30,
1686 GP_0_15_FN, FN_IP0_29_28,
1687 GP_0_14_FN, FN_IP0_27_26,
1688 GP_0_13_FN, FN_IP0_25_24,
1689 GP_0_12_FN, FN_IP0_23_22,
1690 GP_0_11_FN, FN_IP0_21_20,
1691 GP_0_10_FN, FN_IP0_19_18,
1692 GP_0_9_FN, FN_IP0_17_16,
1693 GP_0_8_FN, FN_IP0_15_14,
1694 GP_0_7_FN, FN_IP0_13_12,
1695 GP_0_6_FN, FN_IP0_11_10,
1696 GP_0_5_FN, FN_IP0_9_8,
1697 GP_0_4_FN, FN_IP0_7_6,
1698 GP_0_3_FN, FN_IP1_15_14,
1699 GP_0_2_FN, FN_IP1_13_12,
1700 GP_0_1_FN, FN_IP1_11_10,
1701 GP_0_0_FN, FN_IP1_9_8 }
1702 },
1703 { PINMUX_CFG_REG("GPSR1", 0xFFFC0008, 32, 1) {
1704 GP_1_31_FN, FN_IP11_25_23,
1705 GP_1_30_FN, FN_IP2_13_11,
1706 GP_1_29_FN, FN_IP2_10_8,
1707 GP_1_28_FN, FN_IP2_7_5,
1708 GP_1_27_FN, FN_IP3_26_24,
1709 GP_1_26_FN, FN_IP3_23_21,
1710 GP_1_25_FN, FN_IP2_4_3,
1711 GP_1_24_FN, FN_WE1,
1712 GP_1_23_FN, FN_WE0,
1713 GP_1_22_FN, FN_IP3_19_18,
1714 GP_1_21_FN, FN_RD,
1715 GP_1_20_FN, FN_IP3_17_15,
1716 GP_1_19_FN, FN_IP3_14_12,
1717 GP_1_18_FN, FN_IP3_11_9,
1718 GP_1_17_FN, FN_IP3_8_6,
1719 GP_1_16_FN, FN_IP3_5_3,
1720 GP_1_15_FN, FN_EX_CS0,
1721 GP_1_14_FN, FN_IP3_2,
1722 GP_1_13_FN, FN_CS0,
1723 GP_1_12_FN, FN_BS,
1724 GP_1_11_FN, FN_CLKOUT,
1725 GP_1_10_FN, FN_IP3_1_0,
1726 GP_1_9_FN, FN_IP2_30_28,
1727 GP_1_8_FN, FN_IP2_27_25,
1728 GP_1_7_FN, FN_IP2_24_23,
1729 GP_1_6_FN, FN_IP2_22_20,
1730 GP_1_5_FN, FN_IP2_19_17,
1731 GP_1_4_FN, FN_IP2_16_14,
1732 GP_1_3_FN, FN_IP11_22_21,
1733 GP_1_2_FN, FN_IP11_20_19,
1734 GP_1_1_FN, FN_IP3_29_27,
1735 GP_1_0_FN, FN_IP3_20 }
1736 },
1737 { PINMUX_CFG_REG("GPSR2", 0xFFFC000C, 32, 1) {
1738 GP_2_31_FN, FN_IP4_31_30,
1739 GP_2_30_FN, FN_IP5_2_0,
1740 GP_2_29_FN, FN_IP5_5_3,
1741 GP_2_28_FN, FN_IP5_8_6,
1742 GP_2_27_FN, FN_IP5_11_9,
1743 GP_2_26_FN, FN_IP5_14_12,
1744 GP_2_25_FN, FN_IP5_17_15,
1745 GP_2_24_FN, FN_IP5_20_18,
1746 GP_2_23_FN, FN_IP5_22_21,
1747 GP_2_22_FN, FN_IP5_24_23,
1748 GP_2_21_FN, FN_IP5_26_25,
1749 GP_2_20_FN, FN_IP4_29_28,
1750 GP_2_19_FN, FN_IP4_27_26,
1751 GP_2_18_FN, FN_IP4_25_24,
1752 GP_2_17_FN, FN_IP4_23_22,
1753 GP_2_16_FN, FN_IP4_21_20,
1754 GP_2_15_FN, FN_IP4_19_18,
1755 GP_2_14_FN, FN_IP4_17_15,
1756 GP_2_13_FN, FN_IP4_14_12,
1757 GP_2_12_FN, FN_IP4_11_9,
1758 GP_2_11_FN, FN_IP4_8_6,
1759 GP_2_10_FN, FN_IP4_5_3,
1760 GP_2_9_FN, FN_IP8_27_26,
1761 GP_2_8_FN, FN_IP11_12,
1762 GP_2_7_FN, FN_IP8_25_23,
1763 GP_2_6_FN, FN_IP8_22_20,
1764 GP_2_5_FN, FN_IP11_27_26,
1765 GP_2_4_FN, FN_IP8_29_28,
1766 GP_2_3_FN, FN_IP4_2_0,
1767 GP_2_2_FN, FN_IP11_11_10,
1768 GP_2_1_FN, FN_IP11_9_7,
1769 GP_2_0_FN, FN_IP11_6_4 }
1770 },
1771 { PINMUX_CFG_REG("GPSR3", 0xFFFC0010, 32, 1) {
1772 GP_3_31_FN, FN_IP9_1_0,
1773 GP_3_30_FN, FN_IP8_19_18,
1774 GP_3_29_FN, FN_IP8_17_16,
1775 GP_3_28_FN, FN_IP8_15_14,
1776 GP_3_27_FN, FN_IP8_13_12,
1777 GP_3_26_FN, FN_IP8_11_10,
1778 GP_3_25_FN, FN_IP8_9_8,
1779 GP_3_24_FN, FN_IP8_7_6,
1780 GP_3_23_FN, FN_IP8_5_4,
1781 GP_3_22_FN, FN_IP8_3_2,
1782 GP_3_21_FN, FN_IP8_1_0,
1783 GP_3_20_FN, FN_IP7_30_29,
1784 GP_3_19_FN, FN_IP7_28_27,
1785 GP_3_18_FN, FN_IP7_26_24,
1786 GP_3_17_FN, FN_IP7_23_21,
1787 GP_3_16_FN, FN_IP7_20_18,
1788 GP_3_15_FN, FN_IP7_17_15,
1789 GP_3_14_FN, FN_IP7_14_12,
1790 GP_3_13_FN, FN_IP7_11_9,
1791 GP_3_12_FN, FN_IP7_8_6,
1792 GP_3_11_FN, FN_IP7_5_3,
1793 GP_3_10_FN, FN_IP7_2_0,
1794 GP_3_9_FN, FN_IP6_23_21,
1795 GP_3_8_FN, FN_IP6_20_18,
1796 GP_3_7_FN, FN_IP6_17_16,
1797 GP_3_6_FN, FN_IP6_15_14,
1798 GP_3_5_FN, FN_IP6_13_12,
1799 GP_3_4_FN, FN_IP6_11_10,
1800 GP_3_3_FN, FN_IP6_9_8,
1801 GP_3_2_FN, FN_IP6_7_6,
1802 GP_3_1_FN, FN_IP6_5_3,
1803 GP_3_0_FN, FN_IP6_2_0 }
1804 },
1805
1806 { PINMUX_CFG_REG("GPSR4", 0xFFFC0014, 32, 1) {
1807 GP_4_31_FN, FN_IP10_24_23,
1808 GP_4_30_FN, FN_IP10_22,
1809 GP_4_29_FN, FN_IP11_18_16,
1810 GP_4_28_FN, FN_USB_OVC0,
1811 GP_4_27_FN, FN_IP11_15_13,
1812 GP_4_26_FN, FN_PENC0,
1813 GP_4_25_FN, FN_IP11_2,
1814 GP_4_24_FN, FN_SCL0,
1815 GP_4_23_FN, FN_IP11_1,
1816 GP_4_22_FN, FN_IP11_0,
1817 GP_4_21_FN, FN_IP10_21_19,
1818 GP_4_20_FN, FN_IP10_18_16,
1819 GP_4_19_FN, FN_IP10_15,
1820 GP_4_18_FN, FN_IP10_14_12,
1821 GP_4_17_FN, FN_IP10_11_9,
1822 GP_4_16_FN, FN_IP10_8_6,
1823 GP_4_15_FN, FN_IP10_5_3,
1824 GP_4_14_FN, FN_IP10_2_0,
1825 GP_4_13_FN, FN_IP9_29_28,
1826 GP_4_12_FN, FN_IP9_27_26,
1827 GP_4_11_FN, FN_IP9_9_8,
1828 GP_4_10_FN, FN_IP9_7_6,
1829 GP_4_9_FN, FN_IP9_5_4,
1830 GP_4_8_FN, FN_IP9_3_2,
1831 GP_4_7_FN, FN_IP9_17_16,
1832 GP_4_6_FN, FN_IP9_15_14,
1833 GP_4_5_FN, FN_IP9_13_12,
1834 GP_4_4_FN, FN_IP9_11_10,
1835 GP_4_3_FN, FN_IP9_25_24,
1836 GP_4_2_FN, FN_IP9_23_22,
1837 GP_4_1_FN, FN_IP9_21_20,
1838 GP_4_0_FN, FN_IP9_19_18 }
1839 },
1840 { PINMUX_CFG_REG("GPSR5", 0xFFFC0018, 32, 1) {
1841 0, 0, 0, 0, 0, 0, 0, 0, /* 31 - 28 */
1842 0, 0, 0, 0, 0, 0, 0, 0, /* 27 - 24 */
1843 0, 0, 0, 0, 0, 0, 0, 0, /* 23 - 20 */
1844 0, 0, 0, 0, 0, 0, 0, 0, /* 19 - 16 */
1845 0, 0, 0, 0, 0, 0, 0, 0, /* 15 - 12 */
1846 GP_5_11_FN, FN_IP10_29_28,
1847 GP_5_10_FN, FN_IP10_27_26,
1848 0, 0, 0, 0, 0, 0, 0, 0, /* 9 - 6 */
1849 0, 0, 0, 0, /* 5, 4 */
1850 GP_5_3_FN, FN_IRQ3_B,
1851 GP_5_2_FN, FN_IRQ2_B,
1852 GP_5_1_FN, FN_IP11_3,
1853 GP_5_0_FN, FN_IP10_25 }
1854 },
1855
1856 { PINMUX_CFG_REG_VAR("IPSR0", 0xFFFC001C, 32,
1857 2, 2, 2, 2, 2, 2, 2, 2,
1858 2, 2, 2, 2, 2, 2, 2, 2) {
1859 /* IP0_31_30 [2] */
1860 FN_A15, FN_ST0_VCO_CLKIN, FN_LCD_DATA15_A,
1861 FN_TIOC3D_C,
1862 /* IP0_29_28 [2] */
1863 FN_A14, FN_LCD_DATA14_A, FN_TIOC3C_C, 0,
1864 /* IP0_27_26 [2] */
1865 FN_A13, FN_LCD_DATA13_A, FN_TIOC3B_C, 0,
1866 /* IP0_25_24 [2] */
1867 FN_A12, FN_LCD_DATA12_A, FN_TIOC3A_C, 0,
1868 /* IP0_23_22 [2] */
1869 FN_A11, FN_ST0_D7, FN_LCD_DATA11_A, FN_TIOC2B_C,
1870 /* IP0_21_20 [2] */
1871 FN_A10, FN_ST0_D6, FN_LCD_DATA10_A, FN_TIOC2A_C,
1872 /* IP0_19_18 [2] */
1873 FN_A9, FN_ST0_D5, FN_LCD_DATA9_A, FN_TIOC1B_C,
1874 /* IP0_17_16 [2] */
1875 FN_A8, FN_ST0_D4, FN_LCD_DATA8_A, FN_TIOC1A_C,
1876 /* IP0_15_14 [2] */
1877 FN_A7, FN_ST0_D3, FN_LCD_DATA7_A, FN_TIOC0D_C,
1878 /* IP0_13_12 [2] */
1879 FN_A6, FN_ST0_D2, FN_LCD_DATA6_A, FN_TIOC0C_C,
1880 /* IP0_11_10 [2] */
1881 FN_A5, FN_ST0_D1, FN_LCD_DATA5_A, FN_TIOC0B_C,
1882 /* IP0_9_8 [2] */
1883 FN_A4, FN_ST0_D0, FN_LCD_DATA4_A, FN_TIOC0A_C,
1884 /* IP0_7_6 [2] */
1885 FN_A3, FN_ST0_VLD, FN_LCD_DATA3_A, FN_TCLKD_C,
1886 /* IP0_5_4 [2] */
1887 FN_A2, FN_ST0_SYC, FN_LCD_DATA2_A, FN_TCLKC_C,
1888 /* IP0_3_2 [2] */
1889 FN_A1, FN_ST0_REQ, FN_LCD_DATA1_A, FN_TCLKB_C,
1890 /* IP0_1_0 [2] */
1891 FN_A0, FN_ST0_CLKIN, FN_LCD_DATA0_A, FN_TCLKA_C }
1892 },
1893 { PINMUX_CFG_REG_VAR("IPSR1", 0xFFFC0020, 32,
1894 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2) {
1895 /* IP1_31_29 [3] */
1896 FN_D3, FN_SD0_DAT3_A, FN_MMC_D3_A, FN_ST1_D6,
1897 FN_FD3_A, 0, 0, 0,
1898 /* IP1_28_26 [3] */
1899 FN_D2, FN_SD0_DAT2_A, FN_MMC_D2_A, FN_ST1_D5,
1900 FN_FD2_A, 0, 0, 0,
1901 /* IP1_25_23 [3] */
1902 FN_D1, FN_SD0_DAT1_A, FN_MMC_D1_A, FN_ST1_D4,
1903 FN_FD1_A, 0, 0, 0,
1904 /* IP1_22_20 [3] */
1905 FN_D0, FN_SD0_DAT0_A, FN_MMC_D0_A, FN_ST1_D3,
1906 FN_FD0_A, 0, 0, 0,
1907 /* IP1_19_18 [2] */
1908 FN_A25, FN_TX2_D, FN_ST1_D2, 0,
1909 /* IP1_17_16 [2] */
1910 FN_A24, FN_RX2_D, FN_ST1_D1, 0,
1911 /* IP1_15_14 [2] */
1912 FN_A23, FN_ST1_D0, FN_LCD_M_DISP_A, 0,
1913 /* IP1_13_12 [2] */
1914 FN_A22, FN_ST1_VLD, FN_LCD_VEPWC_A, 0,
1915 /* IP1_11_10 [2] */
1916 FN_A21, FN_ST1_SYC, FN_LCD_VCPWC_A, 0,
1917 /* IP1_9_8 [2] */
1918 FN_A20, FN_ST1_REQ, FN_LCD_FLM_A, 0,
1919 /* IP1_7_6 [2] */
1920 FN_A19, FN_ST1_CLKIN, FN_LCD_CLK_A, FN_TIOC4D_C,
1921 /* IP1_5_4 [2] */
1922 FN_A18, FN_ST1_PWM, FN_LCD_CL2_A, FN_TIOC4C_C,
1923 /* IP1_3_2 [2] */
1924 FN_A17, FN_ST1_VCO_CLKIN, FN_LCD_CL1_A, FN_TIOC4B_C,
1925 /* IP1_1_0 [2] */
1926 FN_A16, FN_ST0_PWM, FN_LCD_DON_A, FN_TIOC4A_C }
1927 },
1928 { PINMUX_CFG_REG_VAR("IPSR2", 0xFFFC0024, 32,
1929 1, 3, 3, 2, 3, 3, 3, 3, 3, 3, 2, 3) {
1930 /* IP2_31 [1] */
1931 0, 0,
1932 /* IP2_30_28 [3] */
1933 FN_D14, FN_TX2_B, 0, FN_FSE_A,
1934 FN_ET0_TX_CLK_B, 0, 0, 0,
1935 /* IP2_27_25 [3] */
1936 FN_D13, FN_RX2_B, 0, FN_FRB_A,
1937 FN_ET0_ETXD6_B, 0, 0, 0,
1938 /* IP2_24_23 [2] */
1939 FN_D12, 0, FN_FWE_A, FN_ET0_ETXD5_B,
1940 /* IP2_22_20 [3] */
1941 FN_D11, FN_RSPI_MISO_A, 0, FN_QMI_QIO1_A,
1942 FN_FRE_A, FN_ET0_ETXD3_B, 0, 0,
1943 /* IP2_19_17 [3] */
1944 FN_D10, FN_RSPI_MOSI_A, 0, FN_QMO_QIO0_A,
1945 FN_FALE_A, FN_ET0_ETXD2_B, 0, 0,
1946 /* IP2_16_14 [3] */
1947 FN_D9, FN_SD0_CMD_A, FN_MMC_CMD_A, FN_QIO3_A,
1948 FN_FCLE_A, FN_ET0_ETXD1_B, 0, 0,
1949 /* IP2_13_11 [3] */
1950 FN_D8, FN_SD0_CLK_A, FN_MMC_CLK_A, FN_QIO2_A,
1951 FN_FCE_A, FN_ET0_GTX_CLK_B, 0, 0,
1952 /* IP2_10_8 [3] */
1953 FN_D7, FN_RSPI_SSL_A, FN_MMC_D7_A, FN_QSSL_A,
1954 FN_FD7_A, 0, 0, 0,
1955 /* IP2_7_5 [3] */
1956 FN_D6, FN_RSPI_RSPCK_A, FN_MMC_D6_A, FN_QSPCLK_A,
1957 FN_FD6_A, 0, 0, 0,
1958 /* IP2_4_3 [2] */
1959 FN_D5, FN_SD0_WP_A, FN_MMC_D5_A, FN_FD5_A,
1960 /* IP2_2_0 [3] */
1961 FN_D4, FN_SD0_CD_A, FN_MMC_D4_A, FN_ST1_D7,
1962 FN_FD4_A, 0, 0, 0 }
1963 },
1964 { PINMUX_CFG_REG_VAR("IPSR3", 0xFFFC0028, 32,
1965 2, 3, 3, 3, 1, 2, 3, 3, 3, 3, 3, 1, 2) {
1966 /* IP3_31_30 [2] */
1967 0, 0, 0, 0,
1968 /* IP3_29_27 [3] */
1969 FN_DRACK0, FN_SD1_DAT2_A, FN_ATAG, FN_TCLK1_A,
1970 FN_ET0_ETXD7, 0, 0, 0,
1971 /* IP3_26_24 [3] */
1972 FN_EX_WAIT2, FN_SD1_DAT1_A, FN_DACK2, FN_CAN1_RX_C,
1973 FN_ET0_MAGIC_C, FN_ET0_ETXD6_A, 0, 0,
1974 /* IP3_23_21 [3] */
1975 FN_EX_WAIT1, FN_SD1_DAT0_A, FN_DREQ2, FN_CAN1_TX_C,
1976 FN_ET0_LINK_C, FN_ET0_ETXD5_A, 0, 0,
1977 /* IP3_20 [1] */
1978 FN_EX_WAIT0, FN_TCLK1_B,
1979 /* IP3_19_18 [2] */
1980 FN_RD_WR, FN_TCLK1_B, 0, 0,
1981 /* IP3_17_15 [3] */
1982 FN_EX_CS5, FN_SD1_CMD_A, FN_ATADIR, FN_QSSL_B,
1983 FN_ET0_ETXD3_A, 0, 0, 0,
1984 /* IP3_14_12 [3] */
1985 FN_EX_CS4, FN_SD1_WP_A, FN_ATAWR, FN_QMI_QIO1_B,
1986 FN_ET0_ETXD2_A, 0, 0, 0,
1987 /* IP3_11_9 [3] */
1988 FN_EX_CS3, FN_SD1_CD_A, FN_ATARD, FN_QMO_QIO0_B,
1989 FN_ET0_ETXD1_A, 0, 0, 0,
1990 /* IP3_8_6 [3] */
1991 FN_EX_CS2, FN_TX3_B, FN_ATACS1, FN_QSPCLK_B,
1992 FN_ET0_GTX_CLK_A, 0, 0, 0,
1993 /* IP3_5_3 [3] */
1994 FN_EX_CS1, FN_RX3_B, FN_ATACS0, FN_QIO2_B,
1995 FN_ET0_ETXD0, 0, 0, 0,
1996 /* IP3_2 [1] */
1997 FN_CS1_A26, FN_QIO3_B,
1998 /* IP3_1_0 [2] */
1999 FN_D15, FN_SCK2_B, 0, 0 }
2000 },
2001 { PINMUX_CFG_REG_VAR("IPSR4", 0xFFFC002C, 32,
2002 2, 2, 2, 2, 2, 2 , 2, 3, 3, 3, 3, 3, 3) {
2003 /* IP4_31_30 [2] */
2004 0, FN_SCK2_A, FN_VI0_G3, 0,
2005 /* IP4_29_28 [2] */
2006 0, FN_RTS1_B, FN_VI0_G2, 0,
2007 /* IP4_27_26 [2] */
2008 0, FN_CTS1_B, FN_VI0_DATA7_VI0_G1, 0,
2009 /* IP4_25_24 [2] */
2010 0, FN_TX1_B, FN_VI0_DATA6_VI0_G0, FN_ET0_PHY_INT_A,
2011 /* IP4_23_22 [2] */
2012 0, FN_RX1_B, FN_VI0_DATA5_VI0_B5, FN_ET0_MAGIC_A,
2013 /* IP4_21_20 [2] */
2014 0, FN_SCK1_B, FN_VI0_DATA4_VI0_B4, FN_ET0_LINK_A,
2015 /* IP4_19_18 [2] */
2016 0, FN_RTS0_B, FN_VI0_DATA3_VI0_B3, FN_ET0_MDIO_A,
2017 /* IP4_17_15 [3] */
2018 0, FN_CTS0_B, FN_VI0_DATA2_VI0_B2, FN_RMII0_MDIO_A,
2019 FN_ET0_MDC, 0, 0, 0,
2020 /* IP4_14_12 [3] */
2021 FN_HTX0_A, FN_TX1_A, FN_VI0_DATA1_VI0_B1, FN_RMII0_MDC_A,
2022 FN_ET0_COL, 0, 0, 0,
2023 /* IP4_11_9 [3] */
2024 FN_HRX0_A, FN_RX1_A, FN_VI0_DATA0_VI0_B0, FN_RMII0_CRS_DV_A,
2025 FN_ET0_CRS, 0, 0, 0,
2026 /* IP4_8_6 [3] */
2027 FN_HSCK0_A, FN_SCK1_A, FN_VI0_VSYNC, FN_RMII0_RX_ER_A,
2028 FN_ET0_RX_ER, 0, 0, 0,
2029 /* IP4_5_3 [3] */
2030 FN_HRTS0_A, FN_RTS1_A, FN_VI0_HSYNC, FN_RMII0_TXD_EN_A,
2031 FN_ET0_RX_DV, 0, 0, 0,
2032 /* IP4_2_0 [3] */
2033 FN_HCTS0_A, FN_CTS1_A, FN_VI0_FIELD, FN_RMII0_RXD1_A,
2034 FN_ET0_ERXD7, 0, 0, 0 }
2035 },
2036 { PINMUX_CFG_REG_VAR("IPSR5", 0xFFFC0030, 32,
2037 1, 1, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3) {
2038 /* IP5_31 [1] */
2039 0, 0,
2040 /* IP5_30 [1] */
2041 0, 0,
2042 /* IP5_29 [1] */
2043 0, 0,
2044 /* IP5_28 [1] */
2045 0, 0,
2046 /* IP5_27 [1] */
2047 0, 0,
2048 /* IP5_26_25 [2] */
2049 FN_REF50CK, FN_CTS1_E, FN_HCTS0_D, 0,
2050 /* IP5_24_23 [2] */
2051 FN_REF125CK, FN_ADTRG, FN_RX5_C, 0,
2052 /* IP5_22_21 [2] */
2053 FN_SD2_WP_A, FN_TX5_A, FN_VI0_R5, 0,
2054 /* IP5_20_18 [3] */
2055 FN_SD2_CD_A, FN_RX5_A, FN_VI0_R4, 0,
2056 0, 0, 0, FN_ET0_PHY_INT_B,
2057 /* IP5_17_15 [3] */
2058 FN_SD2_DAT3_A, FN_TX4_A, FN_VI0_R3, 0,
2059 0, 0, 0, FN_ET0_MAGIC_B,
2060 /* IP5_14_12 [3] */
2061 FN_SD2_DAT2_A, FN_RX4_A, FN_VI0_R2, 0,
2062 0, 0, 0, FN_ET0_LINK_B,
2063 /* IP5_11_9 [3] */
2064 FN_SD2_DAT1_A, FN_TX3_A, FN_VI0_R1, 0,
2065 0, 0, 0, FN_ET0_MDIO_B,
2066 /* IP5_8_6 [3] */
2067 FN_SD2_DAT0_A, FN_RX3_A, FN_VI0_R0, 0,
2068 0, 0, 0, FN_ET0_ERXD3_B,
2069 /* IP5_5_3 [3] */
2070 FN_SD2_CMD_A, FN_TX2_A, FN_VI0_G5, 0,
2071 0, 0, 0, FN_ET0_ERXD2_B,
2072 /* IP5_2_0 [3] */
2073 FN_SD2_CLK_A, FN_RX2_A, FN_VI0_G4, 0,
2074 FN_ET0_RX_CLK_B, 0, 0, 0 }
2075 },
2076 { PINMUX_CFG_REG_VAR("IPSR6", 0xFFFC0034, 32,
2077 1, 1, 1, 1, 1, 1, 1, 1,
2078 3, 3, 2, 2, 2, 2, 2, 2, 3, 3) {
2079 /* IP5_31 [1] */
2080 0, 0,
2081 /* IP6_30 [1] */
2082 0, 0,
2083 /* IP6_29 [1] */
2084 0, 0,
2085 /* IP6_28 [1] */
2086 0, 0,
2087 /* IP6_27 [1] */
2088 0, 0,
2089 /* IP6_26 [1] */
2090 0, 0,
2091 /* IP6_25 [1] */
2092 0, 0,
2093 /* IP6_24 [1] */
2094 0, 0,
2095 /* IP6_23_21 [3] */
2096 FN_DU0_DG1, FN_CTS1_C, FN_HRTS0_D, FN_TIOC1B_A,
2097 FN_HIFD09, 0, 0, 0,
2098 /* IP6_20_18 [3] */
2099 FN_DU0_DG0, FN_TX1_C, FN_HSCK0_D, FN_IECLK_A,
2100 FN_TIOC1A_A, FN_HIFD08, 0, 0,
2101 /* IP6_17_16 [2] */
2102 FN_DU0_DR7, FN_RX1_C, FN_TIOC0D_A, FN_HIFD07,
2103 /* IP6_15_14 [2] */
2104 FN_DU0_DR6, FN_SCK1_C, FN_TIOC0C_A, FN_HIFD06,
2105 /* IP6_13_12 [2] */
2106 FN_DU0_DR5, FN_RTS0_C, FN_TIOC0B_A, FN_HIFD05,
2107 /* IP6_11_10 [2] */
2108 FN_DU0_DR4, FN_CTS0_C, FN_TIOC0A_A, FN_HIFD04,
2109 /* IP6_9_8 [2] */
2110 FN_DU0_DR3, FN_TX0_B, FN_TCLKD_A, FN_HIFD03,
2111 /* IP6_7_6 [2] */
2112 FN_DU0_DR2, FN_RX0_B, FN_TCLKC_A, FN_HIFD02,
2113 /* IP6_5_3 [3] */
2114 FN_DU0_DR1, FN_SCK0_B, FN_HTX0_D, FN_IERX_A,
2115 FN_TCLKB_A, FN_HIFD01, 0, 0,
2116 /* IP6_2_0 [3] */
2117 FN_DU0_DR0, FN_SCIF_CLK_B, FN_HRX0_D, FN_IETX_A,
2118 FN_TCLKA_A, FN_HIFD00, 0, 0 }
2119 },
2120 { PINMUX_CFG_REG_VAR("IPSR7", 0xFFFC0038, 32,
2121 1, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3) {
2122 /* IP7_31 [1] */
2123 0, 0,
2124 /* IP7_30_29 [2] */
2125 FN_DU0_DB4, 0, FN_HIFINT, 0,
2126 /* IP7_28_27 [2] */
2127 FN_DU0_DB3, FN_TX5_B, FN_TIOC4D_A, FN_HIFRD,
2128 /* IP7_26_24 [3] */
2129 FN_DU0_DB2, FN_RX5_B, FN_RMII0_TXD1_B, FN_TIOC4C_A,
2130 FN_HIFWR, 0, 0, 0,
2131 /* IP7_23_21 [3] */
2132 FN_DU0_DB1, FN_TX4_C, FN_RMII0_TXD0_B, FN_TIOC4B_A,
2133 FN_HIFRS, 0, 0, 0,
2134 /* IP7_20_18 [3] */
2135 FN_DU0_DB0, FN_RX4_C, FN_RMII0_TXD_EN_B, FN_TIOC4A_A,
2136 FN_HIFCS, 0, 0, 0,
2137 /* IP7_17_15 [3] */
2138 FN_DU0_DG7, FN_TX3_C, FN_RMII0_RXD1_B, FN_TIOC3D_A,
2139 FN_HIFD15, 0, 0, 0,
2140 /* IP7_14_12 [3] */
2141 FN_DU0_DG6, FN_RX3_C, FN_RMII0_RXD0_B, FN_TIOC3C_A,
2142 FN_HIFD14, 0, 0, 0,
2143 /* IP7_11_9 [3] */
2144 FN_DU0_DG5, FN_TX2_C, FN_RMII0_RX_ER_B, FN_TIOC3B_A,
2145 FN_HIFD13, 0, 0, 0,
2146 /* IP7_8_6 [3] */
2147 FN_DU0_DG4, FN_RX2_C, FN_RMII0_CRS_DV_B, FN_TIOC3A_A,
2148 FN_HIFD12, 0, 0, 0,
2149 /* IP7_5_3 [3] */
2150 FN_DU0_DG3, FN_SCK2_C, FN_RMII0_MDIO_B, FN_TIOC2B_A,
2151 FN_HIFD11, 0, 0, 0,
2152 /* IP7_2_0 [3] */
2153 FN_DU0_DG2, FN_RTS1_C, FN_RMII0_MDC_B, FN_TIOC2A_A,
2154 FN_HIFD10, 0, 0, 0 }
2155 },
2156 { PINMUX_CFG_REG_VAR("IPSR8", 0xFFFC003C, 32,
2157 2, 2, 2, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2) {
2158 /* IP9_31_30 [2] */
2159 0, 0, 0, 0,
2160 /* IP8_29_28 [2] */
2161 FN_IRQ3_A, FN_RTS0_A, FN_HRTS0_B, FN_ET0_ERXD3_A,
2162 /* IP8_27_26 [2] */
2163 FN_IRQ2_A, FN_CTS0_A, FN_HCTS0_B, FN_ET0_ERXD2_A,
2164 /* IP8_25_23 [3] */
2165 FN_IRQ1_A, 0, FN_HSPI_RX_B, FN_TX3_E,
2166 FN_ET0_ERXD1, 0, 0, 0,
2167 /* IP8_22_20 [3] */
2168 FN_IRQ0_A, 0, FN_HSPI_TX_B, FN_RX3_E,
2169 FN_ET0_ERXD0, 0, 0, 0,
2170 /* IP8_19_18 [2] */
2171 FN_DU0_CDE, FN_HTX0_B, FN_AUDIO_CLKB_B, FN_LCD_VCPWC_B,
2172 /* IP8_17_16 [2] */
2173 FN_DU0_DISP, FN_CAN0_TX_B, FN_HRX0_B, FN_AUDIO_CLKA_B,
2174 /* IP8_15_14 [2] */
2175 FN_DU0_EXODDF_DU0_ODDF, FN_CAN0_RX_B, FN_HSCK0_B,
2176 FN_SSI_SDATA1_B,
2177 /* IP8_13_12 [2] */
2178 FN_DU0_EXVSYNC_DU0_VSYNC, 0, FN_HSPI_RX0_C, FN_SSI_WS1_B,
2179 /* IP8_11_10 [2] */
2180 FN_DU0_EXHSYNC_DU0_HSYNC, 0, FN_HSPI_TX0_C, FN_SSI_SCK1_B,
2181 /* IP8_9_8 [2] */
2182 FN_DU0_DOTCLKOUT, 0, FN_HSPI_CLK0_C, FN_SSI_SDATA0_B,
2183 /* IP8_7_6 [2] */
2184 FN_DU0_DOTCLKIN, 0, FN_HSPI_CS0_C, FN_SSI_WS0_B,
2185 /* IP8_5_4 [2] */
2186 FN_DU0_DB7, 0, FN_SSI_SCK0_B, FN_HIFEBL_B,
2187 /* IP8_3_2 [2] */
2188 FN_DU0_DB6, 0, FN_HIFRDY, 0,
2189 /* IP8_1_0 [2] */
2190 FN_DU0_DB5, 0, FN_HIFDREQ, 0 }
2191 },
2192 { PINMUX_CFG_REG_VAR("IPSR9", 0xFFFC0040, 32,
2193 2, 2, 2, 2, 2, 2, 2, 2,
2194 2, 2, 2, 2, 2, 2, 2, 2) {
2195 /* IP9_31_30 [2] */
2196 0, 0, 0, 0,
2197 /* IP9_29_28 [2] */
2198 FN_SSI_SDATA1_A, FN_VI1_3_B, FN_LCD_DATA14_B, 0,
2199 /* IP9_27_26 [2] */
2200 FN_SSI_WS1_A, FN_VI1_2_B, FN_LCD_DATA13_B, 0,
2201 /* IP9_25_24 [2] */
2202 FN_SSI_SCK1_A, FN_VI1_1_B, FN_TIOC2B_B, FN_LCD_DATA12_B,
2203 /* IP9_23_22 [2] */
2204 FN_SSI_SDATA0_A, FN_VI1_0_B, FN_TIOC2A_B, FN_LCD_DATA11_B,
2205 /* IP9_21_20 [2] */
2206 FN_SSI_WS0_A, FN_TIOC1B_B, FN_LCD_DATA10_B, 0,
2207 /* IP9_19_18 [2] */
2208 FN_SSI_SCK0_A, FN_TIOC1A_B, FN_LCD_DATA9_B, 0,
2209 /* IP9_17_16 [2] */
2210 FN_VI1_7_A, FN_FCE_B, FN_LCD_DATA8_B, 0,
2211 /* IP9_15_14 [2] */
2212 FN_VI1_6_A, 0, FN_FD7_B, FN_LCD_DATA7_B,
2213 /* IP9_13_12 [2] */
2214 FN_VI1_5_A, 0, FN_FD6_B, FN_LCD_DATA6_B,
2215 /* IP9_11_10 [2] */
2216 FN_VI1_4_A, 0, FN_FD5_B, FN_LCD_DATA5_B,
2217 /* IP9_9_8 [2] */
2218 FN_VI1_3_A, 0, FN_FD4_B, FN_LCD_DATA4_B,
2219 /* IP9_7_6 [2] */
2220 FN_VI1_2_A, 0, FN_FD3_B, FN_LCD_DATA3_B,
2221 /* IP9_5_4 [2] */
2222 FN_VI1_1_A, 0, FN_FD2_B, FN_LCD_DATA2_B,
2223 /* IP9_3_2 [2] */
2224 FN_VI1_0_A, 0, FN_FD1_B, FN_LCD_DATA1_B,
2225 /* IP9_1_0 [2] */
2226 FN_VI1_CLK_A, 0, FN_FD0_B, FN_LCD_DATA0_B }
2227 },
2228 { PINMUX_CFG_REG_VAR("IPSR10", 0xFFFC0044, 32,
2229 2, 2, 2, 1, 2, 1, 3,
2230 3, 1, 3, 3, 3, 3, 3) {
2231 /* IP9_31_30 [2] */
2232 0, 0, 0, 0,
2233 /* IP10_29_28 [2] */
2234 FN_CAN1_TX_A, FN_TX5_C, FN_MLB_DAT, 0,
2235 /* IP10_27_26 [2] */
2236 FN_CAN0_RX_A, FN_IRQ0_B, FN_MLB_SIG, 0,
2237 /* IP10_25 [1] */
2238 FN_CAN1_RX_A, FN_IRQ1_B,
2239 /* IP10_24_23 [2] */
2240 FN_CAN0_TX_A, FN_TX4_D, FN_MLB_CLK, 0,
2241 /* IP10_22 [1] */
2242 FN_CAN_CLK_A, FN_RX4_D,
2243 /* IP10_21_19 [3] */
2244 FN_AUDIO_CLKOUT, FN_TX1_E, FN_HRTS0_C, FN_FSE_B,
2245 FN_LCD_M_DISP_B, 0, 0, 0,
2246 /* IP10_18_16 [3] */
2247 FN_AUDIO_CLKC, FN_SCK1_E, FN_HCTS0_C, FN_FRB_B,
2248 FN_LCD_VEPWC_B, 0, 0, 0,
2249 /* IP10_15 [1] */
2250 FN_AUDIO_CLKB_A, FN_LCD_CLK_B,
2251 /* IP10_14_12 [3] */
2252 FN_AUDIO_CLKA_A, FN_VI1_CLK_B, FN_SCK1_D, FN_IECLK_B,
2253 FN_LCD_FLM_B, 0, 0, 0,
2254 /* IP10_11_9 [3] */
2255 FN_SSI_SDATA3, FN_VI1_7_B, FN_HTX0_C, FN_FWE_B,
2256 FN_LCD_CL2_B, 0, 0, 0,
2257 /* IP10_8_6 [3] */
2258 FN_SSI_SDATA2, FN_VI1_6_B, FN_HRX0_C, FN_FRE_B,
2259 FN_LCD_CL1_B, 0, 0, 0,
2260 /* IP10_5_3 [3] */
2261 FN_SSI_WS23, FN_VI1_5_B, FN_TX1_D, FN_HSCK0_C, FN_FALE_B,
2262 FN_LCD_DON_B, 0, 0, 0,
2263 /* IP10_2_0 [3] */
2264 FN_SSI_SCK23, FN_VI1_4_B, FN_RX1_D, FN_FCLE_B,
2265 FN_LCD_DATA15_B, 0, 0, 0 }
2266 },
2267 { PINMUX_CFG_REG_VAR("IPSR11", 0xFFFC0048, 32,
2268 3, 1, 2, 2, 2, 3, 3, 1, 2, 3, 3, 1, 1, 1, 1) {
2269 /* IP11_31_29 [3] */
2270 0, 0, 0, 0, 0, 0, 0, 0,
2271 /* IP11_28 [1] */
2272 FN_PRESETOUT, FN_ST_CLKOUT,
2273 /* IP11_27_26 [2] */
2274 FN_DACK1, FN_HSPI_CS_B, FN_TX4_B, FN_ET0_RX_CLK_A,
2275 /* IP11_25_23 [3] */
2276 FN_DREQ1, FN_HSPI_CLK_B, FN_RX4_B, FN_ET0_PHY_INT_C,
2277 FN_ET0_TX_CLK_A, 0, 0, 0,
2278 /* IP11_22_21 [2] */
2279 FN_DACK0, FN_SD1_DAT3_A, FN_ET0_TX_ER, 0,
2280 /* IP11_20_19 [2] */
2281 FN_DREQ0, FN_SD1_CLK_A, FN_ET0_TX_EN, 0,
2282 /* IP11_18_16 [3] */
2283 FN_USB_OVC1, FN_RX3_D, FN_CAN1_RX_B, FN_RX5_D,
2284 FN_IERX_B, 0, 0, 0,
2285 /* IP11_15_13 [3] */
2286 FN_PENC1, FN_TX3_D, FN_CAN1_TX_B, FN_TX5_D,
2287 FN_IETX_B, 0, 0, 0,
2288 /* IP11_12 [1] */
2289 FN_TX0_A, FN_HSPI_TX_A,
2290 /* IP11_11_10 [2] */
2291 FN_RX0_A, FN_HSPI_RX_A, FN_RMII0_RXD0_A, FN_ET0_ERXD6,
2292 /* IP11_9_7 [3] */
2293 FN_SCK0_A, FN_HSPI_CS_A, FN_VI0_CLKENB, FN_RMII0_TXD1_A,
2294 FN_ET0_ERXD5, 0, 0, 0,
2295 /* IP11_6_4 [3] */
2296 FN_SCIF_CLK_A, FN_HSPI_CLK_A, FN_VI0_CLK, FN_RMII0_TXD0_A,
2297 FN_ET0_ERXD4, 0, 0, 0,
2298 /* IP11_3 [1] */
2299 FN_SDSELF, FN_RTS1_E,
2300 /* IP11_2 [1] */
2301 FN_SDA0, FN_HIFEBL_A,
2302 /* IP11_1 [1] */
2303 FN_SDA1, FN_RX1_E,
2304 /* IP11_0 [1] */
2305 FN_SCL1, FN_SCIF_CLK_C }
2306 },
2307 { PINMUX_CFG_REG_VAR("MOD_SEL1", 0xFFFC004C, 32,
2308 3, 1, 1, 1, 1, 1, 1, 2, 1, 1, 1, 2, 2,
2309 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) {
2310 /* SEL1_31_29 [3] */
2311 0, 0, 0, 0, 0, 0, 0, 0,
2312 /* SEL1_28 [1] */
2313 FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,
2314 /* SEL1_27 [1] */
2315 FN_SEL_RQSPI_0, FN_SEL_RQSPI_1,
2316 /* SEL1_26 [1] */
2317 FN_SEL_VIN1_0, FN_SEL_VIN1_1,
2318 /* SEL1_25 [1] */
2319 FN_SEL_HIF_0, FN_SEL_HIF_1,
2320 /* SEL1_24 [1] */
2321 FN_SEL_RSPI_0, FN_SEL_RSPI_1,
2322 /* SEL1_23 [1] */
2323 FN_SEL_LCDC_0, FN_SEL_LCDC_1,
2324 /* SEL1_22_21 [2] */
2325 FN_SEL_ET0_CTL_0, FN_SEL_ET0_CTL_1, FN_SEL_ET0_CTL_2, 0,
2326 /* SEL1_20 [1] */
2327 FN_SEL_ET0_0, FN_SEL_ET0_1,
2328 /* SEL1_19 [1] */
2329 FN_SEL_RMII_0, FN_SEL_RMII_1,
2330 /* SEL1_18 [1] */
2331 FN_SEL_TMU_0, FN_SEL_TMU_1,
2332 /* SEL1_17_16 [2] */
2333 FN_SEL_HSPI_0, FN_SEL_HSPI_1, FN_SEL_HSPI_2, 0,
2334 /* SEL1_15_14 [2] */
2335 FN_SEL_HSCIF_0, FN_SEL_HSCIF_1, FN_SEL_HSCIF_2, FN_SEL_HSCIF_3,
2336 /* SEL1_13 [1] */
2337 FN_SEL_RCAN_CLK_0, FN_SEL_RCAN_CLK_1,
2338 /* SEL1_12_11 [2] */
2339 FN_SEL_RCAN1_0, FN_SEL_RCAN1_1, FN_SEL_RCAN1_2, 0,
2340 /* SEL1_10 [1] */
2341 FN_SEL_RCAN0_0, FN_SEL_RCAN0_1,
2342 /* SEL1_9 [1] */
2343 FN_SEL_SDHI2_0, FN_SEL_SDHI2_1,
2344 /* SEL1_8 [1] */
2345 FN_SEL_SDHI1_0, FN_SEL_SDHI1_1,
2346 /* SEL1_7 [1] */
2347 FN_SEL_SDHI0_0, FN_SEL_SDHI0_1,
2348 /* SEL1_6 [1] */
2349 FN_SEL_SSI1_0, FN_SEL_SSI1_1,
2350 /* SEL1_5 [1] */
2351 FN_SEL_SSI0_0, FN_SEL_SSI0_1,
2352 /* SEL1_4 [1] */
2353 FN_SEL_AUDIO_CLKB_0, FN_SEL_AUDIO_CLKB_1,
2354 /* SEL1_3 [1] */
2355 FN_SEL_AUDIO_CLKA_0, FN_SEL_AUDIO_CLKA_1,
2356 /* SEL1_2 [1] */
2357 FN_SEL_FLCTL_0, FN_SEL_FLCTL_1,
2358 /* SEL1_1 [1] */
2359 FN_SEL_MMC_0, FN_SEL_MMC_1,
2360 /* SEL1_0 [1] */
2361 FN_SEL_INTC_0, FN_SEL_INTC_1 }
2362 },
2363 { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xFFFC0050, 32,
2364 1, 1, 1, 1, 1, 1, 1, 1,
2365 1, 1, 1, 2, 2, 1, 2, 2, 3, 2, 3, 2, 2) {
2366 /* SEL2_31 [1] */
2367 0, 0,
2368 /* SEL2_30 [1] */
2369 0, 0,
2370 /* SEL2_29 [1] */
2371 0, 0,
2372 /* SEL2_28 [1] */
2373 0, 0,
2374 /* SEL2_27 [1] */
2375 0, 0,
2376 /* SEL2_26 [1] */
2377 0, 0,
2378 /* SEL2_25 [1] */
2379 0, 0,
2380 /* SEL2_24 [1] */
2381 0, 0,
2382 /* SEL2_23 [1] */
2383 FN_SEL_MTU2_CLK_0, FN_SEL_MTU2_CLK_1,
2384 /* SEL2_22 [1] */
2385 FN_SEL_MTU2_CH4_0, FN_SEL_MTU2_CH4_1,
2386 /* SEL2_21 [1] */
2387 FN_SEL_MTU2_CH3_0, FN_SEL_MTU2_CH3_1,
2388 /* SEL2_20_19 [2] */
2389 FN_SEL_MTU2_CH2_0, FN_SEL_MTU2_CH2_1, FN_SEL_MTU2_CH2_2, 0,
2390 /* SEL2_18_17 [2] */
2391 FN_SEL_MTU2_CH1_0, FN_SEL_MTU2_CH1_1, FN_SEL_MTU2_CH1_2, 0,
2392 /* SEL2_16 [1] */
2393 FN_SEL_MTU2_CH0_0, FN_SEL_MTU2_CH0_1,
2394 /* SEL2_15_14 [2] */
2395 FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, FN_SEL_SCIF5_2, FN_SEL_SCIF5_3,
2396 /* SEL2_13_12 [2] */
2397 FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, FN_SEL_SCIF4_2, FN_SEL_SCIF4_3,
2398 /* SEL2_11_9 [3] */
2399 FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, FN_SEL_SCIF3_2, FN_SEL_SCIF3_3,
2400 FN_SEL_SCIF3_4, 0, 0, 0,
2401 /* SEL2_8_7 [2] */
2402 FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, FN_SEL_SCIF2_2, FN_SEL_SCIF2_3,
2403 /* SEL2_6_4 [3] */
2404 FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,
2405 FN_SEL_SCIF1_4, 0, 0, 0,
2406 /* SEL2_3_2 [2] */
2407 FN_SEL_SCIF0_0, FN_SEL_SCIF0_1, FN_SEL_SCIF0_2, 0,
2408 /* SEL2_1_0 [2] */
2409 FN_SEL_SCIF_CLK_0, FN_SEL_SCIF_CLK_1, FN_SEL_SCIF_CLK_2, 0 }
2410 },
2411 /* GPIO 0 - 5*/
2412 { PINMUX_CFG_REG("INOUTSEL0", 0xFFC40004, 32, 1) { GP_INOUTSEL(0) } },
2413 { PINMUX_CFG_REG("INOUTSEL1", 0xFFC41004, 32, 1) { GP_INOUTSEL(1) } },
2414 { PINMUX_CFG_REG("INOUTSEL2", 0xFFC42004, 32, 1) { GP_INOUTSEL(2) } },
2415 { PINMUX_CFG_REG("INOUTSEL3", 0xFFC43004, 32, 1) { GP_INOUTSEL(3) } },
2416 { PINMUX_CFG_REG("INOUTSEL4", 0xFFC44004, 32, 1) { GP_INOUTSEL(4) } },
2417 { PINMUX_CFG_REG("INOUTSEL5", 0xffc45004, 32, 1) {
2418 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 31 - 24 */
2419 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 23 - 16 */
2420 0, 0, 0, 0, 0, 0, 0, 0, /* 15 - 12 */
2421 GP_5_11_IN, GP_5_11_OUT,
2422 GP_5_10_IN, GP_5_10_OUT,
2423 GP_5_9_IN, GP_5_9_OUT,
2424 GP_5_8_IN, GP_5_8_OUT,
2425 GP_5_7_IN, GP_5_7_OUT,
2426 GP_5_6_IN, GP_5_6_OUT,
2427 GP_5_5_IN, GP_5_5_OUT,
2428 GP_5_4_IN, GP_5_4_OUT,
2429 GP_5_3_IN, GP_5_3_OUT,
2430 GP_5_2_IN, GP_5_2_OUT,
2431 GP_5_1_IN, GP_5_1_OUT,
2432 GP_5_0_IN, GP_5_0_OUT }
2433 },
2434 { },
2435};
2436
2437static struct pinmux_data_reg pinmux_data_regs[] = {
2438 /* GPIO 0 - 5*/
2439 { PINMUX_DATA_REG("INDT0", 0xFFC4000C, 32) { GP_INDT(0) } },
2440 { PINMUX_DATA_REG("INDT1", 0xFFC4100C, 32) { GP_INDT(1) } },
2441 { PINMUX_DATA_REG("INDT2", 0xFFC4200C, 32) { GP_INDT(2) } },
2442 { PINMUX_DATA_REG("INDT3", 0xFFC4300C, 32) { GP_INDT(3) } },
2443 { PINMUX_DATA_REG("INDT4", 0xFFC4400C, 32) { GP_INDT(4) } },
2444 { PINMUX_DATA_REG("INDT5", 0xFFC4500C, 32) {
2445 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2446 0, 0, 0, 0,
2447 GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA,
2448 GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA,
2449 GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA }
2450 },
2451 { },
2452};
2453
2454struct sh_pfc_soc_info sh7734_pinmux_info = {
2455 .name = "sh7734_pfc",
2456
2457 .unlock_reg = 0xFFFC0000,
2458
2459 .reserved_id = PINMUX_RESERVED,
2460 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
2461 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
2462 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
2463 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
2464 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
2465
2466 .first_gpio = GPIO_GP_0_0,
2467 .last_gpio = GPIO_FN_ST_CLKOUT,
2468
2469 .gpios = pinmux_gpios,
2470 .cfg_regs = pinmux_config_regs,
2471 .data_regs = pinmux_data_regs,
2472
2473 .gpio_data = pinmux_data,
2474 .gpio_data_size = ARRAY_SIZE(pinmux_data),
2475};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7757.c b/drivers/pinctrl/sh-pfc/pfc-sh7757.c
new file mode 100644
index 000000000000..5ed74cd0ba99
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7757.c
@@ -0,0 +1,2282 @@
1/*
2 * SH7757 (B0 step) Pinmux
3 *
4 * Copyright (C) 2009-2010 Renesas Solutions Corp.
5 *
6 * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
7 *
8 * Based on SH7723 Pinmux
9 * Copyright (C) 2008 Magnus Damm
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15
16#include <linux/init.h>
17#include <linux/kernel.h>
18#include <cpu/sh7757.h>
19
20#include "sh_pfc.h"
21
22enum {
23 PINMUX_RESERVED = 0,
24
25 PINMUX_DATA_BEGIN,
26 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
27 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA,
28 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
29 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA,
30 PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
31 PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA,
32 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
33 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA,
34 PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
35 PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA,
36 PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
37 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA,
38 PTG7_DATA, PTG6_DATA, PTG5_DATA, PTG4_DATA,
39 PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA,
40 PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
41 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
42 PTI7_DATA, PTI6_DATA, PTI5_DATA, PTI4_DATA,
43 PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA,
44 PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
45 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA,
46 PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
47 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
48 PTL6_DATA, PTL5_DATA, PTL4_DATA,
49 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA,
50 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
51 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
52 PTN6_DATA, PTN5_DATA, PTN4_DATA,
53 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA,
54 PTO7_DATA, PTO6_DATA, PTO5_DATA, PTO4_DATA,
55 PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA,
56 PTP7_DATA, PTP6_DATA, PTP5_DATA, PTP4_DATA,
57 PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA,
58 PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
59 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA,
60 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
61 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
62 PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA,
63 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
64 PTT7_DATA, PTT6_DATA, PTT5_DATA, PTT4_DATA,
65 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
66 PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA,
67 PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
68 PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
69 PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA,
70 PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
71 PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA,
72 PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
73 PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA,
74 PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
75 PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA,
76 PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
77 PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA,
78 PINMUX_DATA_END,
79
80 PINMUX_INPUT_BEGIN,
81 PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN,
82 PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN,
83 PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN,
84 PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN,
85 PTC7_IN, PTC6_IN, PTC5_IN, PTC4_IN,
86 PTC3_IN, PTC2_IN, PTC1_IN, PTC0_IN,
87 PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN,
88 PTD3_IN, PTD2_IN, PTD1_IN, PTD0_IN,
89 PTE7_IN, PTE6_IN, PTE5_IN, PTE4_IN,
90 PTE3_IN, PTE2_IN, PTE1_IN, PTE0_IN,
91 PTF7_IN, PTF6_IN, PTF5_IN, PTF4_IN,
92 PTF3_IN, PTF2_IN, PTF1_IN, PTF0_IN,
93 PTG7_IN, PTG6_IN, PTG5_IN, PTG4_IN,
94 PTG3_IN, PTG2_IN, PTG1_IN, PTG0_IN,
95 PTH7_IN, PTH6_IN, PTH5_IN, PTH4_IN,
96 PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN,
97 PTI7_IN, PTI6_IN, PTI5_IN, PTI4_IN,
98 PTI3_IN, PTI2_IN, PTI1_IN, PTI0_IN,
99 PTJ6_IN, PTJ5_IN, PTJ4_IN,
100 PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN,
101 PTK7_IN, PTK6_IN, PTK5_IN, PTK4_IN,
102 PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN,
103 PTL6_IN, PTL5_IN, PTL4_IN,
104 PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN,
105 PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN,
106 PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
107 PTN6_IN, PTN5_IN, PTN4_IN,
108 PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN,
109 PTO7_IN, PTO6_IN, PTO5_IN, PTO4_IN,
110 PTO3_IN, PTO2_IN, PTO1_IN, PTO0_IN,
111 PTP7_IN, PTP6_IN, PTP5_IN, PTP4_IN,
112 PTP3_IN, PTP2_IN, PTP1_IN, PTP0_IN,
113 PTQ6_IN, PTQ5_IN, PTQ4_IN,
114 PTQ3_IN, PTQ2_IN, PTQ1_IN, PTQ0_IN,
115 PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN,
116 PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN,
117 PTS7_IN, PTS6_IN, PTS5_IN, PTS4_IN,
118 PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN,
119 PTT7_IN, PTT6_IN, PTT5_IN, PTT4_IN,
120 PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN,
121 PTU7_IN, PTU6_IN, PTU5_IN, PTU4_IN,
122 PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
123 PTV7_IN, PTV6_IN, PTV5_IN, PTV4_IN,
124 PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
125 PTW7_IN, PTW6_IN, PTW5_IN, PTW4_IN,
126 PTW3_IN, PTW2_IN, PTW1_IN, PTW0_IN,
127 PTX7_IN, PTX6_IN, PTX5_IN, PTX4_IN,
128 PTX3_IN, PTX2_IN, PTX1_IN, PTX0_IN,
129 PTY7_IN, PTY6_IN, PTY5_IN, PTY4_IN,
130 PTY3_IN, PTY2_IN, PTY1_IN, PTY0_IN,
131 PTZ7_IN, PTZ6_IN, PTZ5_IN, PTZ4_IN,
132 PTZ3_IN, PTZ2_IN, PTZ1_IN, PTZ0_IN,
133 PINMUX_INPUT_END,
134
135 PINMUX_INPUT_PULLUP_BEGIN,
136 PTA7_IN_PU, PTA6_IN_PU, PTA5_IN_PU, PTA4_IN_PU,
137 PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
138 PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
139 PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU, PTD0_IN_PU,
140 PTE7_IN_PU, PTE6_IN_PU, PTE5_IN_PU, PTE4_IN_PU,
141 PTE3_IN_PU, PTE2_IN_PU, PTE1_IN_PU, PTE0_IN_PU,
142 PTF7_IN_PU, PTF6_IN_PU, PTF5_IN_PU, PTF4_IN_PU,
143 PTF3_IN_PU, PTF2_IN_PU, PTF1_IN_PU, PTF0_IN_PU,
144 PTG7_IN_PU, PTG6_IN_PU, PTG4_IN_PU,
145 PTH7_IN_PU, PTH6_IN_PU, PTH5_IN_PU, PTH4_IN_PU,
146 PTH3_IN_PU, PTH2_IN_PU, PTH1_IN_PU, PTH0_IN_PU,
147 PTI7_IN_PU, PTI6_IN_PU, PTI4_IN_PU,
148 PTI3_IN_PU, PTI2_IN_PU, PTI1_IN_PU, PTI0_IN_PU,
149 PTJ6_IN_PU, PTJ5_IN_PU, PTJ4_IN_PU,
150 PTJ3_IN_PU, PTJ2_IN_PU, PTJ1_IN_PU, PTJ0_IN_PU,
151 PTK7_IN_PU, PTK6_IN_PU, PTK5_IN_PU, PTK4_IN_PU,
152 PTK3_IN_PU, PTK2_IN_PU, PTK1_IN_PU, PTK0_IN_PU,
153 PTL6_IN_PU, PTL5_IN_PU, PTL4_IN_PU,
154 PTL3_IN_PU, PTL2_IN_PU, PTL1_IN_PU, PTL0_IN_PU,
155 PTM7_IN_PU, PTM6_IN_PU, PTM5_IN_PU, PTM4_IN_PU,
156 PTN4_IN_PU,
157 PTN3_IN_PU, PTN2_IN_PU, PTN1_IN_PU, PTN0_IN_PU,
158 PTO7_IN_PU, PTO6_IN_PU, PTO5_IN_PU, PTO4_IN_PU,
159 PTO3_IN_PU, PTO2_IN_PU, PTO1_IN_PU, PTO0_IN_PU,
160 PTT7_IN_PU, PTT6_IN_PU, PTT5_IN_PU, PTT4_IN_PU,
161 PTT3_IN_PU, PTT2_IN_PU, PTT1_IN_PU, PTT0_IN_PU,
162 PTU7_IN_PU, PTU6_IN_PU, PTU5_IN_PU, PTU4_IN_PU,
163 PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU,
164 PTV7_IN_PU, PTV6_IN_PU, PTV5_IN_PU, PTV4_IN_PU,
165 PTV3_IN_PU, PTV2_IN_PU,
166 PTW1_IN_PU, PTW0_IN_PU,
167 PTX7_IN_PU, PTX6_IN_PU, PTX5_IN_PU, PTX4_IN_PU,
168 PTX3_IN_PU, PTX2_IN_PU, PTX1_IN_PU, PTX0_IN_PU,
169 PTY7_IN_PU, PTY6_IN_PU, PTY5_IN_PU, PTY4_IN_PU,
170 PTY3_IN_PU, PTY2_IN_PU, PTY1_IN_PU, PTY0_IN_PU,
171 PTZ7_IN_PU, PTZ6_IN_PU, PTZ5_IN_PU, PTZ4_IN_PU,
172 PTZ3_IN_PU, PTZ2_IN_PU, PTZ1_IN_PU, PTZ0_IN_PU,
173 PINMUX_INPUT_PULLUP_END,
174
175 PINMUX_OUTPUT_BEGIN,
176 PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
177 PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
178 PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
179 PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT,
180 PTC7_OUT, PTC6_OUT, PTC5_OUT, PTC4_OUT,
181 PTC3_OUT, PTC2_OUT, PTC1_OUT, PTC0_OUT,
182 PTD7_OUT, PTD6_OUT, PTD5_OUT, PTD4_OUT,
183 PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT,
184 PTE7_OUT, PTE6_OUT, PTE5_OUT, PTE4_OUT,
185 PTE3_OUT, PTE2_OUT, PTE1_OUT, PTE0_OUT,
186 PTF7_OUT, PTF6_OUT, PTF5_OUT, PTF4_OUT,
187 PTF3_OUT, PTF2_OUT, PTF1_OUT, PTF0_OUT,
188 PTG7_OUT, PTG6_OUT, PTG5_OUT, PTG4_OUT,
189 PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT,
190 PTH7_OUT, PTH6_OUT, PTH5_OUT, PTH4_OUT,
191 PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
192 PTI7_OUT, PTI6_OUT, PTI5_OUT, PTI4_OUT,
193 PTI3_OUT, PTI2_OUT, PTI1_OUT, PTI0_OUT,
194 PTJ6_OUT, PTJ5_OUT, PTJ4_OUT,
195 PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT,
196 PTK7_OUT, PTK6_OUT, PTK5_OUT, PTK4_OUT,
197 PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT,
198 PTL6_OUT, PTL5_OUT, PTL4_OUT,
199 PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT,
200 PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT,
201 PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
202 PTN6_OUT, PTN5_OUT, PTN4_OUT,
203 PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT,
204 PTO7_OUT, PTO6_OUT, PTO5_OUT, PTO4_OUT,
205 PTO3_OUT, PTO2_OUT, PTO1_OUT, PTO0_OUT,
206 PTP7_OUT, PTP6_OUT, PTP5_OUT, PTP4_OUT,
207 PTP3_OUT, PTP2_OUT, PTP1_OUT, PTP0_OUT,
208 PTQ6_OUT, PTQ5_OUT, PTQ4_OUT,
209 PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT,
210 PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT,
211 PTR3_OUT, PTR2_OUT, PTR1_OUT, PTR0_OUT,
212 PTS7_OUT, PTS6_OUT, PTS5_OUT, PTS4_OUT,
213 PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT,
214 PTT7_OUT, PTT6_OUT, PTT5_OUT, PTT4_OUT,
215 PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT,
216 PTU7_OUT, PTU6_OUT, PTU5_OUT, PTU4_OUT,
217 PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT,
218 PTV7_OUT, PTV6_OUT, PTV5_OUT, PTV4_OUT,
219 PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT,
220 PTW7_OUT, PTW6_OUT, PTW5_OUT, PTW4_OUT,
221 PTW3_OUT, PTW2_OUT, PTW1_OUT, PTW0_OUT,
222 PTX7_OUT, PTX6_OUT, PTX5_OUT, PTX4_OUT,
223 PTX3_OUT, PTX2_OUT, PTX1_OUT, PTX0_OUT,
224 PTY7_OUT, PTY6_OUT, PTY5_OUT, PTY4_OUT,
225 PTY3_OUT, PTY2_OUT, PTY1_OUT, PTY0_OUT,
226 PTZ7_OUT, PTZ6_OUT, PTZ5_OUT, PTZ4_OUT,
227 PTZ3_OUT, PTZ2_OUT, PTZ1_OUT, PTZ0_OUT,
228 PINMUX_OUTPUT_END,
229
230 PINMUX_FUNCTION_BEGIN,
231 PTA7_FN, PTA6_FN, PTA5_FN, PTA4_FN,
232 PTA3_FN, PTA2_FN, PTA1_FN, PTA0_FN,
233 PTB7_FN, PTB6_FN, PTB5_FN, PTB4_FN,
234 PTB3_FN, PTB2_FN, PTB1_FN, PTB0_FN,
235 PTC7_FN, PTC6_FN, PTC5_FN, PTC4_FN,
236 PTC3_FN, PTC2_FN, PTC1_FN, PTC0_FN,
237 PTD7_FN, PTD6_FN, PTD5_FN, PTD4_FN,
238 PTD3_FN, PTD2_FN, PTD1_FN, PTD0_FN,
239 PTE7_FN, PTE6_FN, PTE5_FN, PTE4_FN,
240 PTE3_FN, PTE2_FN, PTE1_FN, PTE0_FN,
241 PTF7_FN, PTF6_FN, PTF5_FN, PTF4_FN,
242 PTF3_FN, PTF2_FN, PTF1_FN, PTF0_FN,
243 PTG7_FN, PTG6_FN, PTG5_FN, PTG4_FN,
244 PTG3_FN, PTG2_FN, PTG1_FN, PTG0_FN,
245 PTH7_FN, PTH6_FN, PTH5_FN, PTH4_FN,
246 PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN,
247 PTI7_FN, PTI6_FN, PTI5_FN, PTI4_FN,
248 PTI3_FN, PTI2_FN, PTI1_FN, PTI0_FN,
249 PTJ6_FN, PTJ5_FN, PTJ4_FN,
250 PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN,
251 PTK7_FN, PTK6_FN, PTK5_FN, PTK4_FN,
252 PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN,
253 PTL6_FN, PTL5_FN, PTL4_FN,
254 PTL3_FN, PTL2_FN, PTL1_FN, PTL0_FN,
255 PTM7_FN, PTM6_FN, PTM5_FN, PTM4_FN,
256 PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN,
257 PTN6_FN, PTN5_FN, PTN4_FN,
258 PTN3_FN, PTN2_FN, PTN1_FN, PTN0_FN,
259 PTO7_FN, PTO6_FN, PTO5_FN, PTO4_FN,
260 PTO3_FN, PTO2_FN, PTO1_FN, PTO0_FN,
261 PTP7_FN, PTP6_FN, PTP5_FN, PTP4_FN,
262 PTP3_FN, PTP2_FN, PTP1_FN, PTP0_FN,
263 PTQ6_FN, PTQ5_FN, PTQ4_FN,
264 PTQ3_FN, PTQ2_FN, PTQ1_FN, PTQ0_FN,
265 PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN,
266 PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN,
267 PTS7_FN, PTS6_FN, PTS5_FN, PTS4_FN,
268 PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN,
269 PTT7_FN, PTT6_FN, PTT5_FN, PTT4_FN,
270 PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN,
271 PTU7_FN, PTU6_FN, PTU5_FN, PTU4_FN,
272 PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN,
273 PTV7_FN, PTV6_FN, PTV5_FN, PTV4_FN,
274 PTV3_FN, PTV2_FN, PTV1_FN, PTV0_FN,
275 PTW7_FN, PTW6_FN, PTW5_FN, PTW4_FN,
276 PTW3_FN, PTW2_FN, PTW1_FN, PTW0_FN,
277 PTX7_FN, PTX6_FN, PTX5_FN, PTX4_FN,
278 PTX3_FN, PTX2_FN, PTX1_FN, PTX0_FN,
279 PTY7_FN, PTY6_FN, PTY5_FN, PTY4_FN,
280 PTY3_FN, PTY2_FN, PTY1_FN, PTY0_FN,
281 PTZ7_FN, PTZ6_FN, PTZ5_FN, PTZ4_FN,
282 PTZ3_FN, PTZ2_FN, PTZ1_FN, PTZ0_FN,
283
284 PS0_15_FN1, PS0_15_FN2,
285 PS0_14_FN1, PS0_14_FN2,
286 PS0_13_FN1, PS0_13_FN2,
287 PS0_12_FN1, PS0_12_FN2,
288 PS0_11_FN1, PS0_11_FN2,
289 PS0_10_FN1, PS0_10_FN2,
290 PS0_9_FN1, PS0_9_FN2,
291 PS0_8_FN1, PS0_8_FN2,
292 PS0_7_FN1, PS0_7_FN2,
293 PS0_6_FN1, PS0_6_FN2,
294 PS0_5_FN1, PS0_5_FN2,
295 PS0_4_FN1, PS0_4_FN2,
296 PS0_3_FN1, PS0_3_FN2,
297 PS0_2_FN1, PS0_2_FN2,
298
299 PS1_10_FN1, PS1_10_FN2,
300 PS1_9_FN1, PS1_9_FN2,
301 PS1_8_FN1, PS1_8_FN2,
302 PS1_2_FN1, PS1_2_FN2,
303
304 PS2_13_FN1, PS2_13_FN2,
305 PS2_12_FN1, PS2_12_FN2,
306 PS2_7_FN1, PS2_7_FN2,
307 PS2_6_FN1, PS2_6_FN2,
308 PS2_5_FN1, PS2_5_FN2,
309 PS2_4_FN1, PS2_4_FN2,
310 PS2_2_FN1, PS2_2_FN2,
311
312 PS3_15_FN1, PS3_15_FN2,
313 PS3_14_FN1, PS3_14_FN2,
314 PS3_13_FN1, PS3_13_FN2,
315 PS3_12_FN1, PS3_12_FN2,
316 PS3_11_FN1, PS3_11_FN2,
317 PS3_10_FN1, PS3_10_FN2,
318 PS3_9_FN1, PS3_9_FN2,
319 PS3_8_FN1, PS3_8_FN2,
320 PS3_7_FN1, PS3_7_FN2,
321 PS3_2_FN1, PS3_2_FN2,
322 PS3_1_FN1, PS3_1_FN2,
323
324 PS4_14_FN1, PS4_14_FN2,
325 PS4_13_FN1, PS4_13_FN2,
326 PS4_12_FN1, PS4_12_FN2,
327 PS4_10_FN1, PS4_10_FN2,
328 PS4_9_FN1, PS4_9_FN2,
329 PS4_8_FN1, PS4_8_FN2,
330 PS4_4_FN1, PS4_4_FN2,
331 PS4_3_FN1, PS4_3_FN2,
332 PS4_2_FN1, PS4_2_FN2,
333 PS4_1_FN1, PS4_1_FN2,
334 PS4_0_FN1, PS4_0_FN2,
335
336 PS5_11_FN1, PS5_11_FN2,
337 PS5_10_FN1, PS5_10_FN2,
338 PS5_9_FN1, PS5_9_FN2,
339 PS5_8_FN1, PS5_8_FN2,
340 PS5_7_FN1, PS5_7_FN2,
341 PS5_6_FN1, PS5_6_FN2,
342 PS5_5_FN1, PS5_5_FN2,
343 PS5_4_FN1, PS5_4_FN2,
344 PS5_3_FN1, PS5_3_FN2,
345 PS5_2_FN1, PS5_2_FN2,
346
347 PS6_15_FN1, PS6_15_FN2,
348 PS6_14_FN1, PS6_14_FN2,
349 PS6_13_FN1, PS6_13_FN2,
350 PS6_12_FN1, PS6_12_FN2,
351 PS6_11_FN1, PS6_11_FN2,
352 PS6_10_FN1, PS6_10_FN2,
353 PS6_9_FN1, PS6_9_FN2,
354 PS6_8_FN1, PS6_8_FN2,
355 PS6_7_FN1, PS6_7_FN2,
356 PS6_6_FN1, PS6_6_FN2,
357 PS6_5_FN1, PS6_5_FN2,
358 PS6_4_FN1, PS6_4_FN2,
359 PS6_3_FN1, PS6_3_FN2,
360 PS6_2_FN1, PS6_2_FN2,
361 PS6_1_FN1, PS6_1_FN2,
362 PS6_0_FN1, PS6_0_FN2,
363
364 PS7_15_FN1, PS7_15_FN2,
365 PS7_14_FN1, PS7_14_FN2,
366 PS7_13_FN1, PS7_13_FN2,
367 PS7_12_FN1, PS7_12_FN2,
368 PS7_11_FN1, PS7_11_FN2,
369 PS7_10_FN1, PS7_10_FN2,
370 PS7_9_FN1, PS7_9_FN2,
371 PS7_8_FN1, PS7_8_FN2,
372 PS7_7_FN1, PS7_7_FN2,
373 PS7_6_FN1, PS7_6_FN2,
374 PS7_5_FN1, PS7_5_FN2,
375 PS7_4_FN1, PS7_4_FN2,
376
377 PS8_15_FN1, PS8_15_FN2,
378 PS8_14_FN1, PS8_14_FN2,
379 PS8_13_FN1, PS8_13_FN2,
380 PS8_12_FN1, PS8_12_FN2,
381 PS8_11_FN1, PS8_11_FN2,
382 PS8_10_FN1, PS8_10_FN2,
383 PS8_9_FN1, PS8_9_FN2,
384 PS8_8_FN1, PS8_8_FN2,
385 PINMUX_FUNCTION_END,
386
387 PINMUX_MARK_BEGIN,
388 /* PTA (mobule: LBSC, RGMII) */
389 BS_MARK, RDWR_MARK, WE1_MARK, RDY_MARK,
390 ET0_MDC_MARK, ET0_MDIO_MARK, ET1_MDC_MARK, ET1_MDIO_MARK,
391
392 /* PTB (mobule: INTC, ONFI, TMU) */
393 IRQ15_MARK, IRQ14_MARK, IRQ13_MARK, IRQ12_MARK,
394 IRQ11_MARK, IRQ10_MARK, IRQ9_MARK, IRQ8_MARK,
395 ON_NRE_MARK, ON_NWE_MARK, ON_NWP_MARK, ON_NCE0_MARK,
396 ON_R_B0_MARK, ON_ALE_MARK, ON_CLE_MARK, TCLK_MARK,
397
398 /* PTC (mobule: IRQ, PWMU) */
399 IRQ7_MARK, IRQ6_MARK, IRQ5_MARK, IRQ4_MARK,
400 IRQ3_MARK, IRQ2_MARK, IRQ1_MARK, IRQ0_MARK,
401 PWMU0_MARK, PWMU1_MARK, PWMU2_MARK, PWMU3_MARK,
402 PWMU4_MARK, PWMU5_MARK,
403
404 /* PTD (mobule: SPI0, DMAC) */
405 SP0_MOSI_MARK, SP0_MISO_MARK, SP0_SCK_MARK, SP0_SCK_FB_MARK,
406 SP0_SS0_MARK, SP0_SS1_MARK, SP0_SS2_MARK, SP0_SS3_MARK,
407 DREQ0_MARK, DACK0_MARK, TEND0_MARK,
408
409 /* PTE (mobule: RMII) */
410 RMII0_CRS_DV_MARK, RMII0_TXD1_MARK,
411 RMII0_TXD0_MARK, RMII0_TXEN_MARK,
412 RMII0_REFCLK_MARK, RMII0_RXD1_MARK,
413 RMII0_RXD0_MARK, RMII0_RX_ER_MARK,
414
415 /* PTF (mobule: RMII, SerMux) */
416 RMII1_CRS_DV_MARK, RMII1_TXD1_MARK,
417 RMII1_TXD0_MARK, RMII1_TXEN_MARK,
418 RMII1_REFCLK_MARK, RMII1_RXD1_MARK,
419 RMII1_RXD0_MARK, RMII1_RX_ER_MARK,
420 RAC_RI_MARK,
421
422 /* PTG (mobule: system, LBSC, LPC, WDT, LPC, eMMC) */
423 BOOTFMS_MARK, BOOTWP_MARK, A25_MARK, A24_MARK,
424 SERIRQ_MARK, WDTOVF_MARK, LPCPD_MARK, LDRQ_MARK,
425 MMCCLK_MARK, MMCCMD_MARK,
426
427 /* PTH (mobule: SPI1, LPC, DMAC, ADC) */
428 SP1_MOSI_MARK, SP1_MISO_MARK, SP1_SCK_MARK, SP1_SCK_FB_MARK,
429 SP1_SS0_MARK, SP1_SS1_MARK, WP_MARK, FMS0_MARK,
430 TEND1_MARK, DREQ1_MARK, DACK1_MARK, ADTRG1_MARK,
431 ADTRG0_MARK,
432
433 /* PTI (mobule: LBSC, SDHI) */
434 D15_MARK, D14_MARK, D13_MARK, D12_MARK,
435 D11_MARK, D10_MARK, D9_MARK, D8_MARK,
436 SD_WP_MARK, SD_CD_MARK, SD_CLK_MARK, SD_CMD_MARK,
437 SD_D3_MARK, SD_D2_MARK, SD_D1_MARK, SD_D0_MARK,
438
439 /* PTJ (mobule: SCIF234) */
440 RTS3_MARK, CTS3_MARK, TXD3_MARK, RXD3_MARK,
441 RTS4_MARK, RXD4_MARK, TXD4_MARK,
442
443 /* PTK (mobule: SERMUX, LBSC, SCIF) */
444 COM2_TXD_MARK, COM2_RXD_MARK, COM2_RTS_MARK, COM2_CTS_MARK,
445 COM2_DTR_MARK, COM2_DSR_MARK, COM2_DCD_MARK, CLKOUT_MARK,
446 SCK2_MARK, SCK4_MARK, SCK3_MARK,
447
448 /* PTL (mobule: SERMUX, SCIF, LBSC, AUD) */
449 RAC_RXD_MARK, RAC_RTS_MARK, RAC_CTS_MARK, RAC_DTR_MARK,
450 RAC_DSR_MARK, RAC_DCD_MARK, RAC_TXD_MARK, RXD2_MARK,
451 CS5_MARK, CS6_MARK, AUDSYNC_MARK, AUDCK_MARK,
452 TXD2_MARK,
453
454 /* PTM (mobule: LBSC, IIC) */
455 CS4_MARK, RD_MARK, WE0_MARK, CS0_MARK,
456 SDA6_MARK, SCL6_MARK, SDA7_MARK, SCL7_MARK,
457
458 /* PTN (mobule: USB, JMC, SGPIO, WDT) */
459 VBUS_EN_MARK, VBUS_OC_MARK, JMCTCK_MARK, JMCTMS_MARK,
460 JMCTDO_MARK, JMCTDI_MARK, JMCTRST_MARK,
461 SGPIO1_CLK_MARK, SGPIO1_LOAD_MARK, SGPIO1_DI_MARK,
462 SGPIO1_DO_MARK, SUB_CLKIN_MARK,
463
464 /* PTO (mobule: SGPIO, SerMux) */
465 SGPIO0_CLK_MARK, SGPIO0_LOAD_MARK, SGPIO0_DI_MARK,
466 SGPIO0_DO_MARK, SGPIO2_CLK_MARK, SGPIO2_LOAD_MARK,
467 SGPIO2_DI_MARK, SGPIO2_DO_MARK,
468 COM1_TXD_MARK, COM1_RXD_MARK, COM1_RTS_MARK, COM1_CTS_MARK,
469
470 /* PTQ (mobule: LPC) */
471 LAD3_MARK, LAD2_MARK, LAD1_MARK, LAD0_MARK,
472 LFRAME_MARK, LRESET_MARK, LCLK_MARK,
473
474 /* PTR (mobule: GRA, IIC) */
475 DDC3_MARK, DDC2_MARK, SDA2_MARK, SCL2_MARK,
476 SDA1_MARK, SCL1_MARK, SDA0_MARK, SCL0_MARK,
477 SDA8_MARK, SCL8_MARK,
478
479 /* PTS (mobule: GRA, IIC) */
480 DDC1_MARK, DDC0_MARK, SDA5_MARK, SCL5_MARK,
481 SDA4_MARK, SCL4_MARK, SDA3_MARK, SCL3_MARK,
482 SDA9_MARK, SCL9_MARK,
483
484 /* PTT (mobule: PWMX, AUD) */
485 PWMX7_MARK, PWMX6_MARK, PWMX5_MARK, PWMX4_MARK,
486 PWMX3_MARK, PWMX2_MARK, PWMX1_MARK, PWMX0_MARK,
487 AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK,
488 STATUS1_MARK, STATUS0_MARK,
489
490 /* PTU (mobule: LPC, APM) */
491 LGPIO7_MARK, LGPIO6_MARK, LGPIO5_MARK, LGPIO4_MARK,
492 LGPIO3_MARK, LGPIO2_MARK, LGPIO1_MARK, LGPIO0_MARK,
493 APMONCTL_O_MARK, APMPWBTOUT_O_MARK, APMSCI_O_MARK,
494 APMVDDON_MARK, APMSLPBTN_MARK, APMPWRBTN_MARK, APMS5N_MARK,
495 APMS3N_MARK,
496
497 /* PTV (mobule: LBSC, SerMux, R-SPI, EVC, GRA) */
498 A23_MARK, A22_MARK, A21_MARK, A20_MARK,
499 A19_MARK, A18_MARK, A17_MARK, A16_MARK,
500 COM2_RI_MARK, R_SPI_MOSI_MARK, R_SPI_MISO_MARK,
501 R_SPI_RSPCK_MARK, R_SPI_SSL0_MARK, R_SPI_SSL1_MARK,
502 EVENT7_MARK, EVENT6_MARK, VBIOS_DI_MARK, VBIOS_DO_MARK,
503 VBIOS_CLK_MARK, VBIOS_CS_MARK,
504
505 /* PTW (mobule: LBSC, EVC, SCIF) */
506 A15_MARK, A14_MARK, A13_MARK, A12_MARK,
507 A11_MARK, A10_MARK, A9_MARK, A8_MARK,
508 EVENT5_MARK, EVENT4_MARK, EVENT3_MARK, EVENT2_MARK,
509 EVENT1_MARK, EVENT0_MARK, CTS4_MARK, CTS2_MARK,
510
511 /* PTX (mobule: LBSC, SCIF, SIM) */
512 A7_MARK, A6_MARK, A5_MARK, A4_MARK,
513 A3_MARK, A2_MARK, A1_MARK, A0_MARK,
514 RTS2_MARK, SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK,
515
516 /* PTY (mobule: LBSC) */
517 D7_MARK, D6_MARK, D5_MARK, D4_MARK,
518 D3_MARK, D2_MARK, D1_MARK, D0_MARK,
519
520 /* PTZ (mobule: eMMC, ONFI) */
521 MMCDAT7_MARK, MMCDAT6_MARK, MMCDAT5_MARK, MMCDAT4_MARK,
522 MMCDAT3_MARK, MMCDAT2_MARK, MMCDAT1_MARK, MMCDAT0_MARK,
523 ON_DQ7_MARK, ON_DQ6_MARK, ON_DQ5_MARK, ON_DQ4_MARK,
524 ON_DQ3_MARK, ON_DQ2_MARK, ON_DQ1_MARK, ON_DQ0_MARK,
525
526 PINMUX_MARK_END,
527};
528
529static pinmux_enum_t pinmux_data[] = {
530 /* PTA GPIO */
531 PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
532 PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT),
533 PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT),
534 PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT),
535 PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT),
536 PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT),
537 PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT),
538 PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT),
539
540 /* PTB GPIO */
541 PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
542 PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT),
543 PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT),
544 PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT),
545 PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT),
546 PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT),
547 PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT),
548 PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT),
549
550 /* PTC GPIO */
551 PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT),
552 PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT),
553 PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT),
554 PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT),
555 PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT),
556 PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT),
557 PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT),
558 PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT),
559
560 /* PTD GPIO */
561 PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT),
562 PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT),
563 PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT),
564 PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT),
565 PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT),
566 PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT),
567 PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT),
568 PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT),
569
570 /* PTE GPIO */
571 PINMUX_DATA(PTE7_DATA, PTE7_IN, PTE7_OUT),
572 PINMUX_DATA(PTE6_DATA, PTE6_IN, PTE6_OUT),
573 PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT),
574 PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT),
575 PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT),
576 PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT),
577 PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT),
578 PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT),
579
580 /* PTF GPIO */
581 PINMUX_DATA(PTF7_DATA, PTF7_IN, PTF7_OUT),
582 PINMUX_DATA(PTF6_DATA, PTF6_IN, PTF6_OUT),
583 PINMUX_DATA(PTF5_DATA, PTF5_IN, PTF5_OUT),
584 PINMUX_DATA(PTF4_DATA, PTF4_IN, PTF4_OUT),
585 PINMUX_DATA(PTF3_DATA, PTF3_IN, PTF3_OUT),
586 PINMUX_DATA(PTF2_DATA, PTF2_IN, PTF2_OUT),
587 PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_OUT),
588 PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT),
589
590 /* PTG GPIO */
591 PINMUX_DATA(PTG7_DATA, PTG7_IN, PTG7_OUT),
592 PINMUX_DATA(PTG6_DATA, PTG6_IN, PTG6_OUT),
593 PINMUX_DATA(PTG5_DATA, PTG5_IN, PTG5_OUT),
594 PINMUX_DATA(PTG4_DATA, PTG4_IN, PTG4_OUT),
595 PINMUX_DATA(PTG3_DATA, PTG3_IN, PTG3_OUT),
596 PINMUX_DATA(PTG2_DATA, PTG2_IN, PTG2_OUT),
597 PINMUX_DATA(PTG1_DATA, PTG1_IN, PTG1_OUT),
598 PINMUX_DATA(PTG0_DATA, PTG0_IN, PTG0_OUT),
599
600 /* PTH GPIO */
601 PINMUX_DATA(PTH7_DATA, PTH7_IN, PTH7_OUT),
602 PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT),
603 PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT),
604 PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT),
605 PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT),
606 PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT),
607 PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT),
608 PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT),
609
610 /* PTI GPIO */
611 PINMUX_DATA(PTI7_DATA, PTI7_IN, PTI7_OUT),
612 PINMUX_DATA(PTI6_DATA, PTI6_IN, PTI6_OUT),
613 PINMUX_DATA(PTI5_DATA, PTI5_IN, PTI5_OUT),
614 PINMUX_DATA(PTI4_DATA, PTI4_IN, PTI4_OUT),
615 PINMUX_DATA(PTI3_DATA, PTI3_IN, PTI3_OUT),
616 PINMUX_DATA(PTI2_DATA, PTI2_IN, PTI2_OUT),
617 PINMUX_DATA(PTI1_DATA, PTI1_IN, PTI1_OUT),
618 PINMUX_DATA(PTI0_DATA, PTI0_IN, PTI0_OUT),
619
620 /* PTJ GPIO */
621 PINMUX_DATA(PTJ6_DATA, PTJ6_IN, PTJ6_OUT),
622 PINMUX_DATA(PTJ5_DATA, PTJ5_IN, PTJ5_OUT),
623 PINMUX_DATA(PTJ4_DATA, PTJ4_IN, PTJ4_OUT),
624 PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT),
625 PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT),
626 PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT),
627 PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT),
628
629 /* PTK GPIO */
630 PINMUX_DATA(PTK7_DATA, PTK7_IN, PTK7_OUT),
631 PINMUX_DATA(PTK6_DATA, PTK6_IN, PTK6_OUT),
632 PINMUX_DATA(PTK5_DATA, PTK5_IN, PTK5_OUT),
633 PINMUX_DATA(PTK4_DATA, PTK4_IN, PTK4_OUT),
634 PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT),
635 PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT),
636 PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT),
637 PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT),
638
639 /* PTL GPIO */
640 PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT),
641 PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT),
642 PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT),
643 PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT),
644 PINMUX_DATA(PTL2_DATA, PTL2_IN, PTL2_OUT),
645 PINMUX_DATA(PTL1_DATA, PTL1_IN, PTL1_OUT),
646 PINMUX_DATA(PTL0_DATA, PTL0_IN, PTL0_OUT),
647
648 /* PTM GPIO */
649 PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT),
650 PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT),
651 PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT),
652 PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT),
653 PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT),
654 PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT),
655 PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT),
656
657 /* PTN GPIO */
658 PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT),
659 PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT),
660 PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT),
661 PINMUX_DATA(PTN3_DATA, PTN3_IN, PTN3_OUT),
662 PINMUX_DATA(PTN2_DATA, PTN2_IN, PTN2_OUT),
663 PINMUX_DATA(PTN1_DATA, PTN1_IN, PTN1_OUT),
664 PINMUX_DATA(PTN0_DATA, PTN0_IN, PTN0_OUT),
665
666 /* PTO GPIO */
667 PINMUX_DATA(PTO7_DATA, PTO7_IN, PTO7_OUT),
668 PINMUX_DATA(PTO6_DATA, PTO6_IN, PTO6_OUT),
669 PINMUX_DATA(PTO5_DATA, PTO5_IN, PTO5_OUT),
670 PINMUX_DATA(PTO4_DATA, PTO4_IN, PTO4_OUT),
671 PINMUX_DATA(PTO3_DATA, PTO3_IN, PTO3_OUT),
672 PINMUX_DATA(PTO2_DATA, PTO2_IN, PTO2_OUT),
673 PINMUX_DATA(PTO1_DATA, PTO1_IN, PTO1_OUT),
674 PINMUX_DATA(PTO0_DATA, PTO0_IN, PTO0_OUT),
675
676 /* PTQ GPIO */
677 PINMUX_DATA(PTQ6_DATA, PTQ6_IN, PTQ6_OUT),
678 PINMUX_DATA(PTQ5_DATA, PTQ5_IN, PTQ5_OUT),
679 PINMUX_DATA(PTQ4_DATA, PTQ4_IN, PTQ4_OUT),
680 PINMUX_DATA(PTQ3_DATA, PTQ3_IN, PTQ3_OUT),
681 PINMUX_DATA(PTQ2_DATA, PTQ2_IN, PTQ2_OUT),
682 PINMUX_DATA(PTQ1_DATA, PTQ1_IN, PTQ1_OUT),
683 PINMUX_DATA(PTQ0_DATA, PTQ0_IN, PTQ0_OUT),
684
685 /* PTR GPIO */
686 PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT),
687 PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT),
688 PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT),
689 PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT),
690 PINMUX_DATA(PTR3_DATA, PTR3_IN, PTR3_OUT),
691 PINMUX_DATA(PTR2_DATA, PTR2_IN, PTR2_OUT),
692 PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT),
693 PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT),
694
695 /* PTS GPIO */
696 PINMUX_DATA(PTS7_DATA, PTS7_IN, PTS7_OUT),
697 PINMUX_DATA(PTS6_DATA, PTS6_IN, PTS6_OUT),
698 PINMUX_DATA(PTS5_DATA, PTS5_IN, PTS5_OUT),
699 PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT),
700 PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT),
701 PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT),
702 PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT),
703 PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT),
704
705 /* PTT GPIO */
706 PINMUX_DATA(PTT7_DATA, PTT7_IN, PTT7_OUT),
707 PINMUX_DATA(PTT6_DATA, PTT6_IN, PTT6_OUT),
708 PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT),
709 PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT),
710 PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT),
711 PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT),
712 PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT),
713 PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT),
714
715 /* PTU GPIO */
716 PINMUX_DATA(PTU7_DATA, PTU7_IN, PTU7_OUT),
717 PINMUX_DATA(PTU6_DATA, PTU6_IN, PTU6_OUT),
718 PINMUX_DATA(PTU5_DATA, PTU5_IN, PTU5_OUT),
719 PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT),
720 PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT),
721 PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT),
722 PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT),
723 PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT),
724
725 /* PTV GPIO */
726 PINMUX_DATA(PTV7_DATA, PTV7_IN, PTV7_OUT),
727 PINMUX_DATA(PTV6_DATA, PTV6_IN, PTV6_OUT),
728 PINMUX_DATA(PTV5_DATA, PTV5_IN, PTV5_OUT),
729 PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT),
730 PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT),
731 PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT),
732 PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT),
733 PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT),
734
735 /* PTW GPIO */
736 PINMUX_DATA(PTW7_DATA, PTW7_IN, PTW7_OUT),
737 PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_OUT),
738 PINMUX_DATA(PTW5_DATA, PTW5_IN, PTW5_OUT),
739 PINMUX_DATA(PTW4_DATA, PTW4_IN, PTW4_OUT),
740 PINMUX_DATA(PTW3_DATA, PTW3_IN, PTW3_OUT),
741 PINMUX_DATA(PTW2_DATA, PTW2_IN, PTW2_OUT),
742 PINMUX_DATA(PTW1_DATA, PTW1_IN, PTW1_OUT),
743 PINMUX_DATA(PTW0_DATA, PTW0_IN, PTW0_OUT),
744
745 /* PTX GPIO */
746 PINMUX_DATA(PTX7_DATA, PTX7_IN, PTX7_OUT),
747 PINMUX_DATA(PTX6_DATA, PTX6_IN, PTX6_OUT),
748 PINMUX_DATA(PTX5_DATA, PTX5_IN, PTX5_OUT),
749 PINMUX_DATA(PTX4_DATA, PTX4_IN, PTX4_OUT),
750 PINMUX_DATA(PTX3_DATA, PTX3_IN, PTX3_OUT),
751 PINMUX_DATA(PTX2_DATA, PTX2_IN, PTX2_OUT),
752 PINMUX_DATA(PTX1_DATA, PTX1_IN, PTX1_OUT),
753 PINMUX_DATA(PTX0_DATA, PTX0_IN, PTX0_OUT),
754
755 /* PTY GPIO */
756 PINMUX_DATA(PTY7_DATA, PTY7_IN, PTY7_OUT),
757 PINMUX_DATA(PTY6_DATA, PTY6_IN, PTY6_OUT),
758 PINMUX_DATA(PTY5_DATA, PTY5_IN, PTY5_OUT),
759 PINMUX_DATA(PTY4_DATA, PTY4_IN, PTY4_OUT),
760 PINMUX_DATA(PTY3_DATA, PTY3_IN, PTY3_OUT),
761 PINMUX_DATA(PTY2_DATA, PTY2_IN, PTY2_OUT),
762 PINMUX_DATA(PTY1_DATA, PTY1_IN, PTY1_OUT),
763 PINMUX_DATA(PTY0_DATA, PTY0_IN, PTY0_OUT),
764
765 /* PTZ GPIO */
766 PINMUX_DATA(PTZ7_DATA, PTZ7_IN, PTZ7_OUT),
767 PINMUX_DATA(PTZ6_DATA, PTZ6_IN, PTZ6_OUT),
768 PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_OUT),
769 PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_OUT),
770 PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_OUT),
771 PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_OUT),
772 PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_OUT),
773 PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT),
774
775 /* PTA FN */
776 PINMUX_DATA(BS_MARK, PTA7_FN),
777 PINMUX_DATA(RDWR_MARK, PTA6_FN),
778 PINMUX_DATA(WE1_MARK, PTA5_FN),
779 PINMUX_DATA(RDY_MARK, PTA4_FN),
780 PINMUX_DATA(ET0_MDC_MARK, PTA3_FN),
781 PINMUX_DATA(ET0_MDIO_MARK, PTA2_FN),
782 PINMUX_DATA(ET1_MDC_MARK, PTA1_FN),
783 PINMUX_DATA(ET1_MDIO_MARK, PTA0_FN),
784
785 /* PTB FN */
786 PINMUX_DATA(IRQ15_MARK, PS0_15_FN1, PTB7_FN),
787 PINMUX_DATA(ON_NRE_MARK, PS0_15_FN2, PTB7_FN),
788 PINMUX_DATA(IRQ14_MARK, PS0_14_FN1, PTB6_FN),
789 PINMUX_DATA(ON_NWE_MARK, PS0_14_FN2, PTB6_FN),
790 PINMUX_DATA(IRQ13_MARK, PS0_13_FN1, PTB5_FN),
791 PINMUX_DATA(ON_NWP_MARK, PS0_13_FN2, PTB5_FN),
792 PINMUX_DATA(IRQ12_MARK, PS0_12_FN1, PTB4_FN),
793 PINMUX_DATA(ON_NCE0_MARK, PS0_12_FN2, PTB4_FN),
794 PINMUX_DATA(IRQ11_MARK, PS0_11_FN1, PTB3_FN),
795 PINMUX_DATA(ON_R_B0_MARK, PS0_11_FN2, PTB3_FN),
796 PINMUX_DATA(IRQ10_MARK, PS0_10_FN1, PTB2_FN),
797 PINMUX_DATA(ON_ALE_MARK, PS0_10_FN2, PTB2_FN),
798 PINMUX_DATA(IRQ9_MARK, PS0_9_FN1, PTB1_FN),
799 PINMUX_DATA(ON_CLE_MARK, PS0_9_FN2, PTB1_FN),
800 PINMUX_DATA(IRQ8_MARK, PS0_8_FN1, PTB0_FN),
801 PINMUX_DATA(TCLK_MARK, PS0_8_FN2, PTB0_FN),
802
803 /* PTC FN */
804 PINMUX_DATA(IRQ7_MARK, PS0_7_FN1, PTC7_FN),
805 PINMUX_DATA(PWMU0_MARK, PS0_7_FN2, PTC7_FN),
806 PINMUX_DATA(IRQ6_MARK, PS0_6_FN1, PTC6_FN),
807 PINMUX_DATA(PWMU1_MARK, PS0_6_FN2, PTC6_FN),
808 PINMUX_DATA(IRQ5_MARK, PS0_5_FN1, PTC5_FN),
809 PINMUX_DATA(PWMU2_MARK, PS0_5_FN2, PTC5_FN),
810 PINMUX_DATA(IRQ4_MARK, PS0_4_FN1, PTC5_FN),
811 PINMUX_DATA(PWMU3_MARK, PS0_4_FN2, PTC4_FN),
812 PINMUX_DATA(IRQ3_MARK, PS0_3_FN1, PTC3_FN),
813 PINMUX_DATA(PWMU4_MARK, PS0_3_FN2, PTC3_FN),
814 PINMUX_DATA(IRQ2_MARK, PS0_2_FN1, PTC2_FN),
815 PINMUX_DATA(PWMU5_MARK, PS0_2_FN2, PTC2_FN),
816 PINMUX_DATA(IRQ1_MARK, PTC1_FN),
817 PINMUX_DATA(IRQ0_MARK, PTC0_FN),
818
819 /* PTD FN */
820 PINMUX_DATA(SP0_MOSI_MARK, PTD7_FN),
821 PINMUX_DATA(SP0_MISO_MARK, PTD6_FN),
822 PINMUX_DATA(SP0_SCK_MARK, PTD5_FN),
823 PINMUX_DATA(SP0_SCK_FB_MARK, PTD4_FN),
824 PINMUX_DATA(SP0_SS0_MARK, PTD3_FN),
825 PINMUX_DATA(SP0_SS1_MARK, PS1_10_FN1, PTD2_FN),
826 PINMUX_DATA(DREQ0_MARK, PS1_10_FN2, PTD2_FN),
827 PINMUX_DATA(SP0_SS2_MARK, PS1_9_FN1, PTD1_FN),
828 PINMUX_DATA(DACK0_MARK, PS1_9_FN2, PTD1_FN),
829 PINMUX_DATA(SP0_SS3_MARK, PS1_8_FN1, PTD0_FN),
830 PINMUX_DATA(TEND0_MARK, PS1_8_FN2, PTD0_FN),
831
832 /* PTE FN */
833 PINMUX_DATA(RMII0_CRS_DV_MARK, PTE7_FN),
834 PINMUX_DATA(RMII0_TXD1_MARK, PTE6_FN),
835 PINMUX_DATA(RMII0_TXD0_MARK, PTE5_FN),
836 PINMUX_DATA(RMII0_TXEN_MARK, PTE4_FN),
837 PINMUX_DATA(RMII0_REFCLK_MARK, PTE3_FN),
838 PINMUX_DATA(RMII0_RXD1_MARK, PTE2_FN),
839 PINMUX_DATA(RMII0_RXD0_MARK, PTE1_FN),
840 PINMUX_DATA(RMII0_RX_ER_MARK, PTE0_FN),
841
842 /* PTF FN */
843 PINMUX_DATA(RMII1_CRS_DV_MARK, PTF7_FN),
844 PINMUX_DATA(RMII1_TXD1_MARK, PTF6_FN),
845 PINMUX_DATA(RMII1_TXD0_MARK, PTF5_FN),
846 PINMUX_DATA(RMII1_TXEN_MARK, PTF4_FN),
847 PINMUX_DATA(RMII1_REFCLK_MARK, PTF3_FN),
848 PINMUX_DATA(RMII1_RXD1_MARK, PS1_2_FN1, PTF2_FN),
849 PINMUX_DATA(RAC_RI_MARK, PS1_2_FN2, PTF2_FN),
850 PINMUX_DATA(RMII1_RXD0_MARK, PTF1_FN),
851 PINMUX_DATA(RMII1_RX_ER_MARK, PTF0_FN),
852
853 /* PTG FN */
854 PINMUX_DATA(BOOTFMS_MARK, PTG7_FN),
855 PINMUX_DATA(BOOTWP_MARK, PTG6_FN),
856 PINMUX_DATA(A25_MARK, PS2_13_FN1, PTG5_FN),
857 PINMUX_DATA(MMCCLK_MARK, PS2_13_FN2, PTG5_FN),
858 PINMUX_DATA(A24_MARK, PS2_12_FN1, PTG4_FN),
859 PINMUX_DATA(MMCCMD_MARK, PS2_12_FN2, PTG4_FN),
860 PINMUX_DATA(SERIRQ_MARK, PTG3_FN),
861 PINMUX_DATA(WDTOVF_MARK, PTG2_FN),
862 PINMUX_DATA(LPCPD_MARK, PTG1_FN),
863 PINMUX_DATA(LDRQ_MARK, PTG0_FN),
864
865 /* PTH FN */
866 PINMUX_DATA(SP1_MOSI_MARK, PS2_7_FN1, PTH7_FN),
867 PINMUX_DATA(TEND1_MARK, PS2_7_FN2, PTH7_FN),
868 PINMUX_DATA(SP1_MISO_MARK, PS2_6_FN1, PTH6_FN),
869 PINMUX_DATA(DREQ1_MARK, PS2_6_FN2, PTH6_FN),
870 PINMUX_DATA(SP1_SCK_MARK, PS2_5_FN1, PTH5_FN),
871 PINMUX_DATA(DACK1_MARK, PS2_5_FN2, PTH5_FN),
872 PINMUX_DATA(SP1_SCK_FB_MARK, PS2_4_FN1, PTH4_FN),
873 PINMUX_DATA(ADTRG1_MARK, PS2_4_FN2, PTH4_FN),
874 PINMUX_DATA(SP1_SS0_MARK, PTH3_FN),
875 PINMUX_DATA(SP1_SS1_MARK, PS2_2_FN1, PTH2_FN),
876 PINMUX_DATA(ADTRG0_MARK, PS2_2_FN2, PTH2_FN),
877 PINMUX_DATA(WP_MARK, PTH1_FN),
878 PINMUX_DATA(FMS0_MARK, PTH0_FN),
879
880 /* PTI FN */
881 PINMUX_DATA(D15_MARK, PS3_15_FN1, PTI7_FN),
882 PINMUX_DATA(SD_WP_MARK, PS3_15_FN2, PTI7_FN),
883 PINMUX_DATA(D14_MARK, PS3_14_FN1, PTI6_FN),
884 PINMUX_DATA(SD_CD_MARK, PS3_14_FN2, PTI6_FN),
885 PINMUX_DATA(D13_MARK, PS3_13_FN1, PTI5_FN),
886 PINMUX_DATA(SD_CLK_MARK, PS3_13_FN2, PTI5_FN),
887 PINMUX_DATA(D12_MARK, PS3_12_FN1, PTI4_FN),
888 PINMUX_DATA(SD_CMD_MARK, PS3_12_FN2, PTI4_FN),
889 PINMUX_DATA(D11_MARK, PS3_11_FN1, PTI3_FN),
890 PINMUX_DATA(SD_D3_MARK, PS3_11_FN2, PTI3_FN),
891 PINMUX_DATA(D10_MARK, PS3_10_FN1, PTI2_FN),
892 PINMUX_DATA(SD_D2_MARK, PS3_10_FN2, PTI2_FN),
893 PINMUX_DATA(D9_MARK, PS3_9_FN1, PTI1_FN),
894 PINMUX_DATA(SD_D1_MARK, PS3_9_FN2, PTI1_FN),
895 PINMUX_DATA(D8_MARK, PS3_8_FN1, PTI0_FN),
896 PINMUX_DATA(SD_D0_MARK, PS3_8_FN2, PTI0_FN),
897
898 /* PTJ FN */
899 PINMUX_DATA(RTS3_MARK, PTJ6_FN),
900 PINMUX_DATA(CTS3_MARK, PTJ5_FN),
901 PINMUX_DATA(TXD3_MARK, PTJ4_FN),
902 PINMUX_DATA(RXD3_MARK, PTJ3_FN),
903 PINMUX_DATA(RTS4_MARK, PTJ2_FN),
904 PINMUX_DATA(RXD4_MARK, PTJ1_FN),
905 PINMUX_DATA(TXD4_MARK, PTJ0_FN),
906
907 /* PTK FN */
908 PINMUX_DATA(COM2_TXD_MARK, PS3_7_FN1, PTK7_FN),
909 PINMUX_DATA(SCK2_MARK, PS3_7_FN2, PTK7_FN),
910 PINMUX_DATA(COM2_RXD_MARK, PTK6_FN),
911 PINMUX_DATA(COM2_RTS_MARK, PTK5_FN),
912 PINMUX_DATA(COM2_CTS_MARK, PTK4_FN),
913 PINMUX_DATA(COM2_DTR_MARK, PTK3_FN),
914 PINMUX_DATA(COM2_DSR_MARK, PS3_2_FN1, PTK2_FN),
915 PINMUX_DATA(SCK4_MARK, PS3_2_FN2, PTK2_FN),
916 PINMUX_DATA(COM2_DCD_MARK, PS3_1_FN1, PTK1_FN),
917 PINMUX_DATA(SCK3_MARK, PS3_1_FN2, PTK1_FN),
918 PINMUX_DATA(CLKOUT_MARK, PTK0_FN),
919
920 /* PTL FN */
921 PINMUX_DATA(RAC_RXD_MARK, PS4_14_FN1, PTL6_FN),
922 PINMUX_DATA(RXD2_MARK, PS4_14_FN2, PTL6_FN),
923 PINMUX_DATA(RAC_RTS_MARK, PS4_13_FN1, PTL5_FN),
924 PINMUX_DATA(CS5_MARK, PS4_13_FN2, PTL5_FN),
925 PINMUX_DATA(RAC_CTS_MARK, PS4_12_FN1, PTL4_FN),
926 PINMUX_DATA(CS6_MARK, PS4_12_FN2, PTL4_FN),
927 PINMUX_DATA(RAC_DTR_MARK, PTL3_FN),
928 PINMUX_DATA(RAC_DSR_MARK, PS4_10_FN1, PTL2_FN),
929 PINMUX_DATA(AUDSYNC_MARK, PS4_10_FN2, PTL2_FN),
930 PINMUX_DATA(RAC_DCD_MARK, PS4_9_FN1, PTL1_FN),
931 PINMUX_DATA(AUDCK_MARK, PS4_9_FN2, PTL1_FN),
932 PINMUX_DATA(RAC_TXD_MARK, PS4_8_FN1, PTL0_FN),
933 PINMUX_DATA(TXD2_MARK, PS4_8_FN1, PTL0_FN),
934
935 /* PTM FN */
936 PINMUX_DATA(CS4_MARK, PTM7_FN),
937 PINMUX_DATA(RD_MARK, PTM6_FN),
938 PINMUX_DATA(WE0_MARK, PTM7_FN),
939 PINMUX_DATA(CS0_MARK, PTM4_FN),
940 PINMUX_DATA(SDA6_MARK, PTM3_FN),
941 PINMUX_DATA(SCL6_MARK, PTM2_FN),
942 PINMUX_DATA(SDA7_MARK, PTM1_FN),
943 PINMUX_DATA(SCL7_MARK, PTM0_FN),
944
945 /* PTN FN */
946 PINMUX_DATA(VBUS_EN_MARK, PTN6_FN),
947 PINMUX_DATA(VBUS_OC_MARK, PTN5_FN),
948 PINMUX_DATA(JMCTCK_MARK, PS4_4_FN1, PTN4_FN),
949 PINMUX_DATA(SGPIO1_CLK_MARK, PS4_4_FN2, PTN4_FN),
950 PINMUX_DATA(JMCTMS_MARK, PS4_3_FN1, PTN5_FN),
951 PINMUX_DATA(SGPIO1_LOAD_MARK, PS4_3_FN2, PTN5_FN),
952 PINMUX_DATA(JMCTDO_MARK, PS4_2_FN1, PTN2_FN),
953 PINMUX_DATA(SGPIO1_DO_MARK, PS4_2_FN2, PTN2_FN),
954 PINMUX_DATA(JMCTDI_MARK, PS4_1_FN1, PTN1_FN),
955 PINMUX_DATA(SGPIO1_DI_MARK, PS4_1_FN2, PTN1_FN),
956 PINMUX_DATA(JMCTRST_MARK, PS4_0_FN1, PTN0_FN),
957 PINMUX_DATA(SUB_CLKIN_MARK, PS4_0_FN2, PTN0_FN),
958
959 /* PTO FN */
960 PINMUX_DATA(SGPIO0_CLK_MARK, PTO7_FN),
961 PINMUX_DATA(SGPIO0_LOAD_MARK, PTO6_FN),
962 PINMUX_DATA(SGPIO0_DI_MARK, PTO5_FN),
963 PINMUX_DATA(SGPIO0_DO_MARK, PTO4_FN),
964 PINMUX_DATA(SGPIO2_CLK_MARK, PS5_11_FN1, PTO3_FN),
965 PINMUX_DATA(COM1_TXD_MARK, PS5_11_FN2, PTO3_FN),
966 PINMUX_DATA(SGPIO2_LOAD_MARK, PS5_10_FN1, PTO2_FN),
967 PINMUX_DATA(COM1_RXD_MARK, PS5_10_FN2, PTO2_FN),
968 PINMUX_DATA(SGPIO2_DI_MARK, PS5_9_FN1, PTO1_FN),
969 PINMUX_DATA(COM1_RTS_MARK, PS5_9_FN2, PTO1_FN),
970 PINMUX_DATA(SGPIO2_DO_MARK, PS5_8_FN1, PTO0_FN),
971 PINMUX_DATA(COM1_CTS_MARK, PS5_8_FN2, PTO0_FN),
972
973 /* PTP FN */
974
975 /* PTQ FN */
976 PINMUX_DATA(LAD3_MARK, PTQ6_FN),
977 PINMUX_DATA(LAD2_MARK, PTQ5_FN),
978 PINMUX_DATA(LAD1_MARK, PTQ4_FN),
979 PINMUX_DATA(LAD0_MARK, PTQ3_FN),
980 PINMUX_DATA(LFRAME_MARK, PTQ2_FN),
981 PINMUX_DATA(LRESET_MARK, PTQ1_FN),
982 PINMUX_DATA(LCLK_MARK, PTQ0_FN),
983
984 /* PTR FN */
985 PINMUX_DATA(SDA8_MARK, PTR7_FN), /* DDC3? */
986 PINMUX_DATA(SCL8_MARK, PTR6_FN), /* DDC2? */
987 PINMUX_DATA(SDA2_MARK, PTR5_FN),
988 PINMUX_DATA(SCL2_MARK, PTR4_FN),
989 PINMUX_DATA(SDA1_MARK, PTR3_FN),
990 PINMUX_DATA(SCL1_MARK, PTR2_FN),
991 PINMUX_DATA(SDA0_MARK, PTR1_FN),
992 PINMUX_DATA(SCL0_MARK, PTR0_FN),
993
994 /* PTS FN */
995 PINMUX_DATA(SDA9_MARK, PTS7_FN), /* DDC1? */
996 PINMUX_DATA(SCL9_MARK, PTS6_FN), /* DDC0? */
997 PINMUX_DATA(SDA5_MARK, PTS5_FN),
998 PINMUX_DATA(SCL5_MARK, PTS4_FN),
999 PINMUX_DATA(SDA4_MARK, PTS3_FN),
1000 PINMUX_DATA(SCL4_MARK, PTS2_FN),
1001 PINMUX_DATA(SDA3_MARK, PTS1_FN),
1002 PINMUX_DATA(SCL3_MARK, PTS0_FN),
1003
1004 /* PTT FN */
1005 PINMUX_DATA(PWMX7_MARK, PS5_7_FN1, PTT7_FN),
1006 PINMUX_DATA(AUDATA3_MARK, PS5_7_FN2, PTT7_FN),
1007 PINMUX_DATA(PWMX6_MARK, PS5_6_FN1, PTT6_FN),
1008 PINMUX_DATA(AUDATA2_MARK, PS5_6_FN2, PTT6_FN),
1009 PINMUX_DATA(PWMX5_MARK, PS5_5_FN1, PTT5_FN),
1010 PINMUX_DATA(AUDATA1_MARK, PS5_5_FN2, PTT5_FN),
1011 PINMUX_DATA(PWMX4_MARK, PS5_4_FN1, PTT4_FN),
1012 PINMUX_DATA(AUDATA0_MARK, PS5_4_FN2, PTT4_FN),
1013 PINMUX_DATA(PWMX3_MARK, PS5_3_FN1, PTT3_FN),
1014 PINMUX_DATA(STATUS1_MARK, PS5_3_FN2, PTT3_FN),
1015 PINMUX_DATA(PWMX2_MARK, PS5_2_FN1, PTT2_FN),
1016 PINMUX_DATA(STATUS0_MARK, PS5_2_FN2, PTT2_FN),
1017 PINMUX_DATA(PWMX1_MARK, PTT1_FN),
1018 PINMUX_DATA(PWMX0_MARK, PTT0_FN),
1019
1020 /* PTU FN */
1021 PINMUX_DATA(LGPIO7_MARK, PS6_15_FN1, PTU7_FN),
1022 PINMUX_DATA(APMONCTL_O_MARK, PS6_15_FN2, PTU7_FN),
1023 PINMUX_DATA(LGPIO6_MARK, PS6_14_FN1, PTU6_FN),
1024 PINMUX_DATA(APMPWBTOUT_O_MARK, PS6_14_FN2, PTU6_FN),
1025 PINMUX_DATA(LGPIO5_MARK, PS6_13_FN1, PTU5_FN),
1026 PINMUX_DATA(APMSCI_O_MARK, PS6_13_FN2, PTU5_FN),
1027 PINMUX_DATA(LGPIO4_MARK, PS6_12_FN1, PTU4_FN),
1028 PINMUX_DATA(APMVDDON_MARK, PS6_12_FN2, PTU4_FN),
1029 PINMUX_DATA(LGPIO3_MARK, PS6_11_FN1, PTU3_FN),
1030 PINMUX_DATA(APMSLPBTN_MARK, PS6_11_FN2, PTU3_FN),
1031 PINMUX_DATA(LGPIO2_MARK, PS6_10_FN1, PTU2_FN),
1032 PINMUX_DATA(APMPWRBTN_MARK, PS6_10_FN2, PTU2_FN),
1033 PINMUX_DATA(LGPIO1_MARK, PS6_9_FN1, PTU1_FN),
1034 PINMUX_DATA(APMS5N_MARK, PS6_9_FN2, PTU1_FN),
1035 PINMUX_DATA(LGPIO0_MARK, PS6_8_FN1, PTU0_FN),
1036 PINMUX_DATA(APMS3N_MARK, PS6_8_FN2, PTU0_FN),
1037
1038 /* PTV FN */
1039 PINMUX_DATA(A23_MARK, PS6_7_FN1, PTV7_FN),
1040 PINMUX_DATA(COM2_RI_MARK, PS6_7_FN2, PTV7_FN),
1041 PINMUX_DATA(A22_MARK, PS6_6_FN1, PTV6_FN),
1042 PINMUX_DATA(R_SPI_MOSI_MARK, PS6_6_FN2, PTV6_FN),
1043 PINMUX_DATA(A21_MARK, PS6_5_FN1, PTV5_FN),
1044 PINMUX_DATA(R_SPI_MISO_MARK, PS6_5_FN2, PTV5_FN),
1045 PINMUX_DATA(A20_MARK, PS6_4_FN1, PTV4_FN),
1046 PINMUX_DATA(R_SPI_RSPCK_MARK, PS6_4_FN2, PTV4_FN),
1047 PINMUX_DATA(A19_MARK, PS6_3_FN1, PTV3_FN),
1048 PINMUX_DATA(R_SPI_SSL0_MARK, PS6_3_FN2, PTV3_FN),
1049 PINMUX_DATA(A18_MARK, PS6_2_FN1, PTV2_FN),
1050 PINMUX_DATA(R_SPI_SSL1_MARK, PS6_2_FN2, PTV2_FN),
1051 PINMUX_DATA(A17_MARK, PS6_1_FN1, PTV1_FN),
1052 PINMUX_DATA(EVENT7_MARK, PS6_1_FN2, PTV1_FN),
1053 PINMUX_DATA(A16_MARK, PS6_0_FN1, PTV0_FN),
1054 PINMUX_DATA(EVENT6_MARK, PS6_0_FN1, PTV0_FN),
1055
1056 /* PTW FN */
1057 PINMUX_DATA(A15_MARK, PS7_15_FN1, PTW7_FN),
1058 PINMUX_DATA(EVENT5_MARK, PS7_15_FN2, PTW7_FN),
1059 PINMUX_DATA(A14_MARK, PS7_14_FN1, PTW6_FN),
1060 PINMUX_DATA(EVENT4_MARK, PS7_14_FN2, PTW6_FN),
1061 PINMUX_DATA(A13_MARK, PS7_13_FN1, PTW5_FN),
1062 PINMUX_DATA(EVENT3_MARK, PS7_13_FN2, PTW5_FN),
1063 PINMUX_DATA(A12_MARK, PS7_12_FN1, PTW4_FN),
1064 PINMUX_DATA(EVENT2_MARK, PS7_12_FN2, PTW4_FN),
1065 PINMUX_DATA(A11_MARK, PS7_11_FN1, PTW3_FN),
1066 PINMUX_DATA(EVENT1_MARK, PS7_11_FN2, PTW3_FN),
1067 PINMUX_DATA(A10_MARK, PS7_10_FN1, PTW2_FN),
1068 PINMUX_DATA(EVENT0_MARK, PS7_10_FN2, PTW2_FN),
1069 PINMUX_DATA(A9_MARK, PS7_9_FN1, PTW1_FN),
1070 PINMUX_DATA(CTS4_MARK, PS7_9_FN2, PTW1_FN),
1071 PINMUX_DATA(A8_MARK, PS7_8_FN1, PTW0_FN),
1072 PINMUX_DATA(CTS2_MARK, PS7_8_FN2, PTW0_FN),
1073
1074 /* PTX FN */
1075 PINMUX_DATA(A7_MARK, PS7_7_FN1, PTX7_FN),
1076 PINMUX_DATA(RTS2_MARK, PS7_7_FN2, PTX7_FN),
1077 PINMUX_DATA(A6_MARK, PS7_6_FN1, PTX6_FN),
1078 PINMUX_DATA(SIM_D_MARK, PS7_6_FN2, PTX6_FN),
1079 PINMUX_DATA(A5_MARK, PS7_5_FN1, PTX5_FN),
1080 PINMUX_DATA(SIM_CLK_MARK, PS7_5_FN2, PTX5_FN),
1081 PINMUX_DATA(A4_MARK, PS7_4_FN1, PTX4_FN),
1082 PINMUX_DATA(SIM_RST_MARK, PS7_4_FN2, PTX4_FN),
1083 PINMUX_DATA(A3_MARK, PTX3_FN),
1084 PINMUX_DATA(A2_MARK, PTX2_FN),
1085 PINMUX_DATA(A1_MARK, PTX1_FN),
1086 PINMUX_DATA(A0_MARK, PTX0_FN),
1087
1088 /* PTY FN */
1089 PINMUX_DATA(D7_MARK, PTY7_FN),
1090 PINMUX_DATA(D6_MARK, PTY6_FN),
1091 PINMUX_DATA(D5_MARK, PTY5_FN),
1092 PINMUX_DATA(D4_MARK, PTY4_FN),
1093 PINMUX_DATA(D3_MARK, PTY3_FN),
1094 PINMUX_DATA(D2_MARK, PTY2_FN),
1095 PINMUX_DATA(D1_MARK, PTY1_FN),
1096 PINMUX_DATA(D0_MARK, PTY0_FN),
1097
1098 /* PTZ FN */
1099 PINMUX_DATA(MMCDAT7_MARK, PS8_15_FN1, PTZ7_FN),
1100 PINMUX_DATA(ON_DQ7_MARK, PS8_15_FN2, PTZ7_FN),
1101 PINMUX_DATA(MMCDAT6_MARK, PS8_14_FN1, PTZ6_FN),
1102 PINMUX_DATA(ON_DQ6_MARK, PS8_14_FN2, PTZ6_FN),
1103 PINMUX_DATA(MMCDAT5_MARK, PS8_13_FN1, PTZ5_FN),
1104 PINMUX_DATA(ON_DQ5_MARK, PS8_13_FN2, PTZ5_FN),
1105 PINMUX_DATA(MMCDAT4_MARK, PS8_12_FN1, PTZ4_FN),
1106 PINMUX_DATA(ON_DQ4_MARK, PS8_12_FN2, PTZ4_FN),
1107 PINMUX_DATA(MMCDAT3_MARK, PS8_11_FN1, PTZ3_FN),
1108 PINMUX_DATA(ON_DQ3_MARK, PS8_11_FN2, PTZ3_FN),
1109 PINMUX_DATA(MMCDAT2_MARK, PS8_10_FN1, PTZ2_FN),
1110 PINMUX_DATA(ON_DQ2_MARK, PS8_10_FN2, PTZ2_FN),
1111 PINMUX_DATA(MMCDAT1_MARK, PS8_9_FN1, PTZ1_FN),
1112 PINMUX_DATA(ON_DQ1_MARK, PS8_9_FN2, PTZ1_FN),
1113 PINMUX_DATA(MMCDAT0_MARK, PS8_8_FN1, PTZ0_FN),
1114 PINMUX_DATA(ON_DQ0_MARK, PS8_8_FN2, PTZ0_FN),
1115};
1116
1117static struct pinmux_gpio pinmux_gpios[] = {
1118 /* PTA */
1119 PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
1120 PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
1121 PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
1122 PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
1123 PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
1124 PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
1125 PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
1126 PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
1127
1128 /* PTB */
1129 PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
1130 PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
1131 PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
1132 PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
1133 PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
1134 PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
1135 PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
1136 PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
1137
1138 /* PTC */
1139 PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
1140 PINMUX_GPIO(GPIO_PTC6, PTC6_DATA),
1141 PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
1142 PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
1143 PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
1144 PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
1145 PINMUX_GPIO(GPIO_PTC1, PTC1_DATA),
1146 PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
1147
1148 /* PTD */
1149 PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
1150 PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
1151 PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
1152 PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
1153 PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
1154 PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
1155 PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
1156 PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
1157
1158 /* PTE */
1159 PINMUX_GPIO(GPIO_PTE7, PTE7_DATA),
1160 PINMUX_GPIO(GPIO_PTE6, PTE6_DATA),
1161 PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
1162 PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
1163 PINMUX_GPIO(GPIO_PTE3, PTE3_DATA),
1164 PINMUX_GPIO(GPIO_PTE2, PTE2_DATA),
1165 PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
1166 PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
1167
1168 /* PTF */
1169 PINMUX_GPIO(GPIO_PTF7, PTF7_DATA),
1170 PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
1171 PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
1172 PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
1173 PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
1174 PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
1175 PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
1176 PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
1177
1178 /* PTG */
1179 PINMUX_GPIO(GPIO_PTG7, PTG7_DATA),
1180 PINMUX_GPIO(GPIO_PTG6, PTG6_DATA),
1181 PINMUX_GPIO(GPIO_PTG5, PTG5_DATA),
1182 PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
1183 PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
1184 PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
1185 PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
1186 PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
1187
1188 /* PTH */
1189 PINMUX_GPIO(GPIO_PTH7, PTH7_DATA),
1190 PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
1191 PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
1192 PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
1193 PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
1194 PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
1195 PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
1196 PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
1197
1198 /* PTI */
1199 PINMUX_GPIO(GPIO_PTI7, PTI7_DATA),
1200 PINMUX_GPIO(GPIO_PTI6, PTI6_DATA),
1201 PINMUX_GPIO(GPIO_PTI5, PTI5_DATA),
1202 PINMUX_GPIO(GPIO_PTI4, PTI4_DATA),
1203 PINMUX_GPIO(GPIO_PTI3, PTI3_DATA),
1204 PINMUX_GPIO(GPIO_PTI2, PTI2_DATA),
1205 PINMUX_GPIO(GPIO_PTI1, PTI1_DATA),
1206 PINMUX_GPIO(GPIO_PTI0, PTI0_DATA),
1207
1208 /* PTJ */
1209 PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
1210 PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
1211 PINMUX_GPIO(GPIO_PTJ4, PTJ4_DATA),
1212 PINMUX_GPIO(GPIO_PTJ3, PTJ3_DATA),
1213 PINMUX_GPIO(GPIO_PTJ2, PTJ2_DATA),
1214 PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
1215 PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
1216
1217 /* PTK */
1218 PINMUX_GPIO(GPIO_PTK7, PTK7_DATA),
1219 PINMUX_GPIO(GPIO_PTK6, PTK6_DATA),
1220 PINMUX_GPIO(GPIO_PTK5, PTK5_DATA),
1221 PINMUX_GPIO(GPIO_PTK4, PTK4_DATA),
1222 PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
1223 PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
1224 PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
1225 PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
1226
1227 /* PTL */
1228 PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
1229 PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
1230 PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
1231 PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
1232 PINMUX_GPIO(GPIO_PTL2, PTL2_DATA),
1233 PINMUX_GPIO(GPIO_PTL1, PTL1_DATA),
1234 PINMUX_GPIO(GPIO_PTL0, PTL0_DATA),
1235
1236 /* PTM */
1237 PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
1238 PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
1239 PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
1240 PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
1241 PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
1242 PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
1243 PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
1244 PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
1245
1246 /* PTN */
1247 PINMUX_GPIO(GPIO_PTN6, PTN6_DATA),
1248 PINMUX_GPIO(GPIO_PTN5, PTN5_DATA),
1249 PINMUX_GPIO(GPIO_PTN4, PTN4_DATA),
1250 PINMUX_GPIO(GPIO_PTN3, PTN3_DATA),
1251 PINMUX_GPIO(GPIO_PTN2, PTN2_DATA),
1252 PINMUX_GPIO(GPIO_PTN1, PTN1_DATA),
1253 PINMUX_GPIO(GPIO_PTN0, PTN0_DATA),
1254
1255 /* PTO */
1256 PINMUX_GPIO(GPIO_PTO7, PTO7_DATA),
1257 PINMUX_GPIO(GPIO_PTO6, PTO6_DATA),
1258 PINMUX_GPIO(GPIO_PTO5, PTO5_DATA),
1259 PINMUX_GPIO(GPIO_PTO4, PTO4_DATA),
1260 PINMUX_GPIO(GPIO_PTO3, PTO3_DATA),
1261 PINMUX_GPIO(GPIO_PTO2, PTO2_DATA),
1262 PINMUX_GPIO(GPIO_PTO1, PTO1_DATA),
1263 PINMUX_GPIO(GPIO_PTO0, PTO0_DATA),
1264
1265 /* PTP */
1266 PINMUX_GPIO(GPIO_PTP7, PTP7_DATA),
1267 PINMUX_GPIO(GPIO_PTP6, PTP6_DATA),
1268 PINMUX_GPIO(GPIO_PTP5, PTP5_DATA),
1269 PINMUX_GPIO(GPIO_PTP4, PTP4_DATA),
1270 PINMUX_GPIO(GPIO_PTP3, PTP3_DATA),
1271 PINMUX_GPIO(GPIO_PTP2, PTP2_DATA),
1272 PINMUX_GPIO(GPIO_PTP1, PTP1_DATA),
1273 PINMUX_GPIO(GPIO_PTP0, PTP0_DATA),
1274
1275 /* PTQ */
1276 PINMUX_GPIO(GPIO_PTQ6, PTQ6_DATA),
1277 PINMUX_GPIO(GPIO_PTQ5, PTQ5_DATA),
1278 PINMUX_GPIO(GPIO_PTQ4, PTQ4_DATA),
1279 PINMUX_GPIO(GPIO_PTQ3, PTQ3_DATA),
1280 PINMUX_GPIO(GPIO_PTQ2, PTQ2_DATA),
1281 PINMUX_GPIO(GPIO_PTQ1, PTQ1_DATA),
1282 PINMUX_GPIO(GPIO_PTQ0, PTQ0_DATA),
1283
1284 /* PTR */
1285 PINMUX_GPIO(GPIO_PTR7, PTR7_DATA),
1286 PINMUX_GPIO(GPIO_PTR6, PTR6_DATA),
1287 PINMUX_GPIO(GPIO_PTR5, PTR5_DATA),
1288 PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
1289 PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
1290 PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
1291 PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
1292 PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
1293
1294 /* PTS */
1295 PINMUX_GPIO(GPIO_PTS7, PTS7_DATA),
1296 PINMUX_GPIO(GPIO_PTS6, PTS6_DATA),
1297 PINMUX_GPIO(GPIO_PTS5, PTS5_DATA),
1298 PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
1299 PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
1300 PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
1301 PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
1302 PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
1303
1304 /* PTT */
1305 PINMUX_GPIO(GPIO_PTT7, PTT7_DATA),
1306 PINMUX_GPIO(GPIO_PTT6, PTT6_DATA),
1307 PINMUX_GPIO(GPIO_PTT5, PTT5_DATA),
1308 PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
1309 PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
1310 PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
1311 PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
1312 PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
1313
1314 /* PTU */
1315 PINMUX_GPIO(GPIO_PTU7, PTU7_DATA),
1316 PINMUX_GPIO(GPIO_PTU6, PTU6_DATA),
1317 PINMUX_GPIO(GPIO_PTU5, PTU5_DATA),
1318 PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
1319 PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
1320 PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
1321 PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
1322 PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
1323
1324 /* PTV */
1325 PINMUX_GPIO(GPIO_PTV7, PTV7_DATA),
1326 PINMUX_GPIO(GPIO_PTV6, PTV6_DATA),
1327 PINMUX_GPIO(GPIO_PTV5, PTV5_DATA),
1328 PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
1329 PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
1330 PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
1331 PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
1332 PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
1333
1334 /* PTW */
1335 PINMUX_GPIO(GPIO_PTW7, PTW7_DATA),
1336 PINMUX_GPIO(GPIO_PTW6, PTW6_DATA),
1337 PINMUX_GPIO(GPIO_PTW5, PTW5_DATA),
1338 PINMUX_GPIO(GPIO_PTW4, PTW4_DATA),
1339 PINMUX_GPIO(GPIO_PTW3, PTW3_DATA),
1340 PINMUX_GPIO(GPIO_PTW2, PTW2_DATA),
1341 PINMUX_GPIO(GPIO_PTW1, PTW1_DATA),
1342 PINMUX_GPIO(GPIO_PTW0, PTW0_DATA),
1343
1344 /* PTX */
1345 PINMUX_GPIO(GPIO_PTX7, PTX7_DATA),
1346 PINMUX_GPIO(GPIO_PTX6, PTX6_DATA),
1347 PINMUX_GPIO(GPIO_PTX5, PTX5_DATA),
1348 PINMUX_GPIO(GPIO_PTX4, PTX4_DATA),
1349 PINMUX_GPIO(GPIO_PTX3, PTX3_DATA),
1350 PINMUX_GPIO(GPIO_PTX2, PTX2_DATA),
1351 PINMUX_GPIO(GPIO_PTX1, PTX1_DATA),
1352 PINMUX_GPIO(GPIO_PTX0, PTX0_DATA),
1353
1354 /* PTY */
1355 PINMUX_GPIO(GPIO_PTY7, PTY7_DATA),
1356 PINMUX_GPIO(GPIO_PTY6, PTY6_DATA),
1357 PINMUX_GPIO(GPIO_PTY5, PTY5_DATA),
1358 PINMUX_GPIO(GPIO_PTY4, PTY4_DATA),
1359 PINMUX_GPIO(GPIO_PTY3, PTY3_DATA),
1360 PINMUX_GPIO(GPIO_PTY2, PTY2_DATA),
1361 PINMUX_GPIO(GPIO_PTY1, PTY1_DATA),
1362 PINMUX_GPIO(GPIO_PTY0, PTY0_DATA),
1363
1364 /* PTZ */
1365 PINMUX_GPIO(GPIO_PTZ7, PTZ7_DATA),
1366 PINMUX_GPIO(GPIO_PTZ6, PTZ6_DATA),
1367 PINMUX_GPIO(GPIO_PTZ5, PTZ5_DATA),
1368 PINMUX_GPIO(GPIO_PTZ4, PTZ4_DATA),
1369 PINMUX_GPIO(GPIO_PTZ3, PTZ3_DATA),
1370 PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
1371 PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
1372 PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA),
1373
1374 /* PTA (mobule: LBSC, RGMII) */
1375 PINMUX_GPIO(GPIO_FN_BS, BS_MARK),
1376 PINMUX_GPIO(GPIO_FN_RDWR, RDWR_MARK),
1377 PINMUX_GPIO(GPIO_FN_WE1, WE1_MARK),
1378 PINMUX_GPIO(GPIO_FN_RDY, RDY_MARK),
1379 PINMUX_GPIO(GPIO_FN_ET0_MDC, ET0_MDC_MARK),
1380 PINMUX_GPIO(GPIO_FN_ET0_MDIO, ET0_MDIO_MARK),
1381 PINMUX_GPIO(GPIO_FN_ET1_MDC, ET1_MDC_MARK),
1382 PINMUX_GPIO(GPIO_FN_ET1_MDIO, ET1_MDIO_MARK),
1383
1384 /* PTB (mobule: INTC, ONFI, TMU) */
1385 PINMUX_GPIO(GPIO_FN_IRQ15, IRQ15_MARK),
1386 PINMUX_GPIO(GPIO_FN_IRQ14, IRQ14_MARK),
1387 PINMUX_GPIO(GPIO_FN_IRQ13, IRQ13_MARK),
1388 PINMUX_GPIO(GPIO_FN_IRQ12, IRQ12_MARK),
1389 PINMUX_GPIO(GPIO_FN_IRQ11, IRQ11_MARK),
1390 PINMUX_GPIO(GPIO_FN_IRQ10, IRQ10_MARK),
1391 PINMUX_GPIO(GPIO_FN_IRQ9, IRQ9_MARK),
1392 PINMUX_GPIO(GPIO_FN_IRQ8, IRQ8_MARK),
1393 PINMUX_GPIO(GPIO_FN_ON_NRE, ON_NRE_MARK),
1394 PINMUX_GPIO(GPIO_FN_ON_NWE, ON_NWE_MARK),
1395 PINMUX_GPIO(GPIO_FN_ON_NWP, ON_NWP_MARK),
1396 PINMUX_GPIO(GPIO_FN_ON_NCE0, ON_NCE0_MARK),
1397 PINMUX_GPIO(GPIO_FN_ON_R_B0, ON_R_B0_MARK),
1398 PINMUX_GPIO(GPIO_FN_ON_ALE, ON_ALE_MARK),
1399 PINMUX_GPIO(GPIO_FN_ON_CLE, ON_CLE_MARK),
1400 PINMUX_GPIO(GPIO_FN_TCLK, TCLK_MARK),
1401
1402 /* PTC (mobule: IRQ, PWMU) */
1403 PINMUX_GPIO(GPIO_FN_IRQ7, IRQ7_MARK),
1404 PINMUX_GPIO(GPIO_FN_IRQ6, IRQ6_MARK),
1405 PINMUX_GPIO(GPIO_FN_IRQ5, IRQ5_MARK),
1406 PINMUX_GPIO(GPIO_FN_IRQ4, IRQ4_MARK),
1407 PINMUX_GPIO(GPIO_FN_IRQ3, IRQ3_MARK),
1408 PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK),
1409 PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK),
1410 PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK),
1411 PINMUX_GPIO(GPIO_FN_PWMU0, PWMU0_MARK),
1412 PINMUX_GPIO(GPIO_FN_PWMU1, PWMU1_MARK),
1413 PINMUX_GPIO(GPIO_FN_PWMU2, PWMU2_MARK),
1414 PINMUX_GPIO(GPIO_FN_PWMU3, PWMU3_MARK),
1415 PINMUX_GPIO(GPIO_FN_PWMU4, PWMU4_MARK),
1416 PINMUX_GPIO(GPIO_FN_PWMU5, PWMU5_MARK),
1417
1418 /* PTD (mobule: SPI0, DMAC) */
1419 PINMUX_GPIO(GPIO_FN_SP0_MOSI, SP0_MOSI_MARK),
1420 PINMUX_GPIO(GPIO_FN_SP0_MISO, SP0_MISO_MARK),
1421 PINMUX_GPIO(GPIO_FN_SP0_SCK, SP0_SCK_MARK),
1422 PINMUX_GPIO(GPIO_FN_SP0_SCK_FB, SP0_SCK_FB_MARK),
1423 PINMUX_GPIO(GPIO_FN_SP0_SS0, SP0_SS0_MARK),
1424 PINMUX_GPIO(GPIO_FN_SP0_SS1, SP0_SS1_MARK),
1425 PINMUX_GPIO(GPIO_FN_SP0_SS2, SP0_SS2_MARK),
1426 PINMUX_GPIO(GPIO_FN_SP0_SS3, SP0_SS3_MARK),
1427 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
1428 PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
1429 PINMUX_GPIO(GPIO_FN_TEND0, TEND0_MARK),
1430
1431 /* PTE (mobule: RMII) */
1432 PINMUX_GPIO(GPIO_FN_RMII0_CRS_DV, RMII0_CRS_DV_MARK),
1433 PINMUX_GPIO(GPIO_FN_RMII0_TXD1, RMII0_TXD1_MARK),
1434 PINMUX_GPIO(GPIO_FN_RMII0_TXD0, RMII0_TXD0_MARK),
1435 PINMUX_GPIO(GPIO_FN_RMII0_TXEN, RMII0_TXEN_MARK),
1436 PINMUX_GPIO(GPIO_FN_RMII0_REFCLK, RMII0_REFCLK_MARK),
1437 PINMUX_GPIO(GPIO_FN_RMII0_RXD1, RMII0_RXD1_MARK),
1438 PINMUX_GPIO(GPIO_FN_RMII0_RXD0, RMII0_RXD0_MARK),
1439 PINMUX_GPIO(GPIO_FN_RMII0_RX_ER, RMII0_RX_ER_MARK),
1440
1441 /* PTF (mobule: RMII, SerMux) */
1442 PINMUX_GPIO(GPIO_FN_RMII1_CRS_DV, RMII1_CRS_DV_MARK),
1443 PINMUX_GPIO(GPIO_FN_RMII1_TXD1, RMII1_TXD1_MARK),
1444 PINMUX_GPIO(GPIO_FN_RMII1_TXD0, RMII1_TXD0_MARK),
1445 PINMUX_GPIO(GPIO_FN_RMII1_TXEN, RMII1_TXEN_MARK),
1446 PINMUX_GPIO(GPIO_FN_RMII1_REFCLK, RMII1_REFCLK_MARK),
1447 PINMUX_GPIO(GPIO_FN_RMII1_RXD1, RMII1_RXD1_MARK),
1448 PINMUX_GPIO(GPIO_FN_RMII1_RXD0, RMII1_RXD0_MARK),
1449 PINMUX_GPIO(GPIO_FN_RMII1_RX_ER, RMII1_RX_ER_MARK),
1450 PINMUX_GPIO(GPIO_FN_RAC_RI, RAC_RI_MARK),
1451
1452 /* PTG (mobule: system, LBSC, LPC, WDT, LPC, eMMC) */
1453 PINMUX_GPIO(GPIO_FN_BOOTFMS, BOOTFMS_MARK),
1454 PINMUX_GPIO(GPIO_FN_BOOTWP, BOOTWP_MARK),
1455 PINMUX_GPIO(GPIO_FN_A25, A25_MARK),
1456 PINMUX_GPIO(GPIO_FN_A24, A24_MARK),
1457 PINMUX_GPIO(GPIO_FN_SERIRQ, SERIRQ_MARK),
1458 PINMUX_GPIO(GPIO_FN_WDTOVF, WDTOVF_MARK),
1459 PINMUX_GPIO(GPIO_FN_LPCPD, LPCPD_MARK),
1460 PINMUX_GPIO(GPIO_FN_LDRQ, LDRQ_MARK),
1461 PINMUX_GPIO(GPIO_FN_MMCCLK, MMCCLK_MARK),
1462 PINMUX_GPIO(GPIO_FN_MMCCMD, MMCCMD_MARK),
1463
1464 /* PTH (mobule: SPI1, LPC, DMAC, ADC) */
1465 PINMUX_GPIO(GPIO_FN_SP1_MOSI, SP1_MOSI_MARK),
1466 PINMUX_GPIO(GPIO_FN_SP1_MISO, SP1_MISO_MARK),
1467 PINMUX_GPIO(GPIO_FN_SP1_SCK, SP1_SCK_MARK),
1468 PINMUX_GPIO(GPIO_FN_SP1_SCK_FB, SP1_SCK_FB_MARK),
1469 PINMUX_GPIO(GPIO_FN_SP1_SS0, SP1_SS0_MARK),
1470 PINMUX_GPIO(GPIO_FN_SP1_SS1, SP1_SS1_MARK),
1471 PINMUX_GPIO(GPIO_FN_WP, WP_MARK),
1472 PINMUX_GPIO(GPIO_FN_FMS0, FMS0_MARK),
1473 PINMUX_GPIO(GPIO_FN_TEND1, TEND1_MARK),
1474 PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
1475 PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
1476 PINMUX_GPIO(GPIO_FN_ADTRG1, ADTRG1_MARK),
1477 PINMUX_GPIO(GPIO_FN_ADTRG0, ADTRG0_MARK),
1478
1479 /* PTI (mobule: LBSC, SDHI) */
1480 PINMUX_GPIO(GPIO_FN_D15, D15_MARK),
1481 PINMUX_GPIO(GPIO_FN_D14, D14_MARK),
1482 PINMUX_GPIO(GPIO_FN_D13, D13_MARK),
1483 PINMUX_GPIO(GPIO_FN_D12, D12_MARK),
1484 PINMUX_GPIO(GPIO_FN_D11, D11_MARK),
1485 PINMUX_GPIO(GPIO_FN_D10, D10_MARK),
1486 PINMUX_GPIO(GPIO_FN_D9, D9_MARK),
1487 PINMUX_GPIO(GPIO_FN_D8, D8_MARK),
1488 PINMUX_GPIO(GPIO_FN_SD_WP, SD_WP_MARK),
1489 PINMUX_GPIO(GPIO_FN_SD_CD, SD_CD_MARK),
1490 PINMUX_GPIO(GPIO_FN_SD_CLK, SD_CLK_MARK),
1491 PINMUX_GPIO(GPIO_FN_SD_CMD, SD_CMD_MARK),
1492 PINMUX_GPIO(GPIO_FN_SD_D3, SD_D3_MARK),
1493 PINMUX_GPIO(GPIO_FN_SD_D2, SD_D2_MARK),
1494 PINMUX_GPIO(GPIO_FN_SD_D1, SD_D1_MARK),
1495 PINMUX_GPIO(GPIO_FN_SD_D0, SD_D0_MARK),
1496
1497 /* PTJ (mobule: SCIF234, SERMUX) */
1498 PINMUX_GPIO(GPIO_FN_RTS3, RTS3_MARK),
1499 PINMUX_GPIO(GPIO_FN_CTS3, CTS3_MARK),
1500 PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),
1501 PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),
1502 PINMUX_GPIO(GPIO_FN_RTS4, RTS4_MARK),
1503 PINMUX_GPIO(GPIO_FN_RXD4, RXD4_MARK),
1504 PINMUX_GPIO(GPIO_FN_TXD4, TXD4_MARK),
1505
1506 /* PTK (mobule: SERMUX, LBSC, SCIF) */
1507 PINMUX_GPIO(GPIO_FN_COM2_TXD, COM2_TXD_MARK),
1508 PINMUX_GPIO(GPIO_FN_COM2_RXD, COM2_RXD_MARK),
1509 PINMUX_GPIO(GPIO_FN_COM2_RTS, COM2_RTS_MARK),
1510 PINMUX_GPIO(GPIO_FN_COM2_CTS, COM2_CTS_MARK),
1511 PINMUX_GPIO(GPIO_FN_COM2_DTR, COM2_DTR_MARK),
1512 PINMUX_GPIO(GPIO_FN_COM2_DSR, COM2_DSR_MARK),
1513 PINMUX_GPIO(GPIO_FN_COM2_DCD, COM2_DCD_MARK),
1514 PINMUX_GPIO(GPIO_FN_CLKOUT, CLKOUT_MARK),
1515 PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),
1516 PINMUX_GPIO(GPIO_FN_SCK4, SCK4_MARK),
1517 PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
1518
1519 /* PTL (mobule: SERMUX, SCIF, LBSC, AUD) */
1520 PINMUX_GPIO(GPIO_FN_RAC_RXD, RAC_RXD_MARK),
1521 PINMUX_GPIO(GPIO_FN_RAC_RTS, RAC_RTS_MARK),
1522 PINMUX_GPIO(GPIO_FN_RAC_CTS, RAC_CTS_MARK),
1523 PINMUX_GPIO(GPIO_FN_RAC_DTR, RAC_DTR_MARK),
1524 PINMUX_GPIO(GPIO_FN_RAC_DSR, RAC_DSR_MARK),
1525 PINMUX_GPIO(GPIO_FN_RAC_DCD, RAC_DCD_MARK),
1526 PINMUX_GPIO(GPIO_FN_RAC_TXD, RAC_TXD_MARK),
1527 PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),
1528 PINMUX_GPIO(GPIO_FN_CS5, CS5_MARK),
1529 PINMUX_GPIO(GPIO_FN_CS6, CS6_MARK),
1530 PINMUX_GPIO(GPIO_FN_AUDSYNC, AUDSYNC_MARK),
1531 PINMUX_GPIO(GPIO_FN_AUDCK, AUDCK_MARK),
1532 PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),
1533
1534 /* PTM (mobule: LBSC, IIC) */
1535 PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
1536 PINMUX_GPIO(GPIO_FN_RD, RD_MARK),
1537 PINMUX_GPIO(GPIO_FN_WE0, WE0_MARK),
1538 PINMUX_GPIO(GPIO_FN_CS0, CS0_MARK),
1539 PINMUX_GPIO(GPIO_FN_SDA6, SDA6_MARK),
1540 PINMUX_GPIO(GPIO_FN_SCL6, SCL6_MARK),
1541 PINMUX_GPIO(GPIO_FN_SDA7, SDA7_MARK),
1542 PINMUX_GPIO(GPIO_FN_SCL7, SCL7_MARK),
1543
1544 /* PTN (mobule: USB, JMC, SGPIO, WDT) */
1545 PINMUX_GPIO(GPIO_FN_VBUS_EN, VBUS_EN_MARK),
1546 PINMUX_GPIO(GPIO_FN_VBUS_OC, VBUS_OC_MARK),
1547 PINMUX_GPIO(GPIO_FN_JMCTCK, JMCTCK_MARK),
1548 PINMUX_GPIO(GPIO_FN_JMCTMS, JMCTMS_MARK),
1549 PINMUX_GPIO(GPIO_FN_JMCTDO, JMCTDO_MARK),
1550 PINMUX_GPIO(GPIO_FN_JMCTDI, JMCTDI_MARK),
1551 PINMUX_GPIO(GPIO_FN_JMCTRST, JMCTRST_MARK),
1552 PINMUX_GPIO(GPIO_FN_SGPIO1_CLK, SGPIO1_CLK_MARK),
1553 PINMUX_GPIO(GPIO_FN_SGPIO1_LOAD, SGPIO1_LOAD_MARK),
1554 PINMUX_GPIO(GPIO_FN_SGPIO1_DI, SGPIO1_DI_MARK),
1555 PINMUX_GPIO(GPIO_FN_SGPIO1_DO, SGPIO1_DO_MARK),
1556 PINMUX_GPIO(GPIO_FN_SUB_CLKIN, SUB_CLKIN_MARK),
1557
1558 /* PTO (mobule: SGPIO, SerMux) */
1559 PINMUX_GPIO(GPIO_FN_SGPIO0_CLK, SGPIO0_CLK_MARK),
1560 PINMUX_GPIO(GPIO_FN_SGPIO0_LOAD, SGPIO0_LOAD_MARK),
1561 PINMUX_GPIO(GPIO_FN_SGPIO0_DI, SGPIO0_DI_MARK),
1562 PINMUX_GPIO(GPIO_FN_SGPIO0_DO, SGPIO0_DO_MARK),
1563 PINMUX_GPIO(GPIO_FN_SGPIO2_CLK, SGPIO2_CLK_MARK),
1564 PINMUX_GPIO(GPIO_FN_SGPIO2_LOAD, SGPIO2_LOAD_MARK),
1565 PINMUX_GPIO(GPIO_FN_SGPIO2_DI, SGPIO2_DI_MARK),
1566 PINMUX_GPIO(GPIO_FN_SGPIO2_DO, SGPIO2_DO_MARK),
1567 PINMUX_GPIO(GPIO_FN_COM1_TXD, COM1_TXD_MARK),
1568 PINMUX_GPIO(GPIO_FN_COM1_RXD, COM1_RXD_MARK),
1569 PINMUX_GPIO(GPIO_FN_COM1_RTS, COM1_RTS_MARK),
1570 PINMUX_GPIO(GPIO_FN_COM1_CTS, COM1_CTS_MARK),
1571
1572 /* PTP (mobule: EVC, ADC) */
1573
1574 /* PTQ (mobule: LPC) */
1575 PINMUX_GPIO(GPIO_FN_LAD3, LAD3_MARK),
1576 PINMUX_GPIO(GPIO_FN_LAD2, LAD2_MARK),
1577 PINMUX_GPIO(GPIO_FN_LAD1, LAD1_MARK),
1578 PINMUX_GPIO(GPIO_FN_LAD0, LAD0_MARK),
1579 PINMUX_GPIO(GPIO_FN_LFRAME, LFRAME_MARK),
1580 PINMUX_GPIO(GPIO_FN_LRESET, LRESET_MARK),
1581 PINMUX_GPIO(GPIO_FN_LCLK, LCLK_MARK),
1582
1583 /* PTR (mobule: GRA, IIC) */
1584 PINMUX_GPIO(GPIO_FN_DDC3, DDC3_MARK),
1585 PINMUX_GPIO(GPIO_FN_DDC2, DDC2_MARK),
1586 PINMUX_GPIO(GPIO_FN_SDA8, SDA8_MARK),
1587 PINMUX_GPIO(GPIO_FN_SCL8, SCL8_MARK),
1588 PINMUX_GPIO(GPIO_FN_SDA2, SDA2_MARK),
1589 PINMUX_GPIO(GPIO_FN_SCL2, SCL2_MARK),
1590 PINMUX_GPIO(GPIO_FN_SDA1, SDA1_MARK),
1591 PINMUX_GPIO(GPIO_FN_SCL1, SCL1_MARK),
1592 PINMUX_GPIO(GPIO_FN_SDA0, SDA0_MARK),
1593 PINMUX_GPIO(GPIO_FN_SCL0, SCL0_MARK),
1594
1595 /* PTS (mobule: GRA, IIC) */
1596 PINMUX_GPIO(GPIO_FN_DDC1, DDC1_MARK),
1597 PINMUX_GPIO(GPIO_FN_DDC0, DDC0_MARK),
1598 PINMUX_GPIO(GPIO_FN_SDA9, SDA9_MARK),
1599 PINMUX_GPIO(GPIO_FN_SCL9, SCL9_MARK),
1600 PINMUX_GPIO(GPIO_FN_SDA5, SDA5_MARK),
1601 PINMUX_GPIO(GPIO_FN_SCL5, SCL5_MARK),
1602 PINMUX_GPIO(GPIO_FN_SDA4, SDA4_MARK),
1603 PINMUX_GPIO(GPIO_FN_SCL4, SCL4_MARK),
1604 PINMUX_GPIO(GPIO_FN_SDA3, SDA3_MARK),
1605 PINMUX_GPIO(GPIO_FN_SCL3, SCL3_MARK),
1606
1607 /* PTT (mobule: PWMX, AUD) */
1608 PINMUX_GPIO(GPIO_FN_PWMX7, PWMX7_MARK),
1609 PINMUX_GPIO(GPIO_FN_PWMX6, PWMX6_MARK),
1610 PINMUX_GPIO(GPIO_FN_PWMX5, PWMX5_MARK),
1611 PINMUX_GPIO(GPIO_FN_PWMX4, PWMX4_MARK),
1612 PINMUX_GPIO(GPIO_FN_PWMX3, PWMX3_MARK),
1613 PINMUX_GPIO(GPIO_FN_PWMX2, PWMX2_MARK),
1614 PINMUX_GPIO(GPIO_FN_PWMX1, PWMX1_MARK),
1615 PINMUX_GPIO(GPIO_FN_PWMX0, PWMX0_MARK),
1616 PINMUX_GPIO(GPIO_FN_AUDATA3, AUDATA3_MARK),
1617 PINMUX_GPIO(GPIO_FN_AUDATA2, AUDATA2_MARK),
1618 PINMUX_GPIO(GPIO_FN_AUDATA1, AUDATA1_MARK),
1619 PINMUX_GPIO(GPIO_FN_AUDATA0, AUDATA0_MARK),
1620 PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK),
1621 PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
1622
1623 /* PTU (mobule: LPC, APM) */
1624 PINMUX_GPIO(GPIO_FN_LGPIO7, LGPIO7_MARK),
1625 PINMUX_GPIO(GPIO_FN_LGPIO6, LGPIO6_MARK),
1626 PINMUX_GPIO(GPIO_FN_LGPIO5, LGPIO5_MARK),
1627 PINMUX_GPIO(GPIO_FN_LGPIO4, LGPIO4_MARK),
1628 PINMUX_GPIO(GPIO_FN_LGPIO3, LGPIO3_MARK),
1629 PINMUX_GPIO(GPIO_FN_LGPIO2, LGPIO2_MARK),
1630 PINMUX_GPIO(GPIO_FN_LGPIO1, LGPIO1_MARK),
1631 PINMUX_GPIO(GPIO_FN_LGPIO0, LGPIO0_MARK),
1632 PINMUX_GPIO(GPIO_FN_APMONCTL_O, APMONCTL_O_MARK),
1633 PINMUX_GPIO(GPIO_FN_APMPWBTOUT_O, APMPWBTOUT_O_MARK),
1634 PINMUX_GPIO(GPIO_FN_APMSCI_O, APMSCI_O_MARK),
1635 PINMUX_GPIO(GPIO_FN_APMVDDON, APMVDDON_MARK),
1636 PINMUX_GPIO(GPIO_FN_APMSLPBTN, APMSLPBTN_MARK),
1637 PINMUX_GPIO(GPIO_FN_APMPWRBTN, APMPWRBTN_MARK),
1638 PINMUX_GPIO(GPIO_FN_APMS5N, APMS5N_MARK),
1639 PINMUX_GPIO(GPIO_FN_APMS3N, APMS3N_MARK),
1640
1641 /* PTV (mobule: LBSC, SerMux, R-SPI, EVC, GRA) */
1642 PINMUX_GPIO(GPIO_FN_A23, A23_MARK),
1643 PINMUX_GPIO(GPIO_FN_A22, A22_MARK),
1644 PINMUX_GPIO(GPIO_FN_A21, A21_MARK),
1645 PINMUX_GPIO(GPIO_FN_A20, A20_MARK),
1646 PINMUX_GPIO(GPIO_FN_A19, A19_MARK),
1647 PINMUX_GPIO(GPIO_FN_A18, A18_MARK),
1648 PINMUX_GPIO(GPIO_FN_A17, A17_MARK),
1649 PINMUX_GPIO(GPIO_FN_A16, A16_MARK),
1650 PINMUX_GPIO(GPIO_FN_COM2_RI, COM2_RI_MARK),
1651 PINMUX_GPIO(GPIO_FN_R_SPI_MOSI, R_SPI_MOSI_MARK),
1652 PINMUX_GPIO(GPIO_FN_R_SPI_MISO, R_SPI_MISO_MARK),
1653 PINMUX_GPIO(GPIO_FN_R_SPI_RSPCK, R_SPI_RSPCK_MARK),
1654 PINMUX_GPIO(GPIO_FN_R_SPI_SSL0, R_SPI_SSL0_MARK),
1655 PINMUX_GPIO(GPIO_FN_R_SPI_SSL1, R_SPI_SSL1_MARK),
1656 PINMUX_GPIO(GPIO_FN_EVENT7, EVENT7_MARK),
1657 PINMUX_GPIO(GPIO_FN_EVENT6, EVENT6_MARK),
1658 PINMUX_GPIO(GPIO_FN_VBIOS_DI, VBIOS_DI_MARK),
1659 PINMUX_GPIO(GPIO_FN_VBIOS_DO, VBIOS_DO_MARK),
1660 PINMUX_GPIO(GPIO_FN_VBIOS_CLK, VBIOS_CLK_MARK),
1661 PINMUX_GPIO(GPIO_FN_VBIOS_CS, VBIOS_CS_MARK),
1662
1663 /* PTW (mobule: LBSC, EVC, SCIF) */
1664 PINMUX_GPIO(GPIO_FN_A16, A16_MARK),
1665 PINMUX_GPIO(GPIO_FN_A15, A15_MARK),
1666 PINMUX_GPIO(GPIO_FN_A14, A14_MARK),
1667 PINMUX_GPIO(GPIO_FN_A13, A13_MARK),
1668 PINMUX_GPIO(GPIO_FN_A12, A12_MARK),
1669 PINMUX_GPIO(GPIO_FN_A11, A11_MARK),
1670 PINMUX_GPIO(GPIO_FN_A10, A10_MARK),
1671 PINMUX_GPIO(GPIO_FN_A9, A9_MARK),
1672 PINMUX_GPIO(GPIO_FN_A8, A8_MARK),
1673 PINMUX_GPIO(GPIO_FN_EVENT5, EVENT5_MARK),
1674 PINMUX_GPIO(GPIO_FN_EVENT4, EVENT4_MARK),
1675 PINMUX_GPIO(GPIO_FN_EVENT3, EVENT3_MARK),
1676 PINMUX_GPIO(GPIO_FN_EVENT2, EVENT2_MARK),
1677 PINMUX_GPIO(GPIO_FN_EVENT1, EVENT1_MARK),
1678 PINMUX_GPIO(GPIO_FN_EVENT0, EVENT0_MARK),
1679 PINMUX_GPIO(GPIO_FN_CTS4, CTS4_MARK),
1680 PINMUX_GPIO(GPIO_FN_CTS2, CTS2_MARK),
1681
1682 /* PTX (mobule: LBSC) */
1683 PINMUX_GPIO(GPIO_FN_A7, A7_MARK),
1684 PINMUX_GPIO(GPIO_FN_A6, A6_MARK),
1685 PINMUX_GPIO(GPIO_FN_A5, A5_MARK),
1686 PINMUX_GPIO(GPIO_FN_A4, A4_MARK),
1687 PINMUX_GPIO(GPIO_FN_A3, A3_MARK),
1688 PINMUX_GPIO(GPIO_FN_A2, A2_MARK),
1689 PINMUX_GPIO(GPIO_FN_A1, A1_MARK),
1690 PINMUX_GPIO(GPIO_FN_A0, A0_MARK),
1691 PINMUX_GPIO(GPIO_FN_RTS2, RTS2_MARK),
1692 PINMUX_GPIO(GPIO_FN_SIM_D, SIM_D_MARK),
1693 PINMUX_GPIO(GPIO_FN_SIM_CLK, SIM_CLK_MARK),
1694 PINMUX_GPIO(GPIO_FN_SIM_RST, SIM_RST_MARK),
1695
1696 /* PTY (mobule: LBSC) */
1697 PINMUX_GPIO(GPIO_FN_D7, D7_MARK),
1698 PINMUX_GPIO(GPIO_FN_D6, D6_MARK),
1699 PINMUX_GPIO(GPIO_FN_D5, D5_MARK),
1700 PINMUX_GPIO(GPIO_FN_D4, D4_MARK),
1701 PINMUX_GPIO(GPIO_FN_D3, D3_MARK),
1702 PINMUX_GPIO(GPIO_FN_D2, D2_MARK),
1703 PINMUX_GPIO(GPIO_FN_D1, D1_MARK),
1704 PINMUX_GPIO(GPIO_FN_D0, D0_MARK),
1705
1706 /* PTZ (mobule: eMMC, ONFI) */
1707 PINMUX_GPIO(GPIO_FN_MMCDAT7, MMCDAT7_MARK),
1708 PINMUX_GPIO(GPIO_FN_MMCDAT6, MMCDAT6_MARK),
1709 PINMUX_GPIO(GPIO_FN_MMCDAT5, MMCDAT5_MARK),
1710 PINMUX_GPIO(GPIO_FN_MMCDAT4, MMCDAT4_MARK),
1711 PINMUX_GPIO(GPIO_FN_MMCDAT3, MMCDAT3_MARK),
1712 PINMUX_GPIO(GPIO_FN_MMCDAT2, MMCDAT2_MARK),
1713 PINMUX_GPIO(GPIO_FN_MMCDAT1, MMCDAT1_MARK),
1714 PINMUX_GPIO(GPIO_FN_MMCDAT0, MMCDAT0_MARK),
1715 PINMUX_GPIO(GPIO_FN_ON_DQ7, ON_DQ7_MARK),
1716 PINMUX_GPIO(GPIO_FN_ON_DQ6, ON_DQ6_MARK),
1717 PINMUX_GPIO(GPIO_FN_ON_DQ5, ON_DQ5_MARK),
1718 PINMUX_GPIO(GPIO_FN_ON_DQ4, ON_DQ4_MARK),
1719 PINMUX_GPIO(GPIO_FN_ON_DQ3, ON_DQ3_MARK),
1720 PINMUX_GPIO(GPIO_FN_ON_DQ2, ON_DQ2_MARK),
1721 PINMUX_GPIO(GPIO_FN_ON_DQ1, ON_DQ1_MARK),
1722 PINMUX_GPIO(GPIO_FN_ON_DQ0, ON_DQ0_MARK),
1723};
1724
1725static struct pinmux_cfg_reg pinmux_config_regs[] = {
1726 { PINMUX_CFG_REG("PACR", 0xffec0000, 16, 2) {
1727 PTA7_FN, PTA7_OUT, PTA7_IN, PTA7_IN_PU,
1728 PTA6_FN, PTA6_OUT, PTA6_IN, PTA6_IN_PU,
1729 PTA5_FN, PTA5_OUT, PTA5_IN, PTA5_IN_PU,
1730 PTA4_FN, PTA4_OUT, PTA4_IN, PTA4_IN_PU,
1731 PTA3_FN, PTA3_OUT, PTA3_IN, PTA3_IN_PU,
1732 PTA2_FN, PTA2_OUT, PTA2_IN, PTA2_IN_PU,
1733 PTA1_FN, PTA1_OUT, PTA1_IN, PTA1_IN_PU,
1734 PTA0_FN, PTA0_OUT, PTA0_IN, PTA0_IN_PU }
1735 },
1736 { PINMUX_CFG_REG("PBCR", 0xffec0002, 16, 2) {
1737 PTB7_FN, PTB7_OUT, PTB7_IN, 0,
1738 PTB6_FN, PTB6_OUT, PTB6_IN, 0,
1739 PTB5_FN, PTB5_OUT, PTB5_IN, 0,
1740 PTB4_FN, PTB4_OUT, PTB4_IN, 0,
1741 PTB3_FN, PTB3_OUT, PTB3_IN, 0,
1742 PTB2_FN, PTB2_OUT, PTB2_IN, 0,
1743 PTB1_FN, PTB1_OUT, PTB1_IN, 0,
1744 PTB0_FN, PTB0_OUT, PTB0_IN, 0 }
1745 },
1746 { PINMUX_CFG_REG("PCCR", 0xffec0004, 16, 2) {
1747 PTC7_FN, PTC7_OUT, PTC7_IN, 0,
1748 PTC6_FN, PTC6_OUT, PTC6_IN, 0,
1749 PTC5_FN, PTC5_OUT, PTC5_IN, 0,
1750 PTC4_FN, PTC4_OUT, PTC4_IN, 0,
1751 PTC3_FN, PTC3_OUT, PTC3_IN, 0,
1752 PTC2_FN, PTC2_OUT, PTC2_IN, 0,
1753 PTC1_FN, PTC1_OUT, PTC1_IN, 0,
1754 PTC0_FN, PTC0_OUT, PTC0_IN, 0 }
1755 },
1756 { PINMUX_CFG_REG("PDCR", 0xffec0006, 16, 2) {
1757 PTD7_FN, PTD7_OUT, PTD7_IN, PTD7_IN_PU,
1758 PTD6_FN, PTD6_OUT, PTD6_IN, PTD6_IN_PU,
1759 PTD5_FN, PTD5_OUT, PTD5_IN, PTD5_IN_PU,
1760 PTD4_FN, PTD4_OUT, PTD4_IN, PTD4_IN_PU,
1761 PTD3_FN, PTD3_OUT, PTD3_IN, PTD3_IN_PU,
1762 PTD2_FN, PTD2_OUT, PTD2_IN, PTD2_IN_PU,
1763 PTD1_FN, PTD1_OUT, PTD1_IN, PTD1_IN_PU,
1764 PTD0_FN, PTD0_OUT, PTD0_IN, PTD0_IN_PU }
1765 },
1766 { PINMUX_CFG_REG("PECR", 0xffec0008, 16, 2) {
1767 PTE7_FN, PTE7_OUT, PTE7_IN, PTE7_IN_PU,
1768 PTE6_FN, PTE6_OUT, PTE6_IN, PTE6_IN_PU,
1769 PTE5_FN, PTE5_OUT, PTE5_IN, PTE5_IN_PU,
1770 PTE4_FN, PTE4_OUT, PTE4_IN, PTE4_IN_PU,
1771 PTE3_FN, PTE3_OUT, PTE3_IN, PTE3_IN_PU,
1772 PTE2_FN, PTE2_OUT, PTE2_IN, PTE2_IN_PU,
1773 PTE1_FN, PTE1_OUT, PTE1_IN, PTE1_IN_PU,
1774 PTE0_FN, PTE0_OUT, PTE0_IN, PTE0_IN_PU }
1775 },
1776 { PINMUX_CFG_REG("PFCR", 0xffec000a, 16, 2) {
1777 PTF7_FN, PTF7_OUT, PTF7_IN, PTF7_IN_PU,
1778 PTF6_FN, PTF6_OUT, PTF6_IN, PTF6_IN_PU,
1779 PTF5_FN, PTF5_OUT, PTF5_IN, PTF5_IN_PU,
1780 PTF4_FN, PTF4_OUT, PTF4_IN, PTF4_IN_PU,
1781 PTF3_FN, PTF3_OUT, PTF3_IN, PTF3_IN_PU,
1782 PTF2_FN, PTF2_OUT, PTF2_IN, PTF2_IN_PU,
1783 PTF1_FN, PTF1_OUT, PTF1_IN, PTF1_IN_PU,
1784 PTF0_FN, PTF0_OUT, PTF0_IN, PTF0_IN_PU }
1785 },
1786 { PINMUX_CFG_REG("PGCR", 0xffec000c, 16, 2) {
1787 PTG7_FN, PTG7_OUT, PTG7_IN, PTG7_IN_PU ,
1788 PTG6_FN, PTG6_OUT, PTG6_IN, PTG6_IN_PU ,
1789 PTG5_FN, PTG5_OUT, PTG5_IN, 0,
1790 PTG4_FN, PTG4_OUT, PTG4_IN, PTG4_IN_PU ,
1791 PTG3_FN, PTG3_OUT, PTG3_IN, 0,
1792 PTG2_FN, PTG2_OUT, PTG2_IN, 0,
1793 PTG1_FN, PTG1_OUT, PTG1_IN, 0,
1794 PTG0_FN, PTG0_OUT, PTG0_IN, 0 }
1795 },
1796 { PINMUX_CFG_REG("PHCR", 0xffec000e, 16, 2) {
1797 PTH7_FN, PTH7_OUT, PTH7_IN, PTH7_IN_PU,
1798 PTH6_FN, PTH6_OUT, PTH6_IN, PTH6_IN_PU,
1799 PTH5_FN, PTH5_OUT, PTH5_IN, PTH5_IN_PU,
1800 PTH4_FN, PTH4_OUT, PTH4_IN, PTH4_IN_PU,
1801 PTH3_FN, PTH3_OUT, PTH3_IN, PTH3_IN_PU,
1802 PTH2_FN, PTH2_OUT, PTH2_IN, PTH2_IN_PU,
1803 PTH1_FN, PTH1_OUT, PTH1_IN, PTH1_IN_PU,
1804 PTH0_FN, PTH0_OUT, PTH0_IN, PTH0_IN_PU }
1805 },
1806 { PINMUX_CFG_REG("PICR", 0xffec0010, 16, 2) {
1807 PTI7_FN, PTI7_OUT, PTI7_IN, PTI7_IN_PU,
1808 PTI6_FN, PTI6_OUT, PTI6_IN, PTI6_IN_PU,
1809 PTI5_FN, PTI5_OUT, PTI5_IN, 0,
1810 PTI4_FN, PTI4_OUT, PTI4_IN, PTI4_IN_PU,
1811 PTI3_FN, PTI3_OUT, PTI3_IN, PTI3_IN_PU,
1812 PTI2_FN, PTI2_OUT, PTI2_IN, PTI2_IN_PU,
1813 PTI1_FN, PTI1_OUT, PTI1_IN, PTI1_IN_PU,
1814 PTI0_FN, PTI0_OUT, PTI0_IN, PTI0_IN_PU }
1815 },
1816 { PINMUX_CFG_REG("PJCR", 0xffec0012, 16, 2) {
1817 0, 0, 0, 0, /* reserved: always set 1 */
1818 PTJ6_FN, PTJ6_OUT, PTJ6_IN, PTJ6_IN_PU,
1819 PTJ5_FN, PTJ5_OUT, PTJ5_IN, PTJ5_IN_PU,
1820 PTJ4_FN, PTJ4_OUT, PTJ4_IN, PTJ4_IN_PU,
1821 PTJ3_FN, PTJ3_OUT, PTJ3_IN, PTJ3_IN_PU,
1822 PTJ2_FN, PTJ2_OUT, PTJ2_IN, PTJ2_IN_PU,
1823 PTJ1_FN, PTJ1_OUT, PTJ1_IN, PTJ1_IN_PU,
1824 PTJ0_FN, PTJ0_OUT, PTJ0_IN, PTJ0_IN_PU }
1825 },
1826 { PINMUX_CFG_REG("PKCR", 0xffec0014, 16, 2) {
1827 PTK7_FN, PTK7_OUT, PTK7_IN, PTK7_IN_PU,
1828 PTK6_FN, PTK6_OUT, PTK6_IN, PTK6_IN_PU,
1829 PTK5_FN, PTK5_OUT, PTK5_IN, PTK5_IN_PU,
1830 PTK4_FN, PTK4_OUT, PTK4_IN, PTK4_IN_PU,
1831 PTK3_FN, PTK3_OUT, PTK3_IN, PTK3_IN_PU,
1832 PTK2_FN, PTK2_OUT, PTK2_IN, PTK2_IN_PU,
1833 PTK1_FN, PTK1_OUT, PTK1_IN, PTK1_IN_PU,
1834 PTK0_FN, PTK0_OUT, PTK0_IN, PTK0_IN_PU }
1835 },
1836 { PINMUX_CFG_REG("PLCR", 0xffec0016, 16, 2) {
1837 0, 0, 0, 0, /* reserved: always set 1 */
1838 PTL6_FN, PTL6_OUT, PTL6_IN, PTL6_IN_PU,
1839 PTL5_FN, PTL5_OUT, PTL5_IN, PTL5_IN_PU,
1840 PTL4_FN, PTL4_OUT, PTL4_IN, PTL4_IN_PU,
1841 PTL3_FN, PTL3_OUT, PTL3_IN, PTL3_IN_PU,
1842 PTL2_FN, PTL2_OUT, PTL2_IN, PTL2_IN_PU,
1843 PTL1_FN, PTL1_OUT, PTL1_IN, PTL1_IN_PU,
1844 PTL0_FN, PTL0_OUT, PTL0_IN, PTL0_IN_PU }
1845 },
1846 { PINMUX_CFG_REG("PMCR", 0xffec0018, 16, 2) {
1847 PTM7_FN, PTM7_OUT, PTM7_IN, PTM7_IN_PU,
1848 PTM6_FN, PTM6_OUT, PTM6_IN, PTM6_IN_PU,
1849 PTM5_FN, PTM5_OUT, PTM5_IN, PTM5_IN_PU,
1850 PTM4_FN, PTM4_OUT, PTM4_IN, PTM4_IN_PU,
1851 PTM3_FN, PTM3_OUT, PTM3_IN, 0,
1852 PTM2_FN, PTM2_OUT, PTM2_IN, 0,
1853 PTM1_FN, PTM1_OUT, PTM1_IN, 0,
1854 PTM0_FN, PTM0_OUT, PTM0_IN, 0 }
1855 },
1856 { PINMUX_CFG_REG("PNCR", 0xffec001a, 16, 2) {
1857 0, 0, 0, 0, /* reserved: always set 1 */
1858 PTN6_FN, PTN6_OUT, PTN6_IN, 0,
1859 PTN5_FN, PTN5_OUT, PTN5_IN, 0,
1860 PTN4_FN, PTN4_OUT, PTN4_IN, PTN4_IN_PU,
1861 PTN3_FN, PTN3_OUT, PTN3_IN, PTN3_IN_PU,
1862 PTN2_FN, PTN2_OUT, PTN2_IN, PTN2_IN_PU,
1863 PTN1_FN, PTN1_OUT, PTN1_IN, PTN1_IN_PU,
1864 PTN0_FN, PTN0_OUT, PTN0_IN, PTN0_IN_PU }
1865 },
1866 { PINMUX_CFG_REG("POCR", 0xffec001c, 16, 2) {
1867 PTO7_FN, PTO7_OUT, PTO7_IN, PTO7_IN_PU,
1868 PTO6_FN, PTO6_OUT, PTO6_IN, PTO6_IN_PU,
1869 PTO5_FN, PTO5_OUT, PTO5_IN, PTO5_IN_PU,
1870 PTO4_FN, PTO4_OUT, PTO4_IN, PTO4_IN_PU,
1871 PTO3_FN, PTO3_OUT, PTO3_IN, PTO3_IN_PU,
1872 PTO2_FN, PTO2_OUT, PTO2_IN, PTO2_IN_PU,
1873 PTO1_FN, PTO1_OUT, PTO1_IN, PTO1_IN_PU,
1874 PTO0_FN, PTO0_OUT, PTO0_IN, PTO0_IN_PU }
1875 },
1876#if 0 /* FIXME: Remove it? */
1877 { PINMUX_CFG_REG("PPCR", 0xffec001e, 16, 2) {
1878 0, 0, 0, 0, /* reserved: always set 1 */
1879 PTP6_FN, PTP6_OUT, PTP6_IN, 0,
1880 PTP5_FN, PTP5_OUT, PTP5_IN, 0,
1881 PTP4_FN, PTP4_OUT, PTP4_IN, 0,
1882 PTP3_FN, PTP3_OUT, PTP3_IN, 0,
1883 PTP2_FN, PTP2_OUT, PTP2_IN, 0,
1884 PTP1_FN, PTP1_OUT, PTP1_IN, 0,
1885 PTP0_FN, PTP0_OUT, PTP0_IN, 0 }
1886 },
1887#endif
1888 { PINMUX_CFG_REG("PQCR", 0xffec0020, 16, 2) {
1889 0, 0, 0, 0, /* reserved: always set 1 */
1890 PTQ6_FN, PTQ6_OUT, PTQ6_IN, 0,
1891 PTQ5_FN, PTQ5_OUT, PTQ5_IN, 0,
1892 PTQ4_FN, PTQ4_OUT, PTQ4_IN, 0,
1893 PTQ3_FN, PTQ3_OUT, PTQ3_IN, 0,
1894 PTQ2_FN, PTQ2_OUT, PTQ2_IN, 0,
1895 PTQ1_FN, PTQ1_OUT, PTQ1_IN, 0,
1896 PTQ0_FN, PTQ0_OUT, PTQ0_IN, 0 }
1897 },
1898 { PINMUX_CFG_REG("PRCR", 0xffec0022, 16, 2) {
1899 PTR7_FN, PTR7_OUT, PTR7_IN, 0,
1900 PTR6_FN, PTR6_OUT, PTR6_IN, 0,
1901 PTR5_FN, PTR5_OUT, PTR5_IN, 0,
1902 PTR4_FN, PTR4_OUT, PTR4_IN, 0,
1903 PTR3_FN, PTR3_OUT, PTR3_IN, 0,
1904 PTR2_FN, PTR2_OUT, PTR2_IN, 0,
1905 PTR1_FN, PTR1_OUT, PTR1_IN, 0,
1906 PTR0_FN, PTR0_OUT, PTR0_IN, 0 }
1907 },
1908 { PINMUX_CFG_REG("PSCR", 0xffec0024, 16, 2) {
1909 PTS7_FN, PTS7_OUT, PTS7_IN, 0,
1910 PTS6_FN, PTS6_OUT, PTS6_IN, 0,
1911 PTS5_FN, PTS5_OUT, PTS5_IN, 0,
1912 PTS4_FN, PTS4_OUT, PTS4_IN, 0,
1913 PTS3_FN, PTS3_OUT, PTS3_IN, 0,
1914 PTS2_FN, PTS2_OUT, PTS2_IN, 0,
1915 PTS1_FN, PTS1_OUT, PTS1_IN, 0,
1916 PTS0_FN, PTS0_OUT, PTS0_IN, 0 }
1917 },
1918 { PINMUX_CFG_REG("PTCR", 0xffec0026, 16, 2) {
1919 PTT7_FN, PTT7_OUT, PTT7_IN, PTO7_IN_PU,
1920 PTT6_FN, PTT6_OUT, PTT6_IN, PTO6_IN_PU,
1921 PTT5_FN, PTT5_OUT, PTT5_IN, PTO5_IN_PU,
1922 PTT4_FN, PTT4_OUT, PTT4_IN, PTO4_IN_PU,
1923 PTT3_FN, PTT3_OUT, PTT3_IN, PTO3_IN_PU,
1924 PTT2_FN, PTT2_OUT, PTT2_IN, PTO2_IN_PU,
1925 PTT1_FN, PTT1_OUT, PTT1_IN, PTO1_IN_PU,
1926 PTT0_FN, PTT0_OUT, PTT0_IN, PTO0_IN_PU }
1927 },
1928 { PINMUX_CFG_REG("PUCR", 0xffec0028, 16, 2) {
1929 PTU7_FN, PTU7_OUT, PTU7_IN, PTU7_IN_PU,
1930 PTU6_FN, PTU6_OUT, PTU6_IN, PTU6_IN_PU,
1931 PTU5_FN, PTU5_OUT, PTU5_IN, PTU5_IN_PU,
1932 PTU4_FN, PTU4_OUT, PTU4_IN, PTU4_IN_PU,
1933 PTU3_FN, PTU3_OUT, PTU3_IN, PTU3_IN_PU,
1934 PTU2_FN, PTU2_OUT, PTU2_IN, PTU2_IN_PU,
1935 PTU1_FN, PTU1_OUT, PTU1_IN, PTU1_IN_PU,
1936 PTU0_FN, PTU0_OUT, PTU0_IN, PTU0_IN_PU }
1937 },
1938 { PINMUX_CFG_REG("PVCR", 0xffec002a, 16, 2) {
1939 PTV7_FN, PTV7_OUT, PTV7_IN, PTV7_IN_PU,
1940 PTV6_FN, PTV6_OUT, PTV6_IN, PTV6_IN_PU,
1941 PTV5_FN, PTV5_OUT, PTV5_IN, PTV5_IN_PU,
1942 PTV4_FN, PTV4_OUT, PTV4_IN, PTV4_IN_PU,
1943 PTV3_FN, PTV3_OUT, PTV3_IN, PTV3_IN_PU,
1944 PTV2_FN, PTV2_OUT, PTV2_IN, PTV2_IN_PU,
1945 PTV1_FN, PTV1_OUT, PTV1_IN, 0,
1946 PTV0_FN, PTV0_OUT, PTV0_IN, 0 }
1947 },
1948 { PINMUX_CFG_REG("PWCR", 0xffec002c, 16, 2) {
1949 PTW7_FN, PTW7_OUT, PTW7_IN, 0,
1950 PTW6_FN, PTW6_OUT, PTW6_IN, 0,
1951 PTW5_FN, PTW5_OUT, PTW5_IN, 0,
1952 PTW4_FN, PTW4_OUT, PTW4_IN, 0,
1953 PTW3_FN, PTW3_OUT, PTW3_IN, 0,
1954 PTW2_FN, PTW2_OUT, PTW2_IN, 0,
1955 PTW1_FN, PTW1_OUT, PTW1_IN, PTW1_IN_PU,
1956 PTW0_FN, PTW0_OUT, PTW0_IN, PTW0_IN_PU }
1957 },
1958 { PINMUX_CFG_REG("PXCR", 0xffec002e, 16, 2) {
1959 PTX7_FN, PTX7_OUT, PTX7_IN, PTX7_IN_PU,
1960 PTX6_FN, PTX6_OUT, PTX6_IN, PTX6_IN_PU,
1961 PTX5_FN, PTX5_OUT, PTX5_IN, PTX5_IN_PU,
1962 PTX4_FN, PTX4_OUT, PTX4_IN, PTX4_IN_PU,
1963 PTX3_FN, PTX3_OUT, PTX3_IN, PTX3_IN_PU,
1964 PTX2_FN, PTX2_OUT, PTX2_IN, PTX2_IN_PU,
1965 PTX1_FN, PTX1_OUT, PTX1_IN, PTX1_IN_PU,
1966 PTX0_FN, PTX0_OUT, PTX0_IN, PTX0_IN_PU }
1967 },
1968 { PINMUX_CFG_REG("PYCR", 0xffec0030, 16, 2) {
1969 PTY7_FN, PTY7_OUT, PTY7_IN, PTY7_IN_PU,
1970 PTY6_FN, PTY6_OUT, PTY6_IN, PTY6_IN_PU,
1971 PTY5_FN, PTY5_OUT, PTY5_IN, PTY5_IN_PU,
1972 PTY4_FN, PTY4_OUT, PTY4_IN, PTY4_IN_PU,
1973 PTY3_FN, PTY3_OUT, PTY3_IN, PTY3_IN_PU,
1974 PTY2_FN, PTY2_OUT, PTY2_IN, PTY2_IN_PU,
1975 PTY1_FN, PTY1_OUT, PTY1_IN, PTY1_IN_PU,
1976 PTY0_FN, PTY0_OUT, PTY0_IN, PTY0_IN_PU }
1977 },
1978 { PINMUX_CFG_REG("PZCR", 0xffec0032, 16, 2) {
1979 PTZ7_FN, PTZ7_OUT, PTZ7_IN, 0,
1980 PTZ6_FN, PTZ6_OUT, PTZ6_IN, 0,
1981 PTZ5_FN, PTZ5_OUT, PTZ5_IN, 0,
1982 PTZ4_FN, PTZ4_OUT, PTZ4_IN, 0,
1983 PTZ3_FN, PTZ3_OUT, PTZ3_IN, 0,
1984 PTZ2_FN, PTZ2_OUT, PTZ2_IN, 0,
1985 PTZ1_FN, PTZ1_OUT, PTZ1_IN, 0,
1986 PTZ0_FN, PTZ0_OUT, PTZ0_IN, 0 }
1987 },
1988
1989 { PINMUX_CFG_REG("PSEL0", 0xffec0070, 16, 1) {
1990 PS0_15_FN1, PS0_15_FN2,
1991 PS0_14_FN1, PS0_14_FN2,
1992 PS0_13_FN1, PS0_13_FN2,
1993 PS0_12_FN1, PS0_12_FN2,
1994 PS0_11_FN1, PS0_11_FN2,
1995 PS0_10_FN1, PS0_10_FN2,
1996 PS0_9_FN1, PS0_9_FN2,
1997 PS0_8_FN1, PS0_8_FN2,
1998 PS0_7_FN1, PS0_7_FN2,
1999 PS0_6_FN1, PS0_6_FN2,
2000 PS0_5_FN1, PS0_5_FN2,
2001 PS0_4_FN1, PS0_4_FN2,
2002 PS0_3_FN1, PS0_3_FN2,
2003 PS0_2_FN1, PS0_2_FN2,
2004 0, 0,
2005 0, 0, }
2006 },
2007 { PINMUX_CFG_REG("PSEL1", 0xffec0072, 16, 1) {
2008 0, 0,
2009 0, 0,
2010 0, 0,
2011 0, 0,
2012 0, 0,
2013 PS1_10_FN1, PS1_10_FN2,
2014 PS1_9_FN1, PS1_9_FN2,
2015 PS1_8_FN1, PS1_8_FN2,
2016 0, 0,
2017 0, 0,
2018 0, 0,
2019 0, 0,
2020 0, 0,
2021 PS1_2_FN1, PS1_2_FN2,
2022 0, 0,
2023 0, 0, }
2024 },
2025 { PINMUX_CFG_REG("PSEL2", 0xffec0074, 16, 1) {
2026 0, 0,
2027 0, 0,
2028 PS2_13_FN1, PS2_13_FN2,
2029 PS2_12_FN1, PS2_12_FN2,
2030 0, 0,
2031 0, 0,
2032 0, 0,
2033 0, 0,
2034 PS2_7_FN1, PS2_7_FN2,
2035 PS2_6_FN1, PS2_6_FN2,
2036 PS2_5_FN1, PS2_5_FN2,
2037 PS2_4_FN1, PS2_4_FN2,
2038 0, 0,
2039 PS2_2_FN1, PS2_2_FN2,
2040 0, 0,
2041 0, 0, }
2042 },
2043 { PINMUX_CFG_REG("PSEL3", 0xffec0076, 16, 1) {
2044 PS3_15_FN1, PS3_15_FN2,
2045 PS3_14_FN1, PS3_14_FN2,
2046 PS3_13_FN1, PS3_13_FN2,
2047 PS3_12_FN1, PS3_12_FN2,
2048 PS3_11_FN1, PS3_11_FN2,
2049 PS3_10_FN1, PS3_10_FN2,
2050 PS3_9_FN1, PS3_9_FN2,
2051 PS3_8_FN1, PS3_8_FN2,
2052 PS3_7_FN1, PS3_7_FN2,
2053 0, 0,
2054 0, 0,
2055 0, 0,
2056 0, 0,
2057 PS3_2_FN1, PS3_2_FN2,
2058 PS3_1_FN1, PS3_1_FN2,
2059 0, 0, }
2060 },
2061
2062 { PINMUX_CFG_REG("PSEL4", 0xffec0078, 16, 1) {
2063 0, 0,
2064 PS4_14_FN1, PS4_14_FN2,
2065 PS4_13_FN1, PS4_13_FN2,
2066 PS4_12_FN1, PS4_12_FN2,
2067 0, 0,
2068 PS4_10_FN1, PS4_10_FN2,
2069 PS4_9_FN1, PS4_9_FN2,
2070 PS4_8_FN1, PS4_8_FN2,
2071 0, 0,
2072 0, 0,
2073 0, 0,
2074 PS4_4_FN1, PS4_4_FN2,
2075 PS4_3_FN1, PS4_3_FN2,
2076 PS4_2_FN1, PS4_2_FN2,
2077 PS4_1_FN1, PS4_1_FN2,
2078 PS4_0_FN1, PS4_0_FN2, }
2079 },
2080 { PINMUX_CFG_REG("PSEL5", 0xffec007a, 16, 1) {
2081 0, 0,
2082 0, 0,
2083 0, 0,
2084 0, 0,
2085 PS5_11_FN1, PS5_11_FN2,
2086 PS5_10_FN1, PS5_10_FN2,
2087 PS5_9_FN1, PS5_9_FN2,
2088 PS5_8_FN1, PS5_8_FN2,
2089 PS5_7_FN1, PS5_7_FN2,
2090 PS5_6_FN1, PS5_6_FN2,
2091 PS5_5_FN1, PS5_5_FN2,
2092 PS5_4_FN1, PS5_4_FN2,
2093 PS5_3_FN1, PS5_3_FN2,
2094 PS5_2_FN1, PS5_2_FN2,
2095 0, 0,
2096 0, 0, }
2097 },
2098 { PINMUX_CFG_REG("PSEL6", 0xffec007c, 16, 1) {
2099 PS6_15_FN1, PS6_15_FN2,
2100 PS6_14_FN1, PS6_14_FN2,
2101 PS6_13_FN1, PS6_13_FN2,
2102 PS6_12_FN1, PS6_12_FN2,
2103 PS6_11_FN1, PS6_11_FN2,
2104 PS6_10_FN1, PS6_10_FN2,
2105 PS6_9_FN1, PS6_9_FN2,
2106 PS6_8_FN1, PS6_8_FN2,
2107 PS6_7_FN1, PS6_7_FN2,
2108 PS6_6_FN1, PS6_6_FN2,
2109 PS6_5_FN1, PS6_5_FN2,
2110 PS6_4_FN1, PS6_4_FN2,
2111 PS6_3_FN1, PS6_3_FN2,
2112 PS6_2_FN1, PS6_2_FN2,
2113 PS6_1_FN1, PS6_1_FN2,
2114 PS6_0_FN1, PS6_0_FN2, }
2115 },
2116 { PINMUX_CFG_REG("PSEL7", 0xffec0082, 16, 1) {
2117 PS7_15_FN1, PS7_15_FN2,
2118 PS7_14_FN1, PS7_14_FN2,
2119 PS7_13_FN1, PS7_13_FN2,
2120 PS7_12_FN1, PS7_12_FN2,
2121 PS7_11_FN1, PS7_11_FN2,
2122 PS7_10_FN1, PS7_10_FN2,
2123 PS7_9_FN1, PS7_9_FN2,
2124 PS7_8_FN1, PS7_8_FN2,
2125 PS7_7_FN1, PS7_7_FN2,
2126 PS7_6_FN1, PS7_6_FN2,
2127 PS7_5_FN1, PS7_5_FN2,
2128 0, 0,
2129 0, 0,
2130 0, 0,
2131 0, 0,
2132 0, 0, }
2133 },
2134 { PINMUX_CFG_REG("PSEL8", 0xffec0084, 16, 1) {
2135 PS8_15_FN1, PS8_15_FN2,
2136 PS8_14_FN1, PS8_14_FN2,
2137 PS8_13_FN1, PS8_13_FN2,
2138 PS8_12_FN1, PS8_12_FN2,
2139 PS8_11_FN1, PS8_11_FN2,
2140 PS8_10_FN1, PS8_10_FN2,
2141 PS8_9_FN1, PS8_9_FN2,
2142 PS8_8_FN1, PS8_8_FN2,
2143 0, 0,
2144 0, 0,
2145 0, 0,
2146 0, 0,
2147 0, 0,
2148 0, 0,
2149 0, 0,
2150 0, 0, }
2151 },
2152 {}
2153};
2154
2155static struct pinmux_data_reg pinmux_data_regs[] = {
2156 { PINMUX_DATA_REG("PADR", 0xffec0034, 8) {
2157 PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
2158 PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
2159 },
2160 { PINMUX_DATA_REG("PBDR", 0xffec0036, 8) {
2161 PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
2162 PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
2163 },
2164 { PINMUX_DATA_REG("PCDR", 0xffec0038, 8) {
2165 PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
2166 PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA }
2167 },
2168 { PINMUX_DATA_REG("PDDR", 0xffec003a, 8) {
2169 PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
2170 PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
2171 },
2172 { PINMUX_DATA_REG("PEDR", 0xffec003c, 8) {
2173 PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
2174 PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA }
2175 },
2176 { PINMUX_DATA_REG("PFDR", 0xffec003e, 8) {
2177 PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
2178 PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
2179 },
2180 { PINMUX_DATA_REG("PGDR", 0xffec0040, 8) {
2181 PTG7_DATA, PTG6_DATA, PTG5_DATA, PTG4_DATA,
2182 PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
2183 },
2184 { PINMUX_DATA_REG("PHDR", 0xffec0042, 8) {
2185 PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
2186 PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
2187 },
2188 { PINMUX_DATA_REG("PIDR", 0xffec0044, 8) {
2189 PTI7_DATA, PTI6_DATA, PTI5_DATA, PTI4_DATA,
2190 PTI3_DATA, PTI2_DATA, PTI1_DATA, PTI0_DATA }
2191 },
2192 { PINMUX_DATA_REG("PJDR", 0xffec0046, 8) {
2193 0, PTJ6_DATA, PTJ5_DATA, PTJ4_DATA,
2194 PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA }
2195 },
2196 { PINMUX_DATA_REG("PKDR", 0xffec0048, 8) {
2197 PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
2198 PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
2199 },
2200 { PINMUX_DATA_REG("PLDR", 0xffec004a, 8) {
2201 0, PTL6_DATA, PTL5_DATA, PTL4_DATA,
2202 PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA }
2203 },
2204 { PINMUX_DATA_REG("PMDR", 0xffec004c, 8) {
2205 PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
2206 PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
2207 },
2208 { PINMUX_DATA_REG("PNDR", 0xffec004e, 8) {
2209 0, PTN6_DATA, PTN5_DATA, PTN4_DATA,
2210 PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA }
2211 },
2212 { PINMUX_DATA_REG("PODR", 0xffec0050, 8) {
2213 PTO7_DATA, PTO6_DATA, PTO5_DATA, PTO4_DATA,
2214 PTO3_DATA, PTO2_DATA, PTO1_DATA, PTO0_DATA }
2215 },
2216 { PINMUX_DATA_REG("PPDR", 0xffec0052, 8) {
2217 PTP7_DATA, PTP6_DATA, PTP5_DATA, PTP4_DATA,
2218 PTP3_DATA, PTP2_DATA, PTP1_DATA, PTP0_DATA }
2219 },
2220 { PINMUX_DATA_REG("PQDR", 0xffec0054, 8) {
2221 0, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
2222 PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA }
2223 },
2224 { PINMUX_DATA_REG("PRDR", 0xffec0056, 8) {
2225 PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
2226 PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
2227 },
2228 { PINMUX_DATA_REG("PSDR", 0xffec0058, 8) {
2229 PTS7_DATA, PTS6_DATA, PTS5_DATA, PTS4_DATA,
2230 PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
2231 },
2232 { PINMUX_DATA_REG("PTDR", 0xffec005a, 8) {
2233 PTT7_DATA, PTT6_DATA, PTT5_DATA, PTT4_DATA,
2234 PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
2235 },
2236 { PINMUX_DATA_REG("PUDR", 0xffec005c, 8) {
2237 PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA,
2238 PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
2239 },
2240 { PINMUX_DATA_REG("PVDR", 0xffec005e, 8) {
2241 PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
2242 PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
2243 },
2244 { PINMUX_DATA_REG("PWDR", 0xffec0060, 8) {
2245 PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
2246 PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA }
2247 },
2248 { PINMUX_DATA_REG("PXDR", 0xffec0062, 8) {
2249 PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
2250 PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA }
2251 },
2252 { PINMUX_DATA_REG("PYDR", 0xffec0064, 8) {
2253 PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
2254 PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA }
2255 },
2256 { PINMUX_DATA_REG("PZDR", 0xffec0066, 8) {
2257 PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
2258 PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA }
2259 },
2260 { },
2261};
2262
2263struct sh_pfc_soc_info sh7757_pinmux_info = {
2264 .name = "sh7757_pfc",
2265 .reserved_id = PINMUX_RESERVED,
2266 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
2267 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
2268 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
2269 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
2270 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
2271 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
2272
2273 .first_gpio = GPIO_PTA0,
2274 .last_gpio = GPIO_FN_ON_DQ0,
2275
2276 .gpios = pinmux_gpios,
2277 .cfg_regs = pinmux_config_regs,
2278 .data_regs = pinmux_data_regs,
2279
2280 .gpio_data = pinmux_data,
2281 .gpio_data_size = ARRAY_SIZE(pinmux_data),
2282};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7785.c b/drivers/pinctrl/sh-pfc/pfc-sh7785.c
new file mode 100644
index 000000000000..3b1825d925bb
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7785.c
@@ -0,0 +1,1304 @@
1/*
2 * SH7785 Pinmux
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <cpu/sh7785.h>
14
15#include "sh_pfc.h"
16
17enum {
18 PINMUX_RESERVED = 0,
19
20 PINMUX_DATA_BEGIN,
21 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
22 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
23 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
24 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
25 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
26 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
27 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
28 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
29 PE5_DATA, PE4_DATA, PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
30 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
31 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
32 PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
33 PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
34 PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
35 PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
36 PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
37 PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA,
38 PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,
39 PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA,
40 PL7_DATA, PL6_DATA, PL5_DATA, PL4_DATA,
41 PL3_DATA, PL2_DATA, PL1_DATA, PL0_DATA,
42 PM1_DATA, PM0_DATA,
43 PN7_DATA, PN6_DATA, PN5_DATA, PN4_DATA,
44 PN3_DATA, PN2_DATA, PN1_DATA, PN0_DATA,
45 PP5_DATA, PP4_DATA, PP3_DATA, PP2_DATA, PP1_DATA, PP0_DATA,
46 PQ4_DATA, PQ3_DATA, PQ2_DATA, PQ1_DATA, PQ0_DATA,
47 PR3_DATA, PR2_DATA, PR1_DATA, PR0_DATA,
48 PINMUX_DATA_END,
49
50 PINMUX_INPUT_BEGIN,
51 PA7_IN, PA6_IN, PA5_IN, PA4_IN,
52 PA3_IN, PA2_IN, PA1_IN, PA0_IN,
53 PB7_IN, PB6_IN, PB5_IN, PB4_IN,
54 PB3_IN, PB2_IN, PB1_IN, PB0_IN,
55 PC7_IN, PC6_IN, PC5_IN, PC4_IN,
56 PC3_IN, PC2_IN, PC1_IN, PC0_IN,
57 PD7_IN, PD6_IN, PD5_IN, PD4_IN,
58 PD3_IN, PD2_IN, PD1_IN, PD0_IN,
59 PE5_IN, PE4_IN, PE3_IN, PE2_IN, PE1_IN, PE0_IN,
60 PF7_IN, PF6_IN, PF5_IN, PF4_IN,
61 PF3_IN, PF2_IN, PF1_IN, PF0_IN,
62 PG7_IN, PG6_IN, PG5_IN, PG4_IN,
63 PG3_IN, PG2_IN, PG1_IN, PG0_IN,
64 PH7_IN, PH6_IN, PH5_IN, PH4_IN,
65 PH3_IN, PH2_IN, PH1_IN, PH0_IN,
66 PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN,
67 PJ3_IN, PJ2_IN, PJ1_IN, PJ0_IN,
68 PK7_IN, PK6_IN, PK5_IN, PK4_IN,
69 PK3_IN, PK2_IN, PK1_IN, PK0_IN,
70 PL7_IN, PL6_IN, PL5_IN, PL4_IN,
71 PL3_IN, PL2_IN, PL1_IN, PL0_IN,
72 PM1_IN, PM0_IN,
73 PN7_IN, PN6_IN, PN5_IN, PN4_IN,
74 PN3_IN, PN2_IN, PN1_IN, PN0_IN,
75 PP5_IN, PP4_IN, PP3_IN, PP2_IN, PP1_IN, PP0_IN,
76 PQ4_IN, PQ3_IN, PQ2_IN, PQ1_IN, PQ0_IN,
77 PR3_IN, PR2_IN, PR1_IN, PR0_IN,
78 PINMUX_INPUT_END,
79
80 PINMUX_INPUT_PULLUP_BEGIN,
81 PA7_IN_PU, PA6_IN_PU, PA5_IN_PU, PA4_IN_PU,
82 PA3_IN_PU, PA2_IN_PU, PA1_IN_PU, PA0_IN_PU,
83 PB7_IN_PU, PB6_IN_PU, PB5_IN_PU, PB4_IN_PU,
84 PB3_IN_PU, PB2_IN_PU, PB1_IN_PU, PB0_IN_PU,
85 PC7_IN_PU, PC6_IN_PU, PC5_IN_PU, PC4_IN_PU,
86 PC3_IN_PU, PC2_IN_PU, PC1_IN_PU, PC0_IN_PU,
87 PD7_IN_PU, PD6_IN_PU, PD5_IN_PU, PD4_IN_PU,
88 PD3_IN_PU, PD2_IN_PU, PD1_IN_PU, PD0_IN_PU,
89 PE5_IN_PU, PE4_IN_PU, PE3_IN_PU, PE2_IN_PU, PE1_IN_PU, PE0_IN_PU,
90 PF7_IN_PU, PF6_IN_PU, PF5_IN_PU, PF4_IN_PU,
91 PF3_IN_PU, PF2_IN_PU, PF1_IN_PU, PF0_IN_PU,
92 PG7_IN_PU, PG6_IN_PU, PG5_IN_PU, PG4_IN_PU,
93 PG3_IN_PU, PG2_IN_PU, PG1_IN_PU, PG0_IN_PU,
94 PH7_IN_PU, PH6_IN_PU, PH5_IN_PU, PH4_IN_PU,
95 PH3_IN_PU, PH2_IN_PU, PH1_IN_PU, PH0_IN_PU,
96 PJ7_IN_PU, PJ6_IN_PU, PJ5_IN_PU, PJ4_IN_PU,
97 PJ3_IN_PU, PJ2_IN_PU, PJ1_IN_PU, PJ0_IN_PU,
98 PK7_IN_PU, PK6_IN_PU, PK5_IN_PU, PK4_IN_PU,
99 PK3_IN_PU, PK2_IN_PU, PK1_IN_PU, PK0_IN_PU,
100 PL7_IN_PU, PL6_IN_PU, PL5_IN_PU, PL4_IN_PU,
101 PL3_IN_PU, PL2_IN_PU, PL1_IN_PU, PL0_IN_PU,
102 PM1_IN_PU, PM0_IN_PU,
103 PN7_IN_PU, PN6_IN_PU, PN5_IN_PU, PN4_IN_PU,
104 PN3_IN_PU, PN2_IN_PU, PN1_IN_PU, PN0_IN_PU,
105 PP5_IN_PU, PP4_IN_PU, PP3_IN_PU, PP2_IN_PU, PP1_IN_PU, PP0_IN_PU,
106 PQ4_IN_PU, PQ3_IN_PU, PQ2_IN_PU, PQ1_IN_PU, PQ0_IN_PU,
107 PR3_IN_PU, PR2_IN_PU, PR1_IN_PU, PR0_IN_PU,
108 PINMUX_INPUT_PULLUP_END,
109
110 PINMUX_OUTPUT_BEGIN,
111 PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
112 PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
113 PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
114 PB3_OUT, PB2_OUT, PB1_OUT, PB0_OUT,
115 PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
116 PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
117 PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
118 PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
119 PE5_OUT, PE4_OUT, PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
120 PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
121 PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
122 PG7_OUT, PG6_OUT, PG5_OUT, PG4_OUT,
123 PG3_OUT, PG2_OUT, PG1_OUT, PG0_OUT,
124 PH7_OUT, PH6_OUT, PH5_OUT, PH4_OUT,
125 PH3_OUT, PH2_OUT, PH1_OUT, PH0_OUT,
126 PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT,
127 PJ3_OUT, PJ2_OUT, PJ1_OUT, PJ0_OUT,
128 PK7_OUT, PK6_OUT, PK5_OUT, PK4_OUT,
129 PK3_OUT, PK2_OUT, PK1_OUT, PK0_OUT,
130 PL7_OUT, PL6_OUT, PL5_OUT, PL4_OUT,
131 PL3_OUT, PL2_OUT, PL1_OUT, PL0_OUT,
132 PM1_OUT, PM0_OUT,
133 PN7_OUT, PN6_OUT, PN5_OUT, PN4_OUT,
134 PN3_OUT, PN2_OUT, PN1_OUT, PN0_OUT,
135 PP5_OUT, PP4_OUT, PP3_OUT, PP2_OUT, PP1_OUT, PP0_OUT,
136 PQ4_OUT, PQ3_OUT, PQ2_OUT, PQ1_OUT, PQ0_OUT,
137 PR3_OUT, PR2_OUT, PR1_OUT, PR0_OUT,
138 PINMUX_OUTPUT_END,
139
140 PINMUX_FUNCTION_BEGIN,
141 PA7_FN, PA6_FN, PA5_FN, PA4_FN,
142 PA3_FN, PA2_FN, PA1_FN, PA0_FN,
143 PB7_FN, PB6_FN, PB5_FN, PB4_FN,
144 PB3_FN, PB2_FN, PB1_FN, PB0_FN,
145 PC7_FN, PC6_FN, PC5_FN, PC4_FN,
146 PC3_FN, PC2_FN, PC1_FN, PC0_FN,
147 PD7_FN, PD6_FN, PD5_FN, PD4_FN,
148 PD3_FN, PD2_FN, PD1_FN, PD0_FN,
149 PE5_FN, PE4_FN, PE3_FN, PE2_FN, PE1_FN, PE0_FN,
150 PF7_FN, PF6_FN, PF5_FN, PF4_FN,
151 PF3_FN, PF2_FN, PF1_FN, PF0_FN,
152 PG7_FN, PG6_FN, PG5_FN, PG4_FN,
153 PG3_FN, PG2_FN, PG1_FN, PG0_FN,
154 PH7_FN, PH6_FN, PH5_FN, PH4_FN,
155 PH3_FN, PH2_FN, PH1_FN, PH0_FN,
156 PJ7_FN, PJ6_FN, PJ5_FN, PJ4_FN,
157 PJ3_FN, PJ2_FN, PJ1_FN, PJ0_FN,
158 PK7_FN, PK6_FN, PK5_FN, PK4_FN,
159 PK3_FN, PK2_FN, PK1_FN, PK0_FN,
160 PL7_FN, PL6_FN, PL5_FN, PL4_FN,
161 PL3_FN, PL2_FN, PL1_FN, PL0_FN,
162 PM1_FN, PM0_FN,
163 PN7_FN, PN6_FN, PN5_FN, PN4_FN,
164 PN3_FN, PN2_FN, PN1_FN, PN0_FN,
165 PP5_FN, PP4_FN, PP3_FN, PP2_FN, PP1_FN, PP0_FN,
166 PQ4_FN, PQ3_FN, PQ2_FN, PQ1_FN, PQ0_FN,
167 PR3_FN, PR2_FN, PR1_FN, PR0_FN,
168 P1MSEL15_0, P1MSEL15_1,
169 P1MSEL14_0, P1MSEL14_1,
170 P1MSEL13_0, P1MSEL13_1,
171 P1MSEL12_0, P1MSEL12_1,
172 P1MSEL11_0, P1MSEL11_1,
173 P1MSEL10_0, P1MSEL10_1,
174 P1MSEL9_0, P1MSEL9_1,
175 P1MSEL8_0, P1MSEL8_1,
176 P1MSEL7_0, P1MSEL7_1,
177 P1MSEL6_0, P1MSEL6_1,
178 P1MSEL5_0,
179 P1MSEL4_0, P1MSEL4_1,
180 P1MSEL3_0, P1MSEL3_1,
181 P1MSEL2_0, P1MSEL2_1,
182 P1MSEL1_0, P1MSEL1_1,
183 P1MSEL0_0, P1MSEL0_1,
184 P2MSEL2_0, P2MSEL2_1,
185 P2MSEL1_0, P2MSEL1_1,
186 P2MSEL0_0, P2MSEL0_1,
187 PINMUX_FUNCTION_END,
188
189 PINMUX_MARK_BEGIN,
190 D63_AD31_MARK,
191 D62_AD30_MARK,
192 D61_AD29_MARK,
193 D60_AD28_MARK,
194 D59_AD27_MARK,
195 D58_AD26_MARK,
196 D57_AD25_MARK,
197 D56_AD24_MARK,
198 D55_AD23_MARK,
199 D54_AD22_MARK,
200 D53_AD21_MARK,
201 D52_AD20_MARK,
202 D51_AD19_MARK,
203 D50_AD18_MARK,
204 D49_AD17_DB5_MARK,
205 D48_AD16_DB4_MARK,
206 D47_AD15_DB3_MARK,
207 D46_AD14_DB2_MARK,
208 D45_AD13_DB1_MARK,
209 D44_AD12_DB0_MARK,
210 D43_AD11_DG5_MARK,
211 D42_AD10_DG4_MARK,
212 D41_AD9_DG3_MARK,
213 D40_AD8_DG2_MARK,
214 D39_AD7_DG1_MARK,
215 D38_AD6_DG0_MARK,
216 D37_AD5_DR5_MARK,
217 D36_AD4_DR4_MARK,
218 D35_AD3_DR3_MARK,
219 D34_AD2_DR2_MARK,
220 D33_AD1_DR1_MARK,
221 D32_AD0_DR0_MARK,
222 REQ1_MARK,
223 REQ2_MARK,
224 REQ3_MARK,
225 GNT1_MARK,
226 GNT2_MARK,
227 GNT3_MARK,
228 MMCCLK_MARK,
229 D31_MARK,
230 D30_MARK,
231 D29_MARK,
232 D28_MARK,
233 D27_MARK,
234 D26_MARK,
235 D25_MARK,
236 D24_MARK,
237 D23_MARK,
238 D22_MARK,
239 D21_MARK,
240 D20_MARK,
241 D19_MARK,
242 D18_MARK,
243 D17_MARK,
244 D16_MARK,
245 SCIF1_SCK_MARK,
246 SCIF1_RXD_MARK,
247 SCIF1_TXD_MARK,
248 SCIF0_CTS_MARK,
249 INTD_MARK,
250 FCE_MARK,
251 SCIF0_RTS_MARK,
252 HSPI_CS_MARK,
253 FSE_MARK,
254 SCIF0_SCK_MARK,
255 HSPI_CLK_MARK,
256 FRE_MARK,
257 SCIF0_RXD_MARK,
258 HSPI_RX_MARK,
259 FRB_MARK,
260 SCIF0_TXD_MARK,
261 HSPI_TX_MARK,
262 FWE_MARK,
263 SCIF5_TXD_MARK,
264 HAC1_SYNC_MARK,
265 SSI1_WS_MARK,
266 SIOF_TXD_PJ_MARK,
267 HAC0_SDOUT_MARK,
268 SSI0_SDATA_MARK,
269 SIOF_RXD_PJ_MARK,
270 HAC0_SDIN_MARK,
271 SSI0_SCK_MARK,
272 SIOF_SYNC_PJ_MARK,
273 HAC0_SYNC_MARK,
274 SSI0_WS_MARK,
275 SIOF_MCLK_PJ_MARK,
276 HAC_RES_MARK,
277 SIOF_SCK_PJ_MARK,
278 HAC0_BITCLK_MARK,
279 SSI0_CLK_MARK,
280 HAC1_BITCLK_MARK,
281 SSI1_CLK_MARK,
282 TCLK_MARK,
283 IOIS16_MARK,
284 STATUS0_MARK,
285 DRAK0_PK3_MARK,
286 STATUS1_MARK,
287 DRAK1_PK2_MARK,
288 DACK2_MARK,
289 SCIF2_TXD_MARK,
290 MMCCMD_MARK,
291 SIOF_TXD_PK_MARK,
292 DACK3_MARK,
293 SCIF2_SCK_MARK,
294 MMCDAT_MARK,
295 SIOF_SCK_PK_MARK,
296 DREQ0_MARK,
297 DREQ1_MARK,
298 DRAK0_PK1_MARK,
299 DRAK1_PK0_MARK,
300 DREQ2_MARK,
301 INTB_MARK,
302 DREQ3_MARK,
303 INTC_MARK,
304 DRAK2_MARK,
305 CE2A_MARK,
306 IRL4_MARK,
307 FD4_MARK,
308 IRL5_MARK,
309 FD5_MARK,
310 IRL6_MARK,
311 FD6_MARK,
312 IRL7_MARK,
313 FD7_MARK,
314 DRAK3_MARK,
315 CE2B_MARK,
316 BREQ_BSACK_MARK,
317 BACK_BSREQ_MARK,
318 SCIF5_RXD_MARK,
319 HAC1_SDIN_MARK,
320 SSI1_SCK_MARK,
321 SCIF5_SCK_MARK,
322 HAC1_SDOUT_MARK,
323 SSI1_SDATA_MARK,
324 SCIF3_TXD_MARK,
325 FCLE_MARK,
326 SCIF3_RXD_MARK,
327 FALE_MARK,
328 SCIF3_SCK_MARK,
329 FD0_MARK,
330 SCIF4_TXD_MARK,
331 FD1_MARK,
332 SCIF4_RXD_MARK,
333 FD2_MARK,
334 SCIF4_SCK_MARK,
335 FD3_MARK,
336 DEVSEL_DCLKOUT_MARK,
337 STOP_CDE_MARK,
338 LOCK_ODDF_MARK,
339 TRDY_DISPL_MARK,
340 IRDY_HSYNC_MARK,
341 PCIFRAME_VSYNC_MARK,
342 INTA_MARK,
343 GNT0_GNTIN_MARK,
344 REQ0_REQOUT_MARK,
345 PERR_MARK,
346 SERR_MARK,
347 WE7_CBE3_MARK,
348 WE6_CBE2_MARK,
349 WE5_CBE1_MARK,
350 WE4_CBE0_MARK,
351 SCIF2_RXD_MARK,
352 SIOF_RXD_MARK,
353 MRESETOUT_MARK,
354 IRQOUT_MARK,
355 PINMUX_MARK_END,
356};
357
358static pinmux_enum_t pinmux_data[] = {
359
360 /* PA GPIO */
361 PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU),
362 PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT, PA6_IN_PU),
363 PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT, PA5_IN_PU),
364 PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT, PA4_IN_PU),
365 PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT, PA3_IN_PU),
366 PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT, PA2_IN_PU),
367 PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT, PA1_IN_PU),
368 PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT, PA0_IN_PU),
369
370 /* PB GPIO */
371 PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT, PB7_IN_PU),
372 PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT, PB6_IN_PU),
373 PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT, PB5_IN_PU),
374 PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT, PB4_IN_PU),
375 PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT, PB3_IN_PU),
376 PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT, PB2_IN_PU),
377 PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT, PB1_IN_PU),
378 PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT, PB0_IN_PU),
379
380 /* PC GPIO */
381 PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT, PC7_IN_PU),
382 PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT, PC6_IN_PU),
383 PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT, PC5_IN_PU),
384 PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT, PC4_IN_PU),
385 PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT, PC3_IN_PU),
386 PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT, PC2_IN_PU),
387 PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT, PC1_IN_PU),
388 PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT, PC0_IN_PU),
389
390 /* PD GPIO */
391 PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT, PD7_IN_PU),
392 PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT, PD6_IN_PU),
393 PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT, PD5_IN_PU),
394 PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT, PD4_IN_PU),
395 PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT, PD3_IN_PU),
396 PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT, PD2_IN_PU),
397 PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT, PD1_IN_PU),
398 PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT, PD0_IN_PU),
399
400 /* PE GPIO */
401 PINMUX_DATA(PE5_DATA, PE5_IN, PE5_OUT, PE5_IN_PU),
402 PINMUX_DATA(PE4_DATA, PE4_IN, PE4_OUT, PE4_IN_PU),
403 PINMUX_DATA(PE3_DATA, PE3_IN, PE3_OUT, PE3_IN_PU),
404 PINMUX_DATA(PE2_DATA, PE2_IN, PE2_OUT, PE2_IN_PU),
405 PINMUX_DATA(PE1_DATA, PE1_IN, PE1_OUT, PE1_IN_PU),
406 PINMUX_DATA(PE0_DATA, PE0_IN, PE0_OUT, PE0_IN_PU),
407
408 /* PF GPIO */
409 PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT, PF7_IN_PU),
410 PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT, PF6_IN_PU),
411 PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT, PF5_IN_PU),
412 PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT, PF4_IN_PU),
413 PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT, PF3_IN_PU),
414 PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT, PF2_IN_PU),
415 PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT, PF1_IN_PU),
416 PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT, PF0_IN_PU),
417
418 /* PG GPIO */
419 PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT, PG7_IN_PU),
420 PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT, PG6_IN_PU),
421 PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT, PG5_IN_PU),
422 PINMUX_DATA(PG4_DATA, PG4_IN, PG4_OUT, PG4_IN_PU),
423 PINMUX_DATA(PG3_DATA, PG3_IN, PG3_OUT, PG3_IN_PU),
424 PINMUX_DATA(PG2_DATA, PG2_IN, PG2_OUT, PG2_IN_PU),
425 PINMUX_DATA(PG1_DATA, PG1_IN, PG1_OUT, PG1_IN_PU),
426 PINMUX_DATA(PG0_DATA, PG0_IN, PG0_OUT, PG0_IN_PU),
427
428 /* PH GPIO */
429 PINMUX_DATA(PH7_DATA, PH7_IN, PH7_OUT, PH7_IN_PU),
430 PINMUX_DATA(PH6_DATA, PH6_IN, PH6_OUT, PH6_IN_PU),
431 PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT, PH5_IN_PU),
432 PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT, PH4_IN_PU),
433 PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT, PH3_IN_PU),
434 PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT, PH2_IN_PU),
435 PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT, PH1_IN_PU),
436 PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT, PH0_IN_PU),
437
438 /* PJ GPIO */
439 PINMUX_DATA(PJ7_DATA, PJ7_IN, PJ7_OUT, PJ7_IN_PU),
440 PINMUX_DATA(PJ6_DATA, PJ6_IN, PJ6_OUT, PJ6_IN_PU),
441 PINMUX_DATA(PJ5_DATA, PJ5_IN, PJ5_OUT, PJ5_IN_PU),
442 PINMUX_DATA(PJ4_DATA, PJ4_IN, PJ4_OUT, PJ4_IN_PU),
443 PINMUX_DATA(PJ3_DATA, PJ3_IN, PJ3_OUT, PJ3_IN_PU),
444 PINMUX_DATA(PJ2_DATA, PJ2_IN, PJ2_OUT, PJ2_IN_PU),
445 PINMUX_DATA(PJ1_DATA, PJ1_IN, PJ1_OUT, PJ1_IN_PU),
446 PINMUX_DATA(PJ0_DATA, PJ0_IN, PJ0_OUT, PJ0_IN_PU),
447
448 /* PK GPIO */
449 PINMUX_DATA(PK7_DATA, PK7_IN, PK7_OUT, PK7_IN_PU),
450 PINMUX_DATA(PK6_DATA, PK6_IN, PK6_OUT, PK6_IN_PU),
451 PINMUX_DATA(PK5_DATA, PK5_IN, PK5_OUT, PK5_IN_PU),
452 PINMUX_DATA(PK4_DATA, PK4_IN, PK4_OUT, PK4_IN_PU),
453 PINMUX_DATA(PK3_DATA, PK3_IN, PK3_OUT, PK3_IN_PU),
454 PINMUX_DATA(PK2_DATA, PK2_IN, PK2_OUT, PK2_IN_PU),
455 PINMUX_DATA(PK1_DATA, PK1_IN, PK1_OUT, PK1_IN_PU),
456 PINMUX_DATA(PK0_DATA, PK0_IN, PK0_OUT, PK0_IN_PU),
457
458 /* PL GPIO */
459 PINMUX_DATA(PL7_DATA, PL7_IN, PL7_OUT, PL7_IN_PU),
460 PINMUX_DATA(PL6_DATA, PL6_IN, PL6_OUT, PL6_IN_PU),
461 PINMUX_DATA(PL5_DATA, PL5_IN, PL5_OUT, PL5_IN_PU),
462 PINMUX_DATA(PL4_DATA, PL4_IN, PL4_OUT, PL4_IN_PU),
463 PINMUX_DATA(PL3_DATA, PL3_IN, PL3_OUT, PL3_IN_PU),
464 PINMUX_DATA(PL2_DATA, PL2_IN, PL2_OUT, PL2_IN_PU),
465 PINMUX_DATA(PL1_DATA, PL1_IN, PL1_OUT, PL1_IN_PU),
466 PINMUX_DATA(PL0_DATA, PL0_IN, PL0_OUT, PL0_IN_PU),
467
468 /* PM GPIO */
469 PINMUX_DATA(PM1_DATA, PM1_IN, PM1_OUT, PM1_IN_PU),
470 PINMUX_DATA(PM0_DATA, PM0_IN, PM0_OUT, PM0_IN_PU),
471
472 /* PN GPIO */
473 PINMUX_DATA(PN7_DATA, PN7_IN, PN7_OUT, PN7_IN_PU),
474 PINMUX_DATA(PN6_DATA, PN6_IN, PN6_OUT, PN6_IN_PU),
475 PINMUX_DATA(PN5_DATA, PN5_IN, PN5_OUT, PN5_IN_PU),
476 PINMUX_DATA(PN4_DATA, PN4_IN, PN4_OUT, PN4_IN_PU),
477 PINMUX_DATA(PN3_DATA, PN3_IN, PN3_OUT, PN3_IN_PU),
478 PINMUX_DATA(PN2_DATA, PN2_IN, PN2_OUT, PN2_IN_PU),
479 PINMUX_DATA(PN1_DATA, PN1_IN, PN1_OUT, PN1_IN_PU),
480 PINMUX_DATA(PN0_DATA, PN0_IN, PN0_OUT, PN0_IN_PU),
481
482 /* PP GPIO */
483 PINMUX_DATA(PP5_DATA, PP5_IN, PP5_OUT, PP5_IN_PU),
484 PINMUX_DATA(PP4_DATA, PP4_IN, PP4_OUT, PP4_IN_PU),
485 PINMUX_DATA(PP3_DATA, PP3_IN, PP3_OUT, PP3_IN_PU),
486 PINMUX_DATA(PP2_DATA, PP2_IN, PP2_OUT, PP2_IN_PU),
487 PINMUX_DATA(PP1_DATA, PP1_IN, PP1_OUT, PP1_IN_PU),
488 PINMUX_DATA(PP0_DATA, PP0_IN, PP0_OUT, PP0_IN_PU),
489
490 /* PQ GPIO */
491 PINMUX_DATA(PQ4_DATA, PQ4_IN, PQ4_OUT, PQ4_IN_PU),
492 PINMUX_DATA(PQ3_DATA, PQ3_IN, PQ3_OUT, PQ3_IN_PU),
493 PINMUX_DATA(PQ2_DATA, PQ2_IN, PQ2_OUT, PQ2_IN_PU),
494 PINMUX_DATA(PQ1_DATA, PQ1_IN, PQ1_OUT, PQ1_IN_PU),
495 PINMUX_DATA(PQ0_DATA, PQ0_IN, PQ0_OUT, PQ0_IN_PU),
496
497 /* PR GPIO */
498 PINMUX_DATA(PR3_DATA, PR3_IN, PR3_OUT, PR3_IN_PU),
499 PINMUX_DATA(PR2_DATA, PR2_IN, PR2_OUT, PR2_IN_PU),
500 PINMUX_DATA(PR1_DATA, PR1_IN, PR1_OUT, PR1_IN_PU),
501 PINMUX_DATA(PR0_DATA, PR0_IN, PR0_OUT, PR0_IN_PU),
502
503 /* PA FN */
504 PINMUX_DATA(D63_AD31_MARK, PA7_FN),
505 PINMUX_DATA(D62_AD30_MARK, PA6_FN),
506 PINMUX_DATA(D61_AD29_MARK, PA5_FN),
507 PINMUX_DATA(D60_AD28_MARK, PA4_FN),
508 PINMUX_DATA(D59_AD27_MARK, PA3_FN),
509 PINMUX_DATA(D58_AD26_MARK, PA2_FN),
510 PINMUX_DATA(D57_AD25_MARK, PA1_FN),
511 PINMUX_DATA(D56_AD24_MARK, PA0_FN),
512
513 /* PB FN */
514 PINMUX_DATA(D55_AD23_MARK, PB7_FN),
515 PINMUX_DATA(D54_AD22_MARK, PB6_FN),
516 PINMUX_DATA(D53_AD21_MARK, PB5_FN),
517 PINMUX_DATA(D52_AD20_MARK, PB4_FN),
518 PINMUX_DATA(D51_AD19_MARK, PB3_FN),
519 PINMUX_DATA(D50_AD18_MARK, PB2_FN),
520 PINMUX_DATA(D49_AD17_DB5_MARK, PB1_FN),
521 PINMUX_DATA(D48_AD16_DB4_MARK, PB0_FN),
522
523 /* PC FN */
524 PINMUX_DATA(D47_AD15_DB3_MARK, PC7_FN),
525 PINMUX_DATA(D46_AD14_DB2_MARK, PC6_FN),
526 PINMUX_DATA(D45_AD13_DB1_MARK, PC5_FN),
527 PINMUX_DATA(D44_AD12_DB0_MARK, PC4_FN),
528 PINMUX_DATA(D43_AD11_DG5_MARK, PC3_FN),
529 PINMUX_DATA(D42_AD10_DG4_MARK, PC2_FN),
530 PINMUX_DATA(D41_AD9_DG3_MARK, PC1_FN),
531 PINMUX_DATA(D40_AD8_DG2_MARK, PC0_FN),
532
533 /* PD FN */
534 PINMUX_DATA(D39_AD7_DG1_MARK, PD7_FN),
535 PINMUX_DATA(D38_AD6_DG0_MARK, PD6_FN),
536 PINMUX_DATA(D37_AD5_DR5_MARK, PD5_FN),
537 PINMUX_DATA(D36_AD4_DR4_MARK, PD4_FN),
538 PINMUX_DATA(D35_AD3_DR3_MARK, PD3_FN),
539 PINMUX_DATA(D34_AD2_DR2_MARK, PD2_FN),
540 PINMUX_DATA(D33_AD1_DR1_MARK, PD1_FN),
541 PINMUX_DATA(D32_AD0_DR0_MARK, PD0_FN),
542
543 /* PE FN */
544 PINMUX_DATA(REQ1_MARK, PE5_FN),
545 PINMUX_DATA(REQ2_MARK, PE4_FN),
546 PINMUX_DATA(REQ3_MARK, P2MSEL0_0, PE3_FN),
547 PINMUX_DATA(GNT1_MARK, PE2_FN),
548 PINMUX_DATA(GNT2_MARK, PE1_FN),
549 PINMUX_DATA(GNT3_MARK, P2MSEL0_0, PE0_FN),
550 PINMUX_DATA(MMCCLK_MARK, P2MSEL0_1, PE0_FN),
551
552 /* PF FN */
553 PINMUX_DATA(D31_MARK, PF7_FN),
554 PINMUX_DATA(D30_MARK, PF6_FN),
555 PINMUX_DATA(D29_MARK, PF5_FN),
556 PINMUX_DATA(D28_MARK, PF4_FN),
557 PINMUX_DATA(D27_MARK, PF3_FN),
558 PINMUX_DATA(D26_MARK, PF2_FN),
559 PINMUX_DATA(D25_MARK, PF1_FN),
560 PINMUX_DATA(D24_MARK, PF0_FN),
561
562 /* PF FN */
563 PINMUX_DATA(D23_MARK, PG7_FN),
564 PINMUX_DATA(D22_MARK, PG6_FN),
565 PINMUX_DATA(D21_MARK, PG5_FN),
566 PINMUX_DATA(D20_MARK, PG4_FN),
567 PINMUX_DATA(D19_MARK, PG3_FN),
568 PINMUX_DATA(D18_MARK, PG2_FN),
569 PINMUX_DATA(D17_MARK, PG1_FN),
570 PINMUX_DATA(D16_MARK, PG0_FN),
571
572 /* PH FN */
573 PINMUX_DATA(SCIF1_SCK_MARK, PH7_FN),
574 PINMUX_DATA(SCIF1_RXD_MARK, PH6_FN),
575 PINMUX_DATA(SCIF1_TXD_MARK, PH5_FN),
576 PINMUX_DATA(SCIF0_CTS_MARK, PH4_FN),
577 PINMUX_DATA(INTD_MARK, P1MSEL7_1, PH4_FN),
578 PINMUX_DATA(FCE_MARK, P1MSEL8_1, P1MSEL7_0, PH4_FN),
579 PINMUX_DATA(SCIF0_RTS_MARK, P1MSEL8_0, P1MSEL7_0, PH3_FN),
580 PINMUX_DATA(HSPI_CS_MARK, P1MSEL8_0, P1MSEL7_1, PH3_FN),
581 PINMUX_DATA(FSE_MARK, P1MSEL8_1, P1MSEL7_0, PH3_FN),
582 PINMUX_DATA(SCIF0_SCK_MARK, P1MSEL8_0, P1MSEL7_0, PH2_FN),
583 PINMUX_DATA(HSPI_CLK_MARK, P1MSEL8_0, P1MSEL7_1, PH2_FN),
584 PINMUX_DATA(FRE_MARK, P1MSEL8_1, P1MSEL7_0, PH2_FN),
585 PINMUX_DATA(SCIF0_RXD_MARK, P1MSEL8_0, P1MSEL7_0, PH1_FN),
586 PINMUX_DATA(HSPI_RX_MARK, P1MSEL8_0, P1MSEL7_1, PH1_FN),
587 PINMUX_DATA(FRB_MARK, P1MSEL8_1, P1MSEL7_0, PH1_FN),
588 PINMUX_DATA(SCIF0_TXD_MARK, P1MSEL8_0, P1MSEL7_0, PH0_FN),
589 PINMUX_DATA(HSPI_TX_MARK, P1MSEL8_0, P1MSEL7_1, PH0_FN),
590 PINMUX_DATA(FWE_MARK, P1MSEL8_1, P1MSEL7_0, PH0_FN),
591
592 /* PJ FN */
593 PINMUX_DATA(SCIF5_TXD_MARK, P1MSEL2_0, P1MSEL1_0, PJ7_FN),
594 PINMUX_DATA(HAC1_SYNC_MARK, P1MSEL2_0, P1MSEL1_1, PJ7_FN),
595 PINMUX_DATA(SSI1_WS_MARK, P1MSEL2_1, P1MSEL1_0, PJ7_FN),
596 PINMUX_DATA(SIOF_TXD_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ6_FN),
597 PINMUX_DATA(HAC0_SDOUT_MARK, P1MSEL4_0, P1MSEL3_1, PJ6_FN),
598 PINMUX_DATA(SSI0_SDATA_MARK, P1MSEL4_1, P1MSEL3_0, PJ6_FN),
599 PINMUX_DATA(SIOF_RXD_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ5_FN),
600 PINMUX_DATA(HAC0_SDIN_MARK, P1MSEL4_0, P1MSEL3_1, PJ5_FN),
601 PINMUX_DATA(SSI0_SCK_MARK, P1MSEL4_1, P1MSEL3_0, PJ5_FN),
602 PINMUX_DATA(SIOF_SYNC_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ4_FN),
603 PINMUX_DATA(HAC0_SYNC_MARK, P1MSEL4_0, P1MSEL3_1, PJ4_FN),
604 PINMUX_DATA(SSI0_WS_MARK, P1MSEL4_1, P1MSEL3_0, PJ4_FN),
605 PINMUX_DATA(SIOF_MCLK_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ3_FN),
606 PINMUX_DATA(HAC_RES_MARK, P1MSEL4_0, P1MSEL3_1, PJ3_FN),
607 PINMUX_DATA(SIOF_SCK_PJ_MARK, P2MSEL1_0, P1MSEL4_0, P1MSEL3_0, PJ2_FN),
608 PINMUX_DATA(HAC0_BITCLK_MARK, P1MSEL4_0, P1MSEL3_1, PJ2_FN),
609 PINMUX_DATA(SSI0_CLK_MARK, P1MSEL4_1, P1MSEL3_0, PJ2_FN),
610 PINMUX_DATA(HAC1_BITCLK_MARK, P1MSEL2_0, PJ1_FN),
611 PINMUX_DATA(SSI1_CLK_MARK, P1MSEL2_1, P1MSEL1_0, PJ1_FN),
612 PINMUX_DATA(TCLK_MARK, P1MSEL9_0, PJ0_FN),
613 PINMUX_DATA(IOIS16_MARK, P1MSEL9_1, PJ0_FN),
614
615 /* PK FN */
616 PINMUX_DATA(STATUS0_MARK, P1MSEL15_0, PK7_FN),
617 PINMUX_DATA(DRAK0_PK3_MARK, P1MSEL15_1, PK7_FN),
618 PINMUX_DATA(STATUS1_MARK, P1MSEL15_0, PK6_FN),
619 PINMUX_DATA(DRAK1_PK2_MARK, P1MSEL15_1, PK6_FN),
620 PINMUX_DATA(DACK2_MARK, P1MSEL12_0, P1MSEL11_0, PK5_FN),
621 PINMUX_DATA(SCIF2_TXD_MARK, P1MSEL12_1, P1MSEL11_0, PK5_FN),
622 PINMUX_DATA(MMCCMD_MARK, P1MSEL12_1, P1MSEL11_1, PK5_FN),
623 PINMUX_DATA(SIOF_TXD_PK_MARK, P2MSEL1_1,
624 P1MSEL12_0, P1MSEL11_1, PK5_FN),
625 PINMUX_DATA(DACK3_MARK, P1MSEL12_0, P1MSEL11_0, PK4_FN),
626 PINMUX_DATA(SCIF2_SCK_MARK, P1MSEL12_1, P1MSEL11_0, PK4_FN),
627 PINMUX_DATA(MMCDAT_MARK, P1MSEL12_1, P1MSEL11_1, PK4_FN),
628 PINMUX_DATA(SIOF_SCK_PK_MARK, P2MSEL1_1,
629 P1MSEL12_0, P1MSEL11_1, PK4_FN),
630 PINMUX_DATA(DREQ0_MARK, PK3_FN),
631 PINMUX_DATA(DREQ1_MARK, PK2_FN),
632 PINMUX_DATA(DRAK0_PK1_MARK, PK1_FN),
633 PINMUX_DATA(DRAK1_PK0_MARK, PK0_FN),
634
635 /* PL FN */
636 PINMUX_DATA(DREQ2_MARK, P1MSEL13_0, PL7_FN),
637 PINMUX_DATA(INTB_MARK, P1MSEL13_1, PL7_FN),
638 PINMUX_DATA(DREQ3_MARK, P1MSEL13_0, PL6_FN),
639 PINMUX_DATA(INTC_MARK, P1MSEL13_1, PL6_FN),
640 PINMUX_DATA(DRAK2_MARK, P1MSEL10_0, PL5_FN),
641 PINMUX_DATA(CE2A_MARK, P1MSEL10_1, PL5_FN),
642 PINMUX_DATA(IRL4_MARK, P1MSEL14_0, PL4_FN),
643 PINMUX_DATA(FD4_MARK, P1MSEL14_1, PL4_FN),
644 PINMUX_DATA(IRL5_MARK, P1MSEL14_0, PL3_FN),
645 PINMUX_DATA(FD5_MARK, P1MSEL14_1, PL3_FN),
646 PINMUX_DATA(IRL6_MARK, P1MSEL14_0, PL2_FN),
647 PINMUX_DATA(FD6_MARK, P1MSEL14_1, PL2_FN),
648 PINMUX_DATA(IRL7_MARK, P1MSEL14_0, PL1_FN),
649 PINMUX_DATA(FD7_MARK, P1MSEL14_1, PL1_FN),
650 PINMUX_DATA(DRAK3_MARK, P1MSEL10_0, PL0_FN),
651 PINMUX_DATA(CE2B_MARK, P1MSEL10_1, PL0_FN),
652
653 /* PM FN */
654 PINMUX_DATA(BREQ_BSACK_MARK, PM1_FN),
655 PINMUX_DATA(BACK_BSREQ_MARK, PM0_FN),
656
657 /* PN FN */
658 PINMUX_DATA(SCIF5_RXD_MARK, P1MSEL2_0, P1MSEL1_0, PN7_FN),
659 PINMUX_DATA(HAC1_SDIN_MARK, P1MSEL2_0, P1MSEL1_1, PN7_FN),
660 PINMUX_DATA(SSI1_SCK_MARK, P1MSEL2_1, P1MSEL1_0, PN7_FN),
661 PINMUX_DATA(SCIF5_SCK_MARK, P1MSEL2_0, P1MSEL1_0, PN6_FN),
662 PINMUX_DATA(HAC1_SDOUT_MARK, P1MSEL2_0, P1MSEL1_1, PN6_FN),
663 PINMUX_DATA(SSI1_SDATA_MARK, P1MSEL2_1, P1MSEL1_0, PN6_FN),
664 PINMUX_DATA(SCIF3_TXD_MARK, P1MSEL0_0, PN5_FN),
665 PINMUX_DATA(FCLE_MARK, P1MSEL0_1, PN5_FN),
666 PINMUX_DATA(SCIF3_RXD_MARK, P1MSEL0_0, PN4_FN),
667 PINMUX_DATA(FALE_MARK, P1MSEL0_1, PN4_FN),
668 PINMUX_DATA(SCIF3_SCK_MARK, P1MSEL0_0, PN3_FN),
669 PINMUX_DATA(FD0_MARK, P1MSEL0_1, PN3_FN),
670 PINMUX_DATA(SCIF4_TXD_MARK, P1MSEL0_0, PN2_FN),
671 PINMUX_DATA(FD1_MARK, P1MSEL0_1, PN2_FN),
672 PINMUX_DATA(SCIF4_RXD_MARK, P1MSEL0_0, PN1_FN),
673 PINMUX_DATA(FD2_MARK, P1MSEL0_1, PN1_FN),
674 PINMUX_DATA(SCIF4_SCK_MARK, P1MSEL0_0, PN0_FN),
675 PINMUX_DATA(FD3_MARK, P1MSEL0_1, PN0_FN),
676
677 /* PP FN */
678 PINMUX_DATA(DEVSEL_DCLKOUT_MARK, PP5_FN),
679 PINMUX_DATA(STOP_CDE_MARK, PP4_FN),
680 PINMUX_DATA(LOCK_ODDF_MARK, PP3_FN),
681 PINMUX_DATA(TRDY_DISPL_MARK, PP2_FN),
682 PINMUX_DATA(IRDY_HSYNC_MARK, PP1_FN),
683 PINMUX_DATA(PCIFRAME_VSYNC_MARK, PP0_FN),
684
685 /* PQ FN */
686 PINMUX_DATA(INTA_MARK, PQ4_FN),
687 PINMUX_DATA(GNT0_GNTIN_MARK, PQ3_FN),
688 PINMUX_DATA(REQ0_REQOUT_MARK, PQ2_FN),
689 PINMUX_DATA(PERR_MARK, PQ1_FN),
690 PINMUX_DATA(SERR_MARK, PQ0_FN),
691
692 /* PR FN */
693 PINMUX_DATA(WE7_CBE3_MARK, PR3_FN),
694 PINMUX_DATA(WE6_CBE2_MARK, PR2_FN),
695 PINMUX_DATA(WE5_CBE1_MARK, PR1_FN),
696 PINMUX_DATA(WE4_CBE0_MARK, PR0_FN),
697
698 /* MISC FN */
699 PINMUX_DATA(SCIF2_RXD_MARK, P1MSEL6_0, P1MSEL5_0),
700 PINMUX_DATA(SIOF_RXD_MARK, P2MSEL1_1, P1MSEL6_1, P1MSEL5_0),
701 PINMUX_DATA(MRESETOUT_MARK, P2MSEL2_0),
702 PINMUX_DATA(IRQOUT_MARK, P2MSEL2_1),
703};
704
705static struct pinmux_gpio pinmux_gpios[] = {
706 /* PA */
707 PINMUX_GPIO(GPIO_PA7, PA7_DATA),
708 PINMUX_GPIO(GPIO_PA6, PA6_DATA),
709 PINMUX_GPIO(GPIO_PA5, PA5_DATA),
710 PINMUX_GPIO(GPIO_PA4, PA4_DATA),
711 PINMUX_GPIO(GPIO_PA3, PA3_DATA),
712 PINMUX_GPIO(GPIO_PA2, PA2_DATA),
713 PINMUX_GPIO(GPIO_PA1, PA1_DATA),
714 PINMUX_GPIO(GPIO_PA0, PA0_DATA),
715
716 /* PB */
717 PINMUX_GPIO(GPIO_PB7, PB7_DATA),
718 PINMUX_GPIO(GPIO_PB6, PB6_DATA),
719 PINMUX_GPIO(GPIO_PB5, PB5_DATA),
720 PINMUX_GPIO(GPIO_PB4, PB4_DATA),
721 PINMUX_GPIO(GPIO_PB3, PB3_DATA),
722 PINMUX_GPIO(GPIO_PB2, PB2_DATA),
723 PINMUX_GPIO(GPIO_PB1, PB1_DATA),
724 PINMUX_GPIO(GPIO_PB0, PB0_DATA),
725
726 /* PC */
727 PINMUX_GPIO(GPIO_PC7, PC7_DATA),
728 PINMUX_GPIO(GPIO_PC6, PC6_DATA),
729 PINMUX_GPIO(GPIO_PC5, PC5_DATA),
730 PINMUX_GPIO(GPIO_PC4, PC4_DATA),
731 PINMUX_GPIO(GPIO_PC3, PC3_DATA),
732 PINMUX_GPIO(GPIO_PC2, PC2_DATA),
733 PINMUX_GPIO(GPIO_PC1, PC1_DATA),
734 PINMUX_GPIO(GPIO_PC0, PC0_DATA),
735
736 /* PD */
737 PINMUX_GPIO(GPIO_PD7, PD7_DATA),
738 PINMUX_GPIO(GPIO_PD6, PD6_DATA),
739 PINMUX_GPIO(GPIO_PD5, PD5_DATA),
740 PINMUX_GPIO(GPIO_PD4, PD4_DATA),
741 PINMUX_GPIO(GPIO_PD3, PD3_DATA),
742 PINMUX_GPIO(GPIO_PD2, PD2_DATA),
743 PINMUX_GPIO(GPIO_PD1, PD1_DATA),
744 PINMUX_GPIO(GPIO_PD0, PD0_DATA),
745
746 /* PE */
747 PINMUX_GPIO(GPIO_PE5, PE5_DATA),
748 PINMUX_GPIO(GPIO_PE4, PE4_DATA),
749 PINMUX_GPIO(GPIO_PE3, PE3_DATA),
750 PINMUX_GPIO(GPIO_PE2, PE2_DATA),
751 PINMUX_GPIO(GPIO_PE1, PE1_DATA),
752 PINMUX_GPIO(GPIO_PE0, PE0_DATA),
753
754 /* PF */
755 PINMUX_GPIO(GPIO_PF7, PF7_DATA),
756 PINMUX_GPIO(GPIO_PF6, PF6_DATA),
757 PINMUX_GPIO(GPIO_PF5, PF5_DATA),
758 PINMUX_GPIO(GPIO_PF4, PF4_DATA),
759 PINMUX_GPIO(GPIO_PF3, PF3_DATA),
760 PINMUX_GPIO(GPIO_PF2, PF2_DATA),
761 PINMUX_GPIO(GPIO_PF1, PF1_DATA),
762 PINMUX_GPIO(GPIO_PF0, PF0_DATA),
763
764 /* PG */
765 PINMUX_GPIO(GPIO_PG7, PG7_DATA),
766 PINMUX_GPIO(GPIO_PG6, PG6_DATA),
767 PINMUX_GPIO(GPIO_PG5, PG5_DATA),
768 PINMUX_GPIO(GPIO_PG4, PG4_DATA),
769 PINMUX_GPIO(GPIO_PG3, PG3_DATA),
770 PINMUX_GPIO(GPIO_PG2, PG2_DATA),
771 PINMUX_GPIO(GPIO_PG1, PG1_DATA),
772 PINMUX_GPIO(GPIO_PG0, PG0_DATA),
773
774 /* PH */
775 PINMUX_GPIO(GPIO_PH7, PH7_DATA),
776 PINMUX_GPIO(GPIO_PH6, PH6_DATA),
777 PINMUX_GPIO(GPIO_PH5, PH5_DATA),
778 PINMUX_GPIO(GPIO_PH4, PH4_DATA),
779 PINMUX_GPIO(GPIO_PH3, PH3_DATA),
780 PINMUX_GPIO(GPIO_PH2, PH2_DATA),
781 PINMUX_GPIO(GPIO_PH1, PH1_DATA),
782 PINMUX_GPIO(GPIO_PH0, PH0_DATA),
783
784 /* PJ */
785 PINMUX_GPIO(GPIO_PJ7, PJ7_DATA),
786 PINMUX_GPIO(GPIO_PJ6, PJ6_DATA),
787 PINMUX_GPIO(GPIO_PJ5, PJ5_DATA),
788 PINMUX_GPIO(GPIO_PJ4, PJ4_DATA),
789 PINMUX_GPIO(GPIO_PJ3, PJ3_DATA),
790 PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),
791 PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),
792 PINMUX_GPIO(GPIO_PJ0, PJ0_DATA),
793
794 /* PK */
795 PINMUX_GPIO(GPIO_PK7, PK7_DATA),
796 PINMUX_GPIO(GPIO_PK6, PK6_DATA),
797 PINMUX_GPIO(GPIO_PK5, PK5_DATA),
798 PINMUX_GPIO(GPIO_PK4, PK4_DATA),
799 PINMUX_GPIO(GPIO_PK3, PK3_DATA),
800 PINMUX_GPIO(GPIO_PK2, PK2_DATA),
801 PINMUX_GPIO(GPIO_PK1, PK1_DATA),
802 PINMUX_GPIO(GPIO_PK0, PK0_DATA),
803
804 /* PL */
805 PINMUX_GPIO(GPIO_PL7, PL7_DATA),
806 PINMUX_GPIO(GPIO_PL6, PL6_DATA),
807 PINMUX_GPIO(GPIO_PL5, PL5_DATA),
808 PINMUX_GPIO(GPIO_PL4, PL4_DATA),
809 PINMUX_GPIO(GPIO_PL3, PL3_DATA),
810 PINMUX_GPIO(GPIO_PL2, PL2_DATA),
811 PINMUX_GPIO(GPIO_PL1, PL1_DATA),
812 PINMUX_GPIO(GPIO_PL0, PL0_DATA),
813
814 /* PM */
815 PINMUX_GPIO(GPIO_PM1, PM1_DATA),
816 PINMUX_GPIO(GPIO_PM0, PM0_DATA),
817
818 /* PN */
819 PINMUX_GPIO(GPIO_PN7, PN7_DATA),
820 PINMUX_GPIO(GPIO_PN6, PN6_DATA),
821 PINMUX_GPIO(GPIO_PN5, PN5_DATA),
822 PINMUX_GPIO(GPIO_PN4, PN4_DATA),
823 PINMUX_GPIO(GPIO_PN3, PN3_DATA),
824 PINMUX_GPIO(GPIO_PN2, PN2_DATA),
825 PINMUX_GPIO(GPIO_PN1, PN1_DATA),
826 PINMUX_GPIO(GPIO_PN0, PN0_DATA),
827
828 /* PP */
829 PINMUX_GPIO(GPIO_PP5, PP5_DATA),
830 PINMUX_GPIO(GPIO_PP4, PP4_DATA),
831 PINMUX_GPIO(GPIO_PP3, PP3_DATA),
832 PINMUX_GPIO(GPIO_PP2, PP2_DATA),
833 PINMUX_GPIO(GPIO_PP1, PP1_DATA),
834 PINMUX_GPIO(GPIO_PP0, PP0_DATA),
835
836 /* PQ */
837 PINMUX_GPIO(GPIO_PQ4, PQ4_DATA),
838 PINMUX_GPIO(GPIO_PQ3, PQ3_DATA),
839 PINMUX_GPIO(GPIO_PQ2, PQ2_DATA),
840 PINMUX_GPIO(GPIO_PQ1, PQ1_DATA),
841 PINMUX_GPIO(GPIO_PQ0, PQ0_DATA),
842
843 /* PR */
844 PINMUX_GPIO(GPIO_PR3, PR3_DATA),
845 PINMUX_GPIO(GPIO_PR2, PR2_DATA),
846 PINMUX_GPIO(GPIO_PR1, PR1_DATA),
847 PINMUX_GPIO(GPIO_PR0, PR0_DATA),
848
849 /* FN */
850 PINMUX_GPIO(GPIO_FN_D63_AD31, D63_AD31_MARK),
851 PINMUX_GPIO(GPIO_FN_D62_AD30, D62_AD30_MARK),
852 PINMUX_GPIO(GPIO_FN_D61_AD29, D61_AD29_MARK),
853 PINMUX_GPIO(GPIO_FN_D60_AD28, D60_AD28_MARK),
854 PINMUX_GPIO(GPIO_FN_D59_AD27, D59_AD27_MARK),
855 PINMUX_GPIO(GPIO_FN_D58_AD26, D58_AD26_MARK),
856 PINMUX_GPIO(GPIO_FN_D57_AD25, D57_AD25_MARK),
857 PINMUX_GPIO(GPIO_FN_D56_AD24, D56_AD24_MARK),
858 PINMUX_GPIO(GPIO_FN_D55_AD23, D55_AD23_MARK),
859 PINMUX_GPIO(GPIO_FN_D54_AD22, D54_AD22_MARK),
860 PINMUX_GPIO(GPIO_FN_D53_AD21, D53_AD21_MARK),
861 PINMUX_GPIO(GPIO_FN_D52_AD20, D52_AD20_MARK),
862 PINMUX_GPIO(GPIO_FN_D51_AD19, D51_AD19_MARK),
863 PINMUX_GPIO(GPIO_FN_D50_AD18, D50_AD18_MARK),
864 PINMUX_GPIO(GPIO_FN_D49_AD17_DB5, D49_AD17_DB5_MARK),
865 PINMUX_GPIO(GPIO_FN_D48_AD16_DB4, D48_AD16_DB4_MARK),
866 PINMUX_GPIO(GPIO_FN_D47_AD15_DB3, D47_AD15_DB3_MARK),
867 PINMUX_GPIO(GPIO_FN_D46_AD14_DB2, D46_AD14_DB2_MARK),
868 PINMUX_GPIO(GPIO_FN_D45_AD13_DB1, D45_AD13_DB1_MARK),
869 PINMUX_GPIO(GPIO_FN_D44_AD12_DB0, D44_AD12_DB0_MARK),
870 PINMUX_GPIO(GPIO_FN_D43_AD11_DG5, D43_AD11_DG5_MARK),
871 PINMUX_GPIO(GPIO_FN_D42_AD10_DG4, D42_AD10_DG4_MARK),
872 PINMUX_GPIO(GPIO_FN_D41_AD9_DG3, D41_AD9_DG3_MARK),
873 PINMUX_GPIO(GPIO_FN_D40_AD8_DG2, D40_AD8_DG2_MARK),
874 PINMUX_GPIO(GPIO_FN_D39_AD7_DG1, D39_AD7_DG1_MARK),
875 PINMUX_GPIO(GPIO_FN_D38_AD6_DG0, D38_AD6_DG0_MARK),
876 PINMUX_GPIO(GPIO_FN_D37_AD5_DR5, D37_AD5_DR5_MARK),
877 PINMUX_GPIO(GPIO_FN_D36_AD4_DR4, D36_AD4_DR4_MARK),
878 PINMUX_GPIO(GPIO_FN_D35_AD3_DR3, D35_AD3_DR3_MARK),
879 PINMUX_GPIO(GPIO_FN_D34_AD2_DR2, D34_AD2_DR2_MARK),
880 PINMUX_GPIO(GPIO_FN_D33_AD1_DR1, D33_AD1_DR1_MARK),
881 PINMUX_GPIO(GPIO_FN_D32_AD0_DR0, D32_AD0_DR0_MARK),
882 PINMUX_GPIO(GPIO_FN_REQ1, REQ1_MARK),
883 PINMUX_GPIO(GPIO_FN_REQ2, REQ2_MARK),
884 PINMUX_GPIO(GPIO_FN_REQ3, REQ3_MARK),
885 PINMUX_GPIO(GPIO_FN_GNT1, GNT1_MARK),
886 PINMUX_GPIO(GPIO_FN_GNT2, GNT2_MARK),
887 PINMUX_GPIO(GPIO_FN_GNT3, GNT3_MARK),
888 PINMUX_GPIO(GPIO_FN_MMCCLK, MMCCLK_MARK),
889 PINMUX_GPIO(GPIO_FN_D31, D31_MARK),
890 PINMUX_GPIO(GPIO_FN_D30, D30_MARK),
891 PINMUX_GPIO(GPIO_FN_D29, D29_MARK),
892 PINMUX_GPIO(GPIO_FN_D28, D28_MARK),
893 PINMUX_GPIO(GPIO_FN_D27, D27_MARK),
894 PINMUX_GPIO(GPIO_FN_D26, D26_MARK),
895 PINMUX_GPIO(GPIO_FN_D25, D25_MARK),
896 PINMUX_GPIO(GPIO_FN_D24, D24_MARK),
897 PINMUX_GPIO(GPIO_FN_D23, D23_MARK),
898 PINMUX_GPIO(GPIO_FN_D22, D22_MARK),
899 PINMUX_GPIO(GPIO_FN_D21, D21_MARK),
900 PINMUX_GPIO(GPIO_FN_D20, D20_MARK),
901 PINMUX_GPIO(GPIO_FN_D19, D19_MARK),
902 PINMUX_GPIO(GPIO_FN_D18, D18_MARK),
903 PINMUX_GPIO(GPIO_FN_D17, D17_MARK),
904 PINMUX_GPIO(GPIO_FN_D16, D16_MARK),
905 PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK),
906 PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK),
907 PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK),
908 PINMUX_GPIO(GPIO_FN_SCIF0_CTS, SCIF0_CTS_MARK),
909 PINMUX_GPIO(GPIO_FN_INTD, INTD_MARK),
910 PINMUX_GPIO(GPIO_FN_FCE, FCE_MARK),
911 PINMUX_GPIO(GPIO_FN_SCIF0_RTS, SCIF0_RTS_MARK),
912 PINMUX_GPIO(GPIO_FN_HSPI_CS, HSPI_CS_MARK),
913 PINMUX_GPIO(GPIO_FN_FSE, FSE_MARK),
914 PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK),
915 PINMUX_GPIO(GPIO_FN_HSPI_CLK, HSPI_CLK_MARK),
916 PINMUX_GPIO(GPIO_FN_FRE, FRE_MARK),
917 PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK),
918 PINMUX_GPIO(GPIO_FN_HSPI_RX, HSPI_RX_MARK),
919 PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),
920 PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK),
921 PINMUX_GPIO(GPIO_FN_HSPI_TX, HSPI_TX_MARK),
922 PINMUX_GPIO(GPIO_FN_FWE, FWE_MARK),
923 PINMUX_GPIO(GPIO_FN_SCIF5_TXD, SCIF5_TXD_MARK),
924 PINMUX_GPIO(GPIO_FN_HAC1_SYNC, HAC1_SYNC_MARK),
925 PINMUX_GPIO(GPIO_FN_SSI1_WS, SSI1_WS_MARK),
926 PINMUX_GPIO(GPIO_FN_SIOF_TXD_PJ, SIOF_TXD_PJ_MARK),
927 PINMUX_GPIO(GPIO_FN_HAC0_SDOUT, HAC0_SDOUT_MARK),
928 PINMUX_GPIO(GPIO_FN_SSI0_SDATA, SSI0_SDATA_MARK),
929 PINMUX_GPIO(GPIO_FN_SIOF_RXD_PJ, SIOF_RXD_PJ_MARK),
930 PINMUX_GPIO(GPIO_FN_HAC0_SDIN, HAC0_SDIN_MARK),
931 PINMUX_GPIO(GPIO_FN_SSI0_SCK, SSI0_SCK_MARK),
932 PINMUX_GPIO(GPIO_FN_SIOF_SYNC_PJ, SIOF_SYNC_PJ_MARK),
933 PINMUX_GPIO(GPIO_FN_HAC0_SYNC, HAC0_SYNC_MARK),
934 PINMUX_GPIO(GPIO_FN_SSI0_WS, SSI0_WS_MARK),
935 PINMUX_GPIO(GPIO_FN_SIOF_MCLK_PJ, SIOF_MCLK_PJ_MARK),
936 PINMUX_GPIO(GPIO_FN_HAC_RES, HAC_RES_MARK),
937 PINMUX_GPIO(GPIO_FN_SIOF_SCK_PJ, SIOF_SCK_PJ_MARK),
938 PINMUX_GPIO(GPIO_FN_HAC0_BITCLK, HAC0_BITCLK_MARK),
939 PINMUX_GPIO(GPIO_FN_SSI0_CLK, SSI0_CLK_MARK),
940 PINMUX_GPIO(GPIO_FN_HAC1_BITCLK, HAC1_BITCLK_MARK),
941 PINMUX_GPIO(GPIO_FN_SSI1_CLK, SSI1_CLK_MARK),
942 PINMUX_GPIO(GPIO_FN_TCLK, TCLK_MARK),
943 PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
944 PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
945 PINMUX_GPIO(GPIO_FN_DRAK0_PK3, DRAK0_PK3_MARK),
946 PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK),
947 PINMUX_GPIO(GPIO_FN_DRAK1_PK2, DRAK1_PK2_MARK),
948 PINMUX_GPIO(GPIO_FN_DACK2, DACK2_MARK),
949 PINMUX_GPIO(GPIO_FN_SCIF2_TXD, SCIF2_TXD_MARK),
950 PINMUX_GPIO(GPIO_FN_MMCCMD, MMCCMD_MARK),
951 PINMUX_GPIO(GPIO_FN_SIOF_TXD_PK, SIOF_TXD_PK_MARK),
952 PINMUX_GPIO(GPIO_FN_DACK3, DACK3_MARK),
953 PINMUX_GPIO(GPIO_FN_SCIF2_SCK, SCIF2_SCK_MARK),
954 PINMUX_GPIO(GPIO_FN_MMCDAT, MMCDAT_MARK),
955 PINMUX_GPIO(GPIO_FN_SIOF_SCK_PK, SIOF_SCK_PK_MARK),
956 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
957 PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
958 PINMUX_GPIO(GPIO_FN_DRAK0_PK1, DRAK0_PK1_MARK),
959 PINMUX_GPIO(GPIO_FN_DRAK1_PK0, DRAK1_PK0_MARK),
960 PINMUX_GPIO(GPIO_FN_DREQ2, DREQ2_MARK),
961 PINMUX_GPIO(GPIO_FN_INTB, INTB_MARK),
962 PINMUX_GPIO(GPIO_FN_DREQ3, DREQ3_MARK),
963 PINMUX_GPIO(GPIO_FN_INTC, INTC_MARK),
964 PINMUX_GPIO(GPIO_FN_DRAK2, DRAK2_MARK),
965 PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK),
966 PINMUX_GPIO(GPIO_FN_IRL4, IRL4_MARK),
967 PINMUX_GPIO(GPIO_FN_FD4, FD4_MARK),
968 PINMUX_GPIO(GPIO_FN_IRL5, IRL5_MARK),
969 PINMUX_GPIO(GPIO_FN_FD5, FD5_MARK),
970 PINMUX_GPIO(GPIO_FN_IRL6, IRL6_MARK),
971 PINMUX_GPIO(GPIO_FN_FD6, FD6_MARK),
972 PINMUX_GPIO(GPIO_FN_IRL7, IRL7_MARK),
973 PINMUX_GPIO(GPIO_FN_FD7, FD7_MARK),
974 PINMUX_GPIO(GPIO_FN_DRAK3, DRAK3_MARK),
975 PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK),
976 PINMUX_GPIO(GPIO_FN_BREQ_BSACK, BREQ_BSACK_MARK),
977 PINMUX_GPIO(GPIO_FN_BACK_BSREQ, BACK_BSREQ_MARK),
978 PINMUX_GPIO(GPIO_FN_SCIF5_RXD, SCIF5_RXD_MARK),
979 PINMUX_GPIO(GPIO_FN_HAC1_SDIN, HAC1_SDIN_MARK),
980 PINMUX_GPIO(GPIO_FN_SSI1_SCK, SSI1_SCK_MARK),
981 PINMUX_GPIO(GPIO_FN_SCIF5_SCK, SCIF5_SCK_MARK),
982 PINMUX_GPIO(GPIO_FN_HAC1_SDOUT, HAC1_SDOUT_MARK),
983 PINMUX_GPIO(GPIO_FN_SSI1_SDATA, SSI1_SDATA_MARK),
984 PINMUX_GPIO(GPIO_FN_SCIF3_TXD, SCIF3_TXD_MARK),
985 PINMUX_GPIO(GPIO_FN_FCLE, FCLE_MARK),
986 PINMUX_GPIO(GPIO_FN_SCIF3_RXD, SCIF3_RXD_MARK),
987 PINMUX_GPIO(GPIO_FN_FALE, FALE_MARK),
988 PINMUX_GPIO(GPIO_FN_SCIF3_SCK, SCIF3_SCK_MARK),
989 PINMUX_GPIO(GPIO_FN_FD0, FD0_MARK),
990 PINMUX_GPIO(GPIO_FN_SCIF4_TXD, SCIF4_TXD_MARK),
991 PINMUX_GPIO(GPIO_FN_FD1, FD1_MARK),
992 PINMUX_GPIO(GPIO_FN_SCIF4_RXD, SCIF4_RXD_MARK),
993 PINMUX_GPIO(GPIO_FN_FD2, FD2_MARK),
994 PINMUX_GPIO(GPIO_FN_SCIF4_SCK, SCIF4_SCK_MARK),
995 PINMUX_GPIO(GPIO_FN_FD3, FD3_MARK),
996 PINMUX_GPIO(GPIO_FN_DEVSEL_DCLKOUT, DEVSEL_DCLKOUT_MARK),
997 PINMUX_GPIO(GPIO_FN_STOP_CDE, STOP_CDE_MARK),
998 PINMUX_GPIO(GPIO_FN_LOCK_ODDF, LOCK_ODDF_MARK),
999 PINMUX_GPIO(GPIO_FN_TRDY_DISPL, TRDY_DISPL_MARK),
1000 PINMUX_GPIO(GPIO_FN_IRDY_HSYNC, IRDY_HSYNC_MARK),
1001 PINMUX_GPIO(GPIO_FN_PCIFRAME_VSYNC, PCIFRAME_VSYNC_MARK),
1002 PINMUX_GPIO(GPIO_FN_INTA, INTA_MARK),
1003 PINMUX_GPIO(GPIO_FN_GNT0_GNTIN, GNT0_GNTIN_MARK),
1004 PINMUX_GPIO(GPIO_FN_REQ0_REQOUT, REQ0_REQOUT_MARK),
1005 PINMUX_GPIO(GPIO_FN_PERR, PERR_MARK),
1006 PINMUX_GPIO(GPIO_FN_SERR, SERR_MARK),
1007 PINMUX_GPIO(GPIO_FN_WE7_CBE3, WE7_CBE3_MARK),
1008 PINMUX_GPIO(GPIO_FN_WE6_CBE2, WE6_CBE2_MARK),
1009 PINMUX_GPIO(GPIO_FN_WE5_CBE1, WE5_CBE1_MARK),
1010 PINMUX_GPIO(GPIO_FN_WE4_CBE0, WE4_CBE0_MARK),
1011 PINMUX_GPIO(GPIO_FN_SCIF2_RXD, SCIF2_RXD_MARK),
1012 PINMUX_GPIO(GPIO_FN_SIOF_RXD, SIOF_RXD_MARK),
1013 PINMUX_GPIO(GPIO_FN_MRESETOUT, MRESETOUT_MARK),
1014 PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK),
1015};
1016
1017static struct pinmux_cfg_reg pinmux_config_regs[] = {
1018 { PINMUX_CFG_REG("PACR", 0xffe70000, 16, 2) {
1019 PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU,
1020 PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU,
1021 PA5_FN, PA5_OUT, PA5_IN, PA5_IN_PU,
1022 PA4_FN, PA4_OUT, PA4_IN, PA4_IN_PU,
1023 PA3_FN, PA3_OUT, PA3_IN, PA3_IN_PU,
1024 PA2_FN, PA2_OUT, PA2_IN, PA2_IN_PU,
1025 PA1_FN, PA1_OUT, PA1_IN, PA1_IN_PU,
1026 PA0_FN, PA0_OUT, PA0_IN, PA0_IN_PU }
1027 },
1028 { PINMUX_CFG_REG("PBCR", 0xffe70002, 16, 2) {
1029 PB7_FN, PB7_OUT, PB7_IN, PB7_IN_PU,
1030 PB6_FN, PB6_OUT, PB6_IN, PB6_IN_PU,
1031 PB5_FN, PB5_OUT, PB5_IN, PB5_IN_PU,
1032 PB4_FN, PB4_OUT, PB4_IN, PB4_IN_PU,
1033 PB3_FN, PB3_OUT, PB3_IN, PB3_IN_PU,
1034 PB2_FN, PB2_OUT, PB2_IN, PB2_IN_PU,
1035 PB1_FN, PB1_OUT, PB1_IN, PB1_IN_PU,
1036 PB0_FN, PB0_OUT, PB0_IN, PB0_IN_PU }
1037 },
1038 { PINMUX_CFG_REG("PCCR", 0xffe70004, 16, 2) {
1039 PC7_FN, PC7_OUT, PC7_IN, PC7_IN_PU,
1040 PC6_FN, PC6_OUT, PC6_IN, PC6_IN_PU,
1041 PC5_FN, PC5_OUT, PC5_IN, PC5_IN_PU,
1042 PC4_FN, PC4_OUT, PC4_IN, PC4_IN_PU,
1043 PC3_FN, PC3_OUT, PC3_IN, PC3_IN_PU,
1044 PC2_FN, PC2_OUT, PC2_IN, PC2_IN_PU,
1045 PC1_FN, PC1_OUT, PC1_IN, PC1_IN_PU,
1046 PC0_FN, PC0_OUT, PC0_IN, PC0_IN_PU }
1047 },
1048 { PINMUX_CFG_REG("PDCR", 0xffe70006, 16, 2) {
1049 PD7_FN, PD7_OUT, PD7_IN, PD7_IN_PU,
1050 PD6_FN, PD6_OUT, PD6_IN, PD6_IN_PU,
1051 PD5_FN, PD5_OUT, PD5_IN, PD5_IN_PU,
1052 PD4_FN, PD4_OUT, PD4_IN, PD4_IN_PU,
1053 PD3_FN, PD3_OUT, PD3_IN, PD3_IN_PU,
1054 PD2_FN, PD2_OUT, PD2_IN, PD2_IN_PU,
1055 PD1_FN, PD1_OUT, PD1_IN, PD1_IN_PU,
1056 PD0_FN, PD0_OUT, PD0_IN, PD0_IN_PU }
1057 },
1058 { PINMUX_CFG_REG("PECR", 0xffe70008, 16, 2) {
1059 0, 0, 0, 0,
1060 0, 0, 0, 0,
1061 PE5_FN, PE5_OUT, PE5_IN, PE5_IN_PU,
1062 PE4_FN, PE4_OUT, PE4_IN, PE4_IN_PU,
1063 PE3_FN, PE3_OUT, PE3_IN, PE3_IN_PU,
1064 PE2_FN, PE2_OUT, PE2_IN, PE2_IN_PU,
1065 PE1_FN, PE1_OUT, PE1_IN, PE1_IN_PU,
1066 PE0_FN, PE0_OUT, PE0_IN, PE0_IN_PU }
1067 },
1068 { PINMUX_CFG_REG("PFCR", 0xffe7000a, 16, 2) {
1069 PF7_FN, PF7_OUT, PF7_IN, PF7_IN_PU,
1070 PF6_FN, PF6_OUT, PF6_IN, PF6_IN_PU,
1071 PF5_FN, PF5_OUT, PF5_IN, PF5_IN_PU,
1072 PF4_FN, PF4_OUT, PF4_IN, PF4_IN_PU,
1073 PF3_FN, PF3_OUT, PF3_IN, PF3_IN_PU,
1074 PF2_FN, PF2_OUT, PF2_IN, PF2_IN_PU,
1075 PF1_FN, PF1_OUT, PF1_IN, PF1_IN_PU,
1076 PF0_FN, PF0_OUT, PF0_IN, PF0_IN_PU }
1077 },
1078 { PINMUX_CFG_REG("PGCR", 0xffe7000c, 16, 2) {
1079 PG7_FN, PG7_OUT, PG7_IN, PG7_IN_PU,
1080 PG6_FN, PG6_OUT, PG6_IN, PG6_IN_PU,
1081 PG5_FN, PG5_OUT, PG5_IN, PG5_IN_PU,
1082 PG4_FN, PG4_OUT, PG4_IN, PG4_IN_PU,
1083 PG3_FN, PG3_OUT, PG3_IN, PG3_IN_PU,
1084 PG2_FN, PG2_OUT, PG2_IN, PG2_IN_PU,
1085 PG1_FN, PG1_OUT, PG1_IN, PG1_IN_PU,
1086 PG0_FN, PG0_OUT, PG0_IN, PG0_IN_PU }
1087 },
1088 { PINMUX_CFG_REG("PHCR", 0xffe7000e, 16, 2) {
1089 PH7_FN, PH7_OUT, PH7_IN, PH7_IN_PU,
1090 PH6_FN, PH6_OUT, PH6_IN, PH6_IN_PU,
1091 PH5_FN, PH5_OUT, PH5_IN, PH5_IN_PU,
1092 PH4_FN, PH4_OUT, PH4_IN, PH4_IN_PU,
1093 PH3_FN, PH3_OUT, PH3_IN, PH3_IN_PU,
1094 PH2_FN, PH2_OUT, PH2_IN, PH2_IN_PU,
1095 PH1_FN, PH1_OUT, PH1_IN, PH1_IN_PU,
1096 PH0_FN, PH0_OUT, PH0_IN, PH0_IN_PU }
1097 },
1098 { PINMUX_CFG_REG("PJCR", 0xffe70010, 16, 2) {
1099 PJ7_FN, PJ7_OUT, PJ7_IN, PJ7_IN_PU,
1100 PJ6_FN, PJ6_OUT, PJ6_IN, PJ6_IN_PU,
1101 PJ5_FN, PJ5_OUT, PJ5_IN, PJ5_IN_PU,
1102 PJ4_FN, PJ4_OUT, PJ4_IN, PJ4_IN_PU,
1103 PJ3_FN, PJ3_OUT, PJ3_IN, PJ3_IN_PU,
1104 PJ2_FN, PJ2_OUT, PJ2_IN, PJ2_IN_PU,
1105 PJ1_FN, PJ1_OUT, PJ1_IN, PJ1_IN_PU,
1106 PJ0_FN, PJ0_OUT, PJ0_IN, PJ0_IN_PU }
1107 },
1108 { PINMUX_CFG_REG("PKCR", 0xffe70012, 16, 2) {
1109 PK7_FN, PK7_OUT, PK7_IN, PK7_IN_PU,
1110 PK6_FN, PK6_OUT, PK6_IN, PK6_IN_PU,
1111 PK5_FN, PK5_OUT, PK5_IN, PK5_IN_PU,
1112 PK4_FN, PK4_OUT, PK4_IN, PK4_IN_PU,
1113 PK3_FN, PK3_OUT, PK3_IN, PK3_IN_PU,
1114 PK2_FN, PK2_OUT, PK2_IN, PK2_IN_PU,
1115 PK1_FN, PK1_OUT, PK1_IN, PK1_IN_PU,
1116 PK0_FN, PK0_OUT, PK0_IN, PK0_IN_PU }
1117 },
1118 { PINMUX_CFG_REG("PLCR", 0xffe70014, 16, 2) {
1119 PL7_FN, PL7_OUT, PL7_IN, PL7_IN_PU,
1120 PL6_FN, PL6_OUT, PL6_IN, PL6_IN_PU,
1121 PL5_FN, PL5_OUT, PL5_IN, PL5_IN_PU,
1122 PL4_FN, PL4_OUT, PL4_IN, PL4_IN_PU,
1123 PL3_FN, PL3_OUT, PL3_IN, PL3_IN_PU,
1124 PL2_FN, PL2_OUT, PL2_IN, PL2_IN_PU,
1125 PL1_FN, PL1_OUT, PL1_IN, PL1_IN_PU,
1126 PL0_FN, PL0_OUT, PL0_IN, PL0_IN_PU }
1127 },
1128 { PINMUX_CFG_REG("PMCR", 0xffe70016, 16, 2) {
1129 0, 0, 0, 0,
1130 0, 0, 0, 0,
1131 0, 0, 0, 0,
1132 0, 0, 0, 0,
1133 0, 0, 0, 0,
1134 0, 0, 0, 0,
1135 PM1_FN, PM1_OUT, PM1_IN, PM1_IN_PU,
1136 PM0_FN, PM0_OUT, PM0_IN, PM0_IN_PU }
1137 },
1138 { PINMUX_CFG_REG("PNCR", 0xffe70018, 16, 2) {
1139 PN7_FN, PN7_OUT, PN7_IN, PN7_IN_PU,
1140 PN6_FN, PN6_OUT, PN6_IN, PN6_IN_PU,
1141 PN5_FN, PN5_OUT, PN5_IN, PN5_IN_PU,
1142 PN4_FN, PN4_OUT, PN4_IN, PN4_IN_PU,
1143 PN3_FN, PN3_OUT, PN3_IN, PN3_IN_PU,
1144 PN2_FN, PN2_OUT, PN2_IN, PN2_IN_PU,
1145 PN1_FN, PN1_OUT, PN1_IN, PN1_IN_PU,
1146 PN0_FN, PN0_OUT, PN0_IN, PN0_IN_PU }
1147 },
1148 { PINMUX_CFG_REG("PPCR", 0xffe7001a, 16, 2) {
1149 0, 0, 0, 0,
1150 0, 0, 0, 0,
1151 PP5_FN, PP5_OUT, PP5_IN, PP5_IN_PU,
1152 PP4_FN, PP4_OUT, PP4_IN, PP4_IN_PU,
1153 PP3_FN, PP3_OUT, PP3_IN, PP3_IN_PU,
1154 PP2_FN, PP2_OUT, PP2_IN, PP2_IN_PU,
1155 PP1_FN, PP1_OUT, PP1_IN, PP1_IN_PU,
1156 PP0_FN, PP0_OUT, PP0_IN, PP0_IN_PU }
1157 },
1158 { PINMUX_CFG_REG("PQCR", 0xffe7001c, 16, 2) {
1159 0, 0, 0, 0,
1160 0, 0, 0, 0,
1161 0, 0, 0, 0,
1162 PQ4_FN, PQ4_OUT, PQ4_IN, PQ4_IN_PU,
1163 PQ3_FN, PQ3_OUT, PQ3_IN, PQ3_IN_PU,
1164 PQ2_FN, PQ2_OUT, PQ2_IN, PQ2_IN_PU,
1165 PQ1_FN, PQ1_OUT, PQ1_IN, PQ1_IN_PU,
1166 PQ0_FN, PQ0_OUT, PQ0_IN, PQ0_IN_PU }
1167 },
1168 { PINMUX_CFG_REG("PRCR", 0xffe7001e, 16, 2) {
1169 0, 0, 0, 0,
1170 0, 0, 0, 0,
1171 0, 0, 0, 0,
1172 0, 0, 0, 0,
1173 PR3_FN, PR3_OUT, PR3_IN, PR3_IN_PU,
1174 PR2_FN, PR2_OUT, PR2_IN, PR2_IN_PU,
1175 PR1_FN, PR1_OUT, PR1_IN, PR1_IN_PU,
1176 PR0_FN, PR0_OUT, PR0_IN, PR0_IN_PU }
1177 },
1178 { PINMUX_CFG_REG("P1MSELR", 0xffe70080, 16, 1) {
1179 P1MSEL15_0, P1MSEL15_1,
1180 P1MSEL14_0, P1MSEL14_1,
1181 P1MSEL13_0, P1MSEL13_1,
1182 P1MSEL12_0, P1MSEL12_1,
1183 P1MSEL11_0, P1MSEL11_1,
1184 P1MSEL10_0, P1MSEL10_1,
1185 P1MSEL9_0, P1MSEL9_1,
1186 P1MSEL8_0, P1MSEL8_1,
1187 P1MSEL7_0, P1MSEL7_1,
1188 P1MSEL6_0, P1MSEL6_1,
1189 P1MSEL5_0, 0,
1190 P1MSEL4_0, P1MSEL4_1,
1191 P1MSEL3_0, P1MSEL3_1,
1192 P1MSEL2_0, P1MSEL2_1,
1193 P1MSEL1_0, P1MSEL1_1,
1194 P1MSEL0_0, P1MSEL0_1 }
1195 },
1196 { PINMUX_CFG_REG("P2MSELR", 0xffe70082, 16, 1) {
1197 0, 0,
1198 0, 0,
1199 0, 0,
1200 0, 0,
1201 0, 0,
1202 0, 0,
1203 0, 0,
1204 0, 0,
1205 0, 0,
1206 0, 0,
1207 0, 0,
1208 0, 0,
1209 0, 0,
1210 P2MSEL2_0, P2MSEL2_1,
1211 P2MSEL1_0, P2MSEL1_1,
1212 P2MSEL0_0, P2MSEL0_1 }
1213 },
1214 {}
1215};
1216
1217static struct pinmux_data_reg pinmux_data_regs[] = {
1218 { PINMUX_DATA_REG("PADR", 0xffe70020, 8) {
1219 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
1220 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA }
1221 },
1222 { PINMUX_DATA_REG("PBDR", 0xffe70022, 8) {
1223 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
1224 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA }
1225 },
1226 { PINMUX_DATA_REG("PCDR", 0xffe70024, 8) {
1227 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
1228 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
1229 },
1230 { PINMUX_DATA_REG("PDDR", 0xffe70026, 8) {
1231 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
1232 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
1233 },
1234 { PINMUX_DATA_REG("PEDR", 0xffe70028, 8) {
1235 0, 0, PE5_DATA, PE4_DATA,
1236 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA }
1237 },
1238 { PINMUX_DATA_REG("PFDR", 0xffe7002a, 8) {
1239 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
1240 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
1241 },
1242 { PINMUX_DATA_REG("PGDR", 0xffe7002c, 8) {
1243 PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
1244 PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA }
1245 },
1246 { PINMUX_DATA_REG("PHDR", 0xffe7002e, 8) {
1247 PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
1248 PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA }
1249 },
1250 { PINMUX_DATA_REG("PJDR", 0xffe70030, 8) {
1251 PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
1252 PJ3_DATA, PJ2_DATA, PJ1_DATA, PJ0_DATA }
1253 },
1254 { PINMUX_DATA_REG("PKDR", 0xffe70032, 8) {
1255 PK7_DATA, PK6_DATA, PK5_DATA, PK4_DATA,
1256 PK3_DATA, PK2_DATA, PK1_DATA, PK0_DATA }
1257 },
1258 { PINMUX_DATA_REG("PLDR", 0xffe70034, 8) {
1259 PL7_DATA, PL6_DATA, PL5_DATA, PL4_DATA,
1260 PL3_DATA, PL2_DATA, PL1_DATA, PL0_DATA }
1261 },
1262 { PINMUX_DATA_REG("PMDR", 0xffe70036, 8) {
1263 0, 0, 0, 0,
1264 0, 0, PM1_DATA, PM0_DATA }
1265 },
1266 { PINMUX_DATA_REG("PNDR", 0xffe70038, 8) {
1267 PN7_DATA, PN6_DATA, PN5_DATA, PN4_DATA,
1268 PN3_DATA, PN2_DATA, PN1_DATA, PN0_DATA }
1269 },
1270 { PINMUX_DATA_REG("PPDR", 0xffe7003a, 8) {
1271 0, 0, PP5_DATA, PP4_DATA,
1272 PP3_DATA, PP2_DATA, PP1_DATA, PP0_DATA }
1273 },
1274 { PINMUX_DATA_REG("PQDR", 0xffe7003c, 8) {
1275 0, 0, 0, PQ4_DATA,
1276 PQ3_DATA, PQ2_DATA, PQ1_DATA, PQ0_DATA }
1277 },
1278 { PINMUX_DATA_REG("PRDR", 0xffe7003e, 8) {
1279 0, 0, 0, 0,
1280 PR3_DATA, PR2_DATA, PR1_DATA, PR0_DATA }
1281 },
1282 { },
1283};
1284
1285struct sh_pfc_soc_info sh7785_pinmux_info = {
1286 .name = "sh7785_pfc",
1287 .reserved_id = PINMUX_RESERVED,
1288 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
1289 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
1290 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
1291 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
1292 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
1293 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
1294
1295 .first_gpio = GPIO_PA7,
1296 .last_gpio = GPIO_FN_IRQOUT,
1297
1298 .gpios = pinmux_gpios,
1299 .cfg_regs = pinmux_config_regs,
1300 .data_regs = pinmux_data_regs,
1301
1302 .gpio_data = pinmux_data,
1303 .gpio_data_size = ARRAY_SIZE(pinmux_data),
1304};
diff --git a/drivers/pinctrl/sh-pfc/pfc-sh7786.c b/drivers/pinctrl/sh-pfc/pfc-sh7786.c
new file mode 100644
index 000000000000..1e18b58f9e5f
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/pfc-sh7786.c
@@ -0,0 +1,837 @@
1/*
2 * SH7786 Pinmux
3 *
4 * Copyright (C) 2008, 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
6 *
7 * Based on SH7785 pinmux
8 *
9 * Copyright (C) 2008 Magnus Damm
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15
16#include <linux/init.h>
17#include <linux/kernel.h>
18#include <cpu/sh7786.h>
19
20#include "sh_pfc.h"
21
22enum {
23 PINMUX_RESERVED = 0,
24
25 PINMUX_DATA_BEGIN,
26 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
27 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
28 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
29 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
30 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
31 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
32 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
33 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
34 PE7_DATA, PE6_DATA,
35 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
36 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
37 PG7_DATA, PG6_DATA, PG5_DATA,
38 PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
39 PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
40 PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
41 PJ3_DATA, PJ2_DATA, PJ1_DATA,
42 PINMUX_DATA_END,
43
44 PINMUX_INPUT_BEGIN,
45 PA7_IN, PA6_IN, PA5_IN, PA4_IN,
46 PA3_IN, PA2_IN, PA1_IN, PA0_IN,
47 PB7_IN, PB6_IN, PB5_IN, PB4_IN,
48 PB3_IN, PB2_IN, PB1_IN, PB0_IN,
49 PC7_IN, PC6_IN, PC5_IN, PC4_IN,
50 PC3_IN, PC2_IN, PC1_IN, PC0_IN,
51 PD7_IN, PD6_IN, PD5_IN, PD4_IN,
52 PD3_IN, PD2_IN, PD1_IN, PD0_IN,
53 PE7_IN, PE6_IN,
54 PF7_IN, PF6_IN, PF5_IN, PF4_IN,
55 PF3_IN, PF2_IN, PF1_IN, PF0_IN,
56 PG7_IN, PG6_IN, PG5_IN,
57 PH7_IN, PH6_IN, PH5_IN, PH4_IN,
58 PH3_IN, PH2_IN, PH1_IN, PH0_IN,
59 PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN,
60 PJ3_IN, PJ2_IN, PJ1_IN,
61 PINMUX_INPUT_END,
62
63 PINMUX_INPUT_PULLUP_BEGIN,
64 PA7_IN_PU, PA6_IN_PU, PA5_IN_PU, PA4_IN_PU,
65 PA3_IN_PU, PA2_IN_PU, PA1_IN_PU, PA0_IN_PU,
66 PB7_IN_PU, PB6_IN_PU, PB5_IN_PU, PB4_IN_PU,
67 PB3_IN_PU, PB2_IN_PU, PB1_IN_PU, PB0_IN_PU,
68 PC7_IN_PU, PC6_IN_PU, PC5_IN_PU, PC4_IN_PU,
69 PC3_IN_PU, PC2_IN_PU, PC1_IN_PU, PC0_IN_PU,
70 PD7_IN_PU, PD6_IN_PU, PD5_IN_PU, PD4_IN_PU,
71 PD3_IN_PU, PD2_IN_PU, PD1_IN_PU, PD0_IN_PU,
72 PE7_IN_PU, PE6_IN_PU,
73 PF7_IN_PU, PF6_IN_PU, PF5_IN_PU, PF4_IN_PU,
74 PF3_IN_PU, PF2_IN_PU, PF1_IN_PU, PF0_IN_PU,
75 PG7_IN_PU, PG6_IN_PU, PG5_IN_PU,
76 PH7_IN_PU, PH6_IN_PU, PH5_IN_PU, PH4_IN_PU,
77 PH3_IN_PU, PH2_IN_PU, PH1_IN_PU, PH0_IN_PU,
78 PJ7_IN_PU, PJ6_IN_PU, PJ5_IN_PU, PJ4_IN_PU,
79 PJ3_IN_PU, PJ2_IN_PU, PJ1_IN_PU,
80 PINMUX_INPUT_PULLUP_END,
81
82 PINMUX_OUTPUT_BEGIN,
83 PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
84 PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
85 PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
86 PB3_OUT, PB2_OUT, PB1_OUT, PB0_OUT,
87 PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
88 PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
89 PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
90 PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
91 PE7_OUT, PE6_OUT,
92 PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
93 PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
94 PG7_OUT, PG6_OUT, PG5_OUT,
95 PH7_OUT, PH6_OUT, PH5_OUT, PH4_OUT,
96 PH3_OUT, PH2_OUT, PH1_OUT, PH0_OUT,
97 PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT,
98 PJ3_OUT, PJ2_OUT, PJ1_OUT,
99 PINMUX_OUTPUT_END,
100
101 PINMUX_FUNCTION_BEGIN,
102 PA7_FN, PA6_FN, PA5_FN, PA4_FN,
103 PA3_FN, PA2_FN, PA1_FN, PA0_FN,
104 PB7_FN, PB6_FN, PB5_FN, PB4_FN,
105 PB3_FN, PB2_FN, PB1_FN, PB0_FN,
106 PC7_FN, PC6_FN, PC5_FN, PC4_FN,
107 PC3_FN, PC2_FN, PC1_FN, PC0_FN,
108 PD7_FN, PD6_FN, PD5_FN, PD4_FN,
109 PD3_FN, PD2_FN, PD1_FN, PD0_FN,
110 PE7_FN, PE6_FN,
111 PF7_FN, PF6_FN, PF5_FN, PF4_FN,
112 PF3_FN, PF2_FN, PF1_FN, PF0_FN,
113 PG7_FN, PG6_FN, PG5_FN,
114 PH7_FN, PH6_FN, PH5_FN, PH4_FN,
115 PH3_FN, PH2_FN, PH1_FN, PH0_FN,
116 PJ7_FN, PJ6_FN, PJ5_FN, PJ4_FN,
117 PJ3_FN, PJ2_FN, PJ1_FN,
118 P1MSEL14_0, P1MSEL14_1,
119 P1MSEL13_0, P1MSEL13_1,
120 P1MSEL12_0, P1MSEL12_1,
121 P1MSEL11_0, P1MSEL11_1,
122 P1MSEL10_0, P1MSEL10_1,
123 P1MSEL9_0, P1MSEL9_1,
124 P1MSEL8_0, P1MSEL8_1,
125 P1MSEL7_0, P1MSEL7_1,
126 P1MSEL6_0, P1MSEL6_1,
127 P1MSEL5_0, P1MSEL5_1,
128 P1MSEL4_0, P1MSEL4_1,
129 P1MSEL3_0, P1MSEL3_1,
130 P1MSEL2_0, P1MSEL2_1,
131 P1MSEL1_0, P1MSEL1_1,
132 P1MSEL0_0, P1MSEL0_1,
133
134 P2MSEL15_0, P2MSEL15_1,
135 P2MSEL14_0, P2MSEL14_1,
136 P2MSEL13_0, P2MSEL13_1,
137 P2MSEL12_0, P2MSEL12_1,
138 P2MSEL11_0, P2MSEL11_1,
139 P2MSEL10_0, P2MSEL10_1,
140 P2MSEL9_0, P2MSEL9_1,
141 P2MSEL8_0, P2MSEL8_1,
142 P2MSEL7_0, P2MSEL7_1,
143 P2MSEL6_0, P2MSEL6_1,
144 P2MSEL5_0, P2MSEL5_1,
145 P2MSEL4_0, P2MSEL4_1,
146 P2MSEL3_0, P2MSEL3_1,
147 P2MSEL2_0, P2MSEL2_1,
148 P2MSEL1_0, P2MSEL1_1,
149 P2MSEL0_0, P2MSEL0_1,
150 PINMUX_FUNCTION_END,
151
152 PINMUX_MARK_BEGIN,
153 DCLKIN_MARK, DCLKOUT_MARK, ODDF_MARK,
154 VSYNC_MARK, HSYNC_MARK, CDE_MARK, DISP_MARK,
155 DR0_MARK, DR1_MARK, DR2_MARK, DR3_MARK, DR4_MARK, DR5_MARK,
156 DG0_MARK, DG1_MARK, DG2_MARK, DG3_MARK, DG4_MARK, DG5_MARK,
157 DB0_MARK, DB1_MARK, DB2_MARK, DB3_MARK, DB4_MARK, DB5_MARK,
158 ETH_MAGIC_MARK, ETH_LINK_MARK, ETH_TX_ER_MARK, ETH_TX_EN_MARK,
159 ETH_MDIO_MARK, ETH_RX_CLK_MARK, ETH_MDC_MARK, ETH_COL_MARK,
160 ETH_TX_CLK_MARK, ETH_CRS_MARK, ETH_RX_DV_MARK, ETH_RX_ER_MARK,
161 ETH_TXD3_MARK, ETH_TXD2_MARK, ETH_TXD1_MARK, ETH_TXD0_MARK,
162 ETH_RXD3_MARK, ETH_RXD2_MARK, ETH_RXD1_MARK, ETH_RXD0_MARK,
163 HSPI_CLK_MARK, HSPI_CS_MARK, HSPI_RX_MARK, HSPI_TX_MARK,
164 SCIF0_CTS_MARK, SCIF0_RTS_MARK,
165 SCIF0_SCK_MARK, SCIF0_RXD_MARK, SCIF0_TXD_MARK,
166 SCIF1_SCK_MARK, SCIF1_RXD_MARK, SCIF1_TXD_MARK,
167 SCIF3_SCK_MARK, SCIF3_RXD_MARK, SCIF3_TXD_MARK,
168 SCIF4_SCK_MARK, SCIF4_RXD_MARK, SCIF4_TXD_MARK,
169 SCIF5_SCK_MARK, SCIF5_RXD_MARK, SCIF5_TXD_MARK,
170 BREQ_MARK, IOIS16_MARK, CE2B_MARK, CE2A_MARK, BACK_MARK,
171 FALE_MARK, FRB_MARK, FSTATUS_MARK,
172 FSE_MARK, FCLE_MARK,
173 DACK0_MARK, DACK1_MARK, DACK2_MARK, DACK3_MARK,
174 DREQ0_MARK, DREQ1_MARK, DREQ2_MARK, DREQ3_MARK,
175 DRAK0_MARK, DRAK1_MARK, DRAK2_MARK, DRAK3_MARK,
176 USB_OVC1_MARK, USB_OVC0_MARK,
177 USB_PENC1_MARK, USB_PENC0_MARK,
178 HAC_RES_MARK,
179 HAC1_SDOUT_MARK, HAC1_SDIN_MARK, HAC1_SYNC_MARK, HAC1_BITCLK_MARK,
180 HAC0_SDOUT_MARK, HAC0_SDIN_MARK, HAC0_SYNC_MARK, HAC0_BITCLK_MARK,
181 SSI0_SDATA_MARK, SSI0_SCK_MARK, SSI0_WS_MARK, SSI0_CLK_MARK,
182 SSI1_SDATA_MARK, SSI1_SCK_MARK, SSI1_WS_MARK, SSI1_CLK_MARK,
183 SSI2_SDATA_MARK, SSI2_SCK_MARK, SSI2_WS_MARK,
184 SSI3_SDATA_MARK, SSI3_SCK_MARK, SSI3_WS_MARK,
185 SDIF1CMD_MARK, SDIF1CD_MARK, SDIF1WP_MARK, SDIF1CLK_MARK,
186 SDIF1D3_MARK, SDIF1D2_MARK, SDIF1D1_MARK, SDIF1D0_MARK,
187 SDIF0CMD_MARK, SDIF0CD_MARK, SDIF0WP_MARK, SDIF0CLK_MARK,
188 SDIF0D3_MARK, SDIF0D2_MARK, SDIF0D1_MARK, SDIF0D0_MARK,
189 TCLK_MARK,
190 IRL7_MARK, IRL6_MARK, IRL5_MARK, IRL4_MARK,
191 PINMUX_MARK_END,
192};
193
194static pinmux_enum_t pinmux_data[] = {
195
196 /* PA GPIO */
197 PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU),
198 PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT, PA6_IN_PU),
199 PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT, PA5_IN_PU),
200 PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT, PA4_IN_PU),
201 PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT, PA3_IN_PU),
202 PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT, PA2_IN_PU),
203 PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT, PA1_IN_PU),
204 PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT, PA0_IN_PU),
205
206 /* PB GPIO */
207 PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT, PB7_IN_PU),
208 PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT, PB6_IN_PU),
209 PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT, PB5_IN_PU),
210 PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT, PB4_IN_PU),
211 PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT, PB3_IN_PU),
212 PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT, PB2_IN_PU),
213 PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT, PB1_IN_PU),
214 PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT, PB0_IN_PU),
215
216 /* PC GPIO */
217 PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT, PC7_IN_PU),
218 PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT, PC6_IN_PU),
219 PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT, PC5_IN_PU),
220 PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT, PC4_IN_PU),
221 PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT, PC3_IN_PU),
222 PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT, PC2_IN_PU),
223 PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT, PC1_IN_PU),
224 PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT, PC0_IN_PU),
225
226 /* PD GPIO */
227 PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT, PD7_IN_PU),
228 PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT, PD6_IN_PU),
229 PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT, PD5_IN_PU),
230 PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT, PD4_IN_PU),
231 PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT, PD3_IN_PU),
232 PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT, PD2_IN_PU),
233 PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT, PD1_IN_PU),
234 PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT, PD0_IN_PU),
235
236 /* PE GPIO */
237 PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT, PE7_IN_PU),
238 PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT, PE6_IN_PU),
239
240 /* PF GPIO */
241 PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT, PF7_IN_PU),
242 PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT, PF6_IN_PU),
243 PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT, PF5_IN_PU),
244 PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT, PF4_IN_PU),
245 PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT, PF3_IN_PU),
246 PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT, PF2_IN_PU),
247 PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT, PF1_IN_PU),
248 PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT, PF0_IN_PU),
249
250 /* PG GPIO */
251 PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT, PG7_IN_PU),
252 PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT, PG6_IN_PU),
253 PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT, PG5_IN_PU),
254
255 /* PH GPIO */
256 PINMUX_DATA(PH7_DATA, PH7_IN, PH7_OUT, PH7_IN_PU),
257 PINMUX_DATA(PH6_DATA, PH6_IN, PH6_OUT, PH6_IN_PU),
258 PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT, PH5_IN_PU),
259 PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT, PH4_IN_PU),
260 PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT, PH3_IN_PU),
261 PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT, PH2_IN_PU),
262 PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT, PH1_IN_PU),
263 PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT, PH0_IN_PU),
264
265 /* PJ GPIO */
266 PINMUX_DATA(PJ7_DATA, PJ7_IN, PJ7_OUT, PJ7_IN_PU),
267 PINMUX_DATA(PJ6_DATA, PJ6_IN, PJ6_OUT, PJ6_IN_PU),
268 PINMUX_DATA(PJ5_DATA, PJ5_IN, PJ5_OUT, PJ5_IN_PU),
269 PINMUX_DATA(PJ4_DATA, PJ4_IN, PJ4_OUT, PJ4_IN_PU),
270 PINMUX_DATA(PJ3_DATA, PJ3_IN, PJ3_OUT, PJ3_IN_PU),
271 PINMUX_DATA(PJ2_DATA, PJ2_IN, PJ2_OUT, PJ2_IN_PU),
272 PINMUX_DATA(PJ1_DATA, PJ1_IN, PJ1_OUT, PJ1_IN_PU),
273
274 /* PA FN */
275 PINMUX_DATA(CDE_MARK, P1MSEL2_0, PA7_FN),
276 PINMUX_DATA(DISP_MARK, P1MSEL2_0, PA6_FN),
277 PINMUX_DATA(DR5_MARK, P1MSEL2_0, PA5_FN),
278 PINMUX_DATA(DR4_MARK, P1MSEL2_0, PA4_FN),
279 PINMUX_DATA(DR3_MARK, P1MSEL2_0, PA3_FN),
280 PINMUX_DATA(DR2_MARK, P1MSEL2_0, PA2_FN),
281 PINMUX_DATA(DR1_MARK, P1MSEL2_0, PA1_FN),
282 PINMUX_DATA(DR0_MARK, P1MSEL2_0, PA0_FN),
283 PINMUX_DATA(ETH_MAGIC_MARK, P1MSEL2_1, PA7_FN),
284 PINMUX_DATA(ETH_LINK_MARK, P1MSEL2_1, PA6_FN),
285 PINMUX_DATA(ETH_TX_ER_MARK, P1MSEL2_1, PA5_FN),
286 PINMUX_DATA(ETH_TX_EN_MARK, P1MSEL2_1, PA4_FN),
287 PINMUX_DATA(ETH_TXD3_MARK, P1MSEL2_1, PA3_FN),
288 PINMUX_DATA(ETH_TXD2_MARK, P1MSEL2_1, PA2_FN),
289 PINMUX_DATA(ETH_TXD1_MARK, P1MSEL2_1, PA1_FN),
290 PINMUX_DATA(ETH_TXD0_MARK, P1MSEL2_1, PA0_FN),
291
292 /* PB FN */
293 PINMUX_DATA(VSYNC_MARK, P1MSEL3_0, PB7_FN),
294 PINMUX_DATA(ODDF_MARK, P1MSEL3_0, PB6_FN),
295 PINMUX_DATA(DG5_MARK, P1MSEL2_0, PB5_FN),
296 PINMUX_DATA(DG4_MARK, P1MSEL2_0, PB4_FN),
297 PINMUX_DATA(DG3_MARK, P1MSEL2_0, PB3_FN),
298 PINMUX_DATA(DG2_MARK, P1MSEL2_0, PB2_FN),
299 PINMUX_DATA(DG1_MARK, P1MSEL2_0, PB1_FN),
300 PINMUX_DATA(DG0_MARK, P1MSEL2_0, PB0_FN),
301 PINMUX_DATA(HSPI_CLK_MARK, P1MSEL3_1, PB7_FN),
302 PINMUX_DATA(HSPI_CS_MARK, P1MSEL3_1, PB6_FN),
303 PINMUX_DATA(ETH_MDIO_MARK, P1MSEL2_1, PB5_FN),
304 PINMUX_DATA(ETH_RX_CLK_MARK, P1MSEL2_1, PB4_FN),
305 PINMUX_DATA(ETH_MDC_MARK, P1MSEL2_1, PB3_FN),
306 PINMUX_DATA(ETH_COL_MARK, P1MSEL2_1, PB2_FN),
307 PINMUX_DATA(ETH_TX_CLK_MARK, P1MSEL2_1, PB1_FN),
308 PINMUX_DATA(ETH_CRS_MARK, P1MSEL2_1, PB0_FN),
309
310 /* PC FN */
311 PINMUX_DATA(DCLKIN_MARK, P1MSEL3_0, PC7_FN),
312 PINMUX_DATA(HSYNC_MARK, P1MSEL3_0, PC6_FN),
313 PINMUX_DATA(DB5_MARK, P1MSEL2_0, PC5_FN),
314 PINMUX_DATA(DB4_MARK, P1MSEL2_0, PC4_FN),
315 PINMUX_DATA(DB3_MARK, P1MSEL2_0, PC3_FN),
316 PINMUX_DATA(DB2_MARK, P1MSEL2_0, PC2_FN),
317 PINMUX_DATA(DB1_MARK, P1MSEL2_0, PC1_FN),
318 PINMUX_DATA(DB0_MARK, P1MSEL2_0, PC0_FN),
319
320 PINMUX_DATA(HSPI_RX_MARK, P1MSEL3_1, PC7_FN),
321 PINMUX_DATA(HSPI_TX_MARK, P1MSEL3_1, PC6_FN),
322 PINMUX_DATA(ETH_RXD3_MARK, P1MSEL2_1, PC5_FN),
323 PINMUX_DATA(ETH_RXD2_MARK, P1MSEL2_1, PC4_FN),
324 PINMUX_DATA(ETH_RXD1_MARK, P1MSEL2_1, PC3_FN),
325 PINMUX_DATA(ETH_RXD0_MARK, P1MSEL2_1, PC2_FN),
326 PINMUX_DATA(ETH_RX_DV_MARK, P1MSEL2_1, PC1_FN),
327 PINMUX_DATA(ETH_RX_ER_MARK, P1MSEL2_1, PC0_FN),
328
329 /* PD FN */
330 PINMUX_DATA(DCLKOUT_MARK, PD7_FN),
331 PINMUX_DATA(SCIF1_SCK_MARK, PD6_FN),
332 PINMUX_DATA(SCIF1_RXD_MARK, PD5_FN),
333 PINMUX_DATA(SCIF1_TXD_MARK, PD4_FN),
334 PINMUX_DATA(DACK1_MARK, P1MSEL13_1, P1MSEL12_0, PD3_FN),
335 PINMUX_DATA(BACK_MARK, P1MSEL13_0, P1MSEL12_1, PD3_FN),
336 PINMUX_DATA(FALE_MARK, P1MSEL13_0, P1MSEL12_0, PD3_FN),
337 PINMUX_DATA(DACK0_MARK, P1MSEL14_1, PD2_FN),
338 PINMUX_DATA(FCLE_MARK, P1MSEL14_0, PD2_FN),
339 PINMUX_DATA(DREQ1_MARK, P1MSEL10_0, P1MSEL9_1, PD1_FN),
340 PINMUX_DATA(BREQ_MARK, P1MSEL10_1, P1MSEL9_0, PD1_FN),
341 PINMUX_DATA(USB_OVC1_MARK, P1MSEL10_0, P1MSEL9_0, PD1_FN),
342 PINMUX_DATA(DREQ0_MARK, P1MSEL11_1, PD0_FN),
343 PINMUX_DATA(USB_OVC0_MARK, P1MSEL11_0, PD0_FN),
344
345 /* PE FN */
346 PINMUX_DATA(USB_PENC1_MARK, PE7_FN),
347 PINMUX_DATA(USB_PENC0_MARK, PE6_FN),
348
349 /* PF FN */
350 PINMUX_DATA(HAC1_SDOUT_MARK, P2MSEL15_0, P2MSEL14_0, PF7_FN),
351 PINMUX_DATA(HAC1_SDIN_MARK, P2MSEL15_0, P2MSEL14_0, PF6_FN),
352 PINMUX_DATA(HAC1_SYNC_MARK, P2MSEL15_0, P2MSEL14_0, PF5_FN),
353 PINMUX_DATA(HAC1_BITCLK_MARK, P2MSEL15_0, P2MSEL14_0, PF4_FN),
354 PINMUX_DATA(HAC0_SDOUT_MARK, P2MSEL13_0, P2MSEL12_0, PF3_FN),
355 PINMUX_DATA(HAC0_SDIN_MARK, P2MSEL13_0, P2MSEL12_0, PF2_FN),
356 PINMUX_DATA(HAC0_SYNC_MARK, P2MSEL13_0, P2MSEL12_0, PF1_FN),
357 PINMUX_DATA(HAC0_BITCLK_MARK, P2MSEL13_0, P2MSEL12_0, PF0_FN),
358 PINMUX_DATA(SSI1_SDATA_MARK, P2MSEL15_0, P2MSEL14_1, PF7_FN),
359 PINMUX_DATA(SSI1_SCK_MARK, P2MSEL15_0, P2MSEL14_1, PF6_FN),
360 PINMUX_DATA(SSI1_WS_MARK, P2MSEL15_0, P2MSEL14_1, PF5_FN),
361 PINMUX_DATA(SSI1_CLK_MARK, P2MSEL15_0, P2MSEL14_1, PF4_FN),
362 PINMUX_DATA(SSI0_SDATA_MARK, P2MSEL13_0, P2MSEL12_1, PF3_FN),
363 PINMUX_DATA(SSI0_SCK_MARK, P2MSEL13_0, P2MSEL12_1, PF2_FN),
364 PINMUX_DATA(SSI0_WS_MARK, P2MSEL13_0, P2MSEL12_1, PF1_FN),
365 PINMUX_DATA(SSI0_CLK_MARK, P2MSEL13_0, P2MSEL12_1, PF0_FN),
366 PINMUX_DATA(SDIF1CMD_MARK, P2MSEL15_1, P2MSEL14_0, PF7_FN),
367 PINMUX_DATA(SDIF1CD_MARK, P2MSEL15_1, P2MSEL14_0, PF6_FN),
368 PINMUX_DATA(SDIF1WP_MARK, P2MSEL15_1, P2MSEL14_0, PF5_FN),
369 PINMUX_DATA(SDIF1CLK_MARK, P2MSEL15_1, P2MSEL14_0, PF4_FN),
370 PINMUX_DATA(SDIF1D3_MARK, P2MSEL13_1, P2MSEL12_0, PF3_FN),
371 PINMUX_DATA(SDIF1D2_MARK, P2MSEL13_1, P2MSEL12_0, PF2_FN),
372 PINMUX_DATA(SDIF1D1_MARK, P2MSEL13_1, P2MSEL12_0, PF1_FN),
373 PINMUX_DATA(SDIF1D0_MARK, P2MSEL13_1, P2MSEL12_0, PF0_FN),
374
375 /* PG FN */
376 PINMUX_DATA(SCIF3_SCK_MARK, P1MSEL8_0, PG7_FN),
377 PINMUX_DATA(SSI2_SDATA_MARK, P1MSEL8_1, PG7_FN),
378 PINMUX_DATA(SCIF3_RXD_MARK, P1MSEL7_0, P1MSEL6_0, PG6_FN),
379 PINMUX_DATA(SSI2_SCK_MARK, P1MSEL7_1, P1MSEL6_0, PG6_FN),
380 PINMUX_DATA(TCLK_MARK, P1MSEL7_0, P1MSEL6_1, PG6_FN),
381 PINMUX_DATA(SCIF3_TXD_MARK, P1MSEL5_0, P1MSEL4_0, PG5_FN),
382 PINMUX_DATA(SSI2_WS_MARK, P1MSEL5_1, P1MSEL4_0, PG5_FN),
383 PINMUX_DATA(HAC_RES_MARK, P1MSEL5_0, P1MSEL4_1, PG5_FN),
384
385 /* PH FN */
386 PINMUX_DATA(DACK3_MARK, P2MSEL4_0, PH7_FN),
387 PINMUX_DATA(SDIF0CMD_MARK, P2MSEL4_1, PH7_FN),
388 PINMUX_DATA(DACK2_MARK, P2MSEL4_0, PH6_FN),
389 PINMUX_DATA(SDIF0CD_MARK, P2MSEL4_1, PH6_FN),
390 PINMUX_DATA(DREQ3_MARK, P2MSEL4_0, PH5_FN),
391 PINMUX_DATA(SDIF0WP_MARK, P2MSEL4_1, PH5_FN),
392 PINMUX_DATA(DREQ2_MARK, P2MSEL3_0, P2MSEL2_1, PH4_FN),
393 PINMUX_DATA(SDIF0CLK_MARK, P2MSEL3_1, P2MSEL2_0, PH4_FN),
394 PINMUX_DATA(SCIF0_CTS_MARK, P2MSEL3_0, P2MSEL2_0, PH4_FN),
395 PINMUX_DATA(SDIF0D3_MARK, P2MSEL1_1, P2MSEL0_0, PH3_FN),
396 PINMUX_DATA(SCIF0_RTS_MARK, P2MSEL1_0, P2MSEL0_0, PH3_FN),
397 PINMUX_DATA(IRL7_MARK, P2MSEL1_0, P2MSEL0_1, PH3_FN),
398 PINMUX_DATA(SDIF0D2_MARK, P2MSEL1_1, P2MSEL0_0, PH2_FN),
399 PINMUX_DATA(SCIF0_SCK_MARK, P2MSEL1_0, P2MSEL0_0, PH2_FN),
400 PINMUX_DATA(IRL6_MARK, P2MSEL1_0, P2MSEL0_1, PH2_FN),
401 PINMUX_DATA(SDIF0D1_MARK, P2MSEL1_1, P2MSEL0_0, PH1_FN),
402 PINMUX_DATA(SCIF0_RXD_MARK, P2MSEL1_0, P2MSEL0_0, PH1_FN),
403 PINMUX_DATA(IRL5_MARK, P2MSEL1_0, P2MSEL0_1, PH1_FN),
404 PINMUX_DATA(SDIF0D0_MARK, P2MSEL1_1, P2MSEL0_0, PH0_FN),
405 PINMUX_DATA(SCIF0_TXD_MARK, P2MSEL1_0, P2MSEL0_0, PH0_FN),
406 PINMUX_DATA(IRL4_MARK, P2MSEL1_0, P2MSEL0_1, PH0_FN),
407
408 /* PJ FN */
409 PINMUX_DATA(SCIF5_SCK_MARK, P2MSEL11_1, PJ7_FN),
410 PINMUX_DATA(FRB_MARK, P2MSEL11_0, PJ7_FN),
411 PINMUX_DATA(SCIF5_RXD_MARK, P2MSEL10_0, PJ6_FN),
412 PINMUX_DATA(IOIS16_MARK, P2MSEL10_1, PJ6_FN),
413 PINMUX_DATA(SCIF5_TXD_MARK, P2MSEL10_0, PJ5_FN),
414 PINMUX_DATA(CE2B_MARK, P2MSEL10_1, PJ5_FN),
415 PINMUX_DATA(DRAK3_MARK, P2MSEL7_0, PJ4_FN),
416 PINMUX_DATA(CE2A_MARK, P2MSEL7_1, PJ4_FN),
417 PINMUX_DATA(SCIF4_SCK_MARK, P2MSEL9_0, P2MSEL8_0, PJ3_FN),
418 PINMUX_DATA(DRAK2_MARK, P2MSEL9_0, P2MSEL8_1, PJ3_FN),
419 PINMUX_DATA(SSI3_WS_MARK, P2MSEL9_1, P2MSEL8_0, PJ3_FN),
420 PINMUX_DATA(SCIF4_RXD_MARK, P2MSEL6_1, P2MSEL5_0, PJ2_FN),
421 PINMUX_DATA(DRAK1_MARK, P2MSEL6_0, P2MSEL5_1, PJ2_FN),
422 PINMUX_DATA(FSTATUS_MARK, P2MSEL6_0, P2MSEL5_0, PJ2_FN),
423 PINMUX_DATA(SSI3_SDATA_MARK, P2MSEL6_1, P2MSEL5_1, PJ2_FN),
424 PINMUX_DATA(SCIF4_TXD_MARK, P2MSEL6_1, P2MSEL5_0, PJ1_FN),
425 PINMUX_DATA(DRAK0_MARK, P2MSEL6_0, P2MSEL5_1, PJ1_FN),
426 PINMUX_DATA(FSE_MARK, P2MSEL6_0, P2MSEL5_0, PJ1_FN),
427 PINMUX_DATA(SSI3_SCK_MARK, P2MSEL6_1, P2MSEL5_1, PJ1_FN),
428};
429
430static struct pinmux_gpio pinmux_gpios[] = {
431 /* PA */
432 PINMUX_GPIO(GPIO_PA7, PA7_DATA),
433 PINMUX_GPIO(GPIO_PA6, PA6_DATA),
434 PINMUX_GPIO(GPIO_PA5, PA5_DATA),
435 PINMUX_GPIO(GPIO_PA4, PA4_DATA),
436 PINMUX_GPIO(GPIO_PA3, PA3_DATA),
437 PINMUX_GPIO(GPIO_PA2, PA2_DATA),
438 PINMUX_GPIO(GPIO_PA1, PA1_DATA),
439 PINMUX_GPIO(GPIO_PA0, PA0_DATA),
440
441 /* PB */
442 PINMUX_GPIO(GPIO_PB7, PB7_DATA),
443 PINMUX_GPIO(GPIO_PB6, PB6_DATA),
444 PINMUX_GPIO(GPIO_PB5, PB5_DATA),
445 PINMUX_GPIO(GPIO_PB4, PB4_DATA),
446 PINMUX_GPIO(GPIO_PB3, PB3_DATA),
447 PINMUX_GPIO(GPIO_PB2, PB2_DATA),
448 PINMUX_GPIO(GPIO_PB1, PB1_DATA),
449 PINMUX_GPIO(GPIO_PB0, PB0_DATA),
450
451 /* PC */
452 PINMUX_GPIO(GPIO_PC7, PC7_DATA),
453 PINMUX_GPIO(GPIO_PC6, PC6_DATA),
454 PINMUX_GPIO(GPIO_PC5, PC5_DATA),
455 PINMUX_GPIO(GPIO_PC4, PC4_DATA),
456 PINMUX_GPIO(GPIO_PC3, PC3_DATA),
457 PINMUX_GPIO(GPIO_PC2, PC2_DATA),
458 PINMUX_GPIO(GPIO_PC1, PC1_DATA),
459 PINMUX_GPIO(GPIO_PC0, PC0_DATA),
460
461 /* PD */
462 PINMUX_GPIO(GPIO_PD7, PD7_DATA),
463 PINMUX_GPIO(GPIO_PD6, PD6_DATA),
464 PINMUX_GPIO(GPIO_PD5, PD5_DATA),
465 PINMUX_GPIO(GPIO_PD4, PD4_DATA),
466 PINMUX_GPIO(GPIO_PD3, PD3_DATA),
467 PINMUX_GPIO(GPIO_PD2, PD2_DATA),
468 PINMUX_GPIO(GPIO_PD1, PD1_DATA),
469 PINMUX_GPIO(GPIO_PD0, PD0_DATA),
470
471 /* PE */
472 PINMUX_GPIO(GPIO_PE7, PE7_DATA),
473 PINMUX_GPIO(GPIO_PE6, PE6_DATA),
474
475 /* PF */
476 PINMUX_GPIO(GPIO_PF7, PF7_DATA),
477 PINMUX_GPIO(GPIO_PF6, PF6_DATA),
478 PINMUX_GPIO(GPIO_PF5, PF5_DATA),
479 PINMUX_GPIO(GPIO_PF4, PF4_DATA),
480 PINMUX_GPIO(GPIO_PF3, PF3_DATA),
481 PINMUX_GPIO(GPIO_PF2, PF2_DATA),
482 PINMUX_GPIO(GPIO_PF1, PF1_DATA),
483 PINMUX_GPIO(GPIO_PF0, PF0_DATA),
484
485 /* PG */
486 PINMUX_GPIO(GPIO_PG7, PG7_DATA),
487 PINMUX_GPIO(GPIO_PG6, PG6_DATA),
488 PINMUX_GPIO(GPIO_PG5, PG5_DATA),
489
490 /* PH */
491 PINMUX_GPIO(GPIO_PH7, PH7_DATA),
492 PINMUX_GPIO(GPIO_PH6, PH6_DATA),
493 PINMUX_GPIO(GPIO_PH5, PH5_DATA),
494 PINMUX_GPIO(GPIO_PH4, PH4_DATA),
495 PINMUX_GPIO(GPIO_PH3, PH3_DATA),
496 PINMUX_GPIO(GPIO_PH2, PH2_DATA),
497 PINMUX_GPIO(GPIO_PH1, PH1_DATA),
498 PINMUX_GPIO(GPIO_PH0, PH0_DATA),
499
500 /* PJ */
501 PINMUX_GPIO(GPIO_PJ7, PJ7_DATA),
502 PINMUX_GPIO(GPIO_PJ6, PJ6_DATA),
503 PINMUX_GPIO(GPIO_PJ5, PJ5_DATA),
504 PINMUX_GPIO(GPIO_PJ4, PJ4_DATA),
505 PINMUX_GPIO(GPIO_PJ3, PJ3_DATA),
506 PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),
507 PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),
508
509 /* FN */
510 PINMUX_GPIO(GPIO_FN_CDE, CDE_MARK),
511 PINMUX_GPIO(GPIO_FN_ETH_MAGIC, ETH_MAGIC_MARK),
512 PINMUX_GPIO(GPIO_FN_DISP, DISP_MARK),
513 PINMUX_GPIO(GPIO_FN_ETH_LINK, ETH_LINK_MARK),
514 PINMUX_GPIO(GPIO_FN_DR5, DR5_MARK),
515 PINMUX_GPIO(GPIO_FN_ETH_TX_ER, ETH_TX_ER_MARK),
516 PINMUX_GPIO(GPIO_FN_DR4, DR4_MARK),
517 PINMUX_GPIO(GPIO_FN_ETH_TX_EN, ETH_TX_EN_MARK),
518 PINMUX_GPIO(GPIO_FN_DR3, DR3_MARK),
519 PINMUX_GPIO(GPIO_FN_ETH_TXD3, ETH_TXD3_MARK),
520 PINMUX_GPIO(GPIO_FN_DR2, DR2_MARK),
521 PINMUX_GPIO(GPIO_FN_ETH_TXD2, ETH_TXD2_MARK),
522 PINMUX_GPIO(GPIO_FN_DR1, DR1_MARK),
523 PINMUX_GPIO(GPIO_FN_ETH_TXD1, ETH_TXD1_MARK),
524 PINMUX_GPIO(GPIO_FN_DR0, DR0_MARK),
525 PINMUX_GPIO(GPIO_FN_ETH_TXD0, ETH_TXD0_MARK),
526 PINMUX_GPIO(GPIO_FN_VSYNC, VSYNC_MARK),
527 PINMUX_GPIO(GPIO_FN_HSPI_CLK, HSPI_CLK_MARK),
528 PINMUX_GPIO(GPIO_FN_ODDF, ODDF_MARK),
529 PINMUX_GPIO(GPIO_FN_HSPI_CS, HSPI_CS_MARK),
530 PINMUX_GPIO(GPIO_FN_DG5, DG5_MARK),
531 PINMUX_GPIO(GPIO_FN_ETH_MDIO, ETH_MDIO_MARK),
532 PINMUX_GPIO(GPIO_FN_DG4, DG4_MARK),
533 PINMUX_GPIO(GPIO_FN_ETH_RX_CLK, ETH_RX_CLK_MARK),
534 PINMUX_GPIO(GPIO_FN_DG3, DG3_MARK),
535 PINMUX_GPIO(GPIO_FN_ETH_MDC, ETH_MDC_MARK),
536 PINMUX_GPIO(GPIO_FN_DG2, DG2_MARK),
537 PINMUX_GPIO(GPIO_FN_ETH_COL, ETH_COL_MARK),
538 PINMUX_GPIO(GPIO_FN_DG1, DG1_MARK),
539 PINMUX_GPIO(GPIO_FN_ETH_TX_CLK, ETH_TX_CLK_MARK),
540 PINMUX_GPIO(GPIO_FN_DG0, DG0_MARK),
541 PINMUX_GPIO(GPIO_FN_ETH_CRS, ETH_CRS_MARK),
542 PINMUX_GPIO(GPIO_FN_DCLKIN, DCLKIN_MARK),
543 PINMUX_GPIO(GPIO_FN_HSPI_RX, HSPI_RX_MARK),
544 PINMUX_GPIO(GPIO_FN_HSYNC, HSYNC_MARK),
545 PINMUX_GPIO(GPIO_FN_HSPI_TX, HSPI_TX_MARK),
546 PINMUX_GPIO(GPIO_FN_DB5, DB5_MARK),
547 PINMUX_GPIO(GPIO_FN_ETH_RXD3, ETH_RXD3_MARK),
548 PINMUX_GPIO(GPIO_FN_DB4, DB4_MARK),
549 PINMUX_GPIO(GPIO_FN_ETH_RXD2, ETH_RXD2_MARK),
550 PINMUX_GPIO(GPIO_FN_DB3, DB3_MARK),
551 PINMUX_GPIO(GPIO_FN_ETH_RXD1, ETH_RXD1_MARK),
552 PINMUX_GPIO(GPIO_FN_DB2, DB2_MARK),
553 PINMUX_GPIO(GPIO_FN_ETH_RXD0, ETH_RXD0_MARK),
554 PINMUX_GPIO(GPIO_FN_DB1, DB1_MARK),
555 PINMUX_GPIO(GPIO_FN_ETH_RX_DV, ETH_RX_DV_MARK),
556 PINMUX_GPIO(GPIO_FN_DB0, DB0_MARK),
557 PINMUX_GPIO(GPIO_FN_ETH_RX_ER, ETH_RX_ER_MARK),
558 PINMUX_GPIO(GPIO_FN_DCLKOUT, DCLKOUT_MARK),
559 PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK),
560 PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK),
561 PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK),
562 PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
563 PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK),
564 PINMUX_GPIO(GPIO_FN_FALE, FALE_MARK),
565 PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
566 PINMUX_GPIO(GPIO_FN_FCLE, FCLE_MARK),
567 PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
568 PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK),
569 PINMUX_GPIO(GPIO_FN_USB_OVC1, USB_OVC1_MARK),
570 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
571 PINMUX_GPIO(GPIO_FN_USB_OVC0, USB_OVC0_MARK),
572 PINMUX_GPIO(GPIO_FN_USB_PENC1, USB_PENC1_MARK),
573 PINMUX_GPIO(GPIO_FN_USB_PENC0, USB_PENC0_MARK),
574 PINMUX_GPIO(GPIO_FN_HAC1_SDOUT, HAC1_SDOUT_MARK),
575 PINMUX_GPIO(GPIO_FN_SSI1_SDATA, SSI1_SDATA_MARK),
576 PINMUX_GPIO(GPIO_FN_SDIF1CMD, SDIF1CMD_MARK),
577 PINMUX_GPIO(GPIO_FN_HAC1_SDIN, HAC1_SDIN_MARK),
578 PINMUX_GPIO(GPIO_FN_SSI1_SCK, SSI1_SCK_MARK),
579 PINMUX_GPIO(GPIO_FN_SDIF1CD, SDIF1CD_MARK),
580 PINMUX_GPIO(GPIO_FN_HAC1_SYNC, HAC1_SYNC_MARK),
581 PINMUX_GPIO(GPIO_FN_SSI1_WS, SSI1_WS_MARK),
582 PINMUX_GPIO(GPIO_FN_SDIF1WP, SDIF1WP_MARK),
583 PINMUX_GPIO(GPIO_FN_HAC1_BITCLK, HAC1_BITCLK_MARK),
584 PINMUX_GPIO(GPIO_FN_SSI1_CLK, SSI1_CLK_MARK),
585 PINMUX_GPIO(GPIO_FN_SDIF1CLK, SDIF1CLK_MARK),
586 PINMUX_GPIO(GPIO_FN_HAC0_SDOUT, HAC0_SDOUT_MARK),
587 PINMUX_GPIO(GPIO_FN_SSI0_SDATA, SSI0_SDATA_MARK),
588 PINMUX_GPIO(GPIO_FN_SDIF1D3, SDIF1D3_MARK),
589 PINMUX_GPIO(GPIO_FN_HAC0_SDIN, HAC0_SDIN_MARK),
590 PINMUX_GPIO(GPIO_FN_SSI0_SCK, SSI0_SCK_MARK),
591 PINMUX_GPIO(GPIO_FN_SDIF1D2, SDIF1D2_MARK),
592 PINMUX_GPIO(GPIO_FN_HAC0_SYNC, HAC0_SYNC_MARK),
593 PINMUX_GPIO(GPIO_FN_SSI0_WS, SSI0_WS_MARK),
594 PINMUX_GPIO(GPIO_FN_SDIF1D1, SDIF1D1_MARK),
595 PINMUX_GPIO(GPIO_FN_HAC0_BITCLK, HAC0_BITCLK_MARK),
596 PINMUX_GPIO(GPIO_FN_SSI0_CLK, SSI0_CLK_MARK),
597 PINMUX_GPIO(GPIO_FN_SDIF1D0, SDIF1D0_MARK),
598 PINMUX_GPIO(GPIO_FN_SCIF3_SCK, SCIF3_SCK_MARK),
599 PINMUX_GPIO(GPIO_FN_SSI2_SDATA, SSI2_SDATA_MARK),
600 PINMUX_GPIO(GPIO_FN_SCIF3_RXD, SCIF3_RXD_MARK),
601 PINMUX_GPIO(GPIO_FN_TCLK, TCLK_MARK),
602 PINMUX_GPIO(GPIO_FN_SSI2_SCK, SSI2_SCK_MARK),
603 PINMUX_GPIO(GPIO_FN_SCIF3_TXD, SCIF3_TXD_MARK),
604 PINMUX_GPIO(GPIO_FN_HAC_RES, HAC_RES_MARK),
605 PINMUX_GPIO(GPIO_FN_SSI2_WS, SSI2_WS_MARK),
606 PINMUX_GPIO(GPIO_FN_DACK3, DACK3_MARK),
607 PINMUX_GPIO(GPIO_FN_SDIF0CMD, SDIF0CMD_MARK),
608 PINMUX_GPIO(GPIO_FN_DACK2, DACK2_MARK),
609 PINMUX_GPIO(GPIO_FN_SDIF0CD, SDIF0CD_MARK),
610 PINMUX_GPIO(GPIO_FN_DREQ3, DREQ3_MARK),
611 PINMUX_GPIO(GPIO_FN_SDIF0WP, SDIF0WP_MARK),
612 PINMUX_GPIO(GPIO_FN_SCIF0_CTS, SCIF0_CTS_MARK),
613 PINMUX_GPIO(GPIO_FN_DREQ2, DREQ2_MARK),
614 PINMUX_GPIO(GPIO_FN_SDIF0CLK, SDIF0CLK_MARK),
615 PINMUX_GPIO(GPIO_FN_SCIF0_RTS, SCIF0_RTS_MARK),
616 PINMUX_GPIO(GPIO_FN_IRL7, IRL7_MARK),
617 PINMUX_GPIO(GPIO_FN_SDIF0D3, SDIF0D3_MARK),
618 PINMUX_GPIO(GPIO_FN_SCIF0_SCK, SCIF0_SCK_MARK),
619 PINMUX_GPIO(GPIO_FN_IRL6, IRL6_MARK),
620 PINMUX_GPIO(GPIO_FN_SDIF0D2, SDIF0D2_MARK),
621 PINMUX_GPIO(GPIO_FN_SCIF0_RXD, SCIF0_RXD_MARK),
622 PINMUX_GPIO(GPIO_FN_IRL5, IRL5_MARK),
623 PINMUX_GPIO(GPIO_FN_SDIF0D1, SDIF0D1_MARK),
624 PINMUX_GPIO(GPIO_FN_SCIF0_TXD, SCIF0_TXD_MARK),
625 PINMUX_GPIO(GPIO_FN_IRL4, IRL4_MARK),
626 PINMUX_GPIO(GPIO_FN_SDIF0D0, SDIF0D0_MARK),
627 PINMUX_GPIO(GPIO_FN_SCIF5_SCK, SCIF5_SCK_MARK),
628 PINMUX_GPIO(GPIO_FN_FRB, FRB_MARK),
629 PINMUX_GPIO(GPIO_FN_SCIF5_RXD, SCIF5_RXD_MARK),
630 PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
631 PINMUX_GPIO(GPIO_FN_SCIF5_TXD, SCIF5_TXD_MARK),
632 PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK),
633 PINMUX_GPIO(GPIO_FN_DRAK3, DRAK3_MARK),
634 PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK),
635 PINMUX_GPIO(GPIO_FN_SCIF4_SCK, SCIF4_SCK_MARK),
636 PINMUX_GPIO(GPIO_FN_DRAK2, DRAK2_MARK),
637 PINMUX_GPIO(GPIO_FN_SSI3_WS, SSI3_WS_MARK),
638 PINMUX_GPIO(GPIO_FN_SCIF4_RXD, SCIF4_RXD_MARK),
639 PINMUX_GPIO(GPIO_FN_DRAK1, DRAK1_MARK),
640 PINMUX_GPIO(GPIO_FN_SSI3_SDATA, SSI3_SDATA_MARK),
641 PINMUX_GPIO(GPIO_FN_FSTATUS, FSTATUS_MARK),
642 PINMUX_GPIO(GPIO_FN_SCIF4_TXD, SCIF4_TXD_MARK),
643 PINMUX_GPIO(GPIO_FN_DRAK0, DRAK0_MARK),
644 PINMUX_GPIO(GPIO_FN_SSI3_SCK, SSI3_SCK_MARK),
645 PINMUX_GPIO(GPIO_FN_FSE, FSE_MARK),
646};
647
648static struct pinmux_cfg_reg pinmux_config_regs[] = {
649 { PINMUX_CFG_REG("PACR", 0xffcc0000, 16, 2) {
650 PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU,
651 PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU,
652 PA5_FN, PA5_OUT, PA5_IN, PA5_IN_PU,
653 PA4_FN, PA4_OUT, PA4_IN, PA4_IN_PU,
654 PA3_FN, PA3_OUT, PA3_IN, PA3_IN_PU,
655 PA2_FN, PA2_OUT, PA2_IN, PA2_IN_PU,
656 PA1_FN, PA1_OUT, PA1_IN, PA1_IN_PU,
657 PA0_FN, PA0_OUT, PA0_IN, PA0_IN_PU }
658 },
659 { PINMUX_CFG_REG("PBCR", 0xffcc0002, 16, 2) {
660 PB7_FN, PB7_OUT, PB7_IN, PB7_IN_PU,
661 PB6_FN, PB6_OUT, PB6_IN, PB6_IN_PU,
662 PB5_FN, PB5_OUT, PB5_IN, PB5_IN_PU,
663 PB4_FN, PB4_OUT, PB4_IN, PB4_IN_PU,
664 PB3_FN, PB3_OUT, PB3_IN, PB3_IN_PU,
665 PB2_FN, PB2_OUT, PB2_IN, PB2_IN_PU,
666 PB1_FN, PB1_OUT, PB1_IN, PB1_IN_PU,
667 PB0_FN, PB0_OUT, PB0_IN, PB0_IN_PU }
668 },
669 { PINMUX_CFG_REG("PCCR", 0xffcc0004, 16, 2) {
670 PC7_FN, PC7_OUT, PC7_IN, PC7_IN_PU,
671 PC6_FN, PC6_OUT, PC6_IN, PC6_IN_PU,
672 PC5_FN, PC5_OUT, PC5_IN, PC5_IN_PU,
673 PC4_FN, PC4_OUT, PC4_IN, PC4_IN_PU,
674 PC3_FN, PC3_OUT, PC3_IN, PC3_IN_PU,
675 PC2_FN, PC2_OUT, PC2_IN, PC2_IN_PU,
676 PC1_FN, PC1_OUT, PC1_IN, PC1_IN_PU,
677 PC0_FN, PC0_OUT, PC0_IN, PC0_IN_PU }
678 },
679 { PINMUX_CFG_REG("PDCR", 0xffcc0006, 16, 2) {
680 PD7_FN, PD7_OUT, PD7_IN, PD7_IN_PU,
681 PD6_FN, PD6_OUT, PD6_IN, PD6_IN_PU,
682 PD5_FN, PD5_OUT, PD5_IN, PD5_IN_PU,
683 PD4_FN, PD4_OUT, PD4_IN, PD4_IN_PU,
684 PD3_FN, PD3_OUT, PD3_IN, PD3_IN_PU,
685 PD2_FN, PD2_OUT, PD2_IN, PD2_IN_PU,
686 PD1_FN, PD1_OUT, PD1_IN, PD1_IN_PU,
687 PD0_FN, PD0_OUT, PD0_IN, PD0_IN_PU }
688 },
689 { PINMUX_CFG_REG("PECR", 0xffcc0008, 16, 2) {
690 PE7_FN, PE7_OUT, PE7_IN, PE7_IN_PU,
691 PE6_FN, PE6_OUT, PE6_IN, PE6_IN_PU,
692 0, 0, 0, 0,
693 0, 0, 0, 0,
694 0, 0, 0, 0,
695 0, 0, 0, 0,
696 0, 0, 0, 0,
697 0, 0, 0, 0, }
698 },
699 { PINMUX_CFG_REG("PFCR", 0xffcc000a, 16, 2) {
700 PF7_FN, PF7_OUT, PF7_IN, PF7_IN_PU,
701 PF6_FN, PF6_OUT, PF6_IN, PF6_IN_PU,
702 PF5_FN, PF5_OUT, PF5_IN, PF5_IN_PU,
703 PF4_FN, PF4_OUT, PF4_IN, PF4_IN_PU,
704 PF3_FN, PF3_OUT, PF3_IN, PF3_IN_PU,
705 PF2_FN, PF2_OUT, PF2_IN, PF2_IN_PU,
706 PF1_FN, PF1_OUT, PF1_IN, PF1_IN_PU,
707 PF0_FN, PF0_OUT, PF0_IN, PF0_IN_PU }
708 },
709 { PINMUX_CFG_REG("PGCR", 0xffcc000c, 16, 2) {
710 PG7_FN, PG7_OUT, PG7_IN, PG7_IN_PU,
711 PG6_FN, PG6_OUT, PG6_IN, PG6_IN_PU,
712 PG5_FN, PG5_OUT, PG5_IN, PG5_IN_PU,
713 0, 0, 0, 0,
714 0, 0, 0, 0,
715 0, 0, 0, 0,
716 0, 0, 0, 0,
717 0, 0, 0, 0, }
718 },
719 { PINMUX_CFG_REG("PHCR", 0xffcc000e, 16, 2) {
720 PH7_FN, PH7_OUT, PH7_IN, PH7_IN_PU,
721 PH6_FN, PH6_OUT, PH6_IN, PH6_IN_PU,
722 PH5_FN, PH5_OUT, PH5_IN, PH5_IN_PU,
723 PH4_FN, PH4_OUT, PH4_IN, PH4_IN_PU,
724 PH3_FN, PH3_OUT, PH3_IN, PH3_IN_PU,
725 PH2_FN, PH2_OUT, PH2_IN, PH2_IN_PU,
726 PH1_FN, PH1_OUT, PH1_IN, PH1_IN_PU,
727 PH0_FN, PH0_OUT, PH0_IN, PH0_IN_PU }
728 },
729 { PINMUX_CFG_REG("PJCR", 0xffcc0010, 16, 2) {
730 PJ7_FN, PJ7_OUT, PJ7_IN, PJ7_IN_PU,
731 PJ6_FN, PJ6_OUT, PJ6_IN, PJ6_IN_PU,
732 PJ5_FN, PJ5_OUT, PJ5_IN, PJ5_IN_PU,
733 PJ4_FN, PJ4_OUT, PJ4_IN, PJ4_IN_PU,
734 PJ3_FN, PJ3_OUT, PJ3_IN, PJ3_IN_PU,
735 PJ2_FN, PJ2_OUT, PJ2_IN, PJ2_IN_PU,
736 PJ1_FN, PJ1_OUT, PJ1_IN, PJ1_IN_PU,
737 0, 0, 0, 0, }
738 },
739 { PINMUX_CFG_REG("P1MSELR", 0xffcc0080, 16, 1) {
740 0, 0,
741 P1MSEL14_0, P1MSEL14_1,
742 P1MSEL13_0, P1MSEL13_1,
743 P1MSEL12_0, P1MSEL12_1,
744 P1MSEL11_0, P1MSEL11_1,
745 P1MSEL10_0, P1MSEL10_1,
746 P1MSEL9_0, P1MSEL9_1,
747 P1MSEL8_0, P1MSEL8_1,
748 P1MSEL7_0, P1MSEL7_1,
749 P1MSEL6_0, P1MSEL6_1,
750 P1MSEL5_0, P1MSEL5_1,
751 P1MSEL4_0, P1MSEL4_1,
752 P1MSEL3_0, P1MSEL3_1,
753 P1MSEL2_0, P1MSEL2_1,
754 P1MSEL1_0, P1MSEL1_1,
755 P1MSEL0_0, P1MSEL0_1 }
756 },
757 { PINMUX_CFG_REG("P2MSELR", 0xffcc0082, 16, 1) {
758 P2MSEL15_0, P2MSEL15_1,
759 P2MSEL14_0, P2MSEL14_1,
760 P2MSEL13_0, P2MSEL13_1,
761 P2MSEL12_0, P2MSEL12_1,
762 P2MSEL11_0, P2MSEL11_1,
763 P2MSEL10_0, P2MSEL10_1,
764 P2MSEL9_0, P2MSEL9_1,
765 P2MSEL8_0, P2MSEL8_1,
766 P2MSEL7_0, P2MSEL7_1,
767 P2MSEL6_0, P2MSEL6_1,
768 P2MSEL5_0, P2MSEL5_1,
769 P2MSEL4_0, P2MSEL4_1,
770 P2MSEL3_0, P2MSEL3_1,
771 P2MSEL2_0, P2MSEL2_1,
772 P2MSEL1_0, P2MSEL1_1,
773 P2MSEL0_0, P2MSEL0_1 }
774 },
775 {}
776};
777
778static struct pinmux_data_reg pinmux_data_regs[] = {
779 { PINMUX_DATA_REG("PADR", 0xffcc0020, 8) {
780 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
781 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA }
782 },
783 { PINMUX_DATA_REG("PBDR", 0xffcc0022, 8) {
784 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
785 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA }
786 },
787 { PINMUX_DATA_REG("PCDR", 0xffcc0024, 8) {
788 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
789 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
790 },
791 { PINMUX_DATA_REG("PDDR", 0xffcc0026, 8) {
792 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
793 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
794 },
795 { PINMUX_DATA_REG("PEDR", 0xffcc0028, 8) {
796 PE7_DATA, PE6_DATA,
797 0, 0, 0, 0, 0, 0 }
798 },
799 { PINMUX_DATA_REG("PFDR", 0xffcc002a, 8) {
800 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
801 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
802 },
803 { PINMUX_DATA_REG("PGDR", 0xffcc002c, 8) {
804 PG7_DATA, PG6_DATA, PG5_DATA, 0,
805 0, 0, 0, 0 }
806 },
807 { PINMUX_DATA_REG("PHDR", 0xffcc002e, 8) {
808 PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
809 PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA }
810 },
811 { PINMUX_DATA_REG("PJDR", 0xffcc0030, 8) {
812 PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
813 PJ3_DATA, PJ2_DATA, PJ1_DATA, 0 }
814 },
815 { },
816};
817
818struct sh_pfc_soc_info sh7786_pinmux_info = {
819 .name = "sh7786_pfc",
820 .reserved_id = PINMUX_RESERVED,
821 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
822 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
823 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
824 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
825 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
826 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
827
828 .first_gpio = GPIO_PA7,
829 .last_gpio = GPIO_FN_IRL4,
830
831 .gpios = pinmux_gpios,
832 .cfg_regs = pinmux_config_regs,
833 .data_regs = pinmux_data_regs,
834
835 .gpio_data = pinmux_data,
836 .gpio_data_size = ARRAY_SIZE(pinmux_data),
837};
diff --git a/drivers/pinctrl/sh-pfc/pfc-shx3.c b/drivers/pinctrl/sh-pfc/pfc-shx3.c
new file mode 100644
index 000000000000..ccf6918b03c6
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/pfc-shx3.c
@@ -0,0 +1,582 @@
1/*
2 * SH-X3 prototype CPU pinmux
3 *
4 * Copyright (C) 2010 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/init.h>
11#include <linux/kernel.h>
12#include <cpu/shx3.h>
13
14#include "sh_pfc.h"
15
16enum {
17 PINMUX_RESERVED = 0,
18
19 PINMUX_DATA_BEGIN,
20 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
21 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
22 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
23 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
24 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
25 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
26 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
27 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
28 PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
29 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
30 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
31 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
32 PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
33 PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
34
35 PH5_DATA, PH4_DATA,
36 PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
37 PINMUX_DATA_END,
38
39 PINMUX_INPUT_BEGIN,
40 PA7_IN, PA6_IN, PA5_IN, PA4_IN,
41 PA3_IN, PA2_IN, PA1_IN, PA0_IN,
42 PB7_IN, PB6_IN, PB5_IN, PB4_IN,
43 PB3_IN, PB2_IN, PB1_IN, PB0_IN,
44 PC7_IN, PC6_IN, PC5_IN, PC4_IN,
45 PC3_IN, PC2_IN, PC1_IN, PC0_IN,
46 PD7_IN, PD6_IN, PD5_IN, PD4_IN,
47 PD3_IN, PD2_IN, PD1_IN, PD0_IN,
48 PE7_IN, PE6_IN, PE5_IN, PE4_IN,
49 PE3_IN, PE2_IN, PE1_IN, PE0_IN,
50 PF7_IN, PF6_IN, PF5_IN, PF4_IN,
51 PF3_IN, PF2_IN, PF1_IN, PF0_IN,
52 PG7_IN, PG6_IN, PG5_IN, PG4_IN,
53 PG3_IN, PG2_IN, PG1_IN, PG0_IN,
54
55 PH5_IN, PH4_IN,
56 PH3_IN, PH2_IN, PH1_IN, PH0_IN,
57 PINMUX_INPUT_END,
58
59 PINMUX_INPUT_PULLUP_BEGIN,
60 PA7_IN_PU, PA6_IN_PU, PA5_IN_PU, PA4_IN_PU,
61 PA3_IN_PU, PA2_IN_PU, PA1_IN_PU, PA0_IN_PU,
62 PB7_IN_PU, PB6_IN_PU, PB5_IN_PU, PB4_IN_PU,
63 PB3_IN_PU, PB2_IN_PU, PB1_IN_PU, PB0_IN_PU,
64 PC7_IN_PU, PC6_IN_PU, PC5_IN_PU, PC4_IN_PU,
65 PC3_IN_PU, PC2_IN_PU, PC1_IN_PU, PC0_IN_PU,
66 PD7_IN_PU, PD6_IN_PU, PD5_IN_PU, PD4_IN_PU,
67 PD3_IN_PU, PD2_IN_PU, PD1_IN_PU, PD0_IN_PU,
68 PE7_IN_PU, PE6_IN_PU, PE5_IN_PU, PE4_IN_PU,
69 PE3_IN_PU, PE2_IN_PU, PE1_IN_PU, PE0_IN_PU,
70 PF7_IN_PU, PF6_IN_PU, PF5_IN_PU, PF4_IN_PU,
71 PF3_IN_PU, PF2_IN_PU, PF1_IN_PU, PF0_IN_PU,
72 PG7_IN_PU, PG6_IN_PU, PG5_IN_PU, PG4_IN_PU,
73 PG3_IN_PU, PG2_IN_PU, PG1_IN_PU, PG0_IN_PU,
74
75 PH5_IN_PU, PH4_IN_PU,
76 PH3_IN_PU, PH2_IN_PU, PH1_IN_PU, PH0_IN_PU,
77 PINMUX_INPUT_PULLUP_END,
78
79 PINMUX_OUTPUT_BEGIN,
80 PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
81 PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
82 PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
83 PB3_OUT, PB2_OUT, PB1_OUT, PB0_OUT,
84 PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
85 PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
86 PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
87 PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
88 PE7_OUT, PE6_OUT, PE5_OUT, PE4_OUT,
89 PE3_OUT, PE2_OUT, PE1_OUT, PE0_OUT,
90 PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
91 PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
92 PG7_OUT, PG6_OUT, PG5_OUT, PG4_OUT,
93 PG3_OUT, PG2_OUT, PG1_OUT, PG0_OUT,
94
95 PH5_OUT, PH4_OUT,
96 PH3_OUT, PH2_OUT, PH1_OUT, PH0_OUT,
97 PINMUX_OUTPUT_END,
98
99 PINMUX_FUNCTION_BEGIN,
100 PA7_FN, PA6_FN, PA5_FN, PA4_FN,
101 PA3_FN, PA2_FN, PA1_FN, PA0_FN,
102 PB7_FN, PB6_FN, PB5_FN, PB4_FN,
103 PB3_FN, PB2_FN, PB1_FN, PB0_FN,
104 PC7_FN, PC6_FN, PC5_FN, PC4_FN,
105 PC3_FN, PC2_FN, PC1_FN, PC0_FN,
106 PD7_FN, PD6_FN, PD5_FN, PD4_FN,
107 PD3_FN, PD2_FN, PD1_FN, PD0_FN,
108 PE7_FN, PE6_FN, PE5_FN, PE4_FN,
109 PE3_FN, PE2_FN, PE1_FN, PE0_FN,
110 PF7_FN, PF6_FN, PF5_FN, PF4_FN,
111 PF3_FN, PF2_FN, PF1_FN, PF0_FN,
112 PG7_FN, PG6_FN, PG5_FN, PG4_FN,
113 PG3_FN, PG2_FN, PG1_FN, PG0_FN,
114
115 PH5_FN, PH4_FN,
116 PH3_FN, PH2_FN, PH1_FN, PH0_FN,
117 PINMUX_FUNCTION_END,
118
119 PINMUX_MARK_BEGIN,
120
121 D31_MARK, D30_MARK, D29_MARK, D28_MARK, D27_MARK, D26_MARK,
122 D25_MARK, D24_MARK, D23_MARK, D22_MARK, D21_MARK, D20_MARK,
123 D19_MARK, D18_MARK, D17_MARK, D16_MARK,
124
125 BACK_MARK, BREQ_MARK,
126 WE3_MARK, WE2_MARK,
127 CS6_MARK, CS5_MARK, CS4_MARK,
128 CLKOUTENB_MARK,
129
130 DACK3_MARK, DACK2_MARK, DACK1_MARK, DACK0_MARK,
131 DREQ3_MARK, DREQ2_MARK, DREQ1_MARK, DREQ0_MARK,
132
133 IRQ3_MARK, IRQ2_MARK, IRQ1_MARK, IRQ0_MARK,
134
135 DRAK3_MARK, DRAK2_MARK, DRAK1_MARK, DRAK0_MARK,
136
137 SCK3_MARK, SCK2_MARK, SCK1_MARK, SCK0_MARK,
138 IRL3_MARK, IRL2_MARK, IRL1_MARK, IRL0_MARK,
139 TXD3_MARK, TXD2_MARK, TXD1_MARK, TXD0_MARK,
140 RXD3_MARK, RXD2_MARK, RXD1_MARK, RXD0_MARK,
141
142 CE2B_MARK, CE2A_MARK, IOIS16_MARK,
143 STATUS1_MARK, STATUS0_MARK,
144
145 IRQOUT_MARK,
146
147 PINMUX_MARK_END,
148};
149
150static pinmux_enum_t shx3_pinmux_data[] = {
151
152 /* PA GPIO */
153 PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU),
154 PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT, PA6_IN_PU),
155 PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT, PA5_IN_PU),
156 PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT, PA4_IN_PU),
157 PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT, PA3_IN_PU),
158 PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT, PA2_IN_PU),
159 PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT, PA1_IN_PU),
160 PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT, PA0_IN_PU),
161
162 /* PB GPIO */
163 PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT, PB7_IN_PU),
164 PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT, PB6_IN_PU),
165 PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT, PB5_IN_PU),
166 PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT, PB4_IN_PU),
167 PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT, PB3_IN_PU),
168 PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT, PB2_IN_PU),
169 PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT, PB1_IN_PU),
170 PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT, PB0_IN_PU),
171
172 /* PC GPIO */
173 PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT, PC7_IN_PU),
174 PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT, PC6_IN_PU),
175 PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT, PC5_IN_PU),
176 PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT, PC4_IN_PU),
177 PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT, PC3_IN_PU),
178 PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT, PC2_IN_PU),
179 PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT, PC1_IN_PU),
180 PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT, PC0_IN_PU),
181
182 /* PD GPIO */
183 PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT, PD7_IN_PU),
184 PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT, PD6_IN_PU),
185 PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT, PD5_IN_PU),
186 PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT, PD4_IN_PU),
187 PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT, PD3_IN_PU),
188 PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT, PD2_IN_PU),
189 PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT, PD1_IN_PU),
190 PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT, PD0_IN_PU),
191
192 /* PE GPIO */
193 PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT, PE7_IN_PU),
194 PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT, PE6_IN_PU),
195 PINMUX_DATA(PE5_DATA, PE5_IN, PE5_OUT, PE5_IN_PU),
196 PINMUX_DATA(PE4_DATA, PE4_IN, PE4_OUT, PE4_IN_PU),
197 PINMUX_DATA(PE3_DATA, PE3_IN, PE3_OUT, PE3_IN_PU),
198 PINMUX_DATA(PE2_DATA, PE2_IN, PE2_OUT, PE2_IN_PU),
199 PINMUX_DATA(PE1_DATA, PE1_IN, PE1_OUT, PE1_IN_PU),
200 PINMUX_DATA(PE0_DATA, PE0_IN, PE0_OUT, PE0_IN_PU),
201
202 /* PF GPIO */
203 PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT, PF7_IN_PU),
204 PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT, PF6_IN_PU),
205 PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT, PF5_IN_PU),
206 PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT, PF4_IN_PU),
207 PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT, PF3_IN_PU),
208 PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT, PF2_IN_PU),
209 PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT, PF1_IN_PU),
210 PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT, PF0_IN_PU),
211
212 /* PG GPIO */
213 PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT, PG7_IN_PU),
214 PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT, PG6_IN_PU),
215 PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT, PG5_IN_PU),
216 PINMUX_DATA(PG4_DATA, PG4_IN, PG4_OUT, PG4_IN_PU),
217 PINMUX_DATA(PG3_DATA, PG3_IN, PG3_OUT, PG3_IN_PU),
218 PINMUX_DATA(PG2_DATA, PG2_IN, PG2_OUT, PG2_IN_PU),
219 PINMUX_DATA(PG1_DATA, PG1_IN, PG1_OUT, PG1_IN_PU),
220 PINMUX_DATA(PG0_DATA, PG0_IN, PG0_OUT, PG0_IN_PU),
221
222 /* PH GPIO */
223 PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT, PH5_IN_PU),
224 PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT, PH4_IN_PU),
225 PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT, PH3_IN_PU),
226 PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT, PH2_IN_PU),
227 PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT, PH1_IN_PU),
228 PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT, PH0_IN_PU),
229
230 /* PA FN */
231 PINMUX_DATA(D31_MARK, PA7_FN),
232 PINMUX_DATA(D30_MARK, PA6_FN),
233 PINMUX_DATA(D29_MARK, PA5_FN),
234 PINMUX_DATA(D28_MARK, PA4_FN),
235 PINMUX_DATA(D27_MARK, PA3_FN),
236 PINMUX_DATA(D26_MARK, PA2_FN),
237 PINMUX_DATA(D25_MARK, PA1_FN),
238 PINMUX_DATA(D24_MARK, PA0_FN),
239
240 /* PB FN */
241 PINMUX_DATA(D23_MARK, PB7_FN),
242 PINMUX_DATA(D22_MARK, PB6_FN),
243 PINMUX_DATA(D21_MARK, PB5_FN),
244 PINMUX_DATA(D20_MARK, PB4_FN),
245 PINMUX_DATA(D19_MARK, PB3_FN),
246 PINMUX_DATA(D18_MARK, PB2_FN),
247 PINMUX_DATA(D17_MARK, PB1_FN),
248 PINMUX_DATA(D16_MARK, PB0_FN),
249
250 /* PC FN */
251 PINMUX_DATA(BACK_MARK, PC7_FN),
252 PINMUX_DATA(BREQ_MARK, PC6_FN),
253 PINMUX_DATA(WE3_MARK, PC5_FN),
254 PINMUX_DATA(WE2_MARK, PC4_FN),
255 PINMUX_DATA(CS6_MARK, PC3_FN),
256 PINMUX_DATA(CS5_MARK, PC2_FN),
257 PINMUX_DATA(CS4_MARK, PC1_FN),
258 PINMUX_DATA(CLKOUTENB_MARK, PC0_FN),
259
260 /* PD FN */
261 PINMUX_DATA(DACK3_MARK, PD7_FN),
262 PINMUX_DATA(DACK2_MARK, PD6_FN),
263 PINMUX_DATA(DACK1_MARK, PD5_FN),
264 PINMUX_DATA(DACK0_MARK, PD4_FN),
265 PINMUX_DATA(DREQ3_MARK, PD3_FN),
266 PINMUX_DATA(DREQ2_MARK, PD2_FN),
267 PINMUX_DATA(DREQ1_MARK, PD1_FN),
268 PINMUX_DATA(DREQ0_MARK, PD0_FN),
269
270 /* PE FN */
271 PINMUX_DATA(IRQ3_MARK, PE7_FN),
272 PINMUX_DATA(IRQ2_MARK, PE6_FN),
273 PINMUX_DATA(IRQ1_MARK, PE5_FN),
274 PINMUX_DATA(IRQ0_MARK, PE4_FN),
275 PINMUX_DATA(DRAK3_MARK, PE3_FN),
276 PINMUX_DATA(DRAK2_MARK, PE2_FN),
277 PINMUX_DATA(DRAK1_MARK, PE1_FN),
278 PINMUX_DATA(DRAK0_MARK, PE0_FN),
279
280 /* PF FN */
281 PINMUX_DATA(SCK3_MARK, PF7_FN),
282 PINMUX_DATA(SCK2_MARK, PF6_FN),
283 PINMUX_DATA(SCK1_MARK, PF5_FN),
284 PINMUX_DATA(SCK0_MARK, PF4_FN),
285 PINMUX_DATA(IRL3_MARK, PF3_FN),
286 PINMUX_DATA(IRL2_MARK, PF2_FN),
287 PINMUX_DATA(IRL1_MARK, PF1_FN),
288 PINMUX_DATA(IRL0_MARK, PF0_FN),
289
290 /* PG FN */
291 PINMUX_DATA(TXD3_MARK, PG7_FN),
292 PINMUX_DATA(TXD2_MARK, PG6_FN),
293 PINMUX_DATA(TXD1_MARK, PG5_FN),
294 PINMUX_DATA(TXD0_MARK, PG4_FN),
295 PINMUX_DATA(RXD3_MARK, PG3_FN),
296 PINMUX_DATA(RXD2_MARK, PG2_FN),
297 PINMUX_DATA(RXD1_MARK, PG1_FN),
298 PINMUX_DATA(RXD0_MARK, PG0_FN),
299
300 /* PH FN */
301 PINMUX_DATA(CE2B_MARK, PH5_FN),
302 PINMUX_DATA(CE2A_MARK, PH4_FN),
303 PINMUX_DATA(IOIS16_MARK, PH3_FN),
304 PINMUX_DATA(STATUS1_MARK, PH2_FN),
305 PINMUX_DATA(STATUS0_MARK, PH1_FN),
306 PINMUX_DATA(IRQOUT_MARK, PH0_FN),
307};
308
309static struct pinmux_gpio shx3_pinmux_gpios[] = {
310 /* PA */
311 PINMUX_GPIO(GPIO_PA7, PA7_DATA),
312 PINMUX_GPIO(GPIO_PA6, PA6_DATA),
313 PINMUX_GPIO(GPIO_PA5, PA5_DATA),
314 PINMUX_GPIO(GPIO_PA4, PA4_DATA),
315 PINMUX_GPIO(GPIO_PA3, PA3_DATA),
316 PINMUX_GPIO(GPIO_PA2, PA2_DATA),
317 PINMUX_GPIO(GPIO_PA1, PA1_DATA),
318 PINMUX_GPIO(GPIO_PA0, PA0_DATA),
319
320 /* PB */
321 PINMUX_GPIO(GPIO_PB7, PB7_DATA),
322 PINMUX_GPIO(GPIO_PB6, PB6_DATA),
323 PINMUX_GPIO(GPIO_PB5, PB5_DATA),
324 PINMUX_GPIO(GPIO_PB4, PB4_DATA),
325 PINMUX_GPIO(GPIO_PB3, PB3_DATA),
326 PINMUX_GPIO(GPIO_PB2, PB2_DATA),
327 PINMUX_GPIO(GPIO_PB1, PB1_DATA),
328 PINMUX_GPIO(GPIO_PB0, PB0_DATA),
329
330 /* PC */
331 PINMUX_GPIO(GPIO_PC7, PC7_DATA),
332 PINMUX_GPIO(GPIO_PC6, PC6_DATA),
333 PINMUX_GPIO(GPIO_PC5, PC5_DATA),
334 PINMUX_GPIO(GPIO_PC4, PC4_DATA),
335 PINMUX_GPIO(GPIO_PC3, PC3_DATA),
336 PINMUX_GPIO(GPIO_PC2, PC2_DATA),
337 PINMUX_GPIO(GPIO_PC1, PC1_DATA),
338 PINMUX_GPIO(GPIO_PC0, PC0_DATA),
339
340 /* PD */
341 PINMUX_GPIO(GPIO_PD7, PD7_DATA),
342 PINMUX_GPIO(GPIO_PD6, PD6_DATA),
343 PINMUX_GPIO(GPIO_PD5, PD5_DATA),
344 PINMUX_GPIO(GPIO_PD4, PD4_DATA),
345 PINMUX_GPIO(GPIO_PD3, PD3_DATA),
346 PINMUX_GPIO(GPIO_PD2, PD2_DATA),
347 PINMUX_GPIO(GPIO_PD1, PD1_DATA),
348 PINMUX_GPIO(GPIO_PD0, PD0_DATA),
349
350 /* PE */
351 PINMUX_GPIO(GPIO_PE7, PE7_DATA),
352 PINMUX_GPIO(GPIO_PE6, PE6_DATA),
353 PINMUX_GPIO(GPIO_PE5, PE5_DATA),
354 PINMUX_GPIO(GPIO_PE4, PE4_DATA),
355 PINMUX_GPIO(GPIO_PE3, PE3_DATA),
356 PINMUX_GPIO(GPIO_PE2, PE2_DATA),
357 PINMUX_GPIO(GPIO_PE1, PE1_DATA),
358 PINMUX_GPIO(GPIO_PE0, PE0_DATA),
359
360 /* PF */
361 PINMUX_GPIO(GPIO_PF7, PF7_DATA),
362 PINMUX_GPIO(GPIO_PF6, PF6_DATA),
363 PINMUX_GPIO(GPIO_PF5, PF5_DATA),
364 PINMUX_GPIO(GPIO_PF4, PF4_DATA),
365 PINMUX_GPIO(GPIO_PF3, PF3_DATA),
366 PINMUX_GPIO(GPIO_PF2, PF2_DATA),
367 PINMUX_GPIO(GPIO_PF1, PF1_DATA),
368 PINMUX_GPIO(GPIO_PF0, PF0_DATA),
369
370 /* PG */
371 PINMUX_GPIO(GPIO_PG7, PG7_DATA),
372 PINMUX_GPIO(GPIO_PG6, PG6_DATA),
373 PINMUX_GPIO(GPIO_PG5, PG5_DATA),
374 PINMUX_GPIO(GPIO_PG4, PG4_DATA),
375 PINMUX_GPIO(GPIO_PG3, PG3_DATA),
376 PINMUX_GPIO(GPIO_PG2, PG2_DATA),
377 PINMUX_GPIO(GPIO_PG1, PG1_DATA),
378 PINMUX_GPIO(GPIO_PG0, PG0_DATA),
379
380 /* PH */
381 PINMUX_GPIO(GPIO_PH5, PH5_DATA),
382 PINMUX_GPIO(GPIO_PH4, PH4_DATA),
383 PINMUX_GPIO(GPIO_PH3, PH3_DATA),
384 PINMUX_GPIO(GPIO_PH2, PH2_DATA),
385 PINMUX_GPIO(GPIO_PH1, PH1_DATA),
386 PINMUX_GPIO(GPIO_PH0, PH0_DATA),
387
388 /* FN */
389 PINMUX_GPIO(GPIO_FN_D31, D31_MARK),
390 PINMUX_GPIO(GPIO_FN_D30, D30_MARK),
391 PINMUX_GPIO(GPIO_FN_D29, D29_MARK),
392 PINMUX_GPIO(GPIO_FN_D28, D28_MARK),
393 PINMUX_GPIO(GPIO_FN_D27, D27_MARK),
394 PINMUX_GPIO(GPIO_FN_D26, D26_MARK),
395 PINMUX_GPIO(GPIO_FN_D25, D25_MARK),
396 PINMUX_GPIO(GPIO_FN_D24, D24_MARK),
397 PINMUX_GPIO(GPIO_FN_D23, D23_MARK),
398 PINMUX_GPIO(GPIO_FN_D22, D22_MARK),
399 PINMUX_GPIO(GPIO_FN_D21, D21_MARK),
400 PINMUX_GPIO(GPIO_FN_D20, D20_MARK),
401 PINMUX_GPIO(GPIO_FN_D19, D19_MARK),
402 PINMUX_GPIO(GPIO_FN_D18, D18_MARK),
403 PINMUX_GPIO(GPIO_FN_D17, D17_MARK),
404 PINMUX_GPIO(GPIO_FN_D16, D16_MARK),
405 PINMUX_GPIO(GPIO_FN_BACK, BACK_MARK),
406 PINMUX_GPIO(GPIO_FN_BREQ, BREQ_MARK),
407 PINMUX_GPIO(GPIO_FN_WE3, WE3_MARK),
408 PINMUX_GPIO(GPIO_FN_WE2, WE2_MARK),
409 PINMUX_GPIO(GPIO_FN_CS6, CS6_MARK),
410 PINMUX_GPIO(GPIO_FN_CS5, CS5_MARK),
411 PINMUX_GPIO(GPIO_FN_CS4, CS4_MARK),
412 PINMUX_GPIO(GPIO_FN_CLKOUTENB, CLKOUTENB_MARK),
413 PINMUX_GPIO(GPIO_FN_DACK3, DACK3_MARK),
414 PINMUX_GPIO(GPIO_FN_DACK2, DACK2_MARK),
415 PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
416 PINMUX_GPIO(GPIO_FN_DACK0, DACK0_MARK),
417 PINMUX_GPIO(GPIO_FN_DREQ3, DREQ3_MARK),
418 PINMUX_GPIO(GPIO_FN_DREQ2, DREQ2_MARK),
419 PINMUX_GPIO(GPIO_FN_DREQ1, DREQ1_MARK),
420 PINMUX_GPIO(GPIO_FN_DREQ0, DREQ0_MARK),
421 PINMUX_GPIO(GPIO_FN_IRQ3, IRQ3_MARK),
422 PINMUX_GPIO(GPIO_FN_IRQ2, IRQ2_MARK),
423 PINMUX_GPIO(GPIO_FN_IRQ1, IRQ1_MARK),
424 PINMUX_GPIO(GPIO_FN_IRQ0, IRQ0_MARK),
425 PINMUX_GPIO(GPIO_FN_DRAK3, DRAK3_MARK),
426 PINMUX_GPIO(GPIO_FN_DRAK2, DRAK2_MARK),
427 PINMUX_GPIO(GPIO_FN_DRAK1, DRAK1_MARK),
428 PINMUX_GPIO(GPIO_FN_DRAK0, DRAK0_MARK),
429 PINMUX_GPIO(GPIO_FN_SCK3, SCK3_MARK),
430 PINMUX_GPIO(GPIO_FN_SCK2, SCK2_MARK),
431 PINMUX_GPIO(GPIO_FN_SCK1, SCK1_MARK),
432 PINMUX_GPIO(GPIO_FN_SCK0, SCK0_MARK),
433 PINMUX_GPIO(GPIO_FN_IRL3, IRL3_MARK),
434 PINMUX_GPIO(GPIO_FN_IRL2, IRL2_MARK),
435 PINMUX_GPIO(GPIO_FN_IRL1, IRL1_MARK),
436 PINMUX_GPIO(GPIO_FN_IRL0, IRL0_MARK),
437 PINMUX_GPIO(GPIO_FN_TXD3, TXD3_MARK),
438 PINMUX_GPIO(GPIO_FN_TXD2, TXD2_MARK),
439 PINMUX_GPIO(GPIO_FN_TXD1, TXD1_MARK),
440 PINMUX_GPIO(GPIO_FN_TXD0, TXD0_MARK),
441 PINMUX_GPIO(GPIO_FN_RXD3, RXD3_MARK),
442 PINMUX_GPIO(GPIO_FN_RXD2, RXD2_MARK),
443 PINMUX_GPIO(GPIO_FN_RXD1, RXD1_MARK),
444 PINMUX_GPIO(GPIO_FN_RXD0, RXD0_MARK),
445 PINMUX_GPIO(GPIO_FN_CE2B, CE2B_MARK),
446 PINMUX_GPIO(GPIO_FN_CE2A, CE2A_MARK),
447 PINMUX_GPIO(GPIO_FN_IOIS16, IOIS16_MARK),
448 PINMUX_GPIO(GPIO_FN_STATUS1, STATUS1_MARK),
449 PINMUX_GPIO(GPIO_FN_STATUS0, STATUS0_MARK),
450 PINMUX_GPIO(GPIO_FN_IRQOUT, IRQOUT_MARK),
451};
452
453static struct pinmux_cfg_reg shx3_pinmux_config_regs[] = {
454 { PINMUX_CFG_REG("PABCR", 0xffc70000, 32, 2) {
455 PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU,
456 PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU,
457 PA5_FN, PA5_OUT, PA5_IN, PA5_IN_PU,
458 PA4_FN, PA4_OUT, PA4_IN, PA4_IN_PU,
459 PA3_FN, PA3_OUT, PA3_IN, PA3_IN_PU,
460 PA2_FN, PA2_OUT, PA2_IN, PA2_IN_PU,
461 PA1_FN, PA1_OUT, PA1_IN, PA1_IN_PU,
462 PA0_FN, PA0_OUT, PA0_IN, PA0_IN_PU,
463 PB7_FN, PB7_OUT, PB7_IN, PB7_IN_PU,
464 PB6_FN, PB6_OUT, PB6_IN, PB6_IN_PU,
465 PB5_FN, PB5_OUT, PB5_IN, PB5_IN_PU,
466 PB4_FN, PB4_OUT, PB4_IN, PB4_IN_PU,
467 PB3_FN, PB3_OUT, PB3_IN, PB3_IN_PU,
468 PB2_FN, PB2_OUT, PB2_IN, PB2_IN_PU,
469 PB1_FN, PB1_OUT, PB1_IN, PB1_IN_PU,
470 PB0_FN, PB0_OUT, PB0_IN, PB0_IN_PU, },
471 },
472 { PINMUX_CFG_REG("PCDCR", 0xffc70004, 32, 2) {
473 PC7_FN, PC7_OUT, PC7_IN, PC7_IN_PU,
474 PC6_FN, PC6_OUT, PC6_IN, PC6_IN_PU,
475 PC5_FN, PC5_OUT, PC5_IN, PC5_IN_PU,
476 PC4_FN, PC4_OUT, PC4_IN, PC4_IN_PU,
477 PC3_FN, PC3_OUT, PC3_IN, PC3_IN_PU,
478 PC2_FN, PC2_OUT, PC2_IN, PC2_IN_PU,
479 PC1_FN, PC1_OUT, PC1_IN, PC1_IN_PU,
480 PC0_FN, PC0_OUT, PC0_IN, PC0_IN_PU,
481 PD7_FN, PD7_OUT, PD7_IN, PD7_IN_PU,
482 PD6_FN, PD6_OUT, PD6_IN, PD6_IN_PU,
483 PD5_FN, PD5_OUT, PD5_IN, PD5_IN_PU,
484 PD4_FN, PD4_OUT, PD4_IN, PD4_IN_PU,
485 PD3_FN, PD3_OUT, PD3_IN, PD3_IN_PU,
486 PD2_FN, PD2_OUT, PD2_IN, PD2_IN_PU,
487 PD1_FN, PD1_OUT, PD1_IN, PD1_IN_PU,
488 PD0_FN, PD0_OUT, PD0_IN, PD0_IN_PU, },
489 },
490 { PINMUX_CFG_REG("PEFCR", 0xffc70008, 32, 2) {
491 PE7_FN, PE7_OUT, PE7_IN, PE7_IN_PU,
492 PE6_FN, PE6_OUT, PE6_IN, PE6_IN_PU,
493 PE5_FN, PE5_OUT, PE5_IN, PE5_IN_PU,
494 PE4_FN, PE4_OUT, PE4_IN, PE4_IN_PU,
495 PE3_FN, PE3_OUT, PE3_IN, PE3_IN_PU,
496 PE2_FN, PE2_OUT, PE2_IN, PE2_IN_PU,
497 PE1_FN, PE1_OUT, PE1_IN, PE1_IN_PU,
498 PE0_FN, PE0_OUT, PE0_IN, PE0_IN_PU,
499 PF7_FN, PF7_OUT, PF7_IN, PF7_IN_PU,
500 PF6_FN, PF6_OUT, PF6_IN, PF6_IN_PU,
501 PF5_FN, PF5_OUT, PF5_IN, PF5_IN_PU,
502 PF4_FN, PF4_OUT, PF4_IN, PF4_IN_PU,
503 PF3_FN, PF3_OUT, PF3_IN, PF3_IN_PU,
504 PF2_FN, PF2_OUT, PF2_IN, PF2_IN_PU,
505 PF1_FN, PF1_OUT, PF1_IN, PF1_IN_PU,
506 PF0_FN, PF0_OUT, PF0_IN, PF0_IN_PU, },
507 },
508 { PINMUX_CFG_REG("PGHCR", 0xffc7000c, 32, 2) {
509 PG7_FN, PG7_OUT, PG7_IN, PG7_IN_PU,
510 PG6_FN, PG6_OUT, PG6_IN, PG6_IN_PU,
511 PG5_FN, PG5_OUT, PG5_IN, PG5_IN_PU,
512 PG4_FN, PG4_OUT, PG4_IN, PG4_IN_PU,
513 PG3_FN, PG3_OUT, PG3_IN, PG3_IN_PU,
514 PG2_FN, PG2_OUT, PG2_IN, PG2_IN_PU,
515 PG1_FN, PG1_OUT, PG1_IN, PG1_IN_PU,
516 PG0_FN, PG0_OUT, PG0_IN, PG0_IN_PU,
517 0, 0, 0, 0,
518 0, 0, 0, 0,
519 PH5_FN, PH5_OUT, PH5_IN, PH5_IN_PU,
520 PH4_FN, PH4_OUT, PH4_IN, PH4_IN_PU,
521 PH3_FN, PH3_OUT, PH3_IN, PH3_IN_PU,
522 PH2_FN, PH2_OUT, PH2_IN, PH2_IN_PU,
523 PH1_FN, PH1_OUT, PH1_IN, PH1_IN_PU,
524 PH0_FN, PH0_OUT, PH0_IN, PH0_IN_PU, },
525 },
526 { },
527};
528
529static struct pinmux_data_reg shx3_pinmux_data_regs[] = {
530 { PINMUX_DATA_REG("PABDR", 0xffc70010, 32) {
531 0, 0, 0, 0, 0, 0, 0, 0,
532 PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
533 PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
534 0, 0, 0, 0, 0, 0, 0, 0,
535 PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
536 PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA, },
537 },
538 { PINMUX_DATA_REG("PCDDR", 0xffc70014, 32) {
539 0, 0, 0, 0, 0, 0, 0, 0,
540 PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
541 PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
542 0, 0, 0, 0, 0, 0, 0, 0,
543 PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
544 PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA, },
545 },
546 { PINMUX_DATA_REG("PEFDR", 0xffc70018, 32) {
547 0, 0, 0, 0, 0, 0, 0, 0,
548 PE7_DATA, PE6_DATA, PE5_DATA, PE4_DATA,
549 PE3_DATA, PE2_DATA, PE1_DATA, PE0_DATA,
550 0, 0, 0, 0, 0, 0, 0, 0,
551 PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
552 PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA, },
553 },
554 { PINMUX_DATA_REG("PGHDR", 0xffc7001c, 32) {
555 0, 0, 0, 0, 0, 0, 0, 0,
556 PG7_DATA, PG6_DATA, PG5_DATA, PG4_DATA,
557 PG3_DATA, PG2_DATA, PG1_DATA, PG0_DATA,
558 0, 0, 0, 0, 0, 0, 0, 0,
559 0, 0, PH5_DATA, PH4_DATA,
560 PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA, },
561 },
562 { },
563};
564
565struct sh_pfc_soc_info shx3_pinmux_info = {
566 .name = "shx3_pfc",
567 .reserved_id = PINMUX_RESERVED,
568 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
569 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
570 .input_pu = { PINMUX_INPUT_PULLUP_BEGIN,
571 PINMUX_INPUT_PULLUP_END },
572 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
573 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
574 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
575 .first_gpio = GPIO_PA7,
576 .last_gpio = GPIO_FN_STATUS0,
577 .gpios = shx3_pinmux_gpios,
578 .gpio_data = shx3_pinmux_data,
579 .gpio_data_size = ARRAY_SIZE(shx3_pinmux_data),
580 .cfg_regs = shx3_pinmux_config_regs,
581 .data_regs = shx3_pinmux_data_regs,
582};
diff --git a/drivers/sh/pfc/pinctrl.c b/drivers/pinctrl/sh-pfc/pinctrl.c
index 4109b769eac0..11e0e1374d65 100644
--- a/drivers/sh/pfc/pinctrl.c
+++ b/drivers/pinctrl/sh-pfc/pinctrl.c
@@ -7,22 +7,23 @@
7 * License. See the file "COPYING" in the main directory of this archive 7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details. 8 * for more details.
9 */ 9 */
10#define DRV_NAME "pinctrl-sh_pfc"
11 10
12#define pr_fmt(fmt) DRV_NAME " " KBUILD_MODNAME ": " fmt 11#define DRV_NAME "sh-pfc"
12#define pr_fmt(fmt) KBUILD_MODNAME " pinctrl: " fmt
13 13
14#include <linux/device.h>
15#include <linux/err.h>
14#include <linux/init.h> 16#include <linux/init.h>
15#include <linux/module.h> 17#include <linux/module.h>
16#include <linux/sh_pfc.h>
17#include <linux/err.h>
18#include <linux/slab.h>
19#include <linux/spinlock.h>
20#include <linux/platform_device.h>
21#include <linux/pinctrl/consumer.h> 18#include <linux/pinctrl/consumer.h>
22#include <linux/pinctrl/pinctrl.h>
23#include <linux/pinctrl/pinconf.h> 19#include <linux/pinctrl/pinconf.h>
24#include <linux/pinctrl/pinmux.h>
25#include <linux/pinctrl/pinconf-generic.h> 20#include <linux/pinctrl/pinconf-generic.h>
21#include <linux/pinctrl/pinctrl.h>
22#include <linux/pinctrl/pinmux.h>
23#include <linux/slab.h>
24#include <linux/spinlock.h>
25
26#include "core.h"
26 27
27struct sh_pfc_pinctrl { 28struct sh_pfc_pinctrl {
28 struct pinctrl_dev *pctl; 29 struct pinctrl_dev *pctl;
@@ -37,8 +38,6 @@ struct sh_pfc_pinctrl {
37 spinlock_t lock; 38 spinlock_t lock;
38}; 39};
39 40
40static struct sh_pfc_pinctrl *sh_pfc_pmx;
41
42static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev) 41static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
43{ 42{
44 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 43 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
@@ -116,7 +115,7 @@ static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func,
116{ 115{
117} 116}
118 117
119static inline int sh_pfc_config_function(struct sh_pfc *pfc, unsigned offset) 118static int sh_pfc_config_function(struct sh_pfc *pfc, unsigned offset)
120{ 119{
121 if (sh_pfc_config_gpio(pfc, offset, 120 if (sh_pfc_config_gpio(pfc, offset,
122 PINMUX_TYPE_FUNCTION, 121 PINMUX_TYPE_FUNCTION,
@@ -140,7 +139,7 @@ static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
140 139
141 spin_lock_irqsave(&pfc->lock, flags); 140 spin_lock_irqsave(&pfc->lock, flags);
142 141
143 pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE; 142 pinmux_type = pfc->info->gpios[offset].flags & PINMUX_FLAG_TYPE;
144 143
145 /* 144 /*
146 * See if the present config needs to first be de-configured. 145 * See if the present config needs to first be de-configured.
@@ -172,8 +171,8 @@ static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
172 GPIO_CFG_REQ) != 0) 171 GPIO_CFG_REQ) != 0)
173 goto err; 172 goto err;
174 173
175 pfc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE; 174 pfc->info->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
176 pfc->gpios[offset].flags |= new_type; 175 pfc->info->gpios[offset].flags |= new_type;
177 176
178 ret = 0; 177 ret = 0;
179 178
@@ -195,7 +194,7 @@ static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
195 194
196 spin_lock_irqsave(&pfc->lock, flags); 195 spin_lock_irqsave(&pfc->lock, flags);
197 196
198 pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE; 197 pinmux_type = pfc->info->gpios[offset].flags & PINMUX_FLAG_TYPE;
199 198
200 switch (pinmux_type) { 199 switch (pinmux_type) {
201 case PINMUX_TYPE_FUNCTION: 200 case PINMUX_TYPE_FUNCTION:
@@ -236,7 +235,7 @@ static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
236 235
237 spin_lock_irqsave(&pfc->lock, flags); 236 spin_lock_irqsave(&pfc->lock, flags);
238 237
239 pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE; 238 pinmux_type = pfc->info->gpios[offset].flags & PINMUX_FLAG_TYPE;
240 239
241 sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE); 240 sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
242 241
@@ -270,7 +269,7 @@ static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
270 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 269 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
271 struct sh_pfc *pfc = pmx->pfc; 270 struct sh_pfc *pfc = pmx->pfc;
272 271
273 *config = pfc->gpios[pin].flags & PINMUX_FLAG_TYPE; 272 *config = pfc->info->gpios[pin].flags & PINMUX_FLAG_TYPE;
274 273
275 return 0; 274 return 0;
276} 275}
@@ -328,10 +327,8 @@ static struct pinctrl_desc sh_pfc_pinctrl_desc = {
328 .confops = &sh_pfc_pinconf_ops, 327 .confops = &sh_pfc_pinconf_ops,
329}; 328};
330 329
331static inline void sh_pfc_map_one_gpio(struct sh_pfc *pfc, 330static void sh_pfc_map_one_gpio(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx,
332 struct sh_pfc_pinctrl *pmx, 331 struct pinmux_gpio *gpio, unsigned offset)
333 struct pinmux_gpio *gpio,
334 unsigned offset)
335{ 332{
336 struct pinmux_data_reg *dummy; 333 struct pinmux_data_reg *dummy;
337 unsigned long flags; 334 unsigned long flags;
@@ -356,10 +353,10 @@ static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
356 unsigned long flags; 353 unsigned long flags;
357 int i; 354 int i;
358 355
359 pmx->nr_pads = pfc->last_gpio - pfc->first_gpio + 1; 356 pmx->nr_pads = pfc->info->last_gpio - pfc->info->first_gpio + 1;
360 357
361 pmx->pads = kmalloc(sizeof(struct pinctrl_pin_desc) * pmx->nr_pads, 358 pmx->pads = devm_kzalloc(pfc->dev, sizeof(*pmx->pads) * pmx->nr_pads,
362 GFP_KERNEL); 359 GFP_KERNEL);
363 if (unlikely(!pmx->pads)) { 360 if (unlikely(!pmx->pads)) {
364 pmx->nr_pads = 0; 361 pmx->nr_pads = 0;
365 return -ENOMEM; 362 return -ENOMEM;
@@ -375,9 +372,9 @@ static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
375 */ 372 */
376 for (i = 0; i < pmx->nr_pads; i++) { 373 for (i = 0; i < pmx->nr_pads; i++) {
377 struct pinctrl_pin_desc *pin = pmx->pads + i; 374 struct pinctrl_pin_desc *pin = pmx->pads + i;
378 struct pinmux_gpio *gpio = pfc->gpios + i; 375 struct pinmux_gpio *gpio = pfc->info->gpios + i;
379 376
380 pin->number = pfc->first_gpio + i; 377 pin->number = pfc->info->first_gpio + i;
381 pin->name = gpio->name; 378 pin->name = gpio->name;
382 379
383 /* XXX */ 380 /* XXX */
@@ -400,15 +397,15 @@ static int sh_pfc_map_functions(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
400 unsigned long flags; 397 unsigned long flags;
401 int i, fn; 398 int i, fn;
402 399
403 pmx->functions = kzalloc(pmx->nr_functions * sizeof(void *), 400 pmx->functions = devm_kzalloc(pfc->dev, pmx->nr_functions *
404 GFP_KERNEL); 401 sizeof(*pmx->functions), GFP_KERNEL);
405 if (unlikely(!pmx->functions)) 402 if (unlikely(!pmx->functions))
406 return -ENOMEM; 403 return -ENOMEM;
407 404
408 spin_lock_irqsave(&pmx->lock, flags); 405 spin_lock_irqsave(&pmx->lock, flags);
409 406
410 for (i = fn = 0; i < pmx->nr_pads; i++) { 407 for (i = fn = 0; i < pmx->nr_pads; i++) {
411 struct pinmux_gpio *gpio = pfc->gpios + i; 408 struct pinmux_gpio *gpio = pfc->info->gpios + i;
412 409
413 if ((gpio->flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_FUNCTION) 410 if ((gpio->flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_FUNCTION)
414 pmx->functions[fn++] = gpio; 411 pmx->functions[fn++] = gpio;
@@ -419,109 +416,48 @@ static int sh_pfc_map_functions(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
419 return 0; 416 return 0;
420} 417}
421 418
422static int sh_pfc_pinctrl_probe(struct platform_device *pdev) 419int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
423{ 420{
424 struct sh_pfc *pfc; 421 struct sh_pfc_pinctrl *pmx;
425 int ret; 422 int ret;
426 423
427 if (unlikely(!sh_pfc_pmx)) 424 pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);
428 return -ENODEV; 425 if (unlikely(!pmx))
426 return -ENOMEM;
427
428 spin_lock_init(&pmx->lock);
429 429
430 pfc = sh_pfc_pmx->pfc; 430 pmx->pfc = pfc;
431 pfc->pinctrl = pmx;
431 432
432 ret = sh_pfc_map_gpios(pfc, sh_pfc_pmx); 433 ret = sh_pfc_map_gpios(pfc, pmx);
433 if (unlikely(ret != 0)) 434 if (unlikely(ret != 0))
434 return ret; 435 return ret;
435 436
436 ret = sh_pfc_map_functions(pfc, sh_pfc_pmx); 437 ret = sh_pfc_map_functions(pfc, pmx);
437 if (unlikely(ret != 0)) 438 if (unlikely(ret != 0))
438 goto free_pads; 439 return ret;
439
440 sh_pfc_pmx->pctl = pinctrl_register(&sh_pfc_pinctrl_desc, &pdev->dev,
441 sh_pfc_pmx);
442 if (IS_ERR(sh_pfc_pmx->pctl)) {
443 ret = PTR_ERR(sh_pfc_pmx->pctl);
444 goto free_functions;
445 }
446 440
447 sh_pfc_gpio_range.npins = pfc->last_gpio - pfc->first_gpio + 1; 441 pmx->pctl = pinctrl_register(&sh_pfc_pinctrl_desc, pfc->dev, pmx);
448 sh_pfc_gpio_range.base = pfc->first_gpio; 442 if (IS_ERR(pmx->pctl))
449 sh_pfc_gpio_range.pin_base = pfc->first_gpio; 443 return PTR_ERR(pmx->pctl);
450 444
451 pinctrl_add_gpio_range(sh_pfc_pmx->pctl, &sh_pfc_gpio_range); 445 sh_pfc_gpio_range.npins = pfc->info->last_gpio
446 - pfc->info->first_gpio + 1;
447 sh_pfc_gpio_range.base = pfc->info->first_gpio;
448 sh_pfc_gpio_range.pin_base = pfc->info->first_gpio;
452 449
453 platform_set_drvdata(pdev, sh_pfc_pmx); 450 pinctrl_add_gpio_range(pmx->pctl, &sh_pfc_gpio_range);
454 451
455 return 0; 452 return 0;
456
457free_functions:
458 kfree(sh_pfc_pmx->functions);
459free_pads:
460 kfree(sh_pfc_pmx->pads);
461 kfree(sh_pfc_pmx);
462
463 return ret;
464} 453}
465 454
466static int sh_pfc_pinctrl_remove(struct platform_device *pdev) 455int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc)
467{ 456{
468 struct sh_pfc_pinctrl *pmx = platform_get_drvdata(pdev); 457 struct sh_pfc_pinctrl *pmx = pfc->pinctrl;
469 458
470 pinctrl_unregister(pmx->pctl); 459 pinctrl_unregister(pmx->pctl);
471 460
472 platform_set_drvdata(pdev, NULL); 461 pfc->pinctrl = NULL;
473
474 kfree(sh_pfc_pmx->functions);
475 kfree(sh_pfc_pmx->pads);
476 kfree(sh_pfc_pmx);
477
478 return 0; 462 return 0;
479} 463}
480
481static struct platform_driver sh_pfc_pinctrl_driver = {
482 .probe = sh_pfc_pinctrl_probe,
483 .remove = sh_pfc_pinctrl_remove,
484 .driver = {
485 .name = DRV_NAME,
486 .owner = THIS_MODULE,
487 },
488};
489
490static struct platform_device sh_pfc_pinctrl_device = {
491 .name = DRV_NAME,
492 .id = -1,
493};
494
495static int sh_pfc_pinctrl_init(void)
496{
497 int rc;
498
499 rc = platform_driver_register(&sh_pfc_pinctrl_driver);
500 if (likely(!rc)) {
501 rc = platform_device_register(&sh_pfc_pinctrl_device);
502 if (unlikely(rc))
503 platform_driver_unregister(&sh_pfc_pinctrl_driver);
504 }
505
506 return rc;
507}
508
509int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
510{
511 sh_pfc_pmx = kzalloc(sizeof(struct sh_pfc_pinctrl), GFP_KERNEL);
512 if (unlikely(!sh_pfc_pmx))
513 return -ENOMEM;
514
515 spin_lock_init(&sh_pfc_pmx->lock);
516
517 sh_pfc_pmx->pfc = pfc;
518
519 return sh_pfc_pinctrl_init();
520}
521EXPORT_SYMBOL_GPL(sh_pfc_register_pinctrl);
522
523static void __exit sh_pfc_pinctrl_exit(void)
524{
525 platform_driver_unregister(&sh_pfc_pinctrl_driver);
526}
527module_exit(sh_pfc_pinctrl_exit);
diff --git a/drivers/pinctrl/sh-pfc/sh_pfc.h b/drivers/pinctrl/sh-pfc/sh_pfc.h
new file mode 100644
index 000000000000..13049c4c8d30
--- /dev/null
+++ b/drivers/pinctrl/sh-pfc/sh_pfc.h
@@ -0,0 +1,195 @@
1/*
2 * SuperH Pin Function Controller Support
3 *
4 * Copyright (c) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#ifndef __SH_PFC_H
12#define __SH_PFC_H
13
14#include <linux/stringify.h>
15#include <asm-generic/gpio.h>
16
17typedef unsigned short pinmux_enum_t;
18typedef unsigned short pinmux_flag_t;
19
20enum {
21 PINMUX_TYPE_NONE,
22
23 PINMUX_TYPE_FUNCTION,
24 PINMUX_TYPE_GPIO,
25 PINMUX_TYPE_OUTPUT,
26 PINMUX_TYPE_INPUT,
27 PINMUX_TYPE_INPUT_PULLUP,
28 PINMUX_TYPE_INPUT_PULLDOWN,
29
30 PINMUX_FLAG_TYPE, /* must be last */
31};
32
33#define PINMUX_FLAG_DBIT_SHIFT 5
34#define PINMUX_FLAG_DBIT (0x1f << PINMUX_FLAG_DBIT_SHIFT)
35#define PINMUX_FLAG_DREG_SHIFT 10
36#define PINMUX_FLAG_DREG (0x3f << PINMUX_FLAG_DREG_SHIFT)
37
38struct pinmux_gpio {
39 pinmux_enum_t enum_id;
40 pinmux_flag_t flags;
41 const char *name;
42};
43
44#define PINMUX_GPIO(gpio, data_or_mark) \
45 [gpio] = { .name = __stringify(gpio), .enum_id = data_or_mark, .flags = PINMUX_TYPE_NONE }
46
47#define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
48
49struct pinmux_cfg_reg {
50 unsigned long reg, reg_width, field_width;
51 unsigned long *cnt;
52 pinmux_enum_t *enum_ids;
53 unsigned long *var_field_width;
54};
55
56#define PINMUX_CFG_REG(name, r, r_width, f_width) \
57 .reg = r, .reg_width = r_width, .field_width = f_width, \
58 .cnt = (unsigned long [r_width / f_width]) {}, \
59 .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)])
60
61#define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
62 .reg = r, .reg_width = r_width, \
63 .cnt = (unsigned long [r_width]) {}, \
64 .var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \
65 .enum_ids = (pinmux_enum_t [])
66
67struct pinmux_data_reg {
68 unsigned long reg, reg_width, reg_shadow;
69 pinmux_enum_t *enum_ids;
70 void __iomem *mapped_reg;
71};
72
73#define PINMUX_DATA_REG(name, r, r_width) \
74 .reg = r, .reg_width = r_width, \
75 .enum_ids = (pinmux_enum_t [r_width]) \
76
77struct pinmux_irq {
78 int irq;
79 pinmux_enum_t *enum_ids;
80};
81
82#define PINMUX_IRQ(irq_nr, ids...) \
83 { .irq = irq_nr, .enum_ids = (pinmux_enum_t []) { ids, 0 } } \
84
85struct pinmux_range {
86 pinmux_enum_t begin;
87 pinmux_enum_t end;
88 pinmux_enum_t force;
89};
90
91struct sh_pfc_soc_info {
92 char *name;
93 pinmux_enum_t reserved_id;
94 struct pinmux_range data;
95 struct pinmux_range input;
96 struct pinmux_range input_pd;
97 struct pinmux_range input_pu;
98 struct pinmux_range output;
99 struct pinmux_range mark;
100 struct pinmux_range function;
101
102 unsigned first_gpio, last_gpio;
103
104 struct pinmux_gpio *gpios;
105 struct pinmux_cfg_reg *cfg_regs;
106 struct pinmux_data_reg *data_regs;
107
108 pinmux_enum_t *gpio_data;
109 unsigned int gpio_data_size;
110
111 struct pinmux_irq *gpio_irq;
112 unsigned int gpio_irq_size;
113
114 unsigned long unlock_reg;
115};
116
117enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
118
119/* helper macro for port */
120#define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
121
122#define PORT_10(fn, pfx, sfx) \
123 PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \
124 PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \
125 PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \
126 PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \
127 PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
128
129#define PORT_90(fn, pfx, sfx) \
130 PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx), \
131 PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx), \
132 PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx), \
133 PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx), \
134 PORT_10(fn, pfx##9, sfx)
135
136#define _PORT_ALL(pfx, sfx) pfx##_##sfx
137#define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
138#define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str)
139#define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused)
140#define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
141
142/* helper macro for pinmux_enum_t */
143#define PORT_DATA_I(nr) \
144 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
145
146#define PORT_DATA_I_PD(nr) \
147 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
148 PORT##nr##_IN, PORT##nr##_IN_PD)
149
150#define PORT_DATA_I_PU(nr) \
151 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
152 PORT##nr##_IN, PORT##nr##_IN_PU)
153
154#define PORT_DATA_I_PU_PD(nr) \
155 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
156 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
157
158#define PORT_DATA_O(nr) \
159 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
160
161#define PORT_DATA_IO(nr) \
162 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
163 PORT##nr##_IN)
164
165#define PORT_DATA_IO_PD(nr) \
166 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
167 PORT##nr##_IN, PORT##nr##_IN_PD)
168
169#define PORT_DATA_IO_PU(nr) \
170 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
171 PORT##nr##_IN, PORT##nr##_IN_PU)
172
173#define PORT_DATA_IO_PU_PD(nr) \
174 PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
175 PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
176
177/* helper macro for top 4 bits in PORTnCR */
178#define _PCRH(in, in_pd, in_pu, out) \
179 0, (out), (in), 0, \
180 0, 0, 0, 0, \
181 0, 0, (in_pd), 0, \
182 0, 0, (in_pu), 0
183
184#define PORTCR(nr, reg) \
185 { \
186 PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
187 _PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
188 PORT##nr##_IN_PU, PORT##nr##_OUT), \
189 PORT##nr##_FN0, PORT##nr##_FN1, \
190 PORT##nr##_FN2, PORT##nr##_FN3, \
191 PORT##nr##_FN4, PORT##nr##_FN5, \
192 PORT##nr##_FN6, PORT##nr##_FN7 } \
193 }
194
195#endif /* __SH_PFC_H */
diff --git a/drivers/sh/Kconfig b/drivers/sh/Kconfig
index d860ef743568..f168a6159961 100644
--- a/drivers/sh/Kconfig
+++ b/drivers/sh/Kconfig
@@ -1,6 +1,5 @@
1menu "SuperH / SH-Mobile Driver Options" 1menu "SuperH / SH-Mobile Driver Options"
2 2
3source "drivers/sh/intc/Kconfig" 3source "drivers/sh/intc/Kconfig"
4source "drivers/sh/pfc/Kconfig"
5 4
6endmenu 5endmenu
diff --git a/drivers/sh/Makefile b/drivers/sh/Makefile
index e57895b1a425..fc67f564f02c 100644
--- a/drivers/sh/Makefile
+++ b/drivers/sh/Makefile
@@ -5,7 +5,6 @@ obj-y := intc/
5 5
6obj-$(CONFIG_HAVE_CLK) += clk/ 6obj-$(CONFIG_HAVE_CLK) += clk/
7obj-$(CONFIG_MAPLE) += maple/ 7obj-$(CONFIG_MAPLE) += maple/
8obj-$(CONFIG_SH_PFC) += pfc/
9obj-$(CONFIG_SUPERHYWAY) += superhyway/ 8obj-$(CONFIG_SUPERHYWAY) += superhyway/
10 9
11obj-y += pm_runtime.o 10obj-y += pm_runtime.o
diff --git a/drivers/sh/pfc/Kconfig b/drivers/sh/pfc/Kconfig
deleted file mode 100644
index 804f9ad1bf4a..000000000000
--- a/drivers/sh/pfc/Kconfig
+++ /dev/null
@@ -1,26 +0,0 @@
1comment "Pin function controller options"
2
3config SH_PFC
4 # XXX move off the gpio dependency
5 depends on GENERIC_GPIO
6 select GPIO_SH_PFC if ARCH_REQUIRE_GPIOLIB
7 select PINCTRL_SH_PFC
8 def_bool y
9
10#
11# Placeholder for now, rehome to drivers/pinctrl once the PFC APIs
12# have settled.
13#
14config PINCTRL_SH_PFC
15 tristate "SuperH PFC pin controller driver"
16 depends on SH_PFC
17 select PINCTRL
18 select PINMUX
19 select PINCONF
20
21config GPIO_SH_PFC
22 tristate "SuperH PFC GPIO support"
23 depends on SH_PFC && GPIOLIB
24 help
25 This enables support for GPIOs within the SoC's pin function
26 controller.
diff --git a/drivers/sh/pfc/Makefile b/drivers/sh/pfc/Makefile
deleted file mode 100644
index 7916027cce37..000000000000
--- a/drivers/sh/pfc/Makefile
+++ /dev/null
@@ -1,3 +0,0 @@
1obj-y += core.o
2obj-$(CONFIG_PINCTRL_SH_PFC) += pinctrl.o
3obj-$(CONFIG_GPIO_SH_PFC) += gpio.o
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-22 09:02:29 -0500