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authorAlexey Pelykh <alexey.pelykh@gmail.com>2013-02-04 12:19:46 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-02-05 14:13:16 -0500
commit1776fd059c40907297d6c26c51876575d63fd9e2 (patch)
tree0c035fb2962efd0a5047538323c30a5f3794252f /drivers
parentf26402e81743d06b938a388925904bd47763277a (diff)
OMAP/serial: Fix incorrect Rx FIFO threshold setting, LSR validation on Tx, and Tx FIFO IRQ generation
Original configuration of Rx FIFO threshold contained an error that resulted Rx threshold to be effectively set to 1 character instead of 16 characters, as noted in comments. Checking LSR to contain UART_LSR_THRE bit set caused issue when not all UART_IER_THRI interrupts have been properly handled. This caused gap in Tx data, visible on high baud rates using oscilloscope. Setting OMAP_UART_SCR_TX_EMPTY bit in SCR caused UART_IER_THRI interrupt to be raised only when Tx FIFO and Tx shift registers are empty. Signed-off-by: Alexey Pelykh <alexey.pelykh@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/tty/serial/omap-serial.c8
1 files changed, 2 insertions, 6 deletions
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index 9915e4d1418c..4dc41408ecb7 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -59,6 +59,7 @@
59 59
60/* SCR register bitmasks */ 60/* SCR register bitmasks */
61#define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7) 61#define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7)
62#define OMAP_UART_SCR_TX_TRIG_GRANU1_MASK (1 << 6)
62#define OMAP_UART_SCR_TX_EMPTY (1 << 3) 63#define OMAP_UART_SCR_TX_EMPTY (1 << 3)
63 64
64/* FCR register bitmasks */ 65/* FCR register bitmasks */
@@ -320,9 +321,6 @@ static void transmit_chars(struct uart_omap_port *up, unsigned int lsr)
320 struct circ_buf *xmit = &up->port.state->xmit; 321 struct circ_buf *xmit = &up->port.state->xmit;
321 int count; 322 int count;
322 323
323 if (!(lsr & UART_LSR_THRE))
324 return;
325
326 if (up->port.x_char) { 324 if (up->port.x_char) {
327 serial_out(up, UART_TX, up->port.x_char); 325 serial_out(up, UART_TX, up->port.x_char);
328 up->port.icount.tx++; 326 up->port.icount.tx++;
@@ -864,7 +862,7 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
864 serial_out(up, UART_IER, up->ier); 862 serial_out(up, UART_IER, up->ier);
865 serial_out(up, UART_LCR, cval); /* reset DLAB */ 863 serial_out(up, UART_LCR, cval); /* reset DLAB */
866 up->lcr = cval; 864 up->lcr = cval;
867 up->scr = OMAP_UART_SCR_TX_EMPTY; 865 up->scr = 0;
868 866
869 /* FIFOs and DMA Settings */ 867 /* FIFOs and DMA Settings */
870 868
@@ -888,8 +886,6 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
888 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); 886 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
889 /* FIFO ENABLE, DMA MODE */ 887 /* FIFO ENABLE, DMA MODE */
890 888
891 up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK;
892
893 /* Set receive FIFO threshold to 16 characters and 889 /* Set receive FIFO threshold to 16 characters and
894 * transmit FIFO threshold to 16 spaces 890 * transmit FIFO threshold to 16 spaces
895 */ 891 */