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authorFrancois Romieu <romieu@fr.zoreil.com>2006-08-16 09:23:13 -0400
committerFrancois Romieu <romieu@fr.zoreil.com>2006-08-31 15:59:24 -0400
commitb518fa8eac2d0ac497c0fdb27e4cec68d0249bb7 (patch)
tree96ffced71b36d055c57726deaa20443c84fb5f6b /drivers
parent188f4af04618b32b8ec7c630a3f18201c81ce70c (diff)
r8169: udelay() removal
No need to chew CPU cycles as there is no heavy timing requirement and the delays are always requested from a sleepable context. Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/r8169.c12
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index b07d2eadeae6..653b9a7a4178 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -1623,10 +1623,10 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1623 RTL_W8(ChipCmd, CmdReset); 1623 RTL_W8(ChipCmd, CmdReset);
1624 1624
1625 /* Check that the chip has finished the reset. */ 1625 /* Check that the chip has finished the reset. */
1626 for (i = 1000; i > 0; i--) { 1626 for (i = 100; i > 0; i--) {
1627 if ((RTL_R8(ChipCmd) & CmdReset) == 0) 1627 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1628 break; 1628 break;
1629 udelay(10); 1629 msleep_interruptible(1);
1630 } 1630 }
1631 1631
1632 /* Identify chip attached to board */ 1632 /* Identify chip attached to board */
@@ -1848,10 +1848,10 @@ rtl8169_hw_start(struct net_device *dev)
1848 RTL_W8(ChipCmd, CmdReset); 1848 RTL_W8(ChipCmd, CmdReset);
1849 1849
1850 /* Check that the chip has finished the reset. */ 1850 /* Check that the chip has finished the reset. */
1851 for (i = 1000; i > 0; i--) { 1851 for (i = 100; i > 0; i--) {
1852 if ((RTL_R8(ChipCmd) & CmdReset) == 0) 1852 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1853 break; 1853 break;
1854 udelay(10); 1854 msleep_interruptible(1);
1855 } 1855 }
1856 1856
1857 if (tp->mac_version == RTL_GIGA_MAC_VER_13) { 1857 if (tp->mac_version == RTL_GIGA_MAC_VER_13) {
@@ -1914,7 +1914,9 @@ rtl8169_hw_start(struct net_device *dev)
1914 RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32)); 1914 RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32));
1915 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); 1915 RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);
1916 RTL_W8(Cfg9346, Cfg9346_Lock); 1916 RTL_W8(Cfg9346, Cfg9346_Lock);
1917 udelay(10); 1917
1918 /* Initially a 10 us delay. Turned it into a PCI commit. - FR */
1919 RTL_R8(IntrMask);
1918 1920
1919 RTL_W32(RxMissed, 0); 1921 RTL_W32(RxMissed, 0);
1920 1922