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authorSebastian Haas <haas@ems-wuensche.com>2009-09-23 23:55:05 -0400
committerDavid S. Miller <davem@davemloft.net>2009-09-24 18:39:18 -0400
commitedf42a27e8e242e543716663e54aa2b592ea070a (patch)
treec18ca7f0564e94a7c09cb25b03627798cc4454ae /drivers
parent0c01695dabe508ecf3a619c36f0918e8d24c0d05 (diff)
ems_pci: fix size of CAN controllers BAR mapping for CPC-PCI v2
The driver mapped only 128 bytes of the CAN controller address space when a CPC-PCI v2 was detected (incl. CPC-104P). This patch will fix it by always mapping the whole address space (4096 bytes on all boards) of the corresponding PCI BAR. Signed-off-by: Sebastian Haas <haas@ems-wuensche.com> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/can/sja1000/ems_pci.c16
1 files changed, 9 insertions, 7 deletions
diff --git a/drivers/net/can/sja1000/ems_pci.c b/drivers/net/can/sja1000/ems_pci.c
index 7d84b8ac9c1c..fd04789d3370 100644
--- a/drivers/net/can/sja1000/ems_pci.c
+++ b/drivers/net/can/sja1000/ems_pci.c
@@ -94,12 +94,14 @@ struct ems_pci_card {
94#define EMS_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK) 94#define EMS_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK)
95 95
96#define EMS_PCI_V1_BASE_BAR 1 96#define EMS_PCI_V1_BASE_BAR 1
97#define EMS_PCI_V1_MEM_SIZE 4096 97#define EMS_PCI_V1_CONF_SIZE 4096 /* size of PITA control area */
98#define EMS_PCI_V2_BASE_BAR 2 98#define EMS_PCI_V2_BASE_BAR 2
99#define EMS_PCI_V2_MEM_SIZE 128 99#define EMS_PCI_V2_CONF_SIZE 128 /* size of PLX control area */
100#define EMS_PCI_CAN_BASE_OFFSET 0x400 /* offset where the controllers starts */ 100#define EMS_PCI_CAN_BASE_OFFSET 0x400 /* offset where the controllers starts */
101#define EMS_PCI_CAN_CTRL_SIZE 0x200 /* memory size for each controller */ 101#define EMS_PCI_CAN_CTRL_SIZE 0x200 /* memory size for each controller */
102 102
103#define EMS_PCI_BASE_SIZE 4096 /* size of controller area */
104
103static struct pci_device_id ems_pci_tbl[] = { 105static struct pci_device_id ems_pci_tbl[] = {
104 /* CPC-PCI v1 */ 106 /* CPC-PCI v1 */
105 {PCI_VENDOR_ID_SIEMENS, 0x2104, PCI_ANY_ID, PCI_ANY_ID,}, 107 {PCI_VENDOR_ID_SIEMENS, 0x2104, PCI_ANY_ID, PCI_ANY_ID,},
@@ -224,7 +226,7 @@ static int __devinit ems_pci_add_card(struct pci_dev *pdev,
224 struct sja1000_priv *priv; 226 struct sja1000_priv *priv;
225 struct net_device *dev; 227 struct net_device *dev;
226 struct ems_pci_card *card; 228 struct ems_pci_card *card;
227 int max_chan, mem_size, base_bar; 229 int max_chan, conf_size, base_bar;
228 int err, i; 230 int err, i;
229 231
230 /* Enabling PCI device */ 232 /* Enabling PCI device */
@@ -251,22 +253,22 @@ static int __devinit ems_pci_add_card(struct pci_dev *pdev,
251 card->version = 2; /* CPC-PCI v2 */ 253 card->version = 2; /* CPC-PCI v2 */
252 max_chan = EMS_PCI_V2_MAX_CHAN; 254 max_chan = EMS_PCI_V2_MAX_CHAN;
253 base_bar = EMS_PCI_V2_BASE_BAR; 255 base_bar = EMS_PCI_V2_BASE_BAR;
254 mem_size = EMS_PCI_V2_MEM_SIZE; 256 conf_size = EMS_PCI_V2_CONF_SIZE;
255 } else { 257 } else {
256 card->version = 1; /* CPC-PCI v1 */ 258 card->version = 1; /* CPC-PCI v1 */
257 max_chan = EMS_PCI_V1_MAX_CHAN; 259 max_chan = EMS_PCI_V1_MAX_CHAN;
258 base_bar = EMS_PCI_V1_BASE_BAR; 260 base_bar = EMS_PCI_V1_BASE_BAR;
259 mem_size = EMS_PCI_V1_MEM_SIZE; 261 conf_size = EMS_PCI_V1_CONF_SIZE;
260 } 262 }
261 263
262 /* Remap configuration space and controller memory area */ 264 /* Remap configuration space and controller memory area */
263 card->conf_addr = pci_iomap(pdev, 0, mem_size); 265 card->conf_addr = pci_iomap(pdev, 0, conf_size);
264 if (card->conf_addr == NULL) { 266 if (card->conf_addr == NULL) {
265 err = -ENOMEM; 267 err = -ENOMEM;
266 goto failure_cleanup; 268 goto failure_cleanup;
267 } 269 }
268 270
269 card->base_addr = pci_iomap(pdev, base_bar, mem_size); 271 card->base_addr = pci_iomap(pdev, base_bar, EMS_PCI_BASE_SIZE);
270 if (card->base_addr == NULL) { 272 if (card->base_addr == NULL) {
271 err = -ENOMEM; 273 err = -ENOMEM;
272 goto failure_cleanup; 274 goto failure_cleanup;