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authorChristian Lamparter <chunkeey@web.de>2007-08-10 16:59:51 -0400
committerJeff Garzik <jeff@garzik.org>2007-10-12 14:55:33 -0400
commit2eb829e934abb10db36ddaacd82603c3cdd98b6d (patch)
treec4a472cf0f3935977a1144548ade6d09c97ae53f /drivers
parenta738492501eaf6e266acc53a064552b3fcc706b2 (diff)
ata_piix: disallow UDMA 133 on ICH5 & ICH7
There is another outstanding issue with ata_piix.c. Intel has never officially supported anything faster than PATA 100MB/s. But, the ata_piix.c driver "define" the ICH5 & ICH7 as UDMA6 (aka 133MB/s) capable. [ Well, no one has probably noticed it before, because there is bug in do_pata_set_dmamode... Just look at libata_atapiix_enable_real_udma133.patch and you'll see what wrong with it. ] Here are Intel's datasheets for the affected chipsets: ICH5 Datasheet: http://www.intel.com/design/chipsets/datashts/252516.htm (See note on page 183: "... the ICH5 supports reads at the maximum rate of 100MB/s.") ICH7 Datasheet: http://www.intel.com/design/chipsets/datashts/307013.htm (See first note on page 190: "... the ICH7 supports reads at the maximum rate of 100MB/s.") They are two different ways to deal with it: - Either - 1. replace all ich_pata_133 with ich_pata_100. (libata_atapiix_disable_udma6.diff - diff from 2.6.22 ) - Or - 2. keep all ich_pata_133 and fix the bug in "do_pata_set_dmamode". (libata_atapiix_enable_real_udma133.patch - diff from 2.6.22) If there are any concerns about the safety of the patch patch: http://lkml.org/lkml/2007/7/6/292 (It was already tested by an Intel employee, but I guess a bit more user input is necessary here... ) This patch implements 1. Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Jeff Garzik <jeff@garzik.org> Cc: Tejun Heo <htejun@gmail.com> Signed-off-by: Christian Lamparter <chunkeey@web.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ata/ata_piix.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 03fe493026eb..4b66b9e9638f 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -123,7 +123,7 @@ enum {
123 ich_pata_33 = 1, /* ICH up to UDMA 33 only */ 123 ich_pata_33 = 1, /* ICH up to UDMA 33 only */
124 ich_pata_66 = 2, /* ICH up to 66 Mhz */ 124 ich_pata_66 = 2, /* ICH up to 66 Mhz */
125 ich_pata_100 = 3, /* ICH up to UDMA 100 */ 125 ich_pata_100 = 3, /* ICH up to UDMA 100 */
126 ich_pata_133 = 4, /* ICH up to UDMA 133 */ 126 /* ICH up to UDMA 133 is not supported */
127 ich5_sata = 5, 127 ich5_sata = 5,
128 ich6_sata = 6, 128 ich6_sata = 6,
129 ich6_sata_ahci = 7, 129 ich6_sata_ahci = 7,
@@ -199,7 +199,7 @@ static const struct pci_device_id piix_pci_tbl[] = {
199 { 0x8086, 0x24CA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, 199 { 0x8086, 0x24CA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
200 { 0x8086, 0x24CB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, 200 { 0x8086, 0x24CB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
201 /* Intel ICH5 */ 201 /* Intel ICH5 */
202 { 0x8086, 0x24DB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_133 }, 202 { 0x8086, 0x24DB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
203 /* C-ICH (i810E2) */ 203 /* C-ICH (i810E2) */
204 { 0x8086, 0x245B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, 204 { 0x8086, 0x245B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
205 /* ESB (855GME/875P + 6300ESB) UDMA 100 */ 205 /* ESB (855GME/875P + 6300ESB) UDMA 100 */
@@ -207,7 +207,7 @@ static const struct pci_device_id piix_pci_tbl[] = {
207 /* ICH6 (and 6) (i915) UDMA 100 */ 207 /* ICH6 (and 6) (i915) UDMA 100 */
208 { 0x8086, 0x266F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, 208 { 0x8086, 0x266F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
209 /* ICH7/7-R (i945, i975) UDMA 100*/ 209 /* ICH7/7-R (i945, i975) UDMA 100*/
210 { 0x8086, 0x27DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_133 }, 210 { 0x8086, 0x27DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
211 { 0x8086, 0x269E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, 211 { 0x8086, 0x269E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
212 /* ICH8 Mobile PATA Controller */ 212 /* ICH8 Mobile PATA Controller */
213 { 0x8086, 0x2850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, 213 { 0x8086, 0x2850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
@@ -505,7 +505,7 @@ static struct ata_port_info piix_port_info[] = {
505 .port_ops = &ich_pata_ops, 505 .port_ops = &ich_pata_ops,
506 }, 506 },
507 507
508 /* ich_pata_133: 4 ICH with full UDMA6 */ 508 /* ich_pata_133: 4 - Not supported - */
509 { 509 {
510 .sht = &piix_sht, 510 .sht = &piix_sht,
511 .flags = PIIX_PATA_FLAGS | PIIX_FLAG_CHECKINTR, 511 .flags = PIIX_PATA_FLAGS | PIIX_FLAG_CHECKINTR,