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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-07-31 09:20:02 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-07-31 09:20:02 -0400
commitceb0885d3b01bb2e2f18765770e212914f2864be (patch)
tree0952c90cd49704a9172e985ca491d79b60c40bc8 /drivers
parentb31fc7af78e17b0203e1cd5a195c590e8adeae0d (diff)
parent08458ef6eede6cf7d5a33c3a7c8bcdc3943012c2 (diff)
Merge branch 'misc' into devel
Conflicts: arch/arm/mm/init.c
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpio/pl061.c4
-rw-r--r--drivers/mmc/host/mmci.c148
-rw-r--r--drivers/mmc/host/mmci.h39
-rw-r--r--drivers/rtc/rtc-pl031.c2
-rw-r--r--drivers/serial/amba-pl010.c2
-rw-r--r--drivers/serial/amba-pl011.c90
6 files changed, 171 insertions, 114 deletions
diff --git a/drivers/gpio/pl061.c b/drivers/gpio/pl061.c
index ee568c8fcbd0..5005990f751f 100644
--- a/drivers/gpio/pl061.c
+++ b/drivers/gpio/pl061.c
@@ -232,7 +232,7 @@ static void pl061_irq_handler(unsigned irq, struct irq_desc *desc)
232 desc->chip->unmask(irq); 232 desc->chip->unmask(irq);
233} 233}
234 234
235static int __init pl061_probe(struct amba_device *dev, struct amba_id *id) 235static int pl061_probe(struct amba_device *dev, struct amba_id *id)
236{ 236{
237 struct pl061_platform_data *pdata; 237 struct pl061_platform_data *pdata;
238 struct pl061_gpio *chip; 238 struct pl061_gpio *chip;
@@ -333,7 +333,7 @@ free_mem:
333 return ret; 333 return ret;
334} 334}
335 335
336static struct amba_id pl061_ids[] __initdata = { 336static struct amba_id pl061_ids[] = {
337 { 337 {
338 .id = 0x00041061, 338 .id = 0x00041061,
339 .mask = 0x000fffff, 339 .mask = 0x000fffff,
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 4917af96bae1..7edae83603dd 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -26,7 +26,6 @@
26#include <linux/amba/mmci.h> 26#include <linux/amba/mmci.h>
27#include <linux/regulator/consumer.h> 27#include <linux/regulator/consumer.h>
28 28
29#include <asm/cacheflush.h>
30#include <asm/div64.h> 29#include <asm/div64.h>
31#include <asm/io.h> 30#include <asm/io.h>
32#include <asm/sizes.h> 31#include <asm/sizes.h>
@@ -37,12 +36,39 @@
37 36
38static unsigned int fmax = 515633; 37static unsigned int fmax = 515633;
39 38
39/**
40 * struct variant_data - MMCI variant-specific quirks
41 * @clkreg: default value for MCICLOCK register
42 * @clkreg_enable: enable value for MMCICLOCK register
43 * @datalength_bits: number of bits in the MMCIDATALENGTH register
44 */
45struct variant_data {
46 unsigned int clkreg;
47 unsigned int clkreg_enable;
48 unsigned int datalength_bits;
49};
50
51static struct variant_data variant_arm = {
52 .datalength_bits = 16,
53};
54
55static struct variant_data variant_u300 = {
56 .clkreg_enable = 1 << 13, /* HWFCEN */
57 .datalength_bits = 16,
58};
59
60static struct variant_data variant_ux500 = {
61 .clkreg = MCI_CLK_ENABLE,
62 .clkreg_enable = 1 << 14, /* HWFCEN */
63 .datalength_bits = 24,
64};
40/* 65/*
41 * This must be called with host->lock held 66 * This must be called with host->lock held
42 */ 67 */
43static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) 68static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired)
44{ 69{
45 u32 clk = 0; 70 struct variant_data *variant = host->variant;
71 u32 clk = variant->clkreg;
46 72
47 if (desired) { 73 if (desired) {
48 if (desired >= host->mclk) { 74 if (desired >= host->mclk) {
@@ -54,8 +80,8 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired)
54 clk = 255; 80 clk = 255;
55 host->cclk = host->mclk / (2 * (clk + 1)); 81 host->cclk = host->mclk / (2 * (clk + 1));
56 } 82 }
57 if (host->hw_designer == AMBA_VENDOR_ST) 83
58 clk |= MCI_ST_FCEN; /* Bug fix in ST IP block */ 84 clk |= variant->clkreg_enable;
59 clk |= MCI_CLK_ENABLE; 85 clk |= MCI_CLK_ENABLE;
60 /* This hasn't proven to be worthwhile */ 86 /* This hasn't proven to be worthwhile */
61 /* clk |= MCI_CLK_PWRSAVE; */ 87 /* clk |= MCI_CLK_PWRSAVE; */
@@ -98,6 +124,18 @@ static void mmci_stop_data(struct mmci_host *host)
98 host->data = NULL; 124 host->data = NULL;
99} 125}
100 126
127static void mmci_init_sg(struct mmci_host *host, struct mmc_data *data)
128{
129 unsigned int flags = SG_MITER_ATOMIC;
130
131 if (data->flags & MMC_DATA_READ)
132 flags |= SG_MITER_TO_SG;
133 else
134 flags |= SG_MITER_FROM_SG;
135
136 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
137}
138
101static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) 139static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
102{ 140{
103 unsigned int datactrl, timeout, irqmask; 141 unsigned int datactrl, timeout, irqmask;
@@ -109,7 +147,7 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data)
109 data->blksz, data->blocks, data->flags); 147 data->blksz, data->blocks, data->flags);
110 148
111 host->data = data; 149 host->data = data;
112 host->size = data->blksz; 150 host->size = data->blksz * data->blocks;
113 host->data_xfered = 0; 151 host->data_xfered = 0;
114 152
115 mmci_init_sg(host, data); 153 mmci_init_sg(host, data);
@@ -210,8 +248,17 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data,
210 * We hit an error condition. Ensure that any data 248 * We hit an error condition. Ensure that any data
211 * partially written to a page is properly coherent. 249 * partially written to a page is properly coherent.
212 */ 250 */
213 if (host->sg_len && data->flags & MMC_DATA_READ) 251 if (data->flags & MMC_DATA_READ) {
214 flush_dcache_page(sg_page(host->sg_ptr)); 252 struct sg_mapping_iter *sg_miter = &host->sg_miter;
253 unsigned long flags;
254
255 local_irq_save(flags);
256 if (sg_miter_next(sg_miter)) {
257 flush_dcache_page(sg_miter->page);
258 sg_miter_stop(sg_miter);
259 }
260 local_irq_restore(flags);
261 }
215 } 262 }
216 if (status & MCI_DATAEND) { 263 if (status & MCI_DATAEND) {
217 mmci_stop_data(host); 264 mmci_stop_data(host);
@@ -314,15 +361,18 @@ static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int rem
314static irqreturn_t mmci_pio_irq(int irq, void *dev_id) 361static irqreturn_t mmci_pio_irq(int irq, void *dev_id)
315{ 362{
316 struct mmci_host *host = dev_id; 363 struct mmci_host *host = dev_id;
364 struct sg_mapping_iter *sg_miter = &host->sg_miter;
317 void __iomem *base = host->base; 365 void __iomem *base = host->base;
366 unsigned long flags;
318 u32 status; 367 u32 status;
319 368
320 status = readl(base + MMCISTATUS); 369 status = readl(base + MMCISTATUS);
321 370
322 dev_dbg(mmc_dev(host->mmc), "irq1 (pio) %08x\n", status); 371 dev_dbg(mmc_dev(host->mmc), "irq1 (pio) %08x\n", status);
323 372
373 local_irq_save(flags);
374
324 do { 375 do {
325 unsigned long flags;
326 unsigned int remain, len; 376 unsigned int remain, len;
327 char *buffer; 377 char *buffer;
328 378
@@ -336,11 +386,11 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id)
336 if (!(status & (MCI_TXFIFOHALFEMPTY|MCI_RXDATAAVLBL))) 386 if (!(status & (MCI_TXFIFOHALFEMPTY|MCI_RXDATAAVLBL)))
337 break; 387 break;
338 388
339 /* 389 if (!sg_miter_next(sg_miter))
340 * Map the current scatter buffer. 390 break;
341 */ 391
342 buffer = mmci_kmap_atomic(host, &flags) + host->sg_off; 392 buffer = sg_miter->addr;
343 remain = host->sg_ptr->length - host->sg_off; 393 remain = sg_miter->length;
344 394
345 len = 0; 395 len = 0;
346 if (status & MCI_RXACTIVE) 396 if (status & MCI_RXACTIVE)
@@ -348,31 +398,24 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id)
348 if (status & MCI_TXACTIVE) 398 if (status & MCI_TXACTIVE)
349 len = mmci_pio_write(host, buffer, remain, status); 399 len = mmci_pio_write(host, buffer, remain, status);
350 400
351 /* 401 sg_miter->consumed = len;
352 * Unmap the buffer.
353 */
354 mmci_kunmap_atomic(host, buffer, &flags);
355 402
356 host->sg_off += len;
357 host->size -= len; 403 host->size -= len;
358 remain -= len; 404 remain -= len;
359 405
360 if (remain) 406 if (remain)
361 break; 407 break;
362 408
363 /*
364 * If we were reading, and we have completed this
365 * page, ensure that the data cache is coherent.
366 */
367 if (status & MCI_RXACTIVE) 409 if (status & MCI_RXACTIVE)
368 flush_dcache_page(sg_page(host->sg_ptr)); 410 flush_dcache_page(sg_miter->page);
369
370 if (!mmci_next_sg(host))
371 break;
372 411
373 status = readl(base + MMCISTATUS); 412 status = readl(base + MMCISTATUS);
374 } while (1); 413 } while (1);
375 414
415 sg_miter_stop(sg_miter);
416
417 local_irq_restore(flags);
418
376 /* 419 /*
377 * If we're nearing the end of the read, switch to 420 * If we're nearing the end of the read, switch to
378 * "any data available" mode. 421 * "any data available" mode.
@@ -477,16 +520,9 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
477 /* This implicitly enables the regulator */ 520 /* This implicitly enables the regulator */
478 mmc_regulator_set_ocr(host->vcc, ios->vdd); 521 mmc_regulator_set_ocr(host->vcc, ios->vdd);
479#endif 522#endif
480 /* 523 if (host->plat->vdd_handler)
481 * The translate_vdd function is not used if you have 524 pwr |= host->plat->vdd_handler(mmc_dev(mmc), ios->vdd,
482 * an external regulator, or your design is really weird. 525 ios->power_mode);
483 * Using it would mean sending in power control BOTH using
484 * a regulator AND the 4 MMCIPWR bits. If we don't have
485 * a regulator, we might have some other platform specific
486 * power control behind this translate function.
487 */
488 if (!host->vcc && host->plat->translate_vdd)
489 pwr |= host->plat->translate_vdd(mmc_dev(mmc), ios->vdd);
490 /* The ST version does not have this, fall through to POWER_ON */ 526 /* The ST version does not have this, fall through to POWER_ON */
491 if (host->hw_designer != AMBA_VENDOR_ST) { 527 if (host->hw_designer != AMBA_VENDOR_ST) {
492 pwr |= MCI_PWR_UP; 528 pwr |= MCI_PWR_UP;
@@ -551,21 +587,10 @@ static const struct mmc_host_ops mmci_ops = {
551 .get_cd = mmci_get_cd, 587 .get_cd = mmci_get_cd,
552}; 588};
553 589
554static void mmci_check_status(unsigned long data)
555{
556 struct mmci_host *host = (struct mmci_host *)data;
557 unsigned int status = mmci_get_cd(host->mmc);
558
559 if (status ^ host->oldstat)
560 mmc_detect_change(host->mmc, 0);
561
562 host->oldstat = status;
563 mod_timer(&host->timer, jiffies + HZ);
564}
565
566static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) 590static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
567{ 591{
568 struct mmci_platform_data *plat = dev->dev.platform_data; 592 struct mmci_platform_data *plat = dev->dev.platform_data;
593 struct variant_data *variant = id->data;
569 struct mmci_host *host; 594 struct mmci_host *host;
570 struct mmc_host *mmc; 595 struct mmc_host *mmc;
571 int ret; 596 int ret;
@@ -609,6 +634,7 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
609 goto clk_free; 634 goto clk_free;
610 635
611 host->plat = plat; 636 host->plat = plat;
637 host->variant = variant;
612 host->mclk = clk_get_rate(host->clk); 638 host->mclk = clk_get_rate(host->clk);
613 /* 639 /*
614 * According to the spec, mclk is max 100 MHz, 640 * According to the spec, mclk is max 100 MHz,
@@ -669,6 +695,7 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
669 if (host->vcc == NULL) 695 if (host->vcc == NULL)
670 mmc->ocr_avail = plat->ocr_mask; 696 mmc->ocr_avail = plat->ocr_mask;
671 mmc->caps = plat->capabilities; 697 mmc->caps = plat->capabilities;
698 mmc->caps |= MMC_CAP_NEEDS_POLL;
672 699
673 /* 700 /*
674 * We can do SGIO 701 * We can do SGIO
@@ -677,10 +704,11 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
677 mmc->max_phys_segs = NR_SG; 704 mmc->max_phys_segs = NR_SG;
678 705
679 /* 706 /*
680 * Since we only have a 16-bit data length register, we must 707 * Since only a certain number of bits are valid in the data length
681 * ensure that we don't exceed 2^16-1 bytes in a single request. 708 * register, we must ensure that we don't exceed 2^num-1 bytes in a
709 * single request.
682 */ 710 */
683 mmc->max_req_size = 65535; 711 mmc->max_req_size = (1 << variant->datalength_bits) - 1;
684 712
685 /* 713 /*
686 * Set the maximum segment size. Since we aren't doing DMA 714 * Set the maximum segment size. Since we aren't doing DMA
@@ -734,7 +762,6 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
734 writel(MCI_IRQENABLE, host->base + MMCIMASK0); 762 writel(MCI_IRQENABLE, host->base + MMCIMASK0);
735 763
736 amba_set_drvdata(dev, mmc); 764 amba_set_drvdata(dev, mmc);
737 host->oldstat = mmci_get_cd(host->mmc);
738 765
739 mmc_add_host(mmc); 766 mmc_add_host(mmc);
740 767
@@ -742,12 +769,6 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id)
742 mmc_hostname(mmc), amba_rev(dev), amba_config(dev), 769 mmc_hostname(mmc), amba_rev(dev), amba_config(dev),
743 (unsigned long long)dev->res.start, dev->irq[0], dev->irq[1]); 770 (unsigned long long)dev->res.start, dev->irq[0], dev->irq[1]);
744 771
745 init_timer(&host->timer);
746 host->timer.data = (unsigned long)host;
747 host->timer.function = mmci_check_status;
748 host->timer.expires = jiffies + HZ;
749 add_timer(&host->timer);
750
751 return 0; 772 return 0;
752 773
753 irq0_free: 774 irq0_free:
@@ -781,8 +802,6 @@ static int __devexit mmci_remove(struct amba_device *dev)
781 if (mmc) { 802 if (mmc) {
782 struct mmci_host *host = mmc_priv(mmc); 803 struct mmci_host *host = mmc_priv(mmc);
783 804
784 del_timer_sync(&host->timer);
785
786 mmc_remove_host(mmc); 805 mmc_remove_host(mmc);
787 806
788 writel(0, host->base + MMCIMASK0); 807 writel(0, host->base + MMCIMASK0);
@@ -856,19 +875,28 @@ static struct amba_id mmci_ids[] = {
856 { 875 {
857 .id = 0x00041180, 876 .id = 0x00041180,
858 .mask = 0x000fffff, 877 .mask = 0x000fffff,
878 .data = &variant_arm,
859 }, 879 },
860 { 880 {
861 .id = 0x00041181, 881 .id = 0x00041181,
862 .mask = 0x000fffff, 882 .mask = 0x000fffff,
883 .data = &variant_arm,
863 }, 884 },
864 /* ST Micro variants */ 885 /* ST Micro variants */
865 { 886 {
866 .id = 0x00180180, 887 .id = 0x00180180,
867 .mask = 0x00ffffff, 888 .mask = 0x00ffffff,
889 .data = &variant_u300,
868 }, 890 },
869 { 891 {
870 .id = 0x00280180, 892 .id = 0x00280180,
871 .mask = 0x00ffffff, 893 .mask = 0x00ffffff,
894 .data = &variant_u300,
895 },
896 {
897 .id = 0x00480180,
898 .mask = 0x00ffffff,
899 .data = &variant_ux500,
872 }, 900 },
873 { 0, 0 }, 901 { 0, 0 },
874}; 902};
diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h
index d77062e5e3af..68970cfb81e1 100644
--- a/drivers/mmc/host/mmci.h
+++ b/drivers/mmc/host/mmci.h
@@ -28,8 +28,6 @@
28#define MCI_4BIT_BUS (1 << 11) 28#define MCI_4BIT_BUS (1 << 11)
29/* 8bit wide buses supported in ST Micro versions */ 29/* 8bit wide buses supported in ST Micro versions */
30#define MCI_ST_8BIT_BUS (1 << 12) 30#define MCI_ST_8BIT_BUS (1 << 12)
31/* HW flow control on the ST Micro version */
32#define MCI_ST_FCEN (1 << 13)
33 31
34#define MMCIARGUMENT 0x008 32#define MMCIARGUMENT 0x008
35#define MMCICOMMAND 0x00c 33#define MMCICOMMAND 0x00c
@@ -145,6 +143,7 @@
145#define NR_SG 16 143#define NR_SG 16
146 144
147struct clk; 145struct clk;
146struct variant_data;
148 147
149struct mmci_host { 148struct mmci_host {
150 void __iomem *base; 149 void __iomem *base;
@@ -164,6 +163,7 @@ struct mmci_host {
164 unsigned int cclk; 163 unsigned int cclk;
165 u32 pwr; 164 u32 pwr;
166 struct mmci_platform_data *plat; 165 struct mmci_platform_data *plat;
166 struct variant_data *variant;
167 167
168 u8 hw_designer; 168 u8 hw_designer;
169 u8 hw_revision:4; 169 u8 hw_revision:4;
@@ -171,42 +171,9 @@ struct mmci_host {
171 struct timer_list timer; 171 struct timer_list timer;
172 unsigned int oldstat; 172 unsigned int oldstat;
173 173
174 unsigned int sg_len;
175
176 /* pio stuff */ 174 /* pio stuff */
177 struct scatterlist *sg_ptr; 175 struct sg_mapping_iter sg_miter;
178 unsigned int sg_off;
179 unsigned int size; 176 unsigned int size;
180 struct regulator *vcc; 177 struct regulator *vcc;
181}; 178};
182 179
183static inline void mmci_init_sg(struct mmci_host *host, struct mmc_data *data)
184{
185 /*
186 * Ideally, we want the higher levels to pass us a scatter list.
187 */
188 host->sg_len = data->sg_len;
189 host->sg_ptr = data->sg;
190 host->sg_off = 0;
191}
192
193static inline int mmci_next_sg(struct mmci_host *host)
194{
195 host->sg_ptr++;
196 host->sg_off = 0;
197 return --host->sg_len;
198}
199
200static inline char *mmci_kmap_atomic(struct mmci_host *host, unsigned long *flags)
201{
202 struct scatterlist *sg = host->sg_ptr;
203
204 local_irq_save(*flags);
205 return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
206}
207
208static inline void mmci_kunmap_atomic(struct mmci_host *host, void *buffer, unsigned long *flags)
209{
210 kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
211 local_irq_restore(*flags);
212}
diff --git a/drivers/rtc/rtc-pl031.c b/drivers/rtc/rtc-pl031.c
index 3587d9922f28..71bbefc3544e 100644
--- a/drivers/rtc/rtc-pl031.c
+++ b/drivers/rtc/rtc-pl031.c
@@ -456,7 +456,7 @@ static struct rtc_class_ops stv2_pl031_ops = {
456 .irq_set_freq = pl031_irq_set_freq, 456 .irq_set_freq = pl031_irq_set_freq,
457}; 457};
458 458
459static struct amba_id pl031_ids[] __initdata = { 459static struct amba_id pl031_ids[] = {
460 { 460 {
461 .id = 0x00041031, 461 .id = 0x00041031,
462 .mask = 0x000fffff, 462 .mask = 0x000fffff,
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c
index b09a638d051f..50441ffe8e38 100644
--- a/drivers/serial/amba-pl010.c
+++ b/drivers/serial/amba-pl010.c
@@ -782,7 +782,7 @@ static int pl010_resume(struct amba_device *dev)
782 return 0; 782 return 0;
783} 783}
784 784
785static struct amba_id pl010_ids[] __initdata = { 785static struct amba_id pl010_ids[] = {
786 { 786 {
787 .id = 0x00041010, 787 .id = 0x00041010,
788 .mask = 0x000fffff, 788 .mask = 0x000fffff,
diff --git a/drivers/serial/amba-pl011.c b/drivers/serial/amba-pl011.c
index eb4cb480b93e..6ca7a44f29c2 100644
--- a/drivers/serial/amba-pl011.c
+++ b/drivers/serial/amba-pl011.c
@@ -69,9 +69,12 @@
69struct uart_amba_port { 69struct uart_amba_port {
70 struct uart_port port; 70 struct uart_port port;
71 struct clk *clk; 71 struct clk *clk;
72 unsigned int im; /* interrupt mask */ 72 unsigned int im; /* interrupt mask */
73 unsigned int old_status; 73 unsigned int old_status;
74 unsigned int ifls; /* vendor-specific */ 74 unsigned int ifls; /* vendor-specific */
75 unsigned int lcrh_tx; /* vendor-specific */
76 unsigned int lcrh_rx; /* vendor-specific */
77 bool oversampling; /* vendor-specific */
75 bool autorts; 78 bool autorts;
76}; 79};
77 80
@@ -79,16 +82,25 @@ struct uart_amba_port {
79struct vendor_data { 82struct vendor_data {
80 unsigned int ifls; 83 unsigned int ifls;
81 unsigned int fifosize; 84 unsigned int fifosize;
85 unsigned int lcrh_tx;
86 unsigned int lcrh_rx;
87 bool oversampling;
82}; 88};
83 89
84static struct vendor_data vendor_arm = { 90static struct vendor_data vendor_arm = {
85 .ifls = UART011_IFLS_RX4_8|UART011_IFLS_TX4_8, 91 .ifls = UART011_IFLS_RX4_8|UART011_IFLS_TX4_8,
86 .fifosize = 16, 92 .fifosize = 16,
93 .lcrh_tx = UART011_LCRH,
94 .lcrh_rx = UART011_LCRH,
95 .oversampling = false,
87}; 96};
88 97
89static struct vendor_data vendor_st = { 98static struct vendor_data vendor_st = {
90 .ifls = UART011_IFLS_RX_HALF|UART011_IFLS_TX_HALF, 99 .ifls = UART011_IFLS_RX_HALF|UART011_IFLS_TX_HALF,
91 .fifosize = 64, 100 .fifosize = 64,
101 .lcrh_tx = ST_UART011_LCRH_TX,
102 .lcrh_rx = ST_UART011_LCRH_RX,
103 .oversampling = true,
92}; 104};
93 105
94static void pl011_stop_tx(struct uart_port *port) 106static void pl011_stop_tx(struct uart_port *port)
@@ -327,12 +339,12 @@ static void pl011_break_ctl(struct uart_port *port, int break_state)
327 unsigned int lcr_h; 339 unsigned int lcr_h;
328 340
329 spin_lock_irqsave(&uap->port.lock, flags); 341 spin_lock_irqsave(&uap->port.lock, flags);
330 lcr_h = readw(uap->port.membase + UART011_LCRH); 342 lcr_h = readw(uap->port.membase + uap->lcrh_tx);
331 if (break_state == -1) 343 if (break_state == -1)
332 lcr_h |= UART01x_LCRH_BRK; 344 lcr_h |= UART01x_LCRH_BRK;
333 else 345 else
334 lcr_h &= ~UART01x_LCRH_BRK; 346 lcr_h &= ~UART01x_LCRH_BRK;
335 writew(lcr_h, uap->port.membase + UART011_LCRH); 347 writew(lcr_h, uap->port.membase + uap->lcrh_tx);
336 spin_unlock_irqrestore(&uap->port.lock, flags); 348 spin_unlock_irqrestore(&uap->port.lock, flags);
337} 349}
338 350
@@ -393,7 +405,17 @@ static int pl011_startup(struct uart_port *port)
393 writew(cr, uap->port.membase + UART011_CR); 405 writew(cr, uap->port.membase + UART011_CR);
394 writew(0, uap->port.membase + UART011_FBRD); 406 writew(0, uap->port.membase + UART011_FBRD);
395 writew(1, uap->port.membase + UART011_IBRD); 407 writew(1, uap->port.membase + UART011_IBRD);
396 writew(0, uap->port.membase + UART011_LCRH); 408 writew(0, uap->port.membase + uap->lcrh_rx);
409 if (uap->lcrh_tx != uap->lcrh_rx) {
410 int i;
411 /*
412 * Wait 10 PCLKs before writing LCRH_TX register,
413 * to get this delay write read only register 10 times
414 */
415 for (i = 0; i < 10; ++i)
416 writew(0xff, uap->port.membase + UART011_MIS);
417 writew(0, uap->port.membase + uap->lcrh_tx);
418 }
397 writew(0, uap->port.membase + UART01x_DR); 419 writew(0, uap->port.membase + UART01x_DR);
398 while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_BUSY) 420 while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_BUSY)
399 barrier(); 421 barrier();
@@ -422,10 +444,19 @@ static int pl011_startup(struct uart_port *port)
422 return retval; 444 return retval;
423} 445}
424 446
447static void pl011_shutdown_channel(struct uart_amba_port *uap,
448 unsigned int lcrh)
449{
450 unsigned long val;
451
452 val = readw(uap->port.membase + lcrh);
453 val &= ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN);
454 writew(val, uap->port.membase + lcrh);
455}
456
425static void pl011_shutdown(struct uart_port *port) 457static void pl011_shutdown(struct uart_port *port)
426{ 458{
427 struct uart_amba_port *uap = (struct uart_amba_port *)port; 459 struct uart_amba_port *uap = (struct uart_amba_port *)port;
428 unsigned long val;
429 460
430 /* 461 /*
431 * disable all interrupts 462 * disable all interrupts
@@ -450,9 +481,9 @@ static void pl011_shutdown(struct uart_port *port)
450 /* 481 /*
451 * disable break condition and fifos 482 * disable break condition and fifos
452 */ 483 */
453 val = readw(uap->port.membase + UART011_LCRH); 484 pl011_shutdown_channel(uap, uap->lcrh_rx);
454 val &= ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN); 485 if (uap->lcrh_rx != uap->lcrh_tx)
455 writew(val, uap->port.membase + UART011_LCRH); 486 pl011_shutdown_channel(uap, uap->lcrh_tx);
456 487
457 /* 488 /*
458 * Shut down the clock producer 489 * Shut down the clock producer
@@ -472,8 +503,13 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios,
472 /* 503 /*
473 * Ask the core to calculate the divisor for us. 504 * Ask the core to calculate the divisor for us.
474 */ 505 */
475 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 506 baud = uart_get_baud_rate(port, termios, old, 0,
476 quot = port->uartclk * 4 / baud; 507 port->uartclk/(uap->oversampling ? 8 : 16));
508
509 if (baud > port->uartclk/16)
510 quot = DIV_ROUND_CLOSEST(port->uartclk * 8, baud);
511 else
512 quot = DIV_ROUND_CLOSEST(port->uartclk * 4, baud);
477 513
478 switch (termios->c_cflag & CSIZE) { 514 switch (termios->c_cflag & CSIZE) {
479 case CS5: 515 case CS5:
@@ -552,6 +588,13 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios,
552 uap->autorts = false; 588 uap->autorts = false;
553 } 589 }
554 590
591 if (uap->oversampling) {
592 if (baud > port->uartclk/16)
593 old_cr |= ST_UART011_CR_OVSFACT;
594 else
595 old_cr &= ~ST_UART011_CR_OVSFACT;
596 }
597
555 /* Set baud rate */ 598 /* Set baud rate */
556 writew(quot & 0x3f, port->membase + UART011_FBRD); 599 writew(quot & 0x3f, port->membase + UART011_FBRD);
557 writew(quot >> 6, port->membase + UART011_IBRD); 600 writew(quot >> 6, port->membase + UART011_IBRD);
@@ -561,7 +604,17 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios,
561 * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L 604 * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
562 * ----------^----------^----------^----------^----- 605 * ----------^----------^----------^----------^-----
563 */ 606 */
564 writew(lcr_h, port->membase + UART011_LCRH); 607 writew(lcr_h, port->membase + uap->lcrh_rx);
608 if (uap->lcrh_rx != uap->lcrh_tx) {
609 int i;
610 /*
611 * Wait 10 PCLKs before writing LCRH_TX register,
612 * to get this delay write read only register 10 times
613 */
614 for (i = 0; i < 10; ++i)
615 writew(0xff, uap->port.membase + UART011_MIS);
616 writew(lcr_h, port->membase + uap->lcrh_tx);
617 }
565 writew(old_cr, port->membase + UART011_CR); 618 writew(old_cr, port->membase + UART011_CR);
566 619
567 spin_unlock_irqrestore(&port->lock, flags); 620 spin_unlock_irqrestore(&port->lock, flags);
@@ -688,7 +741,7 @@ pl011_console_get_options(struct uart_amba_port *uap, int *baud,
688 if (readw(uap->port.membase + UART011_CR) & UART01x_CR_UARTEN) { 741 if (readw(uap->port.membase + UART011_CR) & UART01x_CR_UARTEN) {
689 unsigned int lcr_h, ibrd, fbrd; 742 unsigned int lcr_h, ibrd, fbrd;
690 743
691 lcr_h = readw(uap->port.membase + UART011_LCRH); 744 lcr_h = readw(uap->port.membase + uap->lcrh_tx);
692 745
693 *parity = 'n'; 746 *parity = 'n';
694 if (lcr_h & UART01x_LCRH_PEN) { 747 if (lcr_h & UART01x_LCRH_PEN) {
@@ -707,6 +760,12 @@ pl011_console_get_options(struct uart_amba_port *uap, int *baud,
707 fbrd = readw(uap->port.membase + UART011_FBRD); 760 fbrd = readw(uap->port.membase + UART011_FBRD);
708 761
709 *baud = uap->port.uartclk * 4 / (64 * ibrd + fbrd); 762 *baud = uap->port.uartclk * 4 / (64 * ibrd + fbrd);
763
764 if (uap->oversampling) {
765 if (readw(uap->port.membase + UART011_CR)
766 & ST_UART011_CR_OVSFACT)
767 *baud *= 2;
768 }
710 } 769 }
711} 770}
712 771
@@ -800,6 +859,9 @@ static int pl011_probe(struct amba_device *dev, struct amba_id *id)
800 } 859 }
801 860
802 uap->ifls = vendor->ifls; 861 uap->ifls = vendor->ifls;
862 uap->lcrh_rx = vendor->lcrh_rx;
863 uap->lcrh_tx = vendor->lcrh_tx;
864 uap->oversampling = vendor->oversampling;
803 uap->port.dev = &dev->dev; 865 uap->port.dev = &dev->dev;
804 uap->port.mapbase = dev->res.start; 866 uap->port.mapbase = dev->res.start;
805 uap->port.membase = base; 867 uap->port.membase = base;
@@ -868,7 +930,7 @@ static int pl011_resume(struct amba_device *dev)
868} 930}
869#endif 931#endif
870 932
871static struct amba_id pl011_ids[] __initdata = { 933static struct amba_id pl011_ids[] = {
872 { 934 {
873 .id = 0x00041011, 935 .id = 0x00041011,
874 .mask = 0x000fffff, 936 .mask = 0x000fffff,