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authorEvgeniy Polyakov <zbr@ioremap.net>2008-11-24 09:04:39 -0500
committerHerbert Xu <herbert@gondor.apana.org.au>2008-12-24 19:01:58 -0500
commitd6a10c84a2a2b08bdd637852c9cc42c41e109b25 (patch)
treeaf647d711f4970ace66cdbc488389fedfd745761 /drivers
parent3ec858de6468e810953e41b8c154a0d605b25d68 (diff)
crypto: hifn_795x - Fix queue management
Fix queue management. Change ring size and perform its check not one after another descriptor, but using stored pointers to the last checked descriptors. Signed-off-by: Evgeniy Polyakov <zbr@ioremap.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/crypto/hifn_795x.c174
1 files changed, 81 insertions, 93 deletions
diff --git a/drivers/crypto/hifn_795x.c b/drivers/crypto/hifn_795x.c
index a03fe571265b..ab4f94bec4ff 100644
--- a/drivers/crypto/hifn_795x.c
+++ b/drivers/crypto/hifn_795x.c
@@ -360,14 +360,14 @@ static atomic_t hifn_dev_number;
360#define HIFN_NAMESIZE 32 360#define HIFN_NAMESIZE 32
361#define HIFN_MAX_RESULT_ORDER 5 361#define HIFN_MAX_RESULT_ORDER 5
362 362
363#define HIFN_D_CMD_RSIZE 24*4 363#define HIFN_D_CMD_RSIZE 24*1
364#define HIFN_D_SRC_RSIZE 80*4 364#define HIFN_D_SRC_RSIZE 80*1
365#define HIFN_D_DST_RSIZE 80*4 365#define HIFN_D_DST_RSIZE 80*1
366#define HIFN_D_RES_RSIZE 24*4 366#define HIFN_D_RES_RSIZE 24*1
367 367
368#define HIFN_D_DST_DALIGN 4 368#define HIFN_D_DST_DALIGN 4
369 369
370#define HIFN_QUEUE_LENGTH HIFN_D_CMD_RSIZE-1 370#define HIFN_QUEUE_LENGTH (HIFN_D_CMD_RSIZE - 1)
371 371
372#define AES_MIN_KEY_SIZE 16 372#define AES_MIN_KEY_SIZE 16
373#define AES_MAX_KEY_SIZE 32 373#define AES_MAX_KEY_SIZE 32
@@ -1256,6 +1256,7 @@ static int hifn_setup_cmd_desc(struct hifn_device *dev,
1256 } 1256 }
1257 1257
1258 dev->sa[sa_idx] = priv; 1258 dev->sa[sa_idx] = priv;
1259 dev->started++;
1259 1260
1260 cmd_len = buf_pos - buf; 1261 cmd_len = buf_pos - buf;
1261 dma->cmdr[dma->cmdi].l = __cpu_to_le32(cmd_len | HIFN_D_VALID | 1262 dma->cmdr[dma->cmdi].l = __cpu_to_le32(cmd_len | HIFN_D_VALID |
@@ -1382,9 +1383,6 @@ static int hifn_setup_dma(struct hifn_device *dev,
1382 soff = src->offset; 1383 soff = src->offset;
1383 len = min(src->length, n); 1384 len = min(src->length, n);
1384 1385
1385 dprintk("%s: spage: %p, soffset: %u, nbytes: %u, "
1386 "priv: %p, rctx: %p.\n",
1387 dev->name, spage, soff, nbytes, priv, rctx);
1388 hifn_setup_src_desc(dev, spage, soff, len, n - len == 0); 1386 hifn_setup_src_desc(dev, spage, soff, len, n - len == 0);
1389 1387
1390 src++; 1388 src++;
@@ -1405,9 +1403,6 @@ static int hifn_setup_dma(struct hifn_device *dev,
1405 } 1403 }
1406 len = min(len, n); 1404 len = min(len, n);
1407 1405
1408 dprintk("%s: dpage: %p, doffset: %u, nbytes: %u, "
1409 "priv: %p, rctx: %p.\n",
1410 dev->name, dpage, doff, nbytes, priv, rctx);
1411 hifn_setup_dst_desc(dev, dpage, doff, len, n - len == 0); 1406 hifn_setup_dst_desc(dev, dpage, doff, len, n - len == 0);
1412 1407
1413 dst++; 1408 dst++;
@@ -1620,13 +1615,12 @@ static int hifn_setup_session(struct ablkcipher_request *req)
1620 goto err_out; 1615 goto err_out;
1621 } 1616 }
1622 1617
1623 dev->snum++;
1624 dev->started++;
1625
1626 err = hifn_setup_dma(dev, ctx, rctx, req->src, req->dst, req->nbytes, req); 1618 err = hifn_setup_dma(dev, ctx, rctx, req->src, req->dst, req->nbytes, req);
1627 if (err) 1619 if (err)
1628 goto err_out; 1620 goto err_out;
1629 1621
1622 dev->snum++;
1623
1630 dev->active = HIFN_DEFAULT_ACTIVE_NUM; 1624 dev->active = HIFN_DEFAULT_ACTIVE_NUM;
1631 spin_unlock_irqrestore(&dev->lock, flags); 1625 spin_unlock_irqrestore(&dev->lock, flags);
1632 1626
@@ -1635,12 +1629,13 @@ static int hifn_setup_session(struct ablkcipher_request *req)
1635err_out: 1629err_out:
1636 spin_unlock_irqrestore(&dev->lock, flags); 1630 spin_unlock_irqrestore(&dev->lock, flags);
1637err_out_exit: 1631err_out_exit:
1638 if (err) 1632 if (err) {
1639 dprintk("%s: iv: %p [%d], key: %p [%d], mode: %u, op: %u, " 1633 printk("%s: iv: %p [%d], key: %p [%d], mode: %u, op: %u, "
1640 "type: %u, err: %d.\n", 1634 "type: %u, err: %d.\n",
1641 dev->name, rctx->iv, rctx->ivsize, 1635 dev->name, rctx->iv, rctx->ivsize,
1642 ctx->key, ctx->keysize, 1636 ctx->key, ctx->keysize,
1643 rctx->mode, rctx->op, rctx->type, err); 1637 rctx->mode, rctx->op, rctx->type, err);
1638 }
1644 1639
1645 return err; 1640 return err;
1646} 1641}
@@ -1676,6 +1671,7 @@ static int hifn_test(struct hifn_device *dev, int encdec, u8 snum)
1676 if (err) 1671 if (err)
1677 goto err_out; 1672 goto err_out;
1678 1673
1674 dev->started = 0;
1679 msleep(200); 1675 msleep(200);
1680 1676
1681 dprintk("%s: decoded: ", dev->name); 1677 dprintk("%s: decoded: ", dev->name);
@@ -1702,6 +1698,7 @@ static int hifn_start_device(struct hifn_device *dev)
1702{ 1698{
1703 int err; 1699 int err;
1704 1700
1701 dev->started = dev->active = 0;
1705 hifn_reset_dma(dev, 1); 1702 hifn_reset_dma(dev, 1);
1706 1703
1707 err = hifn_enable_crypto(dev); 1704 err = hifn_enable_crypto(dev);
@@ -1755,19 +1752,22 @@ static int ablkcipher_get(void *saddr, unsigned int *srestp, unsigned int offset
1755 return idx; 1752 return idx;
1756} 1753}
1757 1754
1758static void hifn_process_ready(struct ablkcipher_request *req, int error) 1755static inline void hifn_complete_sa(struct hifn_device *dev, int i)
1759{ 1756{
1760 struct hifn_context *ctx = crypto_tfm_ctx(req->base.tfm); 1757 unsigned long flags;
1761 struct hifn_request_context *rctx = ablkcipher_request_ctx(req);
1762 struct hifn_device *dev;
1763
1764 dprintk("%s: req: %p, ctx: %p rctx: %p.\n", __func__, req, ctx, rctx);
1765 1758
1766 dev = ctx->dev; 1759 spin_lock_irqsave(&dev->lock, flags);
1767 dprintk("%s: req: %p, started: %d.\n", __func__, req, dev->started); 1760 dev->sa[i] = NULL;
1761 dev->started--;
1762 if (dev->started < 0)
1763 printk("%s: started: %d.\n", __func__, dev->started);
1764 spin_unlock_irqrestore(&dev->lock, flags);
1765 BUG_ON(dev->started < 0);
1766}
1768 1767
1769 if (--dev->started < 0) 1768static void hifn_process_ready(struct ablkcipher_request *req, int error)
1770 BUG(); 1769{
1770 struct hifn_request_context *rctx = ablkcipher_request_ctx(req);
1771 1771
1772 if (rctx->walk.flags & ASYNC_FLAGS_MISALIGNED) { 1772 if (rctx->walk.flags & ASYNC_FLAGS_MISALIGNED) {
1773 unsigned int nbytes = req->nbytes; 1773 unsigned int nbytes = req->nbytes;
@@ -1810,33 +1810,7 @@ static void hifn_process_ready(struct ablkcipher_request *req, int error)
1810 req->base.complete(&req->base, error); 1810 req->base.complete(&req->base, error);
1811} 1811}
1812 1812
1813static void hifn_check_for_completion(struct hifn_device *dev, int error) 1813static void hifn_clear_rings(struct hifn_device *dev, int error)
1814{
1815 int i;
1816 struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
1817
1818 for (i=0; i<HIFN_D_RES_RSIZE; ++i) {
1819 struct hifn_desc *d = &dma->resr[i];
1820
1821 if (!(d->l & __cpu_to_le32(HIFN_D_VALID)) && dev->sa[i]) {
1822 dev->success++;
1823 dev->reset = 0;
1824 hifn_process_ready(dev->sa[i], error);
1825 dev->sa[i] = NULL;
1826 }
1827
1828 if (d->l & __cpu_to_le32(HIFN_D_DESTOVER | HIFN_D_OVER))
1829 if (printk_ratelimit())
1830 printk("%s: overflow detected [d: %u, o: %u] "
1831 "at %d resr: l: %08x, p: %08x.\n",
1832 dev->name,
1833 !!(d->l & __cpu_to_le32(HIFN_D_DESTOVER)),
1834 !!(d->l & __cpu_to_le32(HIFN_D_OVER)),
1835 i, d->l, d->p);
1836 }
1837}
1838
1839static void hifn_clear_rings(struct hifn_device *dev)
1840{ 1814{
1841 struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt; 1815 struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
1842 int i, u; 1816 int i, u;
@@ -1853,21 +1827,26 @@ static void hifn_clear_rings(struct hifn_device *dev)
1853 if (dma->resr[i].l & __cpu_to_le32(HIFN_D_VALID)) 1827 if (dma->resr[i].l & __cpu_to_le32(HIFN_D_VALID))
1854 break; 1828 break;
1855 1829
1856 if (i != HIFN_D_RES_RSIZE) 1830 if (dev->sa[i]) {
1857 u--; 1831 dev->success++;
1832 dev->reset = 0;
1833 hifn_process_ready(dev->sa[i], error);
1834 hifn_complete_sa(dev, i);
1835 }
1858 1836
1859 if (++i == (HIFN_D_RES_RSIZE + 1)) 1837 if (++i == HIFN_D_RES_RSIZE)
1860 i = 0; 1838 i = 0;
1839 u--;
1861 } 1840 }
1862 dma->resk = i; dma->resu = u; 1841 dma->resk = i; dma->resu = u;
1863 1842
1864 i = dma->srck; u = dma->srcu; 1843 i = dma->srck; u = dma->srcu;
1865 while (u != 0) { 1844 while (u != 0) {
1866 if (i == HIFN_D_SRC_RSIZE)
1867 i = 0;
1868 if (dma->srcr[i].l & __cpu_to_le32(HIFN_D_VALID)) 1845 if (dma->srcr[i].l & __cpu_to_le32(HIFN_D_VALID))
1869 break; 1846 break;
1870 i++, u--; 1847 if (++i == HIFN_D_SRC_RSIZE)
1848 i = 0;
1849 u--;
1871 } 1850 }
1872 dma->srck = i; dma->srcu = u; 1851 dma->srck = i; dma->srcu = u;
1873 1852
@@ -1875,20 +1854,19 @@ static void hifn_clear_rings(struct hifn_device *dev)
1875 while (u != 0) { 1854 while (u != 0) {
1876 if (dma->cmdr[i].l & __cpu_to_le32(HIFN_D_VALID)) 1855 if (dma->cmdr[i].l & __cpu_to_le32(HIFN_D_VALID))
1877 break; 1856 break;
1878 if (i != HIFN_D_CMD_RSIZE) 1857 if (++i == HIFN_D_CMD_RSIZE)
1879 u--;
1880 if (++i == (HIFN_D_CMD_RSIZE + 1))
1881 i = 0; 1858 i = 0;
1859 u--;
1882 } 1860 }
1883 dma->cmdk = i; dma->cmdu = u; 1861 dma->cmdk = i; dma->cmdu = u;
1884 1862
1885 i = dma->dstk; u = dma->dstu; 1863 i = dma->dstk; u = dma->dstu;
1886 while (u != 0) { 1864 while (u != 0) {
1887 if (i == HIFN_D_DST_RSIZE)
1888 i = 0;
1889 if (dma->dstr[i].l & __cpu_to_le32(HIFN_D_VALID)) 1865 if (dma->dstr[i].l & __cpu_to_le32(HIFN_D_VALID))
1890 break; 1866 break;
1891 i++, u--; 1867 if (++i == HIFN_D_DST_RSIZE)
1868 i = 0;
1869 u--;
1892 } 1870 }
1893 dma->dstk = i; dma->dstu = u; 1871 dma->dstk = i; dma->dstu = u;
1894 1872
@@ -1933,30 +1911,39 @@ static void hifn_work(struct work_struct *work)
1933 } else 1911 } else
1934 dev->active--; 1912 dev->active--;
1935 1913
1936 if (dev->prev_success == dev->success && dev->started) 1914 if ((dev->prev_success == dev->success) && dev->started)
1937 reset = 1; 1915 reset = 1;
1938 dev->prev_success = dev->success; 1916 dev->prev_success = dev->success;
1939 spin_unlock_irqrestore(&dev->lock, flags); 1917 spin_unlock_irqrestore(&dev->lock, flags);
1940 1918
1941 if (reset) { 1919 if (reset) {
1942 dprintk("%s: r: %08x, active: %d, started: %d, "
1943 "success: %lu: reset: %d.\n",
1944 dev->name, r, dev->active, dev->started,
1945 dev->success, reset);
1946
1947 if (++dev->reset >= 5) { 1920 if (++dev->reset >= 5) {
1948 dprintk("%s: really hard reset.\n", dev->name); 1921 int i;
1922 struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
1923
1924 printk("%s: r: %08x, active: %d, started: %d, "
1925 "success: %lu: qlen: %u/%u, reset: %d.\n",
1926 dev->name, r, dev->active, dev->started,
1927 dev->success, dev->queue.qlen, dev->queue.max_qlen,
1928 reset);
1929
1930 printk("%s: res: ", __func__);
1931 for (i=0; i<HIFN_D_RES_RSIZE; ++i) {
1932 printk("%x.%p ", dma->resr[i].l, dev->sa[i]);
1933 if (dev->sa[i]) {
1934 hifn_process_ready(dev->sa[i], -ENODEV);
1935 hifn_complete_sa(dev, i);
1936 }
1937 }
1938 printk("\n");
1939
1949 hifn_reset_dma(dev, 1); 1940 hifn_reset_dma(dev, 1);
1950 hifn_stop_device(dev); 1941 hifn_stop_device(dev);
1951 hifn_start_device(dev); 1942 hifn_start_device(dev);
1952 dev->reset = 0; 1943 dev->reset = 0;
1953 } 1944 }
1954 1945
1955 spin_lock_irqsave(&dev->lock, flags); 1946 tasklet_schedule(&dev->tasklet);
1956 hifn_check_for_completion(dev, -EBUSY);
1957 hifn_clear_rings(dev);
1958 dev->started = 0;
1959 spin_unlock_irqrestore(&dev->lock, flags);
1960 } 1947 }
1961 1948
1962 schedule_delayed_work(&dev->work, HZ); 1949 schedule_delayed_work(&dev->work, HZ);
@@ -1973,8 +1960,8 @@ static irqreturn_t hifn_interrupt(int irq, void *data)
1973 dprintk("%s: 1 dmacsr: %08x, dmareg: %08x, res: %08x [%d], " 1960 dprintk("%s: 1 dmacsr: %08x, dmareg: %08x, res: %08x [%d], "
1974 "i: %d.%d.%d.%d, u: %d.%d.%d.%d.\n", 1961 "i: %d.%d.%d.%d, u: %d.%d.%d.%d.\n",
1975 dev->name, dmacsr, dev->dmareg, dmacsr & dev->dmareg, dma->cmdi, 1962 dev->name, dmacsr, dev->dmareg, dmacsr & dev->dmareg, dma->cmdi,
1976 dma->cmdu, dma->srcu, dma->dstu, dma->resu, 1963 dma->cmdi, dma->srci, dma->dsti, dma->resi,
1977 dma->cmdi, dma->srci, dma->dsti, dma->resi); 1964 dma->cmdu, dma->srcu, dma->dstu, dma->resu);
1978 1965
1979 if ((dmacsr & dev->dmareg) == 0) 1966 if ((dmacsr & dev->dmareg) == 0)
1980 return IRQ_NONE; 1967 return IRQ_NONE;
@@ -1991,11 +1978,10 @@ static irqreturn_t hifn_interrupt(int irq, void *data)
1991 if (restart) { 1978 if (restart) {
1992 u32 puisr = hifn_read_0(dev, HIFN_0_PUISR); 1979 u32 puisr = hifn_read_0(dev, HIFN_0_PUISR);
1993 1980
1994 if (printk_ratelimit()) 1981 printk(KERN_WARNING "%s: overflow: r: %d, d: %d, puisr: %08x, d: %u.\n",
1995 printk("%s: overflow: r: %d, d: %d, puisr: %08x, d: %u.\n", 1982 dev->name, !!(dmacsr & HIFN_DMACSR_R_OVER),
1996 dev->name, !!(dmacsr & HIFN_DMACSR_R_OVER), 1983 !!(dmacsr & HIFN_DMACSR_D_OVER),
1997 !!(dmacsr & HIFN_DMACSR_D_OVER), 1984 puisr, !!(puisr & HIFN_PUISR_DSTOVER));
1998 puisr, !!(puisr & HIFN_PUISR_DSTOVER));
1999 if (!!(puisr & HIFN_PUISR_DSTOVER)) 1985 if (!!(puisr & HIFN_PUISR_DSTOVER))
2000 hifn_write_0(dev, HIFN_0_PUISR, HIFN_PUISR_DSTOVER); 1986 hifn_write_0(dev, HIFN_0_PUISR, HIFN_PUISR_DSTOVER);
2001 hifn_write_1(dev, HIFN_1_DMA_CSR, dmacsr & (HIFN_DMACSR_R_OVER | 1987 hifn_write_1(dev, HIFN_1_DMA_CSR, dmacsr & (HIFN_DMACSR_R_OVER |
@@ -2005,12 +1991,11 @@ static irqreturn_t hifn_interrupt(int irq, void *data)
2005 restart = dmacsr & (HIFN_DMACSR_C_ABORT | HIFN_DMACSR_S_ABORT | 1991 restart = dmacsr & (HIFN_DMACSR_C_ABORT | HIFN_DMACSR_S_ABORT |
2006 HIFN_DMACSR_D_ABORT | HIFN_DMACSR_R_ABORT); 1992 HIFN_DMACSR_D_ABORT | HIFN_DMACSR_R_ABORT);
2007 if (restart) { 1993 if (restart) {
2008 if (printk_ratelimit()) 1994 printk(KERN_WARNING "%s: abort: c: %d, s: %d, d: %d, r: %d.\n",
2009 printk("%s: abort: c: %d, s: %d, d: %d, r: %d.\n", 1995 dev->name, !!(dmacsr & HIFN_DMACSR_C_ABORT),
2010 dev->name, !!(dmacsr & HIFN_DMACSR_C_ABORT), 1996 !!(dmacsr & HIFN_DMACSR_S_ABORT),
2011 !!(dmacsr & HIFN_DMACSR_S_ABORT), 1997 !!(dmacsr & HIFN_DMACSR_D_ABORT),
2012 !!(dmacsr & HIFN_DMACSR_D_ABORT), 1998 !!(dmacsr & HIFN_DMACSR_R_ABORT));
2013 !!(dmacsr & HIFN_DMACSR_R_ABORT));
2014 hifn_reset_dma(dev, 1); 1999 hifn_reset_dma(dev, 1);
2015 hifn_init_dma(dev); 2000 hifn_init_dma(dev);
2016 hifn_init_registers(dev); 2001 hifn_init_registers(dev);
@@ -2023,7 +2008,6 @@ static irqreturn_t hifn_interrupt(int irq, void *data)
2023 } 2008 }
2024 2009
2025 tasklet_schedule(&dev->tasklet); 2010 tasklet_schedule(&dev->tasklet);
2026 hifn_clear_rings(dev);
2027 2011
2028 return IRQ_HANDLED; 2012 return IRQ_HANDLED;
2029} 2013}
@@ -2037,21 +2021,25 @@ static void hifn_flush(struct hifn_device *dev)
2037 struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt; 2021 struct hifn_dma *dma = (struct hifn_dma *)dev->desc_virt;
2038 int i; 2022 int i;
2039 2023
2040 spin_lock_irqsave(&dev->lock, flags);
2041 for (i=0; i<HIFN_D_RES_RSIZE; ++i) { 2024 for (i=0; i<HIFN_D_RES_RSIZE; ++i) {
2042 struct hifn_desc *d = &dma->resr[i]; 2025 struct hifn_desc *d = &dma->resr[i];
2043 2026
2044 if (dev->sa[i]) { 2027 if (dev->sa[i]) {
2045 hifn_process_ready(dev->sa[i], 2028 hifn_process_ready(dev->sa[i],
2046 (d->l & __cpu_to_le32(HIFN_D_VALID))?-ENODEV:0); 2029 (d->l & __cpu_to_le32(HIFN_D_VALID))?-ENODEV:0);
2030 hifn_complete_sa(dev, i);
2047 } 2031 }
2048 } 2032 }
2049 2033
2034 spin_lock_irqsave(&dev->lock, flags);
2050 while ((async_req = crypto_dequeue_request(&dev->queue))) { 2035 while ((async_req = crypto_dequeue_request(&dev->queue))) {
2051 ctx = crypto_tfm_ctx(async_req->tfm); 2036 ctx = crypto_tfm_ctx(async_req->tfm);
2052 req = container_of(async_req, struct ablkcipher_request, base); 2037 req = container_of(async_req, struct ablkcipher_request, base);
2038 spin_unlock_irqrestore(&dev->lock, flags);
2053 2039
2054 hifn_process_ready(req, -ENODEV); 2040 hifn_process_ready(req, -ENODEV);
2041
2042 spin_lock_irqsave(&dev->lock, flags);
2055 } 2043 }
2056 spin_unlock_irqrestore(&dev->lock, flags); 2044 spin_unlock_irqrestore(&dev->lock, flags);
2057} 2045}
@@ -2568,7 +2556,7 @@ static void hifn_tasklet_callback(unsigned long data)
2568 * (like dev->success), but they are used in process 2556 * (like dev->success), but they are used in process
2569 * context or update is atomic (like setting dev->sa[i] to NULL). 2557 * context or update is atomic (like setting dev->sa[i] to NULL).
2570 */ 2558 */
2571 hifn_check_for_completion(dev, 0); 2559 hifn_clear_rings(dev, 0);
2572 2560
2573 if (dev->started < HIFN_QUEUE_LENGTH && dev->queue.qlen) 2561 if (dev->started < HIFN_QUEUE_LENGTH && dev->queue.qlen)
2574 hifn_process_queue(dev); 2562 hifn_process_queue(dev);