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authorBrice Goglin <brice@myri.com>2007-01-09 15:04:25 -0500
committerJeff Garzik <jeff@garzik.org>2007-01-18 12:02:41 -0500
commit6ebc087a10c3953d59a61f362bd532f2d9468d1b (patch)
tree6b798d7fbefbe4f3100a6f2069dacecea08a670b /drivers
parent553af56775b3f23bf64f87090ab81a62bef2837b (diff)
myri10ge: make wc_fifo usage load-time tunable
Under some circumstances, using WC without the WC fifo is faster. So we make it possible to tune wc_fifo with a module parameter. Signed-off-by: Brice Goglin <brice@myri.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/myri10ge/myri10ge.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c
index 07cf574197e5..b06e0eba52f6 100644
--- a/drivers/net/myri10ge/myri10ge.c
+++ b/drivers/net/myri10ge/myri10ge.c
@@ -274,6 +274,10 @@ static int myri10ge_fill_thresh = 256;
274module_param(myri10ge_fill_thresh, int, S_IRUGO | S_IWUSR); 274module_param(myri10ge_fill_thresh, int, S_IRUGO | S_IWUSR);
275MODULE_PARM_DESC(myri10ge_fill_thresh, "Number of empty rx slots allowed\n"); 275MODULE_PARM_DESC(myri10ge_fill_thresh, "Number of empty rx slots allowed\n");
276 276
277static int myri10ge_wcfifo = 1;
278module_param(myri10ge_wcfifo, int, S_IRUGO);
279MODULE_PARM_DESC(myri10ge_wcfifo, "Enable WC Fifo when WC is enabled\n");
280
277#define MYRI10GE_FW_OFFSET 1024*1024 281#define MYRI10GE_FW_OFFSET 1024*1024
278#define MYRI10GE_HIGHPART_TO_U32(X) \ 282#define MYRI10GE_HIGHPART_TO_U32(X) \
279(sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0) 283(sizeof (X) == 8) ? ((u32)((u64)(X) >> 32)) : (0)
@@ -1714,7 +1718,7 @@ static int myri10ge_open(struct net_device *dev)
1714 goto abort_with_irq; 1718 goto abort_with_irq;
1715 } 1719 }
1716 1720
1717 if (mgp->mtrr >= 0) { 1721 if (myri10ge_wcfifo && mgp->mtrr >= 0) {
1718 mgp->tx.wc_fifo = (u8 __iomem *) mgp->sram + MXGEFW_ETH_SEND_4; 1722 mgp->tx.wc_fifo = (u8 __iomem *) mgp->sram + MXGEFW_ETH_SEND_4;
1719 mgp->rx_small.wc_fifo = 1723 mgp->rx_small.wc_fifo =
1720 (u8 __iomem *) mgp->sram + MXGEFW_ETH_RECV_SMALL; 1724 (u8 __iomem *) mgp->sram + MXGEFW_ETH_RECV_SMALL;