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authorFrancois Romieu <romieu@fr.zoreil.com>2007-02-21 16:40:46 -0500
committerJeff Garzik <jeff@garzik.org>2007-07-08 22:16:44 -0400
commit07d3f51febdc139c63e95671126fd2791113902e (patch)
tree2ea6f2393942fbd382db11fd0a5eb49681abb376 /drivers
parent901dda2b5f0dfbd310d22d497ec8826d4c60363b (diff)
r8169: cleanup
No functionnal change: - trim the old history log - whitespace/indent/case police - unsigned int where signedness does not matter - removal of obsolete assert - needless cast from void * (dev_instance) - remove dead code once related to power management - use netdev_alloc_skb. Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> Cc: Stephen Hemminger <shemminger@linux-foundation.org> Cc: Edward Hsu <edward_hsu@realtek.com.tw>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/r8169.c347
1 files changed, 145 insertions, 202 deletions
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 2ac532a6ed3e..5d9e75481f42 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -1,40 +1,11 @@
1/* 1/*
2========================================================================= 2 * r8169.c: RealTek 8169/8168/8101 ethernet driver.
3 r8169.c: A RealTek RTL-8169 Gigabit Ethernet driver for Linux kernel 2.4.x. 3 *
4 -------------------------------------------------------------------- 4 * Copyright (c) 2002 ShuChen <shuchen@realtek.com.tw>
5 5 * Copyright (c) 2003 - 2007 Francois Romieu <romieu@fr.zoreil.com>
6 History: 6 * Copyright (c) a lot of people too. Please respect their work.
7 Feb 4 2002 - created initially by ShuChen <shuchen@realtek.com.tw>. 7 *
8 May 20 2002 - Add link status force-mode and TBI mode support. 8 * See MAINTAINERS file for support contact information.
9 2004 - Massive updates. See kernel SCM system for details.
10=========================================================================
11VERSION 1.1 <2002/10/4>
12
13 The bit4:0 of MII register 4 is called "selector field", and have to be
14 00001b to indicate support of IEEE std 802.3 during NWay process of
15 exchanging Link Code Word (FLP).
16
17VERSION 1.2 <2002/11/30>
18
19 - Large style cleanup
20 - Use ether_crc in stock kernel (linux/crc32.h)
21 - Copy mc_filter setup code from 8139cp
22 (includes an optimization, and avoids set_bit use)
23
24VERSION 1.6LK <2004/04/14>
25
26 - Merge of Realtek's version 1.6
27 - Conversion to DMA API
28 - Suspend/resume
29 - Endianness
30 - Misc Rx/Tx bugs
31
32VERSION 2.2LK <2005/01/25>
33
34 - RX csum, TX csum/SG, TSO
35 - VLAN
36 - baby (< 7200) Jumbo frames support
37 - Merge of Realtek's version 2.2 (new phy)
38 */ 9 */
39 10
40#include <linux/module.h> 11#include <linux/module.h>
@@ -108,7 +79,7 @@ static const int multicast_filter_limit = 32;
108#define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */ 79#define RX_FIFO_THRESH 7 /* 7 means NO threshold, Rx buffer level before first PCI xfer. */
109#define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ 80#define RX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
110#define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */ 81#define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
111#define EarlyTxThld 0x3F /* 0x3F means NO early transmit */ 82#define EarlyTxThld 0x3F /* 0x3F means NO early transmit */
112#define RxPacketMaxSize 0x3FE8 /* 16K - 1 - ETH_HLEN - VLAN - CRC... */ 83#define RxPacketMaxSize 0x3FE8 /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
113#define SafeMtu 0x1c20 /* ... actually life sucks beyond ~7k */ 84#define SafeMtu 0x1c20 /* ... actually life sucks beyond ~7k */
114#define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */ 85#define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
@@ -209,62 +180,62 @@ static struct {
209 u32 msg_enable; 180 u32 msg_enable;
210} debug = { -1 }; 181} debug = { -1 };
211 182
212enum RTL8169_registers { 183enum rtl_registers {
213 MAC0 = 0, /* Ethernet hardware address. */ 184 MAC0 = 0, /* Ethernet hardware address. */
214 MAR0 = 8, /* Multicast filter. */ 185 MAR0 = 8, /* Multicast filter. */
215 CounterAddrLow = 0x10, 186 CounterAddrLow = 0x10,
216 CounterAddrHigh = 0x14, 187 CounterAddrHigh = 0x14,
217 TxDescStartAddrLow = 0x20, 188 TxDescStartAddrLow = 0x20,
218 TxDescStartAddrHigh = 0x24, 189 TxDescStartAddrHigh = 0x24,
219 TxHDescStartAddrLow = 0x28, 190 TxHDescStartAddrLow = 0x28,
220 TxHDescStartAddrHigh = 0x2c, 191 TxHDescStartAddrHigh = 0x2c,
221 FLASH = 0x30, 192 FLASH = 0x30,
222 ERSR = 0x36, 193 ERSR = 0x36,
223 ChipCmd = 0x37, 194 ChipCmd = 0x37,
224 TxPoll = 0x38, 195 TxPoll = 0x38,
225 IntrMask = 0x3C, 196 IntrMask = 0x3c,
226 IntrStatus = 0x3E, 197 IntrStatus = 0x3e,
227 TxConfig = 0x40, 198 TxConfig = 0x40,
228 RxConfig = 0x44, 199 RxConfig = 0x44,
229 RxMissed = 0x4C, 200 RxMissed = 0x4c,
230 Cfg9346 = 0x50, 201 Cfg9346 = 0x50,
231 Config0 = 0x51, 202 Config0 = 0x51,
232 Config1 = 0x52, 203 Config1 = 0x52,
233 Config2 = 0x53, 204 Config2 = 0x53,
234 Config3 = 0x54, 205 Config3 = 0x54,
235 Config4 = 0x55, 206 Config4 = 0x55,
236 Config5 = 0x56, 207 Config5 = 0x56,
237 MultiIntr = 0x5C, 208 MultiIntr = 0x5c,
238 PHYAR = 0x60, 209 PHYAR = 0x60,
239 TBICSR = 0x64, 210 TBICSR = 0x64,
240 TBI_ANAR = 0x68, 211 TBI_ANAR = 0x68,
241 TBI_LPAR = 0x6A, 212 TBI_LPAR = 0x6a,
242 PHYstatus = 0x6C, 213 PHYstatus = 0x6c,
243 RxMaxSize = 0xDA, 214 RxMaxSize = 0xda,
244 CPlusCmd = 0xE0, 215 CPlusCmd = 0xe0,
245 IntrMitigate = 0xE2, 216 IntrMitigate = 0xe2,
246 RxDescAddrLow = 0xE4, 217 RxDescAddrLow = 0xe4,
247 RxDescAddrHigh = 0xE8, 218 RxDescAddrHigh = 0xe8,
248 EarlyTxThres = 0xEC, 219 EarlyTxThres = 0xec,
249 FuncEvent = 0xF0, 220 FuncEvent = 0xf0,
250 FuncEventMask = 0xF4, 221 FuncEventMask = 0xf4,
251 FuncPresetState = 0xF8, 222 FuncPresetState = 0xf8,
252 FuncForceEvent = 0xFC, 223 FuncForceEvent = 0xfc,
253}; 224};
254 225
255enum RTL8169_register_content { 226enum rtl_register_content {
256 /* InterruptStatusBits */ 227 /* InterruptStatusBits */
257 SYSErr = 0x8000, 228 SYSErr = 0x8000,
258 PCSTimeout = 0x4000, 229 PCSTimeout = 0x4000,
259 SWInt = 0x0100, 230 SWInt = 0x0100,
260 TxDescUnavail = 0x80, 231 TxDescUnavail = 0x0080,
261 RxFIFOOver = 0x40, 232 RxFIFOOver = 0x0040,
262 LinkChg = 0x20, 233 LinkChg = 0x0020,
263 RxOverflow = 0x10, 234 RxOverflow = 0x0010,
264 TxErr = 0x08, 235 TxErr = 0x0008,
265 TxOK = 0x04, 236 TxOK = 0x0004,
266 RxErr = 0x02, 237 RxErr = 0x0002,
267 RxOK = 0x01, 238 RxOK = 0x0001,
268 239
269 /* RxStatusDesc */ 240 /* RxStatusDesc */
270 RxFOVF = (1 << 23), 241 RxFOVF = (1 << 23),
@@ -274,26 +245,26 @@ enum RTL8169_register_content {
274 RxCRC = (1 << 19), 245 RxCRC = (1 << 19),
275 246
276 /* ChipCmdBits */ 247 /* ChipCmdBits */
277 CmdReset = 0x10, 248 CmdReset = 0x10,
278 CmdRxEnb = 0x08, 249 CmdRxEnb = 0x08,
279 CmdTxEnb = 0x04, 250 CmdTxEnb = 0x04,
280 RxBufEmpty = 0x01, 251 RxBufEmpty = 0x01,
281 252
282 /* Cfg9346Bits */ 253 /* Cfg9346Bits */
283 Cfg9346_Lock = 0x00, 254 Cfg9346_Lock = 0x00,
284 Cfg9346_Unlock = 0xC0, 255 Cfg9346_Unlock = 0xc0,
285 256
286 /* rx_mode_bits */ 257 /* rx_mode_bits */
287 AcceptErr = 0x20, 258 AcceptErr = 0x20,
288 AcceptRunt = 0x10, 259 AcceptRunt = 0x10,
289 AcceptBroadcast = 0x08, 260 AcceptBroadcast = 0x08,
290 AcceptMulticast = 0x04, 261 AcceptMulticast = 0x04,
291 AcceptMyPhys = 0x02, 262 AcceptMyPhys = 0x02,
292 AcceptAllPhys = 0x01, 263 AcceptAllPhys = 0x01,
293 264
294 /* RxConfigBits */ 265 /* RxConfigBits */
295 RxCfgFIFOShift = 13, 266 RxCfgFIFOShift = 13,
296 RxCfgDMAShift = 8, 267 RxCfgDMAShift = 8,
297 268
298 /* TxConfigBits */ 269 /* TxConfigBits */
299 TxInterFrameGapShift = 24, 270 TxInterFrameGapShift = 24,
@@ -337,23 +308,23 @@ enum RTL8169_register_content {
337 INTT_3 = 0x0003, // 8168 308 INTT_3 = 0x0003, // 8168
338 309
339 /* rtl8169_PHYstatus */ 310 /* rtl8169_PHYstatus */
340 TBI_Enable = 0x80, 311 TBI_Enable = 0x80,
341 TxFlowCtrl = 0x40, 312 TxFlowCtrl = 0x40,
342 RxFlowCtrl = 0x20, 313 RxFlowCtrl = 0x20,
343 _1000bpsF = 0x10, 314 _1000bpsF = 0x10,
344 _100bps = 0x08, 315 _100bps = 0x08,
345 _10bps = 0x04, 316 _10bps = 0x04,
346 LinkStatus = 0x02, 317 LinkStatus = 0x02,
347 FullDup = 0x01, 318 FullDup = 0x01,
348 319
349 /* _TBICSRBit */ 320 /* _TBICSRBit */
350 TBILinkOK = 0x02000000, 321 TBILinkOK = 0x02000000,
351 322
352 /* DumpCounterCommand */ 323 /* DumpCounterCommand */
353 CounterDump = 0x8, 324 CounterDump = 0x8,
354}; 325};
355 326
356enum _DescStatusBit { 327enum desc_status_bit {
357 DescOwn = (1 << 31), /* Descriptor is owned by NIC */ 328 DescOwn = (1 << 31), /* Descriptor is owned by NIC */
358 RingEnd = (1 << 30), /* End of descriptor ring */ 329 RingEnd = (1 << 30), /* End of descriptor ring */
359 FirstFrag = (1 << 29), /* First segment of a packet */ 330 FirstFrag = (1 << 29), /* First segment of a packet */
@@ -478,28 +449,34 @@ static int rtl8169_poll(struct net_device *dev, int *budget);
478static const unsigned int rtl8169_rx_config = 449static const unsigned int rtl8169_rx_config =
479 (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift); 450 (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift);
480 451
481static void mdio_write(void __iomem *ioaddr, int RegAddr, int value) 452static void mdio_write(void __iomem *ioaddr, int reg_addr, int value)
482{ 453{
483 int i; 454 int i;
484 455
485 RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value); 456 RTL_W32(PHYAR, 0x80000000 | (reg_addr & 0xFF) << 16 | value);
486 457
487 for (i = 20; i > 0; i--) { 458 for (i = 20; i > 0; i--) {
488 /* Check if the RTL8169 has completed writing to the specified MII register */ 459 /*
460 * Check if the RTL8169 has completed writing to the specified
461 * MII register.
462 */
489 if (!(RTL_R32(PHYAR) & 0x80000000)) 463 if (!(RTL_R32(PHYAR) & 0x80000000))
490 break; 464 break;
491 udelay(25); 465 udelay(25);
492 } 466 }
493} 467}
494 468
495static int mdio_read(void __iomem *ioaddr, int RegAddr) 469static int mdio_read(void __iomem *ioaddr, int reg_addr)
496{ 470{
497 int i, value = -1; 471 int i, value = -1;
498 472
499 RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16); 473 RTL_W32(PHYAR, 0x0 | (reg_addr & 0xFF) << 16);
500 474
501 for (i = 20; i > 0; i--) { 475 for (i = 20; i > 0; i--) {
502 /* Check if the RTL8169 has completed retrieving data from the specified MII register */ 476 /*
477 * Check if the RTL8169 has completed retrieving data from
478 * the specified MII register.
479 */
503 if (RTL_R32(PHYAR) & 0x80000000) { 480 if (RTL_R32(PHYAR) & 0x80000000) {
504 value = (int) (RTL_R32(PHYAR) & 0xFFFF); 481 value = (int) (RTL_R32(PHYAR) & 0xFFFF);
505 break; 482 break;
@@ -557,7 +534,8 @@ static void rtl8169_xmii_reset_enable(void __iomem *ioaddr)
557} 534}
558 535
559static void rtl8169_check_link_status(struct net_device *dev, 536static void rtl8169_check_link_status(struct net_device *dev,
560 struct rtl8169_private *tp, void __iomem *ioaddr) 537 struct rtl8169_private *tp,
538 void __iomem *ioaddr)
561{ 539{
562 unsigned long flags; 540 unsigned long flags;
563 541
@@ -613,7 +591,7 @@ static int rtl8169_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
613{ 591{
614 struct rtl8169_private *tp = netdev_priv(dev); 592 struct rtl8169_private *tp = netdev_priv(dev);
615 void __iomem *ioaddr = tp->mmio_addr; 593 void __iomem *ioaddr = tp->mmio_addr;
616 int i; 594 unsigned int i;
617 static struct { 595 static struct {
618 u32 opt; 596 u32 opt;
619 u16 reg; 597 u16 reg;
@@ -839,8 +817,7 @@ static int rtl8169_rx_vlan_skb(struct rtl8169_private *tp, struct RxDesc *desc,
839 int ret; 817 int ret;
840 818
841 if (tp->vlgrp && (opts2 & RxVlanTag)) { 819 if (tp->vlgrp && (opts2 & RxVlanTag)) {
842 rtl8169_rx_hwaccel_skb(skb, tp->vlgrp, 820 rtl8169_rx_hwaccel_skb(skb, tp->vlgrp, swab16(opts2 & 0xffff));
843 swab16(opts2 & 0xffff));
844 ret = 0; 821 ret = 0;
845 } else 822 } else
846 ret = -1; 823 ret = -1;
@@ -1061,7 +1038,6 @@ static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data)
1061 } 1038 }
1062} 1039}
1063 1040
1064
1065static const struct ethtool_ops rtl8169_ethtool_ops = { 1041static const struct ethtool_ops rtl8169_ethtool_ops = {
1066 .get_drvinfo = rtl8169_get_drvinfo, 1042 .get_drvinfo = rtl8169_get_drvinfo,
1067 .get_regs_len = rtl8169_get_regs_len, 1043 .get_regs_len = rtl8169_get_regs_len,
@@ -1087,8 +1063,8 @@ static const struct ethtool_ops rtl8169_ethtool_ops = {
1087 .get_perm_addr = ethtool_op_get_perm_addr, 1063 .get_perm_addr = ethtool_op_get_perm_addr,
1088}; 1064};
1089 1065
1090static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, int bitnum, 1066static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg,
1091 int bitval) 1067 int bitnum, int bitval)
1092{ 1068{
1093 int val; 1069 int val;
1094 1070
@@ -1098,7 +1074,8 @@ static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, int bitnum
1098 mdio_write(ioaddr, reg, val & 0xffff); 1074 mdio_write(ioaddr, reg, val & 0xffff);
1099} 1075}
1100 1076
1101static void rtl8169_get_mac_version(struct rtl8169_private *tp, void __iomem *ioaddr) 1077static void rtl8169_get_mac_version(struct rtl8169_private *tp,
1078 void __iomem *ioaddr)
1102{ 1079{
1103 /* 1080 /*
1104 * The driver currently handles the 8168Bf and the 8168Be identically 1081 * The driver currently handles the 8168Bf and the 8168Be identically
@@ -1140,7 +1117,8 @@ static void rtl8169_print_mac_version(struct rtl8169_private *tp)
1140 dprintk("mac_version = 0x%02x\n", tp->mac_version); 1117 dprintk("mac_version = 0x%02x\n", tp->mac_version);
1141} 1118}
1142 1119
1143static void rtl8169_get_phy_version(struct rtl8169_private *tp, void __iomem *ioaddr) 1120static void rtl8169_get_phy_version(struct rtl8169_private *tp,
1121 void __iomem *ioaddr)
1144{ 1122{
1145 const struct { 1123 const struct {
1146 u16 mask; 1124 u16 mask;
@@ -1217,7 +1195,7 @@ static void rtl8169_hw_phy_config(struct net_device *dev)
1217 0xbf00 } //w 0 15 0 bf00 1195 0xbf00 } //w 0 15 0 bf00
1218 } 1196 }
1219 }, *p = phy_magic; 1197 }, *p = phy_magic;
1220 int i; 1198 unsigned int i;
1221 1199
1222 rtl8169_print_mac_version(tp); 1200 rtl8169_print_mac_version(tp);
1223 rtl8169_print_phy_version(tp); 1201 rtl8169_print_phy_version(tp);
@@ -1351,7 +1329,7 @@ static void rtl8169_phy_reset(struct net_device *dev,
1351 struct rtl8169_private *tp) 1329 struct rtl8169_private *tp)
1352{ 1330{
1353 void __iomem *ioaddr = tp->mmio_addr; 1331 void __iomem *ioaddr = tp->mmio_addr;
1354 int i; 1332 unsigned int i;
1355 1333
1356 tp->phy_reset_enable(ioaddr); 1334 tp->phy_reset_enable(ioaddr);
1357 for (i = 0; i < 100; i++) { 1335 for (i = 0; i < 100; i++) {
@@ -1463,8 +1441,8 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1463 struct rtl8169_private *tp; 1441 struct rtl8169_private *tp;
1464 struct net_device *dev; 1442 struct net_device *dev;
1465 void __iomem *ioaddr; 1443 void __iomem *ioaddr;
1466 unsigned int pm_cap; 1444 unsigned int i;
1467 int i, rc; 1445 int rc;
1468 1446
1469 if (netif_msg_drv(&debug)) { 1447 if (netif_msg_drv(&debug)) {
1470 printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n", 1448 printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
@@ -1497,20 +1475,6 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1497 if (rc < 0) 1475 if (rc < 0)
1498 goto err_out_disable_2; 1476 goto err_out_disable_2;
1499 1477
1500 /* save power state before pci_enable_device overwrites it */
1501 pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
1502 if (pm_cap) {
1503 u16 pwr_command, acpi_idle_state;
1504
1505 pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command);
1506 acpi_idle_state = pwr_command & PCI_PM_CTRL_STATE_MASK;
1507 } else {
1508 if (netif_msg_probe(tp)) {
1509 dev_err(&pdev->dev,
1510 "PowerManagement capability not found.\n");
1511 }
1512 }
1513
1514 /* make sure PCI base addr 1 is MMIO */ 1478 /* make sure PCI base addr 1 is MMIO */
1515 if (!(pci_resource_flags(pdev, region) & IORESOURCE_MEM)) { 1479 if (!(pci_resource_flags(pdev, region) & IORESOURCE_MEM)) {
1516 if (netif_msg_probe(tp)) { 1480 if (netif_msg_probe(tp)) {
@@ -1574,7 +1538,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1574 RTL_W8(ChipCmd, CmdReset); 1538 RTL_W8(ChipCmd, CmdReset);
1575 1539
1576 /* Check that the chip has finished the reset. */ 1540 /* Check that the chip has finished the reset. */
1577 for (i = 100; i > 0; i--) { 1541 for (i = 0; i < 100; i++) {
1578 if ((RTL_R8(ChipCmd) & CmdReset) == 0) 1542 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1579 break; 1543 break;
1580 msleep_interruptible(1); 1544 msleep_interruptible(1);
@@ -1706,15 +1670,11 @@ err_out_free_dev_1:
1706 goto out; 1670 goto out;
1707} 1671}
1708 1672
1709static void __devexit 1673static void __devexit rtl8169_remove_one(struct pci_dev *pdev)
1710rtl8169_remove_one(struct pci_dev *pdev)
1711{ 1674{
1712 struct net_device *dev = pci_get_drvdata(pdev); 1675 struct net_device *dev = pci_get_drvdata(pdev);
1713 struct rtl8169_private *tp = netdev_priv(dev); 1676 struct rtl8169_private *tp = netdev_priv(dev);
1714 1677
1715 assert(dev != NULL);
1716 assert(tp != NULL);
1717
1718 flush_scheduled_work(); 1678 flush_scheduled_work();
1719 1679
1720 unregister_netdev(dev); 1680 unregister_netdev(dev);
@@ -1814,13 +1774,13 @@ static void rtl_hw_start(struct net_device *dev)
1814{ 1774{
1815 struct rtl8169_private *tp = netdev_priv(dev); 1775 struct rtl8169_private *tp = netdev_priv(dev);
1816 void __iomem *ioaddr = tp->mmio_addr; 1776 void __iomem *ioaddr = tp->mmio_addr;
1817 u32 i; 1777 unsigned int i;
1818 1778
1819 /* Soft reset the chip. */ 1779 /* Soft reset the chip. */
1820 RTL_W8(ChipCmd, CmdReset); 1780 RTL_W8(ChipCmd, CmdReset);
1821 1781
1822 /* Check that the chip has finished the reset. */ 1782 /* Check that the chip has finished the reset. */
1823 for (i = 100; i > 0; i--) { 1783 for (i = 0; i < 100; i++) {
1824 if ((RTL_R8(ChipCmd) & CmdReset) == 0) 1784 if ((RTL_R8(ChipCmd) & CmdReset) == 0)
1825 break; 1785 break;
1826 msleep_interruptible(1); 1786 msleep_interruptible(1);
@@ -2132,7 +2092,7 @@ err_out:
2132 2092
2133static void rtl8169_rx_clear(struct rtl8169_private *tp) 2093static void rtl8169_rx_clear(struct rtl8169_private *tp)
2134{ 2094{
2135 int i; 2095 unsigned int i;
2136 2096
2137 for (i = 0; i < NUM_RX_DESC; i++) { 2097 for (i = 0; i < NUM_RX_DESC; i++) {
2138 if (tp->Rx_skbuff[i]) { 2098 if (tp->Rx_skbuff[i]) {
@@ -2274,14 +2234,9 @@ static void rtl8169_reinit_task(struct work_struct *work)
2274 2234
2275 ret = rtl8169_open(dev); 2235 ret = rtl8169_open(dev);
2276 if (unlikely(ret < 0)) { 2236 if (unlikely(ret < 0)) {
2277 if (net_ratelimit()) { 2237 if (net_ratelimit() && netif_msg_drv(tp)) {
2278 struct rtl8169_private *tp = netdev_priv(dev); 2238 printk(PFX KERN_ERR "%s: reinit failure (status = %d)."
2279 2239 " Rescheduling.\n", dev->name, ret);
2280 if (netif_msg_drv(tp)) {
2281 printk(PFX KERN_ERR
2282 "%s: reinit failure (status = %d)."
2283 " Rescheduling.\n", dev->name, ret);
2284 }
2285 } 2240 }
2286 rtl8169_schedule_work(dev, rtl8169_reinit_task); 2241 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2287 } 2242 }
@@ -2311,13 +2266,9 @@ static void rtl8169_reset_task(struct work_struct *work)
2311 rtl_hw_start(dev); 2266 rtl_hw_start(dev);
2312 netif_wake_queue(dev); 2267 netif_wake_queue(dev);
2313 } else { 2268 } else {
2314 if (net_ratelimit()) { 2269 if (net_ratelimit() && netif_msg_intr(tp)) {
2315 struct rtl8169_private *tp = netdev_priv(dev); 2270 printk(PFX KERN_EMERG "%s: Rx buffers shortage\n",
2316 2271 dev->name);
2317 if (netif_msg_intr(tp)) {
2318 printk(PFX KERN_EMERG
2319 "%s: Rx buffers shortage\n", dev->name);
2320 }
2321 } 2272 }
2322 rtl8169_schedule_work(dev, rtl8169_reset_task); 2273 rtl8169_schedule_work(dev, rtl8169_reset_task);
2323 } 2274 }
@@ -2524,16 +2475,12 @@ static void rtl8169_pcierr_interrupt(struct net_device *dev)
2524 rtl8169_schedule_work(dev, rtl8169_reinit_task); 2475 rtl8169_schedule_work(dev, rtl8169_reinit_task);
2525} 2476}
2526 2477
2527static void 2478static void rtl8169_tx_interrupt(struct net_device *dev,
2528rtl8169_tx_interrupt(struct net_device *dev, struct rtl8169_private *tp, 2479 struct rtl8169_private *tp,
2529 void __iomem *ioaddr) 2480 void __iomem *ioaddr)
2530{ 2481{
2531 unsigned int dirty_tx, tx_left; 2482 unsigned int dirty_tx, tx_left;
2532 2483
2533 assert(dev != NULL);
2534 assert(tp != NULL);
2535 assert(ioaddr != NULL);
2536
2537 dirty_tx = tp->dirty_tx; 2484 dirty_tx = tp->dirty_tx;
2538 smp_rmb(); 2485 smp_rmb();
2539 tx_left = tp->cur_tx - dirty_tx; 2486 tx_left = tp->cur_tx - dirty_tx;
@@ -2590,8 +2537,9 @@ static inline void rtl8169_rx_csum(struct sk_buff *skb, struct RxDesc *desc)
2590 skb->ip_summed = CHECKSUM_NONE; 2537 skb->ip_summed = CHECKSUM_NONE;
2591} 2538}
2592 2539
2593static inline bool rtl8169_try_rx_copy(struct sk_buff **sk_buff, int pkt_size, 2540static inline bool rtl8169_try_rx_copy(struct sk_buff **sk_buff,
2594 struct pci_dev *pdev, dma_addr_t addr) 2541 struct rtl8169_private *tp, int pkt_size,
2542 dma_addr_t addr)
2595{ 2543{
2596 struct sk_buff *skb; 2544 struct sk_buff *skb;
2597 bool done = false; 2545 bool done = false;
@@ -2599,11 +2547,12 @@ static inline bool rtl8169_try_rx_copy(struct sk_buff **sk_buff, int pkt_size,
2599 if (pkt_size >= rx_copybreak) 2547 if (pkt_size >= rx_copybreak)
2600 goto out; 2548 goto out;
2601 2549
2602 skb = dev_alloc_skb(pkt_size + NET_IP_ALIGN); 2550 skb = netdev_alloc_skb(tp->dev, pkt_size + NET_IP_ALIGN);
2603 if (!skb) 2551 if (!skb)
2604 goto out; 2552 goto out;
2605 2553
2606 pci_dma_sync_single_for_cpu(pdev, addr, pkt_size, PCI_DMA_FROMDEVICE); 2554 pci_dma_sync_single_for_cpu(tp->pci_dev, addr, pkt_size,
2555 PCI_DMA_FROMDEVICE);
2607 skb_reserve(skb, NET_IP_ALIGN); 2556 skb_reserve(skb, NET_IP_ALIGN);
2608 skb_copy_from_linear_data(*sk_buff, skb->data, pkt_size); 2557 skb_copy_from_linear_data(*sk_buff, skb->data, pkt_size);
2609 *sk_buff = skb; 2558 *sk_buff = skb;
@@ -2612,17 +2561,13 @@ out:
2612 return done; 2561 return done;
2613} 2562}
2614 2563
2615static int 2564static int rtl8169_rx_interrupt(struct net_device *dev,
2616rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp, 2565 struct rtl8169_private *tp,
2617 void __iomem *ioaddr) 2566 void __iomem *ioaddr)
2618{ 2567{
2619 unsigned int cur_rx, rx_left; 2568 unsigned int cur_rx, rx_left;
2620 unsigned int delta, count; 2569 unsigned int delta, count;
2621 2570
2622 assert(dev != NULL);
2623 assert(tp != NULL);
2624 assert(ioaddr != NULL);
2625
2626 cur_rx = tp->cur_rx; 2571 cur_rx = tp->cur_rx;
2627 rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx; 2572 rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx;
2628 rx_left = rtl8169_rx_quota(rx_left, (u32) dev->quota); 2573 rx_left = rtl8169_rx_quota(rx_left, (u32) dev->quota);
@@ -2673,7 +2618,7 @@ rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2673 2618
2674 rtl8169_rx_csum(skb, desc); 2619 rtl8169_rx_csum(skb, desc);
2675 2620
2676 if (rtl8169_try_rx_copy(&skb, pkt_size, pdev, addr)) { 2621 if (rtl8169_try_rx_copy(&skb, tp, pkt_size, addr)) {
2677 pci_dma_sync_single_for_device(pdev, addr, 2622 pci_dma_sync_single_for_device(pdev, addr,
2678 pkt_size, PCI_DMA_FROMDEVICE); 2623 pkt_size, PCI_DMA_FROMDEVICE);
2679 rtl8169_mark_to_asic(desc, tp->rx_buf_sz); 2624 rtl8169_mark_to_asic(desc, tp->rx_buf_sz);
@@ -2723,11 +2668,9 @@ rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp,
2723 return count; 2668 return count;
2724} 2669}
2725 2670
2726/* The interrupt handler does all of the Rx thread work and cleans up after the Tx thread. */ 2671static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance)
2727static irqreturn_t
2728rtl8169_interrupt(int irq, void *dev_instance)
2729{ 2672{
2730 struct net_device *dev = (struct net_device *) dev_instance; 2673 struct net_device *dev = dev_instance;
2731 struct rtl8169_private *tp = netdev_priv(dev); 2674 struct rtl8169_private *tp = netdev_priv(dev);
2732 int boguscnt = max_interrupt_work; 2675 int boguscnt = max_interrupt_work;
2733 void __iomem *ioaddr = tp->mmio_addr; 2676 void __iomem *ioaddr = tp->mmio_addr;
@@ -2784,9 +2727,9 @@ rtl8169_interrupt(int irq, void *dev_instance)
2784 break; 2727 break;
2785#else 2728#else
2786 /* Rx interrupt */ 2729 /* Rx interrupt */
2787 if (status & (RxOK | RxOverflow | RxFIFOOver)) { 2730 if (status & (RxOK | RxOverflow | RxFIFOOver))
2788 rtl8169_rx_interrupt(dev, tp, ioaddr); 2731 rtl8169_rx_interrupt(dev, tp, ioaddr);
2789 } 2732
2790 /* Tx interrupt */ 2733 /* Tx interrupt */
2791 if (status & (TxOK | TxErr)) 2734 if (status & (TxOK | TxErr))
2792 rtl8169_tx_interrupt(dev, tp, ioaddr); 2735 rtl8169_tx_interrupt(dev, tp, ioaddr);
@@ -2918,7 +2861,7 @@ static void rtl_set_rx_mode(struct net_device *dev)
2918 void __iomem *ioaddr = tp->mmio_addr; 2861 void __iomem *ioaddr = tp->mmio_addr;
2919 unsigned long flags; 2862 unsigned long flags;
2920 u32 mc_filter[2]; /* Multicast hash filter */ 2863 u32 mc_filter[2]; /* Multicast hash filter */
2921 int i, rx_mode; 2864 int rx_mode;
2922 u32 tmp = 0; 2865 u32 tmp = 0;
2923 2866
2924 if (dev->flags & IFF_PROMISC) { 2867 if (dev->flags & IFF_PROMISC) {
@@ -2938,6 +2881,8 @@ static void rtl_set_rx_mode(struct net_device *dev)
2938 mc_filter[1] = mc_filter[0] = 0xffffffff; 2881 mc_filter[1] = mc_filter[0] = 0xffffffff;
2939 } else { 2882 } else {
2940 struct dev_mc_list *mclist; 2883 struct dev_mc_list *mclist;
2884 unsigned int i;
2885
2941 rx_mode = AcceptBroadcast | AcceptMyPhys; 2886 rx_mode = AcceptBroadcast | AcceptMyPhys;
2942 mc_filter[1] = mc_filter[0] = 0; 2887 mc_filter[1] = mc_filter[0] = 0;
2943 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; 2888 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
@@ -3053,14 +2998,12 @@ static struct pci_driver rtl8169_pci_driver = {
3053#endif 2998#endif
3054}; 2999};
3055 3000
3056static int __init 3001static int __init rtl8169_init_module(void)
3057rtl8169_init_module(void)
3058{ 3002{
3059 return pci_register_driver(&rtl8169_pci_driver); 3003 return pci_register_driver(&rtl8169_pci_driver);
3060} 3004}
3061 3005
3062static void __exit 3006static void __exit rtl8169_cleanup_module(void)
3063rtl8169_cleanup_module(void)
3064{ 3007{
3065 pci_unregister_driver(&rtl8169_pci_driver); 3008 pci_unregister_driver(&rtl8169_pci_driver);
3066} 3009}