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authorManuel Lauss <manuel.lauss@googlemail.com>2009-10-04 08:55:24 -0400
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 06:52:50 -0500
commit9bdcf336d0c061e77f4c45c7b2bc32e3ed6b57e3 (patch)
tree9cce0d50bb1709654fae719e7175da25279402bc /drivers
parentebc89718a4b3fa0e440151fb4484541700828a5d (diff)
MIPS: Alchemy: devboard register abstraction
All Alchemy development boards have external CPLDs with a few registers in them. They all share an identical register layout with only a few minor differences (except the PB1000) in bit functions and base addresses. This patch - adds a primitive facility to initialize and use these external registers, - replaces all occurrences of bcsr->xxx accesses with calls to the new functions (the pb1200 cascade irq handling code is special). - collects BCSR register information scattered throughout the board headers in a central place. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mtd/nand/au1550nd.c4
-rw-r--r--drivers/net/irda/au1k_ir.c14
-rw-r--r--drivers/pcmcia/au1000_db1x00.c76
3 files changed, 47 insertions, 47 deletions
diff --git a/drivers/mtd/nand/au1550nd.c b/drivers/mtd/nand/au1550nd.c
index 92c334ff4508..43d46e424040 100644
--- a/drivers/mtd/nand/au1550nd.c
+++ b/drivers/mtd/nand/au1550nd.c
@@ -19,6 +19,7 @@
19#include <asm/io.h> 19#include <asm/io.h>
20 20
21#include <asm/mach-au1x00/au1xxx.h> 21#include <asm/mach-au1x00/au1xxx.h>
22#include <asm/mach-db1x00/bcsr.h>
22 23
23/* 24/*
24 * MTD structure for NAND controller 25 * MTD structure for NAND controller
@@ -475,7 +476,8 @@ static int __init au1xxx_nand_init(void)
475 /* set gpio206 high */ 476 /* set gpio206 high */
476 au_writel(au_readl(GPIO2_DIR) & ~(1 << 6), GPIO2_DIR); 477 au_writel(au_readl(GPIO2_DIR) & ~(1 << 6), GPIO2_DIR);
477 478
478 boot_swapboot = (au_readl(MEM_STSTAT) & (0x7 << 1)) | ((bcsr->status >> 6) & 0x1); 479 boot_swapboot = (au_readl(MEM_STSTAT) & (0x7 << 1)) | ((bcsr_read(BCSR_STATUS) >> 6) & 0x1);
480
479 switch (boot_swapboot) { 481 switch (boot_swapboot) {
480 case 0: 482 case 0:
481 case 2: 483 case 2:
diff --git a/drivers/net/irda/au1k_ir.c b/drivers/net/irda/au1k_ir.c
index 9b2eebdbb25b..b5cbd39d0685 100644
--- a/drivers/net/irda/au1k_ir.c
+++ b/drivers/net/irda/au1k_ir.c
@@ -36,6 +36,7 @@
36#include <asm/pb1000.h> 36#include <asm/pb1000.h>
37#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) 37#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
38#include <asm/db1x00.h> 38#include <asm/db1x00.h>
39#include <asm/mach-db1x00/bcsr.h>
39#else 40#else
40#error au1k_ir: unsupported board 41#error au1k_ir: unsupported board
41#endif 42#endif
@@ -66,10 +67,6 @@ static char version[] __devinitdata =
66 67
67#define RUN_AT(x) (jiffies + (x)) 68#define RUN_AT(x) (jiffies + (x))
68 69
69#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
70static BCSR * const bcsr = (BCSR *)0xAE000000;
71#endif
72
73static DEFINE_SPINLOCK(ir_lock); 70static DEFINE_SPINLOCK(ir_lock);
74 71
75/* 72/*
@@ -282,9 +279,8 @@ static int au1k_irda_net_init(struct net_device *dev)
282 279
283#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) 280#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
284 /* power on */ 281 /* power on */
285 bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK; 282 bcsr_mod(BCSR_RESETS, BCSR_RESETS_IRDA_MODE_MASK,
286 bcsr->resets |= BCSR_RESETS_IRDA_MODE_FULL; 283 BCSR_RESETS_IRDA_MODE_FULL);
287 au_sync();
288#endif 284#endif
289 285
290 return 0; 286 return 0;
@@ -720,14 +716,14 @@ au1k_irda_set_speed(struct net_device *dev, int speed)
720 716
721 if (speed == 4000000) { 717 if (speed == 4000000) {
722#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) 718#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
723 bcsr->resets |= BCSR_RESETS_FIR_SEL; 719 bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_FIR_SEL);
724#else /* Pb1000 and Pb1100 */ 720#else /* Pb1000 and Pb1100 */
725 writel(1<<13, CPLD_AUX1); 721 writel(1<<13, CPLD_AUX1);
726#endif 722#endif
727 } 723 }
728 else { 724 else {
729#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) 725#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
730 bcsr->resets &= ~BCSR_RESETS_FIR_SEL; 726 bcsr_mod(BCSR_RESETS, BCSR_RESETS_FIR_SEL, 0);
731#else /* Pb1000 and Pb1100 */ 727#else /* Pb1000 and Pb1100 */
732 writel(readl(CPLD_AUX1) & ~(1<<13), CPLD_AUX1); 728 writel(readl(CPLD_AUX1) & ~(1<<13), CPLD_AUX1);
733#endif 729#endif
diff --git a/drivers/pcmcia/au1000_db1x00.c b/drivers/pcmcia/au1000_db1x00.c
index c78d77fd7e3b..3fdd664e41c6 100644
--- a/drivers/pcmcia/au1000_db1x00.c
+++ b/drivers/pcmcia/au1000_db1x00.c
@@ -47,9 +47,9 @@
47 #include <pb1200.h> 47 #include <pb1200.h>
48#else 48#else
49 #include <asm/mach-db1x00/db1x00.h> 49 #include <asm/mach-db1x00/db1x00.h>
50 static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
51#endif 50#endif
52 51
52#include <asm/mach-db1x00/bcsr.h>
53#include "au1000_generic.h" 53#include "au1000_generic.h"
54 54
55#if 0 55#if 0
@@ -76,8 +76,8 @@ static int db1x00_pcmcia_hw_init(struct au1000_pcmcia_socket *skt)
76 76
77static void db1x00_pcmcia_shutdown(struct au1000_pcmcia_socket *skt) 77static void db1x00_pcmcia_shutdown(struct au1000_pcmcia_socket *skt)
78{ 78{
79 bcsr->pcmcia = 0; /* turn off power */ 79 bcsr_write(BCSR_PCMCIA, 0); /* turn off power */
80 au_sync_delay(2); 80 msleep(2);
81} 81}
82 82
83static void 83static void
@@ -93,19 +93,19 @@ db1x00_pcmcia_socket_state(struct au1000_pcmcia_socket *skt, struct pcmcia_state
93 93
94 switch (skt->nr) { 94 switch (skt->nr) {
95 case 0: 95 case 0:
96 vs = bcsr->status & 0x3; 96 vs = bcsr_read(BCSR_STATUS) & 0x3;
97#if defined(CONFIG_MIPS_DB1200) || defined(CONFIG_MIPS_PB1200) 97#if defined(CONFIG_MIPS_DB1200) || defined(CONFIG_MIPS_PB1200)
98 inserted = BOARD_CARD_INSERTED(0); 98 inserted = BOARD_CARD_INSERTED(0);
99#else 99#else
100 inserted = !(bcsr->status & (1<<4)); 100 inserted = !(bcsr_read(BCSR_STATUS) & (1 << 4));
101#endif 101#endif
102 break; 102 break;
103 case 1: 103 case 1:
104 vs = (bcsr->status & 0xC)>>2; 104 vs = (bcsr_read(BCSR_STATUS) & 0xC) >> 2;
105#if defined(CONFIG_MIPS_DB1200) || defined(CONFIG_MIPS_PB1200) 105#if defined(CONFIG_MIPS_DB1200) || defined(CONFIG_MIPS_PB1200)
106 inserted = BOARD_CARD_INSERTED(1); 106 inserted = BOARD_CARD_INSERTED(1);
107#else 107#else
108 inserted = !(bcsr->status & (1<<5)); 108 inserted = !(bcsr_read(BCSR_STATUS) & (1<<5));
109#endif 109#endif
110 break; 110 break;
111 default:/* should never happen */ 111 default:/* should never happen */
@@ -114,7 +114,7 @@ db1x00_pcmcia_socket_state(struct au1000_pcmcia_socket *skt, struct pcmcia_state
114 114
115 if (inserted) 115 if (inserted)
116 debug("db1x00 socket %d: inserted %d, vs %d pcmcia %x\n", 116 debug("db1x00 socket %d: inserted %d, vs %d pcmcia %x\n",
117 skt->nr, inserted, vs, bcsr->pcmcia); 117 skt->nr, inserted, vs, bcsr_read(BCSR_PCMCIA));
118 118
119 if (inserted) { 119 if (inserted) {
120 switch (vs) { 120 switch (vs) {
@@ -136,19 +136,21 @@ db1x00_pcmcia_socket_state(struct au1000_pcmcia_socket *skt, struct pcmcia_state
136 /* if the card was previously inserted and then ejected, 136 /* if the card was previously inserted and then ejected,
137 * we should turn off power to it 137 * we should turn off power to it
138 */ 138 */
139 if ((skt->nr == 0) && (bcsr->pcmcia & BCSR_PCMCIA_PC0RST)) { 139 if ((skt->nr == 0) &&
140 bcsr->pcmcia &= ~(BCSR_PCMCIA_PC0RST | 140 (bcsr_read(BCSR_PCMCIA) & BCSR_PCMCIA_PC0RST)) {
141 BCSR_PCMCIA_PC0DRVEN | 141 bcsr_mod(BCSR_PCMCIA, BCSR_PCMCIA_PC0RST |
142 BCSR_PCMCIA_PC0VPP | 142 BCSR_PCMCIA_PC0DRVEN |
143 BCSR_PCMCIA_PC0VCC); 143 BCSR_PCMCIA_PC0VPP |
144 au_sync_delay(10); 144 BCSR_PCMCIA_PC0VCC, 0);
145 msleep(10);
145 } 146 }
146 else if ((skt->nr == 1) && bcsr->pcmcia & BCSR_PCMCIA_PC1RST) { 147 else if ((skt->nr == 1) &&
147 bcsr->pcmcia &= ~(BCSR_PCMCIA_PC1RST | 148 (bcsr_read(BCSR_PCMCIA) & BCSR_PCMCIA_PC1RST)) {
148 BCSR_PCMCIA_PC1DRVEN | 149 bcsr_mod(BCSR_PCMCIA, BCSR_PCMCIA_PC1RST |
149 BCSR_PCMCIA_PC1VPP | 150 BCSR_PCMCIA_PC1DRVEN |
150 BCSR_PCMCIA_PC1VCC); 151 BCSR_PCMCIA_PC1VPP |
151 au_sync_delay(10); 152 BCSR_PCMCIA_PC1VCC, 0);
153 msleep(10);
152 } 154 }
153 } 155 }
154 156
@@ -171,7 +173,7 @@ db1x00_pcmcia_configure_socket(struct au1000_pcmcia_socket *skt, struct socket_s
171 * initializing a socket not to wipe out the settings of the 173 * initializing a socket not to wipe out the settings of the
172 * other socket. 174 * other socket.
173 */ 175 */
174 pwr = bcsr->pcmcia; 176 pwr = bcsr_read(BCSR_PCMCIA);
175 pwr &= ~(0xf << sock*8); /* clear voltage settings */ 177 pwr &= ~(0xf << sock*8); /* clear voltage settings */
176 178
177 state->Vpp = 0; 179 state->Vpp = 0;
@@ -228,37 +230,37 @@ db1x00_pcmcia_configure_socket(struct au1000_pcmcia_socket *skt, struct socket_s
228 break; 230 break;
229 } 231 }
230 232
231 bcsr->pcmcia = pwr; 233 bcsr_write(BCSR_PCMCIA, pwr);
232 au_sync_delay(300); 234 msleep(300);
233 235
234 if (sock == 0) { 236 if (sock == 0) {
235 if (!(state->flags & SS_RESET)) { 237 if (!(state->flags & SS_RESET)) {
236 pwr |= BCSR_PCMCIA_PC0DRVEN; 238 pwr |= BCSR_PCMCIA_PC0DRVEN;
237 bcsr->pcmcia = pwr; 239 bcsr_write(BCSR_PCMCIA, pwr);
238 au_sync_delay(300); 240 msleep(300);
239 pwr |= BCSR_PCMCIA_PC0RST; 241 pwr |= BCSR_PCMCIA_PC0RST;
240 bcsr->pcmcia = pwr; 242 bcsr_write(BCSR_PCMCIA, pwr);
241 au_sync_delay(100); 243 msleep(100);
242 } 244 }
243 else { 245 else {
244 pwr &= ~(BCSR_PCMCIA_PC0RST | BCSR_PCMCIA_PC0DRVEN); 246 pwr &= ~(BCSR_PCMCIA_PC0RST | BCSR_PCMCIA_PC0DRVEN);
245 bcsr->pcmcia = pwr; 247 bcsr_write(BCSR_PCMCIA, pwr);
246 au_sync_delay(100); 248 msleep(100);
247 } 249 }
248 } 250 }
249 else { 251 else {
250 if (!(state->flags & SS_RESET)) { 252 if (!(state->flags & SS_RESET)) {
251 pwr |= BCSR_PCMCIA_PC1DRVEN; 253 pwr |= BCSR_PCMCIA_PC1DRVEN;
252 bcsr->pcmcia = pwr; 254 bcsr_write(BCSR_PCMCIA, pwr);
253 au_sync_delay(300); 255 msleep(300);
254 pwr |= BCSR_PCMCIA_PC1RST; 256 pwr |= BCSR_PCMCIA_PC1RST;
255 bcsr->pcmcia = pwr; 257 bcsr_write(BCSR_PCMCIA, pwr);
256 au_sync_delay(100); 258 msleep(100);
257 } 259 }
258 else { 260 else {
259 pwr &= ~(BCSR_PCMCIA_PC1RST | BCSR_PCMCIA_PC1DRVEN); 261 pwr &= ~(BCSR_PCMCIA_PC1RST | BCSR_PCMCIA_PC1DRVEN);
260 bcsr->pcmcia = pwr; 262 bcsr_write(BCSR_PCMCIA, pwr);
261 au_sync_delay(100); 263 msleep(100);
262 } 264 }
263 } 265 }
264 return 0; 266 return 0;
@@ -298,8 +300,8 @@ struct pcmcia_low_level db1x00_pcmcia_ops = {
298int au1x_board_init(struct device *dev) 300int au1x_board_init(struct device *dev)
299{ 301{
300 int ret = -ENODEV; 302 int ret = -ENODEV;
301 bcsr->pcmcia = 0; /* turn off power, if it's not already off */ 303 bcsr_write(BCSR_PCMCIA, 0); /* turn off power, if it's not already off */
302 au_sync_delay(2); 304 msleep(2);
303 ret = au1x00_pcmcia_socket_probe(dev, &db1x00_pcmcia_ops, 0, 2); 305 ret = au1x00_pcmcia_socket_probe(dev, &db1x00_pcmcia_ops, 0, 2);
304 return ret; 306 return ret;
305} 307}