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authorJesse Brandeburg <jesse.brandeburg@intel.com>2009-01-26 15:16:26 -0500
committerDavid S. Miller <davem@davemloft.net>2009-01-26 15:16:26 -0500
commit78272bbab895cc8f63bab5181dee55b72208e3b7 (patch)
tree53aa763c515170daaf60b433e251afa842009719 /drivers
parent71be7a36026b25e17657ff8e4317837176bf8cfd (diff)
e1000e: workaround hw errata
There is a hardware errata in some revisions of the 82574 that needs to be worked around in the driver by setting a register bit at init. If this bit is not set A0 versions of the 82574 can generate tx hangs. Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/e1000e/82571.c6
-rw-r--r--drivers/net/e1000e/hw.h1
2 files changed, 6 insertions, 1 deletions
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c
index cf43ee743b3c..0890162953e9 100644
--- a/drivers/net/e1000e/82571.c
+++ b/drivers/net/e1000e/82571.c
@@ -981,11 +981,15 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw)
981 ew32(PBA_ECC, reg); 981 ew32(PBA_ECC, reg);
982 } 982 }
983 983
984 /* PCI-Ex Control Register */ 984 /* PCI-Ex Control Registers */
985 if (hw->mac.type == e1000_82574) { 985 if (hw->mac.type == e1000_82574) {
986 reg = er32(GCR); 986 reg = er32(GCR);
987 reg |= (1 << 22); 987 reg |= (1 << 22);
988 ew32(GCR, reg); 988 ew32(GCR, reg);
989
990 reg = er32(GCR2);
991 reg |= 1;
992 ew32(GCR2, reg);
989 } 993 }
990 994
991 return; 995 return;
diff --git a/drivers/net/e1000e/hw.h b/drivers/net/e1000e/hw.h
index f25e961c6b3b..2d4ce0492df0 100644
--- a/drivers/net/e1000e/hw.h
+++ b/drivers/net/e1000e/hw.h
@@ -206,6 +206,7 @@ enum e1e_registers {
206 E1000_MANC2H = 0x05860, /* Management Control To Host - RW */ 206 E1000_MANC2H = 0x05860, /* Management Control To Host - RW */
207 E1000_SW_FW_SYNC = 0x05B5C, /* Software-Firmware Synchronization - RW */ 207 E1000_SW_FW_SYNC = 0x05B5C, /* Software-Firmware Synchronization - RW */
208 E1000_GCR = 0x05B00, /* PCI-Ex Control */ 208 E1000_GCR = 0x05B00, /* PCI-Ex Control */
209 E1000_GCR2 = 0x05B64, /* PCI-Ex Control #2 */
209 E1000_FACTPS = 0x05B30, /* Function Active and Power State to MNG */ 210 E1000_FACTPS = 0x05B30, /* Function Active and Power State to MNG */
210 E1000_SWSM = 0x05B50, /* SW Semaphore */ 211 E1000_SWSM = 0x05B50, /* SW Semaphore */
211 E1000_FWSM = 0x05B54, /* FW Semaphore */ 212 E1000_FWSM = 0x05B54, /* FW Semaphore */