diff options
author | Jean Delvare <khali@linux-fr.org> | 2005-10-07 17:56:46 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2005-10-28 17:02:09 -0400 |
commit | 47b8b103f7f50d56568eb8d6cff0e3a2373f0eb3 (patch) | |
tree | 477c11eeef2a45ac5c7dfeb761de50b2d89eeb9d /drivers | |
parent | ada0c2f8fa087dc1dbc34e096c318739b1d6381a (diff) |
[PATCH] i2c: Cleanup i2c-i801 ifdefs
No more need to check for PEC support being available now that both
the i2c-core and the i2c-i801 drivers are part of the Linux kernel
source tree. It's just there.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/i2c/busses/i2c-i801.c | 20 |
1 files changed, 1 insertions, 19 deletions
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index 588583530c9f..413930cafc49 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c | |||
@@ -52,10 +52,6 @@ | |||
52 | #include <linux/i2c.h> | 52 | #include <linux/i2c.h> |
53 | #include <asm/io.h> | 53 | #include <asm/io.h> |
54 | 54 | ||
55 | #ifdef I2C_FUNC_SMBUS_BLOCK_DATA_PEC | ||
56 | #define HAVE_PEC | ||
57 | #endif | ||
58 | |||
59 | /* I801 SMBus address offsets */ | 55 | /* I801 SMBus address offsets */ |
60 | #define SMBHSTSTS (0 + i801_smba) | 56 | #define SMBHSTSTS (0 + i801_smba) |
61 | #define SMBHSTCNT (2 + i801_smba) | 57 | #define SMBHSTCNT (2 + i801_smba) |
@@ -392,7 +388,6 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write, | |||
392 | goto END; | 388 | goto END; |
393 | } | 389 | } |
394 | 390 | ||
395 | #ifdef HAVE_PEC | ||
396 | if(isich4 && command == I2C_SMBUS_BLOCK_DATA_PEC) { | 391 | if(isich4 && command == I2C_SMBUS_BLOCK_DATA_PEC) { |
397 | /* wait for INTR bit as advised by Intel */ | 392 | /* wait for INTR bit as advised by Intel */ |
398 | timeout = 0; | 393 | timeout = 0; |
@@ -407,7 +402,6 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write, | |||
407 | } | 402 | } |
408 | outb_p(temp, SMBHSTSTS); | 403 | outb_p(temp, SMBHSTSTS); |
409 | } | 404 | } |
410 | #endif | ||
411 | result = 0; | 405 | result = 0; |
412 | END: | 406 | END: |
413 | if (command == I2C_SMBUS_I2C_BLOCK_DATA) { | 407 | if (command == I2C_SMBUS_I2C_BLOCK_DATA) { |
@@ -426,10 +420,8 @@ static s32 i801_access(struct i2c_adapter * adap, u16 addr, | |||
426 | int block = 0; | 420 | int block = 0; |
427 | int ret, xact = 0; | 421 | int ret, xact = 0; |
428 | 422 | ||
429 | #ifdef HAVE_PEC | ||
430 | if(isich4) | 423 | if(isich4) |
431 | hwpec = (flags & I2C_CLIENT_PEC) != 0; | 424 | hwpec = (flags & I2C_CLIENT_PEC) != 0; |
432 | #endif | ||
433 | 425 | ||
434 | switch (size) { | 426 | switch (size) { |
435 | case I2C_SMBUS_QUICK: | 427 | case I2C_SMBUS_QUICK: |
@@ -464,11 +456,9 @@ static s32 i801_access(struct i2c_adapter * adap, u16 addr, | |||
464 | break; | 456 | break; |
465 | case I2C_SMBUS_BLOCK_DATA: | 457 | case I2C_SMBUS_BLOCK_DATA: |
466 | case I2C_SMBUS_I2C_BLOCK_DATA: | 458 | case I2C_SMBUS_I2C_BLOCK_DATA: |
467 | #ifdef HAVE_PEC | ||
468 | case I2C_SMBUS_BLOCK_DATA_PEC: | 459 | case I2C_SMBUS_BLOCK_DATA_PEC: |
469 | if(hwpec && size == I2C_SMBUS_BLOCK_DATA) | 460 | if(hwpec && size == I2C_SMBUS_BLOCK_DATA) |
470 | size = I2C_SMBUS_BLOCK_DATA_PEC; | 461 | size = I2C_SMBUS_BLOCK_DATA_PEC; |
471 | #endif | ||
472 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), | 462 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), |
473 | SMBHSTADD); | 463 | SMBHSTADD); |
474 | outb_p(command, SMBHSTCMD); | 464 | outb_p(command, SMBHSTCMD); |
@@ -480,13 +470,11 @@ static s32 i801_access(struct i2c_adapter * adap, u16 addr, | |||
480 | return -1; | 470 | return -1; |
481 | } | 471 | } |
482 | 472 | ||
483 | #ifdef HAVE_PEC | ||
484 | if(isich4 && hwpec) { | 473 | if(isich4 && hwpec) { |
485 | if(size != I2C_SMBUS_QUICK && | 474 | if(size != I2C_SMBUS_QUICK && |
486 | size != I2C_SMBUS_I2C_BLOCK_DATA) | 475 | size != I2C_SMBUS_I2C_BLOCK_DATA) |
487 | outb_p(1, SMBAUXCTL); /* enable HW PEC */ | 476 | outb_p(1, SMBAUXCTL); /* enable HW PEC */ |
488 | } | 477 | } |
489 | #endif | ||
490 | if(block) | 478 | if(block) |
491 | ret = i801_block_transaction(data, read_write, size); | 479 | ret = i801_block_transaction(data, read_write, size); |
492 | else { | 480 | else { |
@@ -494,13 +482,11 @@ static s32 i801_access(struct i2c_adapter * adap, u16 addr, | |||
494 | ret = i801_transaction(); | 482 | ret = i801_transaction(); |
495 | } | 483 | } |
496 | 484 | ||
497 | #ifdef HAVE_PEC | ||
498 | if(isich4 && hwpec) { | 485 | if(isich4 && hwpec) { |
499 | if(size != I2C_SMBUS_QUICK && | 486 | if(size != I2C_SMBUS_QUICK && |
500 | size != I2C_SMBUS_I2C_BLOCK_DATA) | 487 | size != I2C_SMBUS_I2C_BLOCK_DATA) |
501 | outb_p(0, SMBAUXCTL); | 488 | outb_p(0, SMBAUXCTL); |
502 | } | 489 | } |
503 | #endif | ||
504 | 490 | ||
505 | if(block) | 491 | if(block) |
506 | return ret; | 492 | return ret; |
@@ -527,12 +513,8 @@ static u32 i801_func(struct i2c_adapter *adapter) | |||
527 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | | 513 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | |
528 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | | 514 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | |
529 | I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK | 515 | I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
530 | #ifdef HAVE_PEC | ||
531 | | (isich4 ? I2C_FUNC_SMBUS_BLOCK_DATA_PEC | | 516 | | (isich4 ? I2C_FUNC_SMBUS_BLOCK_DATA_PEC | |
532 | I2C_FUNC_SMBUS_HWPEC_CALC | 517 | I2C_FUNC_SMBUS_HWPEC_CALC : 0); |
533 | : 0) | ||
534 | #endif | ||
535 | ; | ||
536 | } | 518 | } |
537 | 519 | ||
538 | static struct i2c_algorithm smbus_algorithm = { | 520 | static struct i2c_algorithm smbus_algorithm = { |