diff options
author | Greg Kroah-Hartman <gregkh@suse.de> | 2008-11-19 18:26:21 -0500 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2009-01-06 16:52:27 -0500 |
commit | 2ce411b57ec45a97bf0a0af4afe65b9ed5ad5159 (patch) | |
tree | 716b33d49d5fbbd67be2438dc0ef5dc8122d496a /drivers | |
parent | 85acac61096f946a78cf0c4b65f7cebe580693b6 (diff) |
Staging: comedi: me_daq: fix checkpatch.pl issues
This fixes a number of checkpatch.pl issues in the me_daq
driver.
Cc: Michael Hillmann <hillmann@syscongroup.de>
Cc: David Schleef <ds@schleef.org>
Cc: Frank Mori Hess <fmhess@users.sourceforge.net>
Cc: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/staging/comedi/drivers/me_daq.c | 609 |
1 files changed, 298 insertions, 311 deletions
diff --git a/drivers/staging/comedi/drivers/me_daq.c b/drivers/staging/comedi/drivers/me_daq.c index e741ec54527d..c784ea999506 100644 --- a/drivers/staging/comedi/drivers/me_daq.c +++ b/drivers/staging/comedi/drivers/me_daq.c | |||
@@ -54,114 +54,111 @@ from http://www.comedi.org | |||
54 | 54 | ||
55 | #include "comedi_pci.h" | 55 | #include "comedi_pci.h" |
56 | 56 | ||
57 | //#include "me2600_fw.h" | 57 | /*#include "me2600_fw.h" */ |
58 | 58 | ||
59 | #define ME_DRIVER_NAME "me_daq" | 59 | #define ME_DRIVER_NAME "me_daq" |
60 | 60 | ||
61 | #define ME2000_DEVICE_ID 0x2000 | 61 | #define ME2000_DEVICE_ID 0x2000 |
62 | #define ME2600_DEVICE_ID 0x2600 | 62 | #define ME2600_DEVICE_ID 0x2600 |
63 | 63 | ||
64 | #define PLX_INTCSR 0x4C // PLX interrupt status register | 64 | #define PLX_INTCSR 0x4C /* PLX interrupt status register */ |
65 | #define XILINX_DOWNLOAD_RESET 0x42 // Xilinx registers | 65 | #define XILINX_DOWNLOAD_RESET 0x42 /* Xilinx registers */ |
66 | 66 | ||
67 | #define ME_CONTROL_1 0x0000 // - | W | 67 | #define ME_CONTROL_1 0x0000 /* - | W */ |
68 | #define INTERRUPT_ENABLE (1<<15) | 68 | #define INTERRUPT_ENABLE (1<<15) |
69 | #define COUNTER_B_IRQ (1<<12) | 69 | #define COUNTER_B_IRQ (1<<12) |
70 | #define COUNTER_A_IRQ (1<<11) | 70 | #define COUNTER_A_IRQ (1<<11) |
71 | #define CHANLIST_READY_IRQ (1<<10) | 71 | #define CHANLIST_READY_IRQ (1<<10) |
72 | #define EXT_IRQ (1<<9) | 72 | #define EXT_IRQ (1<<9) |
73 | #define ADFIFO_HALFFULL_IRQ (1<<8) | 73 | #define ADFIFO_HALFFULL_IRQ (1<<8) |
74 | #define SCAN_COUNT_ENABLE (1<<5) | 74 | #define SCAN_COUNT_ENABLE (1<<5) |
75 | #define SIMULTANEOUS_ENABLE (1<<4) | 75 | #define SIMULTANEOUS_ENABLE (1<<4) |
76 | #define TRIGGER_FALLING_EDGE (1<<3) | 76 | #define TRIGGER_FALLING_EDGE (1<<3) |
77 | #define CONTINUOUS_MODE (1<<2) | 77 | #define CONTINUOUS_MODE (1<<2) |
78 | #define DISABLE_ADC (0<<0) | 78 | #define DISABLE_ADC (0<<0) |
79 | #define SOFTWARE_TRIGGERED_ADC (1<<0) | 79 | #define SOFTWARE_TRIGGERED_ADC (1<<0) |
80 | #define SCAN_TRIGGERED_ADC (2<<0) | 80 | #define SCAN_TRIGGERED_ADC (2<<0) |
81 | #define EXT_TRIGGERED_ADC (3<<0) | 81 | #define EXT_TRIGGERED_ADC (3<<0) |
82 | #define ME_ADC_START 0x0000 // R | - | 82 | #define ME_ADC_START 0x0000 /* R | - */ |
83 | #define ME_CONTROL_2 0x0002 // - | W | 83 | #define ME_CONTROL_2 0x0002 /* - | W */ |
84 | #define ENABLE_ADFIFO (1<<10) | 84 | #define ENABLE_ADFIFO (1<<10) |
85 | #define ENABLE_CHANLIST (1<<9) | 85 | #define ENABLE_CHANLIST (1<<9) |
86 | #define ENABLE_PORT_B (1<<7) | 86 | #define ENABLE_PORT_B (1<<7) |
87 | #define ENABLE_PORT_A (1<<6) | 87 | #define ENABLE_PORT_A (1<<6) |
88 | #define ENABLE_COUNTER_B (1<<4) | 88 | #define ENABLE_COUNTER_B (1<<4) |
89 | #define ENABLE_COUNTER_A (1<<3) | 89 | #define ENABLE_COUNTER_A (1<<3) |
90 | #define ENABLE_DAC (1<<1) | 90 | #define ENABLE_DAC (1<<1) |
91 | #define BUFFERED_DAC (1<<0) | 91 | #define BUFFERED_DAC (1<<0) |
92 | #define ME_DAC_UPDATE 0x0002 // R | - | 92 | #define ME_DAC_UPDATE 0x0002 /* R | - */ |
93 | #define ME_STATUS 0x0004 // R | - | 93 | #define ME_STATUS 0x0004 /* R | - */ |
94 | #define COUNTER_B_IRQ_PENDING (1<<12) | 94 | #define COUNTER_B_IRQ_PENDING (1<<12) |
95 | #define COUNTER_A_IRQ_PENDING (1<<11) | 95 | #define COUNTER_A_IRQ_PENDING (1<<11) |
96 | #define CHANLIST_READY_IRQ_PENDING (1<<10) | 96 | #define CHANLIST_READY_IRQ_PENDING (1<<10) |
97 | #define EXT_IRQ_PENDING (1<<9) | 97 | #define EXT_IRQ_PENDING (1<<9) |
98 | #define ADFIFO_HALFFULL_IRQ_PENDING (1<<8) | 98 | #define ADFIFO_HALFFULL_IRQ_PENDING (1<<8) |
99 | #define ADFIFO_FULL (1<<4) | 99 | #define ADFIFO_FULL (1<<4) |
100 | #define ADFIFO_HALFFULL (1<<3) | 100 | #define ADFIFO_HALFFULL (1<<3) |
101 | #define ADFIFO_EMPTY (1<<2) | 101 | #define ADFIFO_EMPTY (1<<2) |
102 | #define CHANLIST_FULL (1<<1) | 102 | #define CHANLIST_FULL (1<<1) |
103 | #define FST_ACTIVE (1<<0) | 103 | #define FST_ACTIVE (1<<0) |
104 | #define ME_RESET_INTERRUPT 0x0004 // - | W | 104 | #define ME_RESET_INTERRUPT 0x0004 /* - | W */ |
105 | #define ME_DIO_PORT_A 0x0006 // R | W | 105 | #define ME_DIO_PORT_A 0x0006 /* R | W */ |
106 | #define ME_DIO_PORT_B 0x0008 // R | W | 106 | #define ME_DIO_PORT_B 0x0008 /* R | W */ |
107 | #define ME_TIMER_DATA_0 0x000A // - | W | 107 | #define ME_TIMER_DATA_0 0x000A /* - | W */ |
108 | #define ME_TIMER_DATA_1 0x000C // - | W | 108 | #define ME_TIMER_DATA_1 0x000C /* - | W */ |
109 | #define ME_TIMER_DATA_2 0x000E // - | W | 109 | #define ME_TIMER_DATA_2 0x000E /* - | W */ |
110 | #define ME_CHANNEL_LIST 0x0010 // - | W | 110 | #define ME_CHANNEL_LIST 0x0010 /* - | W */ |
111 | #define ADC_UNIPOLAR (1<<6) | 111 | #define ADC_UNIPOLAR (1<<6) |
112 | #define ADC_GAIN_0 (0<<4) | 112 | #define ADC_GAIN_0 (0<<4) |
113 | #define ADC_GAIN_1 (1<<4) | 113 | #define ADC_GAIN_1 (1<<4) |
114 | #define ADC_GAIN_2 (2<<4) | 114 | #define ADC_GAIN_2 (2<<4) |
115 | #define ADC_GAIN_3 (3<<4) | 115 | #define ADC_GAIN_3 (3<<4) |
116 | #define ME_READ_AD_FIFO 0x0010 // R | - | 116 | #define ME_READ_AD_FIFO 0x0010 /* R | - */ |
117 | #define ME_DAC_CONTROL 0x0012 // - | W | 117 | #define ME_DAC_CONTROL 0x0012 /* - | W */ |
118 | #define DAC_UNIPOLAR_D (0<<4) | 118 | #define DAC_UNIPOLAR_D (0<<4) |
119 | #define DAC_BIPOLAR_D (1<<4) | 119 | #define DAC_BIPOLAR_D (1<<4) |
120 | #define DAC_UNIPOLAR_C (0<<5) | 120 | #define DAC_UNIPOLAR_C (0<<5) |
121 | #define DAC_BIPOLAR_C (1<<5) | 121 | #define DAC_BIPOLAR_C (1<<5) |
122 | #define DAC_UNIPOLAR_B (0<<6) | 122 | #define DAC_UNIPOLAR_B (0<<6) |
123 | #define DAC_BIPOLAR_B (1<<6) | 123 | #define DAC_BIPOLAR_B (1<<6) |
124 | #define DAC_UNIPOLAR_A (0<<7) | 124 | #define DAC_UNIPOLAR_A (0<<7) |
125 | #define DAC_BIPOLAR_A (1<<7) | 125 | #define DAC_BIPOLAR_A (1<<7) |
126 | #define DAC_GAIN_0_D (0<<8) | 126 | #define DAC_GAIN_0_D (0<<8) |
127 | #define DAC_GAIN_1_D (1<<8) | 127 | #define DAC_GAIN_1_D (1<<8) |
128 | #define DAC_GAIN_0_C (0<<9) | 128 | #define DAC_GAIN_0_C (0<<9) |
129 | #define DAC_GAIN_1_C (1<<9) | 129 | #define DAC_GAIN_1_C (1<<9) |
130 | #define DAC_GAIN_0_B (0<<10) | 130 | #define DAC_GAIN_0_B (0<<10) |
131 | #define DAC_GAIN_1_B (1<<10) | 131 | #define DAC_GAIN_1_B (1<<10) |
132 | #define DAC_GAIN_0_A (0<<11) | 132 | #define DAC_GAIN_0_A (0<<11) |
133 | #define DAC_GAIN_1_A (1<<11) | 133 | #define DAC_GAIN_1_A (1<<11) |
134 | #define ME_DAC_CONTROL_UPDATE 0x0012 // R | - | 134 | #define ME_DAC_CONTROL_UPDATE 0x0012 /* R | - */ |
135 | #define ME_DAC_DATA_A 0x0014 // - | W | 135 | #define ME_DAC_DATA_A 0x0014 /* - | W */ |
136 | #define ME_DAC_DATA_B 0x0016 // - | W | 136 | #define ME_DAC_DATA_B 0x0016 /* - | W */ |
137 | #define ME_DAC_DATA_C 0x0018 // - | W | 137 | #define ME_DAC_DATA_C 0x0018 /* - | W */ |
138 | #define ME_DAC_DATA_D 0x001A // - | W | 138 | #define ME_DAC_DATA_D 0x001A /* - | W */ |
139 | #define ME_COUNTER_ENDDATA_A 0x001C // - | W | 139 | #define ME_COUNTER_ENDDATA_A 0x001C /* - | W */ |
140 | #define ME_COUNTER_ENDDATA_B 0x001E // - | W | 140 | #define ME_COUNTER_ENDDATA_B 0x001E /* - | W */ |
141 | #define ME_COUNTER_STARTDATA_A 0x0020 // - | W | 141 | #define ME_COUNTER_STARTDATA_A 0x0020 /* - | W */ |
142 | #define ME_COUNTER_VALUE_A 0x0020 // R | - | 142 | #define ME_COUNTER_VALUE_A 0x0020 /* R | - */ |
143 | #define ME_COUNTER_STARTDATA_B 0x0022 // - | W | 143 | #define ME_COUNTER_STARTDATA_B 0x0022 /* - | W */ |
144 | #define ME_COUNTER_VALUE_B 0x0022 // R | - | 144 | #define ME_COUNTER_VALUE_B 0x0022 /* R | - */ |
145 | 145 | ||
146 | // | 146 | /* Function prototypes */ |
147 | // Function prototypes | 147 | static int me_attach(comedi_device *dev, comedi_devconfig *it); |
148 | // | 148 | static int me_detach(comedi_device *dev); |
149 | |||
150 | static int me_attach(comedi_device * dev, comedi_devconfig * it); | ||
151 | static int me_detach(comedi_device * dev); | ||
152 | 149 | ||
153 | static const comedi_lrange me2000_ai_range = { | 150 | static const comedi_lrange me2000_ai_range = { |
154 | 8, | 151 | 8, |
155 | { | 152 | { |
156 | BIP_RANGE(10), | 153 | BIP_RANGE(10), |
157 | BIP_RANGE(5), | 154 | BIP_RANGE(5), |
158 | BIP_RANGE(2.5), | 155 | BIP_RANGE(2.5), |
159 | BIP_RANGE(1.25), | 156 | BIP_RANGE(1.25), |
160 | UNI_RANGE(10), | 157 | UNI_RANGE(10), |
161 | UNI_RANGE(5), | 158 | UNI_RANGE(5), |
162 | UNI_RANGE(2.5), | 159 | UNI_RANGE(2.5), |
163 | UNI_RANGE(1.25) | 160 | UNI_RANGE(1.25) |
164 | } | 161 | } |
165 | }; | 162 | }; |
166 | 163 | ||
167 | static const comedi_lrange me2600_ai_range = { | 164 | static const comedi_lrange me2600_ai_range = { |
@@ -197,106 +194,105 @@ static DEFINE_PCI_DEVICE_TABLE(me_pci_table) = { | |||
197 | 194 | ||
198 | MODULE_DEVICE_TABLE(pci, me_pci_table); | 195 | MODULE_DEVICE_TABLE(pci, me_pci_table); |
199 | 196 | ||
200 | // | 197 | /* Board specification structure */ |
201 | // Board specification structure | ||
202 | // | ||
203 | |||
204 | typedef struct { | 198 | typedef struct { |
205 | const char *name; // driver name | 199 | const char *name; /* driver name */ |
206 | int device_id; | 200 | int device_id; |
207 | int ao_channel_nbr; // DA config | 201 | int ao_channel_nbr; /* DA config */ |
208 | int ao_resolution; | 202 | int ao_resolution; |
209 | int ao_resolution_mask; | 203 | int ao_resolution_mask; |
210 | const comedi_lrange *ao_range_list; | 204 | const comedi_lrange *ao_range_list; |
211 | int ai_channel_nbr; // AD config | 205 | int ai_channel_nbr; /* AD config */ |
212 | int ai_resolution; | 206 | int ai_resolution; |
213 | int ai_resolution_mask; | 207 | int ai_resolution_mask; |
214 | const comedi_lrange *ai_range_list; | 208 | const comedi_lrange *ai_range_list; |
215 | int dio_channel_nbr; // DIO config | 209 | int dio_channel_nbr; /* DIO config */ |
216 | } me_board_struct; | 210 | } me_board_struct; |
217 | 211 | ||
218 | static const me_board_struct me_boards[] = { | 212 | static const me_board_struct me_boards[] = { |
219 | { // -- ME-2600i -- | 213 | { |
220 | name: ME_DRIVER_NAME, | 214 | /* -- ME-2600i -- */ |
221 | device_id:ME2600_DEVICE_ID, | 215 | .name = ME_DRIVER_NAME, |
222 | ao_channel_nbr:4,// Analog Output | 216 | .device_id = ME2600_DEVICE_ID, |
223 | ao_resolution:12, | 217 | /* Analog Output */ |
224 | ao_resolution_mask:0x0fff, | 218 | .ao_channel_nbr = 4, |
225 | ao_range_list:&me2600_ao_range, | 219 | .ao_resolution = 12, |
226 | ai_channel_nbr:16, | 220 | .ao_resolution_mask = 0x0fff, |
227 | // Analog Input | 221 | .ao_range_list = &me2600_ao_range, |
228 | ai_resolution:12, | 222 | .ai_channel_nbr = 16, |
229 | ai_resolution_mask:0x0fff, | 223 | /* Analog Input */ |
230 | ai_range_list:&me2600_ai_range, | 224 | .ai_resolution = 12, |
231 | dio_channel_nbr:32, | 225 | .ai_resolution_mask = 0x0fff, |
226 | .ai_range_list = &me2600_ai_range, | ||
227 | .dio_channel_nbr = 32, | ||
232 | }, | 228 | }, |
233 | { // -- ME-2000i -- | 229 | { |
234 | name: ME_DRIVER_NAME, | 230 | /* -- ME-2000i -- */ |
235 | device_id:ME2000_DEVICE_ID, | 231 | .name = ME_DRIVER_NAME, |
236 | ao_channel_nbr:0,// Analog Output | 232 | .device_id = ME2000_DEVICE_ID, |
237 | ao_resolution:0, | 233 | /* Analog Output */ |
238 | ao_resolution_mask:0, | 234 | .ao_channel_nbr = 0, |
239 | ao_range_list:0, | 235 | .ao_resolution = 0, |
240 | ai_channel_nbr:16, | 236 | .ao_resolution_mask = 0, |
241 | // Analog Input | 237 | .ao_range_list = 0, |
242 | ai_resolution:12, | 238 | .ai_channel_nbr = 16, |
243 | ai_resolution_mask:0x0fff, | 239 | /* Analog Input */ |
244 | ai_range_list:&me2000_ai_range, | 240 | .ai_resolution = 12, |
245 | dio_channel_nbr:32, | 241 | .ai_resolution_mask = 0x0fff, |
242 | .ai_range_list = &me2000_ai_range, | ||
243 | .dio_channel_nbr = 32, | ||
246 | } | 244 | } |
247 | }; | 245 | }; |
248 | 246 | ||
249 | #define me_board_nbr (sizeof(me_boards)/sizeof(me_board_struct)) | 247 | #define me_board_nbr (sizeof(me_boards)/sizeof(me_board_struct)) |
250 | 248 | ||
251 | static comedi_driver me_driver = { | 249 | static comedi_driver me_driver = { |
252 | driver_name:ME_DRIVER_NAME, | 250 | .driver_name = ME_DRIVER_NAME, |
253 | module:THIS_MODULE, | 251 | .module = THIS_MODULE, |
254 | attach:me_attach, | 252 | .attach = me_attach, |
255 | detach:me_detach, | 253 | .detach = me_detach, |
256 | }; | 254 | }; |
257 | |||
258 | COMEDI_PCI_INITCLEANUP(me_driver, me_pci_table); | 255 | COMEDI_PCI_INITCLEANUP(me_driver, me_pci_table); |
259 | 256 | ||
260 | // | 257 | /* Private data structure */ |
261 | // Private data structure | ||
262 | // | ||
263 | |||
264 | typedef struct { | 258 | typedef struct { |
265 | struct pci_dev *pci_device; | 259 | struct pci_dev *pci_device; |
266 | void *plx_regbase; // PLX configuration base address | 260 | void *plx_regbase; /* PLX configuration base address */ |
267 | void *me_regbase; // Base address of the Meilhaus card | 261 | void *me_regbase; /* Base address of the Meilhaus card */ |
268 | unsigned long plx_regbase_size; // Size of PLX configuration space | 262 | unsigned long plx_regbase_size; /* Size of PLX configuration space */ |
269 | unsigned long me_regbase_size; // Size of Meilhaus space | 263 | unsigned long me_regbase_size; /* Size of Meilhaus space */ |
270 | 264 | ||
271 | unsigned short control_1; // Mirror of CONTROL_1 register | 265 | unsigned short control_1; /* Mirror of CONTROL_1 register */ |
272 | unsigned short control_2; // Mirror of CONTROL_2 register | 266 | unsigned short control_2; /* Mirror of CONTROL_2 register */ |
273 | unsigned short dac_control; // Mirror of the DAC_CONTROL register | 267 | unsigned short dac_control; /* Mirror of the DAC_CONTROL register */ |
274 | int ao_readback[4]; // Mirror of analog output data | 268 | int ao_readback[4]; /* Mirror of analog output data */ |
275 | 269 | ||
276 | } me_private_data_struct; | 270 | } me_private_data_struct; |
277 | 271 | ||
278 | #define dev_private ((me_private_data_struct *)dev->private) | 272 | #define dev_private ((me_private_data_struct *)dev->private) |
279 | 273 | ||
280 | // ------------------------------------------------------------------ | 274 | /* |
281 | // | 275 | * ------------------------------------------------------------------ |
282 | // Helpful functions | 276 | * |
283 | // | 277 | * Helpful functions |
284 | // ------------------------------------------------------------------ | 278 | * |
285 | 279 | * ------------------------------------------------------------------ | |
286 | static __inline__ void sleep(unsigned sec) | 280 | */ |
281 | static inline void sleep(unsigned sec) | ||
287 | { | 282 | { |
288 | current->state = TASK_INTERRUPTIBLE; | 283 | current->state = TASK_INTERRUPTIBLE; |
289 | schedule_timeout(sec * HZ); | 284 | schedule_timeout(sec * HZ); |
290 | } | 285 | } |
291 | 286 | ||
292 | // ------------------------------------------------------------------ | 287 | /* |
293 | // | 288 | * ------------------------------------------------------------------ |
294 | // DIGITAL INPUT/OUTPUT SECTION | 289 | * |
295 | // | 290 | * DIGITAL INPUT/OUTPUT SECTION |
296 | // ------------------------------------------------------------------ | 291 | * |
297 | 292 | * ------------------------------------------------------------------ | |
298 | static int me_dio_insn_config(comedi_device * dev, | 293 | */ |
299 | comedi_subdevice * s, comedi_insn * insn, lsampl_t * data) | 294 | static int me_dio_insn_config(comedi_device *dev, comedi_subdevice *s, |
295 | comedi_insn *insn, lsampl_t *data) | ||
300 | { | 296 | { |
301 | int bits; | 297 | int bits; |
302 | int mask = 1 << CR_CHAN(insn->chanspec); | 298 | int mask = 1 << CR_CHAN(insn->chanspec); |
@@ -319,22 +315,20 @@ static int me_dio_insn_config(comedi_device * dev, | |||
319 | dev_private->me_regbase + ME_CONTROL_2); | 315 | dev_private->me_regbase + ME_CONTROL_2); |
320 | } | 316 | } |
321 | 317 | ||
322 | if (data[0]) { /* Config port as output */ | 318 | if (data[0]) { |
319 | /* Config port as output */ | ||
323 | s->io_bits |= bits; | 320 | s->io_bits |= bits; |
324 | } else { /* Config port as input */ | 321 | } else { |
325 | 322 | /* Config port as input */ | |
326 | s->io_bits &= ~bits; | 323 | s->io_bits &= ~bits; |
327 | } | 324 | } |
328 | 325 | ||
329 | return 1; | 326 | return 1; |
330 | } | 327 | } |
331 | 328 | ||
332 | // | 329 | /* Digital instant input/outputs */ |
333 | // Digital instant input/outputs | 330 | static int me_dio_insn_bits(comedi_device *dev, comedi_subdevice *s, |
334 | // | 331 | comedi_insn *insn, lsampl_t *data) |
335 | |||
336 | static int me_dio_insn_bits(comedi_device * dev, | ||
337 | comedi_subdevice * s, comedi_insn * insn, lsampl_t * data) | ||
338 | { | 332 | { |
339 | unsigned int mask = data[0]; | 333 | unsigned int mask = data[0]; |
340 | s->state &= ~mask; | 334 | s->state &= ~mask; |
@@ -360,17 +354,17 @@ static int me_dio_insn_bits(comedi_device * dev, | |||
360 | return 2; | 354 | return 2; |
361 | } | 355 | } |
362 | 356 | ||
363 | // ------------------------------------------------------------------ | 357 | /* |
364 | // | 358 | * ------------------------------------------------------------------ |
365 | // ANALOG INPUT SECTION | 359 | * |
366 | // | 360 | * ANALOG INPUT SECTION |
367 | // ------------------------------------------------------------------ | 361 | * |
368 | 362 | * ------------------------------------------------------------------ | |
369 | // | 363 | */ |
370 | // Analog instant input | 364 | |
371 | // | 365 | /* Analog instant input */ |
372 | static int me_ai_insn_read(comedi_device * dev, | 366 | static int me_ai_insn_read(comedi_device *dev, comedi_subdevice *subdevice, |
373 | comedi_subdevice * subdevice, comedi_insn * insn, lsampl_t * data) | 367 | comedi_insn *insn, lsampl_t *data) |
374 | { | 368 | { |
375 | unsigned short value; | 369 | unsigned short value; |
376 | int chan = CR_CHAN((&insn->chanspec)[0]); | 370 | int chan = CR_CHAN((&insn->chanspec)[0]); |
@@ -394,10 +388,14 @@ static int me_ai_insn_read(comedi_device * dev, | |||
394 | writew(dev_private->control_2, dev_private->me_regbase + ME_CONTROL_2); | 388 | writew(dev_private->control_2, dev_private->me_regbase + ME_CONTROL_2); |
395 | 389 | ||
396 | /* write to channel list fifo */ | 390 | /* write to channel list fifo */ |
397 | value = chan & 0x0f; // b3:b0 are the channel number | 391 | /* b3:b0 are the channel number */ |
398 | value |= (rang & 0x03) << 4; // b5:b4 are the channel gain | 392 | value = chan & 0x0f; |
399 | value |= (rang & 0x04) << 4; // b6 channel polarity | 393 | /* b5:b4 are the channel gain */ |
400 | value |= ((aref & AREF_DIFF) ? 0x80 : 0); // b7 single or differential | 394 | value |= (rang & 0x03) << 4; |
395 | /* b6 channel polarity */ | ||
396 | value |= (rang & 0x04) << 4; | ||
397 | /* b7 single or differential */ | ||
398 | value |= ((aref & AREF_DIFF) ? 0x80 : 0); | ||
401 | writew(value & 0xff, dev_private->me_regbase + ME_CHANNEL_LIST); | 399 | writew(value & 0xff, dev_private->me_regbase + ME_CHANNEL_LIST); |
402 | 400 | ||
403 | /* set ADC mode to software trigger */ | 401 | /* set ADC mode to software trigger */ |
@@ -408,11 +406,9 @@ static int me_ai_insn_read(comedi_device * dev, | |||
408 | readw(dev_private->me_regbase + ME_ADC_START); | 406 | readw(dev_private->me_regbase + ME_ADC_START); |
409 | 407 | ||
410 | /* wait for ADC fifo not empty flag */ | 408 | /* wait for ADC fifo not empty flag */ |
411 | for (i = 100000; i > 0; i--) { | 409 | for (i = 100000; i > 0; i--) |
412 | if (!(readw(dev_private->me_regbase + ME_STATUS) & 0x0004)) { | 410 | if (!(readw(dev_private->me_regbase + ME_STATUS) & 0x0004)) |
413 | break; | 411 | break; |
414 | } | ||
415 | } | ||
416 | 412 | ||
417 | /* get value from ADC fifo */ | 413 | /* get value from ADC fifo */ |
418 | if (i) { | 414 | if (i) { |
@@ -420,7 +416,8 @@ static int me_ai_insn_read(comedi_device * dev, | |||
420 | (readw(dev_private->me_regbase + | 416 | (readw(dev_private->me_regbase + |
421 | ME_READ_AD_FIFO) ^ 0x800) & 0x0FFF; | 417 | ME_READ_AD_FIFO) ^ 0x800) & 0x0FFF; |
422 | } else { | 418 | } else { |
423 | printk("comedi%d: Cannot get single value\n", dev->minor); | 419 | printk(KERN_ERR "comedi%d: Cannot get single value\n", |
420 | dev->minor); | ||
424 | return -EIO; | 421 | return -EIO; |
425 | } | 422 | } |
426 | 423 | ||
@@ -431,16 +428,16 @@ static int me_ai_insn_read(comedi_device * dev, | |||
431 | return 1; | 428 | return 1; |
432 | } | 429 | } |
433 | 430 | ||
434 | // ------------------------------------------------------------------ | 431 | /* |
435 | // | 432 | * ------------------------------------------------------------------ |
436 | // HARDWARE TRIGGERED ANALOG INPUT SECTION | 433 | * |
437 | // | 434 | * HARDWARE TRIGGERED ANALOG INPUT SECTION |
438 | // ------------------------------------------------------------------ | 435 | * |
439 | 436 | * ------------------------------------------------------------------ | |
440 | // | 437 | */ |
441 | // Cancel analog input autoscan | 438 | |
442 | // | 439 | /* Cancel analog input autoscan */ |
443 | static int me_ai_cancel(comedi_device * dev, comedi_subdevice * s) | 440 | static int me_ai_cancel(comedi_device *dev, comedi_subdevice *s) |
444 | { | 441 | { |
445 | /* disable interrupts */ | 442 | /* disable interrupts */ |
446 | 443 | ||
@@ -451,34 +448,30 @@ static int me_ai_cancel(comedi_device * dev, comedi_subdevice * s) | |||
451 | return 0; | 448 | return 0; |
452 | } | 449 | } |
453 | 450 | ||
454 | // | 451 | /* Test analog input command */ |
455 | // Test analog input command | 452 | static int me_ai_do_cmd_test(comedi_device *dev, comedi_subdevice *s, |
456 | // | 453 | comedi_cmd *cmd) |
457 | static int me_ai_do_cmd_test(comedi_device * dev, | ||
458 | comedi_subdevice * s, comedi_cmd * cmd) | ||
459 | { | 454 | { |
460 | return 0; | 455 | return 0; |
461 | } | 456 | } |
462 | 457 | ||
463 | // | 458 | /* Analog input command */ |
464 | // Analog input command | 459 | static int me_ai_do_cmd(comedi_device *dev, comedi_subdevice *subdevice) |
465 | // | ||
466 | static int me_ai_do_cmd(comedi_device * dev, comedi_subdevice * subdevice) | ||
467 | { | 460 | { |
468 | return 0; | 461 | return 0; |
469 | } | 462 | } |
470 | 463 | ||
471 | // ------------------------------------------------------------------ | 464 | /* |
472 | // | 465 | * ------------------------------------------------------------------ |
473 | // ANALOG OUTPUT SECTION | 466 | * |
474 | // | 467 | * ANALOG OUTPUT SECTION |
475 | // ------------------------------------------------------------------ | 468 | * |
476 | 469 | * ------------------------------------------------------------------ | |
477 | // | 470 | */ |
478 | // Analog instant output | 471 | |
479 | // | 472 | /* Analog instant output */ |
480 | static int me_ao_insn_write(comedi_device * dev, | 473 | static int me_ao_insn_write(comedi_device *dev, comedi_subdevice *s, |
481 | comedi_subdevice * s, comedi_insn * insn, lsampl_t * data) | 474 | comedi_insn *insn, lsampl_t *data) |
482 | { | 475 | { |
483 | int chan; | 476 | int chan; |
484 | int rang; | 477 | int rang; |
@@ -497,7 +490,8 @@ static int me_ao_insn_write(comedi_device * dev, | |||
497 | chan = CR_CHAN((&insn->chanspec)[i]); | 490 | chan = CR_CHAN((&insn->chanspec)[i]); |
498 | rang = CR_RANGE((&insn->chanspec)[i]); | 491 | rang = CR_RANGE((&insn->chanspec)[i]); |
499 | 492 | ||
500 | dev_private->dac_control &= ~(0x0880 >> chan); /* clear bits for this channel */ | 493 | /* clear bits for this channel */ |
494 | dev_private->dac_control &= ~(0x0880 >> chan); | ||
501 | if (rang == 0) | 495 | if (rang == 0) |
502 | dev_private->dac_control |= | 496 | dev_private->dac_control |= |
503 | ((DAC_BIPOLAR_A | DAC_GAIN_1_A) >> chan); | 497 | ((DAC_BIPOLAR_A | DAC_GAIN_1_A) >> chan); |
@@ -525,11 +519,9 @@ static int me_ao_insn_write(comedi_device * dev, | |||
525 | return i; | 519 | return i; |
526 | } | 520 | } |
527 | 521 | ||
528 | // | 522 | /* Analog output readback */ |
529 | // Analog output readback | 523 | static int me_ao_insn_read(comedi_device *dev, comedi_subdevice *s, |
530 | // | 524 | comedi_insn *insn, lsampl_t *data) |
531 | static int me_ao_insn_read(comedi_device * dev, | ||
532 | comedi_subdevice * s, comedi_insn * insn, lsampl_t * data) | ||
533 | { | 525 | { |
534 | int i; | 526 | int i; |
535 | 527 | ||
@@ -541,18 +533,18 @@ static int me_ao_insn_read(comedi_device * dev, | |||
541 | return 1; | 533 | return 1; |
542 | } | 534 | } |
543 | 535 | ||
544 | // ------------------------------------------------------------------ | 536 | /* |
545 | // | 537 | * ------------------------------------------------------------------ |
546 | // INITIALISATION SECTION | 538 | * |
547 | // | 539 | * INITIALISATION SECTION |
548 | // ------------------------------------------------------------------ | 540 | * |
549 | 541 | * ------------------------------------------------------------------ | |
550 | // | 542 | */ |
551 | // Xilinx firmware download for card: ME-2600i | 543 | |
552 | // | 544 | /* Xilinx firmware download for card: ME-2600i */ |
553 | 545 | static int me2600_xilinx_download(comedi_device *dev, | |
554 | static int me2600_xilinx_download(comedi_device * dev, unsigned char | 546 | unsigned char *me2600_firmware, |
555 | *me2600_firmware, unsigned int length) | 547 | unsigned int length) |
556 | { | 548 | { |
557 | unsigned int value; | 549 | unsigned int value; |
558 | unsigned int file_length; | 550 | unsigned int file_length; |
@@ -581,32 +573,30 @@ static int me2600_xilinx_download(comedi_device * dev, unsigned char | |||
581 | */ | 573 | */ |
582 | if (length < 16) | 574 | if (length < 16) |
583 | return -EINVAL; | 575 | return -EINVAL; |
584 | file_length = | 576 | file_length = (((unsigned int)me2600_firmware[0] & 0xff) << 24) + |
585 | (((unsigned int)me2600_firmware[0] & 0xff) << 24) + | 577 | (((unsigned int)me2600_firmware[1] & 0xff) << 16) + |
586 | (((unsigned int)me2600_firmware[1] & 0xff) << 16) + | 578 | (((unsigned int)me2600_firmware[2] & 0xff) << 8) + |
587 | (((unsigned int)me2600_firmware[2] & 0xff) << 8) + | 579 | ((unsigned int)me2600_firmware[3] & 0xff); |
588 | ((unsigned int)me2600_firmware[3] & 0xff); | ||
589 | 580 | ||
590 | /* | 581 | /* |
591 | * Loop for writing firmware byte by byte to xilinx | 582 | * Loop for writing firmware byte by byte to xilinx |
592 | * Firmware data start at offfset 16 | 583 | * Firmware data start at offfset 16 |
593 | */ | 584 | */ |
594 | for (i = 0; i < file_length; i++) { | 585 | for (i = 0; i < file_length; i++) |
595 | writeb((me2600_firmware[16 + i] & 0xff), | 586 | writeb((me2600_firmware[16 + i] & 0xff), |
596 | dev_private->me_regbase + 0x0); | 587 | dev_private->me_regbase + 0x0); |
597 | } | ||
598 | 588 | ||
599 | /* Write 5 dummy values to xilinx */ | 589 | /* Write 5 dummy values to xilinx */ |
600 | for (i = 0; i < 5; i++) { | 590 | for (i = 0; i < 5; i++) |
601 | writeb(0x00, dev_private->me_regbase + 0x0); | 591 | writeb(0x00, dev_private->me_regbase + 0x0); |
602 | } | ||
603 | 592 | ||
604 | /* Test if there was an error during download -> INTB was thrown */ | 593 | /* Test if there was an error during download -> INTB was thrown */ |
605 | value = readl(dev_private->plx_regbase + PLX_INTCSR); | 594 | value = readl(dev_private->plx_regbase + PLX_INTCSR); |
606 | if (value & 0x20) { | 595 | if (value & 0x20) { |
607 | /* Disable interrupt */ | 596 | /* Disable interrupt */ |
608 | writel(0x00, dev_private->plx_regbase + PLX_INTCSR); | 597 | writel(0x00, dev_private->plx_regbase + PLX_INTCSR); |
609 | printk("comedi%d: Xilinx download failed\n", dev->minor); | 598 | printk(KERN_ERR "comedi%d: Xilinx download failed\n", |
599 | dev->minor); | ||
610 | return -EIO; | 600 | return -EIO; |
611 | } | 601 | } |
612 | 602 | ||
@@ -619,11 +609,8 @@ static int me2600_xilinx_download(comedi_device * dev, unsigned char | |||
619 | return 0; | 609 | return 0; |
620 | } | 610 | } |
621 | 611 | ||
622 | // | 612 | /* Reset device */ |
623 | // Reset device | 613 | static int me_reset(comedi_device *dev) |
624 | // | ||
625 | |||
626 | static int me_reset(comedi_device * dev) | ||
627 | { | 614 | { |
628 | /* Reset board */ | 615 | /* Reset board */ |
629 | writew(0x00, dev_private->me_regbase + ME_CONTROL_1); | 616 | writew(0x00, dev_private->me_regbase + ME_CONTROL_1); |
@@ -639,14 +626,13 @@ static int me_reset(comedi_device * dev) | |||
639 | return 0; | 626 | return 0; |
640 | } | 627 | } |
641 | 628 | ||
642 | // | 629 | /* |
643 | // Attach | 630 | * Attach |
644 | // | 631 | * |
645 | // - Register PCI device | 632 | * - Register PCI device |
646 | // - Declare device driver capability | 633 | * - Declare device driver capability |
647 | // | 634 | */ |
648 | 635 | static int me_attach(comedi_device *dev, comedi_devconfig *it) | |
649 | static int me_attach(comedi_device * dev, comedi_devconfig * it) | ||
650 | { | 636 | { |
651 | struct pci_dev *pci_device; | 637 | struct pci_dev *pci_device; |
652 | comedi_subdevice *subdevice; | 638 | comedi_subdevice *subdevice; |
@@ -660,13 +646,11 @@ static int me_attach(comedi_device * dev, comedi_devconfig * it) | |||
660 | resource_size_t regbase_tmp; | 646 | resource_size_t regbase_tmp; |
661 | int result, error, i; | 647 | int result, error, i; |
662 | 648 | ||
663 | // Allocate private memory | 649 | /* Allocate private memory */ |
664 | if (alloc_private(dev, sizeof(me_private_data_struct)) < 0) { | 650 | if (alloc_private(dev, sizeof(me_private_data_struct)) < 0) |
665 | return -ENOMEM; | 651 | return -ENOMEM; |
666 | } | 652 | |
667 | // | 653 | /* Probe the device to determine what device in the series it is. */ |
668 | // Probe the device to determine what device in the series it is. | ||
669 | // | ||
670 | for (pci_device = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL); | 654 | for (pci_device = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, NULL); |
671 | pci_device != NULL; | 655 | pci_device != NULL; |
672 | pci_device = | 656 | pci_device = |
@@ -675,10 +659,14 @@ static int me_attach(comedi_device * dev, comedi_devconfig * it) | |||
675 | for (i = 0; i < me_board_nbr; i++) { | 659 | for (i = 0; i < me_board_nbr; i++) { |
676 | if (me_boards[i].device_id == | 660 | if (me_boards[i].device_id == |
677 | pci_device->device) { | 661 | pci_device->device) { |
678 | // was a particular bus/slot requested? | 662 | /* |
663 | * was a particular bus/slot requested? | ||
664 | */ | ||
679 | if ((it->options[0] != 0) | 665 | if ((it->options[0] != 0) |
680 | || (it->options[1] != 0)) { | 666 | || (it->options[1] != 0)) { |
681 | // are we on the wrong bus/slot? | 667 | /* |
668 | * are we on the wrong bus/slot? | ||
669 | */ | ||
682 | if (pci_device->bus->number != | 670 | if (pci_device->bus->number != |
683 | it->options[0] | 671 | it->options[0] |
684 | || PCI_SLOT(pci_device-> | 672 | || PCI_SLOT(pci_device-> |
@@ -698,27 +686,27 @@ static int me_attach(comedi_device * dev, comedi_devconfig * it) | |||
698 | } | 686 | } |
699 | } | 687 | } |
700 | 688 | ||
701 | printk("comedi%d: no supported board found! (req. bus/slot : %d/%d)\n", | 689 | printk(KERN_ERR |
702 | dev->minor, it->options[0], it->options[1]); | 690 | "comedi%d: no supported board found! (req. bus/slot : %d/%d)\n", |
691 | dev->minor, it->options[0], it->options[1]); | ||
703 | return -EIO; | 692 | return -EIO; |
704 | 693 | ||
705 | found: | 694 | found: |
706 | 695 | printk(KERN_INFO "comedi%d: found %s at PCI bus %d, slot %d\n", | |
707 | printk("comedi%d: found %s at PCI bus %d, slot %d\n", | ||
708 | dev->minor, me_boards[i].name, | 696 | dev->minor, me_boards[i].name, |
709 | pci_device->bus->number, PCI_SLOT(pci_device->devfn)); | 697 | pci_device->bus->number, PCI_SLOT(pci_device->devfn)); |
710 | 698 | ||
711 | // Enable PCI device and request PCI regions | 699 | /* Enable PCI device and request PCI regions */ |
712 | if (comedi_pci_enable(pci_device, ME_DRIVER_NAME) < 0) { | 700 | if (comedi_pci_enable(pci_device, ME_DRIVER_NAME) < 0) { |
713 | printk("comedi%d: Failed to enable PCI device and request regions\n", dev->minor); | 701 | printk(KERN_ERR "comedi%d: Failed to enable PCI device and " |
702 | "request regions\n", dev->minor); | ||
714 | return -EIO; | 703 | return -EIO; |
715 | } | 704 | } |
716 | // Set data in device structure | ||
717 | 705 | ||
706 | /* Set data in device structure */ | ||
718 | dev->board_name = board->name; | 707 | dev->board_name = board->name; |
719 | 708 | ||
720 | // Read PLX register base address [PCI_BASE_ADDRESS #0]. | 709 | /* Read PLX register base address [PCI_BASE_ADDRESS #0]. */ |
721 | |||
722 | plx_regbase_tmp = pci_resource_start(pci_device, 0); | 710 | plx_regbase_tmp = pci_resource_start(pci_device, 0); |
723 | plx_regbase_size_tmp = pci_resource_len(pci_device, 0); | 711 | plx_regbase_size_tmp = pci_resource_len(pci_device, 0); |
724 | dev_private->plx_regbase = | 712 | dev_private->plx_regbase = |
@@ -728,18 +716,18 @@ static int me_attach(comedi_device * dev, comedi_devconfig * it) | |||
728 | printk("comedi%d: Failed to remap I/O memory\n", dev->minor); | 716 | printk("comedi%d: Failed to remap I/O memory\n", dev->minor); |
729 | return -ENOMEM; | 717 | return -ENOMEM; |
730 | } | 718 | } |
731 | // Read Swap base address [PCI_BASE_ADDRESS #5]. | 719 | |
720 | /* Read Swap base address [PCI_BASE_ADDRESS #5]. */ | ||
732 | 721 | ||
733 | swap_regbase_tmp = pci_resource_start(pci_device, 5); | 722 | swap_regbase_tmp = pci_resource_start(pci_device, 5); |
734 | swap_regbase_size_tmp = pci_resource_len(pci_device, 5); | 723 | swap_regbase_size_tmp = pci_resource_len(pci_device, 5); |
735 | 724 | ||
736 | if (!swap_regbase_tmp) { | 725 | if (!swap_regbase_tmp) |
737 | printk("comedi%d: Swap not present\n", dev->minor); | 726 | printk(KERN_ERR "comedi%d: Swap not present\n", dev->minor); |
738 | } | ||
739 | 727 | ||
740 | /*----------------------------------------------------- Workaround start ---*/ | 728 | /*---------------------------------------------- Workaround start ---*/ |
741 | if (plx_regbase_tmp & 0x0080) { | 729 | if (plx_regbase_tmp & 0x0080) { |
742 | printk("comedi%d: PLX-Bug detected\n", dev->minor); | 730 | printk(KERN_ERR "comedi%d: PLX-Bug detected\n", dev->minor); |
743 | 731 | ||
744 | if (swap_regbase_tmp) { | 732 | if (swap_regbase_tmp) { |
745 | regbase_tmp = plx_regbase_tmp; | 733 | regbase_tmp = plx_regbase_tmp; |
@@ -763,19 +751,20 @@ static int me_attach(comedi_device * dev, comedi_devconfig * it) | |||
763 | return -EIO; | 751 | return -EIO; |
764 | } | 752 | } |
765 | } | 753 | } |
766 | /*----------------------------------------------------- Workaround end -----*/ | 754 | /*--------------------------------------------- Workaround end -----*/ |
767 | 755 | ||
768 | // Read Meilhaus register base address [PCI_BASE_ADDRESS #2]. | 756 | /* Read Meilhaus register base address [PCI_BASE_ADDRESS #2]. */ |
769 | 757 | ||
770 | me_regbase_tmp = pci_resource_start(pci_device, 2); | 758 | me_regbase_tmp = pci_resource_start(pci_device, 2); |
771 | me_regbase_size_tmp = pci_resource_len(pci_device, 2); | 759 | me_regbase_size_tmp = pci_resource_len(pci_device, 2); |
772 | dev_private->me_regbase_size = me_regbase_size_tmp; | 760 | dev_private->me_regbase_size = me_regbase_size_tmp; |
773 | dev_private->me_regbase = ioremap(me_regbase_tmp, me_regbase_size_tmp); | 761 | dev_private->me_regbase = ioremap(me_regbase_tmp, me_regbase_size_tmp); |
774 | if (!dev_private->me_regbase) { | 762 | if (!dev_private->me_regbase) { |
775 | printk("comedi%d: Failed to remap I/O memory\n", dev->minor); | 763 | printk(KERN_ERR "comedi%d: Failed to remap I/O memory\n", |
764 | dev->minor); | ||
776 | return -ENOMEM; | 765 | return -ENOMEM; |
777 | } | 766 | } |
778 | // Download firmware and reset card | 767 | /* Download firmware and reset card */ |
779 | if (board->device_id == ME2600_DEVICE_ID) { | 768 | if (board->device_id == ME2600_DEVICE_ID) { |
780 | unsigned char *aux_data; | 769 | unsigned char *aux_data; |
781 | int aux_len; | 770 | int aux_len; |
@@ -784,8 +773,9 @@ static int me_attach(comedi_device * dev, comedi_devconfig * it) | |||
784 | aux_len = it->options[COMEDI_DEVCONF_AUX_DATA_LENGTH]; | 773 | aux_len = it->options[COMEDI_DEVCONF_AUX_DATA_LENGTH]; |
785 | 774 | ||
786 | if (!aux_data || aux_len < 1) { | 775 | if (!aux_data || aux_len < 1) { |
787 | comedi_error(dev, | 776 | comedi_error(dev, "You must provide me2600 firmware " |
788 | "You must provide me2600 firmware using the --init-data option of comedi_config"); | 777 | "using the --init-data option of " |
778 | "comedi_config"); | ||
789 | return -EINVAL; | 779 | return -EINVAL; |
790 | } | 780 | } |
791 | me2600_xilinx_download(dev, aux_data, aux_len); | 781 | me2600_xilinx_download(dev, aux_data, aux_len); |
@@ -793,9 +783,9 @@ static int me_attach(comedi_device * dev, comedi_devconfig * it) | |||
793 | 783 | ||
794 | me_reset(dev); | 784 | me_reset(dev); |
795 | 785 | ||
796 | // device driver capabilities | 786 | /* device driver capabilities */ |
797 | 787 | error = alloc_subdevices(dev, 3); | |
798 | if ((error = alloc_subdevices(dev, 3)) < 0) | 788 | if (error < 0) |
799 | return error; | 789 | return error; |
800 | 790 | ||
801 | subdevice = dev->subdevices + 0; | 791 | subdevice = dev->subdevices + 0; |
@@ -831,15 +821,12 @@ static int me_attach(comedi_device * dev, comedi_devconfig * it) | |||
831 | subdevice->insn_config = me_dio_insn_config; | 821 | subdevice->insn_config = me_dio_insn_config; |
832 | subdevice->io_bits = 0; | 822 | subdevice->io_bits = 0; |
833 | 823 | ||
834 | printk("comedi%d: " ME_DRIVER_NAME " attached.\n", dev->minor); | 824 | printk(KERN_INFO "comedi%d: "ME_DRIVER_NAME" attached.\n", dev->minor); |
835 | return 0; | 825 | return 0; |
836 | } | 826 | } |
837 | 827 | ||
838 | // | 828 | /* Detach */ |
839 | // Detach | 829 | static int me_detach(comedi_device *dev) |
840 | // | ||
841 | |||
842 | static int me_detach(comedi_device * dev) | ||
843 | { | 830 | { |
844 | if (dev_private) { | 831 | if (dev_private) { |
845 | if (dev_private->me_regbase) { | 832 | if (dev_private->me_regbase) { |
@@ -849,9 +836,9 @@ static int me_detach(comedi_device * dev) | |||
849 | if (dev_private->plx_regbase) | 836 | if (dev_private->plx_regbase) |
850 | iounmap(dev_private->plx_regbase); | 837 | iounmap(dev_private->plx_regbase); |
851 | if (dev_private->pci_device) { | 838 | if (dev_private->pci_device) { |
852 | if (dev_private->plx_regbase_size) { | 839 | if (dev_private->plx_regbase_size) |
853 | comedi_pci_disable(dev_private->pci_device); | 840 | comedi_pci_disable(dev_private->pci_device); |
854 | } | 841 | |
855 | pci_dev_put(dev_private->pci_device); | 842 | pci_dev_put(dev_private->pci_device); |
856 | } | 843 | } |
857 | } | 844 | } |