diff options
author | Brian Niebuhr <bniebuhr@efjohnson.com> | 2010-09-03 02:45:28 -0400 |
---|---|---|
committer | Sekhar Nori <nsekhar@ti.com> | 2010-11-18 08:08:32 -0500 |
commit | be88471b96cf3a0d7aea72d5ca9c6a95fb54bade (patch) | |
tree | 3de3f33f922459616bba2e91b06a82b249fb48d8 /drivers | |
parent | f34bd4cc68fb4548536cac56798d3fad41806724 (diff) |
spi: davinci: remove unnecessary function davinci_spi_bufs_prep()
The function davinci_spi_bufs_prep() is doing stuff that
davinci_spi_setup() is doing. Eliminate it and move the work
to davinci_spi_setup()
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/spi/davinci_spi.c | 64 |
1 files changed, 21 insertions, 43 deletions
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 6f279c5d8f94..05b6145da3ef 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c | |||
@@ -482,13 +482,33 @@ static int davinci_spi_setup(struct spi_device *spi) | |||
482 | int retval; | 482 | int retval; |
483 | struct davinci_spi *davinci_spi; | 483 | struct davinci_spi *davinci_spi; |
484 | struct davinci_spi_dma *davinci_spi_dma; | 484 | struct davinci_spi_dma *davinci_spi_dma; |
485 | struct davinci_spi_platform_data *pdata; | ||
485 | 486 | ||
486 | davinci_spi = spi_master_get_devdata(spi->master); | 487 | davinci_spi = spi_master_get_devdata(spi->master); |
488 | pdata = davinci_spi->pdata; | ||
487 | 489 | ||
488 | /* if bits per word length is zero then set it default 8 */ | 490 | /* if bits per word length is zero then set it default 8 */ |
489 | if (!spi->bits_per_word) | 491 | if (!spi->bits_per_word) |
490 | spi->bits_per_word = 8; | 492 | spi->bits_per_word = 8; |
491 | 493 | ||
494 | if (!(spi->mode & SPI_NO_CS)) { | ||
495 | if ((pdata->chip_sel == NULL) || | ||
496 | (pdata->chip_sel[spi->chip_select] == SPI_INTERN_CS)) | ||
497 | set_io_bits(davinci_spi->base + SPIPC0, | ||
498 | 1 << spi->chip_select); | ||
499 | |||
500 | } | ||
501 | |||
502 | if (spi->mode & SPI_READY) | ||
503 | set_io_bits(davinci_spi->base + SPIPC0, SPIPC0_SPIENA_MASK); | ||
504 | |||
505 | if (spi->mode & SPI_LOOP) | ||
506 | set_io_bits(davinci_spi->base + SPIGCR1, | ||
507 | SPIGCR1_LOOPBACK_MASK); | ||
508 | else | ||
509 | clear_io_bits(davinci_spi->base + SPIGCR1, | ||
510 | SPIGCR1_LOOPBACK_MASK); | ||
511 | |||
492 | if (use_dma && davinci_spi->dma_channels) { | 512 | if (use_dma && davinci_spi->dma_channels) { |
493 | davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select]; | 513 | davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select]; |
494 | 514 | ||
@@ -523,40 +543,6 @@ static void davinci_spi_cleanup(struct spi_device *spi) | |||
523 | } | 543 | } |
524 | } | 544 | } |
525 | 545 | ||
526 | static int davinci_spi_bufs_prep(struct spi_device *spi, | ||
527 | struct davinci_spi *davinci_spi) | ||
528 | { | ||
529 | struct davinci_spi_platform_data *pdata; | ||
530 | int op_mode = 0; | ||
531 | |||
532 | /* | ||
533 | * REVISIT unless devices disagree about SPI_LOOP or | ||
534 | * SPI_READY (SPI_NO_CS only allows one device!), this | ||
535 | * should not need to be done before each message... | ||
536 | * optimize for both flags staying cleared. | ||
537 | */ | ||
538 | |||
539 | if (!(spi->mode & SPI_NO_CS)) { | ||
540 | pdata = davinci_spi->pdata; | ||
541 | if (!pdata->chip_sel || | ||
542 | pdata->chip_sel[spi->chip_select] == SPI_INTERN_CS) | ||
543 | op_mode |= 1 << spi->chip_select; | ||
544 | } | ||
545 | if (spi->mode & SPI_READY) | ||
546 | op_mode |= SPIPC0_SPIENA_MASK; | ||
547 | |||
548 | iowrite32(op_mode, davinci_spi->base + SPIPC0); | ||
549 | |||
550 | if (spi->mode & SPI_LOOP) | ||
551 | set_io_bits(davinci_spi->base + SPIGCR1, | ||
552 | SPIGCR1_LOOPBACK_MASK); | ||
553 | else | ||
554 | clear_io_bits(davinci_spi->base + SPIGCR1, | ||
555 | SPIGCR1_LOOPBACK_MASK); | ||
556 | |||
557 | return 0; | ||
558 | } | ||
559 | |||
560 | static int davinci_spi_check_error(struct davinci_spi *davinci_spi, | 546 | static int davinci_spi_check_error(struct davinci_spi *davinci_spi, |
561 | int int_status) | 547 | int int_status) |
562 | { | 548 | { |
@@ -664,10 +650,6 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) | |||
664 | davinci_spi->bytes_per_word[spi->chip_select]; | 650 | davinci_spi->bytes_per_word[spi->chip_select]; |
665 | davinci_spi->rcount = davinci_spi->wcount; | 651 | davinci_spi->rcount = davinci_spi->wcount; |
666 | 652 | ||
667 | ret = davinci_spi_bufs_prep(spi, davinci_spi); | ||
668 | if (ret) | ||
669 | return ret; | ||
670 | |||
671 | data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); | 653 | data1_reg_val = ioread32(davinci_spi->base + SPIDAT1); |
672 | 654 | ||
673 | /* Enable SPI */ | 655 | /* Enable SPI */ |
@@ -769,10 +751,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) | |||
769 | init_completion(&davinci_spi_dma->dma_rx_completion); | 751 | init_completion(&davinci_spi_dma->dma_rx_completion); |
770 | init_completion(&davinci_spi_dma->dma_tx_completion); | 752 | init_completion(&davinci_spi_dma->dma_tx_completion); |
771 | 753 | ||
772 | ret = davinci_spi_bufs_prep(spi, davinci_spi); | ||
773 | if (ret) | ||
774 | return ret; | ||
775 | |||
776 | count = t->len / data_type; /* the number of elements */ | 754 | count = t->len / data_type; /* the number of elements */ |
777 | 755 | ||
778 | /* disable all interrupts for dma transfers */ | 756 | /* disable all interrupts for dma transfers */ |
@@ -1026,7 +1004,7 @@ static int davinci_spi_probe(struct platform_device *pdev) | |||
1026 | udelay(100); | 1004 | udelay(100); |
1027 | iowrite32(1, davinci_spi->base + SPIGCR0); | 1005 | iowrite32(1, davinci_spi->base + SPIGCR0); |
1028 | 1006 | ||
1029 | /* Set up SPIPC0. CS and ENA init is done in davinci_spi_bufs_prep */ | 1007 | /* Set up SPIPC0. CS and ENA init is done in davinci_spi_setup */ |
1030 | spipc0 = SPIPC0_DIFUN_MASK | SPIPC0_DOFUN_MASK | SPIPC0_CLKFUN_MASK; | 1008 | spipc0 = SPIPC0_DIFUN_MASK | SPIPC0_DOFUN_MASK | SPIPC0_CLKFUN_MASK; |
1031 | iowrite32(spipc0, davinci_spi->base + SPIPC0); | 1009 | iowrite32(spipc0, davinci_spi->base + SPIPC0); |
1032 | 1010 | ||