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authorMasakazu Mokuno <mokuno@sm.sony.co.jp>2007-07-20 04:39:25 -0400
committerJeff Garzik <jeff@garzik.org>2007-07-24 16:28:41 -0400
commitfe6d3a4049ec9d859d75ddfcc6865a0f58178924 (patch)
tree37d9c39f6ae2408305d9c216a26b8ed237bd2a58 /drivers
parenta3093d9b07101f2461f88dfd0a20aaaa8853e976 (diff)
ps3: reduce allocation size of rx skb buffers
Reduced allocation size for rx skb buffers, from 2308 bytes to 1356 per buffer. Signed-off-by: Masakazu Mokuno <mokuno@sm.sony.co.jp> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/ps3_gelic_net.c45
-rw-r--r--drivers/net/ps3_gelic_net.h12
2 files changed, 44 insertions, 13 deletions
diff --git a/drivers/net/ps3_gelic_net.c b/drivers/net/ps3_gelic_net.c
index d596df987585..13d1c0a2a25f 100644
--- a/drivers/net/ps3_gelic_net.c
+++ b/drivers/net/ps3_gelic_net.c
@@ -917,31 +917,60 @@ static int gelic_net_decode_one_descr(struct gelic_net_card *card)
917 goto refill; 917 goto refill;
918 } 918 }
919 919
920 if ((status != GELIC_NET_DESCR_COMPLETE) && 920 if (status == GELIC_NET_DESCR_BUFFER_FULL) {
921 (status != GELIC_NET_DESCR_FRAME_END)) { 921 /*
922 * Buffer full would occur if and only if
923 * the frame length was longer than the size of this
924 * descriptor's buffer. If the frame length was equal
925 * to or shorter than buffer'size, FRAME_END condition
926 * would occur.
927 * Anyway this frame was longer than the MTU,
928 * just drop it.
929 */
930 dev_info(ctodev(card), "overlength frame\n");
931 goto refill;
932 }
933 /*
934 * descriptoers any other than FRAME_END here should
935 * be treated as error.
936 */
937 if (status != GELIC_NET_DESCR_FRAME_END) {
922 dev_dbg(ctodev(card), "RX descriptor with state %x\n", 938 dev_dbg(ctodev(card), "RX descriptor with state %x\n",
923 status); 939 status);
924 goto refill; 940 goto refill;
925 } 941 }
926 942
927 /* ok, we've got a packet in descr */ 943 /* ok, we've got a packet in descr */
928 gelic_net_pass_skb_up(descr, card); /* 1: skb_up sccess */ 944 gelic_net_pass_skb_up(descr, card);
929
930refill: 945refill:
931 descr->next_descr_addr = 0; /* unlink the descr */ 946 /*
947 * So that always DMAC can see the end
948 * of the descriptor chain to avoid
949 * from unwanted DMAC overrun.
950 */
951 descr->next_descr_addr = 0;
932 952
933 /* change the descriptor state: */ 953 /* change the descriptor state: */
934 gelic_net_set_descr_status(descr, GELIC_NET_DESCR_NOT_IN_USE); 954 gelic_net_set_descr_status(descr, GELIC_NET_DESCR_NOT_IN_USE);
935 955
936 /* refill one desc 956 /*
937 * FIXME: this can fail, but for now, just leave this 957 * this call can fail, but for now, just leave this
938 * descriptor without skb 958 * decriptor without skb
939 */ 959 */
940 gelic_net_prepare_rx_descr(card, descr); 960 gelic_net_prepare_rx_descr(card, descr);
961
941 chain->head = descr; 962 chain->head = descr;
942 chain->tail = descr->next; 963 chain->tail = descr->next;
964
965 /*
966 * Set this descriptor the end of the chain.
967 */
943 descr->prev->next_descr_addr = descr->bus_addr; 968 descr->prev->next_descr_addr = descr->bus_addr;
944 969
970 /*
971 * If dmac chain was met, DMAC stopped.
972 * thus re-enable it
973 */
945 if (dmac_chain_ended) { 974 if (dmac_chain_ended) {
946 card->rx_dma_restart_required = 1; 975 card->rx_dma_restart_required = 1;
947 dev_dbg(ctodev(card), "reenable rx dma scheduled\n"); 976 dev_dbg(ctodev(card), "reenable rx dma scheduled\n");
diff --git a/drivers/net/ps3_gelic_net.h b/drivers/net/ps3_gelic_net.h
index 01d729bc7332..a9c4c4fc2547 100644
--- a/drivers/net/ps3_gelic_net.h
+++ b/drivers/net/ps3_gelic_net.h
@@ -32,8 +32,8 @@
32#define GELIC_NET_RX_DESCRIPTORS 128 /* num of descriptors */ 32#define GELIC_NET_RX_DESCRIPTORS 128 /* num of descriptors */
33#define GELIC_NET_TX_DESCRIPTORS 128 /* num of descriptors */ 33#define GELIC_NET_TX_DESCRIPTORS 128 /* num of descriptors */
34 34
35#define GELIC_NET_MAX_MTU 2308 35#define GELIC_NET_MAX_MTU VLAN_ETH_FRAME_LEN
36#define GELIC_NET_MIN_MTU 64 36#define GELIC_NET_MIN_MTU VLAN_ETH_ZLEN
37#define GELIC_NET_RXBUF_ALIGN 128 37#define GELIC_NET_RXBUF_ALIGN 128
38#define GELIC_NET_RX_CSUM_DEFAULT 1 /* hw chksum */ 38#define GELIC_NET_RX_CSUM_DEFAULT 1 /* hw chksum */
39#define GELIC_NET_WATCHDOG_TIMEOUT 5*HZ 39#define GELIC_NET_WATCHDOG_TIMEOUT 5*HZ
@@ -81,7 +81,8 @@ enum gelic_net_int1_status {
81 */ 81 */
82#define GELIC_NET_RXVLNPKT 0x00200000 /* VLAN packet */ 82#define GELIC_NET_RXVLNPKT 0x00200000 /* VLAN packet */
83/* bit 20..16 reserved */ 83/* bit 20..16 reserved */
84#define GELIC_NET_RXRECNUM 0x0000ff00 /* reception receipt number */ 84#define GELIC_NET_RXRRECNUM 0x0000ff00 /* reception receipt number */
85#define GELIC_NET_RXRRECNUM_SHIFT 8
85/* bit 7..0 reserved */ 86/* bit 7..0 reserved */
86 87
87#define GELIC_NET_TXDESC_TAIL 0 88#define GELIC_NET_TXDESC_TAIL 0
@@ -129,13 +130,14 @@ enum gelic_net_int1_status {
129 130
130 131
131enum gelic_net_descr_status { 132enum gelic_net_descr_status {
132 GELIC_NET_DESCR_COMPLETE = 0x00, /* used in rx and tx */ 133 GELIC_NET_DESCR_COMPLETE = 0x00, /* used in tx */
134 GELIC_NET_DESCR_BUFFER_FULL = 0x00, /* used in rx */
133 GELIC_NET_DESCR_RESPONSE_ERROR = 0x01, /* used in rx and tx */ 135 GELIC_NET_DESCR_RESPONSE_ERROR = 0x01, /* used in rx and tx */
134 GELIC_NET_DESCR_PROTECTION_ERROR = 0x02, /* used in rx and tx */ 136 GELIC_NET_DESCR_PROTECTION_ERROR = 0x02, /* used in rx and tx */
135 GELIC_NET_DESCR_FRAME_END = 0x04, /* used in rx */ 137 GELIC_NET_DESCR_FRAME_END = 0x04, /* used in rx */
136 GELIC_NET_DESCR_FORCE_END = 0x05, /* used in rx and tx */ 138 GELIC_NET_DESCR_FORCE_END = 0x05, /* used in rx and tx */
137 GELIC_NET_DESCR_CARDOWNED = 0x0a, /* used in rx and tx */ 139 GELIC_NET_DESCR_CARDOWNED = 0x0a, /* used in rx and tx */
138 GELIC_NET_DESCR_NOT_IN_USE /* any other value */ 140 GELIC_NET_DESCR_NOT_IN_USE = 0x0b /* any other value */
139}; 141};
140/* for lv1_net_control */ 142/* for lv1_net_control */
141#define GELIC_NET_GET_MAC_ADDRESS 0x0000000000000001 143#define GELIC_NET_GET_MAC_ADDRESS 0x0000000000000001