diff options
author | Tejun Heo <tj@kernel.org> | 2008-07-31 04:02:40 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2008-09-29 00:22:28 -0400 |
commit | 82ef04fb4c82542b3eda81cca461f0594ce9cd0b (patch) | |
tree | e513df5ad8dc9f7400830bfc8786afb6bec90fb6 /drivers | |
parent | 6ef190cc92e33565accff6a320f0e7d90480bfe7 (diff) |
libata: make SCR access ops per-link
Logically, SCR access ops should take @link; however, there was no
compelling reason to convert all SCR access ops when adding @link
abstraction as there's one-to-one mapping between a port and a non-PMP
link. However, that assumption won't hold anymore with the scheduled
addition of slave link.
Make SCR access ops per-link.
Signed-off-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/ata/ahci.c | 24 | ||||
-rw-r--r-- | drivers/ata/ata_piix.c | 15 | ||||
-rw-r--r-- | drivers/ata/libata-core.c | 13 | ||||
-rw-r--r-- | drivers/ata/sata_fsl.c | 26 | ||||
-rw-r--r-- | drivers/ata/sata_inic162x.c | 8 | ||||
-rw-r--r-- | drivers/ata/sata_mv.c | 28 | ||||
-rw-r--r-- | drivers/ata/sata_nv.c | 16 | ||||
-rw-r--r-- | drivers/ata/sata_promise.c | 16 | ||||
-rw-r--r-- | drivers/ata/sata_qstor.c | 12 | ||||
-rw-r--r-- | drivers/ata/sata_sil.c | 16 | ||||
-rw-r--r-- | drivers/ata/sata_sil24.c | 12 | ||||
-rw-r--r-- | drivers/ata/sata_sis.c | 28 | ||||
-rw-r--r-- | drivers/ata/sata_svw.c | 10 | ||||
-rw-r--r-- | drivers/ata/sata_uli.c | 24 | ||||
-rw-r--r-- | drivers/ata/sata_via.c | 24 | ||||
-rw-r--r-- | drivers/ata/sata_vsc.c | 10 | ||||
-rw-r--r-- | drivers/scsi/libsas/sas_ata.c | 8 |
17 files changed, 151 insertions, 139 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index 2e1a7cb2ed5f..6acea41eb7ca 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c | |||
@@ -267,8 +267,8 @@ struct ahci_port_priv { | |||
267 | * per PM slot */ | 267 | * per PM slot */ |
268 | }; | 268 | }; |
269 | 269 | ||
270 | static int ahci_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | 270 | static int ahci_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); |
271 | static int ahci_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | 271 | static int ahci_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); |
272 | static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | 272 | static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
273 | static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc); | 273 | static unsigned int ahci_qc_issue(struct ata_queued_cmd *qc); |
274 | static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc); | 274 | static bool ahci_qc_fill_rtf(struct ata_queued_cmd *qc); |
@@ -820,10 +820,10 @@ static unsigned ahci_scr_offset(struct ata_port *ap, unsigned int sc_reg) | |||
820 | return 0; | 820 | return 0; |
821 | } | 821 | } |
822 | 822 | ||
823 | static int ahci_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | 823 | static int ahci_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val) |
824 | { | 824 | { |
825 | void __iomem *port_mmio = ahci_port_base(ap); | 825 | void __iomem *port_mmio = ahci_port_base(link->ap); |
826 | int offset = ahci_scr_offset(ap, sc_reg); | 826 | int offset = ahci_scr_offset(link->ap, sc_reg); |
827 | 827 | ||
828 | if (offset) { | 828 | if (offset) { |
829 | *val = readl(port_mmio + offset); | 829 | *val = readl(port_mmio + offset); |
@@ -832,10 +832,10 @@ static int ahci_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | |||
832 | return -EINVAL; | 832 | return -EINVAL; |
833 | } | 833 | } |
834 | 834 | ||
835 | static int ahci_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | 835 | static int ahci_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) |
836 | { | 836 | { |
837 | void __iomem *port_mmio = ahci_port_base(ap); | 837 | void __iomem *port_mmio = ahci_port_base(link->ap); |
838 | int offset = ahci_scr_offset(ap, sc_reg); | 838 | int offset = ahci_scr_offset(link->ap, sc_reg); |
839 | 839 | ||
840 | if (offset) { | 840 | if (offset) { |
841 | writel(val, port_mmio + offset); | 841 | writel(val, port_mmio + offset); |
@@ -973,7 +973,7 @@ static void ahci_disable_alpm(struct ata_port *ap) | |||
973 | writel(PORT_IRQ_PHYRDY, port_mmio + PORT_IRQ_STAT); | 973 | writel(PORT_IRQ_PHYRDY, port_mmio + PORT_IRQ_STAT); |
974 | 974 | ||
975 | /* go ahead and clean out PhyRdy Change from Serror too */ | 975 | /* go ahead and clean out PhyRdy Change from Serror too */ |
976 | ahci_scr_write(ap, SCR_ERROR, ((1 << 16) | (1 << 18))); | 976 | ahci_scr_write(&ap->link, SCR_ERROR, ((1 << 16) | (1 << 18))); |
977 | 977 | ||
978 | /* | 978 | /* |
979 | * Clear flag to indicate that we should ignore all PhyRdy | 979 | * Clear flag to indicate that we should ignore all PhyRdy |
@@ -1937,8 +1937,8 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat) | |||
1937 | ata_ehi_push_desc(host_ehi, "irq_stat 0x%08x", irq_stat); | 1937 | ata_ehi_push_desc(host_ehi, "irq_stat 0x%08x", irq_stat); |
1938 | 1938 | ||
1939 | /* AHCI needs SError cleared; otherwise, it might lock up */ | 1939 | /* AHCI needs SError cleared; otherwise, it might lock up */ |
1940 | ahci_scr_read(ap, SCR_ERROR, &serror); | 1940 | ahci_scr_read(&ap->link, SCR_ERROR, &serror); |
1941 | ahci_scr_write(ap, SCR_ERROR, serror); | 1941 | ahci_scr_write(&ap->link, SCR_ERROR, serror); |
1942 | host_ehi->serror |= serror; | 1942 | host_ehi->serror |= serror; |
1943 | 1943 | ||
1944 | /* some controllers set IRQ_IF_ERR on device errors, ignore it */ | 1944 | /* some controllers set IRQ_IF_ERR on device errors, ignore it */ |
@@ -2027,7 +2027,7 @@ static void ahci_port_intr(struct ata_port *ap) | |||
2027 | if ((hpriv->flags & AHCI_HFLAG_NO_HOTPLUG) && | 2027 | if ((hpriv->flags & AHCI_HFLAG_NO_HOTPLUG) && |
2028 | (status & PORT_IRQ_PHYRDY)) { | 2028 | (status & PORT_IRQ_PHYRDY)) { |
2029 | status &= ~PORT_IRQ_PHYRDY; | 2029 | status &= ~PORT_IRQ_PHYRDY; |
2030 | ahci_scr_write(ap, SCR_ERROR, ((1 << 16) | (1 << 18))); | 2030 | ahci_scr_write(&ap->link, SCR_ERROR, ((1 << 16) | (1 << 18))); |
2031 | } | 2031 | } |
2032 | 2032 | ||
2033 | if (unlikely(status & PORT_IRQ_ERROR)) { | 2033 | if (unlikely(status & PORT_IRQ_ERROR)) { |
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index e6b4606e36b6..81387ff48937 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c | |||
@@ -165,8 +165,10 @@ static void piix_set_dmamode(struct ata_port *ap, struct ata_device *adev); | |||
165 | static void ich_set_dmamode(struct ata_port *ap, struct ata_device *adev); | 165 | static void ich_set_dmamode(struct ata_port *ap, struct ata_device *adev); |
166 | static int ich_pata_cable_detect(struct ata_port *ap); | 166 | static int ich_pata_cable_detect(struct ata_port *ap); |
167 | static u8 piix_vmw_bmdma_status(struct ata_port *ap); | 167 | static u8 piix_vmw_bmdma_status(struct ata_port *ap); |
168 | static int piix_sidpr_scr_read(struct ata_port *ap, unsigned int reg, u32 *val); | 168 | static int piix_sidpr_scr_read(struct ata_link *link, |
169 | static int piix_sidpr_scr_write(struct ata_port *ap, unsigned int reg, u32 val); | 169 | unsigned int reg, u32 *val); |
170 | static int piix_sidpr_scr_write(struct ata_link *link, | ||
171 | unsigned int reg, u32 val); | ||
170 | #ifdef CONFIG_PM | 172 | #ifdef CONFIG_PM |
171 | static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg); | 173 | static int piix_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg); |
172 | static int piix_pci_device_resume(struct pci_dev *pdev); | 174 | static int piix_pci_device_resume(struct pci_dev *pdev); |
@@ -971,8 +973,10 @@ static u32 piix_merge_scr(u32 val0, u32 val1, const int * const *merge_tbl) | |||
971 | return val; | 973 | return val; |
972 | } | 974 | } |
973 | 975 | ||
974 | static int piix_sidpr_scr_read(struct ata_port *ap, unsigned int reg, u32 *val) | 976 | static int piix_sidpr_scr_read(struct ata_link *link, |
977 | unsigned int reg, u32 *val) | ||
975 | { | 978 | { |
979 | struct ata_port *ap = link->ap; | ||
976 | const int * const sstatus_merge_tbl[] = { | 980 | const int * const sstatus_merge_tbl[] = { |
977 | /* DET */ (const int []){ 1, 3, 0, 4, 3, -1 }, | 981 | /* DET */ (const int []){ 1, 3, 0, 4, 3, -1 }, |
978 | /* SPD */ (const int []){ 2, 1, 0, -1 }, | 982 | /* SPD */ (const int []){ 2, 1, 0, -1 }, |
@@ -1013,8 +1017,11 @@ static int piix_sidpr_scr_read(struct ata_port *ap, unsigned int reg, u32 *val) | |||
1013 | return 0; | 1017 | return 0; |
1014 | } | 1018 | } |
1015 | 1019 | ||
1016 | static int piix_sidpr_scr_write(struct ata_port *ap, unsigned int reg, u32 val) | 1020 | static int piix_sidpr_scr_write(struct ata_link *link, |
1021 | unsigned int reg, u32 val) | ||
1017 | { | 1022 | { |
1023 | struct ata_port *ap = link->ap; | ||
1024 | |||
1018 | if (reg >= ARRAY_SIZE(piix_sidx_map)) | 1025 | if (reg >= ARRAY_SIZE(piix_sidx_map)) |
1019 | return -EINVAL; | 1026 | return -EINVAL; |
1020 | 1027 | ||
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index 79e3a8e7a84a..825461a33abe 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c | |||
@@ -4868,10 +4868,8 @@ int sata_scr_valid(struct ata_link *link) | |||
4868 | int sata_scr_read(struct ata_link *link, int reg, u32 *val) | 4868 | int sata_scr_read(struct ata_link *link, int reg, u32 *val) |
4869 | { | 4869 | { |
4870 | if (ata_is_host_link(link)) { | 4870 | if (ata_is_host_link(link)) { |
4871 | struct ata_port *ap = link->ap; | ||
4872 | |||
4873 | if (sata_scr_valid(link)) | 4871 | if (sata_scr_valid(link)) |
4874 | return ap->ops->scr_read(ap, reg, val); | 4872 | return link->ap->ops->scr_read(link, reg, val); |
4875 | return -EOPNOTSUPP; | 4873 | return -EOPNOTSUPP; |
4876 | } | 4874 | } |
4877 | 4875 | ||
@@ -4897,10 +4895,8 @@ int sata_scr_read(struct ata_link *link, int reg, u32 *val) | |||
4897 | int sata_scr_write(struct ata_link *link, int reg, u32 val) | 4895 | int sata_scr_write(struct ata_link *link, int reg, u32 val) |
4898 | { | 4896 | { |
4899 | if (ata_is_host_link(link)) { | 4897 | if (ata_is_host_link(link)) { |
4900 | struct ata_port *ap = link->ap; | ||
4901 | |||
4902 | if (sata_scr_valid(link)) | 4898 | if (sata_scr_valid(link)) |
4903 | return ap->ops->scr_write(ap, reg, val); | 4899 | return link->ap->ops->scr_write(link, reg, val); |
4904 | return -EOPNOTSUPP; | 4900 | return -EOPNOTSUPP; |
4905 | } | 4901 | } |
4906 | 4902 | ||
@@ -4925,13 +4921,12 @@ int sata_scr_write(struct ata_link *link, int reg, u32 val) | |||
4925 | int sata_scr_write_flush(struct ata_link *link, int reg, u32 val) | 4921 | int sata_scr_write_flush(struct ata_link *link, int reg, u32 val) |
4926 | { | 4922 | { |
4927 | if (ata_is_host_link(link)) { | 4923 | if (ata_is_host_link(link)) { |
4928 | struct ata_port *ap = link->ap; | ||
4929 | int rc; | 4924 | int rc; |
4930 | 4925 | ||
4931 | if (sata_scr_valid(link)) { | 4926 | if (sata_scr_valid(link)) { |
4932 | rc = ap->ops->scr_write(ap, reg, val); | 4927 | rc = link->ap->ops->scr_write(link, reg, val); |
4933 | if (rc == 0) | 4928 | if (rc == 0) |
4934 | rc = ap->ops->scr_read(ap, reg, &val); | 4929 | rc = link->ap->ops->scr_read(link, reg, &val); |
4935 | return rc; | 4930 | return rc; |
4936 | } | 4931 | } |
4937 | return -EOPNOTSUPP; | 4932 | return -EOPNOTSUPP; |
diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c index 3924e7209a44..1a56db92ff7a 100644 --- a/drivers/ata/sata_fsl.c +++ b/drivers/ata/sata_fsl.c | |||
@@ -469,10 +469,10 @@ static bool sata_fsl_qc_fill_rtf(struct ata_queued_cmd *qc) | |||
469 | return true; | 469 | return true; |
470 | } | 470 | } |
471 | 471 | ||
472 | static int sata_fsl_scr_write(struct ata_port *ap, unsigned int sc_reg_in, | 472 | static int sata_fsl_scr_write(struct ata_link *link, |
473 | u32 val) | 473 | unsigned int sc_reg_in, u32 val) |
474 | { | 474 | { |
475 | struct sata_fsl_host_priv *host_priv = ap->host->private_data; | 475 | struct sata_fsl_host_priv *host_priv = link->ap->host->private_data; |
476 | void __iomem *ssr_base = host_priv->ssr_base; | 476 | void __iomem *ssr_base = host_priv->ssr_base; |
477 | unsigned int sc_reg; | 477 | unsigned int sc_reg; |
478 | 478 | ||
@@ -493,10 +493,10 @@ static int sata_fsl_scr_write(struct ata_port *ap, unsigned int sc_reg_in, | |||
493 | return 0; | 493 | return 0; |
494 | } | 494 | } |
495 | 495 | ||
496 | static int sata_fsl_scr_read(struct ata_port *ap, unsigned int sc_reg_in, | 496 | static int sata_fsl_scr_read(struct ata_link *link, |
497 | u32 *val) | 497 | unsigned int sc_reg_in, u32 *val) |
498 | { | 498 | { |
499 | struct sata_fsl_host_priv *host_priv = ap->host->private_data; | 499 | struct sata_fsl_host_priv *host_priv = link->ap->host->private_data; |
500 | void __iomem *ssr_base = host_priv->ssr_base; | 500 | void __iomem *ssr_base = host_priv->ssr_base; |
501 | unsigned int sc_reg; | 501 | unsigned int sc_reg; |
502 | 502 | ||
@@ -645,12 +645,12 @@ static int sata_fsl_port_start(struct ata_port *ap) | |||
645 | * Workaround for 8315DS board 3gbps link-up issue, | 645 | * Workaround for 8315DS board 3gbps link-up issue, |
646 | * currently limit SATA port to GEN1 speed | 646 | * currently limit SATA port to GEN1 speed |
647 | */ | 647 | */ |
648 | sata_fsl_scr_read(ap, SCR_CONTROL, &temp); | 648 | sata_fsl_scr_read(&ap->link, SCR_CONTROL, &temp); |
649 | temp &= ~(0xF << 4); | 649 | temp &= ~(0xF << 4); |
650 | temp |= (0x1 << 4); | 650 | temp |= (0x1 << 4); |
651 | sata_fsl_scr_write(ap, SCR_CONTROL, temp); | 651 | sata_fsl_scr_write(&ap->link, SCR_CONTROL, temp); |
652 | 652 | ||
653 | sata_fsl_scr_read(ap, SCR_CONTROL, &temp); | 653 | sata_fsl_scr_read(&ap->link, SCR_CONTROL, &temp); |
654 | dev_printk(KERN_WARNING, dev, "scr_control, speed limited to %x\n", | 654 | dev_printk(KERN_WARNING, dev, "scr_control, speed limited to %x\n", |
655 | temp); | 655 | temp); |
656 | #endif | 656 | #endif |
@@ -868,7 +868,7 @@ issue_srst: | |||
868 | ioread32(CQ + hcr_base), | 868 | ioread32(CQ + hcr_base), |
869 | ioread32(CA + hcr_base), ioread32(CC + hcr_base)); | 869 | ioread32(CA + hcr_base), ioread32(CC + hcr_base)); |
870 | 870 | ||
871 | sata_fsl_scr_read(ap, SCR_ERROR, &Serror); | 871 | sata_fsl_scr_read(&ap->link, SCR_ERROR, &Serror); |
872 | 872 | ||
873 | DPRINTK("HStatus = 0x%x\n", ioread32(hcr_base + HSTATUS)); | 873 | DPRINTK("HStatus = 0x%x\n", ioread32(hcr_base + HSTATUS)); |
874 | DPRINTK("HControl = 0x%x\n", ioread32(hcr_base + HCONTROL)); | 874 | DPRINTK("HControl = 0x%x\n", ioread32(hcr_base + HCONTROL)); |
@@ -972,9 +972,9 @@ static void sata_fsl_error_intr(struct ata_port *ap) | |||
972 | * Handle & Clear SError | 972 | * Handle & Clear SError |
973 | */ | 973 | */ |
974 | 974 | ||
975 | sata_fsl_scr_read(ap, SCR_ERROR, &SError); | 975 | sata_fsl_scr_read(&ap->link, SCR_ERROR, &SError); |
976 | if (unlikely(SError & 0xFFFF0000)) { | 976 | if (unlikely(SError & 0xFFFF0000)) { |
977 | sata_fsl_scr_write(ap, SCR_ERROR, SError); | 977 | sata_fsl_scr_write(&ap->link, SCR_ERROR, SError); |
978 | } | 978 | } |
979 | 979 | ||
980 | DPRINTK("error_intr,hStat=0x%x,CE=0x%x,DE =0x%x,SErr=0x%x\n", | 980 | DPRINTK("error_intr,hStat=0x%x,CE=0x%x,DE =0x%x,SErr=0x%x\n", |
@@ -1091,7 +1091,7 @@ static void sata_fsl_host_intr(struct ata_port *ap) | |||
1091 | 1091 | ||
1092 | hstatus = ioread32(hcr_base + HSTATUS); | 1092 | hstatus = ioread32(hcr_base + HSTATUS); |
1093 | 1093 | ||
1094 | sata_fsl_scr_read(ap, SCR_ERROR, &SError); | 1094 | sata_fsl_scr_read(&ap->link, SCR_ERROR, &SError); |
1095 | 1095 | ||
1096 | if (unlikely(SError & 0xFFFF0000)) { | 1096 | if (unlikely(SError & 0xFFFF0000)) { |
1097 | DPRINTK("serror @host_intr : 0x%x\n", SError); | 1097 | DPRINTK("serror @host_intr : 0x%x\n", SError); |
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c index 5032c32fa505..fbbd87c96f10 100644 --- a/drivers/ata/sata_inic162x.c +++ b/drivers/ata/sata_inic162x.c | |||
@@ -269,9 +269,9 @@ static void inic_reset_port(void __iomem *port_base) | |||
269 | writeb(0xff, port_base + PORT_IRQ_STAT); | 269 | writeb(0xff, port_base + PORT_IRQ_STAT); |
270 | } | 270 | } |
271 | 271 | ||
272 | static int inic_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val) | 272 | static int inic_scr_read(struct ata_link *link, unsigned sc_reg, u32 *val) |
273 | { | 273 | { |
274 | void __iomem *scr_addr = inic_port_base(ap) + PORT_SCR; | 274 | void __iomem *scr_addr = inic_port_base(link->ap) + PORT_SCR; |
275 | void __iomem *addr; | 275 | void __iomem *addr; |
276 | 276 | ||
277 | if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) | 277 | if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) |
@@ -286,9 +286,9 @@ static int inic_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val) | |||
286 | return 0; | 286 | return 0; |
287 | } | 287 | } |
288 | 288 | ||
289 | static int inic_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) | 289 | static int inic_scr_write(struct ata_link *link, unsigned sc_reg, u32 val) |
290 | { | 290 | { |
291 | void __iomem *scr_addr = inic_port_base(ap) + PORT_SCR; | 291 | void __iomem *scr_addr = inic_port_base(link->ap) + PORT_SCR; |
292 | 292 | ||
293 | if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) | 293 | if (unlikely(sc_reg >= ARRAY_SIZE(scr_map))) |
294 | return -EINVAL; | 294 | return -EINVAL; |
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index c815f8ecf6e6..2b24ae58b52e 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c | |||
@@ -493,10 +493,10 @@ struct mv_hw_ops { | |||
493 | void (*reset_bus)(struct ata_host *host, void __iomem *mmio); | 493 | void (*reset_bus)(struct ata_host *host, void __iomem *mmio); |
494 | }; | 494 | }; |
495 | 495 | ||
496 | static int mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val); | 496 | static int mv_scr_read(struct ata_link *link, unsigned int sc_reg_in, u32 *val); |
497 | static int mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val); | 497 | static int mv_scr_write(struct ata_link *link, unsigned int sc_reg_in, u32 val); |
498 | static int mv5_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val); | 498 | static int mv5_scr_read(struct ata_link *link, unsigned int sc_reg_in, u32 *val); |
499 | static int mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val); | 499 | static int mv5_scr_write(struct ata_link *link, unsigned int sc_reg_in, u32 val); |
500 | static int mv_port_start(struct ata_port *ap); | 500 | static int mv_port_start(struct ata_port *ap); |
501 | static void mv_port_stop(struct ata_port *ap); | 501 | static void mv_port_stop(struct ata_port *ap); |
502 | static int mv_qc_defer(struct ata_queued_cmd *qc); | 502 | static int mv_qc_defer(struct ata_queued_cmd *qc); |
@@ -1070,23 +1070,23 @@ static unsigned int mv_scr_offset(unsigned int sc_reg_in) | |||
1070 | return ofs; | 1070 | return ofs; |
1071 | } | 1071 | } |
1072 | 1072 | ||
1073 | static int mv_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val) | 1073 | static int mv_scr_read(struct ata_link *link, unsigned int sc_reg_in, u32 *val) |
1074 | { | 1074 | { |
1075 | unsigned int ofs = mv_scr_offset(sc_reg_in); | 1075 | unsigned int ofs = mv_scr_offset(sc_reg_in); |
1076 | 1076 | ||
1077 | if (ofs != 0xffffffffU) { | 1077 | if (ofs != 0xffffffffU) { |
1078 | *val = readl(mv_ap_base(ap) + ofs); | 1078 | *val = readl(mv_ap_base(link->ap) + ofs); |
1079 | return 0; | 1079 | return 0; |
1080 | } else | 1080 | } else |
1081 | return -EINVAL; | 1081 | return -EINVAL; |
1082 | } | 1082 | } |
1083 | 1083 | ||
1084 | static int mv_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val) | 1084 | static int mv_scr_write(struct ata_link *link, unsigned int sc_reg_in, u32 val) |
1085 | { | 1085 | { |
1086 | unsigned int ofs = mv_scr_offset(sc_reg_in); | 1086 | unsigned int ofs = mv_scr_offset(sc_reg_in); |
1087 | 1087 | ||
1088 | if (ofs != 0xffffffffU) { | 1088 | if (ofs != 0xffffffffU) { |
1089 | writelfl(val, mv_ap_base(ap) + ofs); | 1089 | writelfl(val, mv_ap_base(link->ap) + ofs); |
1090 | return 0; | 1090 | return 0; |
1091 | } else | 1091 | } else |
1092 | return -EINVAL; | 1092 | return -EINVAL; |
@@ -2251,11 +2251,11 @@ static unsigned int mv5_scr_offset(unsigned int sc_reg_in) | |||
2251 | return ofs; | 2251 | return ofs; |
2252 | } | 2252 | } |
2253 | 2253 | ||
2254 | static int mv5_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val) | 2254 | static int mv5_scr_read(struct ata_link *link, unsigned int sc_reg_in, u32 *val) |
2255 | { | 2255 | { |
2256 | struct mv_host_priv *hpriv = ap->host->private_data; | 2256 | struct mv_host_priv *hpriv = link->ap->host->private_data; |
2257 | void __iomem *mmio = hpriv->base; | 2257 | void __iomem *mmio = hpriv->base; |
2258 | void __iomem *addr = mv5_phy_base(mmio, ap->port_no); | 2258 | void __iomem *addr = mv5_phy_base(mmio, link->ap->port_no); |
2259 | unsigned int ofs = mv5_scr_offset(sc_reg_in); | 2259 | unsigned int ofs = mv5_scr_offset(sc_reg_in); |
2260 | 2260 | ||
2261 | if (ofs != 0xffffffffU) { | 2261 | if (ofs != 0xffffffffU) { |
@@ -2265,11 +2265,11 @@ static int mv5_scr_read(struct ata_port *ap, unsigned int sc_reg_in, u32 *val) | |||
2265 | return -EINVAL; | 2265 | return -EINVAL; |
2266 | } | 2266 | } |
2267 | 2267 | ||
2268 | static int mv5_scr_write(struct ata_port *ap, unsigned int sc_reg_in, u32 val) | 2268 | static int mv5_scr_write(struct ata_link *link, unsigned int sc_reg_in, u32 val) |
2269 | { | 2269 | { |
2270 | struct mv_host_priv *hpriv = ap->host->private_data; | 2270 | struct mv_host_priv *hpriv = link->ap->host->private_data; |
2271 | void __iomem *mmio = hpriv->base; | 2271 | void __iomem *mmio = hpriv->base; |
2272 | void __iomem *addr = mv5_phy_base(mmio, ap->port_no); | 2272 | void __iomem *addr = mv5_phy_base(mmio, link->ap->port_no); |
2273 | unsigned int ofs = mv5_scr_offset(sc_reg_in); | 2273 | unsigned int ofs = mv5_scr_offset(sc_reg_in); |
2274 | 2274 | ||
2275 | if (ofs != 0xffffffffU) { | 2275 | if (ofs != 0xffffffffU) { |
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c index 1e1f3f3757ae..88fd4aeacde0 100644 --- a/drivers/ata/sata_nv.c +++ b/drivers/ata/sata_nv.c | |||
@@ -302,8 +302,8 @@ static void nv_ck804_host_stop(struct ata_host *host); | |||
302 | static irqreturn_t nv_generic_interrupt(int irq, void *dev_instance); | 302 | static irqreturn_t nv_generic_interrupt(int irq, void *dev_instance); |
303 | static irqreturn_t nv_nf2_interrupt(int irq, void *dev_instance); | 303 | static irqreturn_t nv_nf2_interrupt(int irq, void *dev_instance); |
304 | static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance); | 304 | static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance); |
305 | static int nv_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | 305 | static int nv_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); |
306 | static int nv_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | 306 | static int nv_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); |
307 | 307 | ||
308 | static void nv_nf2_freeze(struct ata_port *ap); | 308 | static void nv_nf2_freeze(struct ata_port *ap); |
309 | static void nv_nf2_thaw(struct ata_port *ap); | 309 | static void nv_nf2_thaw(struct ata_port *ap); |
@@ -1492,21 +1492,21 @@ static irqreturn_t nv_ck804_interrupt(int irq, void *dev_instance) | |||
1492 | return ret; | 1492 | return ret; |
1493 | } | 1493 | } |
1494 | 1494 | ||
1495 | static int nv_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | 1495 | static int nv_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val) |
1496 | { | 1496 | { |
1497 | if (sc_reg > SCR_CONTROL) | 1497 | if (sc_reg > SCR_CONTROL) |
1498 | return -EINVAL; | 1498 | return -EINVAL; |
1499 | 1499 | ||
1500 | *val = ioread32(ap->ioaddr.scr_addr + (sc_reg * 4)); | 1500 | *val = ioread32(link->ap->ioaddr.scr_addr + (sc_reg * 4)); |
1501 | return 0; | 1501 | return 0; |
1502 | } | 1502 | } |
1503 | 1503 | ||
1504 | static int nv_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | 1504 | static int nv_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) |
1505 | { | 1505 | { |
1506 | if (sc_reg > SCR_CONTROL) | 1506 | if (sc_reg > SCR_CONTROL) |
1507 | return -EINVAL; | 1507 | return -EINVAL; |
1508 | 1508 | ||
1509 | iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4)); | 1509 | iowrite32(val, link->ap->ioaddr.scr_addr + (sc_reg * 4)); |
1510 | return 0; | 1510 | return 0; |
1511 | } | 1511 | } |
1512 | 1512 | ||
@@ -2184,9 +2184,9 @@ static void nv_swncq_host_interrupt(struct ata_port *ap, u16 fis) | |||
2184 | if (!pp->qc_active) | 2184 | if (!pp->qc_active) |
2185 | return; | 2185 | return; |
2186 | 2186 | ||
2187 | if (ap->ops->scr_read(ap, SCR_ERROR, &serror)) | 2187 | if (ap->ops->scr_read(&ap->link, SCR_ERROR, &serror)) |
2188 | return; | 2188 | return; |
2189 | ap->ops->scr_write(ap, SCR_ERROR, serror); | 2189 | ap->ops->scr_write(&ap->link, SCR_ERROR, serror); |
2190 | 2190 | ||
2191 | if (ata_stat & ATA_ERR) { | 2191 | if (ata_stat & ATA_ERR) { |
2192 | ata_ehi_clear_desc(ehi); | 2192 | ata_ehi_clear_desc(ehi); |
diff --git a/drivers/ata/sata_promise.c b/drivers/ata/sata_promise.c index 030665ba76b7..750d8cdc00cd 100644 --- a/drivers/ata/sata_promise.c +++ b/drivers/ata/sata_promise.c | |||
@@ -137,8 +137,8 @@ struct pdc_port_priv { | |||
137 | dma_addr_t pkt_dma; | 137 | dma_addr_t pkt_dma; |
138 | }; | 138 | }; |
139 | 139 | ||
140 | static int pdc_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | 140 | static int pdc_sata_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); |
141 | static int pdc_sata_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | 141 | static int pdc_sata_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); |
142 | static int pdc_ata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | 142 | static int pdc_ata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
143 | static int pdc_common_port_start(struct ata_port *ap); | 143 | static int pdc_common_port_start(struct ata_port *ap); |
144 | static int pdc_sata_port_start(struct ata_port *ap); | 144 | static int pdc_sata_port_start(struct ata_port *ap); |
@@ -386,19 +386,21 @@ static int pdc_sata_cable_detect(struct ata_port *ap) | |||
386 | return ATA_CBL_SATA; | 386 | return ATA_CBL_SATA; |
387 | } | 387 | } |
388 | 388 | ||
389 | static int pdc_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | 389 | static int pdc_sata_scr_read(struct ata_link *link, |
390 | unsigned int sc_reg, u32 *val) | ||
390 | { | 391 | { |
391 | if (sc_reg > SCR_CONTROL) | 392 | if (sc_reg > SCR_CONTROL) |
392 | return -EINVAL; | 393 | return -EINVAL; |
393 | *val = readl(ap->ioaddr.scr_addr + (sc_reg * 4)); | 394 | *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4)); |
394 | return 0; | 395 | return 0; |
395 | } | 396 | } |
396 | 397 | ||
397 | static int pdc_sata_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | 398 | static int pdc_sata_scr_write(struct ata_link *link, |
399 | unsigned int sc_reg, u32 val) | ||
398 | { | 400 | { |
399 | if (sc_reg > SCR_CONTROL) | 401 | if (sc_reg > SCR_CONTROL) |
400 | return -EINVAL; | 402 | return -EINVAL; |
401 | writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); | 403 | writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4)); |
402 | return 0; | 404 | return 0; |
403 | } | 405 | } |
404 | 406 | ||
@@ -731,7 +733,7 @@ static void pdc_error_intr(struct ata_port *ap, struct ata_queued_cmd *qc, | |||
731 | if (sata_scr_valid(&ap->link)) { | 733 | if (sata_scr_valid(&ap->link)) { |
732 | u32 serror; | 734 | u32 serror; |
733 | 735 | ||
734 | pdc_sata_scr_read(ap, SCR_ERROR, &serror); | 736 | pdc_sata_scr_read(&ap->link, SCR_ERROR, &serror); |
735 | ehi->serror |= serror; | 737 | ehi->serror |= serror; |
736 | } | 738 | } |
737 | 739 | ||
diff --git a/drivers/ata/sata_qstor.c b/drivers/ata/sata_qstor.c index 1600107047cf..a000c86ac859 100644 --- a/drivers/ata/sata_qstor.c +++ b/drivers/ata/sata_qstor.c | |||
@@ -111,8 +111,8 @@ struct qs_port_priv { | |||
111 | qs_state_t state; | 111 | qs_state_t state; |
112 | }; | 112 | }; |
113 | 113 | ||
114 | static int qs_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | 114 | static int qs_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); |
115 | static int qs_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | 115 | static int qs_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); |
116 | static int qs_ata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | 116 | static int qs_ata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
117 | static int qs_port_start(struct ata_port *ap); | 117 | static int qs_port_start(struct ata_port *ap); |
118 | static void qs_host_stop(struct ata_host *host); | 118 | static void qs_host_stop(struct ata_host *host); |
@@ -242,11 +242,11 @@ static int qs_prereset(struct ata_link *link, unsigned long deadline) | |||
242 | return ata_sff_prereset(link, deadline); | 242 | return ata_sff_prereset(link, deadline); |
243 | } | 243 | } |
244 | 244 | ||
245 | static int qs_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | 245 | static int qs_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val) |
246 | { | 246 | { |
247 | if (sc_reg > SCR_CONTROL) | 247 | if (sc_reg > SCR_CONTROL) |
248 | return -EINVAL; | 248 | return -EINVAL; |
249 | *val = readl(ap->ioaddr.scr_addr + (sc_reg * 8)); | 249 | *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 8)); |
250 | return 0; | 250 | return 0; |
251 | } | 251 | } |
252 | 252 | ||
@@ -256,11 +256,11 @@ static void qs_error_handler(struct ata_port *ap) | |||
256 | ata_std_error_handler(ap); | 256 | ata_std_error_handler(ap); |
257 | } | 257 | } |
258 | 258 | ||
259 | static int qs_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | 259 | static int qs_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) |
260 | { | 260 | { |
261 | if (sc_reg > SCR_CONTROL) | 261 | if (sc_reg > SCR_CONTROL) |
262 | return -EINVAL; | 262 | return -EINVAL; |
263 | writel(val, ap->ioaddr.scr_addr + (sc_reg * 8)); | 263 | writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 8)); |
264 | return 0; | 264 | return 0; |
265 | } | 265 | } |
266 | 266 | ||
diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c index 88bf4212590f..031d7b7dee34 100644 --- a/drivers/ata/sata_sil.c +++ b/drivers/ata/sata_sil.c | |||
@@ -115,8 +115,8 @@ static int sil_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | |||
115 | static int sil_pci_device_resume(struct pci_dev *pdev); | 115 | static int sil_pci_device_resume(struct pci_dev *pdev); |
116 | #endif | 116 | #endif |
117 | static void sil_dev_config(struct ata_device *dev); | 117 | static void sil_dev_config(struct ata_device *dev); |
118 | static int sil_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | 118 | static int sil_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); |
119 | static int sil_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | 119 | static int sil_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); |
120 | static int sil_set_mode(struct ata_link *link, struct ata_device **r_failed); | 120 | static int sil_set_mode(struct ata_link *link, struct ata_device **r_failed); |
121 | static void sil_freeze(struct ata_port *ap); | 121 | static void sil_freeze(struct ata_port *ap); |
122 | static void sil_thaw(struct ata_port *ap); | 122 | static void sil_thaw(struct ata_port *ap); |
@@ -317,9 +317,9 @@ static inline void __iomem *sil_scr_addr(struct ata_port *ap, | |||
317 | return NULL; | 317 | return NULL; |
318 | } | 318 | } |
319 | 319 | ||
320 | static int sil_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | 320 | static int sil_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val) |
321 | { | 321 | { |
322 | void __iomem *mmio = sil_scr_addr(ap, sc_reg); | 322 | void __iomem *mmio = sil_scr_addr(link->ap, sc_reg); |
323 | 323 | ||
324 | if (mmio) { | 324 | if (mmio) { |
325 | *val = readl(mmio); | 325 | *val = readl(mmio); |
@@ -328,9 +328,9 @@ static int sil_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | |||
328 | return -EINVAL; | 328 | return -EINVAL; |
329 | } | 329 | } |
330 | 330 | ||
331 | static int sil_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | 331 | static int sil_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) |
332 | { | 332 | { |
333 | void __iomem *mmio = sil_scr_addr(ap, sc_reg); | 333 | void __iomem *mmio = sil_scr_addr(link->ap, sc_reg); |
334 | 334 | ||
335 | if (mmio) { | 335 | if (mmio) { |
336 | writel(val, mmio); | 336 | writel(val, mmio); |
@@ -352,8 +352,8 @@ static void sil_host_intr(struct ata_port *ap, u32 bmdma2) | |||
352 | * controllers continue to assert IRQ as long as | 352 | * controllers continue to assert IRQ as long as |
353 | * SError bits are pending. Clear SError immediately. | 353 | * SError bits are pending. Clear SError immediately. |
354 | */ | 354 | */ |
355 | sil_scr_read(ap, SCR_ERROR, &serror); | 355 | sil_scr_read(&ap->link, SCR_ERROR, &serror); |
356 | sil_scr_write(ap, SCR_ERROR, serror); | 356 | sil_scr_write(&ap->link, SCR_ERROR, serror); |
357 | 357 | ||
358 | /* Sometimes spurious interrupts occur, double check | 358 | /* Sometimes spurious interrupts occur, double check |
359 | * it's PHYRDY CHG. | 359 | * it's PHYRDY CHG. |
diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c index 84ffcc26a74b..4621807a1a6a 100644 --- a/drivers/ata/sata_sil24.c +++ b/drivers/ata/sata_sil24.c | |||
@@ -340,8 +340,8 @@ struct sil24_port_priv { | |||
340 | }; | 340 | }; |
341 | 341 | ||
342 | static void sil24_dev_config(struct ata_device *dev); | 342 | static void sil24_dev_config(struct ata_device *dev); |
343 | static int sil24_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val); | 343 | static int sil24_scr_read(struct ata_link *link, unsigned sc_reg, u32 *val); |
344 | static int sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val); | 344 | static int sil24_scr_write(struct ata_link *link, unsigned sc_reg, u32 val); |
345 | static int sil24_qc_defer(struct ata_queued_cmd *qc); | 345 | static int sil24_qc_defer(struct ata_queued_cmd *qc); |
346 | static void sil24_qc_prep(struct ata_queued_cmd *qc); | 346 | static void sil24_qc_prep(struct ata_queued_cmd *qc); |
347 | static unsigned int sil24_qc_issue(struct ata_queued_cmd *qc); | 347 | static unsigned int sil24_qc_issue(struct ata_queued_cmd *qc); |
@@ -504,9 +504,9 @@ static int sil24_scr_map[] = { | |||
504 | [SCR_ACTIVE] = 3, | 504 | [SCR_ACTIVE] = 3, |
505 | }; | 505 | }; |
506 | 506 | ||
507 | static int sil24_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val) | 507 | static int sil24_scr_read(struct ata_link *link, unsigned sc_reg, u32 *val) |
508 | { | 508 | { |
509 | void __iomem *scr_addr = sil24_port_base(ap) + PORT_SCONTROL; | 509 | void __iomem *scr_addr = sil24_port_base(link->ap) + PORT_SCONTROL; |
510 | 510 | ||
511 | if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { | 511 | if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { |
512 | void __iomem *addr; | 512 | void __iomem *addr; |
@@ -517,9 +517,9 @@ static int sil24_scr_read(struct ata_port *ap, unsigned sc_reg, u32 *val) | |||
517 | return -EINVAL; | 517 | return -EINVAL; |
518 | } | 518 | } |
519 | 519 | ||
520 | static int sil24_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val) | 520 | static int sil24_scr_write(struct ata_link *link, unsigned sc_reg, u32 val) |
521 | { | 521 | { |
522 | void __iomem *scr_addr = sil24_port_base(ap) + PORT_SCONTROL; | 522 | void __iomem *scr_addr = sil24_port_base(link->ap) + PORT_SCONTROL; |
523 | 523 | ||
524 | if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { | 524 | if (sc_reg < ARRAY_SIZE(sil24_scr_map)) { |
525 | void __iomem *addr; | 525 | void __iomem *addr; |
diff --git a/drivers/ata/sata_sis.c b/drivers/ata/sata_sis.c index 1010b3069bd5..9c43b4e7c4a6 100644 --- a/drivers/ata/sata_sis.c +++ b/drivers/ata/sata_sis.c | |||
@@ -64,8 +64,8 @@ enum { | |||
64 | }; | 64 | }; |
65 | 65 | ||
66 | static int sis_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | 66 | static int sis_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
67 | static int sis_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | 67 | static int sis_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); |
68 | static int sis_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | 68 | static int sis_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); |
69 | 69 | ||
70 | static const struct pci_device_id sis_pci_tbl[] = { | 70 | static const struct pci_device_id sis_pci_tbl[] = { |
71 | { PCI_VDEVICE(SI, 0x0180), sis_180 }, /* SiS 964/180 */ | 71 | { PCI_VDEVICE(SI, 0x0180), sis_180 }, /* SiS 964/180 */ |
@@ -134,10 +134,11 @@ static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg) | |||
134 | return addr; | 134 | return addr; |
135 | } | 135 | } |
136 | 136 | ||
137 | static u32 sis_scr_cfg_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | 137 | static u32 sis_scr_cfg_read(struct ata_link *link, |
138 | unsigned int sc_reg, u32 *val) | ||
138 | { | 139 | { |
139 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 140 | struct pci_dev *pdev = to_pci_dev(link->ap->host->dev); |
140 | unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); | 141 | unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg); |
141 | u32 val2 = 0; | 142 | u32 val2 = 0; |
142 | u8 pmr; | 143 | u8 pmr; |
143 | 144 | ||
@@ -158,10 +159,11 @@ static u32 sis_scr_cfg_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | |||
158 | return 0; | 159 | return 0; |
159 | } | 160 | } |
160 | 161 | ||
161 | static int sis_scr_cfg_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | 162 | static int sis_scr_cfg_write(struct ata_link *link, |
163 | unsigned int sc_reg, u32 val) | ||
162 | { | 164 | { |
163 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 165 | struct pci_dev *pdev = to_pci_dev(link->ap->host->dev); |
164 | unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); | 166 | unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg); |
165 | u8 pmr; | 167 | u8 pmr; |
166 | 168 | ||
167 | if (sc_reg == SCR_ERROR) /* doesn't exist in PCI cfg space */ | 169 | if (sc_reg == SCR_ERROR) /* doesn't exist in PCI cfg space */ |
@@ -178,8 +180,9 @@ static int sis_scr_cfg_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | |||
178 | return 0; | 180 | return 0; |
179 | } | 181 | } |
180 | 182 | ||
181 | static int sis_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | 183 | static int sis_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val) |
182 | { | 184 | { |
185 | struct ata_port *ap = link->ap; | ||
183 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 186 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
184 | u8 pmr; | 187 | u8 pmr; |
185 | 188 | ||
@@ -187,7 +190,7 @@ static int sis_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | |||
187 | return -EINVAL; | 190 | return -EINVAL; |
188 | 191 | ||
189 | if (ap->flags & SIS_FLAG_CFGSCR) | 192 | if (ap->flags & SIS_FLAG_CFGSCR) |
190 | return sis_scr_cfg_read(ap, sc_reg, val); | 193 | return sis_scr_cfg_read(link, sc_reg, val); |
191 | 194 | ||
192 | pci_read_config_byte(pdev, SIS_PMR, &pmr); | 195 | pci_read_config_byte(pdev, SIS_PMR, &pmr); |
193 | 196 | ||
@@ -202,8 +205,9 @@ static int sis_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | |||
202 | return 0; | 205 | return 0; |
203 | } | 206 | } |
204 | 207 | ||
205 | static int sis_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | 208 | static int sis_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) |
206 | { | 209 | { |
210 | struct ata_port *ap = link->ap; | ||
207 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 211 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
208 | u8 pmr; | 212 | u8 pmr; |
209 | 213 | ||
@@ -213,7 +217,7 @@ static int sis_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | |||
213 | pci_read_config_byte(pdev, SIS_PMR, &pmr); | 217 | pci_read_config_byte(pdev, SIS_PMR, &pmr); |
214 | 218 | ||
215 | if (ap->flags & SIS_FLAG_CFGSCR) | 219 | if (ap->flags & SIS_FLAG_CFGSCR) |
216 | return sis_scr_cfg_write(ap, sc_reg, val); | 220 | return sis_scr_cfg_write(link, sc_reg, val); |
217 | else { | 221 | else { |
218 | iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4)); | 222 | iowrite32(val, ap->ioaddr.scr_addr + (sc_reg * 4)); |
219 | if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || | 223 | if ((pdev->device == 0x0182) || (pdev->device == 0x0183) || |
diff --git a/drivers/ata/sata_svw.c b/drivers/ata/sata_svw.c index fb13b82aacba..609d147813ae 100644 --- a/drivers/ata/sata_svw.c +++ b/drivers/ata/sata_svw.c | |||
@@ -123,20 +123,22 @@ static int k2_sata_check_atapi_dma(struct ata_queued_cmd *qc) | |||
123 | } | 123 | } |
124 | } | 124 | } |
125 | 125 | ||
126 | static int k2_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | 126 | static int k2_sata_scr_read(struct ata_link *link, |
127 | unsigned int sc_reg, u32 *val) | ||
127 | { | 128 | { |
128 | if (sc_reg > SCR_CONTROL) | 129 | if (sc_reg > SCR_CONTROL) |
129 | return -EINVAL; | 130 | return -EINVAL; |
130 | *val = readl(ap->ioaddr.scr_addr + (sc_reg * 4)); | 131 | *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4)); |
131 | return 0; | 132 | return 0; |
132 | } | 133 | } |
133 | 134 | ||
134 | 135 | ||
135 | static int k2_sata_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | 136 | static int k2_sata_scr_write(struct ata_link *link, |
137 | unsigned int sc_reg, u32 val) | ||
136 | { | 138 | { |
137 | if (sc_reg > SCR_CONTROL) | 139 | if (sc_reg > SCR_CONTROL) |
138 | return -EINVAL; | 140 | return -EINVAL; |
139 | writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); | 141 | writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4)); |
140 | return 0; | 142 | return 0; |
141 | } | 143 | } |
142 | 144 | ||
diff --git a/drivers/ata/sata_uli.c b/drivers/ata/sata_uli.c index db529b849948..019575bb3e08 100644 --- a/drivers/ata/sata_uli.c +++ b/drivers/ata/sata_uli.c | |||
@@ -57,8 +57,8 @@ struct uli_priv { | |||
57 | }; | 57 | }; |
58 | 58 | ||
59 | static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | 59 | static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
60 | static int uli_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | 60 | static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); |
61 | static int uli_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | 61 | static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); |
62 | 62 | ||
63 | static const struct pci_device_id uli_pci_tbl[] = { | 63 | static const struct pci_device_id uli_pci_tbl[] = { |
64 | { PCI_VDEVICE(AL, 0x5289), uli_5289 }, | 64 | { PCI_VDEVICE(AL, 0x5289), uli_5289 }, |
@@ -107,39 +107,39 @@ static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg) | |||
107 | return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg); | 107 | return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg); |
108 | } | 108 | } |
109 | 109 | ||
110 | static u32 uli_scr_cfg_read(struct ata_port *ap, unsigned int sc_reg) | 110 | static u32 uli_scr_cfg_read(struct ata_link *link, unsigned int sc_reg) |
111 | { | 111 | { |
112 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 112 | struct pci_dev *pdev = to_pci_dev(link->ap->host->dev); |
113 | unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); | 113 | unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg); |
114 | u32 val; | 114 | u32 val; |
115 | 115 | ||
116 | pci_read_config_dword(pdev, cfg_addr, &val); | 116 | pci_read_config_dword(pdev, cfg_addr, &val); |
117 | return val; | 117 | return val; |
118 | } | 118 | } |
119 | 119 | ||
120 | static void uli_scr_cfg_write(struct ata_port *ap, unsigned int scr, u32 val) | 120 | static void uli_scr_cfg_write(struct ata_link *link, unsigned int scr, u32 val) |
121 | { | 121 | { |
122 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | 122 | struct pci_dev *pdev = to_pci_dev(link->ap->host->dev); |
123 | unsigned int cfg_addr = get_scr_cfg_addr(ap, scr); | 123 | unsigned int cfg_addr = get_scr_cfg_addr(link->ap, scr); |
124 | 124 | ||
125 | pci_write_config_dword(pdev, cfg_addr, val); | 125 | pci_write_config_dword(pdev, cfg_addr, val); |
126 | } | 126 | } |
127 | 127 | ||
128 | static int uli_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | 128 | static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val) |
129 | { | 129 | { |
130 | if (sc_reg > SCR_CONTROL) | 130 | if (sc_reg > SCR_CONTROL) |
131 | return -EINVAL; | 131 | return -EINVAL; |
132 | 132 | ||
133 | *val = uli_scr_cfg_read(ap, sc_reg); | 133 | *val = uli_scr_cfg_read(link, sc_reg); |
134 | return 0; | 134 | return 0; |
135 | } | 135 | } |
136 | 136 | ||
137 | static int uli_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | 137 | static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) |
138 | { | 138 | { |
139 | if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0 | 139 | if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0 |
140 | return -EINVAL; | 140 | return -EINVAL; |
141 | 141 | ||
142 | uli_scr_cfg_write(ap, sc_reg, val); | 142 | uli_scr_cfg_write(link, sc_reg, val); |
143 | return 0; | 143 | return 0; |
144 | } | 144 | } |
145 | 145 | ||
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c index 96deeb354e16..1cfa74535d91 100644 --- a/drivers/ata/sata_via.c +++ b/drivers/ata/sata_via.c | |||
@@ -68,8 +68,8 @@ enum { | |||
68 | }; | 68 | }; |
69 | 69 | ||
70 | static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); | 70 | static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
71 | static int svia_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | 71 | static int svia_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); |
72 | static int svia_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | 72 | static int svia_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); |
73 | static void svia_noop_freeze(struct ata_port *ap); | 73 | static void svia_noop_freeze(struct ata_port *ap); |
74 | static int vt6420_prereset(struct ata_link *link, unsigned long deadline); | 74 | static int vt6420_prereset(struct ata_link *link, unsigned long deadline); |
75 | static int vt6421_pata_cable_detect(struct ata_port *ap); | 75 | static int vt6421_pata_cable_detect(struct ata_port *ap); |
@@ -152,19 +152,19 @@ MODULE_LICENSE("GPL"); | |||
152 | MODULE_DEVICE_TABLE(pci, svia_pci_tbl); | 152 | MODULE_DEVICE_TABLE(pci, svia_pci_tbl); |
153 | MODULE_VERSION(DRV_VERSION); | 153 | MODULE_VERSION(DRV_VERSION); |
154 | 154 | ||
155 | static int svia_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | 155 | static int svia_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val) |
156 | { | 156 | { |
157 | if (sc_reg > SCR_CONTROL) | 157 | if (sc_reg > SCR_CONTROL) |
158 | return -EINVAL; | 158 | return -EINVAL; |
159 | *val = ioread32(ap->ioaddr.scr_addr + (4 * sc_reg)); | 159 | *val = ioread32(link->ap->ioaddr.scr_addr + (4 * sc_reg)); |
160 | return 0; | 160 | return 0; |
161 | } | 161 | } |
162 | 162 | ||
163 | static int svia_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | 163 | static int svia_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val) |
164 | { | 164 | { |
165 | if (sc_reg > SCR_CONTROL) | 165 | if (sc_reg > SCR_CONTROL) |
166 | return -EINVAL; | 166 | return -EINVAL; |
167 | iowrite32(val, ap->ioaddr.scr_addr + (4 * sc_reg)); | 167 | iowrite32(val, link->ap->ioaddr.scr_addr + (4 * sc_reg)); |
168 | return 0; | 168 | return 0; |
169 | } | 169 | } |
170 | 170 | ||
@@ -210,20 +210,20 @@ static int vt6420_prereset(struct ata_link *link, unsigned long deadline) | |||
210 | goto skip_scr; | 210 | goto skip_scr; |
211 | 211 | ||
212 | /* Resume phy. This is the old SATA resume sequence */ | 212 | /* Resume phy. This is the old SATA resume sequence */ |
213 | svia_scr_write(ap, SCR_CONTROL, 0x300); | 213 | svia_scr_write(link, SCR_CONTROL, 0x300); |
214 | svia_scr_read(ap, SCR_CONTROL, &scontrol); /* flush */ | 214 | svia_scr_read(link, SCR_CONTROL, &scontrol); /* flush */ |
215 | 215 | ||
216 | /* wait for phy to become ready, if necessary */ | 216 | /* wait for phy to become ready, if necessary */ |
217 | do { | 217 | do { |
218 | msleep(200); | 218 | msleep(200); |
219 | svia_scr_read(ap, SCR_STATUS, &sstatus); | 219 | svia_scr_read(link, SCR_STATUS, &sstatus); |
220 | if ((sstatus & 0xf) != 1) | 220 | if ((sstatus & 0xf) != 1) |
221 | break; | 221 | break; |
222 | } while (time_before(jiffies, timeout)); | 222 | } while (time_before(jiffies, timeout)); |
223 | 223 | ||
224 | /* open code sata_print_link_status() */ | 224 | /* open code sata_print_link_status() */ |
225 | svia_scr_read(ap, SCR_STATUS, &sstatus); | 225 | svia_scr_read(link, SCR_STATUS, &sstatus); |
226 | svia_scr_read(ap, SCR_CONTROL, &scontrol); | 226 | svia_scr_read(link, SCR_CONTROL, &scontrol); |
227 | 227 | ||
228 | online = (sstatus & 0xf) == 0x3; | 228 | online = (sstatus & 0xf) == 0x3; |
229 | 229 | ||
@@ -232,7 +232,7 @@ static int vt6420_prereset(struct ata_link *link, unsigned long deadline) | |||
232 | online ? "up" : "down", sstatus, scontrol); | 232 | online ? "up" : "down", sstatus, scontrol); |
233 | 233 | ||
234 | /* SStatus is read one more time */ | 234 | /* SStatus is read one more time */ |
235 | svia_scr_read(ap, SCR_STATUS, &sstatus); | 235 | svia_scr_read(link, SCR_STATUS, &sstatus); |
236 | 236 | ||
237 | if (!online) { | 237 | if (!online) { |
238 | /* tell EH to bail */ | 238 | /* tell EH to bail */ |
diff --git a/drivers/ata/sata_vsc.c b/drivers/ata/sata_vsc.c index f3d635c0a2e9..c57cdff9e6bd 100644 --- a/drivers/ata/sata_vsc.c +++ b/drivers/ata/sata_vsc.c | |||
@@ -98,20 +98,22 @@ enum { | |||
98 | VSC_SATA_INT_PHY_CHANGE), | 98 | VSC_SATA_INT_PHY_CHANGE), |
99 | }; | 99 | }; |
100 | 100 | ||
101 | static int vsc_sata_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) | 101 | static int vsc_sata_scr_read(struct ata_link *link, |
102 | unsigned int sc_reg, u32 *val) | ||
102 | { | 103 | { |
103 | if (sc_reg > SCR_CONTROL) | 104 | if (sc_reg > SCR_CONTROL) |
104 | return -EINVAL; | 105 | return -EINVAL; |
105 | *val = readl(ap->ioaddr.scr_addr + (sc_reg * 4)); | 106 | *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4)); |
106 | return 0; | 107 | return 0; |
107 | } | 108 | } |
108 | 109 | ||
109 | 110 | ||
110 | static int vsc_sata_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) | 111 | static int vsc_sata_scr_write(struct ata_link *link, |
112 | unsigned int sc_reg, u32 val) | ||
111 | { | 113 | { |
112 | if (sc_reg > SCR_CONTROL) | 114 | if (sc_reg > SCR_CONTROL) |
113 | return -EINVAL; | 115 | return -EINVAL; |
114 | writel(val, ap->ioaddr.scr_addr + (sc_reg * 4)); | 116 | writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4)); |
115 | return 0; | 117 | return 0; |
116 | } | 118 | } |
117 | 119 | ||
diff --git a/drivers/scsi/libsas/sas_ata.c b/drivers/scsi/libsas/sas_ata.c index 48ee8c7f5bdd..e1872989710a 100644 --- a/drivers/scsi/libsas/sas_ata.c +++ b/drivers/scsi/libsas/sas_ata.c | |||
@@ -294,10 +294,10 @@ static void sas_ata_post_internal(struct ata_queued_cmd *qc) | |||
294 | } | 294 | } |
295 | } | 295 | } |
296 | 296 | ||
297 | static int sas_ata_scr_write(struct ata_port *ap, unsigned int sc_reg_in, | 297 | static int sas_ata_scr_write(struct ata_link *link, unsigned int sc_reg_in, |
298 | u32 val) | 298 | u32 val) |
299 | { | 299 | { |
300 | struct domain_device *dev = ap->private_data; | 300 | struct domain_device *dev = link->ap->private_data; |
301 | 301 | ||
302 | SAS_DPRINTK("STUB %s\n", __func__); | 302 | SAS_DPRINTK("STUB %s\n", __func__); |
303 | switch (sc_reg_in) { | 303 | switch (sc_reg_in) { |
@@ -319,10 +319,10 @@ static int sas_ata_scr_write(struct ata_port *ap, unsigned int sc_reg_in, | |||
319 | return 0; | 319 | return 0; |
320 | } | 320 | } |
321 | 321 | ||
322 | static int sas_ata_scr_read(struct ata_port *ap, unsigned int sc_reg_in, | 322 | static int sas_ata_scr_read(struct ata_link *link, unsigned int sc_reg_in, |
323 | u32 *val) | 323 | u32 *val) |
324 | { | 324 | { |
325 | struct domain_device *dev = ap->private_data; | 325 | struct domain_device *dev = link->ap->private_data; |
326 | 326 | ||
327 | SAS_DPRINTK("STUB %s\n", __func__); | 327 | SAS_DPRINTK("STUB %s\n", __func__); |
328 | switch (sc_reg_in) { | 328 | switch (sc_reg_in) { |