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authorTomoya MORINAGA <tomoya-linux@dsn.lapis-semi.com>2011-10-27 20:35:21 -0400
committerGrant Likely <grant.likely@secretlab.ca>2011-10-29 11:02:31 -0400
commit92b3a5c1bc3c7da1ae4675d014124f4a97ddb632 (patch)
treea5940f6b0ae8c1b08dc842e27c17f1bf68c6c500 /drivers
parent39f1b56593293a3d1d3b49b97a59337a19fef053 (diff)
spi-topcliff-pch: Support new device LAPIS Semiconductor ML7831 IOH
ML7831 is companion chip for Intel Atom E6xx series. Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.lapis-semi.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/spi/Kconfig6
-rw-r--r--drivers/spi/spi-topcliff-pch.c5
2 files changed, 7 insertions, 4 deletions
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 52e2900d9d8e..b02920a6e974 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -346,14 +346,14 @@ config SPI_TI_SSP
346 serial port. 346 serial port.
347 347
348config SPI_TOPCLIFF_PCH 348config SPI_TOPCLIFF_PCH
349 tristate "Intel EG20T PCH/OKI SEMICONDUCTOR ML7213 IOH SPI controller" 349 tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) SPI"
350 depends on PCI 350 depends on PCI
351 help 351 help
352 SPI driver for the Topcliff PCH (Platform Controller Hub) SPI bus 352 SPI driver for the Topcliff PCH (Platform Controller Hub) SPI bus
353 used in some x86 embedded processors. 353 used in some x86 embedded processors.
354 354
355 This driver also supports the ML7213, a companion chip for the 355 This driver also supports the ML7213/ML7223/ML7831, a companion chip
356 Atom E6xx series and compatible with the Intel EG20T PCH. 356 for the Atom E6xx series and compatible with the Intel EG20T PCH.
357 357
358config SPI_TXX9 358config SPI_TXX9
359 tristate "Toshiba TXx9 SPI controller" 359 tristate "Toshiba TXx9 SPI controller"
diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c
index 6a80749391db..2b1e96643d71 100644
--- a/drivers/spi/spi-topcliff-pch.c
+++ b/drivers/spi/spi-topcliff-pch.c
@@ -95,16 +95,18 @@
95#define PCH_CLOCK_HZ 50000000 95#define PCH_CLOCK_HZ 50000000
96#define PCH_MAX_SPBR 1023 96#define PCH_MAX_SPBR 1023
97 97
98/* Definition for ML7213 by OKI SEMICONDUCTOR */ 98/* Definition for ML7213/ML7831 by OKI SEMICONDUCTOR */
99#define PCI_VENDOR_ID_ROHM 0x10DB 99#define PCI_VENDOR_ID_ROHM 0x10DB
100#define PCI_DEVICE_ID_ML7213_SPI 0x802c 100#define PCI_DEVICE_ID_ML7213_SPI 0x802c
101#define PCI_DEVICE_ID_ML7223_SPI 0x800F 101#define PCI_DEVICE_ID_ML7223_SPI 0x800F
102#define PCI_DEVICE_ID_ML7831_SPI 0x8816
102 103
103/* 104/*
104 * Set the number of SPI instance max 105 * Set the number of SPI instance max
105 * Intel EG20T PCH : 1ch 106 * Intel EG20T PCH : 1ch
106 * OKI SEMICONDUCTOR ML7213 IOH : 2ch 107 * OKI SEMICONDUCTOR ML7213 IOH : 2ch
107 * OKI SEMICONDUCTOR ML7223 IOH : 1ch 108 * OKI SEMICONDUCTOR ML7223 IOH : 1ch
109 * OKI SEMICONDUCTOR ML7831 IOH : 1ch
108*/ 110*/
109#define PCH_SPI_MAX_DEV 2 111#define PCH_SPI_MAX_DEV 2
110 112
@@ -218,6 +220,7 @@ static struct pci_device_id pch_spi_pcidev_id[] = {
218 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_GE_SPI), 1, }, 220 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_GE_SPI), 1, },
219 { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_SPI), 2, }, 221 { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_SPI), 2, },
220 { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7223_SPI), 1, }, 222 { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7223_SPI), 1, },
223 { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7831_SPI), 1, },
221 { } 224 { }
222}; 225};
223 226