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authorYaniv Rosner <yanivr@broadcom.com>2011-10-27 01:09:45 -0400
committerDavid S. Miller <davem@davemloft.net>2011-10-27 16:14:14 -0400
commit26ffaf36c8e0a0eefb6ff031d6166b5ee82eb3de (patch)
tree17bf603348763fbc10b6e335bcbc7cacc7d9e01c /drivers
parentb903d324bee2627036d024dceed73b3c96558795 (diff)
bnx2x: Fix LED blink rate for 578xx
Adjust blink rate on 578xx to fit its clock rate. Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
index 818723c9e678..edc9259f4be5 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
@@ -45,6 +45,9 @@
45#define MCPR_IMC_COMMAND_READ_OP 1 45#define MCPR_IMC_COMMAND_READ_OP 1
46#define MCPR_IMC_COMMAND_WRITE_OP 2 46#define MCPR_IMC_COMMAND_WRITE_OP 2
47 47
48/* LED Blink rate that will achieve ~15.9Hz */
49#define LED_BLINK_RATE_VAL_E3 354
50#define LED_BLINK_RATE_VAL_E1X_E2 480
48/***********************************************************/ 51/***********************************************************/
49/* Shortcut definitions */ 52/* Shortcut definitions */
50/***********************************************************/ 53/***********************************************************/
@@ -5954,8 +5957,12 @@ int bnx2x_set_led(struct link_params *params,
5954 5957
5955 REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0 + port*4, 0); 5958 REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0 + port*4, 0);
5956 /* Set blinking rate to ~15.9Hz */ 5959 /* Set blinking rate to ~15.9Hz */
5957 REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_P0 + port*4, 5960 if (CHIP_IS_E3(bp))
5958 LED_BLINK_RATE_VAL); 5961 REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_P0 + port*4,
5962 LED_BLINK_RATE_VAL_E3);
5963 else
5964 REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_P0 + port*4,
5965 LED_BLINK_RATE_VAL_E1X_E2);
5959 REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_ENA_P0 + 5966 REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_ENA_P0 +
5960 port*4, 1); 5967 port*4, 1);
5961 tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED); 5968 tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED);