EDAC, MCE, AMD: Print valid addr when reporting an error

The MCi_STATUS bank has a AddrV bit which, when set, denotes that the
corresponding MCi_ADDR MSR contains a valid address belonging to the
MCE currently being reported. Dump it since it is definitely relevant
information.

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>

1 files changed, 3 insertions, 1 deletions

diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
index 5bfe6997d9ff..a6d25dac8a88 100644
--- a/drivers/edac/mce_amd.c
+++ b/drivers/edac/mce_amd.c
@@ -769,7 +769,7 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
         if (amd_filter_mce(m))
                 return NOTIFY_STOP;
 
-        pr_emerg(HW_ERR "CPU:%d MC%d_STATUS[%s|%s|%s|%s|%s",
+        pr_emerg(HW_ERR "CPU:%d\tMC%d_STATUS[%s|%s|%s|%s|%s",
                 m->extcpu, m->bank,
                 ((m->status & MCI_STATUS_OVER)  ? "Over"  : "-"),
                 ((m->status & MCI_STATUS_UC)    ? "UE"    : "CE"),
@@ -789,6 +789,8 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
 
         pr_cont("]: 0x%016llx\n", m->status);
 
+        if (m->status & MCI_STATUS_ADDRV)
+                pr_emerg(HW_ERR "\tMC%d_ADDR: 0x%016llx\n", m->bank, m->addr);
 
         switch (m->bank) {
         case 0: