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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-11 22:20:44 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-10-11 22:20:44 -0400
commit19f71153b9be219756c6b2757921433a69b7975c (patch)
treecc2c5c290a88d61df16848f733aed8708e82c119 /drivers
parente6005a85acb9609326512ecc784859831cfb24a3 (diff)
parent8f4dd2e42637fd61a6366d2cace69091926eaa15 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6: (24 commits) ide: use only ->set_pio_mode method for programming PIO modes (take 2) sis5513: don't change UDMA settings when programming PIO it8213/piix/slc90e66: don't change DMA settings when programming PIO alim15x3: PIO mode setup fixes siimage: fix ->set_pio_mode method to select PIO data transfer cs5520: don't enable VDMA in ->speedproc sc1200: remove redundant warning message from sc1200_tune_chipset() ide-pmac: PIO mode setup fixes (take 3) icside: fix ->speedproc to return on unsupported modes (take 5) sgiioc4: use ide_tune_dma() amd74xx/via82cxxx: use ide_tune_dma() ide: add ide_set{_max}_pio() (take 4) ide: Kconfig face-lift ide: move ide_rate_filter() calls to the upper layer (take 2) sis5513: add ->udma_filter method for chipset_family >= ATA_133 ide: mode limiting fixes for user requested speed changes ide: add missing ide_rate_filter() calls to ->speedproc()-s ide: call udma_filter() before resorting to the UltraDMA mask ide: make jmicron match vendor and device class pdc202xx_new: switch to using pci_get_slot() (take 2) ...
Diffstat (limited to 'drivers')
-rw-r--r--drivers/acpi/bus.c4
-rw-r--r--drivers/ide/Kconfig110
-rw-r--r--drivers/ide/arm/icside.c29
-rw-r--r--drivers/ide/cris/ide-cris.c13
-rw-r--r--drivers/ide/ide-acpi.c42
-rw-r--r--drivers/ide/ide-dma.c48
-rw-r--r--drivers/ide/ide-io.c39
-rw-r--r--drivers/ide/ide-iops.c6
-rw-r--r--drivers/ide/ide-lib.c85
-rw-r--r--drivers/ide/ide-probe.c6
-rw-r--r--drivers/ide/ide.c20
-rw-r--r--drivers/ide/legacy/Makefile2
-rw-r--r--drivers/ide/legacy/ali14xx.c10
-rw-r--r--drivers/ide/legacy/dtc2278.c6
-rw-r--r--drivers/ide/legacy/ht6560b.c11
-rw-r--r--drivers/ide/legacy/ide_platform.c182
-rw-r--r--drivers/ide/legacy/qd65xx.c60
-rw-r--r--drivers/ide/legacy/umc8672.c7
-rw-r--r--drivers/ide/mips/au1xxx-ide.c17
-rw-r--r--drivers/ide/pci/aec62xx.c13
-rw-r--r--drivers/ide/pci/alim15x3.c47
-rw-r--r--drivers/ide/pci/amd74xx.c29
-rw-r--r--drivers/ide/pci/atiixp.c22
-rw-r--r--drivers/ide/pci/cmd640.c35
-rw-r--r--drivers/ide/pci/cmd64x.c49
-rw-r--r--drivers/ide/pci/cs5520.c57
-rw-r--r--drivers/ide/pci/cs5530.c26
-rw-r--r--drivers/ide/pci/cs5535.c19
-rw-r--r--drivers/ide/pci/cy82c693.c20
-rw-r--r--drivers/ide/pci/hpt34x.c10
-rw-r--r--drivers/ide/pci/hpt366.c44
-rw-r--r--drivers/ide/pci/it8213.c28
-rw-r--r--drivers/ide/pci/it821x.c26
-rw-r--r--drivers/ide/pci/jmicron.c81
-rw-r--r--drivers/ide/pci/opti621.c19
-rw-r--r--drivers/ide/pci/pdc202xx_new.c72
-rw-r--r--drivers/ide/pci/pdc202xx_old.c17
-rw-r--r--drivers/ide/pci/piix.c40
-rw-r--r--drivers/ide/pci/sc1200.c32
-rw-r--r--drivers/ide/pci/scc_pata.c19
-rw-r--r--drivers/ide/pci/serverworks.c15
-rw-r--r--drivers/ide/pci/sgiioc4.c88
-rw-r--r--drivers/ide/pci/siimage.c43
-rw-r--r--drivers/ide/pci/sis5513.c51
-rw-r--r--drivers/ide/pci/sl82c105.c27
-rw-r--r--drivers/ide/pci/slc90e66.c22
-rw-r--r--drivers/ide/pci/tc86c001.c11
-rw-r--r--drivers/ide/pci/triflex.c12
-rw-r--r--drivers/ide/pci/via82cxxx.c32
-rw-r--r--drivers/ide/ppc/mpc8xx.c21
-rw-r--r--drivers/ide/ppc/pmac.c40
51 files changed, 917 insertions, 847 deletions
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index 9ba778a2b484..feab124d8e05 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -262,10 +262,12 @@ int acpi_bus_set_power(acpi_handle handle, int state)
262 printk(KERN_WARNING PREFIX 262 printk(KERN_WARNING PREFIX
263 "Transitioning device [%s] to D%d\n", 263 "Transitioning device [%s] to D%d\n",
264 device->pnp.bus_id, state); 264 device->pnp.bus_id, state);
265 else 265 else {
266 device->power.state = state;
266 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 267 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
267 "Device [%s] transitioned to D%d\n", 268 "Device [%s] transitioned to D%d\n",
268 device->pnp.bus_id, state)); 269 device->pnp.bus_id, state));
270 }
269 271
270 return result; 272 return result;
271} 273}
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig
index 4200251ff635..aa0e0c9f74c5 100644
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -308,6 +308,14 @@ config IDE_GENERIC
308 help 308 help
309 If unsure, say N. 309 If unsure, say N.
310 310
311config BLK_DEV_PLATFORM
312 tristate "Platform driver for IDE interfaces"
313 help
314 This is the platform IDE driver, used mostly for Memory Mapped
315 IDE devices, like Compact Flashes running in True IDE mode.
316
317 If unsure, say N.
318
311config BLK_DEV_CMD640 319config BLK_DEV_CMD640
312 bool "CMD640 chipset bugfix/support" 320 bool "CMD640 chipset bugfix/support"
313 depends on X86 321 depends on X86
@@ -351,17 +359,16 @@ config BLK_DEV_IDEPNP
351 would like the kernel to automatically detect and activate 359 would like the kernel to automatically detect and activate
352 it, say Y here. 360 it, say Y here.
353 361
362if PCI
363
364comment "PCI IDE chipsets support"
365
354config BLK_DEV_IDEPCI 366config BLK_DEV_IDEPCI
355 bool "PCI IDE chipset support" if PCI 367 bool
356 default BLK_DEV_IDEDMA_PMAC if PPC_PMAC && BLK_DEV_IDEDMA_PMAC
357 help
358 Say Y here for PCI systems which use IDE drive(s).
359 This option helps the IDE driver to automatically detect and
360 configure all PCI-based IDE interfaces in your system.
361 368
362config IDEPCI_SHARE_IRQ 369config IDEPCI_SHARE_IRQ
363 bool "Sharing PCI IDE interrupts support" 370 bool "Sharing PCI IDE interrupts support"
364 depends on PCI && BLK_DEV_IDEPCI 371 depends on BLK_DEV_IDEPCI
365 help 372 help
366 Some ATA/IDE chipsets have hardware support which allows for 373 Some ATA/IDE chipsets have hardware support which allows for
367 sharing a single IRQ with other cards. To enable support for 374 sharing a single IRQ with other cards. To enable support for
@@ -371,11 +378,11 @@ config IDEPCI_SHARE_IRQ
371 If unsure, say N. 378 If unsure, say N.
372 379
373config IDEPCI_PCIBUS_ORDER 380config IDEPCI_PCIBUS_ORDER
374 def_bool PCI && BLK_DEV_IDE=y && BLK_DEV_IDEPCI 381 def_bool BLK_DEV_IDE=y && BLK_DEV_IDEPCI
375 382
376config BLK_DEV_OFFBOARD 383config BLK_DEV_OFFBOARD
377 bool "Boot off-board chipsets first support" 384 bool "Boot off-board chipsets first support"
378 depends on PCI && BLK_DEV_IDEPCI 385 depends on BLK_DEV_IDEPCI
379 help 386 help
380 Normally, IDE controllers built into the motherboard (on-board 387 Normally, IDE controllers built into the motherboard (on-board
381 controllers) are assigned to ide0 and ide1 while those on add-in PCI 388 controllers) are assigned to ide0 and ide1 while those on add-in PCI
@@ -398,21 +405,23 @@ config BLK_DEV_OFFBOARD
398 405
399config BLK_DEV_GENERIC 406config BLK_DEV_GENERIC
400 tristate "Generic PCI IDE Chipset Support" 407 tristate "Generic PCI IDE Chipset Support"
401 depends on BLK_DEV_IDEPCI 408 select BLK_DEV_IDEPCI
402 help 409 help
403 This option provides generic support for various PCI IDE Chipsets 410 This option provides generic support for various PCI IDE Chipsets
404 which otherwise might not be supported. 411 which otherwise might not be supported.
405 412
406config BLK_DEV_OPTI621 413config BLK_DEV_OPTI621
407 tristate "OPTi 82C621 chipset enhanced support (EXPERIMENTAL)" 414 tristate "OPTi 82C621 chipset enhanced support (EXPERIMENTAL)"
408 depends on PCI && BLK_DEV_IDEPCI && EXPERIMENTAL 415 depends on EXPERIMENTAL
416 select BLK_DEV_IDEPCI
409 help 417 help
410 This is a driver for the OPTi 82C621 EIDE controller. 418 This is a driver for the OPTi 82C621 EIDE controller.
411 Please read the comments at the top of <file:drivers/ide/pci/opti621.c>. 419 Please read the comments at the top of <file:drivers/ide/pci/opti621.c>.
412 420
413config BLK_DEV_RZ1000 421config BLK_DEV_RZ1000
414 tristate "RZ1000 chipset bugfix/support" 422 tristate "RZ1000 chipset bugfix/support"
415 depends on PCI && BLK_DEV_IDEPCI && X86 423 depends on X86
424 select BLK_DEV_IDEPCI
416 help 425 help
417 The PC-Technologies RZ1000 IDE chip is used on many common 486 and 426 The PC-Technologies RZ1000 IDE chip is used on many common 486 and
418 Pentium motherboards, usually along with the "Neptune" chipset. 427 Pentium motherboards, usually along with the "Neptune" chipset.
@@ -423,35 +432,21 @@ config BLK_DEV_RZ1000
423 things will operate 100% reliably. 432 things will operate 100% reliably.
424 433
425config BLK_DEV_IDEDMA_PCI 434config BLK_DEV_IDEDMA_PCI
426 bool "Generic PCI bus-master DMA support" 435 bool
427 depends on PCI && BLK_DEV_IDEPCI 436 select BLK_DEV_IDEPCI
428 ---help---
429 If your PCI system uses IDE drive(s) (as opposed to SCSI, say) and
430 is capable of bus-master DMA operation (most Pentium PCI systems),
431 you will want to say Y here to reduce CPU overhead. You can then use
432 the "hdparm" utility to enable DMA for drives for which it was not
433 enabled automatically. By default, DMA is not enabled automatically
434 for these drives, but you can change that by saying Y to the
435 following question "Use DMA by default when available". You can get
436 the latest version of the hdparm utility from
437 <ftp://ibiblio.org/pub/Linux/system/hardware/>.
438
439 Read the comments at the beginning of <file:drivers/ide/ide-dma.c>
440 and the file <file:Documentation/ide.txt> for more information.
441
442 It is safe to say Y to this question.
443
444if BLK_DEV_IDEDMA_PCI
445 437
446config BLK_DEV_IDEDMA_FORCED 438config BLK_DEV_IDEDMA_FORCED
447 bool "Force enable legacy 2.0.X HOSTS to use DMA" 439 bool "Force enable legacy 2.0.X HOSTS to use DMA"
440 depends on BLK_DEV_IDEDMA_PCI
448 help 441 help
449 This is an old piece of lost code from Linux 2.0 Kernels. 442 This is an old piece of lost code from Linux 2.0 Kernels.
450 443
451 Generally say N here. 444 Generally say N here.
452 445
446# TODO: remove it
453config IDEDMA_ONLYDISK 447config IDEDMA_ONLYDISK
454 bool "Enable DMA only for disks " 448 bool "Enable DMA only for disks "
449 depends on BLK_DEV_IDEDMA_PCI
455 help 450 help
456 This is used if you know your ATAPI Devices are going to fail DMA 451 This is used if you know your ATAPI Devices are going to fail DMA
457 Transfers. 452 Transfers.
@@ -460,6 +455,7 @@ config IDEDMA_ONLYDISK
460 455
461config BLK_DEV_AEC62XX 456config BLK_DEV_AEC62XX
462 tristate "AEC62XX chipset support" 457 tristate "AEC62XX chipset support"
458 select BLK_DEV_IDEDMA_PCI
463 help 459 help
464 This driver adds explicit support for Acard AEC62xx (Artop ATP8xx) 460 This driver adds explicit support for Acard AEC62xx (Artop ATP8xx)
465 IDE controllers. This allows the kernel to change PIO, DMA and UDMA 461 IDE controllers. This allows the kernel to change PIO, DMA and UDMA
@@ -467,6 +463,7 @@ config BLK_DEV_AEC62XX
467 463
468config BLK_DEV_ALI15X3 464config BLK_DEV_ALI15X3
469 tristate "ALI M15x3 chipset support" 465 tristate "ALI M15x3 chipset support"
466 select BLK_DEV_IDEDMA_PCI
470 help 467 help
471 This driver ensures (U)DMA support for ALI 1533, 1543 and 1543C 468 This driver ensures (U)DMA support for ALI 1533, 1543 and 1543C
472 onboard chipsets. It also tests for Simplex mode and enables 469 onboard chipsets. It also tests for Simplex mode and enables
@@ -495,6 +492,7 @@ config WDC_ALI15X3
495 492
496config BLK_DEV_AMD74XX 493config BLK_DEV_AMD74XX
497 tristate "AMD and nVidia IDE support" 494 tristate "AMD and nVidia IDE support"
495 select BLK_DEV_IDEDMA_PCI
498 help 496 help
499 This driver adds explicit support for AMD-7xx and AMD-8111 chips 497 This driver adds explicit support for AMD-7xx and AMD-8111 chips
500 and also for the nVidia nForce chip. This allows the kernel to 498 and also for the nVidia nForce chip. This allows the kernel to
@@ -504,6 +502,7 @@ config BLK_DEV_AMD74XX
504config BLK_DEV_ATIIXP 502config BLK_DEV_ATIIXP
505 tristate "ATI IXP chipset IDE support" 503 tristate "ATI IXP chipset IDE support"
506 depends on X86 504 depends on X86
505 select BLK_DEV_IDEDMA_PCI
507 help 506 help
508 This driver adds explicit support for ATI IXP chipset. 507 This driver adds explicit support for ATI IXP chipset.
509 This allows the kernel to change PIO, DMA and UDMA speeds 508 This allows the kernel to change PIO, DMA and UDMA speeds
@@ -513,18 +512,21 @@ config BLK_DEV_ATIIXP
513 512
514config BLK_DEV_CMD64X 513config BLK_DEV_CMD64X
515 tristate "CMD64{3|6|8|9} chipset support" 514 tristate "CMD64{3|6|8|9} chipset support"
515 select BLK_DEV_IDEDMA_PCI
516 help 516 help
517 Say Y here if you have an IDE controller which uses any of these 517 Say Y here if you have an IDE controller which uses any of these
518 chipsets: CMD643, CMD646, or CMD648. 518 chipsets: CMD643, CMD646, or CMD648.
519 519
520config BLK_DEV_TRIFLEX 520config BLK_DEV_TRIFLEX
521 tristate "Compaq Triflex IDE support" 521 tristate "Compaq Triflex IDE support"
522 select BLK_DEV_IDEDMA_PCI
522 help 523 help
523 Say Y here if you have a Compaq Triflex IDE controller, such 524 Say Y here if you have a Compaq Triflex IDE controller, such
524 as those commonly found on Compaq Pentium-Pro systems 525 as those commonly found on Compaq Pentium-Pro systems
525 526
526config BLK_DEV_CY82C693 527config BLK_DEV_CY82C693
527 tristate "CY82C693 chipset support" 528 tristate "CY82C693 chipset support"
529 select BLK_DEV_IDEDMA_PCI
528 help 530 help
529 This driver adds detection and support for the CY82C693 chipset 531 This driver adds detection and support for the CY82C693 chipset
530 used on Digital's PC-Alpha 164SX boards. 532 used on Digital's PC-Alpha 164SX boards.
@@ -535,6 +537,7 @@ config BLK_DEV_CY82C693
535config BLK_DEV_CS5520 537config BLK_DEV_CS5520
536 tristate "Cyrix CS5510/20 MediaGX chipset support (VERY EXPERIMENTAL)" 538 tristate "Cyrix CS5510/20 MediaGX chipset support (VERY EXPERIMENTAL)"
537 depends on EXPERIMENTAL 539 depends on EXPERIMENTAL
540 select BLK_DEV_IDEDMA_PCI
538 help 541 help
539 Include support for PIO tuning and virtual DMA on the Cyrix MediaGX 542 Include support for PIO tuning and virtual DMA on the Cyrix MediaGX
540 5510/5520 chipset. This will automatically be detected and 543 5510/5520 chipset. This will automatically be detected and
@@ -544,6 +547,7 @@ config BLK_DEV_CS5520
544 547
545config BLK_DEV_CS5530 548config BLK_DEV_CS5530
546 tristate "Cyrix/National Semiconductor CS5530 MediaGX chipset support" 549 tristate "Cyrix/National Semiconductor CS5530 MediaGX chipset support"
550 select BLK_DEV_IDEDMA_PCI
547 help 551 help
548 Include support for UDMA on the Cyrix MediaGX 5530 chipset. This 552 Include support for UDMA on the Cyrix MediaGX 5530 chipset. This
549 will automatically be detected and configured if found. 553 will automatically be detected and configured if found.
@@ -553,6 +557,7 @@ config BLK_DEV_CS5530
553config BLK_DEV_CS5535 557config BLK_DEV_CS5535
554 tristate "AMD CS5535 chipset support" 558 tristate "AMD CS5535 chipset support"
555 depends on X86 && !X86_64 559 depends on X86 && !X86_64
560 select BLK_DEV_IDEDMA_PCI
556 help 561 help
557 Include support for UDMA on the NSC/AMD CS5535 companion chipset. 562 Include support for UDMA on the NSC/AMD CS5535 companion chipset.
558 This will automatically be detected and configured if found. 563 This will automatically be detected and configured if found.
@@ -561,6 +566,7 @@ config BLK_DEV_CS5535
561 566
562config BLK_DEV_HPT34X 567config BLK_DEV_HPT34X
563 tristate "HPT34X chipset support" 568 tristate "HPT34X chipset support"
569 select BLK_DEV_IDEDMA_PCI
564 help 570 help
565 This driver adds up to 4 more EIDE devices sharing a single 571 This driver adds up to 4 more EIDE devices sharing a single
566 interrupt. The HPT343 chipset in its current form is a non-bootable 572 interrupt. The HPT343 chipset in its current form is a non-bootable
@@ -581,7 +587,8 @@ config HPT34X_AUTODMA
581 587
582config BLK_DEV_HPT366 588config BLK_DEV_HPT366
583 tristate "HPT36X/37X chipset support" 589 tristate "HPT36X/37X chipset support"
584 ---help--- 590 select BLK_DEV_IDEDMA_PCI
591 help
585 HPT366 is an Ultra DMA chipset for ATA-66. 592 HPT366 is an Ultra DMA chipset for ATA-66.
586 HPT368 is an Ultra DMA chipset for ATA-66 RAID Based. 593 HPT368 is an Ultra DMA chipset for ATA-66 RAID Based.
587 HPT370 is an Ultra DMA chipset for ATA-100. 594 HPT370 is an Ultra DMA chipset for ATA-100.
@@ -605,18 +612,21 @@ config BLK_DEV_HPT366
605 612
606config BLK_DEV_JMICRON 613config BLK_DEV_JMICRON
607 tristate "JMicron JMB36x support" 614 tristate "JMicron JMB36x support"
615 select BLK_DEV_IDEDMA_PCI
608 help 616 help
609 Basic support for the JMicron ATA controllers. For full support 617 Basic support for the JMicron ATA controllers. For full support
610 use the libata drivers. 618 use the libata drivers.
611 619
612config BLK_DEV_SC1200 620config BLK_DEV_SC1200
613 tristate "National SCx200 chipset support" 621 tristate "National SCx200 chipset support"
622 select BLK_DEV_IDEDMA_PCI
614 help 623 help
615 This driver adds support for the built in IDE on the National 624 This driver adds support for the built in IDE on the National
616 SCx200 series of embedded x86 "Geode" systems 625 SCx200 series of embedded x86 "Geode" systems
617 626
618config BLK_DEV_PIIX 627config BLK_DEV_PIIX
619 tristate "Intel PIIXn chipsets support" 628 tristate "Intel PIIXn chipsets support"
629 select BLK_DEV_IDEDMA_PCI
620 help 630 help
621 This driver adds explicit support for Intel PIIX and ICH chips 631 This driver adds explicit support for Intel PIIX and ICH chips
622 and also for the Efar Victory66 (slc90e66) chip. This allows 632 and also for the Efar Victory66 (slc90e66) chip. This allows
@@ -625,17 +635,20 @@ config BLK_DEV_PIIX
625 635
626config BLK_DEV_IT8213 636config BLK_DEV_IT8213
627 tristate "IT8213 IDE support" 637 tristate "IT8213 IDE support"
638 select BLK_DEV_IDEDMA_PCI
628 help 639 help
629 This driver adds support for the ITE 8213 IDE controller. 640 This driver adds support for the ITE 8213 IDE controller.
630 641
631config BLK_DEV_IT821X 642config BLK_DEV_IT821X
632 tristate "IT821X IDE support" 643 tristate "IT821X IDE support"
644 select BLK_DEV_IDEDMA_PCI
633 help 645 help
634 This driver adds support for the ITE 8211 IDE controller and the 646 This driver adds support for the ITE 8211 IDE controller and the
635 IT 8212 IDE RAID controller in both RAID and pass-through mode. 647 IT 8212 IDE RAID controller in both RAID and pass-through mode.
636 648
637config BLK_DEV_NS87415 649config BLK_DEV_NS87415
638 tristate "NS87415 chipset support" 650 tristate "NS87415 chipset support"
651 select BLK_DEV_IDEDMA_PCI
639 help 652 help
640 This driver adds detection and support for the NS87415 chip 653 This driver adds detection and support for the NS87415 chip
641 (used mainly on SPARC64 and PA-RISC machines). 654 (used mainly on SPARC64 and PA-RISC machines).
@@ -644,6 +657,7 @@ config BLK_DEV_NS87415
644 657
645config BLK_DEV_PDC202XX_OLD 658config BLK_DEV_PDC202XX_OLD
646 tristate "PROMISE PDC202{46|62|65|67} support" 659 tristate "PROMISE PDC202{46|62|65|67} support"
660 select BLK_DEV_IDEDMA_PCI
647 help 661 help
648 Promise Ultra33 or PDC20246 662 Promise Ultra33 or PDC20246
649 Promise Ultra66 or PDC20262 663 Promise Ultra66 or PDC20262
@@ -685,9 +699,11 @@ config PDC202XX_BURST
685 699
686config BLK_DEV_PDC202XX_NEW 700config BLK_DEV_PDC202XX_NEW
687 tristate "PROMISE PDC202{68|69|70|71|75|76|77} support" 701 tristate "PROMISE PDC202{68|69|70|71|75|76|77} support"
702 select BLK_DEV_IDEDMA_PCI
688 703
689config BLK_DEV_SVWKS 704config BLK_DEV_SVWKS
690 tristate "ServerWorks OSB4/CSB5/CSB6 chipsets support" 705 tristate "ServerWorks OSB4/CSB5/CSB6 chipsets support"
706 select BLK_DEV_IDEDMA_PCI
691 help 707 help
692 This driver adds PIO/(U)DMA support for the ServerWorks OSB4/CSB5 708 This driver adds PIO/(U)DMA support for the ServerWorks OSB4/CSB5
693 chipsets. 709 chipsets.
@@ -696,6 +712,7 @@ config BLK_DEV_SGIIOC4
696 tristate "Silicon Graphics IOC4 chipset ATA/ATAPI support" 712 tristate "Silicon Graphics IOC4 chipset ATA/ATAPI support"
697 depends on (IA64_SGI_SN2 || IA64_GENERIC) && SGI_IOC4 713 depends on (IA64_SGI_SN2 || IA64_GENERIC) && SGI_IOC4
698 select IDEPCI_SHARE_IRQ 714 select IDEPCI_SHARE_IRQ
715 select BLK_DEV_IDEDMA_PCI
699 help 716 help
700 This driver adds PIO & MultiMode DMA-2 support for the SGI IOC4 717 This driver adds PIO & MultiMode DMA-2 support for the SGI IOC4
701 chipset, which has one channel and can support two devices. 718 chipset, which has one channel and can support two devices.
@@ -703,6 +720,7 @@ config BLK_DEV_SGIIOC4
703 720
704config BLK_DEV_SIIMAGE 721config BLK_DEV_SIIMAGE
705 tristate "Silicon Image chipset support" 722 tristate "Silicon Image chipset support"
723 select BLK_DEV_IDEDMA_PCI
706 help 724 help
707 This driver adds PIO/(U)DMA support for the SI CMD680 and SII 725 This driver adds PIO/(U)DMA support for the SI CMD680 and SII
708 3112 (Serial ATA) chips. 726 3112 (Serial ATA) chips.
@@ -710,7 +728,8 @@ config BLK_DEV_SIIMAGE
710config BLK_DEV_SIS5513 728config BLK_DEV_SIS5513
711 tristate "SiS5513 chipset support" 729 tristate "SiS5513 chipset support"
712 depends on X86 730 depends on X86
713 ---help--- 731 select BLK_DEV_IDEDMA_PCI
732 help
714 This driver ensures (U)DMA support for SIS5513 chipset family based 733 This driver ensures (U)DMA support for SIS5513 chipset family based
715 mainboards. 734 mainboards.
716 735
@@ -729,6 +748,7 @@ config BLK_DEV_SIS5513
729config BLK_DEV_SL82C105 748config BLK_DEV_SL82C105
730 tristate "Winbond SL82c105 support" 749 tristate "Winbond SL82c105 support"
731 depends on (PPC || ARM) 750 depends on (PPC || ARM)
751 select BLK_DEV_IDEDMA_PCI
732 help 752 help
733 If you have a Winbond SL82c105 IDE controller, say Y here to enable 753 If you have a Winbond SL82c105 IDE controller, say Y here to enable
734 special configuration for this chip. This is common on various CHRP 754 special configuration for this chip. This is common on various CHRP
@@ -736,6 +756,7 @@ config BLK_DEV_SL82C105
736 756
737config BLK_DEV_SLC90E66 757config BLK_DEV_SLC90E66
738 tristate "SLC90E66 chipset support" 758 tristate "SLC90E66 chipset support"
759 select BLK_DEV_IDEDMA_PCI
739 help 760 help
740 This driver ensures (U)DMA support for Victory66 SouthBridges for 761 This driver ensures (U)DMA support for Victory66 SouthBridges for
741 SMsC with Intel NorthBridges. This is an Ultra66 based chipset. 762 SMsC with Intel NorthBridges. This is an Ultra66 based chipset.
@@ -751,6 +772,7 @@ config BLK_DEV_SLC90E66
751 772
752config BLK_DEV_TRM290 773config BLK_DEV_TRM290
753 tristate "Tekram TRM290 chipset support" 774 tristate "Tekram TRM290 chipset support"
775 select BLK_DEV_IDEDMA_PCI
754 help 776 help
755 This driver adds support for bus master DMA transfers 777 This driver adds support for bus master DMA transfers
756 using the Tekram TRM290 PCI IDE chip. Volunteers are 778 using the Tekram TRM290 PCI IDE chip. Volunteers are
@@ -759,6 +781,7 @@ config BLK_DEV_TRM290
759 781
760config BLK_DEV_VIA82CXXX 782config BLK_DEV_VIA82CXXX
761 tristate "VIA82CXXX chipset support" 783 tristate "VIA82CXXX chipset support"
784 select BLK_DEV_IDEDMA_PCI
762 help 785 help
763 This driver adds explicit support for VIA BusMastering IDE chips. 786 This driver adds explicit support for VIA BusMastering IDE chips.
764 This allows the kernel to change PIO, DMA and UDMA speeds and to 787 This allows the kernel to change PIO, DMA and UDMA speeds and to
@@ -766,12 +789,14 @@ config BLK_DEV_VIA82CXXX
766 789
767config BLK_DEV_TC86C001 790config BLK_DEV_TC86C001
768 tristate "Toshiba TC86C001 support" 791 tristate "Toshiba TC86C001 support"
792 select BLK_DEV_IDEDMA_PCI
769 help 793 help
770 This driver adds support for Toshiba TC86C001 GOKU-S chip. 794 This driver adds support for Toshiba TC86C001 GOKU-S chip.
771 795
772config BLK_DEV_CELLEB 796config BLK_DEV_CELLEB
773 tristate "Toshiba's Cell Reference Set IDE support" 797 tristate "Toshiba's Cell Reference Set IDE support"
774 depends on PPC_CELLEB 798 depends on PPC_CELLEB
799 select BLK_DEV_IDEDMA_PCI
775 help 800 help
776 This driver provides support for the built-in IDE controller on 801 This driver provides support for the built-in IDE controller on
777 Toshiba Cell Reference Board. 802 Toshiba Cell Reference Board.
@@ -985,24 +1010,9 @@ config IDE_EXT_DIRECT
985endchoice 1010endchoice
986 1011
987# no isa -> no vlb 1012# no isa -> no vlb
988config IDE_CHIPSETS 1013if ISA
989 bool "Other IDE chipset support"
990 depends on ISA
991 ---help---
992 Say Y here if you want to include enhanced support for various IDE
993 interface chipsets used on motherboards and add-on cards. You can
994 then pick your particular IDE chip from among the following options.
995 This enhanced support may be necessary for Linux to be able to
996 access the 3rd/4th drives in some systems. It may also enable
997 setting of higher speed I/O rates to improve system performance with
998 these chipsets. Most of these also require special kernel boot
999 parameters to actually turn on the support at runtime; you can find
1000 a list of these in the file <file:Documentation/ide.txt>.
1001
1002 People with SCSI-only systems can say N here.
1003
1004if IDE_CHIPSETS
1005 1014
1015comment "Other IDE chipsets support"
1006comment "Note: most of these also require special kernel boot parameters" 1016comment "Note: most of these also require special kernel boot parameters"
1007 1017
1008config BLK_DEV_4DRIVES 1018config BLK_DEV_4DRIVES
diff --git a/drivers/ide/arm/icside.c b/drivers/ide/arm/icside.c
index 8a9b98fcb66d..7912a471f10d 100644
--- a/drivers/ide/arm/icside.c
+++ b/drivers/ide/arm/icside.c
@@ -248,15 +248,9 @@ static void icside_build_sglist(ide_drive_t *drive, struct request *rq)
248 * MW1 80 50 50 150 C 248 * MW1 80 50 50 150 C
249 * MW2 70 25 25 120 C 249 * MW2 70 25 25 120 C
250 */ 250 */
251static int icside_set_speed(ide_drive_t *drive, u8 xfer_mode) 251static int icside_set_speed(ide_drive_t *drive, const u8 xfer_mode)
252{ 252{
253 int on = 0, cycle_time = 0, use_dma_info = 0; 253 int cycle_time, use_dma_info = 0;
254
255 /*
256 * Limit the transfer speed to MW_DMA_2.
257 */
258 if (xfer_mode > XFER_MW_DMA_2)
259 xfer_mode = XFER_MW_DMA_2;
260 254
261 switch (xfer_mode) { 255 switch (xfer_mode) {
262 case XFER_MW_DMA_2: 256 case XFER_MW_DMA_2:
@@ -278,6 +272,8 @@ static int icside_set_speed(ide_drive_t *drive, u8 xfer_mode)
278 case XFER_SW_DMA_0: 272 case XFER_SW_DMA_0:
279 cycle_time = 480; 273 cycle_time = 480;
280 break; 274 break;
275 default:
276 return 1;
281 } 277 }
282 278
283 /* 279 /*
@@ -289,17 +285,10 @@ static int icside_set_speed(ide_drive_t *drive, u8 xfer_mode)
289 285
290 drive->drive_data = cycle_time; 286 drive->drive_data = cycle_time;
291 287
292 if (cycle_time && ide_config_drive_speed(drive, xfer_mode) == 0)
293 on = 1;
294 else
295 drive->drive_data = 480;
296
297 printk("%s: %s selected (peak %dMB/s)\n", drive->name, 288 printk("%s: %s selected (peak %dMB/s)\n", drive->name,
298 ide_xfer_verbose(xfer_mode), 2000 / drive->drive_data); 289 ide_xfer_verbose(xfer_mode), 2000 / drive->drive_data);
299 290
300 drive->current_speed = xfer_mode; 291 return ide_config_drive_speed(drive, xfer_mode);
301
302 return on;
303} 292}
304 293
305static void icside_dma_host_off(ide_drive_t *drive) 294static void icside_dma_host_off(ide_drive_t *drive)
@@ -326,8 +315,7 @@ static int icside_dma_check(ide_drive_t *drive)
326{ 315{
327 struct hd_driveid *id = drive->id; 316 struct hd_driveid *id = drive->id;
328 ide_hwif_t *hwif = HWIF(drive); 317 ide_hwif_t *hwif = HWIF(drive);
329 int xfer_mode = XFER_PIO_2; 318 int xfer_mode = 0;
330 int on;
331 319
332 if (!(id->capability & 1) || !hwif->autodma) 320 if (!(id->capability & 1) || !hwif->autodma)
333 goto out; 321 goto out;
@@ -356,9 +344,10 @@ static int icside_dma_check(ide_drive_t *drive)
356 } 344 }
357 345
358out: 346out:
359 on = icside_set_speed(drive, xfer_mode); 347 if (xfer_mode == 0)
348 return -1;
360 349
361 return on ? 0 : -1; 350 return icside_set_speed(drive, xfer_mode) ? -1 : 0;
362} 351}
363 352
364static int icside_dma_end(ide_drive_t *drive) 353static int icside_dma_end(ide_drive_t *drive)
diff --git a/drivers/ide/cris/ide-cris.c b/drivers/ide/cris/ide-cris.c
index 04636f7eaae7..4bb42b30bfc0 100644
--- a/drivers/ide/cris/ide-cris.c
+++ b/drivers/ide/cris/ide-cris.c
@@ -680,12 +680,10 @@ static void cris_dma_off(ide_drive_t *drive)
680{ 680{
681} 681}
682 682
683static void tune_cris_ide(ide_drive_t *drive, u8 pio) 683static void cris_set_pio_mode(ide_drive_t *drive, const u8 pio)
684{ 684{
685 int setup, strobe, hold; 685 int setup, strobe, hold;
686 686
687 pio = ide_get_best_pio_mode(drive, pio, 4);
688
689 switch(pio) 687 switch(pio)
690 { 688 {
691 case 0: 689 case 0:
@@ -722,15 +720,10 @@ static void tune_cris_ide(ide_drive_t *drive, u8 pio)
722 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio); 720 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
723} 721}
724 722
725static int speed_cris_ide(ide_drive_t *drive, u8 speed) 723static int speed_cris_ide(ide_drive_t *drive, const u8 speed)
726{ 724{
727 int cyc = 0, dvs = 0, strobe = 0, hold = 0; 725 int cyc = 0, dvs = 0, strobe = 0, hold = 0;
728 726
729 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
730 tune_cris_ide(drive, speed - XFER_PIO_0);
731 return ide_config_drive_speed(drive, speed);
732 }
733
734 switch(speed) 727 switch(speed)
735 { 728 {
736 case XFER_UDMA_0: 729 case XFER_UDMA_0:
@@ -797,7 +790,7 @@ init_e100_ide (void)
797 ide_register_hw(&hw, 1, &hwif); 790 ide_register_hw(&hw, 1, &hwif);
798 hwif->mmio = 1; 791 hwif->mmio = 1;
799 hwif->chipset = ide_etrax100; 792 hwif->chipset = ide_etrax100;
800 hwif->tuneproc = &tune_cris_ide; 793 hwif->set_pio_mode = &cris_set_pio_mode;
801 hwif->speedproc = &speed_cris_ide; 794 hwif->speedproc = &speed_cris_ide;
802 hwif->ata_input_data = &cris_ide_input_data; 795 hwif->ata_input_data = &cris_ide_input_data;
803 hwif->ata_output_data = &cris_ide_output_data; 796 hwif->ata_output_data = &cris_ide_output_data;
diff --git a/drivers/ide/ide-acpi.c b/drivers/ide/ide-acpi.c
index 17aea65d7dd2..6bff81a58bf3 100644
--- a/drivers/ide/ide-acpi.c
+++ b/drivers/ide/ide-acpi.c
@@ -612,6 +612,46 @@ void ide_acpi_push_timing(ide_hwif_t *hwif)
612EXPORT_SYMBOL_GPL(ide_acpi_push_timing); 612EXPORT_SYMBOL_GPL(ide_acpi_push_timing);
613 613
614/** 614/**
615 * ide_acpi_set_state - set the channel power state
616 * @hwif: target IDE interface
617 * @on: state, on/off
618 *
619 * This function executes the _PS0/_PS3 ACPI method to set the power state.
620 * ACPI spec requires _PS0 when IDE power on and _PS3 when power off
621 */
622void ide_acpi_set_state(ide_hwif_t *hwif, int on)
623{
624 int unit;
625
626 if (ide_noacpi)
627 return;
628
629 DEBPRINT("ENTER:\n");
630
631 if (!hwif->acpidata) {
632 DEBPRINT("no ACPI data for %s\n", hwif->name);
633 return;
634 }
635 /* channel first and then drives for power on and verse versa for power off */
636 if (on)
637 acpi_bus_set_power(hwif->acpidata->obj_handle, ACPI_STATE_D0);
638 for (unit = 0; unit < MAX_DRIVES; ++unit) {
639 ide_drive_t *drive = &hwif->drives[unit];
640
641 if (!drive->acpidata->obj_handle)
642 drive->acpidata->obj_handle = ide_acpi_drive_get_handle(drive);
643
644 if (drive->acpidata->obj_handle && drive->present) {
645 acpi_bus_set_power(drive->acpidata->obj_handle,
646 on? ACPI_STATE_D0: ACPI_STATE_D3);
647 }
648 }
649 if (!on)
650 acpi_bus_set_power(hwif->acpidata->obj_handle, ACPI_STATE_D3);
651}
652EXPORT_SYMBOL_GPL(ide_acpi_set_state);
653
654/**
615 * ide_acpi_init - initialize the ACPI link for an IDE interface 655 * ide_acpi_init - initialize the ACPI link for an IDE interface
616 * @hwif: target IDE interface (channel) 656 * @hwif: target IDE interface (channel)
617 * 657 *
@@ -679,6 +719,8 @@ void ide_acpi_init(ide_hwif_t *hwif)
679 return; 719 return;
680 } 720 }
681 721
722 /* ACPI _PS0 before _STM */
723 ide_acpi_set_state(hwif, 1);
682 /* 724 /*
683 * ACPI requires us to call _STM on startup 725 * ACPI requires us to call _STM on startup
684 */ 726 */
diff --git a/drivers/ide/ide-dma.c b/drivers/ide/ide-dma.c
index ff644a5e12cd..6000c08f51ba 100644
--- a/drivers/ide/ide-dma.c
+++ b/drivers/ide/ide-dma.c
@@ -653,7 +653,7 @@ static const u8 xfer_mode_bases[] = {
653 XFER_SW_DMA_0, 653 XFER_SW_DMA_0,
654}; 654};
655 655
656static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base) 656static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode)
657{ 657{
658 struct hd_driveid *id = drive->id; 658 struct hd_driveid *id = drive->id;
659 ide_hwif_t *hwif = drive->hwif; 659 ide_hwif_t *hwif = drive->hwif;
@@ -664,17 +664,28 @@ static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base)
664 if ((id->field_valid & 4) == 0) 664 if ((id->field_valid & 4) == 0)
665 break; 665 break;
666 666
667 mask = id->dma_ultra & hwif->ultra_mask;
668
669 if (hwif->udma_filter) 667 if (hwif->udma_filter)
670 mask &= hwif->udma_filter(drive); 668 mask = hwif->udma_filter(drive);
669 else
670 mask = hwif->ultra_mask;
671 mask &= id->dma_ultra;
671 672
672 if ((mask & 0x78) && (eighty_ninty_three(drive) == 0)) 673 /*
673 mask &= 0x07; 674 * avoid false cable warning from eighty_ninty_three()
675 */
676 if (req_mode > XFER_UDMA_2) {
677 if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
678 mask &= 0x07;
679 }
674 break; 680 break;
675 case XFER_MW_DMA_0: 681 case XFER_MW_DMA_0:
676 if (id->field_valid & 2) 682 if ((id->field_valid & 2) == 0)
677 mask = id->dma_mword & hwif->mwdma_mask; 683 break;
684 if (hwif->mdma_filter)
685 mask = hwif->mdma_filter(drive);
686 else
687 mask = hwif->mwdma_mask;
688 mask &= id->dma_mword;
678 break; 689 break;
679 case XFER_SW_DMA_0: 690 case XFER_SW_DMA_0:
680 if (id->field_valid & 2) { 691 if (id->field_valid & 2) {
@@ -703,15 +714,18 @@ static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base)
703} 714}
704 715
705/** 716/**
706 * ide_max_dma_mode - compute DMA speed 717 * ide_find_dma_mode - compute DMA speed
707 * @drive: IDE device 718 * @drive: IDE device
719 * @req_mode: requested mode
720 *
721 * Checks the drive/host capabilities and finds the speed to use for
722 * the DMA transfer. The speed is then limited by the requested mode.
708 * 723 *
709 * Checks the drive capabilities and returns the speed to use 724 * Returns 0 if the drive/host combination is incapable of DMA transfers
710 * for the DMA transfer. Returns 0 if the drive is incapable 725 * or if the requested mode is not a DMA mode.
711 * of DMA transfers.
712 */ 726 */
713 727
714u8 ide_max_dma_mode(ide_drive_t *drive) 728u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
715{ 729{
716 ide_hwif_t *hwif = drive->hwif; 730 ide_hwif_t *hwif = drive->hwif;
717 unsigned int mask; 731 unsigned int mask;
@@ -722,7 +736,9 @@ u8 ide_max_dma_mode(ide_drive_t *drive)
722 return 0; 736 return 0;
723 737
724 for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) { 738 for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
725 mask = ide_get_mode_mask(drive, xfer_mode_bases[i]); 739 if (req_mode < xfer_mode_bases[i])
740 continue;
741 mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode);
726 x = fls(mask) - 1; 742 x = fls(mask) - 1;
727 if (x >= 0) { 743 if (x >= 0) {
728 mode = xfer_mode_bases[i] + x; 744 mode = xfer_mode_bases[i] + x;
@@ -732,10 +748,10 @@ u8 ide_max_dma_mode(ide_drive_t *drive)
732 748
733 printk(KERN_DEBUG "%s: selected mode 0x%x\n", drive->name, mode); 749 printk(KERN_DEBUG "%s: selected mode 0x%x\n", drive->name, mode);
734 750
735 return mode; 751 return min(mode, req_mode);
736} 752}
737 753
738EXPORT_SYMBOL_GPL(ide_max_dma_mode); 754EXPORT_SYMBOL_GPL(ide_find_dma_mode);
739 755
740int ide_tune_dma(ide_drive_t *drive) 756int ide_tune_dma(ide_drive_t *drive)
741{ 757{
diff --git a/drivers/ide/ide-io.c b/drivers/ide/ide-io.c
index aa9f5f0b1e67..9560a8f4a86c 100644
--- a/drivers/ide/ide-io.c
+++ b/drivers/ide/ide-io.c
@@ -201,8 +201,7 @@ static ide_startstop_t ide_start_power_step(ide_drive_t *drive, struct request *
201 return do_rw_taskfile(drive, args); 201 return do_rw_taskfile(drive, args);
202 202
203 case idedisk_pm_restore_pio: /* Resume step 1 (restore PIO) */ 203 case idedisk_pm_restore_pio: /* Resume step 1 (restore PIO) */
204 if (drive->hwif->tuneproc != NULL) 204 ide_set_max_pio(drive);
205 drive->hwif->tuneproc(drive, 255);
206 /* 205 /*
207 * skip idedisk_pm_idle for ATAPI devices 206 * skip idedisk_pm_idle for ATAPI devices
208 */ 207 */
@@ -788,6 +787,30 @@ static ide_startstop_t ide_disk_special(ide_drive_t *drive)
788 return ide_started; 787 return ide_started;
789} 788}
790 789
790/*
791 * handle HDIO_SET_PIO_MODE ioctl abusers here, eventually it will go away
792 */
793static int set_pio_mode_abuse(ide_hwif_t *hwif, u8 req_pio)
794{
795 switch (req_pio) {
796 case 202:
797 case 201:
798 case 200:
799 case 102:
800 case 101:
801 case 100:
802 return (hwif->host_flags & IDE_HFLAG_ABUSE_DMA_MODES) ? 1 : 0;
803 case 9:
804 case 8:
805 return (hwif->host_flags & IDE_HFLAG_ABUSE_PREFETCH) ? 1 : 0;
806 case 7:
807 case 6:
808 return (hwif->host_flags & IDE_HFLAG_ABUSE_FAST_DEVSEL) ? 1 : 0;
809 default:
810 return 0;
811 }
812}
813
791/** 814/**
792 * do_special - issue some special commands 815 * do_special - issue some special commands
793 * @drive: drive the command is for 816 * @drive: drive the command is for
@@ -805,9 +828,17 @@ static ide_startstop_t do_special (ide_drive_t *drive)
805 printk("%s: do_special: 0x%02x\n", drive->name, s->all); 828 printk("%s: do_special: 0x%02x\n", drive->name, s->all);
806#endif 829#endif
807 if (s->b.set_tune) { 830 if (s->b.set_tune) {
831 ide_hwif_t *hwif = drive->hwif;
832 u8 req_pio = drive->tune_req;
833
808 s->b.set_tune = 0; 834 s->b.set_tune = 0;
809 if (HWIF(drive)->tuneproc != NULL) 835
810 HWIF(drive)->tuneproc(drive, drive->tune_req); 836 if (set_pio_mode_abuse(drive->hwif, req_pio)) {
837 if (hwif->set_pio_mode)
838 hwif->set_pio_mode(drive, req_pio);
839 } else
840 ide_set_pio(drive, req_pio);
841
811 return ide_stopped; 842 return ide_stopped;
812 } else { 843 } else {
813 if (drive->media == ide_disk) 844 if (drive->media == ide_disk)
diff --git a/drivers/ide/ide-iops.c b/drivers/ide/ide-iops.c
index 646a54e233d3..cf0678b61161 100644
--- a/drivers/ide/ide-iops.c
+++ b/drivers/ide/ide-iops.c
@@ -780,12 +780,6 @@ int ide_driveid_update (ide_drive_t *drive)
780 780
781/* 781/*
782 * Similar to ide_wait_stat(), except it never calls ide_error internally. 782 * Similar to ide_wait_stat(), except it never calls ide_error internally.
783 * This is a kludge to handle the new ide_config_drive_speed() function,
784 * and should not otherwise be used anywhere. Eventually, the tuneproc's
785 * should be updated to return ide_startstop_t, in which case we can get
786 * rid of this abomination again. :) -ml
787 *
788 * It is gone..........
789 * 783 *
790 * const char *msg == consider adding for verbose errors. 784 * const char *msg == consider adding for verbose errors.
791 */ 785 */
diff --git a/drivers/ide/ide-lib.c b/drivers/ide/ide-lib.c
index 92a6c7bcf527..d97390c0543b 100644
--- a/drivers/ide/ide-lib.c
+++ b/drivers/ide/ide-lib.c
@@ -76,41 +76,26 @@ EXPORT_SYMBOL(ide_xfer_verbose);
76 * Given the available transfer modes this function returns 76 * Given the available transfer modes this function returns
77 * the best available speed at or below the speed requested. 77 * the best available speed at or below the speed requested.
78 * 78 *
79 * FIXME: filter also PIO/SWDMA/MWDMA modes 79 * TODO: check device PIO capabilities
80 */ 80 */
81 81
82u8 ide_rate_filter(ide_drive_t *drive, u8 speed) 82static u8 ide_rate_filter(ide_drive_t *drive, u8 speed)
83{ 83{
84#ifdef CONFIG_BLK_DEV_IDEDMA
85 ide_hwif_t *hwif = drive->hwif; 84 ide_hwif_t *hwif = drive->hwif;
86 u8 mask = hwif->ultra_mask, mode = XFER_MW_DMA_2; 85 u8 mode = ide_find_dma_mode(drive, speed);
87 86
88 if (hwif->udma_filter) 87 if (mode == 0) {
89 mask = hwif->udma_filter(drive); 88 if (hwif->pio_mask)
90 89 mode = fls(hwif->pio_mask) - 1 + XFER_PIO_0;
91 /* 90 else
92 * TODO: speed > XFER_UDMA_2 extra check is needed to avoid false 91 mode = XFER_PIO_4;
93 * cable warning from eighty_ninty_three(), moving ide_rate_filter()
94 * calls from ->speedproc to core code will make this hack go away
95 */
96 if (speed > XFER_UDMA_2) {
97 if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
98 mask &= 0x07;
99 } 92 }
100 93
101 if (mask)
102 mode = fls(mask) - 1 + XFER_UDMA_0;
103
104// printk("%s: mode 0x%02x, speed 0x%02x\n", __FUNCTION__, mode, speed); 94// printk("%s: mode 0x%02x, speed 0x%02x\n", __FUNCTION__, mode, speed);
105 95
106 return min(speed, mode); 96 return min(speed, mode);
107#else /* !CONFIG_BLK_DEV_IDEDMA */
108 return min(speed, (u8)XFER_PIO_4);
109#endif /* CONFIG_BLK_DEV_IDEDMA */
110} 97}
111 98
112EXPORT_SYMBOL(ide_rate_filter);
113
114int ide_use_fast_pio(ide_drive_t *drive) 99int ide_use_fast_pio(ide_drive_t *drive)
115{ 100{
116 struct hd_driveid *id = drive->id; 101 struct hd_driveid *id = drive->id;
@@ -340,6 +325,35 @@ u8 ide_get_best_pio_mode (ide_drive_t *drive, u8 mode_wanted, u8 max_mode)
340 325
341EXPORT_SYMBOL_GPL(ide_get_best_pio_mode); 326EXPORT_SYMBOL_GPL(ide_get_best_pio_mode);
342 327
328/* req_pio == "255" for auto-tune */
329void ide_set_pio(ide_drive_t *drive, u8 req_pio)
330{
331 ide_hwif_t *hwif = drive->hwif;
332 u8 host_pio, pio;
333
334 if (hwif->set_pio_mode == NULL)
335 return;
336
337 BUG_ON(hwif->pio_mask == 0x00);
338
339 host_pio = fls(hwif->pio_mask) - 1;
340
341 pio = ide_get_best_pio_mode(drive, req_pio, host_pio);
342
343 /*
344 * TODO:
345 * - report device max PIO mode
346 * - check req_pio != 255 against device max PIO mode
347 */
348 printk(KERN_DEBUG "%s: host max PIO%d wanted PIO%d%s selected PIO%d\n",
349 drive->name, host_pio, req_pio,
350 req_pio == 255 ? "(auto-tune)" : "", pio);
351
352 hwif->set_pio_mode(drive, pio);
353}
354
355EXPORT_SYMBOL_GPL(ide_set_pio);
356
343/** 357/**
344 * ide_toggle_bounce - handle bounce buffering 358 * ide_toggle_bounce - handle bounce buffering
345 * @drive: drive to update 359 * @drive: drive to update
@@ -377,13 +391,26 @@ void ide_toggle_bounce(ide_drive_t *drive, int on)
377 391
378int ide_set_xfer_rate(ide_drive_t *drive, u8 rate) 392int ide_set_xfer_rate(ide_drive_t *drive, u8 rate)
379{ 393{
380#ifndef CONFIG_BLK_DEV_IDEDMA 394 ide_hwif_t *hwif = drive->hwif;
381 rate = min(rate, (u8) XFER_PIO_4); 395
382#endif 396 if (hwif->speedproc == NULL)
383 if(HWIF(drive)->speedproc)
384 return HWIF(drive)->speedproc(drive, rate);
385 else
386 return -1; 397 return -1;
398
399 rate = ide_rate_filter(drive, rate);
400
401 if (rate >= XFER_PIO_0 && rate <= XFER_PIO_5) {
402 if (hwif->set_pio_mode)
403 hwif->set_pio_mode(drive, rate - XFER_PIO_0);
404
405 /*
406 * FIXME: this is incorrect to return zero here but
407 * since all users of ide_set_xfer_rate() ignore
408 * the return value it is not a problem currently
409 */
410 return 0;
411 }
412
413 return hwif->speedproc(drive, rate);
387} 414}
388 415
389static void ide_dump_opcode(ide_drive_t *drive) 416static void ide_dump_opcode(ide_drive_t *drive)
diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c
index 3a2a9a338fd9..b4c9f63a3854 100644
--- a/drivers/ide/ide-probe.c
+++ b/drivers/ide/ide-probe.c
@@ -827,10 +827,8 @@ static void probe_hwif(ide_hwif_t *hwif, void (*fixup)(ide_hwif_t *hwif))
827 ide_drive_t *drive = &hwif->drives[unit]; 827 ide_drive_t *drive = &hwif->drives[unit];
828 828
829 if (drive->present) { 829 if (drive->present) {
830 if (hwif->tuneproc != NULL && 830 if (drive->autotune == IDE_TUNE_AUTO)
831 drive->autotune == IDE_TUNE_AUTO) 831 ide_set_max_pio(drive);
832 /* auto-tune PIO mode */
833 hwif->tuneproc(drive, 255);
834 832
835 if (drive->autotune != IDE_TUNE_DEFAULT && 833 if (drive->autotune != IDE_TUNE_DEFAULT &&
836 drive->autotune != IDE_TUNE_AUTO) 834 drive->autotune != IDE_TUNE_AUTO)
diff --git a/drivers/ide/ide.c b/drivers/ide/ide.c
index 5e88a060df06..e96212ce5729 100644
--- a/drivers/ide/ide.c
+++ b/drivers/ide/ide.c
@@ -396,8 +396,9 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif)
396 hwif->cds = tmp_hwif->cds; 396 hwif->cds = tmp_hwif->cds;
397#endif 397#endif
398 398
399 hwif->tuneproc = tmp_hwif->tuneproc; 399 hwif->set_pio_mode = tmp_hwif->set_pio_mode;
400 hwif->speedproc = tmp_hwif->speedproc; 400 hwif->speedproc = tmp_hwif->speedproc;
401 hwif->mdma_filter = tmp_hwif->mdma_filter;
401 hwif->udma_filter = tmp_hwif->udma_filter; 402 hwif->udma_filter = tmp_hwif->udma_filter;
402 hwif->selectproc = tmp_hwif->selectproc; 403 hwif->selectproc = tmp_hwif->selectproc;
403 hwif->reset_poll = tmp_hwif->reset_poll; 404 hwif->reset_poll = tmp_hwif->reset_poll;
@@ -866,8 +867,9 @@ int set_pio_mode(ide_drive_t *drive, int arg)
866 if (arg < 0 || arg > 255) 867 if (arg < 0 || arg > 255)
867 return -EINVAL; 868 return -EINVAL;
868 869
869 if (!HWIF(drive)->tuneproc) 870 if (drive->hwif->set_pio_mode == NULL)
870 return -ENOSYS; 871 return -ENOSYS;
872
871 if (drive->special.b.set_tune) 873 if (drive->special.b.set_tune)
872 return -EBUSY; 874 return -EBUSY;
873 ide_init_drive_cmd(&rq); 875 ide_init_drive_cmd(&rq);
@@ -914,6 +916,7 @@ static int generic_ide_suspend(struct device *dev, pm_message_t mesg)
914 struct request rq; 916 struct request rq;
915 struct request_pm_state rqpm; 917 struct request_pm_state rqpm;
916 ide_task_t args; 918 ide_task_t args;
919 int ret;
917 920
918 /* Call ACPI _GTM only once */ 921 /* Call ACPI _GTM only once */
919 if (!(drive->dn % 2)) 922 if (!(drive->dn % 2))
@@ -930,7 +933,14 @@ static int generic_ide_suspend(struct device *dev, pm_message_t mesg)
930 mesg.event = PM_EVENT_FREEZE; 933 mesg.event = PM_EVENT_FREEZE;
931 rqpm.pm_state = mesg.event; 934 rqpm.pm_state = mesg.event;
932 935
933 return ide_do_drive_cmd(drive, &rq, ide_wait); 936 ret = ide_do_drive_cmd(drive, &rq, ide_wait);
937 /* only call ACPI _PS3 after both drivers are suspended */
938 if (!ret && (((drive->dn % 2) && hwif->drives[0].present
939 && hwif->drives[1].present)
940 || !hwif->drives[0].present
941 || !hwif->drives[1].present))
942 ide_acpi_set_state(hwif, 0);
943 return ret;
934} 944}
935 945
936static int generic_ide_resume(struct device *dev) 946static int generic_ide_resume(struct device *dev)
@@ -943,8 +953,10 @@ static int generic_ide_resume(struct device *dev)
943 int err; 953 int err;
944 954
945 /* Call ACPI _STM only once */ 955 /* Call ACPI _STM only once */
946 if (!(drive->dn % 2)) 956 if (!(drive->dn % 2)) {
957 ide_acpi_set_state(hwif, 1);
947 ide_acpi_push_timing(hwif); 958 ide_acpi_push_timing(hwif);
959 }
948 960
949 ide_acpi_exec_tfs(drive); 961 ide_acpi_exec_tfs(drive);
950 962
diff --git a/drivers/ide/legacy/Makefile b/drivers/ide/legacy/Makefile
index c7971061767e..409822349f10 100644
--- a/drivers/ide/legacy/Makefile
+++ b/drivers/ide/legacy/Makefile
@@ -7,6 +7,8 @@ obj-$(CONFIG_BLK_DEV_UMC8672) += umc8672.o
7 7
8obj-$(CONFIG_BLK_DEV_IDECS) += ide-cs.o 8obj-$(CONFIG_BLK_DEV_IDECS) += ide-cs.o
9 9
10obj-$(CONFIG_BLK_DEV_PLATFORM) += ide_platform.o
11
10# Last of all 12# Last of all
11obj-$(CONFIG_BLK_DEV_HD) += hd.o 13obj-$(CONFIG_BLK_DEV_HD) += hd.o
12 14
diff --git a/drivers/ide/legacy/ali14xx.c b/drivers/ide/legacy/ali14xx.c
index 9b9c4761cb7d..2f0ef9b44033 100644
--- a/drivers/ide/legacy/ali14xx.c
+++ b/drivers/ide/legacy/ali14xx.c
@@ -68,8 +68,6 @@ static RegInitializer initData[] __initdata = {
68 {0x35, 0x03}, {0x00, 0x00} 68 {0x35, 0x03}, {0x00, 0x00}
69}; 69};
70 70
71#define ALI_MAX_PIO 4
72
73/* timing parameter registers for each drive */ 71/* timing parameter registers for each drive */
74static struct { u8 reg1, reg2, reg3, reg4; } regTab[4] = { 72static struct { u8 reg1, reg2, reg3, reg4; } regTab[4] = {
75 {0x03, 0x26, 0x04, 0x27}, /* drive 0 */ 73 {0x03, 0x26, 0x04, 0x27}, /* drive 0 */
@@ -109,7 +107,7 @@ static void outReg (u8 data, u8 reg)
109 * This function computes timing parameters 107 * This function computes timing parameters
110 * and sets controller registers accordingly. 108 * and sets controller registers accordingly.
111 */ 109 */
112static void ali14xx_tune_drive (ide_drive_t *drive, u8 pio) 110static void ali14xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
113{ 111{
114 int driveNum; 112 int driveNum;
115 int time1, time2; 113 int time1, time2;
@@ -117,8 +115,6 @@ static void ali14xx_tune_drive (ide_drive_t *drive, u8 pio)
117 unsigned long flags; 115 unsigned long flags;
118 int bus_speed = system_bus_clock(); 116 int bus_speed = system_bus_clock();
119 117
120 pio = ide_get_best_pio_mode(drive, pio, ALI_MAX_PIO);
121
122 /* calculate timing, according to PIO mode */ 118 /* calculate timing, according to PIO mode */
123 time1 = ide_pio_cycle_time(drive, pio); 119 time1 = ide_pio_cycle_time(drive, pio);
124 time2 = ide_pio_timings[pio].active_time; 120 time2 = ide_pio_timings[pio].active_time;
@@ -212,12 +208,12 @@ static int __init ali14xx_probe(void)
212 208
213 hwif->chipset = ide_ali14xx; 209 hwif->chipset = ide_ali14xx;
214 hwif->pio_mask = ATA_PIO4; 210 hwif->pio_mask = ATA_PIO4;
215 hwif->tuneproc = &ali14xx_tune_drive; 211 hwif->set_pio_mode = &ali14xx_set_pio_mode;
216 hwif->mate = mate; 212 hwif->mate = mate;
217 213
218 mate->chipset = ide_ali14xx; 214 mate->chipset = ide_ali14xx;
219 mate->pio_mask = ATA_PIO4; 215 mate->pio_mask = ATA_PIO4;
220 mate->tuneproc = &ali14xx_tune_drive; 216 mate->set_pio_mode = &ali14xx_set_pio_mode;
221 mate->mate = hwif; 217 mate->mate = hwif;
222 mate->channel = 1; 218 mate->channel = 1;
223 219
diff --git a/drivers/ide/legacy/dtc2278.c b/drivers/ide/legacy/dtc2278.c
index 6c01d951d074..f16521254867 100644
--- a/drivers/ide/legacy/dtc2278.c
+++ b/drivers/ide/legacy/dtc2278.c
@@ -67,12 +67,10 @@ static void sub22 (char b, char c)
67 } 67 }
68} 68}
69 69
70static void tune_dtc2278 (ide_drive_t *drive, u8 pio) 70static void dtc2278_set_pio_mode(ide_drive_t *drive, const u8 pio)
71{ 71{
72 unsigned long flags; 72 unsigned long flags;
73 73
74 pio = ide_get_best_pio_mode(drive, pio, 4);
75
76 if (pio >= 3) { 74 if (pio >= 3) {
77 spin_lock_irqsave(&ide_lock, flags); 75 spin_lock_irqsave(&ide_lock, flags);
78 /* 76 /*
@@ -124,7 +122,7 @@ static int __init dtc2278_probe(void)
124 hwif->serialized = 1; 122 hwif->serialized = 1;
125 hwif->chipset = ide_dtc2278; 123 hwif->chipset = ide_dtc2278;
126 hwif->pio_mask = ATA_PIO4; 124 hwif->pio_mask = ATA_PIO4;
127 hwif->tuneproc = &tune_dtc2278; 125 hwif->set_pio_mode = &dtc2278_set_pio_mode;
128 hwif->drives[0].no_unmask = 1; 126 hwif->drives[0].no_unmask = 1;
129 hwif->drives[1].no_unmask = 1; 127 hwif->drives[1].no_unmask = 1;
130 hwif->mate = mate; 128 hwif->mate = mate;
diff --git a/drivers/ide/legacy/ht6560b.c b/drivers/ide/legacy/ht6560b.c
index bfaa2025173b..2e5a9cc5c0f7 100644
--- a/drivers/ide/legacy/ht6560b.c
+++ b/drivers/ide/legacy/ht6560b.c
@@ -199,7 +199,7 @@ static int __init try_to_init_ht6560b(void)
199 return 1; 199 return 1;
200} 200}
201 201
202static u8 ht_pio2timings(ide_drive_t *drive, u8 pio) 202static u8 ht_pio2timings(ide_drive_t *drive, const u8 pio)
203{ 203{
204 int active_time, recovery_time; 204 int active_time, recovery_time;
205 int active_cycles, recovery_cycles; 205 int active_cycles, recovery_cycles;
@@ -208,7 +208,6 @@ static u8 ht_pio2timings(ide_drive_t *drive, u8 pio)
208 if (pio) { 208 if (pio) {
209 unsigned int cycle_time; 209 unsigned int cycle_time;
210 210
211 pio = ide_get_best_pio_mode(drive, pio, 5);
212 cycle_time = ide_pio_cycle_time(drive, pio); 211 cycle_time = ide_pio_cycle_time(drive, pio);
213 212
214 /* 213 /*
@@ -277,7 +276,7 @@ static void ht_set_prefetch(ide_drive_t *drive, u8 state)
277#endif 276#endif
278} 277}
279 278
280static void tune_ht6560b (ide_drive_t *drive, u8 pio) 279static void ht6560b_set_pio_mode(ide_drive_t *drive, const u8 pio)
281{ 280{
282 unsigned long flags; 281 unsigned long flags;
283 u8 timing; 282 u8 timing;
@@ -333,15 +332,17 @@ int __init ht6560b_init(void)
333 332
334 hwif->chipset = ide_ht6560b; 333 hwif->chipset = ide_ht6560b;
335 hwif->selectproc = &ht6560b_selectproc; 334 hwif->selectproc = &ht6560b_selectproc;
335 hwif->host_flags = IDE_HFLAG_ABUSE_PREFETCH;
336 hwif->pio_mask = ATA_PIO5; 336 hwif->pio_mask = ATA_PIO5;
337 hwif->tuneproc = &tune_ht6560b; 337 hwif->set_pio_mode = &ht6560b_set_pio_mode;
338 hwif->serialized = 1; /* is this needed? */ 338 hwif->serialized = 1; /* is this needed? */
339 hwif->mate = mate; 339 hwif->mate = mate;
340 340
341 mate->chipset = ide_ht6560b; 341 mate->chipset = ide_ht6560b;
342 mate->selectproc = &ht6560b_selectproc; 342 mate->selectproc = &ht6560b_selectproc;
343 mate->host_flags = IDE_HFLAG_ABUSE_PREFETCH;
343 mate->pio_mask = ATA_PIO5; 344 mate->pio_mask = ATA_PIO5;
344 mate->tuneproc = &tune_ht6560b; 345 mate->set_pio_mode = &ht6560b_set_pio_mode;
345 mate->serialized = 1; /* is this needed? */ 346 mate->serialized = 1; /* is this needed? */
346 mate->mate = hwif; 347 mate->mate = hwif;
347 mate->channel = 1; 348 mate->channel = 1;
diff --git a/drivers/ide/legacy/ide_platform.c b/drivers/ide/legacy/ide_platform.c
new file mode 100644
index 000000000000..ccfb9893a467
--- /dev/null
+++ b/drivers/ide/legacy/ide_platform.c
@@ -0,0 +1,182 @@
1/*
2 * Platform IDE driver
3 *
4 * Copyright (C) 2007 MontaVista Software
5 *
6 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/types.h>
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <linux/ide.h>
18#include <linux/ioport.h>
19#include <linux/module.h>
20#include <linux/pata_platform.h>
21#include <linux/platform_device.h>
22#include <linux/io.h>
23
24static struct {
25 void __iomem *plat_ide_mapbase;
26 void __iomem *plat_ide_alt_mapbase;
27 ide_hwif_t *hwif;
28 int index;
29} hwif_prop;
30
31static ide_hwif_t *__devinit plat_ide_locate_hwif(void __iomem *base,
32 void __iomem *ctrl, struct pata_platform_info *pdata, int irq,
33 int mmio)
34{
35 unsigned long port = (unsigned long)base;
36 ide_hwif_t *hwif;
37 int index, i;
38
39 for (index = 0; index < MAX_HWIFS; ++index) {
40 hwif = ide_hwifs + index;
41 if (hwif->io_ports[IDE_DATA_OFFSET] == port)
42 goto found;
43 }
44
45 for (index = 0; index < MAX_HWIFS; ++index) {
46 hwif = ide_hwifs + index;
47 if (hwif->io_ports[IDE_DATA_OFFSET] == 0)
48 goto found;
49 }
50
51 return NULL;
52
53found:
54
55 hwif->hw.io_ports[IDE_DATA_OFFSET] = port;
56
57 port += (1 << pdata->ioport_shift);
58 for (i = IDE_ERROR_OFFSET; i <= IDE_STATUS_OFFSET;
59 i++, port += (1 << pdata->ioport_shift))
60 hwif->hw.io_ports[i] = port;
61
62 hwif->hw.io_ports[IDE_CONTROL_OFFSET] = (unsigned long)ctrl;
63
64 memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->hw.io_ports));
65 hwif->hw.irq = hwif->irq = irq;
66
67 hwif->hw.dma = NO_DMA;
68 hwif->hw.chipset = ide_generic;
69
70 if (mmio) {
71 hwif->mmio = 1;
72 default_hwif_mmiops(hwif);
73 }
74
75 hwif_prop.hwif = hwif;
76 hwif_prop.index = index;
77
78 return hwif;
79}
80
81static int __devinit plat_ide_probe(struct platform_device *pdev)
82{
83 struct resource *res_base, *res_alt, *res_irq;
84 ide_hwif_t *hwif;
85 struct pata_platform_info *pdata;
86 int ret = 0;
87 int mmio = 0;
88
89 pdata = pdev->dev.platform_data;
90
91 /* get a pointer to the register memory */
92 res_base = platform_get_resource(pdev, IORESOURCE_IO, 0);
93 res_alt = platform_get_resource(pdev, IORESOURCE_IO, 1);
94
95 if (!res_base || !res_alt) {
96 res_base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
97 res_alt = platform_get_resource(pdev, IORESOURCE_MEM, 1);
98 if (!res_base || !res_alt) {
99 ret = -ENOMEM;
100 goto out;
101 }
102 mmio = 1;
103 }
104
105 res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
106 if (!res_irq) {
107 ret = -EINVAL;
108 goto out;
109 }
110
111 if (mmio) {
112 hwif_prop.plat_ide_mapbase = devm_ioremap(&pdev->dev,
113 res_base->start, res_base->end - res_base->start + 1);
114 hwif_prop.plat_ide_alt_mapbase = devm_ioremap(&pdev->dev,
115 res_alt->start, res_alt->end - res_alt->start + 1);
116 } else {
117 hwif_prop.plat_ide_mapbase = devm_ioport_map(&pdev->dev,
118 res_base->start, res_base->end - res_base->start + 1);
119 hwif_prop.plat_ide_alt_mapbase = devm_ioport_map(&pdev->dev,
120 res_alt->start, res_alt->end - res_alt->start + 1);
121 }
122
123 hwif = plat_ide_locate_hwif(hwif_prop.plat_ide_mapbase,
124 hwif_prop.plat_ide_alt_mapbase, pdata, res_irq->start, mmio);
125
126 if (!hwif) {
127 ret = -ENODEV;
128 goto out;
129 }
130 hwif->gendev.parent = &pdev->dev;
131 hwif->noprobe = 0;
132
133 probe_hwif_init(hwif);
134
135 platform_set_drvdata(pdev, hwif);
136 ide_proc_register_port(hwif);
137
138 return 0;
139
140out:
141 return ret;
142}
143
144static int __devexit plat_ide_remove(struct platform_device *pdev)
145{
146 ide_hwif_t *hwif = pdev->dev.driver_data;
147
148 if (hwif != hwif_prop.hwif) {
149 dev_printk(KERN_DEBUG, &pdev->dev, "%s: hwif value error",
150 pdev->name);
151 } else {
152 ide_unregister(hwif_prop.index);
153 hwif_prop.index = 0;
154 hwif_prop.hwif = NULL;
155 }
156
157 return 0;
158}
159
160static struct platform_driver platform_ide_driver = {
161 .driver = {
162 .name = "pata_platform",
163 },
164 .probe = plat_ide_probe,
165 .remove = __devexit_p(plat_ide_remove),
166};
167
168static int __init platform_ide_init(void)
169{
170 return platform_driver_register(&platform_ide_driver);
171}
172
173static void __exit platform_ide_exit(void)
174{
175 platform_driver_unregister(&platform_ide_driver);
176}
177
178MODULE_DESCRIPTION("Platform IDE driver");
179MODULE_LICENSE("GPL");
180
181module_init(platform_ide_init);
182module_exit(platform_ide_exit);
diff --git a/drivers/ide/legacy/qd65xx.c b/drivers/ide/legacy/qd65xx.c
index 8b87a424094a..0c81d2d0b941 100644
--- a/drivers/ide/legacy/qd65xx.c
+++ b/drivers/ide/legacy/qd65xx.c
@@ -224,15 +224,14 @@ static void qd_set_timing (ide_drive_t *drive, u8 timing)
224 printk(KERN_DEBUG "%s: %#x\n", drive->name, timing); 224 printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
225} 225}
226 226
227/* 227static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
228 * qd6500_tune_drive
229 */
230
231static void qd6500_tune_drive (ide_drive_t *drive, u8 pio)
232{ 228{
233 int active_time = 175; 229 int active_time = 175;
234 int recovery_time = 415; /* worst case values from the dos driver */ 230 int recovery_time = 415; /* worst case values from the dos driver */
235 231
232 /*
233 * FIXME: use "pio" value
234 */
236 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time) 235 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
237 && drive->id->tPIO && (drive->id->field_valid & 0x02) 236 && drive->id->tPIO && (drive->id->field_valid & 0x02)
238 && drive->id->eide_pio >= 240) { 237 && drive->id->eide_pio >= 240) {
@@ -246,11 +245,7 @@ static void qd6500_tune_drive (ide_drive_t *drive, u8 pio)
246 qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time)); 245 qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
247} 246}
248 247
249/* 248static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
250 * qd6580_tune_drive
251 */
252
253static void qd6580_tune_drive (ide_drive_t *drive, u8 pio)
254{ 249{
255 int base = HWIF(drive)->select_data; 250 int base = HWIF(drive)->select_data;
256 unsigned int cycle_time; 251 unsigned int cycle_time;
@@ -258,7 +253,6 @@ static void qd6580_tune_drive (ide_drive_t *drive, u8 pio)
258 int recovery_time = 415; /* worst case values from the dos driver */ 253 int recovery_time = 415; /* worst case values from the dos driver */
259 254
260 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) { 255 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
261 pio = ide_get_best_pio_mode(drive, pio, 4);
262 cycle_time = ide_pio_cycle_time(drive, pio); 256 cycle_time = ide_pio_cycle_time(drive, pio);
263 257
264 switch (pio) { 258 switch (pio) {
@@ -335,8 +329,7 @@ static int __init qd_testreg(int port)
335 */ 329 */
336 330
337static void __init qd_setup(ide_hwif_t *hwif, int base, int config, 331static void __init qd_setup(ide_hwif_t *hwif, int base, int config,
338 unsigned int data0, unsigned int data1, 332 unsigned int data0, unsigned int data1)
339 void (*tuneproc) (ide_drive_t *, u8 pio))
340{ 333{
341 hwif->chipset = ide_qd65xx; 334 hwif->chipset = ide_qd65xx;
342 hwif->channel = hwif->index; 335 hwif->channel = hwif->index;
@@ -347,8 +340,6 @@ static void __init qd_setup(ide_hwif_t *hwif, int base, int config,
347 hwif->drives[0].io_32bit = 340 hwif->drives[0].io_32bit =
348 hwif->drives[1].io_32bit = 1; 341 hwif->drives[1].io_32bit = 1;
349 hwif->pio_mask = ATA_PIO4; 342 hwif->pio_mask = ATA_PIO4;
350 hwif->tuneproc = tuneproc;
351 probe_hwif_init(hwif);
352} 343}
353 344
354/* 345/*
@@ -361,7 +352,7 @@ static void __exit qd_unsetup(ide_hwif_t *hwif)
361{ 352{
362 u8 config = hwif->config_data; 353 u8 config = hwif->config_data;
363 int base = hwif->select_data; 354 int base = hwif->select_data;
364 void *tuneproc = (void *) hwif->tuneproc; 355 void *set_pio_mode = (void *)hwif->set_pio_mode;
365 356
366 if (hwif->chipset != ide_qd65xx) 357 if (hwif->chipset != ide_qd65xx)
367 return; 358 return;
@@ -369,12 +360,12 @@ static void __exit qd_unsetup(ide_hwif_t *hwif)
369 printk(KERN_NOTICE "%s: back to defaults\n", hwif->name); 360 printk(KERN_NOTICE "%s: back to defaults\n", hwif->name);
370 361
371 hwif->selectproc = NULL; 362 hwif->selectproc = NULL;
372 hwif->tuneproc = NULL; 363 hwif->set_pio_mode = NULL;
373 364
374 if (tuneproc == (void *) qd6500_tune_drive) { 365 if (set_pio_mode == (void *)qd6500_set_pio_mode) {
375 // will do it for both 366 // will do it for both
376 qd_write_reg(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0])); 367 qd_write_reg(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
377 } else if (tuneproc == (void *) qd6580_tune_drive) { 368 } else if (set_pio_mode == (void *)qd6580_set_pio_mode) {
378 if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) { 369 if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
379 qd_write_reg(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0])); 370 qd_write_reg(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
380 qd_write_reg(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1])); 371 qd_write_reg(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1]));
@@ -424,8 +415,11 @@ static int __init qd_probe(int base)
424 return 1; 415 return 1;
425 } 416 }
426 417
427 qd_setup(hwif, base, config, QD6500_DEF_DATA, QD6500_DEF_DATA, 418 qd_setup(hwif, base, config, QD6500_DEF_DATA, QD6500_DEF_DATA);
428 &qd6500_tune_drive); 419
420 hwif->set_pio_mode = &qd6500_set_pio_mode;
421
422 probe_hwif_init(hwif);
429 423
430 ide_proc_register_port(hwif); 424 ide_proc_register_port(hwif);
431 425
@@ -455,8 +449,12 @@ static int __init qd_probe(int base)
455 printk(KERN_INFO "%s: qd6580: single IDE board\n", 449 printk(KERN_INFO "%s: qd6580: single IDE board\n",
456 hwif->name); 450 hwif->name);
457 qd_setup(hwif, base, config | (control << 8), 451 qd_setup(hwif, base, config | (control << 8),
458 QD6580_DEF_DATA, QD6580_DEF_DATA2, 452 QD6580_DEF_DATA, QD6580_DEF_DATA2);
459 &qd6580_tune_drive); 453
454 hwif->set_pio_mode = &qd6580_set_pio_mode;
455
456 probe_hwif_init(hwif);
457
460 qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT); 458 qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
461 459
462 ide_proc_register_port(hwif); 460 ide_proc_register_port(hwif);
@@ -472,11 +470,19 @@ static int __init qd_probe(int base)
472 hwif->name, mate->name); 470 hwif->name, mate->name);
473 471
474 qd_setup(hwif, base, config | (control << 8), 472 qd_setup(hwif, base, config | (control << 8),
475 QD6580_DEF_DATA, QD6580_DEF_DATA, 473 QD6580_DEF_DATA, QD6580_DEF_DATA);
476 &qd6580_tune_drive); 474
475 hwif->set_pio_mode = &qd6580_set_pio_mode;
476
477 probe_hwif_init(hwif);
478
477 qd_setup(mate, base, config | (control << 8), 479 qd_setup(mate, base, config | (control << 8),
478 QD6580_DEF_DATA2, QD6580_DEF_DATA2, 480 QD6580_DEF_DATA2, QD6580_DEF_DATA2);
479 &qd6580_tune_drive); 481
482 mate->set_pio_mode = &qd6580_set_pio_mode;
483
484 probe_hwif_init(mate);
485
480 qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT); 486 qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
481 487
482 ide_proc_register_port(hwif); 488 ide_proc_register_port(hwif);
diff --git a/drivers/ide/legacy/umc8672.c b/drivers/ide/legacy/umc8672.c
index d2862e638bc5..1151c92dd531 100644
--- a/drivers/ide/legacy/umc8672.c
+++ b/drivers/ide/legacy/umc8672.c
@@ -105,12 +105,11 @@ static void umc_set_speeds (u8 speeds[])
105 speeds[0], speeds[1], speeds[2], speeds[3]); 105 speeds[0], speeds[1], speeds[2], speeds[3]);
106} 106}
107 107
108static void tune_umc (ide_drive_t *drive, u8 pio) 108static void umc_set_pio_mode(ide_drive_t *drive, const u8 pio)
109{ 109{
110 unsigned long flags; 110 unsigned long flags;
111 ide_hwgroup_t *hwgroup = ide_hwifs[HWIF(drive)->index^1].hwgroup; 111 ide_hwgroup_t *hwgroup = ide_hwifs[HWIF(drive)->index^1].hwgroup;
112 112
113 pio = ide_get_best_pio_mode(drive, pio, 4);
114 printk("%s: setting umc8672 to PIO mode%d (speed %d)\n", 113 printk("%s: setting umc8672 to PIO mode%d (speed %d)\n",
115 drive->name, pio, pio_to_umc[pio]); 114 drive->name, pio, pio_to_umc[pio]);
116 spin_lock_irqsave(&ide_lock, flags); 115 spin_lock_irqsave(&ide_lock, flags);
@@ -150,12 +149,12 @@ static int __init umc8672_probe(void)
150 149
151 hwif->chipset = ide_umc8672; 150 hwif->chipset = ide_umc8672;
152 hwif->pio_mask = ATA_PIO4; 151 hwif->pio_mask = ATA_PIO4;
153 hwif->tuneproc = &tune_umc; 152 hwif->set_pio_mode = &umc_set_pio_mode;
154 hwif->mate = mate; 153 hwif->mate = mate;
155 154
156 mate->chipset = ide_umc8672; 155 mate->chipset = ide_umc8672;
157 mate->pio_mask = ATA_PIO4; 156 mate->pio_mask = ATA_PIO4;
158 mate->tuneproc = &tune_umc; 157 mate->set_pio_mode = &umc_set_pio_mode;
159 mate->mate = hwif; 158 mate->mate = hwif;
160 mate->channel = 1; 159 mate->channel = 1;
161 160
diff --git a/drivers/ide/mips/au1xxx-ide.c b/drivers/ide/mips/au1xxx-ide.c
index 2ba6a054b861..85819ae20602 100644
--- a/drivers/ide/mips/au1xxx-ide.c
+++ b/drivers/ide/mips/au1xxx-ide.c
@@ -99,18 +99,12 @@ void auide_outsw(unsigned long port, void *addr, u32 count)
99 99
100#endif 100#endif
101 101
102static void auide_tune_drive(ide_drive_t *drive, byte pio) 102static void au1xxx_set_pio_mode(ide_drive_t *drive, const u8 pio)
103{ 103{
104 int mem_sttime; 104 int mem_sttime;
105 int mem_stcfg; 105 int mem_stcfg;
106 u8 speed; 106 u8 speed;
107 107
108 /* get the best pio mode for the drive */
109 pio = ide_get_best_pio_mode(drive, pio, 4);
110
111 printk(KERN_INFO "%s: setting Au1XXX IDE to PIO mode%d\n",
112 drive->name, pio);
113
114 mem_sttime = 0; 108 mem_sttime = 0;
115 mem_stcfg = au_readl(MEM_STCFG2); 109 mem_stcfg = au_readl(MEM_STCFG2);
116 110
@@ -175,7 +169,7 @@ static void auide_tune_drive(ide_drive_t *drive, byte pio)
175 ide_config_drive_speed(drive, speed); 169 ide_config_drive_speed(drive, speed);
176} 170}
177 171
178static int auide_tune_chipset (ide_drive_t *drive, u8 speed) 172static int auide_tune_chipset(ide_drive_t *drive, const u8 speed)
179{ 173{
180 int mem_sttime; 174 int mem_sttime;
181 int mem_stcfg; 175 int mem_stcfg;
@@ -183,11 +177,6 @@ static int auide_tune_chipset (ide_drive_t *drive, u8 speed)
183 mem_sttime = 0; 177 mem_sttime = 0;
184 mem_stcfg = au_readl(MEM_STCFG2); 178 mem_stcfg = au_readl(MEM_STCFG2);
185 179
186 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
187 auide_tune_drive(drive, speed - XFER_PIO_0);
188 return 0;
189 }
190
191 switch(speed) { 180 switch(speed) {
192#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA 181#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
193 case XFER_MW_DMA_2: 182 case XFER_MW_DMA_2:
@@ -712,7 +701,7 @@ static int au_ide_probe(struct device *dev)
712 hwif->OUTSW = auide_outsw; 701 hwif->OUTSW = auide_outsw;
713#endif 702#endif
714 703
715 hwif->tuneproc = &auide_tune_drive; 704 hwif->set_pio_mode = &au1xxx_set_pio_mode;
716 hwif->speedproc = &auide_tune_chipset; 705 hwif->speedproc = &auide_tune_chipset;
717 706
718#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA 707#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c
index 74432830abf7..0d5f62c5dfae 100644
--- a/drivers/ide/pci/aec62xx.c
+++ b/drivers/ide/pci/aec62xx.c
@@ -87,12 +87,11 @@ static u8 pci_bus_clock_list_ultra (u8 speed, struct chipset_bus_clock_list_entr
87 return chipset_table->ultra_settings; 87 return chipset_table->ultra_settings;
88} 88}
89 89
90static int aec6210_tune_chipset (ide_drive_t *drive, u8 xferspeed) 90static int aec6210_tune_chipset(ide_drive_t *drive, const u8 speed)
91{ 91{
92 ide_hwif_t *hwif = HWIF(drive); 92 ide_hwif_t *hwif = HWIF(drive);
93 struct pci_dev *dev = hwif->pci_dev; 93 struct pci_dev *dev = hwif->pci_dev;
94 u16 d_conf = 0; 94 u16 d_conf = 0;
95 u8 speed = ide_rate_filter(drive, xferspeed);
96 u8 ultra = 0, ultra_conf = 0; 95 u8 ultra = 0, ultra_conf = 0;
97 u8 tmp0 = 0, tmp1 = 0, tmp2 = 0; 96 u8 tmp0 = 0, tmp1 = 0, tmp2 = 0;
98 unsigned long flags; 97 unsigned long flags;
@@ -115,11 +114,10 @@ static int aec6210_tune_chipset (ide_drive_t *drive, u8 xferspeed)
115 return(ide_config_drive_speed(drive, speed)); 114 return(ide_config_drive_speed(drive, speed));
116} 115}
117 116
118static int aec6260_tune_chipset (ide_drive_t *drive, u8 xferspeed) 117static int aec6260_tune_chipset(ide_drive_t *drive, const u8 speed)
119{ 118{
120 ide_hwif_t *hwif = HWIF(drive); 119 ide_hwif_t *hwif = HWIF(drive);
121 struct pci_dev *dev = hwif->pci_dev; 120 struct pci_dev *dev = hwif->pci_dev;
122 u8 speed = ide_rate_filter(drive, xferspeed);
123 u8 unit = (drive->select.b.unit & 0x01); 121 u8 unit = (drive->select.b.unit & 0x01);
124 u8 tmp1 = 0, tmp2 = 0; 122 u8 tmp1 = 0, tmp2 = 0;
125 u8 ultra = 0, drive_conf = 0, ultra_conf = 0; 123 u8 ultra = 0, drive_conf = 0, ultra_conf = 0;
@@ -140,9 +138,8 @@ static int aec6260_tune_chipset (ide_drive_t *drive, u8 xferspeed)
140 return(ide_config_drive_speed(drive, speed)); 138 return(ide_config_drive_speed(drive, speed));
141} 139}
142 140
143static void aec62xx_tune_drive (ide_drive_t *drive, u8 pio) 141static void aec_set_pio_mode(ide_drive_t *drive, const u8 pio)
144{ 142{
145 pio = ide_get_best_pio_mode(drive, pio, 4);
146 (void) HWIF(drive)->speedproc(drive, pio + XFER_PIO_0); 143 (void) HWIF(drive)->speedproc(drive, pio + XFER_PIO_0);
147} 144}
148 145
@@ -152,7 +149,7 @@ static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive)
152 return 0; 149 return 0;
153 150
154 if (ide_use_fast_pio(drive)) 151 if (ide_use_fast_pio(drive))
155 aec62xx_tune_drive(drive, 255); 152 ide_set_max_pio(drive);
156 153
157 return -1; 154 return -1;
158} 155}
@@ -203,7 +200,7 @@ static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)
203 u8 reg54 = 0, mask = hwif->channel ? 0xf0 : 0x0f; 200 u8 reg54 = 0, mask = hwif->channel ? 0xf0 : 0x0f;
204 unsigned long flags; 201 unsigned long flags;
205 202
206 hwif->tuneproc = &aec62xx_tune_drive; 203 hwif->set_pio_mode = &aec_set_pio_mode;
207 204
208 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) { 205 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) {
209 if(hwif->mate) 206 if(hwif->mate)
diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c
index 20ebe3b7049c..d04b966b4347 100644
--- a/drivers/ide/pci/alim15x3.c
+++ b/drivers/ide/pci/alim15x3.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/alim15x3.c Version 0.25 Jun 9 2007 2 * linux/drivers/ide/pci/alim15x3.c Version 0.26 Jul 14 2007
3 * 3 *
4 * Copyright (C) 1998-2000 Michel Aubry, Maintainer 4 * Copyright (C) 1998-2000 Michel Aubry, Maintainer
5 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer 5 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
@@ -283,17 +283,14 @@ static int ali_get_info (char *buffer, char **addr, off_t offset, int count)
283#endif /* defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */ 283#endif /* defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */
284 284
285/** 285/**
286 * ali15x3_tune_pio - set up chipset for PIO mode 286 * ali_tune_pio - set host controller for PIO mode
287 * @drive: drive to tune 287 * @drive: drive
288 * @pio: desired mode 288 * @pio: PIO mode number
289 *
290 * Select the best PIO mode for the drive in question.
291 * Then program the controller for this mode.
292 * 289 *
293 * Returns the PIO mode programmed. 290 * Program the controller for the given PIO mode.
294 */ 291 */
295 292
296static u8 ali15x3_tune_pio (ide_drive_t *drive, u8 pio) 293static void ali_tune_pio(ide_drive_t *drive, const u8 pio)
297{ 294{
298 ide_hwif_t *hwif = HWIF(drive); 295 ide_hwif_t *hwif = HWIF(drive);
299 struct pci_dev *dev = hwif->pci_dev; 296 struct pci_dev *dev = hwif->pci_dev;
@@ -306,7 +303,6 @@ static u8 ali15x3_tune_pio (ide_drive_t *drive, u8 pio)
306 u8 cd_dma_fifo = 0; 303 u8 cd_dma_fifo = 0;
307 int unit = drive->select.b.unit & 1; 304 int unit = drive->select.b.unit & 1;
308 305
309 pio = ide_get_best_pio_mode(drive, pio, 5);
310 s_time = ide_pio_timings[pio].setup_time; 306 s_time = ide_pio_timings[pio].setup_time;
311 a_time = ide_pio_timings[pio].active_time; 307 a_time = ide_pio_timings[pio].active_time;
312 if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8) 308 if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8)
@@ -359,22 +355,20 @@ static u8 ali15x3_tune_pio (ide_drive_t *drive, u8 pio)
359 * { 25, 70, 25 }, PIO Mode 4 with IORDY ns 355 * { 25, 70, 25 }, PIO Mode 4 with IORDY ns
360 * { 20, 50, 30 } PIO Mode 5 with IORDY (nonstandard) 356 * { 20, 50, 30 } PIO Mode 5 with IORDY (nonstandard)
361 */ 357 */
362
363 return pio;
364} 358}
365 359
366/** 360/**
367 * ali15x3_tune_drive - set up drive for PIO mode 361 * ali_set_pio_mode - set up drive for PIO mode
368 * @drive: drive to tune 362 * @drive: drive to tune
369 * @pio: desired mode 363 * @pio: desired mode
370 * 364 *
371 * Program the controller with the best PIO timing for the given drive. 365 * Program the controller with the desired PIO timing for the given drive.
372 * Then set up the drive itself. 366 * Then set up the drive itself.
373 */ 367 */
374 368
375static void ali15x3_tune_drive (ide_drive_t *drive, u8 pio) 369static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
376{ 370{
377 pio = ali15x3_tune_pio(drive, pio); 371 ali_tune_pio(drive, pio);
378 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio); 372 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
379} 373}
380 374
@@ -409,22 +403,24 @@ static u8 ali_udma_filter(ide_drive_t *drive)
409/** 403/**
410 * ali15x3_tune_chipset - set up chipset/drive for new speed 404 * ali15x3_tune_chipset - set up chipset/drive for new speed
411 * @drive: drive to configure for 405 * @drive: drive to configure for
412 * @xferspeed: desired speed 406 * @speed: desired speed
413 * 407 *
414 * Configure the hardware for the desired IDE transfer mode. 408 * Configure the hardware for the desired IDE transfer mode.
415 * We also do the needed drive configuration through helpers 409 * We also do the needed drive configuration through helpers
416 */ 410 */
417 411
418static int ali15x3_tune_chipset (ide_drive_t *drive, u8 xferspeed) 412static int ali15x3_tune_chipset(ide_drive_t *drive, const u8 speed)
419{ 413{
420 ide_hwif_t *hwif = HWIF(drive); 414 ide_hwif_t *hwif = HWIF(drive);
421 struct pci_dev *dev = hwif->pci_dev; 415 struct pci_dev *dev = hwif->pci_dev;
422 u8 speed = ide_rate_filter(drive, xferspeed);
423 u8 speed1 = speed; 416 u8 speed1 = speed;
424 u8 unit = (drive->select.b.unit & 0x01); 417 u8 unit = (drive->select.b.unit & 0x01);
425 u8 tmpbyte = 0x00; 418 u8 tmpbyte = 0x00;
426 int m5229_udma = (hwif->channel) ? 0x57 : 0x56; 419 int m5229_udma = (hwif->channel) ? 0x57 : 0x56;
427 420
421 if (speed < XFER_PIO_0)
422 return 1;
423
428 if (speed == XFER_UDMA_6) 424 if (speed == XFER_UDMA_6)
429 speed1 = 0x47; 425 speed1 = 0x47;
430 426
@@ -437,8 +433,9 @@ static int ali15x3_tune_chipset (ide_drive_t *drive, u8 xferspeed)
437 tmpbyte &= ultra_enable; 433 tmpbyte &= ultra_enable;
438 pci_write_config_byte(dev, m5229_udma, tmpbyte); 434 pci_write_config_byte(dev, m5229_udma, tmpbyte);
439 435
440 if (speed < XFER_SW_DMA_0) 436 /*
441 (void) ali15x3_tune_pio(drive, speed - XFER_PIO_0); 437 * FIXME: Oh, my... DMA timings are never set.
438 */
442 } else { 439 } else {
443 pci_read_config_byte(dev, m5229_udma, &tmpbyte); 440 pci_read_config_byte(dev, m5229_udma, &tmpbyte);
444 tmpbyte &= (0x0f << ((1-unit) << 2)); 441 tmpbyte &= (0x0f << ((1-unit) << 2));
@@ -471,7 +468,7 @@ static int ali15x3_config_drive_for_dma(ide_drive_t *drive)
471 if (ide_tune_dma(drive)) 468 if (ide_tune_dma(drive))
472 return 0; 469 return 0;
473 470
474 ali15x3_tune_drive(drive, 255); 471 ide_set_max_pio(drive);
475 472
476 return -1; 473 return -1;
477} 474}
@@ -701,7 +698,7 @@ static u8 __devinit ata66_ali15x3(ide_hwif_t *hwif)
701static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif) 698static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif)
702{ 699{
703 hwif->autodma = 0; 700 hwif->autodma = 0;
704 hwif->tuneproc = &ali15x3_tune_drive; 701 hwif->set_pio_mode = &ali_set_pio_mode;
705 hwif->speedproc = &ali15x3_tune_chipset; 702 hwif->speedproc = &ali15x3_tune_chipset;
706 hwif->udma_filter = &ali_udma_filter; 703 hwif->udma_filter = &ali_udma_filter;
707 704
diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c
index 06c15a6a3e7d..513205e52ad2 100644
--- a/drivers/ide/pci/amd74xx.c
+++ b/drivers/ide/pci/amd74xx.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Version 2.21 2 * Version 2.22
3 * 3 *
4 * AMD 755/756/766/8111 and nVidia nForce/2/2s/3/3s/CK804/MCP04 4 * AMD 755/756/766/8111 and nVidia nForce/2/2s/3/3s/CK804/MCP04
5 * IDE driver for Linux. 5 * IDE driver for Linux.
@@ -234,7 +234,7 @@ static void amd_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timi
234 * by upper layers. 234 * by upper layers.
235 */ 235 */
236 236
237static int amd_set_drive(ide_drive_t *drive, u8 speed) 237static int amd_set_drive(ide_drive_t *drive, const u8 speed)
238{ 238{
239 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1); 239 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
240 struct ide_timing t, p; 240 struct ide_timing t, p;
@@ -266,32 +266,21 @@ static int amd_set_drive(ide_drive_t *drive, u8 speed)
266} 266}
267 267
268/* 268/*
269 * amd74xx_tune_drive() is a callback from upper layers for 269 * amd_set_pio_mode() is a callback from upper layers for PIO-only tuning.
270 * PIO-only tuning.
271 */ 270 */
272 271
273static void amd74xx_tune_drive(ide_drive_t *drive, u8 pio) 272static void amd_set_pio_mode(ide_drive_t *drive, const u8 pio)
274{ 273{
275 if (pio == 255) 274 amd_set_drive(drive, XFER_PIO_0 + pio);
276 pio = ide_get_best_pio_mode(drive, 255, 5);
277
278 amd_set_drive(drive, XFER_PIO_0 + min_t(byte, pio, 5));
279} 275}
280 276
281static int amd74xx_ide_dma_check(ide_drive_t *drive) 277static int amd74xx_ide_dma_check(ide_drive_t *drive)
282{ 278{
283 u8 speed = ide_max_dma_mode(drive); 279 if (ide_tune_dma(drive))
284
285 if (speed == 0) {
286 amd74xx_tune_drive(drive, 255);
287 return -1;
288 }
289
290 amd_set_drive(drive, speed);
291
292 if (drive->autodma)
293 return 0; 280 return 0;
294 281
282 ide_set_max_pio(drive);
283
295 return -1; 284 return -1;
296} 285}
297 286
@@ -409,7 +398,7 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
409 398
410 hwif->autodma = 0; 399 hwif->autodma = 0;
411 400
412 hwif->tuneproc = &amd74xx_tune_drive; 401 hwif->set_pio_mode = &amd_set_pio_mode;
413 hwif->speedproc = &amd_set_drive; 402 hwif->speedproc = &amd_set_drive;
414 403
415 for (i = 0; i < 2; i++) { 404 for (i = 0; i < 2; i++) {
diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c
index 1725aa402d98..178876a3afca 100644
--- a/drivers/ide/pci/atiixp.c
+++ b/drivers/ide/pci/atiixp.c
@@ -153,9 +153,8 @@ static void atiixp_tune_pio(ide_drive_t *drive, u8 pio)
153 spin_unlock_irqrestore(&atiixp_lock, flags); 153 spin_unlock_irqrestore(&atiixp_lock, flags);
154} 154}
155 155
156static void atiixp_tuneproc(ide_drive_t *drive, u8 pio) 156static void atiixp_set_pio_mode(ide_drive_t *drive, const u8 pio)
157{ 157{
158 pio = ide_get_best_pio_mode(drive, pio, 4);
159 atiixp_tune_pio(drive, pio); 158 atiixp_tune_pio(drive, pio);
160 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio); 159 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
161} 160}
@@ -163,28 +162,21 @@ static void atiixp_tuneproc(ide_drive_t *drive, u8 pio)
163/** 162/**
164 * atiixp_tune_chipset - tune a ATIIXP interface 163 * atiixp_tune_chipset - tune a ATIIXP interface
165 * @drive: IDE drive to tune 164 * @drive: IDE drive to tune
166 * @xferspeed: speed to configure 165 * @speed: speed to configure
167 * 166 *
168 * Set a ATIIXP interface channel to the desired speeds. This involves 167 * Set a ATIIXP interface channel to the desired speeds. This involves
169 * requires the right timing data into the ATIIXP configuration space 168 * requires the right timing data into the ATIIXP configuration space
170 * then setting the drive parameters appropriately 169 * then setting the drive parameters appropriately
171 */ 170 */
172 171
173static int atiixp_speedproc(ide_drive_t *drive, u8 xferspeed) 172static int atiixp_speedproc(ide_drive_t *drive, const u8 speed)
174{ 173{
175 struct pci_dev *dev = drive->hwif->pci_dev; 174 struct pci_dev *dev = drive->hwif->pci_dev;
176 unsigned long flags; 175 unsigned long flags;
177 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8; 176 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
178 u32 tmp32; 177 u32 tmp32;
179 u16 tmp16; 178 u16 tmp16;
180 u8 speed, pio; 179 u8 pio;
181
182 speed = ide_rate_filter(drive, xferspeed);
183
184 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
185 atiixp_tune_pio(drive, speed - XFER_PIO_0);
186 return ide_config_drive_speed(drive, speed);
187 }
188 180
189 spin_lock_irqsave(&atiixp_lock, flags); 181 spin_lock_irqsave(&atiixp_lock, flags);
190 182
@@ -233,7 +225,7 @@ static int atiixp_dma_check(ide_drive_t *drive)
233 return 0; 225 return 0;
234 226
235 if (ide_use_fast_pio(drive)) 227 if (ide_use_fast_pio(drive))
236 atiixp_tuneproc(drive, 255); 228 ide_set_max_pio(drive);
237 229
238 return -1; 230 return -1;
239} 231}
@@ -256,7 +248,7 @@ static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
256 hwif->irq = ch ? 15 : 14; 248 hwif->irq = ch ? 15 : 14;
257 249
258 hwif->autodma = 0; 250 hwif->autodma = 0;
259 hwif->tuneproc = &atiixp_tuneproc; 251 hwif->set_pio_mode = &atiixp_set_pio_mode;
260 hwif->speedproc = &atiixp_speedproc; 252 hwif->speedproc = &atiixp_speedproc;
261 hwif->drives[0].autotune = 1; 253 hwif->drives[0].autotune = 1;
262 hwif->drives[1].autotune = 1; 254 hwif->drives[1].autotune = 1;
@@ -325,7 +317,7 @@ static struct pci_device_id atiixp_pci_tbl[] = {
325 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 317 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
326 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 318 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
327 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, 319 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
328 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, 320 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
329 { 0, }, 321 { 0, },
330}; 322};
331MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl); 323MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl);
diff --git a/drivers/ide/pci/cmd640.c b/drivers/ide/pci/cmd640.c
index 9689494efa24..f369645e4d16 100644
--- a/drivers/ide/pci/cmd640.c
+++ b/drivers/ide/pci/cmd640.c
@@ -628,45 +628,40 @@ static void cmd640_set_mode (unsigned int index, u8 pio_mode, unsigned int cycle
628 program_drive_counts (index); 628 program_drive_counts (index);
629} 629}
630 630
631/* 631static void cmd640_set_pio_mode(ide_drive_t *drive, const u8 pio)
632 * Drive PIO mode selection:
633 */
634static void cmd640_tune_drive (ide_drive_t *drive, u8 mode_wanted)
635{ 632{
636 unsigned int index = 0, cycle_time; 633 unsigned int index = 0, cycle_time;
637 u8 b; 634 u8 b;
638 635
639 while (drive != cmd_drives[index]) { 636 while (drive != cmd_drives[index]) {
640 if (++index > 3) { 637 if (++index > 3) {
641 printk("%s: bad news in cmd640_tune_drive\n", drive->name); 638 printk(KERN_ERR "%s: bad news in %s\n",
639 drive->name, __FUNCTION__);
642 return; 640 return;
643 } 641 }
644 } 642 }
645 switch (mode_wanted) { 643 switch (pio) {
646 case 6: /* set fast-devsel off */ 644 case 6: /* set fast-devsel off */
647 case 7: /* set fast-devsel on */ 645 case 7: /* set fast-devsel on */
648 mode_wanted &= 1;
649 b = get_cmd640_reg(CNTRL) & ~0x27; 646 b = get_cmd640_reg(CNTRL) & ~0x27;
650 if (mode_wanted) 647 if (pio & 1)
651 b |= 0x27; 648 b |= 0x27;
652 put_cmd640_reg(CNTRL, b); 649 put_cmd640_reg(CNTRL, b);
653 printk("%s: %sabled cmd640 fast host timing (devsel)\n", drive->name, mode_wanted ? "en" : "dis"); 650 printk("%s: %sabled cmd640 fast host timing (devsel)\n", drive->name, (pio & 1) ? "en" : "dis");
654 return; 651 return;
655 652
656 case 8: /* set prefetch off */ 653 case 8: /* set prefetch off */
657 case 9: /* set prefetch on */ 654 case 9: /* set prefetch on */
658 mode_wanted &= 1; 655 set_prefetch_mode(index, pio & 1);
659 set_prefetch_mode(index, mode_wanted); 656 printk("%s: %sabled cmd640 prefetch\n", drive->name, (pio & 1) ? "en" : "dis");
660 printk("%s: %sabled cmd640 prefetch\n", drive->name, mode_wanted ? "en" : "dis");
661 return; 657 return;
662 } 658 }
663 659
664 mode_wanted = ide_get_best_pio_mode(drive, mode_wanted, 5); 660 cycle_time = ide_pio_cycle_time(drive, pio);
665 cycle_time = ide_pio_cycle_time(drive, mode_wanted); 661 cmd640_set_mode(index, pio, cycle_time);
666 cmd640_set_mode(index, mode_wanted, cycle_time);
667 662
668 printk("%s: selected cmd640 PIO mode%d (%dns)", 663 printk("%s: selected cmd640 PIO mode%d (%dns)",
669 drive->name, mode_wanted, cycle_time); 664 drive->name, pio, cycle_time);
670 665
671 display_clocks(index); 666 display_clocks(index);
672} 667}
@@ -766,8 +761,10 @@ int __init ide_probe_for_cmd640x (void)
766 cmd_hwif0->name, 'a' + cmd640_chip_version - 1, bus_type, cfr); 761 cmd_hwif0->name, 'a' + cmd640_chip_version - 1, bus_type, cfr);
767 cmd_hwif0->chipset = ide_cmd640; 762 cmd_hwif0->chipset = ide_cmd640;
768#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED 763#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
764 cmd_hwif0->host_flags = IDE_HFLAG_ABUSE_PREFETCH |
765 IDE_HFLAG_ABUSE_FAST_DEVSEL;
769 cmd_hwif0->pio_mask = ATA_PIO5; 766 cmd_hwif0->pio_mask = ATA_PIO5;
770 cmd_hwif0->tuneproc = &cmd640_tune_drive; 767 cmd_hwif0->set_pio_mode = &cmd640_set_pio_mode;
771#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ 768#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
772 769
773 /* 770 /*
@@ -822,8 +819,10 @@ int __init ide_probe_for_cmd640x (void)
822 cmd_hwif1->mate = cmd_hwif0; 819 cmd_hwif1->mate = cmd_hwif0;
823 cmd_hwif1->channel = 1; 820 cmd_hwif1->channel = 1;
824#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED 821#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
822 cmd_hwif1->host_flags = IDE_HFLAG_ABUSE_PREFETCH |
823 IDE_HFLAG_ABUSE_FAST_DEVSEL;
825 cmd_hwif1->pio_mask = ATA_PIO5; 824 cmd_hwif1->pio_mask = ATA_PIO5;
826 cmd_hwif1->tuneproc = &cmd640_tune_drive; 825 cmd_hwif1->set_pio_mode = &cmd640_set_pio_mode;
827#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */ 826#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
828 } 827 }
829 printk(KERN_INFO "%s: %sserialized, secondary interface %s\n", cmd_hwif1->name, 828 printk(KERN_INFO "%s: %sserialized, secondary interface %s\n", cmd_hwif1->name,
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index 0e3b5de26e69..0b568c60f926 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -214,28 +214,25 @@ static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_
214} 214}
215 215
216/* 216/*
217 * This routine selects drive's best PIO mode and writes into the chipset 217 * This routine writes into the chipset registers
218 * registers setup/active/recovery timings. 218 * PIO setup/active/recovery timings.
219 */ 219 */
220static u8 cmd64x_tune_pio (ide_drive_t *drive, u8 mode_wanted) 220static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
221{ 221{
222 ide_hwif_t *hwif = HWIF(drive); 222 ide_hwif_t *hwif = HWIF(drive);
223 struct pci_dev *dev = hwif->pci_dev; 223 struct pci_dev *dev = hwif->pci_dev;
224 unsigned int cycle_time; 224 unsigned int cycle_time;
225 u8 pio_mode, setup_count, arttim = 0; 225 u8 setup_count, arttim = 0;
226
226 static const u8 setup_values[] = {0x40, 0x40, 0x40, 0x80, 0, 0xc0}; 227 static const u8 setup_values[] = {0x40, 0x40, 0x40, 0x80, 0, 0xc0};
227 static const u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23}; 228 static const u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
228 229
229 pio_mode = ide_get_best_pio_mode(drive, mode_wanted, 5); 230 cycle_time = ide_pio_cycle_time(drive, pio);
230 cycle_time = ide_pio_cycle_time(drive, pio_mode);
231
232 cmdprintk("%s: PIO mode wanted %d, selected %d (%d ns)\n",
233 drive->name, mode_wanted, pio_mode, cycle_time);
234 231
235 program_cycle_times(drive, cycle_time, 232 program_cycle_times(drive, cycle_time,
236 ide_pio_timings[pio_mode].active_time); 233 ide_pio_timings[pio].active_time);
237 234
238 setup_count = quantize_timing(ide_pio_timings[pio_mode].setup_time, 235 setup_count = quantize_timing(ide_pio_timings[pio].setup_time,
239 1000 / system_bus_clock()); 236 1000 / system_bus_clock());
240 237
241 /* 238 /*
@@ -266,16 +263,14 @@ static u8 cmd64x_tune_pio (ide_drive_t *drive, u8 mode_wanted)
266 arttim |= setup_values[setup_count]; 263 arttim |= setup_values[setup_count];
267 (void) pci_write_config_byte(dev, arttim_regs[drive->dn], arttim); 264 (void) pci_write_config_byte(dev, arttim_regs[drive->dn], arttim);
268 cmdprintk("Write 0x%02x to reg 0x%x\n", arttim, arttim_regs[drive->dn]); 265 cmdprintk("Write 0x%02x to reg 0x%x\n", arttim, arttim_regs[drive->dn]);
269
270 return pio_mode;
271} 266}
272 267
273/* 268/*
274 * Attempts to set drive's PIO mode. 269 * Attempts to set drive's PIO mode.
275 * Special cases are 8: prefetch off, 9: prefetch on (both never worked), 270 * Special cases are 8: prefetch off, 9: prefetch on (both never worked)
276 * and 255: auto-select best mode (used at boot time).
277 */ 271 */
278static void cmd64x_tune_drive (ide_drive_t *drive, u8 pio) 272
273static void cmd64x_set_pio_mode(ide_drive_t *drive, const u8 pio)
279{ 274{
280 /* 275 /*
281 * Filter out the prefetch control values 276 * Filter out the prefetch control values
@@ -284,19 +279,17 @@ static void cmd64x_tune_drive (ide_drive_t *drive, u8 pio)
284 if (pio == 8 || pio == 9) 279 if (pio == 8 || pio == 9)
285 return; 280 return;
286 281
287 pio = cmd64x_tune_pio(drive, pio); 282 cmd64x_tune_pio(drive, pio);
288 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio); 283 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
289} 284}
290 285
291static int cmd64x_tune_chipset (ide_drive_t *drive, u8 speed) 286static int cmd64x_tune_chipset(ide_drive_t *drive, const u8 speed)
292{ 287{
293 ide_hwif_t *hwif = HWIF(drive); 288 ide_hwif_t *hwif = HWIF(drive);
294 struct pci_dev *dev = hwif->pci_dev; 289 struct pci_dev *dev = hwif->pci_dev;
295 u8 unit = drive->dn & 0x01; 290 u8 unit = drive->dn & 0x01;
296 u8 regU = 0, pciU = hwif->channel ? UDIDETCR1 : UDIDETCR0; 291 u8 regU = 0, pciU = hwif->channel ? UDIDETCR1 : UDIDETCR0;
297 292
298 speed = ide_rate_filter(drive, speed);
299
300 if (speed >= XFER_SW_DMA_0) { 293 if (speed >= XFER_SW_DMA_0) {
301 (void) pci_read_config_byte(dev, pciU, &regU); 294 (void) pci_read_config_byte(dev, pciU, &regU);
302 regU &= ~(unit ? 0xCA : 0x35); 295 regU &= ~(unit ? 0xCA : 0x35);
@@ -330,14 +323,6 @@ static int cmd64x_tune_chipset (ide_drive_t *drive, u8 speed)
330 case XFER_MW_DMA_0: 323 case XFER_MW_DMA_0:
331 program_cycle_times(drive, 480, 215); 324 program_cycle_times(drive, 480, 215);
332 break; 325 break;
333 case XFER_PIO_5:
334 case XFER_PIO_4:
335 case XFER_PIO_3:
336 case XFER_PIO_2:
337 case XFER_PIO_1:
338 case XFER_PIO_0:
339 (void) cmd64x_tune_pio(drive, speed - XFER_PIO_0);
340 break;
341 default: 326 default:
342 return 1; 327 return 1;
343 } 328 }
@@ -354,7 +339,7 @@ static int cmd64x_config_drive_for_dma (ide_drive_t *drive)
354 return 0; 339 return 0;
355 340
356 if (ide_use_fast_pio(drive)) 341 if (ide_use_fast_pio(drive))
357 cmd64x_tune_drive(drive, 255); 342 ide_set_max_pio(drive);
358 343
359 return -1; 344 return -1;
360} 345}
@@ -538,7 +523,7 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
538 523
539 pci_read_config_byte(dev, PCI_REVISION_ID, &rev); 524 pci_read_config_byte(dev, PCI_REVISION_ID, &rev);
540 525
541 hwif->tuneproc = &cmd64x_tune_drive; 526 hwif->set_pio_mode = &cmd64x_set_pio_mode;
542 hwif->speedproc = &cmd64x_tune_chipset; 527 hwif->speedproc = &cmd64x_tune_chipset;
543 528
544 hwif->drives[0].autotune = hwif->drives[1].autotune = 1; 529 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
@@ -622,6 +607,7 @@ static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
622 .autodma = AUTODMA, 607 .autodma = AUTODMA,
623 .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, 608 .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}},
624 .bootable = ON_BOARD, 609 .bootable = ON_BOARD,
610 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
625 .pio_mask = ATA_PIO5, 611 .pio_mask = ATA_PIO5,
626 .udma_mask = 0x00, /* no udma */ 612 .udma_mask = 0x00, /* no udma */
627 },{ /* 1 */ 613 },{ /* 1 */
@@ -632,6 +618,7 @@ static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
632 .autodma = AUTODMA, 618 .autodma = AUTODMA,
633 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 619 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
634 .bootable = ON_BOARD, 620 .bootable = ON_BOARD,
621 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
635 .pio_mask = ATA_PIO5, 622 .pio_mask = ATA_PIO5,
636 .udma_mask = 0x07, /* udma0-2 */ 623 .udma_mask = 0x07, /* udma0-2 */
637 },{ /* 2 */ 624 },{ /* 2 */
@@ -642,6 +629,7 @@ static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
642 .autodma = AUTODMA, 629 .autodma = AUTODMA,
643 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 630 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
644 .bootable = ON_BOARD, 631 .bootable = ON_BOARD,
632 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
645 .pio_mask = ATA_PIO5, 633 .pio_mask = ATA_PIO5,
646 .udma_mask = 0x1f, /* udma0-4 */ 634 .udma_mask = 0x1f, /* udma0-4 */
647 },{ /* 3 */ 635 },{ /* 3 */
@@ -652,6 +640,7 @@ static ide_pci_device_t cmd64x_chipsets[] __devinitdata = {
652 .autodma = AUTODMA, 640 .autodma = AUTODMA,
653 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 641 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
654 .bootable = ON_BOARD, 642 .bootable = ON_BOARD,
643 .host_flags = IDE_HFLAG_ABUSE_PREFETCH,
655 .pio_mask = ATA_PIO5, 644 .pio_mask = ATA_PIO5,
656 .udma_mask = 0x3f, /* udma0-5 */ 645 .udma_mask = 0x3f, /* udma0-5 */
657 } 646 }
diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c
index b89e81656875..1217d2a747fb 100644
--- a/drivers/ide/pci/cs5520.c
+++ b/drivers/ide/pci/cs5520.c
@@ -66,32 +66,13 @@ static struct pio_clocks cs5520_pio_clocks[]={
66 {1, 2, 1} 66 {1, 2, 1}
67}; 67};
68 68
69static int cs5520_tune_chipset(ide_drive_t *drive, u8 xferspeed) 69static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio)
70{ 70{
71 ide_hwif_t *hwif = HWIF(drive); 71 ide_hwif_t *hwif = HWIF(drive);
72 struct pci_dev *pdev = hwif->pci_dev; 72 struct pci_dev *pdev = hwif->pci_dev;
73 u8 speed = min((u8)XFER_PIO_4, xferspeed);
74 int pio = speed;
75 u8 reg;
76 int controller = drive->dn > 1 ? 1 : 0; 73 int controller = drive->dn > 1 ? 1 : 0;
77 int error; 74 u8 reg;
78 75
79 switch(speed)
80 {
81 case XFER_PIO_4:
82 case XFER_PIO_3:
83 case XFER_PIO_2:
84 case XFER_PIO_1:
85 case XFER_PIO_0:
86 pio -= XFER_PIO_0;
87 break;
88 default:
89 pio = 0;
90 printk(KERN_ERR "cs55x0: bad ide timing.\n");
91 }
92
93 printk("PIO clocking = %d\n", pio);
94
95 /* FIXME: if DMA = 1 do we need to set the DMA bit here ? */ 76 /* FIXME: if DMA = 1 do we need to set the DMA bit here ? */
96 77
97 /* 8bit CAT/CRT - 8bit command timing for channel */ 78 /* 8bit CAT/CRT - 8bit command timing for channel */
@@ -115,25 +96,28 @@ static int cs5520_tune_chipset(ide_drive_t *drive, u8 xferspeed)
115 reg = inb(hwif->dma_base + 0x02 + 8*controller); 96 reg = inb(hwif->dma_base + 0x02 + 8*controller);
116 reg |= 1<<((drive->dn&1)+5); 97 reg |= 1<<((drive->dn&1)+5);
117 outb(reg, hwif->dma_base + 0x02 + 8*controller); 98 outb(reg, hwif->dma_base + 0x02 + 8*controller);
118
119 error = ide_config_drive_speed(drive, speed);
120 /* ATAPI is harder so leave it for now */
121 if(!error && drive->media == ide_disk)
122 error = hwif->ide_dma_on(drive);
123 99
124 return error; 100 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
125} 101}
126 102
127static void cs5520_tune_drive(ide_drive_t *drive, u8 pio) 103static int cs5520_tune_chipset(ide_drive_t *drive, const u8 speed)
128{ 104{
129 pio = ide_get_best_pio_mode(drive, pio, 4); 105 printk(KERN_ERR "cs55x0: bad ide timing.\n");
130 cs5520_tune_chipset(drive, (XFER_PIO_0 + pio)); 106
107 cs5520_set_pio_mode(drive, 0);
108
109 /*
110 * FIXME: this is incorrect to return zero here but
111 * since all users of ide_set_xfer_rate() ignore
112 * the return value it is not a problem currently
113 */
114 return 0;
131} 115}
132 116
133static int cs5520_config_drive_xfer_rate(ide_drive_t *drive) 117static int cs5520_config_drive_xfer_rate(ide_drive_t *drive)
134{ 118{
135 /* Tune the drive for PIO modes up to PIO 4 */ 119 /* Tune the drive for PIO modes up to PIO 4 */
136 cs5520_tune_drive(drive, 255); 120 ide_set_max_pio(drive);
137 121
138 /* Then tell the core to use DMA operations */ 122 /* Then tell the core to use DMA operations */
139 return 0; 123 return 0;
@@ -165,7 +149,7 @@ static int cs5520_dma_on(ide_drive_t *drive)
165 149
166static void __devinit init_hwif_cs5520(ide_hwif_t *hwif) 150static void __devinit init_hwif_cs5520(ide_hwif_t *hwif)
167{ 151{
168 hwif->tuneproc = &cs5520_tune_drive; 152 hwif->set_pio_mode = &cs5520_set_pio_mode;
169 hwif->speedproc = &cs5520_tune_chipset; 153 hwif->speedproc = &cs5520_tune_chipset;
170 hwif->ide_dma_check = &cs5520_config_drive_xfer_rate; 154 hwif->ide_dma_check = &cs5520_config_drive_xfer_rate;
171 hwif->ide_dma_on = &cs5520_dma_on; 155 hwif->ide_dma_on = &cs5520_dma_on;
@@ -179,7 +163,8 @@ static void __devinit init_hwif_cs5520(ide_hwif_t *hwif)
179 hwif->drives[1].autotune = 1; 163 hwif->drives[1].autotune = 1;
180 return; 164 return;
181 } 165 }
182 166
167 /* ATAPI is harder so leave it for now */
183 hwif->atapi_dma = 0; 168 hwif->atapi_dma = 0;
184 hwif->ultra_mask = 0; 169 hwif->ultra_mask = 0;
185 hwif->swdma_mask = 0; 170 hwif->swdma_mask = 0;
diff --git a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c
index e5949b1d3fb0..741507b4cd93 100644
--- a/drivers/ide/pci/cs5530.c
+++ b/drivers/ide/pci/cs5530.c
@@ -71,19 +71,18 @@ static void cs5530_tunepio(ide_drive_t *drive, u8 pio)
71} 71}
72 72
73/** 73/**
74 * cs5530_tuneproc - select/set PIO modes 74 * cs5530_set_pio_mode - set PIO mode
75 * @drive: drive
76 * @pio: PIO mode number
75 * 77 *
76 * cs5530_tuneproc() handles selection/setting of PIO modes 78 * Handles setting of PIO mode for both the chipset and drive.
77 * for both the chipset and drive.
78 * 79 *
79 * The ide_init_cs5530() routine guarantees that all drives 80 * The init_hwif_cs5530() routine guarantees that all drives
80 * will have valid default PIO timings set up before we get here. 81 * will have valid default PIO timings set up before we get here.
81 */ 82 */
82 83
83static void cs5530_tuneproc (ide_drive_t *drive, u8 pio) /* pio=255 means "autotune" */ 84static void cs5530_set_pio_mode(ide_drive_t *drive, const u8 pio)
84{ 85{
85 pio = ide_get_best_pio_mode(drive, pio, 4);
86
87 if (cs5530_set_xfer_mode(drive, XFER_PIO_0 + pio) == 0) 86 if (cs5530_set_xfer_mode(drive, XFER_PIO_0 + pio) == 0)
88 cs5530_tunepio(drive, pio); 87 cs5530_tunepio(drive, pio);
89} 88}
@@ -143,13 +142,11 @@ static int cs5530_config_dma(ide_drive_t *drive)
143 return 1; 142 return 1;
144} 143}
145 144
146static int cs5530_tune_chipset(ide_drive_t *drive, u8 mode) 145static int cs5530_tune_chipset(ide_drive_t *drive, const u8 mode)
147{ 146{
148 unsigned long basereg; 147 unsigned long basereg;
149 unsigned int reg, timings = 0; 148 unsigned int reg, timings = 0;
150 149
151 mode = ide_rate_filter(drive, mode);
152
153 /* 150 /*
154 * Tell the drive to switch to the new mode; abort on failure. 151 * Tell the drive to switch to the new mode; abort on failure.
155 */ 152 */
@@ -166,13 +163,6 @@ static int cs5530_tune_chipset(ide_drive_t *drive, u8 mode)
166 case XFER_MW_DMA_0: timings = 0x00077771; break; 163 case XFER_MW_DMA_0: timings = 0x00077771; break;
167 case XFER_MW_DMA_1: timings = 0x00012121; break; 164 case XFER_MW_DMA_1: timings = 0x00012121; break;
168 case XFER_MW_DMA_2: timings = 0x00002020; break; 165 case XFER_MW_DMA_2: timings = 0x00002020; break;
169 case XFER_PIO_4:
170 case XFER_PIO_3:
171 case XFER_PIO_2:
172 case XFER_PIO_1:
173 case XFER_PIO_0:
174 cs5530_tunepio(drive, mode - XFER_PIO_0);
175 return 0;
176 default: 166 default:
177 BUG(); 167 BUG();
178 break; 168 break;
@@ -308,7 +298,7 @@ static void __devinit init_hwif_cs5530 (ide_hwif_t *hwif)
308 if (hwif->mate) 298 if (hwif->mate)
309 hwif->serialized = hwif->mate->serialized = 1; 299 hwif->serialized = hwif->mate->serialized = 1;
310 300
311 hwif->tuneproc = &cs5530_tuneproc; 301 hwif->set_pio_mode = &cs5530_set_pio_mode;
312 hwif->speedproc = &cs5530_tune_chipset; 302 hwif->speedproc = &cs5530_tune_chipset;
313 303
314 basereg = CS5530_BASEREG(hwif); 304 basereg = CS5530_BASEREG(hwif);
diff --git a/drivers/ide/pci/cs5535.c b/drivers/ide/pci/cs5535.c
index 082ca7da2cbc..383b7eccbcbb 100644
--- a/drivers/ide/pci/cs5535.c
+++ b/drivers/ide/pci/cs5535.c
@@ -75,7 +75,7 @@ static unsigned int cs5535_udma_timings[5] =
75 * 75 *
76 * cs5535_set_speed() configures the chipset to a new speed. 76 * cs5535_set_speed() configures the chipset to a new speed.
77 */ 77 */
78static void cs5535_set_speed(ide_drive_t *drive, u8 speed) 78static void cs5535_set_speed(ide_drive_t *drive, const u8 speed)
79{ 79{
80 80
81 u32 reg = 0, dummy; 81 u32 reg = 0, dummy;
@@ -141,23 +141,22 @@ static void cs5535_set_speed(ide_drive_t *drive, u8 speed)
141 */ 141 */
142static int cs5535_set_drive(ide_drive_t *drive, u8 speed) 142static int cs5535_set_drive(ide_drive_t *drive, u8 speed)
143{ 143{
144 speed = ide_rate_filter(drive, speed);
145 ide_config_drive_speed(drive, speed); 144 ide_config_drive_speed(drive, speed);
146 cs5535_set_speed(drive, speed); 145 cs5535_set_speed(drive, speed);
147 146
148 return 0; 147 return 0;
149} 148}
150 149
151/**** 150/**
152 * cs5535_tuneproc - PIO setup 151 * cs5535_set_pio_mode - PIO setup
153 * @drive: drive to set up 152 * @drive: drive
154 * @pio: mode to use (255 for 'best possible') 153 * @pio: PIO mode number
155 * 154 *
156 * A callback from the upper layers for PIO-only tuning. 155 * A callback from the upper layers for PIO-only tuning.
157 */ 156 */
158static void cs5535_tuneproc(ide_drive_t *drive, u8 pio) 157
158static void cs5535_set_pio_mode(ide_drive_t *drive, const u8 pio)
159{ 159{
160 pio = ide_get_best_pio_mode(drive, pio, 4);
161 ide_config_drive_speed(drive, XFER_PIO_0 + pio); 160 ide_config_drive_speed(drive, XFER_PIO_0 + pio);
162 cs5535_set_speed(drive, XFER_PIO_0 + pio); 161 cs5535_set_speed(drive, XFER_PIO_0 + pio);
163} 162}
@@ -170,7 +169,7 @@ static int cs5535_dma_check(ide_drive_t *drive)
170 return 0; 169 return 0;
171 170
172 if (ide_use_fast_pio(drive)) 171 if (ide_use_fast_pio(drive))
173 cs5535_tuneproc(drive, 255); 172 ide_set_max_pio(drive);
174 173
175 return -1; 174 return -1;
176} 175}
@@ -199,7 +198,7 @@ static void __devinit init_hwif_cs5535(ide_hwif_t *hwif)
199 198
200 hwif->autodma = 0; 199 hwif->autodma = 0;
201 200
202 hwif->tuneproc = &cs5535_tuneproc; 201 hwif->set_pio_mode = &cs5535_set_pio_mode;
203 hwif->speedproc = &cs5535_set_drive; 202 hwif->speedproc = &cs5535_set_drive;
204 hwif->ide_dma_check = &cs5535_dma_check; 203 hwif->ide_dma_check = &cs5535_dma_check;
205 204
diff --git a/drivers/ide/pci/cy82c693.c b/drivers/ide/pci/cy82c693.c
index daa36fcbc8ef..dc278025d318 100644
--- a/drivers/ide/pci/cy82c693.c
+++ b/drivers/ide/pci/cy82c693.c
@@ -97,9 +97,6 @@
97#define CY82_INDEX_CHANNEL1 0x31 97#define CY82_INDEX_CHANNEL1 0x31
98#define CY82_INDEX_TIMEOUT 0x32 98#define CY82_INDEX_TIMEOUT 0x32
99 99
100/* the max PIO mode - from datasheet */
101#define CY82C693_MAX_PIO 4
102
103/* the min and max PCI bus speed in MHz - from datasheet */ 100/* the min and max PCI bus speed in MHz - from datasheet */
104#define CY82C963_MIN_BUS_SPEED 25 101#define CY82C963_MIN_BUS_SPEED 25
105#define CY82C963_MAX_BUS_SPEED 33 102#define CY82C963_MAX_BUS_SPEED 33
@@ -148,9 +145,6 @@ static void compute_clocks (u8 pio, pio_clocks_t *p_pclk)
148 * so you can play with the idebus=xx parameter 145 * so you can play with the idebus=xx parameter
149 */ 146 */
150 147
151 if (pio > CY82C693_MAX_PIO)
152 pio = CY82C693_MAX_PIO;
153
154 /* let's calc the address setup time clocks */ 148 /* let's calc the address setup time clocks */
155 p_pclk->address_time = (u8)calc_clk(ide_pio_timings[pio].setup_time, bus_speed); 149 p_pclk->address_time = (u8)calc_clk(ide_pio_timings[pio].setup_time, bus_speed);
156 150
@@ -269,10 +263,7 @@ static int cy82c693_ide_dma_on (ide_drive_t *drive)
269 return __ide_dma_on(drive); 263 return __ide_dma_on(drive);
270} 264}
271 265
272/* 266static void cy82c693_set_pio_mode(ide_drive_t *drive, const u8 pio)
273 * tune ide drive - set PIO mode
274 */
275static void cy82c693_tune_drive (ide_drive_t *drive, u8 pio)
276{ 267{
277 ide_hwif_t *hwif = HWIF(drive); 268 ide_hwif_t *hwif = HWIF(drive);
278 struct pci_dev *dev = hwif->pci_dev; 269 struct pci_dev *dev = hwif->pci_dev;
@@ -329,13 +320,6 @@ static void cy82c693_tune_drive (ide_drive_t *drive, u8 pio)
329 addrCtrl, pclk.time_16r, pclk.time_16w, pclk.time_8); 320 addrCtrl, pclk.time_16r, pclk.time_16w, pclk.time_8);
330#endif /* CY82C693_DEBUG_LOGS */ 321#endif /* CY82C693_DEBUG_LOGS */
331 322
332 /* first let's calc the pio modes */
333 pio = ide_get_best_pio_mode(drive, pio, CY82C693_MAX_PIO);
334
335#if CY82C693_DEBUG_INFO
336 printk (KERN_INFO "%s: Selected PIO mode %d\n", drive->name, pio);
337#endif /* CY82C693_DEBUG_INFO */
338
339 /* let's calc the values for this PIO mode */ 323 /* let's calc the values for this PIO mode */
340 compute_clocks(pio, &pclk); 324 compute_clocks(pio, &pclk);
341 325
@@ -447,7 +431,7 @@ static void __devinit init_hwif_cy82c693(ide_hwif_t *hwif)
447 hwif->autodma = 0; 431 hwif->autodma = 0;
448 432
449 hwif->chipset = ide_cy82c693; 433 hwif->chipset = ide_cy82c693;
450 hwif->tuneproc = &cy82c693_tune_drive; 434 hwif->set_pio_mode = &cy82c693_set_pio_mode;
451 435
452 if (!hwif->dma_base) { 436 if (!hwif->dma_base) {
453 hwif->drives[0].autotune = 1; 437 hwif->drives[0].autotune = 1;
diff --git a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c
index cb8fe5643d3b..a1bb10188fe5 100644
--- a/drivers/ide/pci/hpt34x.c
+++ b/drivers/ide/pci/hpt34x.c
@@ -43,10 +43,9 @@
43 43
44#define HPT343_DEBUG_DRIVE_INFO 0 44#define HPT343_DEBUG_DRIVE_INFO 0
45 45
46static int hpt34x_tune_chipset (ide_drive_t *drive, u8 xferspeed) 46static int hpt34x_tune_chipset(ide_drive_t *drive, const u8 speed)
47{ 47{
48 struct pci_dev *dev = HWIF(drive)->pci_dev; 48 struct pci_dev *dev = HWIF(drive)->pci_dev;
49 u8 speed = ide_rate_filter(drive, xferspeed);
50 u32 reg1= 0, tmp1 = 0, reg2 = 0, tmp2 = 0; 49 u32 reg1= 0, tmp1 = 0, reg2 = 0, tmp2 = 0;
51 u8 hi_speed, lo_speed; 50 u8 hi_speed, lo_speed;
52 51
@@ -78,9 +77,8 @@ static int hpt34x_tune_chipset (ide_drive_t *drive, u8 xferspeed)
78 return(ide_config_drive_speed(drive, speed)); 77 return(ide_config_drive_speed(drive, speed));
79} 78}
80 79
81static void hpt34x_tune_drive (ide_drive_t *drive, u8 pio) 80static void hpt34x_set_pio_mode(ide_drive_t *drive, const u8 pio)
82{ 81{
83 pio = ide_get_best_pio_mode(drive, pio, 5);
84 (void) hpt34x_tune_chipset(drive, (XFER_PIO_0 + pio)); 82 (void) hpt34x_tune_chipset(drive, (XFER_PIO_0 + pio));
85} 83}
86 84
@@ -92,7 +90,7 @@ static int hpt34x_config_drive_xfer_rate (ide_drive_t *drive)
92 return -1; 90 return -1;
93 91
94 if (ide_use_fast_pio(drive)) 92 if (ide_use_fast_pio(drive))
95 hpt34x_tune_drive(drive, 255); 93 ide_set_max_pio(drive);
96 94
97 return -1; 95 return -1;
98} 96}
@@ -146,7 +144,7 @@ static void __devinit init_hwif_hpt34x(ide_hwif_t *hwif)
146 144
147 hwif->autodma = 0; 145 hwif->autodma = 0;
148 146
149 hwif->tuneproc = &hpt34x_tune_drive; 147 hwif->set_pio_mode = &hpt34x_set_pio_mode;
150 hwif->speedproc = &hpt34x_tune_chipset; 148 hwif->speedproc = &hpt34x_tune_chipset;
151 hwif->drives[0].autotune = 1; 149 hwif->drives[0].autotune = 1;
152 hwif->drives[1].autotune = 1; 150 hwif->drives[1].autotune = 1;
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index 39f1c89f7c86..0e7d3b60d43c 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/hpt366.c Version 1.12 Aug 19, 2007 2 * linux/drivers/ide/pci/hpt366.c Version 1.13 Sep 29, 2007
3 * 3 *
4 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 1999-2003 Andre Hedrick <andre@linux-ide.org>
5 * Portions Copyright (C) 2001 Sun Microsystems, Inc. 5 * Portions Copyright (C) 2001 Sun Microsystems, Inc.
@@ -114,7 +114,7 @@
114 * unify HPT36x/37x timing setup code and the speedproc handlers by joining 114 * unify HPT36x/37x timing setup code and the speedproc handlers by joining
115 * the register setting lists into the table indexed by the clock selected 115 * the register setting lists into the table indexed by the clock selected
116 * - set the correct hwif->ultra_mask for each individual chip 116 * - set the correct hwif->ultra_mask for each individual chip
117 * - add UltraDMA mode filtering for the HPT37[24] based SATA cards 117 * - add Ultra and MW DMA mode filtering for the HPT37[24] based SATA cards
118 * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com> 118 * Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com>
119 */ 119 */
120 120
@@ -562,6 +562,24 @@ static u8 hpt3xx_udma_filter(ide_drive_t *drive)
562 return check_in_drive_list(drive, bad_ata33) ? 0x00 : mask; 562 return check_in_drive_list(drive, bad_ata33) ? 0x00 : mask;
563} 563}
564 564
565static u8 hpt3xx_mdma_filter(ide_drive_t *drive)
566{
567 ide_hwif_t *hwif = HWIF(drive);
568 struct hpt_info *info = pci_get_drvdata(hwif->pci_dev);
569
570 switch (info->chip_type) {
571 case HPT372 :
572 case HPT372A:
573 case HPT372N:
574 case HPT374 :
575 if (ide_dev_is_sata(drive->id))
576 return 0x00;
577 /* Fall thru */
578 default:
579 return 0x07;
580 }
581}
582
565static u32 get_speed_setting(u8 speed, struct hpt_info *info) 583static u32 get_speed_setting(u8 speed, struct hpt_info *info)
566{ 584{
567 int i; 585 int i;
@@ -582,20 +600,15 @@ static u32 get_speed_setting(u8 speed, struct hpt_info *info)
582 return (*info->settings)[i]; 600 return (*info->settings)[i];
583} 601}
584 602
585static int hpt36x_tune_chipset(ide_drive_t *drive, u8 xferspeed) 603static int hpt36x_tune_chipset(ide_drive_t *drive, const u8 speed)
586{ 604{
587 ide_hwif_t *hwif = HWIF(drive); 605 ide_hwif_t *hwif = HWIF(drive);
588 struct pci_dev *dev = hwif->pci_dev; 606 struct pci_dev *dev = hwif->pci_dev;
589 struct hpt_info *info = pci_get_drvdata(dev); 607 struct hpt_info *info = pci_get_drvdata(dev);
590 u8 speed = ide_rate_filter(drive, xferspeed);
591 u8 itr_addr = drive->dn ? 0x44 : 0x40; 608 u8 itr_addr = drive->dn ? 0x44 : 0x40;
592 u32 old_itr = 0; 609 u32 old_itr = 0;
593 u32 itr_mask, new_itr; 610 u32 itr_mask, new_itr;
594 611
595 /* TODO: move this to ide_rate_filter() [ check ->atapi_dma ] */
596 if (drive->media != ide_disk)
597 speed = min_t(u8, speed, XFER_PIO_4);
598
599 itr_mask = speed < XFER_MW_DMA_0 ? 0x30070000 : 612 itr_mask = speed < XFER_MW_DMA_0 ? 0x30070000 :
600 (speed < XFER_UDMA_0 ? 0xc0070000 : 0xc03800ff); 613 (speed < XFER_UDMA_0 ? 0xc0070000 : 0xc03800ff);
601 614
@@ -614,20 +627,15 @@ static int hpt36x_tune_chipset(ide_drive_t *drive, u8 xferspeed)
614 return ide_config_drive_speed(drive, speed); 627 return ide_config_drive_speed(drive, speed);
615} 628}
616 629
617static int hpt37x_tune_chipset(ide_drive_t *drive, u8 xferspeed) 630static int hpt37x_tune_chipset(ide_drive_t *drive, const u8 speed)
618{ 631{
619 ide_hwif_t *hwif = HWIF(drive); 632 ide_hwif_t *hwif = HWIF(drive);
620 struct pci_dev *dev = hwif->pci_dev; 633 struct pci_dev *dev = hwif->pci_dev;
621 struct hpt_info *info = pci_get_drvdata(dev); 634 struct hpt_info *info = pci_get_drvdata(dev);
622 u8 speed = ide_rate_filter(drive, xferspeed);
623 u8 itr_addr = 0x40 + (drive->dn * 4); 635 u8 itr_addr = 0x40 + (drive->dn * 4);
624 u32 old_itr = 0; 636 u32 old_itr = 0;
625 u32 itr_mask, new_itr; 637 u32 itr_mask, new_itr;
626 638
627 /* TODO: move this to ide_rate_filter() [ check ->atapi_dma ] */
628 if (drive->media != ide_disk)
629 speed = min_t(u8, speed, XFER_PIO_4);
630
631 itr_mask = speed < XFER_MW_DMA_0 ? 0x303c0000 : 639 itr_mask = speed < XFER_MW_DMA_0 ? 0x303c0000 :
632 (speed < XFER_UDMA_0 ? 0xc03c0000 : 0xc1c001ff); 640 (speed < XFER_UDMA_0 ? 0xc03c0000 : 0xc1c001ff);
633 641
@@ -654,9 +662,8 @@ static int hpt3xx_tune_chipset(ide_drive_t *drive, u8 speed)
654 return hpt36x_tune_chipset(drive, speed); 662 return hpt36x_tune_chipset(drive, speed);
655} 663}
656 664
657static void hpt3xx_tune_drive(ide_drive_t *drive, u8 pio) 665static void hpt3xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
658{ 666{
659 pio = ide_get_best_pio_mode(drive, pio, 4);
660 (void) hpt3xx_tune_chipset (drive, XFER_PIO_0 + pio); 667 (void) hpt3xx_tune_chipset (drive, XFER_PIO_0 + pio);
661} 668}
662 669
@@ -718,7 +725,7 @@ static int hpt366_config_drive_xfer_rate(ide_drive_t *drive)
718 return 0; 725 return 0;
719 726
720 if (ide_use_fast_pio(drive)) 727 if (ide_use_fast_pio(drive))
721 hpt3xx_tune_drive(drive, 255); 728 ide_set_max_pio(drive);
722 729
723 return -1; 730 return -1;
724} 731}
@@ -1249,7 +1256,7 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
1249 /* Cache the channel's MISC. control registers' offset */ 1256 /* Cache the channel's MISC. control registers' offset */
1250 hwif->select_data = hwif->channel ? 0x54 : 0x50; 1257 hwif->select_data = hwif->channel ? 0x54 : 0x50;
1251 1258
1252 hwif->tuneproc = &hpt3xx_tune_drive; 1259 hwif->set_pio_mode = &hpt3xx_set_pio_mode;
1253 hwif->speedproc = &hpt3xx_tune_chipset; 1260 hwif->speedproc = &hpt3xx_tune_chipset;
1254 hwif->quirkproc = &hpt3xx_quirkproc; 1261 hwif->quirkproc = &hpt3xx_quirkproc;
1255 hwif->intrproc = &hpt3xx_intrproc; 1262 hwif->intrproc = &hpt3xx_intrproc;
@@ -1257,6 +1264,7 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
1257 hwif->busproc = &hpt3xx_busproc; 1264 hwif->busproc = &hpt3xx_busproc;
1258 1265
1259 hwif->udma_filter = &hpt3xx_udma_filter; 1266 hwif->udma_filter = &hpt3xx_udma_filter;
1267 hwif->mdma_filter = &hpt3xx_mdma_filter;
1260 1268
1261 /* 1269 /*
1262 * HPT3xxN chips have some complications: 1270 * HPT3xxN chips have some complications:
diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c
index 70b3245dbf62..76e91ff9420b 100644
--- a/drivers/ide/pci/it8213.c
+++ b/drivers/ide/pci/it8213.c
@@ -105,9 +105,8 @@ static void it8213_tune_pio(ide_drive_t *drive, const u8 pio)
105 spin_unlock_irqrestore(&tune_lock, flags); 105 spin_unlock_irqrestore(&tune_lock, flags);
106} 106}
107 107
108static void it8213_tuneproc(ide_drive_t *drive, u8 pio) 108static void it8213_set_pio_mode(ide_drive_t *drive, const u8 pio)
109{ 109{
110 pio = ide_get_best_pio_mode(drive, pio, 4);
111 it8213_tune_pio(drive, pio); 110 it8213_tune_pio(drive, pio);
112 ide_config_drive_speed(drive, XFER_PIO_0 + pio); 111 ide_config_drive_speed(drive, XFER_PIO_0 + pio);
113} 112}
@@ -115,20 +114,16 @@ static void it8213_tuneproc(ide_drive_t *drive, u8 pio)
115/** 114/**
116 * it8213_tune_chipset - set controller timings 115 * it8213_tune_chipset - set controller timings
117 * @drive: Drive to set up 116 * @drive: Drive to set up
118 * @xferspeed: speed we want to achieve 117 * @speed: speed we want to achieve
119 * 118 *
120 * Tune the ITE chipset for the desired mode. If we can't achieve 119 * Tune the ITE chipset for the desired mode.
121 * the desired mode then tune for a lower one, but ultimately
122 * make the thing work.
123 */ 120 */
124 121
125static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed) 122static int it8213_tune_chipset(ide_drive_t *drive, const u8 speed)
126{ 123{
127
128 ide_hwif_t *hwif = HWIF(drive); 124 ide_hwif_t *hwif = HWIF(drive);
129 struct pci_dev *dev = hwif->pci_dev; 125 struct pci_dev *dev = hwif->pci_dev;
130 u8 maslave = 0x40; 126 u8 maslave = 0x40;
131 u8 speed = ide_rate_filter(drive, xferspeed);
132 int a_speed = 3 << (drive->dn * 4); 127 int a_speed = 3 << (drive->dn * 4);
133 int u_flag = 1 << drive->dn; 128 int u_flag = 1 << drive->dn;
134 int v_flag = 0x01 << drive->dn; 129 int v_flag = 0x01 << drive->dn;
@@ -156,12 +151,6 @@ static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed)
156 case XFER_MW_DMA_1: 151 case XFER_MW_DMA_1:
157 case XFER_SW_DMA_2: 152 case XFER_SW_DMA_2:
158 break; 153 break;
159 case XFER_PIO_4:
160 case XFER_PIO_3:
161 case XFER_PIO_2:
162 case XFER_PIO_1:
163 case XFER_PIO_0:
164 break;
165 default: 154 default:
166 return -1; 155 return -1;
167 } 156 }
@@ -193,10 +182,7 @@ static int it8213_tune_chipset (ide_drive_t *drive, u8 xferspeed)
193 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); 182 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
194 } 183 }
195 184
196 if (speed > XFER_PIO_4) 185 it8213_tune_pio(drive, it8213_dma_2_pio(speed));
197 it8213_tune_pio(drive, it8213_dma_2_pio(speed));
198 else
199 it8213_tune_pio(drive, speed - XFER_PIO_0);
200 186
201 return ide_config_drive_speed(drive, speed); 187 return ide_config_drive_speed(drive, speed);
202} 188}
@@ -216,7 +202,7 @@ static int it8213_config_drive_for_dma (ide_drive_t *drive)
216 if (ide_tune_dma(drive)) 202 if (ide_tune_dma(drive))
217 return 0; 203 return 0;
218 204
219 it8213_tuneproc(drive, 255); 205 ide_set_max_pio(drive);
220 206
221 return -1; 207 return -1;
222} 208}
@@ -235,7 +221,7 @@ static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
235 u8 reg42h = 0; 221 u8 reg42h = 0;
236 222
237 hwif->speedproc = &it8213_tune_chipset; 223 hwif->speedproc = &it8213_tune_chipset;
238 hwif->tuneproc = &it8213_tuneproc; 224 hwif->set_pio_mode = &it8213_set_pio_mode;
239 225
240 hwif->autodma = 0; 226 hwif->autodma = 0;
241 227
diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c
index 9286c99e2ff0..758a98230cc5 100644
--- a/drivers/ide/pci/it821x.c
+++ b/drivers/ide/pci/it821x.c
@@ -274,9 +274,8 @@ static int it821x_tunepio(ide_drive_t *drive, u8 set_pio)
274 return ide_config_drive_speed(drive, XFER_PIO_0 + set_pio); 274 return ide_config_drive_speed(drive, XFER_PIO_0 + set_pio);
275} 275}
276 276
277static void it821x_tuneproc(ide_drive_t *drive, u8 pio) 277static void it821x_set_pio_mode(ide_drive_t *drive, const u8 pio)
278{ 278{
279 pio = ide_get_best_pio_mode(drive, pio, 4);
280 (void)it821x_tunepio(drive, pio); 279 (void)it821x_tunepio(drive, pio);
281} 280}
282 281
@@ -405,32 +404,19 @@ static int it821x_dma_end(ide_drive_t *drive)
405 return ret; 404 return ret;
406} 405}
407 406
408
409/** 407/**
410 * it821x_tune_chipset - set controller timings 408 * it821x_tune_chipset - set controller timings
411 * @drive: Drive to set up 409 * @drive: Drive to set up
412 * @xferspeed: speed we want to achieve 410 * @speed: speed we want to achieve
413 * 411 *
414 * Tune the ITE chipset for the desired mode. If we can't achieve 412 * Tune the ITE chipset for the desired mode.
415 * the desired mode then tune for a lower one, but ultimately
416 * make the thing work.
417 */ 413 */
418 414
419static int it821x_tune_chipset (ide_drive_t *drive, byte xferspeed) 415static int it821x_tune_chipset(ide_drive_t *drive, const u8 speed)
420{ 416{
421 417
422 ide_hwif_t *hwif = drive->hwif; 418 ide_hwif_t *hwif = drive->hwif;
423 struct it821x_dev *itdev = ide_get_hwifdata(hwif); 419 struct it821x_dev *itdev = ide_get_hwifdata(hwif);
424 u8 speed = ide_rate_filter(drive, xferspeed);
425
426 switch (speed) {
427 case XFER_PIO_4:
428 case XFER_PIO_3:
429 case XFER_PIO_2:
430 case XFER_PIO_1:
431 case XFER_PIO_0:
432 return it821x_tunepio(drive, speed - XFER_PIO_0);
433 }
434 420
435 if (itdev->smart == 0) { 421 if (itdev->smart == 0) {
436 switch (speed) { 422 switch (speed) {
@@ -477,7 +463,7 @@ static int it821x_config_drive_for_dma (ide_drive_t *drive)
477 if (ide_tune_dma(drive)) 463 if (ide_tune_dma(drive))
478 return 0; 464 return 0;
479 465
480 it821x_tuneproc(drive, 255); 466 ide_set_max_pio(drive);
481 467
482 return -1; 468 return -1;
483} 469}
@@ -644,7 +630,7 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif)
644 } 630 }
645 631
646 hwif->speedproc = &it821x_tune_chipset; 632 hwif->speedproc = &it821x_tune_chipset;
647 hwif->tuneproc = &it821x_tuneproc; 633 hwif->set_pio_mode = &it821x_set_pio_mode;
648 634
649 /* MWDMA/PIO clock switching for pass through mode */ 635 /* MWDMA/PIO clock switching for pass through mode */
650 if(!idev->smart) { 636 if(!idev->smart) {
diff --git a/drivers/ide/pci/jmicron.c b/drivers/ide/pci/jmicron.c
index 65a0ff352b98..d379fbaf6743 100644
--- a/drivers/ide/pci/jmicron.c
+++ b/drivers/ide/pci/jmicron.c
@@ -83,26 +83,22 @@ static u8 __devinit ata66_jmicron(ide_hwif_t *hwif)
83 return ATA_CBL_PATA80; 83 return ATA_CBL_PATA80;
84} 84}
85 85
86static void jmicron_tuneproc(ide_drive_t *drive, u8 pio) 86static void jmicron_set_pio_mode(ide_drive_t *drive, const u8 pio)
87{ 87{
88 pio = ide_get_best_pio_mode(drive, pio, 5);
89 ide_config_drive_speed(drive, XFER_PIO_0 + pio); 88 ide_config_drive_speed(drive, XFER_PIO_0 + pio);
90} 89}
91 90
92/** 91/**
93 * jmicron_tune_chipset - set controller timings 92 * jmicron_tune_chipset - set controller timings
94 * @drive: Drive to set up 93 * @drive: Drive to set up
95 * @xferspeed: speed we want to achieve 94 * @speed: speed we want to achieve
96 * 95 *
97 * As the JMicron snoops for timings all we actually need to do is 96 * As the JMicron snoops for timings all we actually need to do is
98 * make sure we don't set an invalid mode. We do need to honour 97 * set the transfer mode on the device.
99 * the cable detect here.
100 */ 98 */
101 99
102static int jmicron_tune_chipset (ide_drive_t *drive, byte xferspeed) 100static int jmicron_tune_chipset(ide_drive_t *drive, const u8 speed)
103{ 101{
104 u8 speed = ide_rate_filter(drive, xferspeed);
105
106 return ide_config_drive_speed(drive, speed); 102 return ide_config_drive_speed(drive, speed);
107} 103}
108 104
@@ -119,7 +115,7 @@ static int jmicron_config_drive_for_dma (ide_drive_t *drive)
119 if (ide_tune_dma(drive)) 115 if (ide_tune_dma(drive))
120 return 0; 116 return 0;
121 117
122 jmicron_tuneproc(drive, 255); 118 ide_set_max_pio(drive);
123 119
124 return -1; 120 return -1;
125} 121}
@@ -134,7 +130,7 @@ static int jmicron_config_drive_for_dma (ide_drive_t *drive)
134static void __devinit init_hwif_jmicron(ide_hwif_t *hwif) 130static void __devinit init_hwif_jmicron(ide_hwif_t *hwif)
135{ 131{
136 hwif->speedproc = &jmicron_tune_chipset; 132 hwif->speedproc = &jmicron_tune_chipset;
137 hwif->tuneproc = &jmicron_tuneproc; 133 hwif->set_pio_mode = &jmicron_set_pio_mode;
138 134
139 hwif->drives[0].autotune = 1; 135 hwif->drives[0].autotune = 1;
140 hwif->drives[1].autotune = 1; 136 hwif->drives[1].autotune = 1;
@@ -160,22 +156,13 @@ fallback:
160 return; 156 return;
161} 157}
162 158
163#define DECLARE_JMB_DEV(name_str) \ 159static ide_pci_device_t jmicron_chipset __devinitdata = {
164 { \ 160 .name = "JMB",
165 .name = name_str, \ 161 .init_hwif = init_hwif_jmicron,
166 .init_hwif = init_hwif_jmicron, \ 162 .autodma = AUTODMA,
167 .autodma = AUTODMA, \ 163 .bootable = ON_BOARD,
168 .bootable = ON_BOARD, \ 164 .enablebits = { { 0x40, 0x01, 0x01 }, { 0x40, 0x10, 0x10 } },
169 .enablebits = { {0x40, 1, 1}, {0x40, 0x10, 0x10} }, \ 165 .pio_mask = ATA_PIO5,
170 .pio_mask = ATA_PIO5, \
171 }
172
173static ide_pci_device_t jmicron_chipsets[] __devinitdata = {
174 /* 0 */ DECLARE_JMB_DEV("JMB361"),
175 /* 1 */ DECLARE_JMB_DEV("JMB363"),
176 /* 2 */ DECLARE_JMB_DEV("JMB365"),
177 /* 3 */ DECLARE_JMB_DEV("JMB366"),
178 /* 4 */ DECLARE_JMB_DEV("JMB368"),
179}; 166};
180 167
181/** 168/**
@@ -189,35 +176,29 @@ static ide_pci_device_t jmicron_chipsets[] __devinitdata = {
189 176
190static int __devinit jmicron_init_one(struct pci_dev *dev, const struct pci_device_id *id) 177static int __devinit jmicron_init_one(struct pci_dev *dev, const struct pci_device_id *id)
191{ 178{
192 ide_setup_pci_device(dev, &jmicron_chipsets[id->driver_data]); 179 ide_setup_pci_device(dev, &jmicron_chipset);
193 return 0; 180 return 0;
194} 181}
195 182
196/* If libata is configured, jmicron PCI quirk will configure it such 183/* All JMB PATA controllers have and will continue to have the same
197 * that the SATA ports are in AHCI function while the PATA ports are 184 * interface. Matching vendor and device class is enough for all
198 * in a separate IDE function. In such cases, match device class and 185 * current and future controllers if the controller is programmed
199 * attach only to IDE. If libata isn't configured, keep the old 186 * properly.
200 * behavior for backward compatibility. 187 *
188 * If libata is configured, jmicron PCI quirk programs the controller
189 * into the correct mode. If libata isn't configured, match known
190 * device IDs too to maintain backward compatibility.
201 */ 191 */
202#if defined(CONFIG_ATA) || defined(CONFIG_ATA_MODULE)
203#define JMB_CLASS PCI_CLASS_STORAGE_IDE << 8
204#define JMB_CLASS_MASK 0xffff00
205#else
206#define JMB_CLASS 0
207#define JMB_CLASS_MASK 0
208#endif
209
210static struct pci_device_id jmicron_pci_tbl[] = { 192static struct pci_device_id jmicron_pci_tbl[] = {
211 { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, 193#if !defined(CONFIG_ATA) && !defined(CONFIG_ATA_MODULE)
212 PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 0}, 194 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB361) },
213 { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363, 195 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB363) },
214 PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 1}, 196 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB365) },
215 { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365, 197 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB366) },
216 PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 2}, 198 { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMB368) },
217 { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, 199#endif
218 PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 3}, 200 { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
219 { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368, 201 PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 0 },
220 PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 4},
221 { 0, }, 202 { 0, },
222}; 203};
223 204
diff --git a/drivers/ide/pci/opti621.c b/drivers/ide/pci/opti621.c
index 3a2bb2723515..9fa06393469a 100644
--- a/drivers/ide/pci/opti621.c
+++ b/drivers/ide/pci/opti621.c
@@ -47,7 +47,7 @@
47 * The main problem with OPTi is that some timings for master 47 * The main problem with OPTi is that some timings for master
48 * and slave must be the same. For example, if you have master 48 * and slave must be the same. For example, if you have master
49 * PIO 3 and slave PIO 0, driver have to set some timings of 49 * PIO 3 and slave PIO 0, driver have to set some timings of
50 * master for PIO 0. Second problem is that opti621_tune_drive 50 * master for PIO 0. Second problem is that opti621_set_pio_mode
51 * got only one drive to set, but have to set both drives. 51 * got only one drive to set, but have to set both drives.
52 * This is solved in compute_pios. If you don't set 52 * This is solved in compute_pios. If you don't set
53 * the second drive, compute_pios use ide_get_best_pio_mode 53 * the second drive, compute_pios use ide_get_best_pio_mode
@@ -103,7 +103,7 @@
103 103
104#include <asm/io.h> 104#include <asm/io.h>
105 105
106#define OPTI621_MAX_PIO 3 106//#define OPTI621_MAX_PIO 3
107/* In fact, I do not have any PIO 4 drive 107/* In fact, I do not have any PIO 4 drive
108 * (address: 25 ns, data: 70 ns, recovery: 35 ns), 108 * (address: 25 ns, data: 70 ns, recovery: 35 ns),
109 * but OPTi 82C621 is programmable and it can do (minimal values): 109 * but OPTi 82C621 is programmable and it can do (minimal values):
@@ -136,8 +136,8 @@ static int reg_base;
136#define PIO_NOT_EXIST 254 136#define PIO_NOT_EXIST 254
137#define PIO_DONT_KNOW 255 137#define PIO_DONT_KNOW 255
138 138
139/* there are stored pio numbers from other calls of opti621_tune_drive */ 139/* there are stored pio numbers from other calls of opti621_set_pio_mode */
140static void compute_pios(ide_drive_t *drive, u8 pio) 140static void compute_pios(ide_drive_t *drive, const u8 pio)
141/* Store values into drive->drive_data 141/* Store values into drive->drive_data
142 * second_contr - 0 for primary controller, 1 for secondary 142 * second_contr - 0 for primary controller, 1 for secondary
143 * slave_drive - 0 -> pio is for master, 1 -> pio is for slave 143 * slave_drive - 0 -> pio is for master, 1 -> pio is for slave
@@ -147,12 +147,13 @@ static void compute_pios(ide_drive_t *drive, u8 pio)
147 int d; 147 int d;
148 ide_hwif_t *hwif = HWIF(drive); 148 ide_hwif_t *hwif = HWIF(drive);
149 149
150 drive->drive_data = ide_get_best_pio_mode(drive, pio, OPTI621_MAX_PIO); 150 drive->drive_data = pio;
151
151 for (d = 0; d < 2; ++d) { 152 for (d = 0; d < 2; ++d) {
152 drive = &hwif->drives[d]; 153 drive = &hwif->drives[d];
153 if (drive->present) { 154 if (drive->present) {
154 if (drive->drive_data == PIO_DONT_KNOW) 155 if (drive->drive_data == PIO_DONT_KNOW)
155 drive->drive_data = ide_get_best_pio_mode(drive, 255, OPTI621_MAX_PIO); 156 drive->drive_data = ide_get_best_pio_mode(drive, 255, 3);
156#ifdef OPTI621_DEBUG 157#ifdef OPTI621_DEBUG
157 printk("%s: Selected PIO mode %d\n", 158 printk("%s: Selected PIO mode %d\n",
158 drive->name, drive->drive_data); 159 drive->name, drive->drive_data);
@@ -240,8 +241,7 @@ static void compute_clocks(int pio, pio_clocks_t *clks)
240 241
241} 242}
242 243
243/* Main tune procedure, called from tuneproc. */ 244static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio)
244static void opti621_tune_drive (ide_drive_t *drive, u8 pio)
245{ 245{
246 /* primary and secondary drives share some registers, 246 /* primary and secondary drives share some registers,
247 * so we have to program both drives 247 * so we have to program both drives
@@ -331,7 +331,8 @@ static void __devinit init_hwif_opti621 (ide_hwif_t *hwif)
331 hwif->autodma = 0; 331 hwif->autodma = 0;
332 hwif->drives[0].drive_data = PIO_DONT_KNOW; 332 hwif->drives[0].drive_data = PIO_DONT_KNOW;
333 hwif->drives[1].drive_data = PIO_DONT_KNOW; 333 hwif->drives[1].drive_data = PIO_DONT_KNOW;
334 hwif->tuneproc = &opti621_tune_drive; 334
335 hwif->set_pio_mode = &opti621_set_pio_mode;
335 336
336 if (!(hwif->dma_base)) 337 if (!(hwif->dma_base))
337 return; 338 return;
diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c
index 7b0e479c355c..5fb1eedc8194 100644
--- a/drivers/ide/pci/pdc202xx_new.c
+++ b/drivers/ide/pci/pdc202xx_new.c
@@ -146,14 +146,12 @@ static struct udma_timing {
146 { 0x1a, 0x01, 0xcb }, /* UDMA mode 6 */ 146 { 0x1a, 0x01, 0xcb }, /* UDMA mode 6 */
147}; 147};
148 148
149static int pdcnew_tune_chipset(ide_drive_t *drive, u8 speed) 149static int pdcnew_tune_chipset(ide_drive_t *drive, const u8 speed)
150{ 150{
151 ide_hwif_t *hwif = HWIF(drive); 151 ide_hwif_t *hwif = HWIF(drive);
152 u8 adj = (drive->dn & 1) ? 0x08 : 0x00; 152 u8 adj = (drive->dn & 1) ? 0x08 : 0x00;
153 int err; 153 int err;
154 154
155 speed = ide_rate_filter(drive, speed);
156
157 /* 155 /*
158 * Issue SETFEATURES_XFER to the drive first. PDC202xx hardware will 156 * Issue SETFEATURES_XFER to the drive first. PDC202xx hardware will
159 * automatically set the timing registers based on 100 MHz PLL output. 157 * automatically set the timing registers based on 100 MHz PLL output.
@@ -217,9 +215,8 @@ static int pdcnew_tune_chipset(ide_drive_t *drive, u8 speed)
217 return err; 215 return err;
218} 216}
219 217
220static void pdcnew_tune_drive(ide_drive_t *drive, u8 pio) 218static void pdcnew_set_pio_mode(ide_drive_t *drive, const u8 pio)
221{ 219{
222 pio = ide_get_best_pio_mode(drive, pio, 4);
223 (void)pdcnew_tune_chipset(drive, XFER_PIO_0 + pio); 220 (void)pdcnew_tune_chipset(drive, XFER_PIO_0 + pio);
224} 221}
225 222
@@ -239,7 +236,7 @@ static int pdcnew_config_drive_xfer_rate(ide_drive_t *drive)
239 return 0; 236 return 0;
240 237
241 if (ide_use_fast_pio(drive)) 238 if (ide_use_fast_pio(drive))
242 pdcnew_tune_drive(drive, 255); 239 ide_set_max_pio(drive);
243 240
244 return -1; 241 return -1;
245} 242}
@@ -492,7 +489,8 @@ static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif)
492{ 489{
493 hwif->autodma = 0; 490 hwif->autodma = 0;
494 491
495 hwif->tuneproc = &pdcnew_tune_drive; 492 hwif->set_pio_mode = &pdcnew_set_pio_mode;
493
496 hwif->quirkproc = &pdcnew_quirkproc; 494 hwif->quirkproc = &pdcnew_quirkproc;
497 hwif->speedproc = &pdcnew_tune_chipset; 495 hwif->speedproc = &pdcnew_tune_chipset;
498 hwif->resetproc = &pdcnew_reset; 496 hwif->resetproc = &pdcnew_reset;
@@ -524,44 +522,52 @@ static int __devinit init_setup_pdcnew(struct pci_dev *dev, ide_pci_device_t *d)
524 return ide_setup_pci_device(dev, d); 522 return ide_setup_pci_device(dev, d);
525} 523}
526 524
527static int __devinit init_setup_pdc20270(struct pci_dev *dev, 525static int __devinit init_setup_pdc20270(struct pci_dev *dev, ide_pci_device_t *d)
528 ide_pci_device_t *d)
529{ 526{
530 struct pci_dev *findev = NULL; 527 struct pci_dev *bridge = dev->bus->self;
531 int ret; 528
529 if (bridge != NULL &&
530 bridge->vendor == PCI_VENDOR_ID_DEC &&
531 bridge->device == PCI_DEVICE_ID_DEC_21150) {
532 struct pci_dev *dev2;
532 533
533 if ((dev->bus->self &&
534 dev->bus->self->vendor == PCI_VENDOR_ID_DEC) &&
535 (dev->bus->self->device == PCI_DEVICE_ID_DEC_21150)) {
536 if (PCI_SLOT(dev->devfn) & 2) 534 if (PCI_SLOT(dev->devfn) & 2)
537 return -ENODEV; 535 return -ENODEV;
538 536
539 while ((findev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, findev)) != NULL) { 537 dev2 = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn) + 2,
540 if ((findev->vendor == dev->vendor) && 538 PCI_FUNC(dev->devfn)));
541 (findev->device == dev->device) && 539 if (dev2 != NULL &&
542 (PCI_SLOT(findev->devfn) & 2)) { 540 dev2->vendor == dev->vendor &&
543 if (findev->irq != dev->irq) { 541 dev2->device == dev->device) {
544 findev->irq = dev->irq; 542 int ret;
545 } 543
546 ret = ide_setup_pci_devices(dev, findev, d); 544 if (dev2->irq != dev->irq) {
547 if (ret < 0) 545 dev2->irq = dev->irq;
548 pci_dev_put(findev); 546
549 return ret; 547 printk(KERN_WARNING "%s: PCI config space "
548 "interrupt fixed.\n", d->name);
550 } 549 }
550
551 ret = ide_setup_pci_devices(dev, dev2, d);
552 if (ret < 0)
553 pci_dev_put(dev2);
554 return ret;
551 } 555 }
552 } 556 }
553 return ide_setup_pci_device(dev, d); 557 return ide_setup_pci_device(dev, d);
554} 558}
555 559
556static int __devinit init_setup_pdc20276(struct pci_dev *dev, 560static int __devinit init_setup_pdc20276(struct pci_dev *dev, ide_pci_device_t *d)
557 ide_pci_device_t *d)
558{ 561{
559 if ((dev->bus->self) && 562 struct pci_dev *bridge = dev->bus->self;
560 (dev->bus->self->vendor == PCI_VENDOR_ID_INTEL) && 563
561 ((dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960) || 564 if (bridge != NULL &&
562 (dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960RM))) { 565 bridge->vendor == PCI_VENDOR_ID_INTEL &&
563 printk(KERN_INFO "ide: Skipping Promise PDC20276 " 566 (bridge->device == PCI_DEVICE_ID_INTEL_I960 ||
564 "attached to I2O RAID controller.\n"); 567 bridge->device == PCI_DEVICE_ID_INTEL_I960RM)) {
568
569 printk(KERN_INFO "%s: attached to I2O RAID controller, "
570 "skipping.\n", d->name);
565 return -ENODEV; 571 return -ENODEV;
566 } 572 }
567 return ide_setup_pci_device(dev, d); 573 return ide_setup_pci_device(dev, d);
diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c
index e19a891171cb..b578307fad51 100644
--- a/drivers/ide/pci/pdc202xx_old.c
+++ b/drivers/ide/pci/pdc202xx_old.c
@@ -63,12 +63,11 @@ static const char *pdc_quirk_drives[] = {
63 63
64static void pdc_old_disable_66MHz_clock(ide_hwif_t *); 64static void pdc_old_disable_66MHz_clock(ide_hwif_t *);
65 65
66static int pdc202xx_tune_chipset (ide_drive_t *drive, u8 xferspeed) 66static int pdc202xx_tune_chipset(ide_drive_t *drive, const u8 speed)
67{ 67{
68 ide_hwif_t *hwif = HWIF(drive); 68 ide_hwif_t *hwif = HWIF(drive);
69 struct pci_dev *dev = hwif->pci_dev; 69 struct pci_dev *dev = hwif->pci_dev;
70 u8 drive_pci = 0x60 + (drive->dn << 2); 70 u8 drive_pci = 0x60 + (drive->dn << 2);
71 u8 speed = ide_rate_filter(drive, xferspeed);
72 71
73 u8 AP = 0, BP = 0, CP = 0; 72 u8 AP = 0, BP = 0, CP = 0;
74 u8 TA = 0, TB = 0, TC = 0; 73 u8 TA = 0, TB = 0, TC = 0;
@@ -143,9 +142,8 @@ static int pdc202xx_tune_chipset (ide_drive_t *drive, u8 xferspeed)
143 return ide_config_drive_speed(drive, speed); 142 return ide_config_drive_speed(drive, speed);
144} 143}
145 144
146static void pdc202xx_tune_drive(ide_drive_t *drive, u8 pio) 145static void pdc202xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
147{ 146{
148 pio = ide_get_best_pio_mode(drive, pio, 4);
149 pdc202xx_tune_chipset(drive, XFER_PIO_0 + pio); 147 pdc202xx_tune_chipset(drive, XFER_PIO_0 + pio);
150} 148}
151 149
@@ -191,7 +189,7 @@ static int pdc202xx_config_drive_xfer_rate (ide_drive_t *drive)
191 return 0; 189 return 0;
192 190
193 if (ide_use_fast_pio(drive)) 191 if (ide_use_fast_pio(drive))
194 pdc202xx_tune_drive(drive, 255); 192 ide_set_max_pio(drive);
195 193
196 return -1; 194 return -1;
197} 195}
@@ -307,10 +305,11 @@ static void pdc202xx_reset (ide_drive_t *drive)
307{ 305{
308 ide_hwif_t *hwif = HWIF(drive); 306 ide_hwif_t *hwif = HWIF(drive);
309 ide_hwif_t *mate = hwif->mate; 307 ide_hwif_t *mate = hwif->mate;
310 308
311 pdc202xx_reset_host(hwif); 309 pdc202xx_reset_host(hwif);
312 pdc202xx_reset_host(mate); 310 pdc202xx_reset_host(mate);
313 pdc202xx_tune_drive(drive, 255); 311
312 ide_set_max_pio(drive);
314} 313}
315 314
316static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev, 315static unsigned int __devinit init_chipset_pdc202xx(struct pci_dev *dev,
@@ -329,7 +328,9 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
329 hwif->rqsize = 256; 328 hwif->rqsize = 256;
330 329
331 hwif->autodma = 0; 330 hwif->autodma = 0;
332 hwif->tuneproc = &pdc202xx_tune_drive; 331
332 hwif->set_pio_mode = &pdc202xx_set_pio_mode;
333
333 hwif->quirkproc = &pdc202xx_quirkproc; 334 hwif->quirkproc = &pdc202xx_quirkproc;
334 335
335 if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246) 336 if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246)
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c
index 5cfa9378bbb8..fd8214a7ab98 100644
--- a/drivers/ide/pci/piix.c
+++ b/drivers/ide/pci/piix.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/piix.c Version 0.51 Jul 6, 2007 2 * linux/drivers/ide/pci/piix.c Version 0.52 Jul 14, 2007
3 * 3 *
4 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer 4 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer
5 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org> 5 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
@@ -17,11 +17,11 @@
17 * 41 17 * 41
18 * 43 18 * 43
19 * 19 *
20 * | PIO 0 | c0 | 80 | 0 | piix_tune_drive(drive, 0); 20 * | PIO 0 | c0 | 80 | 0 |
21 * | PIO 2 | SW2 | d0 | 90 | 4 | piix_tune_drive(drive, 2); 21 * | PIO 2 | SW2 | d0 | 90 | 4 |
22 * | PIO 3 | MW1 | e1 | a1 | 9 | piix_tune_drive(drive, 3); 22 * | PIO 3 | MW1 | e1 | a1 | 9 |
23 * | PIO 4 | MW2 | e3 | a3 | b | piix_tune_drive(drive, 4); 23 * | PIO 4 | MW2 | e3 | a3 | b |
24 * 24 *
25 * sitre = word40 & 0x4000; primary 25 * sitre = word40 & 0x4000; primary
26 * sitre = word42 & 0x4000; secondary 26 * sitre = word42 & 0x4000; secondary
27 * 27 *
@@ -204,16 +204,16 @@ static void piix_tune_pio (ide_drive_t *drive, u8 pio)
204} 204}
205 205
206/** 206/**
207 * piix_tune_drive - tune a drive attached to PIIX 207 * piix_set_pio_mode - set PIO mode
208 * @drive: drive to tune 208 * @drive: drive to tune
209 * @pio: desired PIO mode 209 * @pio: desired PIO mode
210 * 210 *
211 * Set the drive's PIO mode (might be useful if drive is not registered 211 * Set the drive's PIO mode (might be useful if drive is not registered
212 * in CMOS for any reason). 212 * in CMOS for any reason).
213 */ 213 */
214static void piix_tune_drive (ide_drive_t *drive, u8 pio) 214
215static void piix_set_pio_mode(ide_drive_t *drive, const u8 pio)
215{ 216{
216 pio = ide_get_best_pio_mode(drive, pio, 4);
217 piix_tune_pio(drive, pio); 217 piix_tune_pio(drive, pio);
218 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio); 218 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
219} 219}
@@ -221,19 +221,18 @@ static void piix_tune_drive (ide_drive_t *drive, u8 pio)
221/** 221/**
222 * piix_tune_chipset - tune a PIIX interface 222 * piix_tune_chipset - tune a PIIX interface
223 * @drive: IDE drive to tune 223 * @drive: IDE drive to tune
224 * @xferspeed: speed to configure 224 * @speed: speed to configure
225 * 225 *
226 * Set a PIIX interface channel to the desired speeds. This involves 226 * Set a PIIX interface channel to the desired speeds. This involves
227 * requires the right timing data into the PIIX configuration space 227 * requires the right timing data into the PIIX configuration space
228 * then setting the drive parameters appropriately 228 * then setting the drive parameters appropriately
229 */ 229 */
230 230
231static int piix_tune_chipset (ide_drive_t *drive, u8 xferspeed) 231static int piix_tune_chipset(ide_drive_t *drive, const u8 speed)
232{ 232{
233 ide_hwif_t *hwif = HWIF(drive); 233 ide_hwif_t *hwif = HWIF(drive);
234 struct pci_dev *dev = hwif->pci_dev; 234 struct pci_dev *dev = hwif->pci_dev;
235 u8 maslave = hwif->channel ? 0x42 : 0x40; 235 u8 maslave = hwif->channel ? 0x42 : 0x40;
236 u8 speed = ide_rate_filter(drive, xferspeed);
237 int a_speed = 3 << (drive->dn * 4); 236 int a_speed = 3 << (drive->dn * 4);
238 int u_flag = 1 << drive->dn; 237 int u_flag = 1 << drive->dn;
239 int v_flag = 0x01 << drive->dn; 238 int v_flag = 0x01 << drive->dn;
@@ -260,11 +259,6 @@ static int piix_tune_chipset (ide_drive_t *drive, u8 xferspeed)
260 case XFER_MW_DMA_2: 259 case XFER_MW_DMA_2:
261 case XFER_MW_DMA_1: 260 case XFER_MW_DMA_1:
262 case XFER_SW_DMA_2: break; 261 case XFER_SW_DMA_2: break;
263 case XFER_PIO_4:
264 case XFER_PIO_3:
265 case XFER_PIO_2:
266 case XFER_PIO_1:
267 case XFER_PIO_0: break;
268 default: return -1; 262 default: return -1;
269 } 263 }
270 264
@@ -294,10 +288,7 @@ static int piix_tune_chipset (ide_drive_t *drive, u8 xferspeed)
294 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); 288 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
295 } 289 }
296 290
297 if (speed > XFER_PIO_4) 291 piix_tune_pio(drive, piix_dma_2_pio(speed));
298 piix_tune_pio(drive, piix_dma_2_pio(speed));
299 else
300 piix_tune_pio(drive, speed - XFER_PIO_0);
301 292
302 return ide_config_drive_speed(drive, speed); 293 return ide_config_drive_speed(drive, speed);
303} 294}
@@ -318,7 +309,7 @@ static int piix_config_drive_xfer_rate (ide_drive_t *drive)
318 return 0; 309 return 0;
319 310
320 if (ide_use_fast_pio(drive)) 311 if (ide_use_fast_pio(drive))
321 piix_tune_drive(drive, 255); 312 ide_set_max_pio(drive);
322 313
323 return -1; 314 return -1;
324} 315}
@@ -455,7 +446,8 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif)
455 } 446 }
456 447
457 hwif->autodma = 0; 448 hwif->autodma = 0;
458 hwif->tuneproc = &piix_tune_drive; 449
450 hwif->set_pio_mode = &piix_set_pio_mode;
459 hwif->speedproc = &piix_tune_chipset; 451 hwif->speedproc = &piix_tune_chipset;
460 hwif->drives[0].autotune = 1; 452 hwif->drives[0].autotune = 1;
461 hwif->drives[1].autotune = 1; 453 hwif->drives[1].autotune = 1;
diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c
index 9bdc9694d50d..79ecab689489 100644
--- a/drivers/ide/pci/sc1200.c
+++ b/drivers/ide/pci/sc1200.c
@@ -138,7 +138,7 @@ out:
138 return mask; 138 return mask;
139} 139}
140 140
141static int sc1200_tune_chipset(ide_drive_t *drive, u8 mode) 141static int sc1200_tune_chipset(ide_drive_t *drive, const u8 mode)
142{ 142{
143 ide_hwif_t *hwif = HWIF(drive); 143 ide_hwif_t *hwif = HWIF(drive);
144 int unit = drive->select.b.unit; 144 int unit = drive->select.b.unit;
@@ -146,25 +146,11 @@ static int sc1200_tune_chipset(ide_drive_t *drive, u8 mode)
146 unsigned short pci_clock; 146 unsigned short pci_clock;
147 unsigned int basereg = hwif->channel ? 0x50 : 0x40; 147 unsigned int basereg = hwif->channel ? 0x50 : 0x40;
148 148
149 mode = ide_rate_filter(drive, mode);
150
151 /* 149 /*
152 * Tell the drive to switch to the new mode; abort on failure. 150 * Tell the drive to switch to the new mode; abort on failure.
153 */ 151 */
154 if (sc1200_set_xfer_mode(drive, mode)) { 152 if (sc1200_set_xfer_mode(drive, mode))
155 printk("SC1200: set xfer mode failure\n");
156 return 1; /* failure */ 153 return 1; /* failure */
157 }
158
159 switch (mode) {
160 case XFER_PIO_4:
161 case XFER_PIO_3:
162 case XFER_PIO_2:
163 case XFER_PIO_1:
164 case XFER_PIO_0:
165 sc1200_tunepio(drive, mode - XFER_PIO_0);
166 return 0;
167 }
168 154
169 pci_clock = sc1200_get_pci_clock(); 155 pci_clock = sc1200_get_pci_clock();
170 156
@@ -274,19 +260,20 @@ static int sc1200_ide_dma_end (ide_drive_t *drive)
274} 260}
275 261
276/* 262/*
277 * sc1200_tuneproc() handles selection/setting of PIO modes 263 * sc1200_set_pio_mode() handles setting of PIO modes
278 * for both the chipset and drive. 264 * for both the chipset and drive.
279 * 265 *
280 * All existing BIOSs for this chipset guarantee that all drives 266 * All existing BIOSs for this chipset guarantee that all drives
281 * will have valid default PIO timings set up before we get here. 267 * will have valid default PIO timings set up before we get here.
282 */ 268 */
283static void sc1200_tuneproc (ide_drive_t *drive, byte pio) /* mode=255 means "autotune" */ 269
270static void sc1200_set_pio_mode(ide_drive_t *drive, const u8 pio)
284{ 271{
285 ide_hwif_t *hwif = HWIF(drive); 272 ide_hwif_t *hwif = HWIF(drive);
286 int mode = -1; 273 int mode = -1;
287 274
288 /* 275 /*
289 * bad abuse of ->tuneproc interface 276 * bad abuse of ->set_pio_mode interface
290 */ 277 */
291 switch (pio) { 278 switch (pio) {
292 case 200: mode = XFER_UDMA_0; break; 279 case 200: mode = XFER_UDMA_0; break;
@@ -304,9 +291,6 @@ static void sc1200_tuneproc (ide_drive_t *drive, byte pio) /* mode=255 means "au
304 return; 291 return;
305 } 292 }
306 293
307 pio = ide_get_best_pio_mode(drive, pio, 4);
308 printk("SC1200: %s: setting PIO mode%d\n", drive->name, pio);
309
310 if (sc1200_set_xfer_mode(drive, XFER_PIO_0 + pio) == 0) 294 if (sc1200_set_xfer_mode(drive, XFER_PIO_0 + pio) == 0)
311 sc1200_tunepio(drive, pio); 295 sc1200_tunepio(drive, pio);
312} 296}
@@ -422,7 +406,8 @@ static void __devinit init_hwif_sc1200 (ide_hwif_t *hwif)
422 hwif->ide_dma_end = &sc1200_ide_dma_end; 406 hwif->ide_dma_end = &sc1200_ide_dma_end;
423 if (!noautodma) 407 if (!noautodma)
424 hwif->autodma = 1; 408 hwif->autodma = 1;
425 hwif->tuneproc = &sc1200_tuneproc; 409
410 hwif->set_pio_mode = &sc1200_set_pio_mode;
426 hwif->speedproc = &sc1200_tune_chipset; 411 hwif->speedproc = &sc1200_tune_chipset;
427 } 412 }
428 hwif->atapi_dma = 1; 413 hwif->atapi_dma = 1;
@@ -438,6 +423,7 @@ static ide_pci_device_t sc1200_chipset __devinitdata = {
438 .init_hwif = init_hwif_sc1200, 423 .init_hwif = init_hwif_sc1200,
439 .autodma = AUTODMA, 424 .autodma = AUTODMA,
440 .bootable = ON_BOARD, 425 .bootable = ON_BOARD,
426 .host_flags = IDE_HFLAG_ABUSE_DMA_MODES,
441 .pio_mask = ATA_PIO4, 427 .pio_mask = ATA_PIO4,
442}; 428};
443 429
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c
index eeb0a6d434aa..66a526e0ece4 100644
--- a/drivers/ide/pci/scc_pata.c
+++ b/drivers/ide/pci/scc_pata.c
@@ -221,9 +221,8 @@ static void scc_tune_pio(ide_drive_t *drive, const u8 pio)
221 out_be32((void __iomem *)pioct_port, reg); 221 out_be32((void __iomem *)pioct_port, reg);
222} 222}
223 223
224static void scc_tuneproc(ide_drive_t *drive, u8 pio) 224static void scc_set_pio_mode(ide_drive_t *drive, const u8 pio)
225{ 225{
226 pio = ide_get_best_pio_mode(drive, pio, 4);
227 scc_tune_pio(drive, pio); 226 scc_tune_pio(drive, pio);
228 ide_config_drive_speed(drive, XFER_PIO_0 + pio); 227 ide_config_drive_speed(drive, XFER_PIO_0 + pio);
229} 228}
@@ -231,16 +230,15 @@ static void scc_tuneproc(ide_drive_t *drive, u8 pio)
231/** 230/**
232 * scc_tune_chipset - tune a drive DMA mode 231 * scc_tune_chipset - tune a drive DMA mode
233 * @drive: Drive to set up 232 * @drive: Drive to set up
234 * @xferspeed: speed we want to achieve 233 * @speed: speed we want to achieve
235 * 234 *
236 * Load the timing settings for this device mode into the 235 * Load the timing settings for this device mode into the
237 * controller. 236 * controller.
238 */ 237 */
239 238
240static int scc_tune_chipset(ide_drive_t *drive, byte xferspeed) 239static int scc_tune_chipset(ide_drive_t *drive, const u8 speed)
241{ 240{
242 ide_hwif_t *hwif = HWIF(drive); 241 ide_hwif_t *hwif = HWIF(drive);
243 u8 speed = ide_rate_filter(drive, xferspeed);
244 struct scc_ports *ports = ide_get_hwifdata(hwif); 242 struct scc_ports *ports = ide_get_hwifdata(hwif);
245 unsigned long ctl_base = ports->ctl; 243 unsigned long ctl_base = ports->ctl;
246 unsigned long cckctrl_port = ctl_base + 0xff0; 244 unsigned long cckctrl_port = ctl_base + 0xff0;
@@ -272,13 +270,6 @@ static int scc_tune_chipset(ide_drive_t *drive, byte xferspeed)
272 case XFER_UDMA_0: 270 case XFER_UDMA_0:
273 idx = speed - XFER_UDMA_0; 271 idx = speed - XFER_UDMA_0;
274 break; 272 break;
275 case XFER_PIO_4:
276 case XFER_PIO_3:
277 case XFER_PIO_2:
278 case XFER_PIO_1:
279 case XFER_PIO_0:
280 scc_tune_pio(drive, speed - XFER_PIO_0);
281 return ide_config_drive_speed(drive, speed);
282 default: 273 default:
283 return 1; 274 return 1;
284 } 275 }
@@ -317,7 +308,7 @@ static int scc_config_drive_for_dma(ide_drive_t *drive)
317 return 0; 308 return 0;
318 309
319 if (ide_use_fast_pio(drive)) 310 if (ide_use_fast_pio(drive))
320 scc_tuneproc(drive, 255); 311 ide_set_max_pio(drive);
321 312
322 return -1; 313 return -1;
323} 314}
@@ -718,7 +709,7 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif)
718 hwif->dma_setup = scc_dma_setup; 709 hwif->dma_setup = scc_dma_setup;
719 hwif->ide_dma_end = scc_ide_dma_end; 710 hwif->ide_dma_end = scc_ide_dma_end;
720 hwif->speedproc = scc_tune_chipset; 711 hwif->speedproc = scc_tune_chipset;
721 hwif->tuneproc = scc_tuneproc; 712 hwif->set_pio_mode = scc_set_pio_mode;
722 hwif->ide_dma_check = scc_config_drive_for_dma; 713 hwif->ide_dma_check = scc_config_drive_for_dma;
723 hwif->ide_dma_test_irq = scc_dma_test_irq; 714 hwif->ide_dma_test_irq = scc_dma_test_irq;
724 hwif->udma_filter = scc_udma_filter; 715 hwif->udma_filter = scc_udma_filter;
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c
index 9fead2e7d4c8..0351cf210427 100644
--- a/drivers/ide/pci/serverworks.c
+++ b/drivers/ide/pci/serverworks.c
@@ -145,7 +145,7 @@ static void svwks_tune_pio(ide_drive_t *drive, const u8 pio)
145 } 145 }
146} 146}
147 147
148static int svwks_tune_chipset (ide_drive_t *drive, u8 xferspeed) 148static int svwks_tune_chipset(ide_drive_t *drive, const u8 speed)
149{ 149{
150 static const u8 udma_modes[] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05 }; 150 static const u8 udma_modes[] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05 };
151 static const u8 dma_modes[] = { 0x77, 0x21, 0x20 }; 151 static const u8 dma_modes[] = { 0x77, 0x21, 0x20 };
@@ -153,16 +153,10 @@ static int svwks_tune_chipset (ide_drive_t *drive, u8 xferspeed)
153 153
154 ide_hwif_t *hwif = HWIF(drive); 154 ide_hwif_t *hwif = HWIF(drive);
155 struct pci_dev *dev = hwif->pci_dev; 155 struct pci_dev *dev = hwif->pci_dev;
156 u8 speed = ide_rate_filter(drive, xferspeed);
157 u8 unit = (drive->select.b.unit & 0x01); 156 u8 unit = (drive->select.b.unit & 0x01);
158 157
159 u8 ultra_enable = 0, ultra_timing = 0, dma_timing = 0; 158 u8 ultra_enable = 0, ultra_timing = 0, dma_timing = 0;
160 159
161 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
162 svwks_tune_pio(drive, speed - XFER_PIO_0);
163 return ide_config_drive_speed(drive, speed);
164 }
165
166 /* If we are about to put a disk into UDMA mode we screwed up. 160 /* If we are about to put a disk into UDMA mode we screwed up.
167 Our code assumes we never _ever_ do this on an OSB4 */ 161 Our code assumes we never _ever_ do this on an OSB4 */
168 162
@@ -203,9 +197,8 @@ static int svwks_tune_chipset (ide_drive_t *drive, u8 xferspeed)
203 return (ide_config_drive_speed(drive, speed)); 197 return (ide_config_drive_speed(drive, speed));
204} 198}
205 199
206static void svwks_tune_drive (ide_drive_t *drive, u8 pio) 200static void svwks_set_pio_mode(ide_drive_t *drive, const u8 pio)
207{ 201{
208 pio = ide_get_best_pio_mode(drive, pio, 4);
209 svwks_tune_pio(drive, pio); 202 svwks_tune_pio(drive, pio);
210 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio); 203 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
211} 204}
@@ -218,7 +211,7 @@ static int svwks_config_drive_xfer_rate (ide_drive_t *drive)
218 return 0; 211 return 0;
219 212
220 if (ide_use_fast_pio(drive)) 213 if (ide_use_fast_pio(drive))
221 svwks_tune_drive(drive, 255); 214 ide_set_max_pio(drive);
222 215
223 return -1; 216 return -1;
224} 217}
@@ -390,7 +383,7 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
390 if (!hwif->irq) 383 if (!hwif->irq)
391 hwif->irq = hwif->channel ? 15 : 14; 384 hwif->irq = hwif->channel ? 15 : 14;
392 385
393 hwif->tuneproc = &svwks_tune_drive; 386 hwif->set_pio_mode = &svwks_set_pio_mode;
394 hwif->speedproc = &svwks_tune_chipset; 387 hwif->speedproc = &svwks_tune_chipset;
395 hwif->udma_filter = &svwks_udma_filter; 388 hwif->udma_filter = &svwks_udma_filter;
396 389
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c
index 57145767c3df..c292e1de1d56 100644
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -34,6 +34,8 @@
34 34
35#include <linux/ide.h> 35#include <linux/ide.h>
36 36
37#define DRV_NAME "SGIIOC4"
38
37/* IOC4 Specific Definitions */ 39/* IOC4 Specific Definitions */
38#define IOC4_CMD_OFFSET 0x100 40#define IOC4_CMD_OFFSET 0x100
39#define IOC4_CTRL_OFFSET 0x120 41#define IOC4_CTRL_OFFSET 0x120
@@ -289,15 +291,26 @@ static void sgiioc4_dma_off_quietly(ide_drive_t *drive)
289 drive->hwif->dma_host_off(drive); 291 drive->hwif->dma_host_off(drive);
290} 292}
291 293
294static int sgiioc4_speedproc(ide_drive_t *drive, const u8 speed)
295{
296 if (speed != XFER_MW_DMA_2)
297 return 1;
298
299 return ide_config_drive_speed(drive, speed);
300}
301
292static int sgiioc4_ide_dma_check(ide_drive_t *drive) 302static int sgiioc4_ide_dma_check(ide_drive_t *drive)
293{ 303{
294 /* FIXME: check for available DMA modes */ 304 if (ide_tune_dma(drive))
295 if (ide_config_drive_speed(drive, XFER_MW_DMA_2) != 0) {
296 printk(KERN_WARNING "%s: couldn't set MWDMA2 mode, "
297 "using PIO instead\n", drive->name);
298 return -1;
299 } else
300 return 0; 305 return 0;
306
307 /*
308 * ->set_pio_mode is not implemented currently
309 * so this is just for the completness
310 */
311 ide_set_max_pio(drive);
312
313 return -1;
301} 314}
302 315
303/* returns 1 if dma irq issued, 0 otherwise */ 316/* returns 1 if dma irq issued, 0 otherwise */
@@ -353,7 +366,7 @@ sgiioc4_INB(unsigned long port)
353} 366}
354 367
355/* Creates a dma map for the scatter-gather list entries */ 368/* Creates a dma map for the scatter-gather list entries */
356static void __devinit 369static int __devinit
357ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base) 370ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base)
358{ 371{
359 void __iomem *virt_dma_base; 372 void __iomem *virt_dma_base;
@@ -369,7 +382,7 @@ ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base)
369 "ALREADY in use\n", 382 "ALREADY in use\n",
370 __FUNCTION__, hwif->name, (void *) dma_base, 383 __FUNCTION__, hwif->name, (void *) dma_base,
371 (void *) dma_base + num_ports - 1); 384 (void *) dma_base + num_ports - 1);
372 goto dma_alloc_failure; 385 return -1;
373 } 386 }
374 387
375 virt_dma_base = ioremap(dma_base, num_ports); 388 virt_dma_base = ioremap(dma_base, num_ports);
@@ -395,7 +408,7 @@ ide_dma_sgiioc4(ide_hwif_t * hwif, unsigned long dma_base)
395 408
396 if (pad) { 409 if (pad) {
397 ide_set_hwifdata(hwif, pad); 410 ide_set_hwifdata(hwif, pad);
398 return; 411 return 0;
399 } 412 }
400 413
401 pci_free_consistent(hwif->pci_dev, 414 pci_free_consistent(hwif->pci_dev,
@@ -413,10 +426,7 @@ dma_pci_alloc_failure:
413dma_remap_failure: 426dma_remap_failure:
414 release_mem_region(dma_base, num_ports); 427 release_mem_region(dma_base, num_ports);
415 428
416dma_alloc_failure: 429 return -1;
417 /* Disable DMA because we couldnot allocate any DMA maps */
418 hwif->autodma = 0;
419 hwif->atapi_dma = 0;
420} 430}
421 431
422/* Initializes the IOC4 DMA Engine */ 432/* Initializes the IOC4 DMA Engine */
@@ -581,14 +591,11 @@ static void __devinit
581ide_init_sgiioc4(ide_hwif_t * hwif) 591ide_init_sgiioc4(ide_hwif_t * hwif)
582{ 592{
583 hwif->mmio = 1; 593 hwif->mmio = 1;
584 hwif->autodma = 1;
585 hwif->atapi_dma = 1; 594 hwif->atapi_dma = 1;
586 hwif->ultra_mask = 0x0; /* Disable Ultra DMA */ 595 hwif->mwdma_mask = 0x04;
587 hwif->mwdma_mask = 0x2; /* Multimode-2 DMA */
588 hwif->swdma_mask = 0x2;
589 hwif->pio_mask = 0x00; 596 hwif->pio_mask = 0x00;
590 hwif->tuneproc = NULL; /* Sets timing for PIO mode */ 597 hwif->set_pio_mode = NULL; /* Sets timing for PIO mode */
591 hwif->speedproc = NULL; /* Sets timing for DMA &/or PIO modes */ 598 hwif->speedproc = &sgiioc4_speedproc;
592 hwif->selectproc = NULL;/* Use the default routine to select drive */ 599 hwif->selectproc = NULL;/* Use the default routine to select drive */
593 hwif->reset_poll = NULL;/* No HBA specific reset_poll needed */ 600 hwif->reset_poll = NULL;/* No HBA specific reset_poll needed */
594 hwif->pre_reset = NULL; /* No HBA specific pre_set needed */ 601 hwif->pre_reset = NULL; /* No HBA specific pre_set needed */
@@ -615,7 +622,7 @@ ide_init_sgiioc4(ide_hwif_t * hwif)
615} 622}
616 623
617static int __devinit 624static int __devinit
618sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d) 625sgiioc4_ide_setup_pci_device(struct pci_dev *dev)
619{ 626{
620 unsigned long cmd_base, dma_base, irqport; 627 unsigned long cmd_base, dma_base, irqport;
621 unsigned long bar0, cmd_phys_base, ctl; 628 unsigned long bar0, cmd_phys_base, ctl;
@@ -632,7 +639,8 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d)
632 break; 639 break;
633 } 640 }
634 if (h == MAX_HWIFS) { 641 if (h == MAX_HWIFS) {
635 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", d->name); 642 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n",
643 DRV_NAME);
636 return -ENOMEM; 644 return -ENOMEM;
637 } 645 }
638 646
@@ -641,7 +649,7 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d)
641 virt_base = ioremap(bar0, pci_resource_len(dev, 0)); 649 virt_base = ioremap(bar0, pci_resource_len(dev, 0));
642 if (virt_base == NULL) { 650 if (virt_base == NULL) {
643 printk(KERN_ERR "%s: Unable to remap BAR 0 address: 0x%lx\n", 651 printk(KERN_ERR "%s: Unable to remap BAR 0 address: 0x%lx\n",
644 d->name, bar0); 652 DRV_NAME, bar0);
645 return -ENOMEM; 653 return -ENOMEM;
646 } 654 }
647 cmd_base = (unsigned long) virt_base + IOC4_CMD_OFFSET; 655 cmd_base = (unsigned long) virt_base + IOC4_CMD_OFFSET;
@@ -672,7 +680,6 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d)
672 hwif->chipset = ide_pci; 680 hwif->chipset = ide_pci;
673 hwif->pci_dev = dev; 681 hwif->pci_dev = dev;
674 hwif->channel = 0; /* Single Channel chip */ 682 hwif->channel = 0; /* Single Channel chip */
675 hwif->cds = (struct ide_pci_device_s *) d;
676 hwif->gendev.parent = &dev->dev;/* setup proper ancestral information */ 683 hwif->gendev.parent = &dev->dev;/* setup proper ancestral information */
677 684
678 /* The IOC4 uses MMIO rather than Port IO. */ 685 /* The IOC4 uses MMIO rather than Port IO. */
@@ -683,11 +690,14 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d)
683 690
684 ide_init_sgiioc4(hwif); 691 ide_init_sgiioc4(hwif);
685 692
686 if (dma_base) 693 hwif->autodma = 0;
687 ide_dma_sgiioc4(hwif, dma_base); 694
688 else 695 if (dma_base && ide_dma_sgiioc4(hwif, dma_base) == 0) {
696 hwif->autodma = 1;
697 hwif->drives[1].autodma = hwif->drives[0].autodma = 1;
698 } else
689 printk(KERN_INFO "%s: %s Bus-Master DMA disabled\n", 699 printk(KERN_INFO "%s: %s Bus-Master DMA disabled\n",
690 hwif->name, d->name); 700 hwif->name, DRV_NAME);
691 701
692 if (probe_hwif_init(hwif)) 702 if (probe_hwif_init(hwif))
693 return -EIO; 703 return -EIO;
@@ -699,7 +709,7 @@ sgiioc4_ide_setup_pci_device(struct pci_dev *dev, ide_pci_device_t * d)
699} 709}
700 710
701static unsigned int __devinit 711static unsigned int __devinit
702pci_init_sgiioc4(struct pci_dev *dev, ide_pci_device_t * d) 712pci_init_sgiioc4(struct pci_dev *dev)
703{ 713{
704 unsigned int class_rev; 714 unsigned int class_rev;
705 int ret; 715 int ret;
@@ -707,30 +717,20 @@ pci_init_sgiioc4(struct pci_dev *dev, ide_pci_device_t * d)
707 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev); 717 pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
708 class_rev &= 0xff; 718 class_rev &= 0xff;
709 printk(KERN_INFO "%s: IDE controller at PCI slot %s, revision %d\n", 719 printk(KERN_INFO "%s: IDE controller at PCI slot %s, revision %d\n",
710 d->name, pci_name(dev), class_rev); 720 DRV_NAME, pci_name(dev), class_rev);
711 if (class_rev < IOC4_SUPPORTED_FIRMWARE_REV) { 721 if (class_rev < IOC4_SUPPORTED_FIRMWARE_REV) {
712 printk(KERN_ERR "Skipping %s IDE controller in slot %s: " 722 printk(KERN_ERR "Skipping %s IDE controller in slot %s: "
713 "firmware is obsolete - please upgrade to revision" 723 "firmware is obsolete - please upgrade to "
714 "46 or higher\n", d->name, pci_name(dev)); 724 "revision46 or higher\n",
725 DRV_NAME, pci_name(dev));
715 ret = -EAGAIN; 726 ret = -EAGAIN;
716 goto out; 727 goto out;
717 } 728 }
718 ret = sgiioc4_ide_setup_pci_device(dev, d); 729 ret = sgiioc4_ide_setup_pci_device(dev);
719out: 730out:
720 return ret; 731 return ret;
721} 732}
722 733
723static ide_pci_device_t sgiioc4_chipset __devinitdata = {
724 /* Channel 0 */
725 .name = "SGIIOC4",
726 .init_hwif = ide_init_sgiioc4,
727 .init_dma = ide_dma_sgiioc4,
728 .autodma = AUTODMA,
729 /* SGI IOC4 doesn't have enablebits. */
730 .bootable = ON_BOARD,
731 .host_flags = IDE_HFLAG_SINGLE,
732};
733
734int 734int
735ioc4_ide_attach_one(struct ioc4_driver_data *idd) 735ioc4_ide_attach_one(struct ioc4_driver_data *idd)
736{ 736{
@@ -740,7 +740,7 @@ ioc4_ide_attach_one(struct ioc4_driver_data *idd)
740 if (idd->idd_variant == IOC4_VARIANT_PCI_RT) 740 if (idd->idd_variant == IOC4_VARIANT_PCI_RT)
741 return 0; 741 return 0;
742 742
743 return pci_init_sgiioc4(idd->idd_pdev, &sgiioc4_chipset); 743 return pci_init_sgiioc4(idd->idd_pdev);
744} 744}
745 745
746static struct ioc4_submodule ioc4_ide_submodule = { 746static struct ioc4_submodule ioc4_ide_submodule = {
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index 50f6d172ef77..5d1e5e52a044 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/siimage.c Version 1.15 Jun 29 2007 2 * linux/drivers/ide/pci/siimage.c Version 1.16 Jul 13 2007
3 * 3 *
4 * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2003 Red Hat <alan@redhat.com> 5 * Copyright (C) 2003 Red Hat <alan@redhat.com>
@@ -185,7 +185,12 @@ static void sil_tune_pio(ide_drive_t *drive, u8 pio)
185 u16 speedp = 0; 185 u16 speedp = 0;
186 unsigned long addr = siimage_seldev(drive, 0x04); 186 unsigned long addr = siimage_seldev(drive, 0x04);
187 unsigned long tfaddr = siimage_selreg(hwif, 0x02); 187 unsigned long tfaddr = siimage_selreg(hwif, 0x02);
188 unsigned long base = (unsigned long)hwif->hwif_data;
188 u8 tf_pio = pio; 189 u8 tf_pio = pio;
190 u8 addr_mask = hwif->channel ? (hwif->mmio ? 0xF4 : 0x84)
191 : (hwif->mmio ? 0xB4 : 0x80);
192 u8 mode = 0;
193 u8 unit = drive->select.b.unit;
189 194
190 /* trim *taskfile* PIO to the slowest of the master/slave */ 195 /* trim *taskfile* PIO to the slowest of the master/slave */
191 if (pair->present) { 196 if (pair->present) {
@@ -207,6 +212,11 @@ static void sil_tune_pio(ide_drive_t *drive, u8 pio)
207 hwif->OUTW(hwif->INW(tfaddr-2)|0x200, tfaddr-2); 212 hwif->OUTW(hwif->INW(tfaddr-2)|0x200, tfaddr-2);
208 else 213 else
209 hwif->OUTW(hwif->INW(tfaddr-2)&~0x200, tfaddr-2); 214 hwif->OUTW(hwif->INW(tfaddr-2)&~0x200, tfaddr-2);
215
216 mode = hwif->INB(base + addr_mask);
217 mode &= ~(unit ? 0x30 : 0x03);
218 mode |= (unit ? 0x10 : 0x01);
219 hwif->OUTB(mode, base + addr_mask);
210 } else { 220 } else {
211 pci_write_config_word(hwif->pci_dev, addr, speedp); 221 pci_write_config_word(hwif->pci_dev, addr, speedp);
212 pci_write_config_word(hwif->pci_dev, tfaddr, speedt); 222 pci_write_config_word(hwif->pci_dev, tfaddr, speedt);
@@ -216,12 +226,16 @@ static void sil_tune_pio(ide_drive_t *drive, u8 pio)
216 if (pio > 2) 226 if (pio > 2)
217 speedp |= 0x200; 227 speedp |= 0x200;
218 pci_write_config_word(hwif->pci_dev, tfaddr-2, speedp); 228 pci_write_config_word(hwif->pci_dev, tfaddr-2, speedp);
229
230 pci_read_config_byte(hwif->pci_dev, addr_mask, &mode);
231 mode &= ~(unit ? 0x30 : 0x03);
232 mode |= (unit ? 0x10 : 0x01);
233 pci_write_config_byte(hwif->pci_dev, addr_mask, mode);
219 } 234 }
220} 235}
221 236
222static void sil_tuneproc(ide_drive_t *drive, u8 pio) 237static void sil_set_pio_mode(ide_drive_t *drive, const u8 pio)
223{ 238{
224 pio = ide_get_best_pio_mode(drive, pio, 4);
225 sil_tune_pio(drive, pio); 239 sil_tune_pio(drive, pio);
226 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio); 240 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
227} 241}
@@ -229,14 +243,12 @@ static void sil_tuneproc(ide_drive_t *drive, u8 pio)
229/** 243/**
230 * siimage_tune_chipset - set controller timings 244 * siimage_tune_chipset - set controller timings
231 * @drive: Drive to set up 245 * @drive: Drive to set up
232 * @xferspeed: speed we want to achieve 246 * @speed: speed we want to achieve
233 * 247 *
234 * Tune the SII chipset for the desired mode. If we can't achieve 248 * Tune the SII chipset for the desired mode.
235 * the desired mode then tune for a lower one, but ultimately
236 * make the thing work.
237 */ 249 */
238 250
239static int siimage_tune_chipset (ide_drive_t *drive, byte xferspeed) 251static int siimage_tune_chipset(ide_drive_t *drive, const u8 speed)
240{ 252{
241 u8 ultra6[] = { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 }; 253 u8 ultra6[] = { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 };
242 u8 ultra5[] = { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01 }; 254 u8 ultra5[] = { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01 };
@@ -245,7 +257,6 @@ static int siimage_tune_chipset (ide_drive_t *drive, byte xferspeed)
245 ide_hwif_t *hwif = HWIF(drive); 257 ide_hwif_t *hwif = HWIF(drive);
246 u16 ultra = 0, multi = 0; 258 u16 ultra = 0, multi = 0;
247 u8 mode = 0, unit = drive->select.b.unit; 259 u8 mode = 0, unit = drive->select.b.unit;
248 u8 speed = ide_rate_filter(drive, xferspeed);
249 unsigned long base = (unsigned long)hwif->hwif_data; 260 unsigned long base = (unsigned long)hwif->hwif_data;
250 u8 scsc = 0, addr_mask = ((hwif->channel) ? 261 u8 scsc = 0, addr_mask = ((hwif->channel) ?
251 ((hwif->mmio) ? 0xF4 : 0x84) : 262 ((hwif->mmio) ? 0xF4 : 0x84) :
@@ -273,14 +284,6 @@ static int siimage_tune_chipset (ide_drive_t *drive, byte xferspeed)
273 scsc = is_sata(hwif) ? 1 : scsc; 284 scsc = is_sata(hwif) ? 1 : scsc;
274 285
275 switch(speed) { 286 switch(speed) {
276 case XFER_PIO_4:
277 case XFER_PIO_3:
278 case XFER_PIO_2:
279 case XFER_PIO_1:
280 case XFER_PIO_0:
281 sil_tune_pio(drive, speed - XFER_PIO_0);
282 mode |= ((unit) ? 0x10 : 0x01);
283 break;
284 case XFER_MW_DMA_2: 287 case XFER_MW_DMA_2:
285 case XFER_MW_DMA_1: 288 case XFER_MW_DMA_1:
286 case XFER_MW_DMA_0: 289 case XFER_MW_DMA_0:
@@ -331,7 +334,7 @@ static int siimage_config_drive_for_dma (ide_drive_t *drive)
331 return 0; 334 return 0;
332 335
333 if (ide_use_fast_pio(drive)) 336 if (ide_use_fast_pio(drive))
334 sil_tuneproc(drive, 255); 337 ide_set_max_pio(drive);
335 338
336 return -1; 339 return -1;
337} 340}
@@ -902,7 +905,7 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
902 905
903 hwif->resetproc = &siimage_reset; 906 hwif->resetproc = &siimage_reset;
904 hwif->speedproc = &siimage_tune_chipset; 907 hwif->speedproc = &siimage_tune_chipset;
905 hwif->tuneproc = &sil_tuneproc; 908 hwif->set_pio_mode = &sil_set_pio_mode;
906 hwif->reset_poll = &siimage_reset_poll; 909 hwif->reset_poll = &siimage_reset_poll;
907 hwif->pre_reset = &siimage_pre_reset; 910 hwif->pre_reset = &siimage_pre_reset;
908 hwif->udma_filter = &sil_udma_filter; 911 hwif->udma_filter = &sil_udma_filter;
diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c
index 26f24802d3e8..3e18899de631 100644
--- a/drivers/ide/pci/sis5513.c
+++ b/drivers/ide/pci/sis5513.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/sis5513.c Version 0.25 Jun 10, 2007 2 * linux/drivers/ide/pci/sis5513.c Version 0.27 Jul 14, 2007
3 * 3 *
4 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer 5 * Copyright (C) 2002 Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer
@@ -519,27 +519,18 @@ static void config_art_rwp_pio (ide_drive_t *drive, u8 pio)
519 } 519 }
520} 520}
521 521
522static int sis5513_tune_drive(ide_drive_t *drive, u8 pio) 522static void sis_set_pio_mode(ide_drive_t *drive, const u8 pio)
523{ 523{
524 pio = ide_get_best_pio_mode(drive, pio, 4);
525 config_art_rwp_pio(drive, pio); 524 config_art_rwp_pio(drive, pio);
526 return ide_config_drive_speed(drive, XFER_PIO_0 + pio); 525 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
527} 526}
528 527
529static void sis5513_tuneproc(ide_drive_t *drive, u8 pio) 528static int sis5513_tune_chipset(ide_drive_t *drive, const u8 speed)
530{
531 (void)sis5513_tune_drive(drive, pio);
532}
533
534static int sis5513_tune_chipset (ide_drive_t *drive, u8 xferspeed)
535{ 529{
536 ide_hwif_t *hwif = HWIF(drive); 530 ide_hwif_t *hwif = HWIF(drive);
537 struct pci_dev *dev = hwif->pci_dev; 531 struct pci_dev *dev = hwif->pci_dev;
538
539 u8 drive_pci, reg, speed;
540 u32 regdw; 532 u32 regdw;
541 533 u8 drive_pci, reg;
542 speed = ide_rate_filter(drive, xferspeed);
543 534
544 /* See config_art_rwp_pio for drive pci config registers */ 535 /* See config_art_rwp_pio for drive pci config registers */
545 drive_pci = 0x40; 536 drive_pci = 0x40;
@@ -582,9 +573,6 @@ static int sis5513_tune_chipset (ide_drive_t *drive, u8 xferspeed)
582 regdw |= (unsigned long)cycle_time_value[ATA_133][speed-XFER_UDMA_0] << 4; 573 regdw |= (unsigned long)cycle_time_value[ATA_133][speed-XFER_UDMA_0] << 4;
583 regdw |= (unsigned long)cvs_time_value[ATA_133][speed-XFER_UDMA_0] << 8; 574 regdw |= (unsigned long)cvs_time_value[ATA_133][speed-XFER_UDMA_0] << 8;
584 } else { 575 } else {
585 /* if ATA133 disable, we should not set speed above UDMA5 */
586 if (speed > XFER_UDMA_5)
587 speed = XFER_UDMA_5;
588 regdw |= (unsigned long)cycle_time_value[ATA_100][speed-XFER_UDMA_0] << 4; 576 regdw |= (unsigned long)cycle_time_value[ATA_100][speed-XFER_UDMA_0] << 4;
589 regdw |= (unsigned long)cvs_time_value[ATA_100][speed-XFER_UDMA_0] << 8; 577 regdw |= (unsigned long)cvs_time_value[ATA_100][speed-XFER_UDMA_0] << 8;
590 } 578 }
@@ -608,12 +596,6 @@ static int sis5513_tune_chipset (ide_drive_t *drive, u8 xferspeed)
608 case XFER_SW_DMA_1: 596 case XFER_SW_DMA_1:
609 case XFER_SW_DMA_0: 597 case XFER_SW_DMA_0:
610 break; 598 break;
611 case XFER_PIO_4:
612 case XFER_PIO_3:
613 case XFER_PIO_2:
614 case XFER_PIO_1:
615 case XFER_PIO_0:
616 return sis5513_tune_drive(drive, speed - XFER_PIO_0);
617 default: 599 default:
618 BUG(); 600 BUG();
619 break; 601 break;
@@ -627,7 +609,7 @@ static int sis5513_config_xfer_rate(ide_drive_t *drive)
627 /* 609 /*
628 * TODO: always set PIO mode and remove this 610 * TODO: always set PIO mode and remove this
629 */ 611 */
630 sis5513_tuneproc(drive, 255); 612 ide_set_max_pio(drive);
631 613
632 drive->init_speed = 0; 614 drive->init_speed = 0;
633 615
@@ -635,11 +617,25 @@ static int sis5513_config_xfer_rate(ide_drive_t *drive)
635 return 0; 617 return 0;
636 618
637 if (ide_use_fast_pio(drive)) 619 if (ide_use_fast_pio(drive))
638 sis5513_tuneproc(drive, 255); 620 ide_set_max_pio(drive);
639 621
640 return -1; 622 return -1;
641} 623}
642 624
625static u8 sis5513_ata133_udma_filter(ide_drive_t *drive)
626{
627 struct pci_dev *dev = drive->hwif->pci_dev;
628 int drive_pci;
629 u32 reg54 = 0, regdw = 0;
630
631 pci_read_config_dword(dev, 0x54, &reg54);
632 drive_pci = ((reg54 & 0x40000000) ? 0x70 : 0x40) + drive->dn * 4;
633 pci_read_config_dword(dev, drive_pci, &regdw);
634
635 /* if ATA133 disable, we should not set speed above UDMA5 */
636 return (regdw & 0x08) ? ATA_UDMA6 : ATA_UDMA5;
637}
638
643/* Chip detection and general config */ 639/* Chip detection and general config */
644static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const char *name) 640static unsigned int __devinit init_chipset_sis5513 (struct pci_dev *dev, const char *name)
645{ 641{
@@ -844,9 +840,12 @@ static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif)
844 if (!hwif->irq) 840 if (!hwif->irq)
845 hwif->irq = hwif->channel ? 15 : 14; 841 hwif->irq = hwif->channel ? 15 : 14;
846 842
847 hwif->tuneproc = &sis5513_tuneproc; 843 hwif->set_pio_mode = &sis_set_pio_mode;
848 hwif->speedproc = &sis5513_tune_chipset; 844 hwif->speedproc = &sis5513_tune_chipset;
849 845
846 if (chipset_family >= ATA_133)
847 hwif->udma_filter = sis5513_ata133_udma_filter;
848
850 if (!(hwif->dma_base)) { 849 if (!(hwif->dma_base)) {
851 hwif->drives[0].autotune = 1; 850 hwif->drives[0].autotune = 1;
852 hwif->drives[1].autotune = 1; 851 hwif->drives[1].autotune = 1;
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
index 0947cab00595..f492318ba797 100644
--- a/drivers/ide/pci/sl82c105.c
+++ b/drivers/ide/pci/sl82c105.c
@@ -75,16 +75,12 @@ static unsigned int get_pio_timings(ide_drive_t *drive, u8 pio)
75/* 75/*
76 * Configure the chipset for PIO mode. 76 * Configure the chipset for PIO mode.
77 */ 77 */
78static u8 sl82c105_tune_pio(ide_drive_t *drive, u8 pio) 78static void sl82c105_tune_pio(ide_drive_t *drive, const u8 pio)
79{ 79{
80 struct pci_dev *dev = HWIF(drive)->pci_dev; 80 struct pci_dev *dev = HWIF(drive)->pci_dev;
81 int reg = 0x44 + drive->dn * 4; 81 int reg = 0x44 + drive->dn * 4;
82 u16 drv_ctrl; 82 u16 drv_ctrl;
83 83
84 DBG(("sl82c105_tune_pio(drive:%s, pio:%u)\n", drive->name, pio));
85
86 pio = ide_get_best_pio_mode(drive, pio, 5);
87
88 drv_ctrl = get_pio_timings(drive, pio); 84 drv_ctrl = get_pio_timings(drive, pio);
89 85
90 /* 86 /*
@@ -106,14 +102,12 @@ static u8 sl82c105_tune_pio(ide_drive_t *drive, u8 pio)
106 printk(KERN_DEBUG "%s: selected %s (%dns) (%04X)\n", drive->name, 102 printk(KERN_DEBUG "%s: selected %s (%dns) (%04X)\n", drive->name,
107 ide_xfer_verbose(pio + XFER_PIO_0), 103 ide_xfer_verbose(pio + XFER_PIO_0),
108 ide_pio_cycle_time(drive, pio), drv_ctrl); 104 ide_pio_cycle_time(drive, pio), drv_ctrl);
109
110 return pio;
111} 105}
112 106
113/* 107/*
114 * Configure the drive and chipset for a new transfer speed. 108 * Configure the drive and chipset for a new transfer speed.
115 */ 109 */
116static int sl82c105_tune_chipset(ide_drive_t *drive, u8 speed) 110static int sl82c105_tune_chipset(ide_drive_t *drive, const u8 speed)
117{ 111{
118 static u16 mwdma_timings[] = {0x0707, 0x0201, 0x0200}; 112 static u16 mwdma_timings[] = {0x0707, 0x0201, 0x0200};
119 u16 drv_ctrl; 113 u16 drv_ctrl;
@@ -121,8 +115,6 @@ static int sl82c105_tune_chipset(ide_drive_t *drive, u8 speed)
121 DBG(("sl82c105_tune_chipset(drive:%s, speed:%s)\n", 115 DBG(("sl82c105_tune_chipset(drive:%s, speed:%s)\n",
122 drive->name, ide_xfer_verbose(speed))); 116 drive->name, ide_xfer_verbose(speed)));
123 117
124 speed = ide_rate_filter(drive, speed);
125
126 switch (speed) { 118 switch (speed) {
127 case XFER_MW_DMA_2: 119 case XFER_MW_DMA_2:
128 case XFER_MW_DMA_1: 120 case XFER_MW_DMA_1:
@@ -147,14 +139,6 @@ static int sl82c105_tune_chipset(ide_drive_t *drive, u8 speed)
147 pci_write_config_word(dev, reg, drv_ctrl); 139 pci_write_config_word(dev, reg, drv_ctrl);
148 } 140 }
149 break; 141 break;
150 case XFER_PIO_5:
151 case XFER_PIO_4:
152 case XFER_PIO_3:
153 case XFER_PIO_2:
154 case XFER_PIO_1:
155 case XFER_PIO_0:
156 (void) sl82c105_tune_pio(drive, speed - XFER_PIO_0);
157 break;
158 default: 142 default:
159 return -1; 143 return -1;
160 } 144 }
@@ -327,11 +311,10 @@ static void sl82c105_resetproc(ide_drive_t *drive)
327 * We only deal with PIO mode here - DMA mode 'using_dma' is not 311 * We only deal with PIO mode here - DMA mode 'using_dma' is not
328 * initialised at the point that this function is called. 312 * initialised at the point that this function is called.
329 */ 313 */
330static void sl82c105_tune_drive(ide_drive_t *drive, u8 pio) 314static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio)
331{ 315{
332 DBG(("sl82c105_tune_drive(drive:%s, pio:%u)\n", drive->name, pio)); 316 sl82c105_tune_pio(drive, pio);
333 317
334 pio = sl82c105_tune_pio(drive, pio);
335 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio); 318 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
336} 319}
337 320
@@ -399,7 +382,7 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
399 382
400 DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index)); 383 DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index));
401 384
402 hwif->tuneproc = &sl82c105_tune_drive; 385 hwif->set_pio_mode = &sl82c105_set_pio_mode;
403 hwif->speedproc = &sl82c105_tune_chipset; 386 hwif->speedproc = &sl82c105_tune_chipset;
404 hwif->selectproc = &sl82c105_selectproc; 387 hwif->selectproc = &sl82c105_selectproc;
405 hwif->resetproc = &sl82c105_resetproc; 388 hwif->resetproc = &sl82c105_resetproc;
diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c
index 628b0664f576..ae8e91324577 100644
--- a/drivers/ide/pci/slc90e66.c
+++ b/drivers/ide/pci/slc90e66.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/drivers/ide/pci/slc90e66.c Version 0.15 Jul 6, 2007 2 * linux/drivers/ide/pci/slc90e66.c Version 0.16 Jul 14, 2007
3 * 3 *
4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> 4 * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org>
5 * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com> 5 * Copyright (C) 2006-2007 MontaVista Software, Inc. <source@mvista.com>
@@ -95,19 +95,17 @@ static void slc90e66_tune_pio (ide_drive_t *drive, u8 pio)
95 spin_unlock_irqrestore(&ide_lock, flags); 95 spin_unlock_irqrestore(&ide_lock, flags);
96} 96}
97 97
98static void slc90e66_tune_drive (ide_drive_t *drive, u8 pio) 98static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio)
99{ 99{
100 pio = ide_get_best_pio_mode(drive, pio, 4);
101 slc90e66_tune_pio(drive, pio); 100 slc90e66_tune_pio(drive, pio);
102 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio); 101 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
103} 102}
104 103
105static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed) 104static int slc90e66_tune_chipset(ide_drive_t *drive, const u8 speed)
106{ 105{
107 ide_hwif_t *hwif = HWIF(drive); 106 ide_hwif_t *hwif = HWIF(drive);
108 struct pci_dev *dev = hwif->pci_dev; 107 struct pci_dev *dev = hwif->pci_dev;
109 u8 maslave = hwif->channel ? 0x42 : 0x40; 108 u8 maslave = hwif->channel ? 0x42 : 0x40;
110 u8 speed = ide_rate_filter(drive, xferspeed);
111 int sitre = 0, a_speed = 7 << (drive->dn * 4); 109 int sitre = 0, a_speed = 7 << (drive->dn * 4);
112 int u_speed = 0, u_flag = 1 << drive->dn; 110 int u_speed = 0, u_flag = 1 << drive->dn;
113 u16 reg4042, reg44, reg48, reg4a; 111 u16 reg4042, reg44, reg48, reg4a;
@@ -127,11 +125,6 @@ static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed)
127 case XFER_MW_DMA_2: 125 case XFER_MW_DMA_2:
128 case XFER_MW_DMA_1: 126 case XFER_MW_DMA_1:
129 case XFER_SW_DMA_2: break; 127 case XFER_SW_DMA_2: break;
130 case XFER_PIO_4:
131 case XFER_PIO_3:
132 case XFER_PIO_2:
133 case XFER_PIO_1:
134 case XFER_PIO_0: break;
135 default: return -1; 128 default: return -1;
136 } 129 }
137 130
@@ -151,10 +144,7 @@ static int slc90e66_tune_chipset (ide_drive_t *drive, u8 xferspeed)
151 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed); 144 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
152 } 145 }
153 146
154 if (speed > XFER_PIO_4) 147 slc90e66_tune_pio(drive, slc90e66_dma_2_pio(speed));
155 slc90e66_tune_pio(drive, slc90e66_dma_2_pio(speed));
156 else
157 slc90e66_tune_pio(drive, speed - XFER_PIO_0);
158 148
159 return ide_config_drive_speed(drive, speed); 149 return ide_config_drive_speed(drive, speed);
160} 150}
@@ -167,7 +157,7 @@ static int slc90e66_config_drive_xfer_rate (ide_drive_t *drive)
167 return 0; 157 return 0;
168 158
169 if (ide_use_fast_pio(drive)) 159 if (ide_use_fast_pio(drive))
170 slc90e66_tune_drive(drive, 255); 160 ide_set_max_pio(drive);
171 161
172 return -1; 162 return -1;
173} 163}
@@ -183,7 +173,7 @@ static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif)
183 hwif->irq = hwif->channel ? 15 : 14; 173 hwif->irq = hwif->channel ? 15 : 14;
184 174
185 hwif->speedproc = &slc90e66_tune_chipset; 175 hwif->speedproc = &slc90e66_tune_chipset;
186 hwif->tuneproc = &slc90e66_tune_drive; 176 hwif->set_pio_mode = &slc90e66_set_pio_mode;
187 177
188 pci_read_config_byte(hwif->pci_dev, 0x47, &reg47); 178 pci_read_config_byte(hwif->pci_dev, 0x47, &reg47);
189 179
diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c
index ec79bacc30c2..e23b9cfb6eb4 100644
--- a/drivers/ide/pci/tc86c001.c
+++ b/drivers/ide/pci/tc86c001.c
@@ -13,14 +13,12 @@
13#include <linux/pci.h> 13#include <linux/pci.h>
14#include <linux/ide.h> 14#include <linux/ide.h>
15 15
16static int tc86c001_tune_chipset(ide_drive_t *drive, u8 speed) 16static int tc86c001_tune_chipset(ide_drive_t *drive, const u8 speed)
17{ 17{
18 ide_hwif_t *hwif = HWIF(drive); 18 ide_hwif_t *hwif = HWIF(drive);
19 unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00); 19 unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00);
20 u16 mode, scr = hwif->INW(scr_port); 20 u16 mode, scr = hwif->INW(scr_port);
21 21
22 speed = ide_rate_filter(drive, speed);
23
24 switch (speed) { 22 switch (speed) {
25 case XFER_UDMA_4: mode = 0x00c0; break; 23 case XFER_UDMA_4: mode = 0x00c0; break;
26 case XFER_UDMA_3: mode = 0x00b0; break; 24 case XFER_UDMA_3: mode = 0x00b0; break;
@@ -45,9 +43,8 @@ static int tc86c001_tune_chipset(ide_drive_t *drive, u8 speed)
45 return ide_config_drive_speed(drive, speed); 43 return ide_config_drive_speed(drive, speed);
46} 44}
47 45
48static void tc86c001_tune_drive(ide_drive_t *drive, u8 pio) 46static void tc86c001_set_pio_mode(ide_drive_t *drive, const u8 pio)
49{ 47{
50 pio = ide_get_best_pio_mode(drive, pio, 4);
51 (void) tc86c001_tune_chipset(drive, XFER_PIO_0 + pio); 48 (void) tc86c001_tune_chipset(drive, XFER_PIO_0 + pio);
52} 49}
53 50
@@ -173,7 +170,7 @@ static int tc86c001_config_drive_xfer_rate(ide_drive_t *drive)
173 return 0; 170 return 0;
174 171
175 if (ide_use_fast_pio(drive)) 172 if (ide_use_fast_pio(drive))
176 tc86c001_tune_drive(drive, 255); 173 ide_set_max_pio(drive);
177 174
178 return -1; 175 return -1;
179} 176}
@@ -195,7 +192,7 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
195 /* Store the system control register base for convenience... */ 192 /* Store the system control register base for convenience... */
196 hwif->config_data = sc_base; 193 hwif->config_data = sc_base;
197 194
198 hwif->tuneproc = &tc86c001_tune_drive; 195 hwif->set_pio_mode = &tc86c001_set_pio_mode;
199 hwif->speedproc = &tc86c001_tune_chipset; 196 hwif->speedproc = &tc86c001_tune_chipset;
200 hwif->busproc = &tc86c001_busproc; 197 hwif->busproc = &tc86c001_busproc;
201 198
diff --git a/drivers/ide/pci/triflex.c b/drivers/ide/pci/triflex.c
index 098692a6d615..c3ff066eea5a 100644
--- a/drivers/ide/pci/triflex.c
+++ b/drivers/ide/pci/triflex.c
@@ -40,7 +40,7 @@
40#include <linux/ide.h> 40#include <linux/ide.h>
41#include <linux/init.h> 41#include <linux/init.h>
42 42
43static int triflex_tune_chipset(ide_drive_t *drive, u8 xferspeed) 43static int triflex_tune_chipset(ide_drive_t *drive, const u8 speed)
44{ 44{
45 ide_hwif_t *hwif = HWIF(drive); 45 ide_hwif_t *hwif = HWIF(drive);
46 struct pci_dev *dev = hwif->pci_dev; 46 struct pci_dev *dev = hwif->pci_dev;
@@ -48,7 +48,6 @@ static int triflex_tune_chipset(ide_drive_t *drive, u8 xferspeed)
48 u16 timing = 0; 48 u16 timing = 0;
49 u32 triflex_timings = 0; 49 u32 triflex_timings = 0;
50 u8 unit = (drive->select.b.unit & 0x01); 50 u8 unit = (drive->select.b.unit & 0x01);
51 u8 speed = ide_rate_filter(drive, xferspeed);
52 51
53 pci_read_config_dword(dev, channel_offset, &triflex_timings); 52 pci_read_config_dword(dev, channel_offset, &triflex_timings);
54 53
@@ -94,10 +93,9 @@ static int triflex_tune_chipset(ide_drive_t *drive, u8 xferspeed)
94 return (ide_config_drive_speed(drive, speed)); 93 return (ide_config_drive_speed(drive, speed));
95} 94}
96 95
97static void triflex_tune_drive(ide_drive_t *drive, u8 pio) 96static void triflex_set_pio_mode(ide_drive_t *drive, const u8 pio)
98{ 97{
99 int use_pio = ide_get_best_pio_mode(drive, pio, 4); 98 (void)triflex_tune_chipset(drive, XFER_PIO_0 + pio);
100 (void) triflex_tune_chipset(drive, (XFER_PIO_0 + use_pio));
101} 99}
102 100
103static int triflex_config_drive_xfer_rate(ide_drive_t *drive) 101static int triflex_config_drive_xfer_rate(ide_drive_t *drive)
@@ -105,14 +103,14 @@ static int triflex_config_drive_xfer_rate(ide_drive_t *drive)
105 if (ide_tune_dma(drive)) 103 if (ide_tune_dma(drive))
106 return 0; 104 return 0;
107 105
108 triflex_tune_drive(drive, 255); 106 ide_set_max_pio(drive);
109 107
110 return -1; 108 return -1;
111} 109}
112 110
113static void __devinit init_hwif_triflex(ide_hwif_t *hwif) 111static void __devinit init_hwif_triflex(ide_hwif_t *hwif)
114{ 112{
115 hwif->tuneproc = &triflex_tune_drive; 113 hwif->set_pio_mode = &triflex_set_pio_mode;
116 hwif->speedproc = &triflex_tune_chipset; 114 hwif->speedproc = &triflex_tune_chipset;
117 115
118 if (hwif->dma_base == 0) 116 if (hwif->dma_base == 0)
diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c
index c10203a32159..378feb491ec4 100644
--- a/drivers/ide/pci/via82cxxx.c
+++ b/drivers/ide/pci/via82cxxx.c
@@ -1,6 +1,6 @@
1/* 1/*
2 * 2 *
3 * Version 3.47 3 * Version 3.48
4 * 4 *
5 * VIA IDE driver for Linux. Supported southbridges: 5 * VIA IDE driver for Linux. Supported southbridges:
6 * 6 *
@@ -158,7 +158,7 @@ static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
158 * by upper layers. 158 * by upper layers.
159 */ 159 */
160 160
161static int via_set_drive(ide_drive_t *drive, u8 speed) 161static int via_set_drive(ide_drive_t *drive, const u8 speed)
162{ 162{
163 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1); 163 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
164 struct via82cxxx_dev *vdev = pci_get_drvdata(drive->hwif->pci_dev); 164 struct via82cxxx_dev *vdev = pci_get_drvdata(drive->hwif->pci_dev);
@@ -195,19 +195,16 @@ static int via_set_drive(ide_drive_t *drive, u8 speed)
195} 195}
196 196
197/** 197/**
198 * via82cxxx_tune_drive - PIO setup 198 * via_set_pio_mode - PIO setup
199 * @drive: drive to set up 199 * @drive: drive
200 * @pio: mode to use (255 for 'best possible') 200 * @pio: PIO mode number
201 * 201 *
202 * A callback from the upper layers for PIO-only tuning. 202 * A callback from the upper layers for PIO-only tuning.
203 */ 203 */
204 204
205static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio) 205static void via_set_pio_mode(ide_drive_t *drive, const u8 pio)
206{ 206{
207 if (pio == 255) 207 via_set_drive(drive, XFER_PIO_0 + pio);
208 pio = ide_get_best_pio_mode(drive, 255, 5);
209
210 via_set_drive(drive, XFER_PIO_0 + min_t(u8, pio, 5));
211} 208}
212 209
213/** 210/**
@@ -220,18 +217,11 @@ static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio)
220 217
221static int via82cxxx_ide_dma_check (ide_drive_t *drive) 218static int via82cxxx_ide_dma_check (ide_drive_t *drive)
222{ 219{
223 u8 speed = ide_max_dma_mode(drive); 220 if (ide_tune_dma(drive))
224
225 if (speed == 0) {
226 via82cxxx_tune_drive(drive, 255);
227 return -1;
228 }
229
230 via_set_drive(drive, speed);
231
232 if (drive->autodma)
233 return 0; 221 return 0;
234 222
223 ide_set_max_pio(drive);
224
235 return -1; 225 return -1;
236} 226}
237 227
@@ -465,7 +455,7 @@ static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif)
465 455
466 hwif->autodma = 0; 456 hwif->autodma = 0;
467 457
468 hwif->tuneproc = &via82cxxx_tune_drive; 458 hwif->set_pio_mode = &via_set_pio_mode;
469 hwif->speedproc = &via_set_drive; 459 hwif->speedproc = &via_set_drive;
470 460
471 461
diff --git a/drivers/ide/ppc/mpc8xx.c b/drivers/ide/ppc/mpc8xx.c
index dab79afa9b22..df2e92034f5d 100644
--- a/drivers/ide/ppc/mpc8xx.c
+++ b/drivers/ide/ppc/mpc8xx.c
@@ -45,7 +45,7 @@ static void print_funcid (int func);
45static int check_ide_device (unsigned long base); 45static int check_ide_device (unsigned long base);
46 46
47static void ide_interrupt_ack (void *dev); 47static void ide_interrupt_ack (void *dev);
48static void m8xx_ide_tuneproc(ide_drive_t *drive, u8 pio); 48static void m8xx_ide_set_pio_mode(ide_drive_t *drive, const u8 pio);
49 49
50typedef struct ide_ioport_desc { 50typedef struct ide_ioport_desc {
51 unsigned long base_off; /* Offset to PCMCIA memory */ 51 unsigned long base_off; /* Offset to PCMCIA memory */
@@ -314,9 +314,8 @@ m8xx_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
314#endif /* CONFIG_IDE_8xx_PCCARD */ 314#endif /* CONFIG_IDE_8xx_PCCARD */
315 } 315 }
316 316
317 /* register routine to tune PIO mode */
318 ide_hwifs[data_port].pio_mask = ATA_PIO4; 317 ide_hwifs[data_port].pio_mask = ATA_PIO4;
319 ide_hwifs[data_port].tuneproc = m8xx_ide_tuneproc; 318 ide_hwifs[data_port].set_pio_mode = m8xx_ide_set_pio_mode;
320 319
321 hw->ack_intr = (ide_ack_intr_t *) ide_interrupt_ack; 320 hw->ack_intr = (ide_ack_intr_t *) ide_interrupt_ack;
322 /* Enable Harddisk Interrupt, 321 /* Enable Harddisk Interrupt,
@@ -401,9 +400,8 @@ void m8xx_ide_init_hwif_ports (hw_regs_t *hw,
401 *irq = ioport_dsc[data_port].irq; 400 *irq = ioport_dsc[data_port].irq;
402 } 401 }
403 402
404 /* register routine to tune PIO mode */
405 ide_hwifs[data_port].pio_mask = ATA_PIO4; 403 ide_hwifs[data_port].pio_mask = ATA_PIO4;
406 ide_hwifs[data_port].tuneproc = m8xx_ide_tuneproc; 404 ide_hwifs[data_port].set_pio_mode = m8xx_ide_set_pio_mode;
407 405
408 hw->ack_intr = (ide_ack_intr_t *) ide_interrupt_ack; 406 hw->ack_intr = (ide_ack_intr_t *) ide_interrupt_ack;
409 /* Enable Harddisk Interrupt, 407 /* Enable Harddisk Interrupt,
@@ -427,24 +425,13 @@ void m8xx_ide_init_hwif_ports (hw_regs_t *hw,
427#define PCMCIA_SL(t) ((t==32) ? 0 : ((t & 0x1F)<<7)) /* Strobe Length */ 425#define PCMCIA_SL(t) ((t==32) ? 0 : ((t & 0x1F)<<7)) /* Strobe Length */
428#endif 426#endif
429 427
430
431/* Calculate PIO timings */ 428/* Calculate PIO timings */
432static void 429static void m8xx_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
433m8xx_ide_tuneproc(ide_drive_t *drive, u8 pio)
434{ 430{
435#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT) 431#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT)
436 volatile pcmconf8xx_t *pcmp; 432 volatile pcmconf8xx_t *pcmp;
437 ulong timing, mask, reg; 433 ulong timing, mask, reg;
438#endif
439
440 pio = ide_get_best_pio_mode(drive, pio, 4);
441 434
442#if 1
443 printk("%s[%d] %s: best PIO mode: %d\n",
444 __FILE__,__LINE__,__FUNCTION__, pio);
445#endif
446
447#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT)
448 pcmp = (pcmconf8xx_t *)(&(((immap_t *)IMAP_ADDR)->im_pcmcia)); 435 pcmp = (pcmconf8xx_t *)(&(((immap_t *)IMAP_ADDR)->im_pcmcia));
449 436
450 mask = ~(PCMCIA_SHT(0xFF) | PCMCIA_SST(0xFF) | PCMCIA_SL(0xFF)); 437 mask = ~(PCMCIA_SHT(0xFF) | PCMCIA_SST(0xFF) | PCMCIA_SL(0xFF));
diff --git a/drivers/ide/ppc/pmac.c b/drivers/ide/ppc/pmac.c
index 2fb047b898aa..f759a5397865 100644
--- a/drivers/ide/ppc/pmac.c
+++ b/drivers/ide/ppc/pmac.c
@@ -6,6 +6,7 @@
6 * for doing DMA. 6 * for doing DMA.
7 * 7 *
8 * Copyright (C) 1998-2003 Paul Mackerras & Ben. Herrenschmidt 8 * Copyright (C) 1998-2003 Paul Mackerras & Ben. Herrenschmidt
9 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
9 * 10 *
10 * This program is free software; you can redistribute it and/or 11 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License 12 * modify it under the terms of the GNU General Public License
@@ -311,7 +312,8 @@ static struct kauai_timing kauai_pio_timings[] =
311 { 240 , 0x0800038b }, 312 { 240 , 0x0800038b },
312 { 239 , 0x0800030c }, 313 { 239 , 0x0800030c },
313 { 180 , 0x05000249 }, 314 { 180 , 0x05000249 },
314 { 120 , 0x04000148 } 315 { 120 , 0x04000148 },
316 { 0 , 0 },
315}; 317};
316 318
317static struct kauai_timing kauai_mdma_timings[] = 319static struct kauai_timing kauai_mdma_timings[] =
@@ -351,7 +353,8 @@ static struct kauai_timing shasta_pio_timings[] =
351 { 240 , 0x040003cd }, 353 { 240 , 0x040003cd },
352 { 239 , 0x040003cd }, 354 { 239 , 0x040003cd },
353 { 180 , 0x0400028b }, 355 { 180 , 0x0400028b },
354 { 120 , 0x0400010a } 356 { 120 , 0x0400010a },
357 { 0 , 0 },
355}; 358};
356 359
357static struct kauai_timing shasta_mdma_timings[] = 360static struct kauai_timing shasta_mdma_timings[] =
@@ -411,8 +414,6 @@ kauai_lookup_timing(struct kauai_timing* table, int cycle_time)
411 414
412static void pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif); 415static void pmac_ide_setup_dma(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif);
413static int pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq); 416static int pmac_ide_build_dmatable(ide_drive_t *drive, struct request *rq);
414static int pmac_ide_tune_chipset(ide_drive_t *drive, u8 speed);
415static void pmac_ide_tuneproc(ide_drive_t *drive, u8 pio);
416static void pmac_ide_selectproc(ide_drive_t *drive); 417static void pmac_ide_selectproc(ide_drive_t *drive);
417static void pmac_ide_kauai_selectproc(ide_drive_t *drive); 418static void pmac_ide_kauai_selectproc(ide_drive_t *drive);
418 419
@@ -616,7 +617,7 @@ out:
616 * Old tuning functions (called on hdparm -p), sets up drive PIO timings 617 * Old tuning functions (called on hdparm -p), sets up drive PIO timings
617 */ 618 */
618static void 619static void
619pmac_ide_tuneproc(ide_drive_t *drive, u8 pio) 620pmac_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
620{ 621{
621 u32 *timings; 622 u32 *timings;
622 unsigned accessTicks, recTicks; 623 unsigned accessTicks, recTicks;
@@ -630,7 +631,6 @@ pmac_ide_tuneproc(ide_drive_t *drive, u8 pio)
630 /* which drive is it ? */ 631 /* which drive is it ? */
631 timings = &pmif->timings[drive->select.b.unit & 0x01]; 632 timings = &pmif->timings[drive->select.b.unit & 0x01];
632 633
633 pio = ide_get_best_pio_mode(drive, pio, 4);
634 cycle_time = ide_pio_cycle_time(drive, pio); 634 cycle_time = ide_pio_cycle_time(drive, pio);
635 635
636 switch (pmif->kind) { 636 switch (pmif->kind) {
@@ -698,8 +698,10 @@ pmac_ide_tuneproc(ide_drive_t *drive, u8 pio)
698 drive->name, pio, *timings); 698 drive->name, pio, *timings);
699#endif 699#endif
700 700
701 if (drive->select.all == HWIF(drive)->INB(IDE_SELECT_REG)) 701 if (pmac_ide_do_setfeature(drive, XFER_PIO_0 + pio))
702 pmac_ide_do_update_timings(drive); 702 return;
703
704 pmac_ide_do_update_timings(drive);
703} 705}
704 706
705#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC 707#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
@@ -915,13 +917,12 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
915 917
916/* 918/*
917 * Speedproc. This function is called by the core to set any of the standard 919 * Speedproc. This function is called by the core to set any of the standard
918 * timing (PIO, MDMA or UDMA) to both the drive and the controller. 920 * DMA timing (MDMA or UDMA) to both the drive and the controller.
919 * You may notice we don't use this function on normal "dma check" operation, 921 * You may notice we don't use this function on normal "dma check" operation,
920 * our dedicated function is more precise as it uses the drive provided 922 * our dedicated function is more precise as it uses the drive provided
921 * cycle time value. We should probably fix this one to deal with that too... 923 * cycle time value. We should probably fix this one to deal with that too...
922 */ 924 */
923static int 925static int pmac_ide_tune_chipset(ide_drive_t *drive, const u8 speed)
924pmac_ide_tune_chipset (ide_drive_t *drive, byte speed)
925{ 926{
926 int unit = (drive->select.b.unit & 0x01); 927 int unit = (drive->select.b.unit & 0x01);
927 int ret = 0; 928 int ret = 0;
@@ -937,17 +938,9 @@ pmac_ide_tune_chipset (ide_drive_t *drive, byte speed)
937 switch(speed) { 938 switch(speed) {
938#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC 939#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
939 case XFER_UDMA_6: 940 case XFER_UDMA_6:
940 if (pmif->kind != controller_sh_ata6)
941 return 1;
942 case XFER_UDMA_5: 941 case XFER_UDMA_5:
943 if (pmif->kind != controller_un_ata6 &&
944 pmif->kind != controller_k2_ata6 &&
945 pmif->kind != controller_sh_ata6)
946 return 1;
947 case XFER_UDMA_4: 942 case XFER_UDMA_4:
948 case XFER_UDMA_3: 943 case XFER_UDMA_3:
949 if (drive->hwif->cbl != ATA_CBL_PATA80)
950 return 1;
951 case XFER_UDMA_2: 944 case XFER_UDMA_2:
952 case XFER_UDMA_1: 945 case XFER_UDMA_1:
953 case XFER_UDMA_0: 946 case XFER_UDMA_0:
@@ -971,13 +964,6 @@ pmac_ide_tune_chipset (ide_drive_t *drive, byte speed)
971 case XFER_SW_DMA_0: 964 case XFER_SW_DMA_0:
972 return 1; 965 return 1;
973#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */ 966#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
974 case XFER_PIO_4:
975 case XFER_PIO_3:
976 case XFER_PIO_2:
977 case XFER_PIO_1:
978 case XFER_PIO_0:
979 pmac_ide_tuneproc(drive, speed & 0x07);
980 break;
981 default: 967 default:
982 ret = 1; 968 ret = 1;
983 } 969 }
@@ -1251,7 +1237,7 @@ pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
1251 hwif->drives[0].unmask = 1; 1237 hwif->drives[0].unmask = 1;
1252 hwif->drives[1].unmask = 1; 1238 hwif->drives[1].unmask = 1;
1253 hwif->pio_mask = ATA_PIO4; 1239 hwif->pio_mask = ATA_PIO4;
1254 hwif->tuneproc = pmac_ide_tuneproc; 1240 hwif->set_pio_mode = pmac_ide_set_pio_mode;
1255 if (pmif->kind == controller_un_ata6 1241 if (pmif->kind == controller_un_ata6
1256 || pmif->kind == controller_k2_ata6 1242 || pmif->kind == controller_k2_ata6
1257 || pmif->kind == controller_sh_ata6) 1243 || pmif->kind == controller_sh_ata6)