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authorMichael Chan <mchan@broadcom.com>2007-05-31 17:49:51 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-06-03 21:08:41 -0400
commit007a880d627aee0e854e793099bb33d0c1130678 (patch)
tree1421abde7c9ff2793c64225d49452b70ed7ee8c0 /drivers
parent1c92b4e50ef926d1e26fcc056a520e4a7d12478c (diff)
[TG3]: Fix link problem on Dell's onboard 5906.
The bug is caused by code that always set (TG3_FLAG_USE_MI_INTERRUPT | TG3_FLAG_USE_LINKCHG_REG) on all Dell's onboard devices. With these 2 flags set, the link status is polled by tg3_timer() and will only work when the PHY is set up to interrupt the MAC on link changes. This breaks 5906 because the 5906 PHY does not support TG3_FLAG_USE_MI_INTERRUPT the same as other PHYs. For correctness, only Dell's onboard 5701 needs these 2 flags to be set. This change will fix the 5906 problem and will change other Dell devices except 5700 and 5701 to use the more efficient interrupt-driven link changes. Update version to 3.77. Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/tg3.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 023779a581fd..2f3184184ad9 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -64,8 +64,8 @@
64 64
65#define DRV_MODULE_NAME "tg3" 65#define DRV_MODULE_NAME "tg3"
66#define PFX DRV_MODULE_NAME ": " 66#define PFX DRV_MODULE_NAME ": "
67#define DRV_MODULE_VERSION "3.76" 67#define DRV_MODULE_VERSION "3.77"
68#define DRV_MODULE_RELDATE "May 5, 2007" 68#define DRV_MODULE_RELDATE "May 31, 2007"
69 69
70#define TG3_DEF_MAC_MODE 0 70#define TG3_DEF_MAC_MODE 0
71#define TG3_DEF_RX_MODE 0 71#define TG3_DEF_RX_MODE 0
@@ -10961,6 +10961,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10961 * upon subsystem IDs. 10961 * upon subsystem IDs.
10962 */ 10962 */
10963 if (tp->pdev->subsystem_vendor == PCI_VENDOR_ID_DELL && 10963 if (tp->pdev->subsystem_vendor == PCI_VENDOR_ID_DELL &&
10964 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 &&
10964 !(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) { 10965 !(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) {
10965 tp->tg3_flags |= (TG3_FLAG_USE_MI_INTERRUPT | 10966 tp->tg3_flags |= (TG3_FLAG_USE_MI_INTERRUPT |
10966 TG3_FLAG_USE_LINKCHG_REG); 10967 TG3_FLAG_USE_LINKCHG_REG);