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authorIngo Molnar <mingo@elte.hu>2008-08-11 16:01:54 -0400
committerIngo Molnar <mingo@elte.hu>2008-08-11 16:01:54 -0400
commitf2556896597c43cb48f04b1c16214938a6ccce9a (patch)
tree9e068d92ecf2c41b7b0f36a9688c56fd5fe39709 /drivers
parent7c13e6a3d15a4ebcc3f40df5f4d19665479f8ca3 (diff)
parent10fec20ef5eec1c91913baec1225400f0d02df40 (diff)
Merge branch 'linus' into x86/defconfig
Diffstat (limited to 'drivers')
-rw-r--r--drivers/char/tty_io.c2
-rw-r--r--drivers/hwmon/lm75.c114
-rw-r--r--drivers/i2c/Kconfig14
-rw-r--r--drivers/i2c/algos/Kconfig11
-rw-r--r--drivers/i2c/busses/i2c-amd756-s4882.c9
-rw-r--r--drivers/i2c/busses/i2c-nforce2-s4985.c5
-rw-r--r--drivers/i2c/chips/at24.c8
-rw-r--r--drivers/i2c/i2c-core.c11
-rw-r--r--drivers/i2c/i2c-dev.c4
-rw-r--r--drivers/mfd/Kconfig21
-rw-r--r--drivers/mfd/Makefile2
-rw-r--r--drivers/mfd/t7l66xb.c419
-rw-r--r--drivers/mfd/tc6387xb.c181
-rw-r--r--drivers/mfd/tc6393xb.c159
-rw-r--r--drivers/mmc/host/Kconfig6
-rw-r--r--drivers/mmc/host/Makefile1
-rw-r--r--drivers/mmc/host/tmio_mmc.c691
-rw-r--r--drivers/mmc/host/tmio_mmc.h194
-rw-r--r--drivers/mtd/nand/Kconfig7
-rw-r--r--drivers/mtd/nand/Makefile1
-rw-r--r--drivers/mtd/nand/tmio_nand.c556
-rw-r--r--drivers/net/atl1e/atl1e_main.c4
-rw-r--r--drivers/pci/msi.c5
-rw-r--r--drivers/pci/pci.c3
-rw-r--r--drivers/pci/probe.c54
-rw-r--r--drivers/pci/quirks.c7
-rw-r--r--drivers/video/console/fbcon.h2
-rw-r--r--drivers/watchdog/Makefile5
-rw-r--r--drivers/watchdog/at91rm9200_wdt.c2
-rw-r--r--drivers/watchdog/ixp4xx_wdt.c2
-rw-r--r--drivers/watchdog/pcwd.c2
-rw-r--r--drivers/watchdog/shwdt.c24
-rw-r--r--drivers/watchdog/txx9wdt.c2
-rw-r--r--drivers/watchdog/wdt285.c2
34 files changed, 2311 insertions, 219 deletions
diff --git a/drivers/char/tty_io.c b/drivers/char/tty_io.c
index e1b46bc7e43c..0e6866fe0f96 100644
--- a/drivers/char/tty_io.c
+++ b/drivers/char/tty_io.c
@@ -1161,8 +1161,8 @@ void disassociate_ctty(int on_exit)
1161 tty = get_current_tty(); 1161 tty = get_current_tty();
1162 if (tty) { 1162 if (tty) {
1163 tty_pgrp = get_pid(tty->pgrp); 1163 tty_pgrp = get_pid(tty->pgrp);
1164 mutex_unlock(&tty_mutex);
1165 lock_kernel(); 1164 lock_kernel();
1165 mutex_unlock(&tty_mutex);
1166 /* XXX: here we race, there is nothing protecting tty */ 1166 /* XXX: here we race, there is nothing protecting tty */
1167 if (on_exit && tty->driver->type != TTY_DRIVER_TYPE_PTY) 1167 if (on_exit && tty->driver->type != TTY_DRIVER_TYPE_PTY)
1168 tty_vhangup(tty); 1168 tty_vhangup(tty);
diff --git a/drivers/hwmon/lm75.c b/drivers/hwmon/lm75.c
index 7880c273c2c5..8f9595f2fb53 100644
--- a/drivers/hwmon/lm75.c
+++ b/drivers/hwmon/lm75.c
@@ -54,11 +54,11 @@ enum lm75_type { /* keep sorted in alphabetical order */
54 tmp75, 54 tmp75,
55}; 55};
56 56
57/* Addresses scanned by legacy style driver binding */ 57/* Addresses scanned */
58static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4b, 0x4c, 58static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4b, 0x4c,
59 0x4d, 0x4e, 0x4f, I2C_CLIENT_END }; 59 0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
60 60
61/* Insmod parameters (only for legacy style driver binding) */ 61/* Insmod parameters */
62I2C_CLIENT_INSMOD_1(lm75); 62I2C_CLIENT_INSMOD_1(lm75);
63 63
64 64
@@ -72,7 +72,6 @@ static const u8 LM75_REG_TEMP[3] = {
72 72
73/* Each client has this additional data */ 73/* Each client has this additional data */
74struct lm75_data { 74struct lm75_data {
75 struct i2c_client *client;
76 struct device *hwmon_dev; 75 struct device *hwmon_dev;
77 struct mutex update_lock; 76 struct mutex update_lock;
78 u8 orig_conf; 77 u8 orig_conf;
@@ -138,7 +137,7 @@ static const struct attribute_group lm75_group = {
138 137
139/*-----------------------------------------------------------------------*/ 138/*-----------------------------------------------------------------------*/
140 139
141/* "New style" I2C driver binding -- following the driver model */ 140/* device probe and removal */
142 141
143static int 142static int
144lm75_probe(struct i2c_client *client, const struct i2c_device_id *id) 143lm75_probe(struct i2c_client *client, const struct i2c_device_id *id)
@@ -157,8 +156,6 @@ lm75_probe(struct i2c_client *client, const struct i2c_device_id *id)
157 return -ENOMEM; 156 return -ENOMEM;
158 157
159 i2c_set_clientdata(client, data); 158 i2c_set_clientdata(client, data);
160
161 data->client = client;
162 mutex_init(&data->update_lock); 159 mutex_init(&data->update_lock);
163 160
164 /* Set to LM75 resolution (9 bits, 1/2 degree C) and range. 161 /* Set to LM75 resolution (9 bits, 1/2 degree C) and range.
@@ -236,45 +233,16 @@ static const struct i2c_device_id lm75_ids[] = {
236}; 233};
237MODULE_DEVICE_TABLE(i2c, lm75_ids); 234MODULE_DEVICE_TABLE(i2c, lm75_ids);
238 235
239static struct i2c_driver lm75_driver = { 236/* Return 0 if detection is successful, -ENODEV otherwise */
240 .driver = { 237static int lm75_detect(struct i2c_client *new_client, int kind,
241 .name = "lm75", 238 struct i2c_board_info *info)
242 },
243 .probe = lm75_probe,
244 .remove = lm75_remove,
245 .id_table = lm75_ids,
246};
247
248/*-----------------------------------------------------------------------*/
249
250/* "Legacy" I2C driver binding */
251
252static struct i2c_driver lm75_legacy_driver;
253
254/* This function is called by i2c_probe */
255static int lm75_detect(struct i2c_adapter *adapter, int address, int kind)
256{ 239{
240 struct i2c_adapter *adapter = new_client->adapter;
257 int i; 241 int i;
258 struct i2c_client *new_client;
259 int err = 0;
260 242
261 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | 243 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
262 I2C_FUNC_SMBUS_WORD_DATA)) 244 I2C_FUNC_SMBUS_WORD_DATA))
263 goto exit; 245 return -ENODEV;
264
265 /* OK. For now, we presume we have a valid address. We create the
266 client structure, even though there may be no sensor present.
267 But it allows us to use i2c_smbus_read_*_data() calls. */
268 new_client = kzalloc(sizeof *new_client, GFP_KERNEL);
269 if (!new_client) {
270 err = -ENOMEM;
271 goto exit;
272 }
273
274 new_client->addr = address;
275 new_client->adapter = adapter;
276 new_client->driver = &lm75_legacy_driver;
277 new_client->flags = 0;
278 246
279 /* Now, we do the remaining detection. There is no identification- 247 /* Now, we do the remaining detection. There is no identification-
280 dedicated register so we have to rely on several tricks: 248 dedicated register so we have to rely on several tricks:
@@ -294,71 +262,44 @@ static int lm75_detect(struct i2c_adapter *adapter, int address, int kind)
294 || i2c_smbus_read_word_data(new_client, 5) != hyst 262 || i2c_smbus_read_word_data(new_client, 5) != hyst
295 || i2c_smbus_read_word_data(new_client, 6) != hyst 263 || i2c_smbus_read_word_data(new_client, 6) != hyst
296 || i2c_smbus_read_word_data(new_client, 7) != hyst) 264 || i2c_smbus_read_word_data(new_client, 7) != hyst)
297 goto exit_free; 265 return -ENODEV;
298 os = i2c_smbus_read_word_data(new_client, 3); 266 os = i2c_smbus_read_word_data(new_client, 3);
299 if (i2c_smbus_read_word_data(new_client, 4) != os 267 if (i2c_smbus_read_word_data(new_client, 4) != os
300 || i2c_smbus_read_word_data(new_client, 5) != os 268 || i2c_smbus_read_word_data(new_client, 5) != os
301 || i2c_smbus_read_word_data(new_client, 6) != os 269 || i2c_smbus_read_word_data(new_client, 6) != os
302 || i2c_smbus_read_word_data(new_client, 7) != os) 270 || i2c_smbus_read_word_data(new_client, 7) != os)
303 goto exit_free; 271 return -ENODEV;
304 272
305 /* Unused bits */ 273 /* Unused bits */
306 if (conf & 0xe0) 274 if (conf & 0xe0)
307 goto exit_free; 275 return -ENODEV;
308 276
309 /* Addresses cycling */ 277 /* Addresses cycling */
310 for (i = 8; i < 0xff; i += 8) 278 for (i = 8; i < 0xff; i += 8)
311 if (i2c_smbus_read_byte_data(new_client, i + 1) != conf 279 if (i2c_smbus_read_byte_data(new_client, i + 1) != conf
312 || i2c_smbus_read_word_data(new_client, i + 2) != hyst 280 || i2c_smbus_read_word_data(new_client, i + 2) != hyst
313 || i2c_smbus_read_word_data(new_client, i + 3) != os) 281 || i2c_smbus_read_word_data(new_client, i + 3) != os)
314 goto exit_free; 282 return -ENODEV;
315 } 283 }
316 284
317 /* NOTE: we treat "force=..." and "force_lm75=..." the same. 285 /* NOTE: we treat "force=..." and "force_lm75=..." the same.
318 * Only new-style driver binding distinguishes chip types. 286 * Only new-style driver binding distinguishes chip types.
319 */ 287 */
320 strlcpy(new_client->name, "lm75", I2C_NAME_SIZE); 288 strlcpy(info->type, "lm75", I2C_NAME_SIZE);
321
322 /* Tell the I2C layer a new client has arrived */
323 err = i2c_attach_client(new_client);
324 if (err)
325 goto exit_free;
326
327 err = lm75_probe(new_client, NULL);
328 if (err < 0)
329 goto exit_detach;
330 289
331 return 0; 290 return 0;
332
333exit_detach:
334 i2c_detach_client(new_client);
335exit_free:
336 kfree(new_client);
337exit:
338 return err;
339}
340
341static int lm75_attach_adapter(struct i2c_adapter *adapter)
342{
343 if (!(adapter->class & I2C_CLASS_HWMON))
344 return 0;
345 return i2c_probe(adapter, &addr_data, lm75_detect);
346} 291}
347 292
348static int lm75_detach_client(struct i2c_client *client) 293static struct i2c_driver lm75_driver = {
349{ 294 .class = I2C_CLASS_HWMON,
350 lm75_remove(client);
351 i2c_detach_client(client);
352 kfree(client);
353 return 0;
354}
355
356static struct i2c_driver lm75_legacy_driver = {
357 .driver = { 295 .driver = {
358 .name = "lm75_legacy", 296 .name = "lm75",
359 }, 297 },
360 .attach_adapter = lm75_attach_adapter, 298 .probe = lm75_probe,
361 .detach_client = lm75_detach_client, 299 .remove = lm75_remove,
300 .id_table = lm75_ids,
301 .detect = lm75_detect,
302 .address_data = &addr_data,
362}; 303};
363 304
364/*-----------------------------------------------------------------------*/ 305/*-----------------------------------------------------------------------*/
@@ -424,22 +365,11 @@ static struct lm75_data *lm75_update_device(struct device *dev)
424 365
425static int __init sensors_lm75_init(void) 366static int __init sensors_lm75_init(void)
426{ 367{
427 int status; 368 return i2c_add_driver(&lm75_driver);
428
429 status = i2c_add_driver(&lm75_driver);
430 if (status < 0)
431 return status;
432
433 status = i2c_add_driver(&lm75_legacy_driver);
434 if (status < 0)
435 i2c_del_driver(&lm75_driver);
436
437 return status;
438} 369}
439 370
440static void __exit sensors_lm75_exit(void) 371static void __exit sensors_lm75_exit(void)
441{ 372{
442 i2c_del_driver(&lm75_legacy_driver);
443 i2c_del_driver(&lm75_driver); 373 i2c_del_driver(&lm75_driver);
444} 374}
445 375
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 96867347bcbf..711ca08ab776 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -38,6 +38,20 @@ config I2C_CHARDEV
38 This support is also available as a module. If so, the module 38 This support is also available as a module. If so, the module
39 will be called i2c-dev. 39 will be called i2c-dev.
40 40
41config I2C_HELPER_AUTO
42 bool "Autoselect pertinent helper modules"
43 default y
44 help
45 Some I2C bus drivers require so-called "I2C algorithm" modules
46 to work. These are basically software-only abstractions of generic
47 I2C interfaces. This option will autoselect them so that you don't
48 have to care.
49
50 Unselect this only if you need to enable additional helper
51 modules, for example for use with external I2C bus drivers.
52
53 In doubt, say Y.
54
41source drivers/i2c/algos/Kconfig 55source drivers/i2c/algos/Kconfig
42source drivers/i2c/busses/Kconfig 56source drivers/i2c/busses/Kconfig
43source drivers/i2c/chips/Kconfig 57source drivers/i2c/chips/Kconfig
diff --git a/drivers/i2c/algos/Kconfig b/drivers/i2c/algos/Kconfig
index 7137a17402fe..b788579b8227 100644
--- a/drivers/i2c/algos/Kconfig
+++ b/drivers/i2c/algos/Kconfig
@@ -2,15 +2,20 @@
2# I2C algorithm drivers configuration 2# I2C algorithm drivers configuration
3# 3#
4 4
5menu "I2C Algorithms"
6 depends on !I2C_HELPER_AUTO
7
5config I2C_ALGOBIT 8config I2C_ALGOBIT
6 tristate 9 tristate "I2C bit-banging interfaces"
7 10
8config I2C_ALGOPCF 11config I2C_ALGOPCF
9 tristate 12 tristate "I2C PCF 8584 interfaces"
10 13
11config I2C_ALGOPCA 14config I2C_ALGOPCA
12 tristate 15 tristate "I2C PCA 9564 interfaces"
13 16
14config I2C_ALGO_SGI 17config I2C_ALGO_SGI
15 tristate 18 tristate
16 depends on SGI_IP22 || SGI_IP32 || X86_VISWS 19 depends on SGI_IP22 || SGI_IP32 || X86_VISWS
20
21endmenu
diff --git a/drivers/i2c/busses/i2c-amd756-s4882.c b/drivers/i2c/busses/i2c-amd756-s4882.c
index 72872d1e63ef..8ba2bcf727d3 100644
--- a/drivers/i2c/busses/i2c-amd756-s4882.c
+++ b/drivers/i2c/busses/i2c-amd756-s4882.c
@@ -155,6 +155,9 @@ static int __init amd756_s4882_init(void)
155 int i, error; 155 int i, error;
156 union i2c_smbus_data ioconfig; 156 union i2c_smbus_data ioconfig;
157 157
158 if (!amd756_smbus.dev.parent)
159 return -ENODEV;
160
158 /* Configure the PCA9556 multiplexer */ 161 /* Configure the PCA9556 multiplexer */
159 ioconfig.byte = 0x00; /* All I/O to output mode */ 162 ioconfig.byte = 0x00; /* All I/O to output mode */
160 error = i2c_smbus_xfer(&amd756_smbus, 0x18, 0, I2C_SMBUS_WRITE, 0x03, 163 error = i2c_smbus_xfer(&amd756_smbus, 0x18, 0, I2C_SMBUS_WRITE, 0x03,
@@ -168,11 +171,7 @@ static int __init amd756_s4882_init(void)
168 /* Unregister physical bus */ 171 /* Unregister physical bus */
169 error = i2c_del_adapter(&amd756_smbus); 172 error = i2c_del_adapter(&amd756_smbus);
170 if (error) { 173 if (error) {
171 if (error == -EINVAL) 174 dev_err(&amd756_smbus.dev, "Physical bus removal failed\n");
172 error = -ENODEV;
173 else
174 dev_err(&amd756_smbus.dev, "Physical bus removal "
175 "failed\n");
176 goto ERROR0; 175 goto ERROR0;
177 } 176 }
178 177
diff --git a/drivers/i2c/busses/i2c-nforce2-s4985.c b/drivers/i2c/busses/i2c-nforce2-s4985.c
index d1a4cbcf2aa4..29015eb9ca46 100644
--- a/drivers/i2c/busses/i2c-nforce2-s4985.c
+++ b/drivers/i2c/busses/i2c-nforce2-s4985.c
@@ -150,6 +150,9 @@ static int __init nforce2_s4985_init(void)
150 int i, error; 150 int i, error;
151 union i2c_smbus_data ioconfig; 151 union i2c_smbus_data ioconfig;
152 152
153 if (!nforce2_smbus)
154 return -ENODEV;
155
153 /* Configure the PCA9556 multiplexer */ 156 /* Configure the PCA9556 multiplexer */
154 ioconfig.byte = 0x00; /* All I/O to output mode */ 157 ioconfig.byte = 0x00; /* All I/O to output mode */
155 error = i2c_smbus_xfer(nforce2_smbus, 0x18, 0, I2C_SMBUS_WRITE, 0x03, 158 error = i2c_smbus_xfer(nforce2_smbus, 0x18, 0, I2C_SMBUS_WRITE, 0x03,
@@ -161,8 +164,6 @@ static int __init nforce2_s4985_init(void)
161 } 164 }
162 165
163 /* Unregister physical bus */ 166 /* Unregister physical bus */
164 if (!nforce2_smbus)
165 return -ENODEV;
166 error = i2c_del_adapter(nforce2_smbus); 167 error = i2c_del_adapter(nforce2_smbus);
167 if (error) { 168 if (error) {
168 dev_err(&nforce2_smbus->dev, "Physical bus removal failed\n"); 169 dev_err(&nforce2_smbus->dev, "Physical bus removal failed\n");
diff --git a/drivers/i2c/chips/at24.c b/drivers/i2c/chips/at24.c
index e764c94f3e3d..2a4acb269569 100644
--- a/drivers/i2c/chips/at24.c
+++ b/drivers/i2c/chips/at24.c
@@ -188,7 +188,7 @@ static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf,
188 count = I2C_SMBUS_BLOCK_MAX; 188 count = I2C_SMBUS_BLOCK_MAX;
189 status = i2c_smbus_read_i2c_block_data(client, offset, 189 status = i2c_smbus_read_i2c_block_data(client, offset,
190 count, buf); 190 count, buf);
191 dev_dbg(&client->dev, "smbus read %zd@%d --> %d\n", 191 dev_dbg(&client->dev, "smbus read %zu@%d --> %d\n",
192 count, offset, status); 192 count, offset, status);
193 return (status < 0) ? -EIO : status; 193 return (status < 0) ? -EIO : status;
194 } 194 }
@@ -214,7 +214,7 @@ static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf,
214 msg[1].len = count; 214 msg[1].len = count;
215 215
216 status = i2c_transfer(client->adapter, msg, 2); 216 status = i2c_transfer(client->adapter, msg, 2);
217 dev_dbg(&client->dev, "i2c read %zd@%d --> %d\n", 217 dev_dbg(&client->dev, "i2c read %zu@%d --> %d\n",
218 count, offset, status); 218 count, offset, status);
219 219
220 if (status == 2) 220 if (status == 2)
@@ -334,7 +334,7 @@ static ssize_t at24_eeprom_write(struct at24_data *at24, char *buf,
334 if (status == 1) 334 if (status == 1)
335 status = count; 335 status = count;
336 } 336 }
337 dev_dbg(&client->dev, "write %zd@%d --> %zd (%ld)\n", 337 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
338 count, offset, status, jiffies); 338 count, offset, status, jiffies);
339 339
340 if (status == count) 340 if (status == count)
@@ -512,7 +512,7 @@ static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
512 512
513 i2c_set_clientdata(client, at24); 513 i2c_set_clientdata(client, at24);
514 514
515 dev_info(&client->dev, "%Zd byte %s EEPROM %s\n", 515 dev_info(&client->dev, "%zu byte %s EEPROM %s\n",
516 at24->bin.size, client->name, 516 at24->bin.size, client->name,
517 writable ? "(writable)" : "(read-only)"); 517 writable ? "(writable)" : "(read-only)");
518 dev_dbg(&client->dev, 518 dev_dbg(&client->dev,
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index 7bf38c418086..550853f79ae8 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -813,7 +813,12 @@ static int i2c_check_addr(struct i2c_adapter *adapter, int addr)
813int i2c_attach_client(struct i2c_client *client) 813int i2c_attach_client(struct i2c_client *client)
814{ 814{
815 struct i2c_adapter *adapter = client->adapter; 815 struct i2c_adapter *adapter = client->adapter;
816 int res = 0; 816 int res;
817
818 /* Check for address business */
819 res = i2c_check_addr(adapter, client->addr);
820 if (res)
821 return res;
817 822
818 client->dev.parent = &client->adapter->dev; 823 client->dev.parent = &client->adapter->dev;
819 client->dev.bus = &i2c_bus_type; 824 client->dev.bus = &i2c_bus_type;
@@ -1451,9 +1456,11 @@ i2c_new_probed_device(struct i2c_adapter *adap,
1451 if ((addr_list[i] & ~0x07) == 0x30 1456 if ((addr_list[i] & ~0x07) == 0x30
1452 || (addr_list[i] & ~0x0f) == 0x50 1457 || (addr_list[i] & ~0x0f) == 0x50
1453 || !i2c_check_functionality(adap, I2C_FUNC_SMBUS_QUICK)) { 1458 || !i2c_check_functionality(adap, I2C_FUNC_SMBUS_QUICK)) {
1459 union i2c_smbus_data data;
1460
1454 if (i2c_smbus_xfer(adap, addr_list[i], 0, 1461 if (i2c_smbus_xfer(adap, addr_list[i], 0,
1455 I2C_SMBUS_READ, 0, 1462 I2C_SMBUS_READ, 0,
1456 I2C_SMBUS_BYTE, NULL) >= 0) 1463 I2C_SMBUS_BYTE, &data) >= 0)
1457 break; 1464 break;
1458 } else { 1465 } else {
1459 if (i2c_smbus_xfer(adap, addr_list[i], 0, 1466 if (i2c_smbus_xfer(adap, addr_list[i], 0,
diff --git a/drivers/i2c/i2c-dev.c b/drivers/i2c/i2c-dev.c
index 9d55c6383b23..af4491fa7e34 100644
--- a/drivers/i2c/i2c-dev.c
+++ b/drivers/i2c/i2c-dev.c
@@ -147,7 +147,7 @@ static ssize_t i2cdev_read (struct file *file, char __user *buf, size_t count,
147 if (tmp==NULL) 147 if (tmp==NULL)
148 return -ENOMEM; 148 return -ENOMEM;
149 149
150 pr_debug("i2c-dev: i2c-%d reading %zd bytes.\n", 150 pr_debug("i2c-dev: i2c-%d reading %zu bytes.\n",
151 iminor(file->f_path.dentry->d_inode), count); 151 iminor(file->f_path.dentry->d_inode), count);
152 152
153 ret = i2c_master_recv(client,tmp,count); 153 ret = i2c_master_recv(client,tmp,count);
@@ -175,7 +175,7 @@ static ssize_t i2cdev_write (struct file *file, const char __user *buf, size_t c
175 return -EFAULT; 175 return -EFAULT;
176 } 176 }
177 177
178 pr_debug("i2c-dev: i2c-%d writing %zd bytes.\n", 178 pr_debug("i2c-dev: i2c-%d writing %zu bytes.\n",
179 iminor(file->f_path.dentry->d_inode), count); 179 iminor(file->f_path.dentry->d_inode), count);
180 180
181 ret = i2c_master_send(client,tmp,count); 181 ret = i2c_master_send(client,tmp,count);
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 883e7ea31de2..10c44d3fe01a 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -50,10 +50,31 @@ config HTC_PASIC3
50 HTC Magician devices, respectively. Actual functionality is 50 HTC Magician devices, respectively. Actual functionality is
51 handled by the leds-pasic3 and ds1wm drivers. 51 handled by the leds-pasic3 and ds1wm drivers.
52 52
53config MFD_TMIO
54 bool
55 default n
56
57config MFD_T7L66XB
58 bool "Support Toshiba T7L66XB"
59 depends on ARM
60 select MFD_CORE
61 select MFD_TMIO
62 help
63 Support for Toshiba Mobile IO Controller T7L66XB
64
65config MFD_TC6387XB
66 bool "Support Toshiba TC6387XB"
67 depends on ARM
68 select MFD_CORE
69 select MFD_TMIO
70 help
71 Support for Toshiba Mobile IO Controller TC6387XB
72
53config MFD_TC6393XB 73config MFD_TC6393XB
54 bool "Support Toshiba TC6393XB" 74 bool "Support Toshiba TC6393XB"
55 depends on GPIOLIB && ARM 75 depends on GPIOLIB && ARM
56 select MFD_CORE 76 select MFD_CORE
77 select MFD_TMIO
57 help 78 help
58 Support for Toshiba Mobile IO Controller TC6393XB 79 Support for Toshiba Mobile IO Controller TC6393XB
59 80
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 33daa2f45dd8..03ad239ecef0 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -8,6 +8,8 @@ obj-$(CONFIG_MFD_ASIC3) += asic3.o
8obj-$(CONFIG_HTC_EGPIO) += htc-egpio.o 8obj-$(CONFIG_HTC_EGPIO) += htc-egpio.o
9obj-$(CONFIG_HTC_PASIC3) += htc-pasic3.o 9obj-$(CONFIG_HTC_PASIC3) += htc-pasic3.o
10 10
11obj-$(CONFIG_MFD_T7L66XB) += t7l66xb.o
12obj-$(CONFIG_MFD_TC6387XB) += tc6387xb.o
11obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.o 13obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.o
12 14
13obj-$(CONFIG_MFD_CORE) += mfd-core.o 15obj-$(CONFIG_MFD_CORE) += mfd-core.o
diff --git a/drivers/mfd/t7l66xb.c b/drivers/mfd/t7l66xb.c
new file mode 100644
index 000000000000..49a0fffc02af
--- /dev/null
+++ b/drivers/mfd/t7l66xb.c
@@ -0,0 +1,419 @@
1/*
2 *
3 * Toshiba T7L66XB core mfd support
4 *
5 * Copyright (c) 2005, 2007, 2008 Ian Molton
6 * Copyright (c) 2008 Dmitry Baryshkov
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * T7L66 features:
13 *
14 * Supported in this driver:
15 * SD/MMC
16 * SM/NAND flash controller
17 *
18 * As yet not supported
19 * GPIO interface (on NAND pins)
20 * Serial interface
21 * TFT 'interface converter'
22 * PCMCIA interface logic
23 */
24
25#include <linux/kernel.h>
26#include <linux/module.h>
27#include <linux/io.h>
28#include <linux/irq.h>
29#include <linux/platform_device.h>
30#include <linux/mfd/core.h>
31#include <linux/mfd/tmio.h>
32#include <linux/mfd/t7l66xb.h>
33
34enum {
35 T7L66XB_CELL_NAND,
36 T7L66XB_CELL_MMC,
37};
38
39#define SCR_REVID 0x08 /* b Revision ID */
40#define SCR_IMR 0x42 /* b Interrupt Mask */
41#define SCR_DEV_CTL 0xe0 /* b Device control */
42#define SCR_ISR 0xe1 /* b Interrupt Status */
43#define SCR_GPO_OC 0xf0 /* b GPO output control */
44#define SCR_GPO_OS 0xf1 /* b GPO output enable */
45#define SCR_GPI_S 0xf2 /* w GPI status */
46#define SCR_APDC 0xf8 /* b Active pullup down ctrl */
47
48#define SCR_DEV_CTL_USB BIT(0) /* USB enable */
49#define SCR_DEV_CTL_MMC BIT(1) /* MMC enable */
50
51/*--------------------------------------------------------------------------*/
52
53struct t7l66xb {
54 void __iomem *scr;
55 /* Lock to protect registers requiring read/modify/write ops. */
56 spinlock_t lock;
57
58 struct resource rscr;
59 int irq;
60 int irq_base;
61};
62
63/*--------------------------------------------------------------------------*/
64
65static int t7l66xb_mmc_enable(struct platform_device *mmc)
66{
67 struct platform_device *dev = to_platform_device(mmc->dev.parent);
68 struct t7l66xb_platform_data *pdata = dev->dev.platform_data;
69 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
70 unsigned long flags;
71 u8 dev_ctl;
72
73 if (pdata->enable_clk32k)
74 pdata->enable_clk32k(dev);
75
76 spin_lock_irqsave(&t7l66xb->lock, flags);
77
78 dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL);
79 dev_ctl |= SCR_DEV_CTL_MMC;
80 tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL);
81
82 spin_unlock_irqrestore(&t7l66xb->lock, flags);
83
84 return 0;
85}
86
87static int t7l66xb_mmc_disable(struct platform_device *mmc)
88{
89 struct platform_device *dev = to_platform_device(mmc->dev.parent);
90 struct t7l66xb_platform_data *pdata = dev->dev.platform_data;
91 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
92 unsigned long flags;
93 u8 dev_ctl;
94
95 spin_lock_irqsave(&t7l66xb->lock, flags);
96
97 dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL);
98 dev_ctl &= ~SCR_DEV_CTL_MMC;
99 tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL);
100
101 spin_unlock_irqrestore(&t7l66xb->lock, flags);
102
103 if (pdata->disable_clk32k)
104 pdata->disable_clk32k(dev);
105
106 return 0;
107}
108
109/*--------------------------------------------------------------------------*/
110
111const static struct resource t7l66xb_mmc_resources[] = {
112 {
113 .start = 0x800,
114 .end = 0x9ff,
115 .flags = IORESOURCE_MEM,
116 },
117 {
118 .start = 0x200,
119 .end = 0x2ff,
120 .flags = IORESOURCE_MEM,
121 },
122 {
123 .start = IRQ_T7L66XB_MMC,
124 .end = IRQ_T7L66XB_MMC,
125 .flags = IORESOURCE_IRQ,
126 },
127};
128
129const static struct resource t7l66xb_nand_resources[] = {
130 {
131 .start = 0xc00,
132 .end = 0xc07,
133 .flags = IORESOURCE_MEM,
134 },
135 {
136 .start = 0x0100,
137 .end = 0x01ff,
138 .flags = IORESOURCE_MEM,
139 },
140 {
141 .start = IRQ_T7L66XB_NAND,
142 .end = IRQ_T7L66XB_NAND,
143 .flags = IORESOURCE_IRQ,
144 },
145};
146
147static struct mfd_cell t7l66xb_cells[] = {
148 [T7L66XB_CELL_MMC] = {
149 .name = "tmio-mmc",
150 .enable = t7l66xb_mmc_enable,
151 .disable = t7l66xb_mmc_disable,
152 .num_resources = ARRAY_SIZE(t7l66xb_mmc_resources),
153 .resources = t7l66xb_mmc_resources,
154 },
155 [T7L66XB_CELL_NAND] = {
156 .name = "tmio-nand",
157 .num_resources = ARRAY_SIZE(t7l66xb_nand_resources),
158 .resources = t7l66xb_nand_resources,
159 },
160};
161
162/*--------------------------------------------------------------------------*/
163
164/* Handle the T7L66XB interrupt mux */
165static void t7l66xb_irq(unsigned int irq, struct irq_desc *desc)
166{
167 struct t7l66xb *t7l66xb = get_irq_data(irq);
168 unsigned int isr;
169 unsigned int i, irq_base;
170
171 irq_base = t7l66xb->irq_base;
172
173 while ((isr = tmio_ioread8(t7l66xb->scr + SCR_ISR) &
174 ~tmio_ioread8(t7l66xb->scr + SCR_IMR)))
175 for (i = 0; i < T7L66XB_NR_IRQS; i++)
176 if (isr & (1 << i))
177 generic_handle_irq(irq_base + i);
178}
179
180static void t7l66xb_irq_mask(unsigned int irq)
181{
182 struct t7l66xb *t7l66xb = get_irq_chip_data(irq);
183 unsigned long flags;
184 u8 imr;
185
186 spin_lock_irqsave(&t7l66xb->lock, flags);
187 imr = tmio_ioread8(t7l66xb->scr + SCR_IMR);
188 imr |= 1 << (irq - t7l66xb->irq_base);
189 tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR);
190 spin_unlock_irqrestore(&t7l66xb->lock, flags);
191}
192
193static void t7l66xb_irq_unmask(unsigned int irq)
194{
195 struct t7l66xb *t7l66xb = get_irq_chip_data(irq);
196 unsigned long flags;
197 u8 imr;
198
199 spin_lock_irqsave(&t7l66xb->lock, flags);
200 imr = tmio_ioread8(t7l66xb->scr + SCR_IMR);
201 imr &= ~(1 << (irq - t7l66xb->irq_base));
202 tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR);
203 spin_unlock_irqrestore(&t7l66xb->lock, flags);
204}
205
206static struct irq_chip t7l66xb_chip = {
207 .name = "t7l66xb",
208 .ack = t7l66xb_irq_mask,
209 .mask = t7l66xb_irq_mask,
210 .unmask = t7l66xb_irq_unmask,
211};
212
213/*--------------------------------------------------------------------------*/
214
215/* Install the IRQ handler */
216static void t7l66xb_attach_irq(struct platform_device *dev)
217{
218 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
219 unsigned int irq, irq_base;
220
221 irq_base = t7l66xb->irq_base;
222
223 for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) {
224 set_irq_chip(irq, &t7l66xb_chip);
225 set_irq_chip_data(irq, t7l66xb);
226 set_irq_handler(irq, handle_level_irq);
227#ifdef CONFIG_ARM
228 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
229#endif
230 }
231
232 set_irq_type(t7l66xb->irq, IRQ_TYPE_EDGE_FALLING);
233 set_irq_data(t7l66xb->irq, t7l66xb);
234 set_irq_chained_handler(t7l66xb->irq, t7l66xb_irq);
235}
236
237static void t7l66xb_detach_irq(struct platform_device *dev)
238{
239 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
240 unsigned int irq, irq_base;
241
242 irq_base = t7l66xb->irq_base;
243
244 set_irq_chained_handler(t7l66xb->irq, NULL);
245 set_irq_data(t7l66xb->irq, NULL);
246
247 for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) {
248#ifdef CONFIG_ARM
249 set_irq_flags(irq, 0);
250#endif
251 set_irq_chip(irq, NULL);
252 set_irq_chip_data(irq, NULL);
253 }
254}
255
256/*--------------------------------------------------------------------------*/
257
258#ifdef CONFIG_PM
259static int t7l66xb_suspend(struct platform_device *dev, pm_message_t state)
260{
261 struct t7l66xb_platform_data *pdata = dev->dev.platform_data;
262
263 if (pdata && pdata->suspend)
264 pdata->suspend(dev);
265
266 return 0;
267}
268
269static int t7l66xb_resume(struct platform_device *dev)
270{
271 struct t7l66xb_platform_data *pdata = dev->dev.platform_data;
272
273 if (pdata && pdata->resume)
274 pdata->resume(dev);
275
276 return 0;
277}
278#else
279#define t7l66xb_suspend NULL
280#define t7l66xb_resume NULL
281#endif
282
283/*--------------------------------------------------------------------------*/
284
285static int t7l66xb_probe(struct platform_device *dev)
286{
287 struct t7l66xb_platform_data *pdata = dev->dev.platform_data;
288 struct t7l66xb *t7l66xb;
289 struct resource *iomem, *rscr;
290 int ret;
291
292 iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
293 if (!iomem)
294 return -EINVAL;
295
296 t7l66xb = kzalloc(sizeof *t7l66xb, GFP_KERNEL);
297 if (!t7l66xb)
298 return -ENOMEM;
299
300 spin_lock_init(&t7l66xb->lock);
301
302 platform_set_drvdata(dev, t7l66xb);
303
304 ret = platform_get_irq(dev, 0);
305 if (ret >= 0)
306 t7l66xb->irq = ret;
307 else
308 goto err_noirq;
309
310 t7l66xb->irq_base = pdata->irq_base;
311
312 rscr = &t7l66xb->rscr;
313 rscr->name = "t7l66xb-core";
314 rscr->start = iomem->start;
315 rscr->end = iomem->start + 0xff;
316 rscr->flags = IORESOURCE_MEM;
317
318 ret = request_resource(iomem, rscr);
319 if (ret)
320 goto err_request_scr;
321
322 t7l66xb->scr = ioremap(rscr->start, rscr->end - rscr->start + 1);
323 if (!t7l66xb->scr) {
324 ret = -ENOMEM;
325 goto err_ioremap;
326 }
327
328 if (pdata && pdata->enable)
329 pdata->enable(dev);
330
331 /* Mask all interrupts */
332 tmio_iowrite8(0xbf, t7l66xb->scr + SCR_IMR);
333
334 printk(KERN_INFO "%s rev %d @ 0x%08lx, irq %d\n",
335 dev->name, tmio_ioread8(t7l66xb->scr + SCR_REVID),
336 (unsigned long)iomem->start, t7l66xb->irq);
337
338 t7l66xb_attach_irq(dev);
339
340 t7l66xb_cells[T7L66XB_CELL_NAND].driver_data = pdata->nand_data;
341 t7l66xb_cells[T7L66XB_CELL_NAND].platform_data =
342 &t7l66xb_cells[T7L66XB_CELL_NAND];
343 t7l66xb_cells[T7L66XB_CELL_NAND].data_size =
344 sizeof(t7l66xb_cells[T7L66XB_CELL_NAND]);
345
346 t7l66xb_cells[T7L66XB_CELL_MMC].platform_data =
347 &t7l66xb_cells[T7L66XB_CELL_MMC];
348 t7l66xb_cells[T7L66XB_CELL_MMC].data_size =
349 sizeof(t7l66xb_cells[T7L66XB_CELL_MMC]);
350
351 ret = mfd_add_devices(&dev->dev, dev->id,
352 t7l66xb_cells, ARRAY_SIZE(t7l66xb_cells),
353 iomem, t7l66xb->irq_base);
354
355 if (!ret)
356 return 0;
357
358 t7l66xb_detach_irq(dev);
359 iounmap(t7l66xb->scr);
360err_ioremap:
361 release_resource(&t7l66xb->rscr);
362err_noirq:
363err_request_scr:
364 kfree(t7l66xb);
365 return ret;
366}
367
368static int t7l66xb_remove(struct platform_device *dev)
369{
370 struct t7l66xb_platform_data *pdata = dev->dev.platform_data;
371 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
372 int ret;
373
374 ret = pdata->disable(dev);
375
376 t7l66xb_detach_irq(dev);
377 iounmap(t7l66xb->scr);
378 release_resource(&t7l66xb->rscr);
379 mfd_remove_devices(&dev->dev);
380 platform_set_drvdata(dev, NULL);
381 kfree(t7l66xb);
382
383 return ret;
384
385}
386
387static struct platform_driver t7l66xb_platform_driver = {
388 .driver = {
389 .name = "t7l66xb",
390 .owner = THIS_MODULE,
391 },
392 .suspend = t7l66xb_suspend,
393 .resume = t7l66xb_resume,
394 .probe = t7l66xb_probe,
395 .remove = t7l66xb_remove,
396};
397
398/*--------------------------------------------------------------------------*/
399
400static int __init t7l66xb_init(void)
401{
402 int retval = 0;
403
404 retval = platform_driver_register(&t7l66xb_platform_driver);
405 return retval;
406}
407
408static void __exit t7l66xb_exit(void)
409{
410 platform_driver_unregister(&t7l66xb_platform_driver);
411}
412
413module_init(t7l66xb_init);
414module_exit(t7l66xb_exit);
415
416MODULE_DESCRIPTION("Toshiba T7L66XB core driver");
417MODULE_LICENSE("GPL v2");
418MODULE_AUTHOR("Ian Molton");
419MODULE_ALIAS("platform:t7l66xb");
diff --git a/drivers/mfd/tc6387xb.c b/drivers/mfd/tc6387xb.c
new file mode 100644
index 000000000000..a22b21ac6cf8
--- /dev/null
+++ b/drivers/mfd/tc6387xb.c
@@ -0,0 +1,181 @@
1/*
2 * Toshiba TC6387XB support
3 * Copyright (c) 2005 Ian Molton
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This file contains TC6387XB base support.
10 *
11 */
12
13#include <linux/module.h>
14#include <linux/platform_device.h>
15#include <linux/err.h>
16#include <linux/mfd/core.h>
17#include <linux/mfd/tmio.h>
18#include <linux/mfd/tc6387xb.h>
19
20enum {
21 TC6387XB_CELL_MMC,
22};
23
24#ifdef CONFIG_PM
25static int tc6387xb_suspend(struct platform_device *dev, pm_message_t state)
26{
27 struct tc6387xb_platform_data *pdata = platform_get_drvdata(dev);
28
29 if (pdata && pdata->suspend)
30 pdata->suspend(dev);
31
32 return 0;
33}
34
35static int tc6387xb_resume(struct platform_device *dev)
36{
37 struct tc6387xb_platform_data *pdata = platform_get_drvdata(dev);
38
39 if (pdata && pdata->resume)
40 pdata->resume(dev);
41
42 return 0;
43}
44#else
45#define tc6387xb_suspend NULL
46#define tc6387xb_resume NULL
47#endif
48
49/*--------------------------------------------------------------------------*/
50
51static int tc6387xb_mmc_enable(struct platform_device *mmc)
52{
53 struct platform_device *dev = to_platform_device(mmc->dev.parent);
54 struct tc6387xb_platform_data *tc6387xb = dev->dev.platform_data;
55
56 if (tc6387xb->enable_clk32k)
57 tc6387xb->enable_clk32k(dev);
58
59 return 0;
60}
61
62static int tc6387xb_mmc_disable(struct platform_device *mmc)
63{
64 struct platform_device *dev = to_platform_device(mmc->dev.parent);
65 struct tc6387xb_platform_data *tc6387xb = dev->dev.platform_data;
66
67 if (tc6387xb->disable_clk32k)
68 tc6387xb->disable_clk32k(dev);
69
70 return 0;
71}
72
73/*--------------------------------------------------------------------------*/
74
75static struct resource tc6387xb_mmc_resources[] = {
76 {
77 .start = 0x800,
78 .end = 0x9ff,
79 .flags = IORESOURCE_MEM,
80 },
81 {
82 .start = 0x200,
83 .end = 0x2ff,
84 .flags = IORESOURCE_MEM,
85 },
86 {
87 .start = 0,
88 .end = 0,
89 .flags = IORESOURCE_IRQ,
90 },
91};
92
93static struct mfd_cell tc6387xb_cells[] = {
94 [TC6387XB_CELL_MMC] = {
95 .name = "tmio-mmc",
96 .enable = tc6387xb_mmc_enable,
97 .disable = tc6387xb_mmc_disable,
98 .num_resources = ARRAY_SIZE(tc6387xb_mmc_resources),
99 .resources = tc6387xb_mmc_resources,
100 },
101};
102
103static int tc6387xb_probe(struct platform_device *dev)
104{
105 struct tc6387xb_platform_data *data = platform_get_drvdata(dev);
106 struct resource *iomem;
107 int irq, ret;
108
109 iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
110 if (!iomem) {
111 ret = -EINVAL;
112 goto err_resource;
113 }
114
115 ret = platform_get_irq(dev, 0);
116 if (ret >= 0)
117 irq = ret;
118 else
119 goto err_resource;
120
121 if (data && data->enable)
122 data->enable(dev);
123
124 printk(KERN_INFO "Toshiba tc6387xb initialised\n");
125
126 tc6387xb_cells[TC6387XB_CELL_MMC].platform_data =
127 &tc6387xb_cells[TC6387XB_CELL_MMC];
128 tc6387xb_cells[TC6387XB_CELL_MMC].data_size =
129 sizeof(tc6387xb_cells[TC6387XB_CELL_MMC]);
130
131 ret = mfd_add_devices(&dev->dev, dev->id, tc6387xb_cells,
132 ARRAY_SIZE(tc6387xb_cells), iomem, irq);
133
134 if (!ret)
135 return 0;
136
137err_resource:
138 return ret;
139}
140
141static int tc6387xb_remove(struct platform_device *dev)
142{
143 struct tc6387xb_platform_data *data = platform_get_drvdata(dev);
144
145 if (data && data->disable)
146 data->disable(dev);
147
148 /* FIXME - free the resources! */
149
150 return 0;
151}
152
153
154static struct platform_driver tc6387xb_platform_driver = {
155 .driver = {
156 .name = "tc6387xb",
157 },
158 .probe = tc6387xb_probe,
159 .remove = tc6387xb_remove,
160 .suspend = tc6387xb_suspend,
161 .resume = tc6387xb_resume,
162};
163
164
165static int __init tc6387xb_init(void)
166{
167 return platform_driver_register(&tc6387xb_platform_driver);
168}
169
170static void __exit tc6387xb_exit(void)
171{
172 platform_driver_unregister(&tc6387xb_platform_driver);
173}
174
175module_init(tc6387xb_init);
176module_exit(tc6387xb_exit);
177
178MODULE_DESCRIPTION("Toshiba TC6387XB core driver");
179MODULE_LICENSE("GPL v2");
180MODULE_AUTHOR("Ian Molton");
181MODULE_ALIAS("platform:tc6387xb");
diff --git a/drivers/mfd/tc6393xb.c b/drivers/mfd/tc6393xb.c
index f4fd797c1590..e4c1c788b5f8 100644
--- a/drivers/mfd/tc6393xb.c
+++ b/drivers/mfd/tc6393xb.c
@@ -19,8 +19,8 @@
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/irq.h> 20#include <linux/irq.h>
21#include <linux/platform_device.h> 21#include <linux/platform_device.h>
22#include <linux/fb.h>
23#include <linux/clk.h> 22#include <linux/clk.h>
23#include <linux/err.h>
24#include <linux/mfd/core.h> 24#include <linux/mfd/core.h>
25#include <linux/mfd/tmio.h> 25#include <linux/mfd/tmio.h>
26#include <linux/mfd/tc6393xb.h> 26#include <linux/mfd/tc6393xb.h>
@@ -112,6 +112,7 @@ struct tc6393xb {
112 112
113enum { 113enum {
114 TC6393XB_CELL_NAND, 114 TC6393XB_CELL_NAND,
115 TC6393XB_CELL_MMC,
115}; 116};
116 117
117/*--------------------------------------------------------------------------*/ 118/*--------------------------------------------------------------------------*/
@@ -126,7 +127,7 @@ static int tc6393xb_nand_enable(struct platform_device *nand)
126 127
127 /* SMD buffer on */ 128 /* SMD buffer on */
128 dev_dbg(&dev->dev, "SMD buffer on\n"); 129 dev_dbg(&dev->dev, "SMD buffer on\n");
129 iowrite8(0xff, tc6393xb->scr + SCR_GPI_BCR(1)); 130 tmio_iowrite8(0xff, tc6393xb->scr + SCR_GPI_BCR(1));
130 131
131 spin_unlock_irqrestore(&tc6393xb->lock, flags); 132 spin_unlock_irqrestore(&tc6393xb->lock, flags);
132 133
@@ -135,25 +136,40 @@ static int tc6393xb_nand_enable(struct platform_device *nand)
135 136
136static struct resource __devinitdata tc6393xb_nand_resources[] = { 137static struct resource __devinitdata tc6393xb_nand_resources[] = {
137 { 138 {
138 .name = TMIO_NAND_CONFIG, 139 .start = 0x1000,
139 .start = 0x0100, 140 .end = 0x1007,
140 .end = 0x01ff,
141 .flags = IORESOURCE_MEM, 141 .flags = IORESOURCE_MEM,
142 }, 142 },
143 { 143 {
144 .name = TMIO_NAND_CONTROL, 144 .start = 0x0100,
145 .start = 0x1000, 145 .end = 0x01ff,
146 .end = 0x1007,
147 .flags = IORESOURCE_MEM, 146 .flags = IORESOURCE_MEM,
148 }, 147 },
149 { 148 {
150 .name = TMIO_NAND_IRQ,
151 .start = IRQ_TC6393_NAND, 149 .start = IRQ_TC6393_NAND,
152 .end = IRQ_TC6393_NAND, 150 .end = IRQ_TC6393_NAND,
153 .flags = IORESOURCE_IRQ, 151 .flags = IORESOURCE_IRQ,
154 }, 152 },
155}; 153};
156 154
155static struct resource __devinitdata tc6393xb_mmc_resources[] = {
156 {
157 .start = 0x800,
158 .end = 0x9ff,
159 .flags = IORESOURCE_MEM,
160 },
161 {
162 .start = 0x200,
163 .end = 0x2ff,
164 .flags = IORESOURCE_MEM,
165 },
166 {
167 .start = IRQ_TC6393_MMC,
168 .end = IRQ_TC6393_MMC,
169 .flags = IORESOURCE_IRQ,
170 },
171};
172
157static struct mfd_cell __devinitdata tc6393xb_cells[] = { 173static struct mfd_cell __devinitdata tc6393xb_cells[] = {
158 [TC6393XB_CELL_NAND] = { 174 [TC6393XB_CELL_NAND] = {
159 .name = "tmio-nand", 175 .name = "tmio-nand",
@@ -161,6 +177,11 @@ static struct mfd_cell __devinitdata tc6393xb_cells[] = {
161 .num_resources = ARRAY_SIZE(tc6393xb_nand_resources), 177 .num_resources = ARRAY_SIZE(tc6393xb_nand_resources),
162 .resources = tc6393xb_nand_resources, 178 .resources = tc6393xb_nand_resources,
163 }, 179 },
180 [TC6393XB_CELL_MMC] = {
181 .name = "tmio-mmc",
182 .num_resources = ARRAY_SIZE(tc6393xb_mmc_resources),
183 .resources = tc6393xb_mmc_resources,
184 },
164}; 185};
165 186
166/*--------------------------------------------------------------------------*/ 187/*--------------------------------------------------------------------------*/
@@ -171,7 +192,7 @@ static int tc6393xb_gpio_get(struct gpio_chip *chip,
171 struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio); 192 struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
172 193
173 /* XXX: does dsr also represent inputs? */ 194 /* XXX: does dsr also represent inputs? */
174 return ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8)) 195 return tmio_ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8))
175 & TC_GPIO_BIT(offset); 196 & TC_GPIO_BIT(offset);
176} 197}
177 198
@@ -181,13 +202,13 @@ static void __tc6393xb_gpio_set(struct gpio_chip *chip,
181 struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio); 202 struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio);
182 u8 dsr; 203 u8 dsr;
183 204
184 dsr = ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8)); 205 dsr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8));
185 if (value) 206 if (value)
186 dsr |= TC_GPIO_BIT(offset); 207 dsr |= TC_GPIO_BIT(offset);
187 else 208 else
188 dsr &= ~TC_GPIO_BIT(offset); 209 dsr &= ~TC_GPIO_BIT(offset);
189 210
190 iowrite8(dsr, tc6393xb->scr + SCR_GPO_DSR(offset / 8)); 211 tmio_iowrite8(dsr, tc6393xb->scr + SCR_GPO_DSR(offset / 8));
191} 212}
192 213
193static void tc6393xb_gpio_set(struct gpio_chip *chip, 214static void tc6393xb_gpio_set(struct gpio_chip *chip,
@@ -212,9 +233,9 @@ static int tc6393xb_gpio_direction_input(struct gpio_chip *chip,
212 233
213 spin_lock_irqsave(&tc6393xb->lock, flags); 234 spin_lock_irqsave(&tc6393xb->lock, flags);
214 235
215 doecr = ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); 236 doecr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
216 doecr &= ~TC_GPIO_BIT(offset); 237 doecr &= ~TC_GPIO_BIT(offset);
217 iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); 238 tmio_iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
218 239
219 spin_unlock_irqrestore(&tc6393xb->lock, flags); 240 spin_unlock_irqrestore(&tc6393xb->lock, flags);
220 241
@@ -232,9 +253,9 @@ static int tc6393xb_gpio_direction_output(struct gpio_chip *chip,
232 253
233 __tc6393xb_gpio_set(chip, offset, value); 254 __tc6393xb_gpio_set(chip, offset, value);
234 255
235 doecr = ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); 256 doecr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
236 doecr |= TC_GPIO_BIT(offset); 257 doecr |= TC_GPIO_BIT(offset);
237 iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); 258 tmio_iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
238 259
239 spin_unlock_irqrestore(&tc6393xb->lock, flags); 260 spin_unlock_irqrestore(&tc6393xb->lock, flags);
240 261
@@ -265,8 +286,8 @@ tc6393xb_irq(unsigned int irq, struct irq_desc *desc)
265 286
266 irq_base = tc6393xb->irq_base; 287 irq_base = tc6393xb->irq_base;
267 288
268 while ((isr = ioread8(tc6393xb->scr + SCR_ISR) & 289 while ((isr = tmio_ioread8(tc6393xb->scr + SCR_ISR) &
269 ~ioread8(tc6393xb->scr + SCR_IMR))) 290 ~tmio_ioread8(tc6393xb->scr + SCR_IMR)))
270 for (i = 0; i < TC6393XB_NR_IRQS; i++) { 291 for (i = 0; i < TC6393XB_NR_IRQS; i++) {
271 if (isr & (1 << i)) 292 if (isr & (1 << i))
272 generic_handle_irq(irq_base + i); 293 generic_handle_irq(irq_base + i);
@@ -284,9 +305,9 @@ static void tc6393xb_irq_mask(unsigned int irq)
284 u8 imr; 305 u8 imr;
285 306
286 spin_lock_irqsave(&tc6393xb->lock, flags); 307 spin_lock_irqsave(&tc6393xb->lock, flags);
287 imr = ioread8(tc6393xb->scr + SCR_IMR); 308 imr = tmio_ioread8(tc6393xb->scr + SCR_IMR);
288 imr |= 1 << (irq - tc6393xb->irq_base); 309 imr |= 1 << (irq - tc6393xb->irq_base);
289 iowrite8(imr, tc6393xb->scr + SCR_IMR); 310 tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR);
290 spin_unlock_irqrestore(&tc6393xb->lock, flags); 311 spin_unlock_irqrestore(&tc6393xb->lock, flags);
291} 312}
292 313
@@ -297,9 +318,9 @@ static void tc6393xb_irq_unmask(unsigned int irq)
297 u8 imr; 318 u8 imr;
298 319
299 spin_lock_irqsave(&tc6393xb->lock, flags); 320 spin_lock_irqsave(&tc6393xb->lock, flags);
300 imr = ioread8(tc6393xb->scr + SCR_IMR); 321 imr = tmio_ioread8(tc6393xb->scr + SCR_IMR);
301 imr &= ~(1 << (irq - tc6393xb->irq_base)); 322 imr &= ~(1 << (irq - tc6393xb->irq_base));
302 iowrite8(imr, tc6393xb->scr + SCR_IMR); 323 tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR);
303 spin_unlock_irqrestore(&tc6393xb->lock, flags); 324 spin_unlock_irqrestore(&tc6393xb->lock, flags);
304} 325}
305 326
@@ -380,9 +401,8 @@ static int __devinit tc6393xb_probe(struct platform_device *dev)
380{ 401{
381 struct tc6393xb_platform_data *tcpd = dev->dev.platform_data; 402 struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
382 struct tc6393xb *tc6393xb; 403 struct tc6393xb *tc6393xb;
383 struct resource *iomem; 404 struct resource *iomem, *rscr;
384 struct resource *rscr; 405 int ret, temp;
385 int retval, temp;
386 int i; 406 int i;
387 407
388 iomem = platform_get_resource(dev, IORESOURCE_MEM, 0); 408 iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
@@ -391,20 +411,26 @@ static int __devinit tc6393xb_probe(struct platform_device *dev)
391 411
392 tc6393xb = kzalloc(sizeof *tc6393xb, GFP_KERNEL); 412 tc6393xb = kzalloc(sizeof *tc6393xb, GFP_KERNEL);
393 if (!tc6393xb) { 413 if (!tc6393xb) {
394 retval = -ENOMEM; 414 ret = -ENOMEM;
395 goto err_kzalloc; 415 goto err_kzalloc;
396 } 416 }
397 417
398 spin_lock_init(&tc6393xb->lock); 418 spin_lock_init(&tc6393xb->lock);
399 419
400 platform_set_drvdata(dev, tc6393xb); 420 platform_set_drvdata(dev, tc6393xb);
421
422 ret = platform_get_irq(dev, 0);
423 if (ret >= 0)
424 tc6393xb->irq = ret;
425 else
426 goto err_noirq;
427
401 tc6393xb->iomem = iomem; 428 tc6393xb->iomem = iomem;
402 tc6393xb->irq = platform_get_irq(dev, 0);
403 tc6393xb->irq_base = tcpd->irq_base; 429 tc6393xb->irq_base = tcpd->irq_base;
404 430
405 tc6393xb->clk = clk_get(&dev->dev, "GPIO27_CLK" /* "CK3P6MI" */); 431 tc6393xb->clk = clk_get(&dev->dev, "CLK_CK3P6MI");
406 if (IS_ERR(tc6393xb->clk)) { 432 if (IS_ERR(tc6393xb->clk)) {
407 retval = PTR_ERR(tc6393xb->clk); 433 ret = PTR_ERR(tc6393xb->clk);
408 goto err_clk_get; 434 goto err_clk_get;
409 } 435 }
410 436
@@ -414,71 +440,73 @@ static int __devinit tc6393xb_probe(struct platform_device *dev)
414 rscr->end = iomem->start + 0xff; 440 rscr->end = iomem->start + 0xff;
415 rscr->flags = IORESOURCE_MEM; 441 rscr->flags = IORESOURCE_MEM;
416 442
417 retval = request_resource(iomem, rscr); 443 ret = request_resource(iomem, rscr);
418 if (retval) 444 if (ret)
419 goto err_request_scr; 445 goto err_request_scr;
420 446
421 tc6393xb->scr = ioremap(rscr->start, rscr->end - rscr->start + 1); 447 tc6393xb->scr = ioremap(rscr->start, rscr->end - rscr->start + 1);
422 if (!tc6393xb->scr) { 448 if (!tc6393xb->scr) {
423 retval = -ENOMEM; 449 ret = -ENOMEM;
424 goto err_ioremap; 450 goto err_ioremap;
425 } 451 }
426 452
427 retval = clk_enable(tc6393xb->clk); 453 ret = clk_enable(tc6393xb->clk);
428 if (retval) 454 if (ret)
429 goto err_clk_enable; 455 goto err_clk_enable;
430 456
431 retval = tcpd->enable(dev); 457 ret = tcpd->enable(dev);
432 if (retval) 458 if (ret)
433 goto err_enable; 459 goto err_enable;
434 460
435 tc6393xb->suspend_state.fer = 0; 461 tc6393xb->suspend_state.fer = 0;
462
436 for (i = 0; i < 3; i++) { 463 for (i = 0; i < 3; i++) {
437 tc6393xb->suspend_state.gpo_dsr[i] = 464 tc6393xb->suspend_state.gpo_dsr[i] =
438 (tcpd->scr_gpo_dsr >> (8 * i)) & 0xff; 465 (tcpd->scr_gpo_dsr >> (8 * i)) & 0xff;
439 tc6393xb->suspend_state.gpo_doecr[i] = 466 tc6393xb->suspend_state.gpo_doecr[i] =
440 (tcpd->scr_gpo_doecr >> (8 * i)) & 0xff; 467 (tcpd->scr_gpo_doecr >> (8 * i)) & 0xff;
441 } 468 }
442 /* 469
443 * It may be necessary to change this back to
444 * platform-dependant code
445 */
446 tc6393xb->suspend_state.ccr = SCR_CCR_UNK1 | 470 tc6393xb->suspend_state.ccr = SCR_CCR_UNK1 |
447 SCR_CCR_HCLK_48; 471 SCR_CCR_HCLK_48;
448 472
449 retval = tc6393xb_hw_init(dev); 473 ret = tc6393xb_hw_init(dev);
450 if (retval) 474 if (ret)
451 goto err_hw_init; 475 goto err_hw_init;
452 476
453 printk(KERN_INFO "Toshiba tc6393xb revision %d at 0x%08lx, irq %d\n", 477 printk(KERN_INFO "Toshiba tc6393xb revision %d at 0x%08lx, irq %d\n",
454 ioread8(tc6393xb->scr + SCR_REVID), 478 tmio_ioread8(tc6393xb->scr + SCR_REVID),
455 (unsigned long) iomem->start, tc6393xb->irq); 479 (unsigned long) iomem->start, tc6393xb->irq);
456 480
457 tc6393xb->gpio.base = -1; 481 tc6393xb->gpio.base = -1;
458 482
459 if (tcpd->gpio_base >= 0) { 483 if (tcpd->gpio_base >= 0) {
460 retval = tc6393xb_register_gpio(tc6393xb, tcpd->gpio_base); 484 ret = tc6393xb_register_gpio(tc6393xb, tcpd->gpio_base);
461 if (retval) 485 if (ret)
462 goto err_gpio_add; 486 goto err_gpio_add;
463 } 487 }
464 488
465 if (tc6393xb->irq) 489 tc6393xb_attach_irq(dev);
466 tc6393xb_attach_irq(dev);
467 490
468 tc6393xb_cells[TC6393XB_CELL_NAND].driver_data = tcpd->nand_data; 491 tc6393xb_cells[TC6393XB_CELL_NAND].driver_data = tcpd->nand_data;
469 tc6393xb_cells[TC6393XB_CELL_NAND].platform_data = 492 tc6393xb_cells[TC6393XB_CELL_NAND].platform_data =
470 &tc6393xb_cells[TC6393XB_CELL_NAND]; 493 &tc6393xb_cells[TC6393XB_CELL_NAND];
471 tc6393xb_cells[TC6393XB_CELL_NAND].data_size = 494 tc6393xb_cells[TC6393XB_CELL_NAND].data_size =
472 sizeof(tc6393xb_cells[TC6393XB_CELL_NAND]); 495 sizeof(tc6393xb_cells[TC6393XB_CELL_NAND]);
496 tc6393xb_cells[TC6393XB_CELL_MMC].platform_data =
497 &tc6393xb_cells[TC6393XB_CELL_MMC];
498 tc6393xb_cells[TC6393XB_CELL_MMC].data_size =
499 sizeof(tc6393xb_cells[TC6393XB_CELL_MMC]);
500
473 501
474 retval = mfd_add_devices(&dev->dev, dev->id, 502 ret = mfd_add_devices(&dev->dev, dev->id,
475 tc6393xb_cells, ARRAY_SIZE(tc6393xb_cells), 503 tc6393xb_cells, ARRAY_SIZE(tc6393xb_cells),
476 iomem, tcpd->irq_base); 504 iomem, tcpd->irq_base);
477 505
478 return 0; 506 if (!ret)
507 return 0;
479 508
480 if (tc6393xb->irq) 509 tc6393xb_detach_irq(dev);
481 tc6393xb_detach_irq(dev);
482 510
483err_gpio_add: 511err_gpio_add:
484 if (tc6393xb->gpio.base != -1) 512 if (tc6393xb->gpio.base != -1)
@@ -493,10 +521,11 @@ err_ioremap:
493 release_resource(&tc6393xb->rscr); 521 release_resource(&tc6393xb->rscr);
494err_request_scr: 522err_request_scr:
495 clk_put(tc6393xb->clk); 523 clk_put(tc6393xb->clk);
524err_noirq:
496err_clk_get: 525err_clk_get:
497 kfree(tc6393xb); 526 kfree(tc6393xb);
498err_kzalloc: 527err_kzalloc:
499 return retval; 528 return ret;
500} 529}
501 530
502static int __devexit tc6393xb_remove(struct platform_device *dev) 531static int __devexit tc6393xb_remove(struct platform_device *dev)
@@ -506,9 +535,7 @@ static int __devexit tc6393xb_remove(struct platform_device *dev)
506 int ret; 535 int ret;
507 536
508 mfd_remove_devices(&dev->dev); 537 mfd_remove_devices(&dev->dev);
509 538 tc6393xb_detach_irq(dev);
510 if (tc6393xb->irq)
511 tc6393xb_detach_irq(dev);
512 539
513 if (tc6393xb->gpio.base != -1) { 540 if (tc6393xb->gpio.base != -1) {
514 ret = gpiochip_remove(&tc6393xb->gpio); 541 ret = gpiochip_remove(&tc6393xb->gpio);
@@ -519,17 +546,11 @@ static int __devexit tc6393xb_remove(struct platform_device *dev)
519 } 546 }
520 547
521 ret = tcpd->disable(dev); 548 ret = tcpd->disable(dev);
522
523 clk_disable(tc6393xb->clk); 549 clk_disable(tc6393xb->clk);
524
525 iounmap(tc6393xb->scr); 550 iounmap(tc6393xb->scr);
526
527 release_resource(&tc6393xb->rscr); 551 release_resource(&tc6393xb->rscr);
528
529 platform_set_drvdata(dev, NULL); 552 platform_set_drvdata(dev, NULL);
530
531 clk_put(tc6393xb->clk); 553 clk_put(tc6393xb->clk);
532
533 kfree(tc6393xb); 554 kfree(tc6393xb);
534 555
535 return ret; 556 return ret;
@@ -540,8 +561,7 @@ static int tc6393xb_suspend(struct platform_device *dev, pm_message_t state)
540{ 561{
541 struct tc6393xb_platform_data *tcpd = dev->dev.platform_data; 562 struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
542 struct tc6393xb *tc6393xb = platform_get_drvdata(dev); 563 struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
543 int i; 564 int i, ret;
544
545 565
546 tc6393xb->suspend_state.ccr = ioread16(tc6393xb->scr + SCR_CCR); 566 tc6393xb->suspend_state.ccr = ioread16(tc6393xb->scr + SCR_CCR);
547 tc6393xb->suspend_state.fer = ioread8(tc6393xb->scr + SCR_FER); 567 tc6393xb->suspend_state.fer = ioread8(tc6393xb->scr + SCR_FER);
@@ -554,14 +574,21 @@ static int tc6393xb_suspend(struct platform_device *dev, pm_message_t state)
554 tc6393xb->suspend_state.gpi_bcr[i] = 574 tc6393xb->suspend_state.gpi_bcr[i] =
555 ioread8(tc6393xb->scr + SCR_GPI_BCR(i)); 575 ioread8(tc6393xb->scr + SCR_GPI_BCR(i));
556 } 576 }
577 ret = tcpd->suspend(dev);
578 clk_disable(tc6393xb->clk);
557 579
558 return tcpd->suspend(dev); 580 return ret;
559} 581}
560 582
561static int tc6393xb_resume(struct platform_device *dev) 583static int tc6393xb_resume(struct platform_device *dev)
562{ 584{
563 struct tc6393xb_platform_data *tcpd = dev->dev.platform_data; 585 struct tc6393xb_platform_data *tcpd = dev->dev.platform_data;
564 int ret = tcpd->resume(dev); 586 struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
587 int ret;
588
589 clk_enable(tc6393xb->clk);
590
591 ret = tcpd->resume(dev);
565 592
566 if (ret) 593 if (ret)
567 return ret; 594 return ret;
@@ -598,7 +625,7 @@ static void __exit tc6393xb_exit(void)
598subsys_initcall(tc6393xb_init); 625subsys_initcall(tc6393xb_init);
599module_exit(tc6393xb_exit); 626module_exit(tc6393xb_exit);
600 627
601MODULE_LICENSE("GPL"); 628MODULE_LICENSE("GPL v2");
602MODULE_AUTHOR("Ian Molton, Dmitry Baryshkov and Dirk Opfer"); 629MODULE_AUTHOR("Ian Molton, Dmitry Baryshkov and Dirk Opfer");
603MODULE_DESCRIPTION("tc6393xb Toshiba Mobile IO Controller"); 630MODULE_DESCRIPTION("tc6393xb Toshiba Mobile IO Controller");
604MODULE_ALIAS("platform:tc6393xb"); 631MODULE_ALIAS("platform:tc6393xb");
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index dc6f2579f85c..ea8d7a3490d9 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -174,3 +174,9 @@ config MMC_SDRICOH_CS
174 To compile this driver as a module, choose M here: the 174 To compile this driver as a module, choose M here: the
175 module will be called sdricoh_cs. 175 module will be called sdricoh_cs.
176 176
177config MMC_TMIO
178 tristate "Toshiba Mobile IO Controller (TMIO) MMC/SD function support"
179 depends on MFD_TMIO
180 help
181 This provides support for the SD/MMC cell found in TC6393XB,
182 T7L66XB and also ipaq ASIC3
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index db52eebfb50e..c794cc5ce442 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -21,4 +21,5 @@ obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o
21obj-$(CONFIG_MMC_SPI) += mmc_spi.o 21obj-$(CONFIG_MMC_SPI) += mmc_spi.o
22obj-$(CONFIG_MMC_S3C) += s3cmci.o 22obj-$(CONFIG_MMC_S3C) += s3cmci.o
23obj-$(CONFIG_MMC_SDRICOH_CS) += sdricoh_cs.o 23obj-$(CONFIG_MMC_SDRICOH_CS) += sdricoh_cs.o
24obj-$(CONFIG_MMC_TMIO) += tmio_mmc.o
24 25
diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c
new file mode 100644
index 000000000000..95430b81ec11
--- /dev/null
+++ b/drivers/mmc/host/tmio_mmc.c
@@ -0,0 +1,691 @@
1/*
2 * linux/drivers/mmc/tmio_mmc.c
3 *
4 * Copyright (C) 2004 Ian Molton
5 * Copyright (C) 2007 Ian Molton
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Driver for the MMC / SD / SDIO cell found in:
12 *
13 * TC6393XB TC6391XB TC6387XB T7L66XB
14 *
15 * This driver draws mainly on scattered spec sheets, Reverse engineering
16 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
17 * support). (Further 4 bit support from a later datasheet).
18 *
19 * TODO:
20 * Investigate using a workqueue for PIO transfers
21 * Eliminate FIXMEs
22 * SDIO support
23 * Better Power management
24 * Handle MMC errors better
25 * double buffer support
26 *
27 */
28#include <linux/module.h>
29#include <linux/irq.h>
30#include <linux/device.h>
31#include <linux/delay.h>
32#include <linux/mmc/host.h>
33#include <linux/mfd/core.h>
34#include <linux/mfd/tmio.h>
35
36#include "tmio_mmc.h"
37
38/*
39 * Fixme - documentation conflicts on what the clock values are for the
40 * various dividers.
41 * One document I have says that its a divisor of a 24MHz clock, another 33.
42 * This probably depends on HCLK for a given platform, so we may need to
43 * require HCLK be passed to us from the MFD core.
44 *
45 */
46
47static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
48{
49 void __iomem *cnf = host->cnf;
50 void __iomem *ctl = host->ctl;
51 u32 clk = 0, clock;
52
53 if (new_clock) {
54 for (clock = 46875, clk = 0x100; new_clock >= (clock<<1); ) {
55 clock <<= 1;
56 clk >>= 1;
57 }
58 if (clk & 0x1)
59 clk = 0x20000;
60
61 clk >>= 2;
62 tmio_iowrite8((clk & 0x8000) ? 0 : 1, cnf + CNF_SD_CLK_MODE);
63 clk |= 0x100;
64 }
65
66 tmio_iowrite16(clk, ctl + CTL_SD_CARD_CLK_CTL);
67}
68
69static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
70{
71 void __iomem *ctl = host->ctl;
72
73 tmio_iowrite16(0x0000, ctl + CTL_CLK_AND_WAIT_CTL);
74 msleep(10);
75 tmio_iowrite16(tmio_ioread16(ctl + CTL_SD_CARD_CLK_CTL) & ~0x0100,
76 ctl + CTL_SD_CARD_CLK_CTL);
77 msleep(10);
78}
79
80static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
81{
82 void __iomem *ctl = host->ctl;
83
84 tmio_iowrite16(tmio_ioread16(ctl + CTL_SD_CARD_CLK_CTL) | 0x0100,
85 ctl + CTL_SD_CARD_CLK_CTL);
86 msleep(10);
87 tmio_iowrite16(0x0100, ctl + CTL_CLK_AND_WAIT_CTL);
88 msleep(10);
89}
90
91static void reset(struct tmio_mmc_host *host)
92{
93 void __iomem *ctl = host->ctl;
94
95 /* FIXME - should we set stop clock reg here */
96 tmio_iowrite16(0x0000, ctl + CTL_RESET_SD);
97 tmio_iowrite16(0x0000, ctl + CTL_RESET_SDIO);
98 msleep(10);
99 tmio_iowrite16(0x0001, ctl + CTL_RESET_SD);
100 tmio_iowrite16(0x0001, ctl + CTL_RESET_SDIO);
101 msleep(10);
102}
103
104static void
105tmio_mmc_finish_request(struct tmio_mmc_host *host)
106{
107 struct mmc_request *mrq = host->mrq;
108
109 host->mrq = NULL;
110 host->cmd = NULL;
111 host->data = NULL;
112
113 mmc_request_done(host->mmc, mrq);
114}
115
116/* These are the bitmasks the tmio chip requires to implement the MMC response
117 * types. Note that R1 and R6 are the same in this scheme. */
118#define APP_CMD 0x0040
119#define RESP_NONE 0x0300
120#define RESP_R1 0x0400
121#define RESP_R1B 0x0500
122#define RESP_R2 0x0600
123#define RESP_R3 0x0700
124#define DATA_PRESENT 0x0800
125#define TRANSFER_READ 0x1000
126#define TRANSFER_MULTI 0x2000
127#define SECURITY_CMD 0x4000
128
129static int
130tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
131{
132 void __iomem *ctl = host->ctl;
133 struct mmc_data *data = host->data;
134 int c = cmd->opcode;
135
136 /* Command 12 is handled by hardware */
137 if (cmd->opcode == 12 && !cmd->arg) {
138 tmio_iowrite16(0x001, ctl + CTL_STOP_INTERNAL_ACTION);
139 return 0;
140 }
141
142 switch (mmc_resp_type(cmd)) {
143 case MMC_RSP_NONE: c |= RESP_NONE; break;
144 case MMC_RSP_R1: c |= RESP_R1; break;
145 case MMC_RSP_R1B: c |= RESP_R1B; break;
146 case MMC_RSP_R2: c |= RESP_R2; break;
147 case MMC_RSP_R3: c |= RESP_R3; break;
148 default:
149 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
150 return -EINVAL;
151 }
152
153 host->cmd = cmd;
154
155/* FIXME - this seems to be ok comented out but the spec suggest this bit should
156 * be set when issuing app commands.
157 * if(cmd->flags & MMC_FLAG_ACMD)
158 * c |= APP_CMD;
159 */
160 if (data) {
161 c |= DATA_PRESENT;
162 if (data->blocks > 1) {
163 tmio_iowrite16(0x100, ctl + CTL_STOP_INTERNAL_ACTION);
164 c |= TRANSFER_MULTI;
165 }
166 if (data->flags & MMC_DATA_READ)
167 c |= TRANSFER_READ;
168 }
169
170 enable_mmc_irqs(ctl, TMIO_MASK_CMD);
171
172 /* Fire off the command */
173 tmio_iowrite32(cmd->arg, ctl + CTL_ARG_REG);
174 tmio_iowrite16(c, ctl + CTL_SD_CMD);
175
176 return 0;
177}
178
179/* This chip always returns (at least?) as much data as you ask for.
180 * I'm unsure what happens if you ask for less than a block. This should be
181 * looked into to ensure that a funny length read doesnt hose the controller.
182 *
183 */
184static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
185{
186 void __iomem *ctl = host->ctl;
187 struct mmc_data *data = host->data;
188 unsigned short *buf;
189 unsigned int count;
190 unsigned long flags;
191
192 if (!data) {
193 pr_debug("Spurious PIO IRQ\n");
194 return;
195 }
196
197 buf = (unsigned short *)(tmio_mmc_kmap_atomic(host, &flags) +
198 host->sg_off);
199
200 count = host->sg_ptr->length - host->sg_off;
201 if (count > data->blksz)
202 count = data->blksz;
203
204 pr_debug("count: %08x offset: %08x flags %08x\n",
205 count, host->sg_off, data->flags);
206
207 /* Transfer the data */
208 if (data->flags & MMC_DATA_READ)
209 tmio_ioread16_rep(ctl + CTL_SD_DATA_PORT, buf, count >> 1);
210 else
211 tmio_iowrite16_rep(ctl + CTL_SD_DATA_PORT, buf, count >> 1);
212
213 host->sg_off += count;
214
215 tmio_mmc_kunmap_atomic(host, &flags);
216
217 if (host->sg_off == host->sg_ptr->length)
218 tmio_mmc_next_sg(host);
219
220 return;
221}
222
223static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
224{
225 void __iomem *ctl = host->ctl;
226 struct mmc_data *data = host->data;
227 struct mmc_command *stop = data->stop;
228
229 host->data = NULL;
230
231 if (!data) {
232 pr_debug("Spurious data end IRQ\n");
233 return;
234 }
235
236 /* FIXME - return correct transfer count on errors */
237 if (!data->error)
238 data->bytes_xfered = data->blocks * data->blksz;
239 else
240 data->bytes_xfered = 0;
241
242 pr_debug("Completed data request\n");
243
244 /*FIXME - other drivers allow an optional stop command of any given type
245 * which we dont do, as the chip can auto generate them.
246 * Perhaps we can be smarter about when to use auto CMD12 and
247 * only issue the auto request when we know this is the desired
248 * stop command, allowing fallback to the stop command the
249 * upper layers expect. For now, we do what works.
250 */
251
252 if (data->flags & MMC_DATA_READ)
253 disable_mmc_irqs(ctl, TMIO_MASK_READOP);
254 else
255 disable_mmc_irqs(ctl, TMIO_MASK_WRITEOP);
256
257 if (stop) {
258 if (stop->opcode == 12 && !stop->arg)
259 tmio_iowrite16(0x000, ctl + CTL_STOP_INTERNAL_ACTION);
260 else
261 BUG();
262 }
263
264 tmio_mmc_finish_request(host);
265}
266
267static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
268 unsigned int stat)
269{
270 void __iomem *ctl = host->ctl, *addr;
271 struct mmc_command *cmd = host->cmd;
272 int i;
273
274 if (!host->cmd) {
275 pr_debug("Spurious CMD irq\n");
276 return;
277 }
278
279 host->cmd = NULL;
280
281 /* This controller is sicker than the PXA one. Not only do we need to
282 * drop the top 8 bits of the first response word, we also need to
283 * modify the order of the response for short response command types.
284 */
285
286 for (i = 3, addr = ctl + CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
287 cmd->resp[i] = tmio_ioread32(addr);
288
289 if (cmd->flags & MMC_RSP_136) {
290 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
291 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
292 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
293 cmd->resp[3] <<= 8;
294 } else if (cmd->flags & MMC_RSP_R3) {
295 cmd->resp[0] = cmd->resp[3];
296 }
297
298 if (stat & TMIO_STAT_CMDTIMEOUT)
299 cmd->error = -ETIMEDOUT;
300 else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
301 cmd->error = -EILSEQ;
302
303 /* If there is data to handle we enable data IRQs here, and
304 * we will ultimatley finish the request in the data_end handler.
305 * If theres no data or we encountered an error, finish now.
306 */
307 if (host->data && !cmd->error) {
308 if (host->data->flags & MMC_DATA_READ)
309 enable_mmc_irqs(ctl, TMIO_MASK_READOP);
310 else
311 enable_mmc_irqs(ctl, TMIO_MASK_WRITEOP);
312 } else {
313 tmio_mmc_finish_request(host);
314 }
315
316 return;
317}
318
319
320static irqreturn_t tmio_mmc_irq(int irq, void *devid)
321{
322 struct tmio_mmc_host *host = devid;
323 void __iomem *ctl = host->ctl;
324 unsigned int ireg, irq_mask, status;
325
326 pr_debug("MMC IRQ begin\n");
327
328 status = tmio_ioread32(ctl + CTL_STATUS);
329 irq_mask = tmio_ioread32(ctl + CTL_IRQ_MASK);
330 ireg = status & TMIO_MASK_IRQ & ~irq_mask;
331
332 pr_debug_status(status);
333 pr_debug_status(ireg);
334
335 if (!ireg) {
336 disable_mmc_irqs(ctl, status & ~irq_mask);
337
338 pr_debug("tmio_mmc: Spurious irq, disabling! "
339 "0x%08x 0x%08x 0x%08x\n", status, irq_mask, ireg);
340 pr_debug_status(status);
341
342 goto out;
343 }
344
345 while (ireg) {
346 /* Card insert / remove attempts */
347 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
348 ack_mmc_irqs(ctl, TMIO_STAT_CARD_INSERT |
349 TMIO_STAT_CARD_REMOVE);
350 mmc_detect_change(host->mmc, 0);
351 }
352
353 /* CRC and other errors */
354/* if (ireg & TMIO_STAT_ERR_IRQ)
355 * handled |= tmio_error_irq(host, irq, stat);
356 */
357
358 /* Command completion */
359 if (ireg & TMIO_MASK_CMD) {
360 ack_mmc_irqs(ctl, TMIO_MASK_CMD);
361 tmio_mmc_cmd_irq(host, status);
362 }
363
364 /* Data transfer */
365 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
366 ack_mmc_irqs(ctl, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
367 tmio_mmc_pio_irq(host);
368 }
369
370 /* Data transfer completion */
371 if (ireg & TMIO_STAT_DATAEND) {
372 ack_mmc_irqs(ctl, TMIO_STAT_DATAEND);
373 tmio_mmc_data_irq(host);
374 }
375
376 /* Check status - keep going until we've handled it all */
377 status = tmio_ioread32(ctl + CTL_STATUS);
378 irq_mask = tmio_ioread32(ctl + CTL_IRQ_MASK);
379 ireg = status & TMIO_MASK_IRQ & ~irq_mask;
380
381 pr_debug("Status at end of loop: %08x\n", status);
382 pr_debug_status(status);
383 }
384 pr_debug("MMC IRQ end\n");
385
386out:
387 return IRQ_HANDLED;
388}
389
390static int tmio_mmc_start_data(struct tmio_mmc_host *host,
391 struct mmc_data *data)
392{
393 void __iomem *ctl = host->ctl;
394
395 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
396 data->blksz, data->blocks);
397
398 /* Hardware cannot perform 1 and 2 byte requests in 4 bit mode */
399 if (data->blksz < 4 && host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
400 printk(KERN_ERR "%s: %d byte block unsupported in 4 bit mode\n",
401 mmc_hostname(host->mmc), data->blksz);
402 return -EINVAL;
403 }
404
405 tmio_mmc_init_sg(host, data);
406 host->data = data;
407
408 /* Set transfer length / blocksize */
409 tmio_iowrite16(data->blksz, ctl + CTL_SD_XFER_LEN);
410 tmio_iowrite16(data->blocks, ctl + CTL_XFER_BLK_COUNT);
411
412 return 0;
413}
414
415/* Process requests from the MMC layer */
416static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
417{
418 struct tmio_mmc_host *host = mmc_priv(mmc);
419 int ret;
420
421 if (host->mrq)
422 pr_debug("request not null\n");
423
424 host->mrq = mrq;
425
426 if (mrq->data) {
427 ret = tmio_mmc_start_data(host, mrq->data);
428 if (ret)
429 goto fail;
430 }
431
432 ret = tmio_mmc_start_command(host, mrq->cmd);
433
434 if (!ret)
435 return;
436
437fail:
438 mrq->cmd->error = ret;
439 mmc_request_done(mmc, mrq);
440}
441
442/* Set MMC clock / power.
443 * Note: This controller uses a simple divider scheme therefore it cannot
444 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
445 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
446 * slowest setting.
447 */
448static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
449{
450 struct tmio_mmc_host *host = mmc_priv(mmc);
451 void __iomem *cnf = host->cnf;
452 void __iomem *ctl = host->ctl;
453
454 if (ios->clock)
455 tmio_mmc_set_clock(host, ios->clock);
456
457 /* Power sequence - OFF -> ON -> UP */
458 switch (ios->power_mode) {
459 case MMC_POWER_OFF: /* power down SD bus */
460 tmio_iowrite8(0x00, cnf + CNF_PWR_CTL_2);
461 tmio_mmc_clk_stop(host);
462 break;
463 case MMC_POWER_ON: /* power up SD bus */
464
465 tmio_iowrite8(0x02, cnf + CNF_PWR_CTL_2);
466 break;
467 case MMC_POWER_UP: /* start bus clock */
468 tmio_mmc_clk_start(host);
469 break;
470 }
471
472 switch (ios->bus_width) {
473 case MMC_BUS_WIDTH_1:
474 tmio_iowrite16(0x80e0, ctl + CTL_SD_MEM_CARD_OPT);
475 break;
476 case MMC_BUS_WIDTH_4:
477 tmio_iowrite16(0x00e0, ctl + CTL_SD_MEM_CARD_OPT);
478 break;
479 }
480
481 /* Let things settle. delay taken from winCE driver */
482 udelay(140);
483}
484
485static int tmio_mmc_get_ro(struct mmc_host *mmc)
486{
487 struct tmio_mmc_host *host = mmc_priv(mmc);
488 void __iomem *ctl = host->ctl;
489
490 return (tmio_ioread16(ctl + CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1;
491}
492
493static struct mmc_host_ops tmio_mmc_ops = {
494 .request = tmio_mmc_request,
495 .set_ios = tmio_mmc_set_ios,
496 .get_ro = tmio_mmc_get_ro,
497};
498
499#ifdef CONFIG_PM
500static int tmio_mmc_suspend(struct platform_device *dev, pm_message_t state)
501{
502 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
503 struct mmc_host *mmc = platform_get_drvdata(dev);
504 int ret;
505
506 ret = mmc_suspend_host(mmc, state);
507
508 /* Tell MFD core it can disable us now.*/
509 if (!ret && cell->disable)
510 cell->disable(dev);
511
512 return ret;
513}
514
515static int tmio_mmc_resume(struct platform_device *dev)
516{
517 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
518 struct mmc_host *mmc = platform_get_drvdata(dev);
519 struct tmio_mmc_host *host = mmc_priv(mmc);
520 void __iomem *cnf = host->cnf;
521 int ret = 0;
522
523 /* Enable the MMC/SD Control registers */
524 tmio_iowrite16(SDCREN, cnf + CNF_CMD);
525 tmio_iowrite32(dev->resource[0].start & 0xfffe, cnf + CNF_CTL_BASE);
526
527 /* Tell the MFD core we are ready to be enabled */
528 if (cell->enable) {
529 ret = cell->enable(dev);
530 if (ret)
531 goto out;
532 }
533
534 mmc_resume_host(mmc);
535
536out:
537 return ret;
538}
539#else
540#define tmio_mmc_suspend NULL
541#define tmio_mmc_resume NULL
542#endif
543
544static int __devinit tmio_mmc_probe(struct platform_device *dev)
545{
546 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
547 struct resource *res_ctl, *res_cnf;
548 struct tmio_mmc_host *host;
549 struct mmc_host *mmc;
550 int ret = -ENOMEM;
551
552 if (dev->num_resources != 3)
553 goto out;
554
555 res_ctl = platform_get_resource(dev, IORESOURCE_MEM, 0);
556 res_cnf = platform_get_resource(dev, IORESOURCE_MEM, 1);
557 if (!res_ctl || !res_cnf) {
558 ret = -EINVAL;
559 goto out;
560 }
561
562 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &dev->dev);
563 if (!mmc)
564 goto out;
565
566 host = mmc_priv(mmc);
567 host->mmc = mmc;
568 platform_set_drvdata(dev, mmc);
569
570 host->ctl = ioremap(res_ctl->start, res_ctl->end - res_ctl->start);
571 if (!host->ctl)
572 goto host_free;
573
574 host->cnf = ioremap(res_cnf->start, res_cnf->end - res_cnf->start);
575 if (!host->cnf)
576 goto unmap_ctl;
577
578 mmc->ops = &tmio_mmc_ops;
579 mmc->caps = MMC_CAP_4_BIT_DATA;
580 mmc->f_min = 46875; /* 24000000 / 512 */
581 mmc->f_max = 24000000;
582 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
583
584 /* Enable the MMC/SD Control registers */
585 tmio_iowrite16(SDCREN, host->cnf + CNF_CMD);
586 tmio_iowrite32(dev->resource[0].start & 0xfffe,
587 host->cnf + CNF_CTL_BASE);
588
589 /* Tell the MFD core we are ready to be enabled */
590 if (cell->enable) {
591 ret = cell->enable(dev);
592 if (ret)
593 goto unmap_cnf;
594 }
595
596 /* Disable SD power during suspend */
597 tmio_iowrite8(0x01, host->cnf + CNF_PWR_CTL_3);
598
599 /* The below is required but why? FIXME */
600 tmio_iowrite8(0x1f, host->cnf + CNF_STOP_CLK_CTL);
601
602 /* Power down SD bus*/
603 tmio_iowrite8(0x0, host->cnf + CNF_PWR_CTL_2);
604
605 tmio_mmc_clk_stop(host);
606 reset(host);
607
608 ret = platform_get_irq(dev, 0);
609 if (ret >= 0)
610 host->irq = ret;
611 else
612 goto unmap_cnf;
613
614 disable_mmc_irqs(host->ctl, TMIO_MASK_ALL);
615
616 ret = request_irq(host->irq, tmio_mmc_irq, IRQF_DISABLED, "tmio-mmc",
617 host);
618 if (ret)
619 goto unmap_cnf;
620
621 set_irq_type(host->irq, IRQ_TYPE_EDGE_FALLING);
622
623 mmc_add_host(mmc);
624
625 printk(KERN_INFO "%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc),
626 (unsigned long)host->ctl, host->irq);
627
628 /* Unmask the IRQs we want to know about */
629 enable_mmc_irqs(host->ctl, TMIO_MASK_IRQ);
630
631 return 0;
632
633unmap_cnf:
634 iounmap(host->cnf);
635unmap_ctl:
636 iounmap(host->ctl);
637host_free:
638 mmc_free_host(mmc);
639out:
640 return ret;
641}
642
643static int __devexit tmio_mmc_remove(struct platform_device *dev)
644{
645 struct mmc_host *mmc = platform_get_drvdata(dev);
646
647 platform_set_drvdata(dev, NULL);
648
649 if (mmc) {
650 struct tmio_mmc_host *host = mmc_priv(mmc);
651 mmc_remove_host(mmc);
652 mmc_free_host(mmc);
653 free_irq(host->irq, host);
654 iounmap(host->ctl);
655 iounmap(host->cnf);
656 }
657
658 return 0;
659}
660
661/* ------------------- device registration ----------------------- */
662
663static struct platform_driver tmio_mmc_driver = {
664 .driver = {
665 .name = "tmio-mmc",
666 .owner = THIS_MODULE,
667 },
668 .probe = tmio_mmc_probe,
669 .remove = __devexit_p(tmio_mmc_remove),
670 .suspend = tmio_mmc_suspend,
671 .resume = tmio_mmc_resume,
672};
673
674
675static int __init tmio_mmc_init(void)
676{
677 return platform_driver_register(&tmio_mmc_driver);
678}
679
680static void __exit tmio_mmc_exit(void)
681{
682 platform_driver_unregister(&tmio_mmc_driver);
683}
684
685module_init(tmio_mmc_init);
686module_exit(tmio_mmc_exit);
687
688MODULE_DESCRIPTION("Toshiba TMIO SD/MMC driver");
689MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
690MODULE_LICENSE("GPL v2");
691MODULE_ALIAS("platform:tmio-mmc");
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
new file mode 100644
index 000000000000..9e647a06054f
--- /dev/null
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -0,0 +1,194 @@
1/* Definitons for use with the tmio_mmc.c
2 *
3 * (c) 2004 Ian Molton <spyro@f2s.com>
4 * (c) 2007 Ian Molton <spyro@f2s.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11#define CNF_CMD 0x04
12#define CNF_CTL_BASE 0x10
13#define CNF_INT_PIN 0x3d
14#define CNF_STOP_CLK_CTL 0x40
15#define CNF_GCLK_CTL 0x41
16#define CNF_SD_CLK_MODE 0x42
17#define CNF_PIN_STATUS 0x44
18#define CNF_PWR_CTL_1 0x48
19#define CNF_PWR_CTL_2 0x49
20#define CNF_PWR_CTL_3 0x4a
21#define CNF_CARD_DETECT_MODE 0x4c
22#define CNF_SD_SLOT 0x50
23#define CNF_EXT_GCLK_CTL_1 0xf0
24#define CNF_EXT_GCLK_CTL_2 0xf1
25#define CNF_EXT_GCLK_CTL_3 0xf9
26#define CNF_SD_LED_EN_1 0xfa
27#define CNF_SD_LED_EN_2 0xfe
28
29#define SDCREN 0x2 /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/
30
31#define CTL_SD_CMD 0x00
32#define CTL_ARG_REG 0x04
33#define CTL_STOP_INTERNAL_ACTION 0x08
34#define CTL_XFER_BLK_COUNT 0xa
35#define CTL_RESPONSE 0x0c
36#define CTL_STATUS 0x1c
37#define CTL_IRQ_MASK 0x20
38#define CTL_SD_CARD_CLK_CTL 0x24
39#define CTL_SD_XFER_LEN 0x26
40#define CTL_SD_MEM_CARD_OPT 0x28
41#define CTL_SD_ERROR_DETAIL_STATUS 0x2c
42#define CTL_SD_DATA_PORT 0x30
43#define CTL_TRANSACTION_CTL 0x34
44#define CTL_RESET_SD 0xe0
45#define CTL_SDIO_REGS 0x100
46#define CTL_CLK_AND_WAIT_CTL 0x138
47#define CTL_RESET_SDIO 0x1e0
48
49/* Definitions for values the CTRL_STATUS register can take. */
50#define TMIO_STAT_CMDRESPEND 0x00000001
51#define TMIO_STAT_DATAEND 0x00000004
52#define TMIO_STAT_CARD_REMOVE 0x00000008
53#define TMIO_STAT_CARD_INSERT 0x00000010
54#define TMIO_STAT_SIGSTATE 0x00000020
55#define TMIO_STAT_WRPROTECT 0x00000080
56#define TMIO_STAT_CARD_REMOVE_A 0x00000100
57#define TMIO_STAT_CARD_INSERT_A 0x00000200
58#define TMIO_STAT_SIGSTATE_A 0x00000400
59#define TMIO_STAT_CMD_IDX_ERR 0x00010000
60#define TMIO_STAT_CRCFAIL 0x00020000
61#define TMIO_STAT_STOPBIT_ERR 0x00040000
62#define TMIO_STAT_DATATIMEOUT 0x00080000
63#define TMIO_STAT_RXOVERFLOW 0x00100000
64#define TMIO_STAT_TXUNDERRUN 0x00200000
65#define TMIO_STAT_CMDTIMEOUT 0x00400000
66#define TMIO_STAT_RXRDY 0x01000000
67#define TMIO_STAT_TXRQ 0x02000000
68#define TMIO_STAT_ILL_FUNC 0x20000000
69#define TMIO_STAT_CMD_BUSY 0x40000000
70#define TMIO_STAT_ILL_ACCESS 0x80000000
71
72/* Define some IRQ masks */
73/* This is the mask used at reset by the chip */
74#define TMIO_MASK_ALL 0x837f031d
75#define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND | \
76 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
77#define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND | \
78 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
79#define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
80 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
81#define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
82
83#define enable_mmc_irqs(ctl, i) \
84 do { \
85 u32 mask;\
86 mask = tmio_ioread32((ctl) + CTL_IRQ_MASK); \
87 mask &= ~((i) & TMIO_MASK_IRQ); \
88 tmio_iowrite32(mask, (ctl) + CTL_IRQ_MASK); \
89 } while (0)
90
91#define disable_mmc_irqs(ctl, i) \
92 do { \
93 u32 mask;\
94 mask = tmio_ioread32((ctl) + CTL_IRQ_MASK); \
95 mask |= ((i) & TMIO_MASK_IRQ); \
96 tmio_iowrite32(mask, (ctl) + CTL_IRQ_MASK); \
97 } while (0)
98
99#define ack_mmc_irqs(ctl, i) \
100 do { \
101 u32 mask;\
102 mask = tmio_ioread32((ctl) + CTL_STATUS); \
103 mask &= ~((i) & TMIO_MASK_IRQ); \
104 tmio_iowrite32(mask, (ctl) + CTL_STATUS); \
105 } while (0)
106
107
108struct tmio_mmc_host {
109 void __iomem *cnf;
110 void __iomem *ctl;
111 struct mmc_command *cmd;
112 struct mmc_request *mrq;
113 struct mmc_data *data;
114 struct mmc_host *mmc;
115 int irq;
116
117 /* pio related stuff */
118 struct scatterlist *sg_ptr;
119 unsigned int sg_len;
120 unsigned int sg_off;
121};
122
123#include <linux/scatterlist.h>
124#include <linux/blkdev.h>
125
126static inline void tmio_mmc_init_sg(struct tmio_mmc_host *host,
127 struct mmc_data *data)
128{
129 host->sg_len = data->sg_len;
130 host->sg_ptr = data->sg;
131 host->sg_off = 0;
132}
133
134static inline int tmio_mmc_next_sg(struct tmio_mmc_host *host)
135{
136 host->sg_ptr = sg_next(host->sg_ptr);
137 host->sg_off = 0;
138 return --host->sg_len;
139}
140
141static inline char *tmio_mmc_kmap_atomic(struct tmio_mmc_host *host,
142 unsigned long *flags)
143{
144 struct scatterlist *sg = host->sg_ptr;
145
146 local_irq_save(*flags);
147 return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
148}
149
150static inline void tmio_mmc_kunmap_atomic(struct tmio_mmc_host *host,
151 unsigned long *flags)
152{
153 kunmap_atomic(sg_page(host->sg_ptr), KM_BIO_SRC_IRQ);
154 local_irq_restore(*flags);
155}
156
157#ifdef CONFIG_MMC_DEBUG
158
159#define STATUS_TO_TEXT(a) \
160 do { \
161 if (status & TMIO_STAT_##a) \
162 printf(#a); \
163 } while (0)
164
165void debug_status(u32 status)
166{
167 printk(KERN_DEBUG "status: %08x = ", status);
168 STATUS_TO_TEXT(CARD_REMOVE);
169 STATUS_TO_TEXT(CARD_INSERT);
170 STATUS_TO_TEXT(SIGSTATE);
171 STATUS_TO_TEXT(WRPROTECT);
172 STATUS_TO_TEXT(CARD_REMOVE_A);
173 STATUS_TO_TEXT(CARD_INSERT_A);
174 STATUS_TO_TEXT(SIGSTATE_A);
175 STATUS_TO_TEXT(CMD_IDX_ERR);
176 STATUS_TO_TEXT(STOPBIT_ERR);
177 STATUS_TO_TEXT(ILL_FUNC);
178 STATUS_TO_TEXT(CMD_BUSY);
179 STATUS_TO_TEXT(CMDRESPEND);
180 STATUS_TO_TEXT(DATAEND);
181 STATUS_TO_TEXT(CRCFAIL);
182 STATUS_TO_TEXT(DATATIMEOUT);
183 STATUS_TO_TEXT(CMDTIMEOUT);
184 STATUS_TO_TEXT(RXOVERFLOW);
185 STATUS_TO_TEXT(TXUNDERRUN);
186 STATUS_TO_TEXT(RXRDY);
187 STATUS_TO_TEXT(TXRQ);
188 STATUS_TO_TEXT(ILL_ACCESS);
189 printk("\n");
190}
191
192#else
193#define pr_debug_status(s) do { } while (0)
194#endif
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 02f9cc30d77b..41f361c49b32 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -351,6 +351,13 @@ config MTD_NAND_PASEMI
351 Enables support for NAND Flash interface on PA Semi PWRficient 351 Enables support for NAND Flash interface on PA Semi PWRficient
352 based boards 352 based boards
353 353
354config MTD_NAND_TMIO
355 tristate "NAND Flash device on Toshiba Mobile IO Controller"
356 depends on MTD_NAND && MFD_TMIO
357 help
358 Support for NAND flash connected to a Toshiba Mobile IO
359 Controller in some PDAs, including the Sharp SL6000x.
360
354config MTD_NAND_NANDSIM 361config MTD_NAND_NANDSIM
355 tristate "Support for NAND Flash Simulator" 362 tristate "Support for NAND Flash Simulator"
356 depends on MTD_PARTITIONS 363 depends on MTD_PARTITIONS
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index d772581de573..b786c5da82da 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_MTD_NAND_ATMEL) += atmel_nand.o
27obj-$(CONFIG_MTD_NAND_CM_X270) += cmx270_nand.o 27obj-$(CONFIG_MTD_NAND_CM_X270) += cmx270_nand.o
28obj-$(CONFIG_MTD_NAND_BASLER_EXCITE) += excite_nandflash.o 28obj-$(CONFIG_MTD_NAND_BASLER_EXCITE) += excite_nandflash.o
29obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o 29obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o
30obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o
30obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o 31obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o
31obj-$(CONFIG_MTD_ALAUDA) += alauda.o 32obj-$(CONFIG_MTD_ALAUDA) += alauda.o
32obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o 33obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o
diff --git a/drivers/mtd/nand/tmio_nand.c b/drivers/mtd/nand/tmio_nand.c
new file mode 100644
index 000000000000..cbab654b03c8
--- /dev/null
+++ b/drivers/mtd/nand/tmio_nand.c
@@ -0,0 +1,556 @@
1/*
2 * Toshiba TMIO NAND flash controller driver
3 *
4 * Slightly murky pre-git history of the driver:
5 *
6 * Copyright (c) Ian Molton 2004, 2005, 2008
7 * Original work, independant of sharps code. Included hardware ECC support.
8 * Hard ECC did not work for writes in the early revisions.
9 * Copyright (c) Dirk Opfer 2005.
10 * Modifications developed from sharps code but
11 * NOT containing any, ported onto Ians base.
12 * Copyright (c) Chris Humbert 2005
13 * Copyright (c) Dmitry Baryshkov 2008
14 * Minor fixes
15 *
16 * Parts copyright Sebastian Carlier
17 *
18 * This file is licensed under
19 * the terms of the GNU General Public License version 2. This program
20 * is licensed "as is" without any warranty of any kind, whether express
21 * or implied.
22 *
23 */
24
25
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/platform_device.h>
29#include <linux/mfd/core.h>
30#include <linux/mfd/tmio.h>
31#include <linux/delay.h>
32#include <linux/io.h>
33#include <linux/irq.h>
34#include <linux/interrupt.h>
35#include <linux/ioport.h>
36#include <linux/mtd/mtd.h>
37#include <linux/mtd/nand.h>
38#include <linux/mtd/nand_ecc.h>
39#include <linux/mtd/partitions.h>
40
41/*--------------------------------------------------------------------------*/
42
43/*
44 * NAND Flash Host Controller Configuration Register
45 */
46#define CCR_COMMAND 0x04 /* w Command */
47#define CCR_BASE 0x10 /* l NAND Flash Control Reg Base Addr */
48#define CCR_INTP 0x3d /* b Interrupt Pin */
49#define CCR_INTE 0x48 /* b Interrupt Enable */
50#define CCR_EC 0x4a /* b Event Control */
51#define CCR_ICC 0x4c /* b Internal Clock Control */
52#define CCR_ECCC 0x5b /* b ECC Control */
53#define CCR_NFTC 0x60 /* b NAND Flash Transaction Control */
54#define CCR_NFM 0x61 /* b NAND Flash Monitor */
55#define CCR_NFPSC 0x62 /* b NAND Flash Power Supply Control */
56#define CCR_NFDC 0x63 /* b NAND Flash Detect Control */
57
58/*
59 * NAND Flash Control Register
60 */
61#define FCR_DATA 0x00 /* bwl Data Register */
62#define FCR_MODE 0x04 /* b Mode Register */
63#define FCR_STATUS 0x05 /* b Status Register */
64#define FCR_ISR 0x06 /* b Interrupt Status Register */
65#define FCR_IMR 0x07 /* b Interrupt Mask Register */
66
67/* FCR_MODE Register Command List */
68#define FCR_MODE_DATA 0x94 /* Data Data_Mode */
69#define FCR_MODE_COMMAND 0x95 /* Data Command_Mode */
70#define FCR_MODE_ADDRESS 0x96 /* Data Address_Mode */
71
72#define FCR_MODE_HWECC_CALC 0xB4 /* HW-ECC Data */
73#define FCR_MODE_HWECC_RESULT 0xD4 /* HW-ECC Calc result Read_Mode */
74#define FCR_MODE_HWECC_RESET 0xF4 /* HW-ECC Reset */
75
76#define FCR_MODE_POWER_ON 0x0C /* Power Supply ON to SSFDC card */
77#define FCR_MODE_POWER_OFF 0x08 /* Power Supply OFF to SSFDC card */
78
79#define FCR_MODE_LED_OFF 0x00 /* LED OFF */
80#define FCR_MODE_LED_ON 0x04 /* LED ON */
81
82#define FCR_MODE_EJECT_ON 0x68 /* Ejection events active */
83#define FCR_MODE_EJECT_OFF 0x08 /* Ejection events ignored */
84
85#define FCR_MODE_LOCK 0x6C /* Lock_Mode. Eject Switch Invalid */
86#define FCR_MODE_UNLOCK 0x0C /* UnLock_Mode. Eject Switch is valid */
87
88#define FCR_MODE_CONTROLLER_ID 0x40 /* Controller ID Read */
89#define FCR_MODE_STANDBY 0x00 /* SSFDC card Changes Standby State */
90
91#define FCR_MODE_WE 0x80
92#define FCR_MODE_ECC1 0x40
93#define FCR_MODE_ECC0 0x20
94#define FCR_MODE_CE 0x10
95#define FCR_MODE_PCNT1 0x08
96#define FCR_MODE_PCNT0 0x04
97#define FCR_MODE_ALE 0x02
98#define FCR_MODE_CLE 0x01
99
100#define FCR_STATUS_BUSY 0x80
101
102/*--------------------------------------------------------------------------*/
103
104struct tmio_nand {
105 struct mtd_info mtd;
106 struct nand_chip chip;
107
108 struct platform_device *dev;
109
110 void __iomem *ccr;
111 void __iomem *fcr;
112 unsigned long fcr_phys;
113
114 unsigned int irq;
115
116 /* for tmio_nand_read_byte */
117 u8 read;
118 unsigned read_good:1;
119};
120
121#define mtd_to_tmio(m) container_of(m, struct tmio_nand, mtd)
122
123#ifdef CONFIG_MTD_CMDLINE_PARTS
124static const char *part_probes[] = { "cmdlinepart", NULL };
125#endif
126
127/*--------------------------------------------------------------------------*/
128
129static void tmio_nand_hwcontrol(struct mtd_info *mtd, int cmd,
130 unsigned int ctrl)
131{
132 struct tmio_nand *tmio = mtd_to_tmio(mtd);
133 struct nand_chip *chip = mtd->priv;
134
135 if (ctrl & NAND_CTRL_CHANGE) {
136 u8 mode;
137
138 if (ctrl & NAND_NCE) {
139 mode = FCR_MODE_DATA;
140
141 if (ctrl & NAND_CLE)
142 mode |= FCR_MODE_CLE;
143 else
144 mode &= ~FCR_MODE_CLE;
145
146 if (ctrl & NAND_ALE)
147 mode |= FCR_MODE_ALE;
148 else
149 mode &= ~FCR_MODE_ALE;
150 } else {
151 mode = FCR_MODE_STANDBY;
152 }
153
154 tmio_iowrite8(mode, tmio->fcr + FCR_MODE);
155 tmio->read_good = 0;
156 }
157
158 if (cmd != NAND_CMD_NONE)
159 tmio_iowrite8(cmd, chip->IO_ADDR_W);
160}
161
162static int tmio_nand_dev_ready(struct mtd_info *mtd)
163{
164 struct tmio_nand *tmio = mtd_to_tmio(mtd);
165
166 return !(tmio_ioread8(tmio->fcr + FCR_STATUS) & FCR_STATUS_BUSY);
167}
168
169static irqreturn_t tmio_irq(int irq, void *__tmio)
170{
171 struct tmio_nand *tmio = __tmio;
172 struct nand_chip *nand_chip = &tmio->chip;
173
174 /* disable RDYREQ interrupt */
175 tmio_iowrite8(0x00, tmio->fcr + FCR_IMR);
176
177 if (unlikely(!waitqueue_active(&nand_chip->controller->wq)))
178 dev_warn(&tmio->dev->dev, "spurious interrupt\n");
179
180 wake_up(&nand_chip->controller->wq);
181 return IRQ_HANDLED;
182}
183
184/*
185 *The TMIO core has a RDYREQ interrupt on the posedge of #SMRB.
186 *This interrupt is normally disabled, but for long operations like
187 *erase and write, we enable it to wake us up. The irq handler
188 *disables the interrupt.
189 */
190static int
191tmio_nand_wait(struct mtd_info *mtd, struct nand_chip *nand_chip)
192{
193 struct tmio_nand *tmio = mtd_to_tmio(mtd);
194 long timeout;
195
196 /* enable RDYREQ interrupt */
197 tmio_iowrite8(0x0f, tmio->fcr + FCR_ISR);
198 tmio_iowrite8(0x81, tmio->fcr + FCR_IMR);
199
200 timeout = wait_event_timeout(nand_chip->controller->wq,
201 tmio_nand_dev_ready(mtd),
202 msecs_to_jiffies(nand_chip->state == FL_ERASING ? 400 : 20));
203
204 if (unlikely(!tmio_nand_dev_ready(mtd))) {
205 tmio_iowrite8(0x00, tmio->fcr + FCR_IMR);
206 dev_warn(&tmio->dev->dev, "still busy with %s after %d ms\n",
207 nand_chip->state == FL_ERASING ? "erase" : "program",
208 nand_chip->state == FL_ERASING ? 400 : 20);
209
210 } else if (unlikely(!timeout)) {
211 tmio_iowrite8(0x00, tmio->fcr + FCR_IMR);
212 dev_warn(&tmio->dev->dev, "timeout waiting for interrupt\n");
213 }
214
215 nand_chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
216 return nand_chip->read_byte(mtd);
217}
218
219/*
220 *The TMIO controller combines two 8-bit data bytes into one 16-bit
221 *word. This function separates them so nand_base.c works as expected,
222 *especially its NAND_CMD_READID routines.
223 *
224 *To prevent stale data from being read, tmio_nand_hwcontrol() clears
225 *tmio->read_good.
226 */
227static u_char tmio_nand_read_byte(struct mtd_info *mtd)
228{
229 struct tmio_nand *tmio = mtd_to_tmio(mtd);
230 unsigned int data;
231
232 if (tmio->read_good--)
233 return tmio->read;
234
235 data = tmio_ioread16(tmio->fcr + FCR_DATA);
236 tmio->read = data >> 8;
237 return data;
238}
239
240/*
241 *The TMIO controller converts an 8-bit NAND interface to a 16-bit
242 *bus interface, so all data reads and writes must be 16-bit wide.
243 *Thus, we implement 16-bit versions of the read, write, and verify
244 *buffer functions.
245 */
246static void
247tmio_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
248{
249 struct tmio_nand *tmio = mtd_to_tmio(mtd);
250
251 tmio_iowrite16_rep(tmio->fcr + FCR_DATA, buf, len >> 1);
252}
253
254static void tmio_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
255{
256 struct tmio_nand *tmio = mtd_to_tmio(mtd);
257
258 tmio_ioread16_rep(tmio->fcr + FCR_DATA, buf, len >> 1);
259}
260
261static int
262tmio_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
263{
264 struct tmio_nand *tmio = mtd_to_tmio(mtd);
265 u16 *p = (u16 *) buf;
266
267 for (len >>= 1; len; len--)
268 if (*(p++) != tmio_ioread16(tmio->fcr + FCR_DATA))
269 return -EFAULT;
270 return 0;
271}
272
273static void tmio_nand_enable_hwecc(struct mtd_info *mtd, int mode)
274{
275 struct tmio_nand *tmio = mtd_to_tmio(mtd);
276
277 tmio_iowrite8(FCR_MODE_HWECC_RESET, tmio->fcr + FCR_MODE);
278 tmio_ioread8(tmio->fcr + FCR_DATA); /* dummy read */
279 tmio_iowrite8(FCR_MODE_HWECC_CALC, tmio->fcr + FCR_MODE);
280}
281
282static int tmio_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
283 u_char *ecc_code)
284{
285 struct tmio_nand *tmio = mtd_to_tmio(mtd);
286 unsigned int ecc;
287
288 tmio_iowrite8(FCR_MODE_HWECC_RESULT, tmio->fcr + FCR_MODE);
289
290 ecc = tmio_ioread16(tmio->fcr + FCR_DATA);
291 ecc_code[1] = ecc; /* 000-255 LP7-0 */
292 ecc_code[0] = ecc >> 8; /* 000-255 LP15-8 */
293 ecc = tmio_ioread16(tmio->fcr + FCR_DATA);
294 ecc_code[2] = ecc; /* 000-255 CP5-0,11b */
295 ecc_code[4] = ecc >> 8; /* 256-511 LP7-0 */
296 ecc = tmio_ioread16(tmio->fcr + FCR_DATA);
297 ecc_code[3] = ecc; /* 256-511 LP15-8 */
298 ecc_code[5] = ecc >> 8; /* 256-511 CP5-0,11b */
299
300 tmio_iowrite8(FCR_MODE_DATA, tmio->fcr + FCR_MODE);
301 return 0;
302}
303
304static int tmio_hw_init(struct platform_device *dev, struct tmio_nand *tmio)
305{
306 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
307 int ret;
308
309 if (cell->enable) {
310 ret = cell->enable(dev);
311 if (ret)
312 return ret;
313 }
314
315 /* (4Ch) CLKRUN Enable 1st spcrunc */
316 tmio_iowrite8(0x81, tmio->ccr + CCR_ICC);
317
318 /* (10h)BaseAddress 0x1000 spba.spba2 */
319 tmio_iowrite16(tmio->fcr_phys, tmio->ccr + CCR_BASE);
320 tmio_iowrite16(tmio->fcr_phys >> 16, tmio->ccr + CCR_BASE + 16);
321
322 /* (04h)Command Register I/O spcmd */
323 tmio_iowrite8(0x02, tmio->ccr + CCR_COMMAND);
324
325 /* (62h) Power Supply Control ssmpwc */
326 /* HardPowerOFF - SuspendOFF - PowerSupplyWait_4MS */
327 tmio_iowrite8(0x02, tmio->ccr + CCR_NFPSC);
328
329 /* (63h) Detect Control ssmdtc */
330 tmio_iowrite8(0x02, tmio->ccr + CCR_NFDC);
331
332 /* Interrupt status register clear sintst */
333 tmio_iowrite8(0x0f, tmio->fcr + FCR_ISR);
334
335 /* After power supply, Media are reset smode */
336 tmio_iowrite8(FCR_MODE_POWER_ON, tmio->fcr + FCR_MODE);
337 tmio_iowrite8(FCR_MODE_COMMAND, tmio->fcr + FCR_MODE);
338 tmio_iowrite8(NAND_CMD_RESET, tmio->fcr + FCR_DATA);
339
340 /* Standby Mode smode */
341 tmio_iowrite8(FCR_MODE_STANDBY, tmio->fcr + FCR_MODE);
342
343 mdelay(5);
344
345 return 0;
346}
347
348static void tmio_hw_stop(struct platform_device *dev, struct tmio_nand *tmio)
349{
350 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
351
352 tmio_iowrite8(FCR_MODE_POWER_OFF, tmio->fcr + FCR_MODE);
353 if (cell->disable)
354 cell->disable(dev);
355}
356
357static int tmio_probe(struct platform_device *dev)
358{
359 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
360 struct tmio_nand_data *data = cell->driver_data;
361 struct resource *fcr = platform_get_resource(dev,
362 IORESOURCE_MEM, 0);
363 struct resource *ccr = platform_get_resource(dev,
364 IORESOURCE_MEM, 1);
365 int irq = platform_get_irq(dev, 0);
366 struct tmio_nand *tmio;
367 struct mtd_info *mtd;
368 struct nand_chip *nand_chip;
369#ifdef CONFIG_MTD_PARTITIONS
370 struct mtd_partition *parts;
371 int nbparts = 0;
372#endif
373 int retval;
374
375 if (data == NULL)
376 dev_warn(&dev->dev, "NULL platform data!\n");
377
378 tmio = kzalloc(sizeof *tmio, GFP_KERNEL);
379 if (!tmio) {
380 retval = -ENOMEM;
381 goto err_kzalloc;
382 }
383
384 tmio->dev = dev;
385
386 platform_set_drvdata(dev, tmio);
387 mtd = &tmio->mtd;
388 nand_chip = &tmio->chip;
389 mtd->priv = nand_chip;
390 mtd->name = "tmio-nand";
391
392 tmio->ccr = ioremap(ccr->start, ccr->end - ccr->start + 1);
393 if (!tmio->ccr) {
394 retval = -EIO;
395 goto err_iomap_ccr;
396 }
397
398 tmio->fcr_phys = (unsigned long)fcr->start;
399 tmio->fcr = ioremap(fcr->start, fcr->end - fcr->start + 1);
400 if (!tmio->fcr) {
401 retval = -EIO;
402 goto err_iomap_fcr;
403 }
404
405 retval = tmio_hw_init(dev, tmio);
406 if (retval)
407 goto err_hwinit;
408
409 /* Set address of NAND IO lines */
410 nand_chip->IO_ADDR_R = tmio->fcr;
411 nand_chip->IO_ADDR_W = tmio->fcr;
412
413 /* Set address of hardware control function */
414 nand_chip->cmd_ctrl = tmio_nand_hwcontrol;
415 nand_chip->dev_ready = tmio_nand_dev_ready;
416 nand_chip->read_byte = tmio_nand_read_byte;
417 nand_chip->write_buf = tmio_nand_write_buf;
418 nand_chip->read_buf = tmio_nand_read_buf;
419 nand_chip->verify_buf = tmio_nand_verify_buf;
420
421 /* set eccmode using hardware ECC */
422 nand_chip->ecc.mode = NAND_ECC_HW;
423 nand_chip->ecc.size = 512;
424 nand_chip->ecc.bytes = 6;
425 nand_chip->ecc.hwctl = tmio_nand_enable_hwecc;
426 nand_chip->ecc.calculate = tmio_nand_calculate_ecc;
427 nand_chip->ecc.correct = nand_correct_data;
428
429 if (data)
430 nand_chip->badblock_pattern = data->badblock_pattern;
431
432 /* 15 us command delay time */
433 nand_chip->chip_delay = 15;
434
435 retval = request_irq(irq, &tmio_irq,
436 IRQF_DISABLED, dev->dev.bus_id, tmio);
437 if (retval) {
438 dev_err(&dev->dev, "request_irq error %d\n", retval);
439 goto err_irq;
440 }
441
442 tmio->irq = irq;
443 nand_chip->waitfunc = tmio_nand_wait;
444
445 /* Scan to find existence of the device */
446 if (nand_scan(mtd, 1)) {
447 retval = -ENODEV;
448 goto err_scan;
449 }
450 /* Register the partitions */
451#ifdef CONFIG_MTD_PARTITIONS
452#ifdef CONFIG_MTD_CMDLINE_PARTS
453 nbparts = parse_mtd_partitions(mtd, part_probes, &parts, 0);
454#endif
455 if (nbparts <= 0 && data) {
456 parts = data->partition;
457 nbparts = data->num_partitions;
458 }
459
460 if (nbparts)
461 retval = add_mtd_partitions(mtd, parts, nbparts);
462 else
463#endif
464 retval = add_mtd_device(mtd);
465
466 if (!retval)
467 return retval;
468
469 nand_release(mtd);
470
471err_scan:
472 if (tmio->irq)
473 free_irq(tmio->irq, tmio);
474err_irq:
475 tmio_hw_stop(dev, tmio);
476err_hwinit:
477 iounmap(tmio->fcr);
478err_iomap_fcr:
479 iounmap(tmio->ccr);
480err_iomap_ccr:
481 kfree(tmio);
482err_kzalloc:
483 return retval;
484}
485
486static int tmio_remove(struct platform_device *dev)
487{
488 struct tmio_nand *tmio = platform_get_drvdata(dev);
489
490 nand_release(&tmio->mtd);
491 if (tmio->irq)
492 free_irq(tmio->irq, tmio);
493 tmio_hw_stop(dev, tmio);
494 iounmap(tmio->fcr);
495 iounmap(tmio->ccr);
496 kfree(tmio);
497 return 0;
498}
499
500#ifdef CONFIG_PM
501static int tmio_suspend(struct platform_device *dev, pm_message_t state)
502{
503 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
504
505 if (cell->suspend)
506 cell->suspend(dev);
507
508 tmio_hw_stop(dev, platform_get_drvdata(dev));
509 return 0;
510}
511
512static int tmio_resume(struct platform_device *dev)
513{
514 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
515
516 /* FIXME - is this required or merely another attack of the broken
517 * SHARP platform? Looks suspicious.
518 */
519 tmio_hw_init(dev, platform_get_drvdata(dev));
520
521 if (cell->resume)
522 cell->resume(dev);
523
524 return 0;
525}
526#else
527#define tmio_suspend NULL
528#define tmio_resume NULL
529#endif
530
531static struct platform_driver tmio_driver = {
532 .driver.name = "tmio-nand",
533 .driver.owner = THIS_MODULE,
534 .probe = tmio_probe,
535 .remove = tmio_remove,
536 .suspend = tmio_suspend,
537 .resume = tmio_resume,
538};
539
540static int __init tmio_init(void)
541{
542 return platform_driver_register(&tmio_driver);
543}
544
545static void __exit tmio_exit(void)
546{
547 platform_driver_unregister(&tmio_driver);
548}
549
550module_init(tmio_init);
551module_exit(tmio_exit);
552
553MODULE_LICENSE("GPL v2");
554MODULE_AUTHOR("Ian Molton, Dirk Opfer, Chris Humbert, Dmitry Baryshkov");
555MODULE_DESCRIPTION("NAND flash driver on Toshiba Mobile IO controller");
556MODULE_ALIAS("platform:tmio-nand");
diff --git a/drivers/net/atl1e/atl1e_main.c b/drivers/net/atl1e/atl1e_main.c
index 35264c244cfd..82d7be1655d3 100644
--- a/drivers/net/atl1e/atl1e_main.c
+++ b/drivers/net/atl1e/atl1e_main.c
@@ -47,7 +47,7 @@ MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
47MODULE_LICENSE("GPL"); 47MODULE_LICENSE("GPL");
48MODULE_VERSION(DRV_VERSION); 48MODULE_VERSION(DRV_VERSION);
49 49
50static inline void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter); 50static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter);
51 51
52static const u16 52static const u16
53atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] = 53atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
@@ -1037,7 +1037,7 @@ static inline void atl1e_configure_dma(struct atl1e_adapter *adapter)
1037 return; 1037 return;
1038} 1038}
1039 1039
1040static inline void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter) 1040static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter)
1041{ 1041{
1042 u32 value; 1042 u32 value;
1043 struct atl1e_hw *hw = &adapter->hw; 1043 struct atl1e_hw *hw = &adapter->hw;
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 18354817173c..4a10b5624f72 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -308,9 +308,8 @@ static void __pci_restore_msi_state(struct pci_dev *dev)
308 entry->msi_attrib.masked); 308 entry->msi_attrib.masked);
309 309
310 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control); 310 pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &control);
311 control &= ~(PCI_MSI_FLAGS_QSIZE | PCI_MSI_FLAGS_ENABLE); 311 control &= ~PCI_MSI_FLAGS_QSIZE;
312 if (entry->msi_attrib.maskbit || !entry->msi_attrib.masked) 312 control |= PCI_MSI_FLAGS_ENABLE;
313 control |= PCI_MSI_FLAGS_ENABLE;
314 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control); 313 pci_write_config_word(dev, pos + PCI_MSI_FLAGS, control);
315} 314}
316 315
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 0a3d856833fc..c9884bba22de 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1060,7 +1060,7 @@ bool pci_pme_capable(struct pci_dev *dev, pci_power_t state)
1060 * The caller must verify that the device is capable of generating PME# before 1060 * The caller must verify that the device is capable of generating PME# before
1061 * calling this function with @enable equal to 'true'. 1061 * calling this function with @enable equal to 'true'.
1062 */ 1062 */
1063static void pci_pme_active(struct pci_dev *dev, bool enable) 1063void pci_pme_active(struct pci_dev *dev, bool enable)
1064{ 1064{
1065 u16 pmcsr; 1065 u16 pmcsr;
1066 1066
@@ -1941,6 +1941,7 @@ EXPORT_SYMBOL(pci_set_power_state);
1941EXPORT_SYMBOL(pci_save_state); 1941EXPORT_SYMBOL(pci_save_state);
1942EXPORT_SYMBOL(pci_restore_state); 1942EXPORT_SYMBOL(pci_restore_state);
1943EXPORT_SYMBOL(pci_pme_capable); 1943EXPORT_SYMBOL(pci_pme_capable);
1944EXPORT_SYMBOL(pci_pme_active);
1944EXPORT_SYMBOL(pci_enable_wake); 1945EXPORT_SYMBOL(pci_enable_wake);
1945EXPORT_SYMBOL(pci_target_state); 1946EXPORT_SYMBOL(pci_target_state);
1946EXPORT_SYMBOL(pci_prepare_to_sleep); 1947EXPORT_SYMBOL(pci_prepare_to_sleep);
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 7098dfb07449..a04498d390c8 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -52,27 +52,49 @@ EXPORT_SYMBOL(no_pci_devices);
52 * Some platforms allow access to legacy I/O port and ISA memory space on 52 * Some platforms allow access to legacy I/O port and ISA memory space on
53 * a per-bus basis. This routine creates the files and ties them into 53 * a per-bus basis. This routine creates the files and ties them into
54 * their associated read, write and mmap files from pci-sysfs.c 54 * their associated read, write and mmap files from pci-sysfs.c
55 *
56 * On error unwind, but don't propogate the error to the caller
57 * as it is ok to set up the PCI bus without these files.
55 */ 58 */
56static void pci_create_legacy_files(struct pci_bus *b) 59static void pci_create_legacy_files(struct pci_bus *b)
57{ 60{
61 int error;
62
58 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2, 63 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
59 GFP_ATOMIC); 64 GFP_ATOMIC);
60 if (b->legacy_io) { 65 if (!b->legacy_io)
61 b->legacy_io->attr.name = "legacy_io"; 66 goto kzalloc_err;
62 b->legacy_io->size = 0xffff; 67
63 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR; 68 b->legacy_io->attr.name = "legacy_io";
64 b->legacy_io->read = pci_read_legacy_io; 69 b->legacy_io->size = 0xffff;
65 b->legacy_io->write = pci_write_legacy_io; 70 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
66 device_create_bin_file(&b->dev, b->legacy_io); 71 b->legacy_io->read = pci_read_legacy_io;
67 72 b->legacy_io->write = pci_write_legacy_io;
68 /* Allocated above after the legacy_io struct */ 73 error = device_create_bin_file(&b->dev, b->legacy_io);
69 b->legacy_mem = b->legacy_io + 1; 74 if (error)
70 b->legacy_mem->attr.name = "legacy_mem"; 75 goto legacy_io_err;
71 b->legacy_mem->size = 1024*1024; 76
72 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR; 77 /* Allocated above after the legacy_io struct */
73 b->legacy_mem->mmap = pci_mmap_legacy_mem; 78 b->legacy_mem = b->legacy_io + 1;
74 device_create_bin_file(&b->dev, b->legacy_mem); 79 b->legacy_mem->attr.name = "legacy_mem";
75 } 80 b->legacy_mem->size = 1024*1024;
81 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
82 b->legacy_mem->mmap = pci_mmap_legacy_mem;
83 error = device_create_bin_file(&b->dev, b->legacy_mem);
84 if (error)
85 goto legacy_mem_err;
86
87 return;
88
89legacy_mem_err:
90 device_remove_bin_file(&b->dev, b->legacy_io);
91legacy_io_err:
92 kfree(b->legacy_io);
93 b->legacy_io = NULL;
94kzalloc_err:
95 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
96 "and ISA memory resources to sysfs\n");
97 return;
76} 98}
77 99
78void pci_remove_legacy_files(struct pci_bus *b) 100void pci_remove_legacy_files(struct pci_bus *b)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 0fb365074288..9236e7f869c8 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1756,9 +1756,14 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_VIA, 0x324e, quirk_via_cx700_pci_parking_c
1756 */ 1756 */
1757static void __devinit quirk_brcm_570x_limit_vpd(struct pci_dev *dev) 1757static void __devinit quirk_brcm_570x_limit_vpd(struct pci_dev *dev)
1758{ 1758{
1759 /* Only disable the VPD capability for 5706, 5708, and 5709 rev. A */ 1759 /*
1760 * Only disable the VPD capability for 5706, 5706S, 5708,
1761 * 5708S and 5709 rev. A
1762 */
1760 if ((dev->device == PCI_DEVICE_ID_NX2_5706) || 1763 if ((dev->device == PCI_DEVICE_ID_NX2_5706) ||
1764 (dev->device == PCI_DEVICE_ID_NX2_5706S) ||
1761 (dev->device == PCI_DEVICE_ID_NX2_5708) || 1765 (dev->device == PCI_DEVICE_ID_NX2_5708) ||
1766 (dev->device == PCI_DEVICE_ID_NX2_5708S) ||
1762 ((dev->device == PCI_DEVICE_ID_NX2_5709) && 1767 ((dev->device == PCI_DEVICE_ID_NX2_5709) &&
1763 (dev->revision & 0xf0) == 0x0)) { 1768 (dev->revision & 0xf0) == 0x0)) {
1764 if (dev->vpd) 1769 if (dev->vpd)
diff --git a/drivers/video/console/fbcon.h b/drivers/video/console/fbcon.h
index de1b1365279b..a6e38e9ea73f 100644
--- a/drivers/video/console/fbcon.h
+++ b/drivers/video/console/fbcon.h
@@ -92,7 +92,7 @@ struct fbcon_ops {
92#define attr_fgcol(fgshift,s) \ 92#define attr_fgcol(fgshift,s) \
93 (((s) >> (fgshift)) & 0x0f) 93 (((s) >> (fgshift)) & 0x0f)
94#define attr_bgcol(bgshift,s) \ 94#define attr_bgcol(bgshift,s) \
95 (((s) >> (bgshift)) & 0x07) 95 (((s) >> (bgshift)) & 0x0f)
96 96
97/* Monochrome */ 97/* Monochrome */
98#define attr_bold(s) \ 98#define attr_bold(s) \
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 049c91895699..ca3dc043d786 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -66,7 +66,10 @@ obj-$(CONFIG_IB700_WDT) += ib700wdt.o
66obj-$(CONFIG_IBMASR) += ibmasr.o 66obj-$(CONFIG_IBMASR) += ibmasr.o
67obj-$(CONFIG_WAFER_WDT) += wafer5823wdt.o 67obj-$(CONFIG_WAFER_WDT) += wafer5823wdt.o
68obj-$(CONFIG_I6300ESB_WDT) += i6300esb.o 68obj-$(CONFIG_I6300ESB_WDT) += i6300esb.o
69obj-$(CONFIG_ITCO_WDT) += iTCO_wdt.o iTCO_vendor_support.o 69obj-$(CONFIG_ITCO_WDT) += iTCO_wdt.o
70ifeq ($(CONFIG_ITCO_VENDOR_SUPPORT),y)
71obj-$(CONFIG_ITCO_WDT) += iTCO_vendor_support.o
72endif
70obj-$(CONFIG_IT8712F_WDT) += it8712f_wdt.o 73obj-$(CONFIG_IT8712F_WDT) += it8712f_wdt.o
71obj-$(CONFIG_HP_WATCHDOG) += hpwdt.o 74obj-$(CONFIG_HP_WATCHDOG) += hpwdt.o
72obj-$(CONFIG_SC1200_WDT) += sc1200wdt.o 75obj-$(CONFIG_SC1200_WDT) += sc1200wdt.o
diff --git a/drivers/watchdog/at91rm9200_wdt.c b/drivers/watchdog/at91rm9200_wdt.c
index bacd867dd22e..d061f0ad2d20 100644
--- a/drivers/watchdog/at91rm9200_wdt.c
+++ b/drivers/watchdog/at91rm9200_wdt.c
@@ -128,7 +128,7 @@ static struct watchdog_info at91_wdt_info = {
128/* 128/*
129 * Handle commands from user-space. 129 * Handle commands from user-space.
130 */ 130 */
131static long at91_wdt_ioct(struct file *file, 131static long at91_wdt_ioctl(struct file *file,
132 unsigned int cmd, unsigned long arg) 132 unsigned int cmd, unsigned long arg)
133{ 133{
134 void __user *argp = (void __user *)arg; 134 void __user *argp = (void __user *)arg;
diff --git a/drivers/watchdog/ixp4xx_wdt.c b/drivers/watchdog/ixp4xx_wdt.c
index 41264a5f1731..8302ef005be7 100644
--- a/drivers/watchdog/ixp4xx_wdt.c
+++ b/drivers/watchdog/ixp4xx_wdt.c
@@ -29,7 +29,7 @@ static int nowayout = WATCHDOG_NOWAYOUT;
29static int heartbeat = 60; /* (secs) Default is 1 minute */ 29static int heartbeat = 60; /* (secs) Default is 1 minute */
30static unsigned long wdt_status; 30static unsigned long wdt_status;
31static unsigned long boot_status; 31static unsigned long boot_status;
32static spin_lock_t wdt_lock; 32static DEFINE_SPINLOCK(wdt_lock);
33 33
34#define WDT_TICK_RATE (IXP4XX_PERIPHERAL_BUS_CLOCK * 1000000UL) 34#define WDT_TICK_RATE (IXP4XX_PERIPHERAL_BUS_CLOCK * 1000000UL)
35 35
diff --git a/drivers/watchdog/pcwd.c b/drivers/watchdog/pcwd.c
index 3b0ddc7fcf3f..9e1331a3b215 100644
--- a/drivers/watchdog/pcwd.c
+++ b/drivers/watchdog/pcwd.c
@@ -168,7 +168,7 @@ static const int heartbeat_tbl[] = {
168static int cards_found; 168static int cards_found;
169 169
170/* internal variables */ 170/* internal variables */
171static atomic_t open_allowed = ATOMIC_INIT(1); 171static unsigned long open_allowed;
172static char expect_close; 172static char expect_close;
173static int temp_panic; 173static int temp_panic;
174 174
diff --git a/drivers/watchdog/shwdt.c b/drivers/watchdog/shwdt.c
index 824125adf90a..cdc7138be301 100644
--- a/drivers/watchdog/shwdt.c
+++ b/drivers/watchdog/shwdt.c
@@ -30,7 +30,7 @@
30#include <linux/mm.h> 30#include <linux/mm.h>
31#include <linux/io.h> 31#include <linux/io.h>
32#include <linux/uaccess.h> 32#include <linux/uaccess.h>
33#include <linux/watchdog.h> 33#include <asm/watchdog.h>
34 34
35#define PFX "shwdt: " 35#define PFX "shwdt: "
36 36
@@ -68,7 +68,7 @@ static int clock_division_ratio = WTCSR_CKS_4096;
68static void sh_wdt_ping(unsigned long data); 68static void sh_wdt_ping(unsigned long data);
69 69
70static unsigned long shwdt_is_open; 70static unsigned long shwdt_is_open;
71static struct watchdog_info sh_wdt_info; 71static const struct watchdog_info sh_wdt_info;
72static char shwdt_expect_close; 72static char shwdt_expect_close;
73static DEFINE_TIMER(timer, sh_wdt_ping, 0, 0); 73static DEFINE_TIMER(timer, sh_wdt_ping, 0, 0);
74static unsigned long next_heartbeat; 74static unsigned long next_heartbeat;
@@ -89,7 +89,7 @@ static void sh_wdt_start(void)
89 __u8 csr; 89 __u8 csr;
90 unsigned long flags; 90 unsigned long flags;
91 91
92 spin_lock_irqsave(&wdt_lock, flags); 92 spin_lock_irqsave(&shwdt_lock, flags);
93 93
94 next_heartbeat = jiffies + (heartbeat * HZ); 94 next_heartbeat = jiffies + (heartbeat * HZ);
95 mod_timer(&timer, next_ping_period(clock_division_ratio)); 95 mod_timer(&timer, next_ping_period(clock_division_ratio));
@@ -127,7 +127,7 @@ static void sh_wdt_start(void)
127 csr &= ~RSTCSR_RSTS; 127 csr &= ~RSTCSR_RSTS;
128 sh_wdt_write_rstcsr(csr); 128 sh_wdt_write_rstcsr(csr);
129#endif 129#endif
130 spin_unlock_irqrestore(&wdt_lock, flags); 130 spin_unlock_irqrestore(&shwdt_lock, flags);
131} 131}
132 132
133/** 133/**
@@ -139,14 +139,14 @@ static void sh_wdt_stop(void)
139 __u8 csr; 139 __u8 csr;
140 unsigned long flags; 140 unsigned long flags;
141 141
142 spin_lock_irqsave(&wdt_lock, flags); 142 spin_lock_irqsave(&shwdt_lock, flags);
143 143
144 del_timer(&timer); 144 del_timer(&timer);
145 145
146 csr = sh_wdt_read_csr(); 146 csr = sh_wdt_read_csr();
147 csr &= ~WTCSR_TME; 147 csr &= ~WTCSR_TME;
148 sh_wdt_write_csr(csr); 148 sh_wdt_write_csr(csr);
149 spin_unlock_irqrestore(&wdt_lock, flags); 149 spin_unlock_irqrestore(&shwdt_lock, flags);
150} 150}
151 151
152/** 152/**
@@ -157,9 +157,9 @@ static inline void sh_wdt_keepalive(void)
157{ 157{
158 unsigned long flags; 158 unsigned long flags;
159 159
160 spin_lock_irqsave(&wdt_lock, flags); 160 spin_lock_irqsave(&shwdt_lock, flags);
161 next_heartbeat = jiffies + (heartbeat * HZ); 161 next_heartbeat = jiffies + (heartbeat * HZ);
162 spin_unlock_irqrestore(&wdt_lock, flags); 162 spin_unlock_irqrestore(&shwdt_lock, flags);
163} 163}
164 164
165/** 165/**
@@ -173,9 +173,9 @@ static int sh_wdt_set_heartbeat(int t)
173 if (unlikely(t < 1 || t > 3600)) /* arbitrary upper limit */ 173 if (unlikely(t < 1 || t > 3600)) /* arbitrary upper limit */
174 return -EINVAL; 174 return -EINVAL;
175 175
176 spin_lock_irqsave(&wdt_lock, flags); 176 spin_lock_irqsave(&shwdt_lock, flags);
177 heartbeat = t; 177 heartbeat = t;
178 spin_unlock_irqrestore(&wdt_lock, flags); 178 spin_unlock_irqrestore(&shwdt_lock, flags);
179 return 0; 179 return 0;
180} 180}
181 181
@@ -189,7 +189,7 @@ static void sh_wdt_ping(unsigned long data)
189{ 189{
190 unsigned long flags; 190 unsigned long flags;
191 191
192 spin_lock_irqsave(&wdt_lock, flags); 192 spin_lock_irqsave(&shwdt_lock, flags);
193 if (time_before(jiffies, next_heartbeat)) { 193 if (time_before(jiffies, next_heartbeat)) {
194 __u8 csr; 194 __u8 csr;
195 195
@@ -203,7 +203,7 @@ static void sh_wdt_ping(unsigned long data)
203 } else 203 } else
204 printk(KERN_WARNING PFX "Heartbeat lost! Will not ping " 204 printk(KERN_WARNING PFX "Heartbeat lost! Will not ping "
205 "the watchdog\n"); 205 "the watchdog\n");
206 spin_unlock_irqrestore(&wdt_lock, flags); 206 spin_unlock_irqrestore(&shwdt_lock, flags);
207} 207}
208 208
209/** 209/**
diff --git a/drivers/watchdog/txx9wdt.c b/drivers/watchdog/txx9wdt.c
index dbbc018a5f46..6adab77fbbb0 100644
--- a/drivers/watchdog/txx9wdt.c
+++ b/drivers/watchdog/txx9wdt.c
@@ -45,7 +45,7 @@ static unsigned long txx9wdt_alive;
45static int expect_close; 45static int expect_close;
46static struct txx9_tmr_reg __iomem *txx9wdt_reg; 46static struct txx9_tmr_reg __iomem *txx9wdt_reg;
47static struct clk *txx9_imclk; 47static struct clk *txx9_imclk;
48static DECLARE_LOCK(txx9_lock); 48static DEFINE_SPINLOCK(txx9_lock);
49 49
50static void txx9wdt_ping(void) 50static void txx9wdt_ping(void)
51{ 51{
diff --git a/drivers/watchdog/wdt285.c b/drivers/watchdog/wdt285.c
index c8d7f1b2df02..db362c34958b 100644
--- a/drivers/watchdog/wdt285.c
+++ b/drivers/watchdog/wdt285.c
@@ -208,7 +208,7 @@ static int __init footbridge_watchdog_init(void)
208 soft_margin); 208 soft_margin);
209 209
210 if (machine_is_cats()) 210 if (machine_is_cats())
211 printk(KERN_WARN 211 printk(KERN_WARNING
212 "Warning: Watchdog reset may not work on this machine.\n"); 212 "Warning: Watchdog reset may not work on this machine.\n");
213 return 0; 213 return 0;
214} 214}
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-30 03:31:53 -0400