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authorYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>2006-10-02 10:19:00 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-10-03 12:59:17 -0400
commitaf8b128719f5248e542036ea994610a29d0642a6 (patch)
tree1330f156553cba8bccc9132c6a64bf766ed9ca8e /drivers
parent08dfcee84c5c747ca1cecbd04c3a7e65cc9ce26b (diff)
[MIPS] Remove IT8172-based platforms, ITE 8172G and Globespan IVR support.
As per feature-removal-schedule.txt. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Acked-by: Alan Cox <alan@redhat.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/char/.gitignore1
-rw-r--r--drivers/char/Kconfig30
-rw-r--r--drivers/char/Makefile6
-rw-r--r--drivers/char/ite_gpio.c419
-rw-r--r--drivers/char/qtronixmap.c_shipped265
-rw-r--r--drivers/char/qtronixmap.map287
-rw-r--r--drivers/ide/Kconfig9
-rw-r--r--drivers/ide/pci/Makefile1
-rw-r--r--drivers/ide/pci/it8172.c307
9 files changed, 2 insertions, 1323 deletions
diff --git a/drivers/char/.gitignore b/drivers/char/.gitignore
index 73dfdcebfbba..83683a2d8e6a 100644
--- a/drivers/char/.gitignore
+++ b/drivers/char/.gitignore
@@ -1,3 +1,2 @@
1consolemap_deftbl.c 1consolemap_deftbl.c
2defkeymap.c 2defkeymap.c
3qtronixmap.c
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index bde1c665d9f4..0e6f35fcc2eb 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -371,36 +371,6 @@ config AU1000_SERIAL_CONSOLE
371 If you have an Alchemy AU1000 processor (MIPS based) and you want 371 If you have an Alchemy AU1000 processor (MIPS based) and you want
372 to use a console on a serial port, say Y. Otherwise, say N. 372 to use a console on a serial port, say Y. Otherwise, say N.
373 373
374config QTRONIX_KEYBOARD
375 bool "Enable Qtronix 990P Keyboard Support"
376 depends on IT8712
377 help
378 Images of Qtronix keyboards are at
379 <http://www.qtronix.com/keyboard.html>.
380
381config IT8172_CIR
382 bool
383 depends on QTRONIX_KEYBOARD
384 default y
385
386config IT8172_SCR0
387 bool "Enable Smart Card Reader 0 Support "
388 depends on IT8712
389 help
390 Say Y here to support smart-card reader 0 (SCR0) on the Integrated
391 Technology Express, Inc. ITE8172 SBC. Vendor page at
392 <http://www.ite.com.tw/ia/brief_it8172bsp.htm>; picture of the
393 board at <http://www.mvista.com/partners/semiconductor/ite.html>.
394
395config IT8172_SCR1
396 bool "Enable Smart Card Reader 1 Support "
397 depends on IT8712
398 help
399 Say Y here to support smart-card reader 1 (SCR1) on the Integrated
400 Technology Express, Inc. ITE8172 SBC. Vendor page at
401 <http://www.ite.com.tw/ia/brief_it8172bsp.htm>; picture of the
402 board at <http://www.mvista.com/partners/semiconductor/ite.html>.
403
404config A2232 374config A2232
405 tristate "Commodore A2232 serial support (EXPERIMENTAL)" 375 tristate "Commodore A2232 serial support (EXPERIMENTAL)"
406 depends on EXPERIMENTAL && ZORRO && BROKEN_ON_SMP 376 depends on EXPERIMENTAL && ZORRO && BROKEN_ON_SMP
diff --git a/drivers/char/Makefile b/drivers/char/Makefile
index 19114df59bbd..777cad045094 100644
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -102,7 +102,7 @@ obj-$(CONFIG_HANGCHECK_TIMER) += hangcheck-timer.o
102obj-$(CONFIG_TCG_TPM) += tpm/ 102obj-$(CONFIG_TCG_TPM) += tpm/
103 103
104# Files generated that shall be removed upon make clean 104# Files generated that shall be removed upon make clean
105clean-files := consolemap_deftbl.c defkeymap.c qtronixmap.c 105clean-files := consolemap_deftbl.c defkeymap.c
106 106
107quiet_cmd_conmk = CONMK $@ 107quiet_cmd_conmk = CONMK $@
108 cmd_conmk = scripts/conmakehash $< > $@ 108 cmd_conmk = scripts/conmakehash $< > $@
@@ -112,8 +112,6 @@ $(obj)/consolemap_deftbl.c: $(src)/$(FONTMAPFILE)
112 112
113$(obj)/defkeymap.o: $(obj)/defkeymap.c 113$(obj)/defkeymap.o: $(obj)/defkeymap.c
114 114
115$(obj)/qtronixmap.o: $(obj)/qtronixmap.c
116
117# Uncomment if you're changing the keymap and have an appropriate 115# Uncomment if you're changing the keymap and have an appropriate
118# loadkeys version for the map. By default, we'll use the shipped 116# loadkeys version for the map. By default, we'll use the shipped
119# versions. 117# versions.
@@ -121,7 +119,7 @@ $(obj)/qtronixmap.o: $(obj)/qtronixmap.c
121 119
122ifdef GENERATE_KEYMAP 120ifdef GENERATE_KEYMAP
123 121
124$(obj)/defkeymap.c $(obj)/qtronixmap.c: $(obj)/%.c: $(src)/%.map 122$(obj)/defkeymap.c $(obj)/%.c: $(src)/%.map
125 loadkeys --mktable $< > $@.tmp 123 loadkeys --mktable $< > $@.tmp
126 sed -e 's/^static *//' $@.tmp > $@ 124 sed -e 's/^static *//' $@.tmp > $@
127 rm $@.tmp 125 rm $@.tmp
diff --git a/drivers/char/ite_gpio.c b/drivers/char/ite_gpio.c
deleted file mode 100644
index cde562d70c4f..000000000000
--- a/drivers/char/ite_gpio.c
+++ /dev/null
@@ -1,419 +0,0 @@
1/*
2 * FILE NAME ite_gpio.c
3 *
4 * BRIEF MODULE DESCRIPTION
5 * API for ITE GPIO device.
6 * Driver for ITE GPIO device.
7 *
8 * Author: MontaVista Software, Inc. <source@mvista.com>
9 * Hai-Pao Fan <haipao@mvista.com>
10 *
11 * Copyright 2001 MontaVista Software Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 *
18 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
19 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
21 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
24 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
25 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * You should have received a copy of the GNU General Public License along
30 * with this program; if not, write to the Free Software Foundation, Inc.,
31 * 675 Mass Ave, Cambridge, MA 02139, USA.
32 */
33#include <linux/module.h>
34#include <linux/types.h>
35#include <linux/kernel.h>
36#include <linux/miscdevice.h>
37#include <linux/init.h>
38#include <linux/ioport.h>
39#include <asm/uaccess.h>
40#include <asm/addrspace.h>
41#include <asm/it8172/it8172_int.h>
42#include <linux/sched.h>
43#include <linux/ite_gpio.h>
44
45#define ite_gpio_base 0x14013800
46
47#define ITE_GPADR (*(volatile __u8 *)(0x14013800 + KSEG1))
48#define ITE_GPBDR (*(volatile __u8 *)(0x14013808 + KSEG1))
49#define ITE_GPCDR (*(volatile __u8 *)(0x14013810 + KSEG1))
50#define ITE_GPACR (*(volatile __u16 *)(0x14013802 + KSEG1))
51#define ITE_GPBCR (*(volatile __u16 *)(0x1401380a + KSEG1))
52#define ITE_GPCCR (*(volatile __u16 *)(0x14013812 + KSEG1))
53#define ITE_GPAICR (*(volatile __u16 *)(0x14013804 + KSEG1))
54#define ITE_GPBICR (*(volatile __u16 *)(0x1401380c + KSEG1))
55#define ITE_GPCICR (*(volatile __u16 *)(0x14013814 + KSEG1))
56#define ITE_GPAISR (*(volatile __u8 *)(0x14013806 + KSEG1))
57#define ITE_GPBISR (*(volatile __u8 *)(0x1401380e + KSEG1))
58#define ITE_GPCISR (*(volatile __u8 *)(0x14013816 + KSEG1))
59#define ITE_GCR (*(volatile __u8 *)(0x14013818 + KSEG1))
60
61#define MAX_GPIO_LINE 21
62static int ite_gpio_irq=IT8172_GPIO_IRQ;
63
64static long ite_irq_counter[MAX_GPIO_LINE];
65wait_queue_head_t ite_gpio_wait[MAX_GPIO_LINE];
66static int ite_gpio_irq_pending[MAX_GPIO_LINE];
67
68static int ite_gpio_debug=0;
69#define DEB(x) if (ite_gpio_debug>=1) x
70
71int ite_gpio_in(__u32 device, __u32 mask, volatile __u32 *data)
72{
73 DEB(printk("ite_gpio_in mask=0x%x\n",mask));
74
75 switch (device) {
76 case ITE_GPIO_PORTA:
77 ITE_GPACR = (__u16)mask; /* 0xffff */
78 *data = ITE_GPADR;
79 break;
80 case ITE_GPIO_PORTB:
81 ITE_GPBCR = (__u16)mask; /* 0xffff */
82 *data = ITE_GPBDR;
83 break;
84 case ITE_GPIO_PORTC:
85 ITE_GPCCR = (__u16)mask; /* 0x03ff */
86 *data = ITE_GPCDR;
87 break;
88 default:
89 return -EFAULT;
90 }
91
92 return 0;
93}
94
95
96int ite_gpio_out(__u32 device, __u32 mask, __u32 data)
97{
98 switch (device) {
99 case ITE_GPIO_PORTA:
100 ITE_GPACR = (__u16)mask; /* 0x5555 */
101 ITE_GPADR = (__u8)data;
102 break;
103 case ITE_GPIO_PORTB:
104 ITE_GPBCR = (__u16)mask; /* 0x5555 */
105 ITE_GPBDR = (__u8)data;
106 break;
107 case ITE_GPIO_PORTC:
108 ITE_GPCCR = (__u16)mask; /* 0x0155 */
109 ITE_GPCDR = (__u8)data;
110 break;
111 default:
112 return -EFAULT;
113 }
114
115 return 0;
116}
117
118int ite_gpio_int_ctrl(__u32 device, __u32 mask, __u32 data)
119{
120 switch (device) {
121 case ITE_GPIO_PORTA:
122 ITE_GPAICR = (ITE_GPAICR & ~mask) | (data & mask);
123 break;
124 case ITE_GPIO_PORTB:
125 ITE_GPBICR = (ITE_GPBICR & ~mask) | (data & mask);
126 break;
127 case ITE_GPIO_PORTC:
128 ITE_GPCICR = (ITE_GPCICR & ~mask) | (data & mask);
129 break;
130 default:
131 return -EFAULT;
132 }
133
134 return 0;
135}
136
137int ite_gpio_in_status(__u32 device, __u32 mask, volatile __u32 *data)
138{
139 int ret=-1;
140
141 if ((MAX_GPIO_LINE > *data) && (*data >= 0))
142 ret=ite_gpio_irq_pending[*data];
143
144 DEB(printk("ite_gpio_in_status %d ret=%d\n",*data, ret));
145
146 switch (device) {
147 case ITE_GPIO_PORTA:
148 *data = ITE_GPAISR & mask;
149 break;
150 case ITE_GPIO_PORTB:
151 *data = ITE_GPBISR & mask;
152 break;
153 case ITE_GPIO_PORTC:
154 *data = ITE_GPCISR & mask;
155 break;
156 default:
157 return -EFAULT;
158 }
159
160 return ret;
161}
162
163int ite_gpio_out_status(__u32 device, __u32 mask, __u32 data)
164{
165 switch (device) {
166 case ITE_GPIO_PORTA:
167 ITE_GPAISR = (ITE_GPAISR & ~mask) | (data & mask);
168 break;
169 case ITE_GPIO_PORTB:
170 ITE_GPBISR = (ITE_GPBISR & ~mask) | (data & mask);
171 break;
172 case ITE_GPIO_PORTC:
173 ITE_GPCISR = (ITE_GPCISR & ~mask) | (data & mask);
174 break;
175 default:
176 return -EFAULT;
177 }
178
179 return 0;
180}
181
182int ite_gpio_gen_ctrl(__u32 device, __u32 mask, __u32 data)
183{
184 ITE_GCR = (ITE_GCR & ~mask) | (data & mask);
185
186 return 0;
187}
188
189int ite_gpio_int_wait (__u32 device, __u32 mask, __u32 data)
190{
191 int i,line=0, ret=0;
192 unsigned long flags;
193
194 switch (device) {
195 case ITE_GPIO_PORTA:
196 line = data & mask;
197 break;
198 case ITE_GPIO_PORTB:
199 line = (data & mask) <<8;
200 break;
201 case ITE_GPIO_PORTC:
202 line = (data & mask) <<16;
203 break;
204 }
205 for (i=MAX_GPIO_LINE-1; i >= 0; i--) {
206 if ( (line) & (1 << i))
207 break;
208 }
209
210 DEB(printk("wait device=0x%d mask=0x%x data=0x%x index %d\n",
211 device, mask, data, i));
212
213 if (line & ~(1<<i))
214 return -EFAULT;
215
216 if (ite_gpio_irq_pending[i]==1)
217 return -EFAULT;
218
219 save_flags (flags);
220 cli();
221 ite_gpio_irq_pending[i] = 1;
222 ret = interruptible_sleep_on_timeout(&ite_gpio_wait[i], 3*HZ);
223 restore_flags (flags);
224 ite_gpio_irq_pending[i] = 0;
225
226 return ret;
227}
228
229EXPORT_SYMBOL(ite_gpio_in);
230EXPORT_SYMBOL(ite_gpio_out);
231EXPORT_SYMBOL(ite_gpio_int_ctrl);
232EXPORT_SYMBOL(ite_gpio_in_status);
233EXPORT_SYMBOL(ite_gpio_out_status);
234EXPORT_SYMBOL(ite_gpio_gen_ctrl);
235EXPORT_SYMBOL(ite_gpio_int_wait);
236
237static int ite_gpio_open(struct inode *inode, struct file *file)
238{
239 return 0;
240}
241
242
243static int ite_gpio_release(struct inode *inode, struct file *file)
244{
245 return 0;
246}
247
248
249static int ite_gpio_ioctl(struct inode *inode, struct file *file,
250 unsigned int cmd, unsigned long arg)
251{
252 static struct ite_gpio_ioctl_data ioctl_data;
253
254 if (copy_from_user(&ioctl_data, (struct ite_gpio_ioctl_data *)arg,
255 sizeof(ioctl_data)))
256 return -EFAULT;
257 if ((ioctl_data.device < ITE_GPIO_PORTA) ||
258 (ioctl_data.device > ITE_GPIO_PORTC) )
259 return -EFAULT;
260
261 switch(cmd) {
262 case ITE_GPIO_IN:
263 if (ite_gpio_in(ioctl_data.device, ioctl_data.mask,
264 &ioctl_data.data))
265 return -EFAULT;
266
267 if (copy_to_user((struct ite_gpio_ioctl_data *)arg,
268 &ioctl_data, sizeof(ioctl_data)))
269 return -EFAULT;
270 break;
271
272 case ITE_GPIO_OUT:
273 return ite_gpio_out(ioctl_data.device,
274 ioctl_data.mask, ioctl_data.data);
275 break;
276
277 case ITE_GPIO_INT_CTRL:
278 return ite_gpio_int_ctrl(ioctl_data.device,
279 ioctl_data.mask, ioctl_data.data);
280 break;
281
282 case ITE_GPIO_IN_STATUS:
283 if (ite_gpio_in_status(ioctl_data.device, ioctl_data.mask,
284 &ioctl_data.data))
285 return -EFAULT;
286 if (copy_to_user((struct ite_gpio_ioctl_data *)arg,
287 &ioctl_data, sizeof(ioctl_data)))
288 return -EFAULT;
289 break;
290
291 case ITE_GPIO_OUT_STATUS:
292 return ite_gpio_out_status(ioctl_data.device,
293 ioctl_data.mask, ioctl_data.data);
294 break;
295
296 case ITE_GPIO_GEN_CTRL:
297 return ite_gpio_gen_ctrl(ioctl_data.device,
298 ioctl_data.mask, ioctl_data.data);
299 break;
300
301 case ITE_GPIO_INT_WAIT:
302 return ite_gpio_int_wait(ioctl_data.device,
303 ioctl_data.mask, ioctl_data.data);
304 break;
305
306 default:
307 return -ENOIOCTLCMD;
308
309 }
310
311 return 0;
312}
313
314static void ite_gpio_irq_handler(int this_irq, void *dev_id,
315 struct pt_regs *regs)
316{
317 int i,line;
318
319 line = ITE_GPCISR & 0x1f;
320 for (i=4; i >=0; i--) {
321 if ( line & (1 << i)) {
322 ++ite_irq_counter[i+16];
323 ite_gpio_irq_pending[i+16] = 2;
324 wake_up_interruptible(&ite_gpio_wait[i+16]);
325
326DEB(printk("interrupt 0x%x %d\n", &ite_gpio_wait[i+16], i+16));
327
328 ITE_GPCISR = ITE_GPCISR & (1<<i);
329 return;
330 }
331 }
332 line = ITE_GPBISR;
333 for (i=7; i >= 0; i--) {
334 if ( line & (1 << i)) {
335 ++ite_irq_counter[i+8];
336 ite_gpio_irq_pending[i+8] = 2;
337 wake_up_interruptible(&ite_gpio_wait[i+8]);
338
339DEB(printk("interrupt 0x%x %d\n",ITE_GPBISR, i+8));
340
341 ITE_GPBISR = ITE_GPBISR & (1<<i);
342 return;
343 }
344 }
345 line = ITE_GPAISR;
346 for (i=7; i >= 0; i--) {
347 if ( line & (1 << i)) {
348 ++ite_irq_counter[i];
349 ite_gpio_irq_pending[i] = 2;
350 wake_up_interruptible(&ite_gpio_wait[i]);
351
352DEB(printk("interrupt 0x%x %d\n",ITE_GPAISR, i));
353
354 ITE_GPAISR = ITE_GPAISR & (1<<i);
355 return;
356 }
357 }
358}
359
360static const struct file_operations ite_gpio_fops = {
361 .owner = THIS_MODULE,
362 .ioctl = ite_gpio_ioctl,
363 .open = ite_gpio_open,
364 .release = ite_gpio_release,
365};
366
367static struct miscdevice ite_gpio_miscdev = {
368 MISC_DYNAMIC_MINOR,
369 "ite_gpio",
370 &ite_gpio_fops
371};
372
373int __init ite_gpio_init(void)
374{
375 int i;
376
377 if (misc_register(&ite_gpio_miscdev))
378 return -ENODEV;
379
380 if (!request_region(ite_gpio_base, 0x1c, "ITE GPIO"))
381 {
382 misc_deregister(&ite_gpio_miscdev);
383 return -EIO;
384 }
385
386 /* initialize registers */
387 ITE_GPACR = 0xffff;
388 ITE_GPBCR = 0xffff;
389 ITE_GPCCR = 0xffff;
390 ITE_GPAICR = 0x00ff;
391 ITE_GPBICR = 0x00ff;
392 ITE_GPCICR = 0x00ff;
393 ITE_GCR = 0;
394
395 for (i = 0; i < MAX_GPIO_LINE; i++) {
396 ite_gpio_irq_pending[i]=0;
397 init_waitqueue_head(&ite_gpio_wait[i]);
398 }
399
400 if (request_irq(ite_gpio_irq, ite_gpio_irq_handler, IRQF_SHARED, "gpio", 0) < 0) {
401 misc_deregister(&ite_gpio_miscdev);
402 release_region(ite_gpio_base, 0x1c);
403 return 0;
404 }
405
406 printk("GPIO at 0x%x (irq = %d)\n", ite_gpio_base, ite_gpio_irq);
407
408 return 0;
409}
410
411static void __exit ite_gpio_exit(void)
412{
413 misc_deregister(&ite_gpio_miscdev);
414}
415
416module_init(ite_gpio_init);
417module_exit(ite_gpio_exit);
418
419MODULE_LICENSE("GPL");
diff --git a/drivers/char/qtronixmap.c_shipped b/drivers/char/qtronixmap.c_shipped
deleted file mode 100644
index 1e2b92b7d57a..000000000000
--- a/drivers/char/qtronixmap.c_shipped
+++ /dev/null
@@ -1,265 +0,0 @@
1
2/* Do not edit this file! It was automatically generated by */
3/* loadkeys --mktable defkeymap.map > defkeymap.c */
4
5#include <linux/types.h>
6#include <linux/keyboard.h>
7#include <linux/kd.h>
8
9u_short plain_map[NR_KEYS] = {
10 0xf200, 0xf060, 0xf031, 0xf032, 0xf033, 0xf034, 0xf035, 0xf036,
11 0xf037, 0xf038, 0xf039, 0xf030, 0xf02d, 0xf03d, 0xf200, 0xf07f,
12 0xf009, 0xfb71, 0xfb77, 0xfb65, 0xfb72, 0xfb74, 0xfb79, 0xfb75,
13 0xfb69, 0xfb6f, 0xfb70, 0xf05b, 0xf05d, 0xf05c, 0xf207, 0xfb61,
14 0xfb73, 0xfb64, 0xfb66, 0xfb67, 0xfb68, 0xfb6a, 0xfb6b, 0xfb6c,
15 0xf03b, 0xf027, 0xf060, 0xf201, 0xf700, 0xf200, 0xfb7a, 0xfb78,
16 0xfb63, 0xfb76, 0xfb62, 0xfb6e, 0xfb6d, 0xf02c, 0xf02e, 0xf02f,
17 0xf200, 0xf700, 0xf702, 0xf200, 0xf703, 0xf020, 0xf703, 0xf200,
18 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
19 0xf200, 0xf200, 0xf200, 0xf115, 0xf07f, 0xf200, 0xf200, 0xf601,
20 0xf200, 0xf200, 0xf200, 0xf603, 0xf600, 0xf118, 0xf119, 0xf200,
21 0xf200, 0xf602, 0xf208, 0xf02d, 0xf02b, 0xf30c, 0xf02e, 0xf30d,
22 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
23 0xf200, 0xf200, 0xf200, 0xf117, 0xf600, 0xf200, 0xf01b, 0xf200,
24 0xf100, 0xf101, 0xf102, 0xf103, 0xf104, 0xf105, 0xf106, 0xf107,
25 0xf108, 0xf109, 0xf200, 0xf200, 0xf200, 0xf200, 0xf11d, 0xf200,
26};
27
28u_short shift_map[NR_KEYS] = {
29 0xf200, 0xf07e, 0xf021, 0xf040, 0xf023, 0xf024, 0xf025, 0xf05e,
30 0xf026, 0xf02a, 0xf028, 0xf029, 0xf05f, 0xf02b, 0xf200, 0xf07f,
31 0xf009, 0xfb51, 0xfb57, 0xfb45, 0xfb52, 0xfb54, 0xfb59, 0xfb55,
32 0xfb49, 0xfb4f, 0xfb50, 0xf07b, 0xf07d, 0xf07c, 0xf207, 0xfb41,
33 0xfb53, 0xfb44, 0xfb46, 0xfb47, 0xfb48, 0xfb4a, 0xfb4b, 0xfb4c,
34 0xf03a, 0xf022, 0xf07e, 0xf201, 0xf700, 0xf200, 0xfb5a, 0xfb58,
35 0xfb43, 0xfb56, 0xfb42, 0xfb4e, 0xfb4d, 0xf03c, 0xf03e, 0xf03f,
36 0xf200, 0xf700, 0xf702, 0xf200, 0xf703, 0xf020, 0xf703, 0xf200,
37 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
38 0xf200, 0xf200, 0xf200, 0xf115, 0xf07f, 0xf200, 0xf200, 0xf601,
39 0xf200, 0xf200, 0xf200, 0xf603, 0xf600, 0xf20b, 0xf20a, 0xf200,
40 0xf200, 0xf602, 0xf213, 0xf02d, 0xf02b, 0xf30c, 0xf02e, 0xf30d,
41 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
42 0xf200, 0xf200, 0xf200, 0xf117, 0xf600, 0xf200, 0xf01b, 0xf200,
43 0xf10a, 0xf10b, 0xf10c, 0xf10d, 0xf10e, 0xf10f, 0xf110, 0xf111,
44 0xf112, 0xf113, 0xf200, 0xf200, 0xf200, 0xf200, 0xf11d, 0xf200,
45};
46
47u_short altgr_map[NR_KEYS] = {
48 0xf200, 0xf200, 0xf200, 0xf040, 0xf200, 0xf024, 0xf200, 0xf200,
49 0xf07b, 0xf05b, 0xf05d, 0xf07d, 0xf05c, 0xf200, 0xf200, 0xf200,
50 0xf200, 0xfb71, 0xfb77, 0xfb65, 0xfb72, 0xfb74, 0xfb79, 0xfb75,
51 0xfb69, 0xfb6f, 0xfb70, 0xf200, 0xf200, 0xf200, 0xf207, 0xfb61,
52 0xfb73, 0xfb64, 0xfb66, 0xfb67, 0xfb68, 0xfb6a, 0xfb6b, 0xfb6c,
53 0xf200, 0xf200, 0xf200, 0xf201, 0xf700, 0xf200, 0xfb7a, 0xfb78,
54 0xfb63, 0xfb76, 0xfb62, 0xfb6e, 0xfb6d, 0xf200, 0xf200, 0xf200,
55 0xf200, 0xf700, 0xf702, 0xf200, 0xf703, 0xf200, 0xf703, 0xf200,
56 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
57 0xf200, 0xf200, 0xf200, 0xf115, 0xf07f, 0xf200, 0xf200, 0xf601,
58 0xf200, 0xf200, 0xf200, 0xf603, 0xf600, 0xf118, 0xf119, 0xf200,
59 0xf200, 0xf602, 0xf208, 0xf02d, 0xf02b, 0xf30c, 0xf02e, 0xf30d,
60 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
61 0xf200, 0xf200, 0xf200, 0xf117, 0xf600, 0xf200, 0xf200, 0xf200,
62 0xf50c, 0xf50d, 0xf50e, 0xf50f, 0xf510, 0xf511, 0xf512, 0xf513,
63 0xf514, 0xf515, 0xf200, 0xf200, 0xf200, 0xf200, 0xf11d, 0xf200,
64};
65
66u_short ctrl_map[NR_KEYS] = {
67 0xf200, 0xf200, 0xf200, 0xf000, 0xf01b, 0xf01c, 0xf01d, 0xf01e,
68 0xf01f, 0xf07f, 0xf200, 0xf200, 0xf01f, 0xf200, 0xf200, 0xf008,
69 0xf200, 0xf011, 0xf017, 0xf005, 0xf012, 0xf014, 0xf019, 0xf015,
70 0xf009, 0xf00f, 0xf010, 0xf01b, 0xf01d, 0xf01c, 0xf207, 0xf001,
71 0xf013, 0xf004, 0xf006, 0xf007, 0xf008, 0xf00a, 0xf00b, 0xf00c,
72 0xf007, 0xf000, 0xf200, 0xf201, 0xf700, 0xf200, 0xf01a, 0xf018,
73 0xf003, 0xf016, 0xf002, 0xf00e, 0xf20e, 0xf07f, 0xf200, 0xf200,
74 0xf200, 0xf700, 0xf702, 0xf200, 0xf703, 0xf000, 0xf703, 0xf200,
75 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
76 0xf200, 0xf200, 0xf200, 0xf115, 0xf07f, 0xf200, 0xf200, 0xf601,
77 0xf200, 0xf200, 0xf200, 0xf603, 0xf600, 0xf118, 0xf119, 0xf200,
78 0xf200, 0xf602, 0xf208, 0xf02d, 0xf02b, 0xf30c, 0xf02e, 0xf30d,
79 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
80 0xf200, 0xf200, 0xf200, 0xf117, 0xf600, 0xf200, 0xf200, 0xf200,
81 0xf100, 0xf101, 0xf102, 0xf103, 0xf104, 0xf105, 0xf106, 0xf107,
82 0xf108, 0xf109, 0xf200, 0xf200, 0xf200, 0xf200, 0xf11d, 0xf200,
83};
84
85u_short shift_ctrl_map[NR_KEYS] = {
86 0xf200, 0xf200, 0xf200, 0xf000, 0xf200, 0xf200, 0xf200, 0xf200,
87 0xf200, 0xf200, 0xf200, 0xf200, 0xf01f, 0xf200, 0xf200, 0xf200,
88 0xf200, 0xf011, 0xf017, 0xf005, 0xf012, 0xf014, 0xf019, 0xf015,
89 0xf009, 0xf00f, 0xf010, 0xf200, 0xf200, 0xf200, 0xf207, 0xf001,
90 0xf013, 0xf004, 0xf006, 0xf007, 0xf008, 0xf00a, 0xf00b, 0xf00c,
91 0xf200, 0xf200, 0xf200, 0xf201, 0xf700, 0xf200, 0xf01a, 0xf018,
92 0xf003, 0xf016, 0xf002, 0xf00e, 0xf00d, 0xf200, 0xf200, 0xf200,
93 0xf200, 0xf700, 0xf702, 0xf200, 0xf703, 0xf200, 0xf703, 0xf200,
94 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
95 0xf200, 0xf200, 0xf200, 0xf115, 0xf07f, 0xf200, 0xf200, 0xf601,
96 0xf200, 0xf200, 0xf200, 0xf603, 0xf600, 0xf118, 0xf119, 0xf200,
97 0xf200, 0xf602, 0xf208, 0xf02d, 0xf02b, 0xf30c, 0xf02e, 0xf30d,
98 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
99 0xf200, 0xf200, 0xf200, 0xf117, 0xf600, 0xf200, 0xf200, 0xf200,
100 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
101 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf11d, 0xf200,
102};
103
104u_short alt_map[NR_KEYS] = {
105 0xf200, 0xf81b, 0xf831, 0xf832, 0xf833, 0xf834, 0xf835, 0xf836,
106 0xf837, 0xf838, 0xf839, 0xf830, 0xf82d, 0xf83d, 0xf200, 0xf87f,
107 0xf809, 0xf871, 0xf877, 0xf865, 0xf872, 0xf874, 0xf879, 0xf875,
108 0xf869, 0xf86f, 0xf870, 0xf85b, 0xf85d, 0xf85c, 0xf207, 0xf861,
109 0xf873, 0xf864, 0xf866, 0xf867, 0xf868, 0xf86a, 0xf86b, 0xf83b,
110 0xf827, 0xf860, 0xf200, 0xf80d, 0xf700, 0xf200, 0xf87a, 0xf878,
111 0xf863, 0xf876, 0xf862, 0xf82c, 0xf82e, 0xf82f, 0xf200, 0xf200,
112 0xf200, 0xf700, 0xf702, 0xf200, 0xf703, 0xf820, 0xf703, 0xf200,
113 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
114 0xf200, 0xf200, 0xf200, 0xf115, 0xf07f, 0xf200, 0xf200, 0xf210,
115 0xf200, 0xf200, 0xf200, 0xf603, 0xf600, 0xf118, 0xf119, 0xf200,
116 0xf200, 0xf211, 0xf208, 0xf02d, 0xf02b, 0xf30c, 0xf02e, 0xf30d,
117 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
118 0xf200, 0xf200, 0xf200, 0xf117, 0xf600, 0xf200, 0xf200, 0xf200,
119 0xf500, 0xf501, 0xf502, 0xf503, 0xf504, 0xf505, 0xf506, 0xf507,
120 0xf508, 0xf509, 0xf200, 0xf200, 0xf200, 0xf200, 0xf11d, 0xf200,
121};
122
123u_short ctrl_alt_map[NR_KEYS] = {
124 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
125 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
126 0xf200, 0xf811, 0xf817, 0xf805, 0xf812, 0xf814, 0xf819, 0xf815,
127 0xf809, 0xf80f, 0xf810, 0xf200, 0xf200, 0xf200, 0xf207, 0xf801,
128 0xf813, 0xf804, 0xf806, 0xf807, 0xf808, 0xf80a, 0xf80b, 0xf80c,
129 0xf200, 0xf200, 0xf200, 0xf201, 0xf700, 0xf200, 0xf81a, 0xf818,
130 0xf803, 0xf816, 0xf802, 0xf80e, 0xf80d, 0xf200, 0xf200, 0xf200,
131 0xf200, 0xf700, 0xf702, 0xf200, 0xf703, 0xf200, 0xf703, 0xf200,
132 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
133 0xf200, 0xf200, 0xf200, 0xf115, 0xf07f, 0xf200, 0xf200, 0xf601,
134 0xf200, 0xf200, 0xf200, 0xf603, 0xf600, 0xf118, 0xf119, 0xf200,
135 0xf200, 0xf602, 0xf208, 0xf02d, 0xf02b, 0xf30c, 0xf02e, 0xf30d,
136 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200,
137 0xf200, 0xf200, 0xf200, 0xf117, 0xf600, 0xf200, 0xf200, 0xf200,
138 0xf500, 0xf501, 0xf502, 0xf503, 0xf504, 0xf505, 0xf506, 0xf507,
139 0xf508, 0xf509, 0xf200, 0xf200, 0xf200, 0xf200, 0xf11d, 0xf200,
140};
141
142ushort *key_maps[MAX_NR_KEYMAPS] = {
143 plain_map, shift_map, altgr_map, 0,
144 ctrl_map, shift_ctrl_map, 0, 0,
145 alt_map, 0, 0, 0,
146 ctrl_alt_map, 0
147};
148
149unsigned int keymap_count = 7;
150
151
152/*
153 * Philosophy: most people do not define more strings, but they who do
154 * often want quite a lot of string space. So, we statically allocate
155 * the default and allocate dynamically in chunks of 512 bytes.
156 */
157
158char func_buf[] = {
159 '\033', '[', '[', 'A', 0,
160 '\033', '[', '[', 'B', 0,
161 '\033', '[', '[', 'C', 0,
162 '\033', '[', '[', 'D', 0,
163 '\033', '[', '[', 'E', 0,
164 '\033', '[', '1', '7', '~', 0,
165 '\033', '[', '1', '8', '~', 0,
166 '\033', '[', '1', '9', '~', 0,
167 '\033', '[', '2', '0', '~', 0,
168 '\033', '[', '2', '1', '~', 0,
169 '\033', '[', '2', '3', '~', 0,
170 '\033', '[', '2', '4', '~', 0,
171 '\033', '[', '2', '5', '~', 0,
172 '\033', '[', '2', '6', '~', 0,
173 '\033', '[', '2', '8', '~', 0,
174 '\033', '[', '2', '9', '~', 0,
175 '\033', '[', '3', '1', '~', 0,
176 '\033', '[', '3', '2', '~', 0,
177 '\033', '[', '3', '3', '~', 0,
178 '\033', '[', '3', '4', '~', 0,
179 '\033', '[', '1', '~', 0,
180 '\033', '[', '2', '~', 0,
181 '\033', '[', '3', '~', 0,
182 '\033', '[', '4', '~', 0,
183 '\033', '[', '5', '~', 0,
184 '\033', '[', '6', '~', 0,
185 '\033', '[', 'M', 0,
186 '\033', '[', 'P', 0,
187};
188
189
190char *funcbufptr = func_buf;
191int funcbufsize = sizeof(func_buf);
192int funcbufleft = 0; /* space left */
193
194char *func_table[MAX_NR_FUNC] = {
195 func_buf + 0,
196 func_buf + 5,
197 func_buf + 10,
198 func_buf + 15,
199 func_buf + 20,
200 func_buf + 25,
201 func_buf + 31,
202 func_buf + 37,
203 func_buf + 43,
204 func_buf + 49,
205 func_buf + 55,
206 func_buf + 61,
207 func_buf + 67,
208 func_buf + 73,
209 func_buf + 79,
210 func_buf + 85,
211 func_buf + 91,
212 func_buf + 97,
213 func_buf + 103,
214 func_buf + 109,
215 func_buf + 115,
216 func_buf + 120,
217 func_buf + 125,
218 func_buf + 130,
219 func_buf + 135,
220 func_buf + 140,
221 func_buf + 145,
222 0,
223 0,
224 func_buf + 149,
225 0,
226};
227
228struct kbdiacr accent_table[MAX_DIACR] = {
229 {'`', 'A', 'À'}, {'`', 'a', 'à'},
230 {'\'', 'A', 'Á'}, {'\'', 'a', 'á'},
231 {'^', 'A', 'Â'}, {'^', 'a', 'â'},
232 {'~', 'A', 'Ã'}, {'~', 'a', 'ã'},
233 {'"', 'A', 'Ä'}, {'"', 'a', 'ä'},
234 {'O', 'A', 'Å'}, {'o', 'a', 'å'},
235 {'0', 'A', 'Å'}, {'0', 'a', 'å'},
236 {'A', 'A', 'Å'}, {'a', 'a', 'å'},
237 {'A', 'E', 'Æ'}, {'a', 'e', 'æ'},
238 {',', 'C', 'Ç'}, {',', 'c', 'ç'},
239 {'`', 'E', 'È'}, {'`', 'e', 'è'},
240 {'\'', 'E', 'É'}, {'\'', 'e', 'é'},
241 {'^', 'E', 'Ê'}, {'^', 'e', 'ê'},
242 {'"', 'E', 'Ë'}, {'"', 'e', 'ë'},
243 {'`', 'I', 'Ì'}, {'`', 'i', 'ì'},
244 {'\'', 'I', 'Í'}, {'\'', 'i', 'í'},
245 {'^', 'I', 'Î'}, {'^', 'i', 'î'},
246 {'"', 'I', 'Ï'}, {'"', 'i', 'ï'},
247 {'-', 'D', 'Ð'}, {'-', 'd', 'ð'},
248 {'~', 'N', 'Ñ'}, {'~', 'n', 'ñ'},
249 {'`', 'O', 'Ò'}, {'`', 'o', 'ò'},
250 {'\'', 'O', 'Ó'}, {'\'', 'o', 'ó'},
251 {'^', 'O', 'Ô'}, {'^', 'o', 'ô'},
252 {'~', 'O', 'Õ'}, {'~', 'o', 'õ'},
253 {'"', 'O', 'Ö'}, {'"', 'o', 'ö'},
254 {'/', 'O', 'Ø'}, {'/', 'o', 'ø'},
255 {'`', 'U', 'Ù'}, {'`', 'u', 'ù'},
256 {'\'', 'U', 'Ú'}, {'\'', 'u', 'ú'},
257 {'^', 'U', 'Û'}, {'^', 'u', 'û'},
258 {'"', 'U', 'Ü'}, {'"', 'u', 'ü'},
259 {'\'', 'Y', 'Ý'}, {'\'', 'y', 'ý'},
260 {'T', 'H', 'Þ'}, {'t', 'h', 'þ'},
261 {'s', 's', 'ß'}, {'"', 'y', 'ÿ'},
262 {'s', 'z', 'ß'}, {'i', 'j', 'ÿ'},
263};
264
265unsigned int accent_table_size = 68;
diff --git a/drivers/char/qtronixmap.map b/drivers/char/qtronixmap.map
deleted file mode 100644
index 8d1ff5c1e281..000000000000
--- a/drivers/char/qtronixmap.map
+++ /dev/null
@@ -1,287 +0,0 @@
1# Default kernel keymap. This uses 7 modifier combinations.
2keymaps 0-2,4-5,8,12
3# Change the above line into
4# keymaps 0-2,4-6,8,12
5# in case you want the entries
6# altgr control keycode 83 = Boot
7# altgr control keycode 111 = Boot
8# below.
9#
10# In fact AltGr is used very little, and one more keymap can
11# be saved by mapping AltGr to Alt (and adapting a few entries):
12# keycode 100 = Alt
13#
14keycode 1 = grave asciitilde
15 alt keycode 1 = Meta_Escape
16keycode 2 = one exclam
17 alt keycode 2 = Meta_one
18keycode 3 = two at at
19 control keycode 3 = nul
20 shift control keycode 3 = nul
21 alt keycode 3 = Meta_two
22keycode 4 = three numbersign
23 control keycode 4 = Escape
24 alt keycode 4 = Meta_three
25keycode 5 = four dollar dollar
26 control keycode 5 = Control_backslash
27 alt keycode 5 = Meta_four
28keycode 6 = five percent
29 control keycode 6 = Control_bracketright
30 alt keycode 6 = Meta_five
31keycode 7 = six asciicircum
32 control keycode 7 = Control_asciicircum
33 alt keycode 7 = Meta_six
34keycode 8 = seven ampersand braceleft
35 control keycode 8 = Control_underscore
36 alt keycode 8 = Meta_seven
37keycode 9 = eight asterisk bracketleft
38 control keycode 9 = Delete
39 alt keycode 9 = Meta_eight
40keycode 10 = nine parenleft bracketright
41 alt keycode 10 = Meta_nine
42keycode 11 = zero parenright braceright
43 alt keycode 11 = Meta_zero
44keycode 12 = minus underscore backslash
45 control keycode 12 = Control_underscore
46 shift control keycode 12 = Control_underscore
47 alt keycode 12 = Meta_minus
48keycode 13 = equal plus
49 alt keycode 13 = Meta_equal
50keycode 15 = Delete Delete
51 control keycode 15 = BackSpace
52 alt keycode 15 = Meta_Delete
53keycode 16 = Tab Tab
54 alt keycode 16 = Meta_Tab
55keycode 17 = q
56keycode 18 = w
57keycode 19 = e
58keycode 20 = r
59keycode 21 = t
60keycode 22 = y
61keycode 23 = u
62keycode 24 = i
63keycode 25 = o
64keycode 26 = p
65keycode 27 = bracketleft braceleft
66 control keycode 27 = Escape
67 alt keycode 27 = Meta_bracketleft
68keycode 28 = bracketright braceright
69 control keycode 28 = Control_bracketright
70 alt keycode 28 = Meta_bracketright
71keycode 29 = backslash bar
72 control keycode 29 = Control_backslash
73 alt keycode 29 = Meta_backslash
74keycode 30 = Caps_Lock
75keycode 31 = a
76keycode 32 = s
77keycode 33 = d
78keycode 34 = f
79keycode 35 = g
80keycode 36 = h
81keycode 37 = j
82keycode 38 = k
83keycode 39 = l
84keycode 40 = semicolon colon
85 alt keycode 39 = Meta_semicolon
86keycode 41 = apostrophe quotedbl
87 control keycode 40 = Control_g
88 alt keycode 40 = Meta_apostrophe
89keycode 42 = grave asciitilde
90 control keycode 41 = nul
91 alt keycode 41 = Meta_grave
92keycode 43 = Return
93 alt keycode 43 = Meta_Control_m
94keycode 44 = Shift
95keycode 46 = z
96keycode 47 = x
97keycode 48 = c
98keycode 49 = v
99keycode 50 = b
100keycode 51 = n
101keycode 52 = m
102keycode 53 = comma less
103 alt keycode 51 = Meta_comma
104keycode 54 = period greater
105 control keycode 52 = Compose
106 alt keycode 52 = Meta_period
107keycode 55 = slash question
108 control keycode 53 = Delete
109 alt keycode 53 = Meta_slash
110keycode 57 = Shift
111keycode 58 = Control
112keycode 60 = Alt
113keycode 61 = space space
114 control keycode 61 = nul
115 alt keycode 61 = Meta_space
116keycode 62 = Alt
117
118keycode 75 = Insert
119keycode 76 = Delete
120
121keycode 83 = Up
122keycode 84 = Down
123
124keycode 85 = Prior
125 shift keycode 85 = Scroll_Backward
126keycode 86 = Next
127 shift keycode 86 = Scroll_Forward
128keycode 89 = Right
129 alt keycode 89 = Incr_Console
130keycode 79 = Left
131 alt keycode 79 = Decr_Console
132
133keycode 90 = Num_Lock
134 shift keycode 90 = Bare_Num_Lock
135
136keycode 91 = minus
137keycode 92 = plus
138keycode 93 = KP_Multiply
139keycode 94 = period
140keycode 95 = KP_Divide
141
142keycode 107 = Select
143keycode 108 = Down
144
145keycode 110 = Escape Escape
146 alt keycode 1 = Meta_Escape
147
148keycode 112 = F1 F11 Console_13
149 control keycode 112 = F1
150 alt keycode 112 = Console_1
151 control alt keycode 112 = Console_1
152keycode 113 = F2 F12 Console_14
153 control keycode 113 = F2
154 alt keycode 113 = Console_2
155 control alt keycode 113 = Console_2
156keycode 114 = F3 F13 Console_15
157 control keycode 114 = F3
158 alt keycode 114 = Console_3
159 control alt keycode 114 = Console_3
160keycode 115 = F4 F14 Console_16
161 control keycode 115 = F4
162 alt keycode 115 = Console_4
163 control alt keycode 115 = Console_4
164keycode 116 = F5 F15 Console_17
165 control keycode 116 = F5
166 alt keycode 116 = Console_5
167 control alt keycode 116 = Console_5
168keycode 117 = F6 F16 Console_18
169 control keycode 117 = F6
170 alt keycode 117 = Console_6
171 control alt keycode 117 = Console_6
172keycode 118 = F7 F17 Console_19
173 control keycode 118 = F7
174 alt keycode 118 = Console_7
175 control alt keycode 118 = Console_7
176keycode 119 = F8 F18 Console_20
177 control keycode 119 = F8
178 alt keycode 119 = Console_8
179 control alt keycode 119 = Console_8
180keycode 120 = F9 F19 Console_21
181 control keycode 120 = F9
182 alt keycode 120 = Console_9
183 control alt keycode 120 = Console_9
184keycode 121 = F10 F20 Console_22
185 control keycode 121 = F10
186 alt keycode 121 = Console_10
187 control alt keycode 121 = Console_10
188
189keycode 126 = Pause
190
191
192string F1 = "\033[[A"
193string F2 = "\033[[B"
194string F3 = "\033[[C"
195string F4 = "\033[[D"
196string F5 = "\033[[E"
197string F6 = "\033[17~"
198string F7 = "\033[18~"
199string F8 = "\033[19~"
200string F9 = "\033[20~"
201string F10 = "\033[21~"
202string F11 = "\033[23~"
203string F12 = "\033[24~"
204string F13 = "\033[25~"
205string F14 = "\033[26~"
206string F15 = "\033[28~"
207string F16 = "\033[29~"
208string F17 = "\033[31~"
209string F18 = "\033[32~"
210string F19 = "\033[33~"
211string F20 = "\033[34~"
212string Find = "\033[1~"
213string Insert = "\033[2~"
214string Remove = "\033[3~"
215string Select = "\033[4~"
216string Prior = "\033[5~"
217string Next = "\033[6~"
218string Macro = "\033[M"
219string Pause = "\033[P"
220compose '`' 'A' to 'À'
221compose '`' 'a' to 'à'
222compose '\'' 'A' to 'Á'
223compose '\'' 'a' to 'á'
224compose '^' 'A' to 'Â'
225compose '^' 'a' to 'â'
226compose '~' 'A' to 'Ã'
227compose '~' 'a' to 'ã'
228compose '"' 'A' to 'Ä'
229compose '"' 'a' to 'ä'
230compose 'O' 'A' to 'Å'
231compose 'o' 'a' to 'å'
232compose '0' 'A' to 'Å'
233compose '0' 'a' to 'å'
234compose 'A' 'A' to 'Å'
235compose 'a' 'a' to 'å'
236compose 'A' 'E' to 'Æ'
237compose 'a' 'e' to 'æ'
238compose ',' 'C' to 'Ç'
239compose ',' 'c' to 'ç'
240compose '`' 'E' to 'È'
241compose '`' 'e' to 'è'
242compose '\'' 'E' to 'É'
243compose '\'' 'e' to 'é'
244compose '^' 'E' to 'Ê'
245compose '^' 'e' to 'ê'
246compose '"' 'E' to 'Ë'
247compose '"' 'e' to 'ë'
248compose '`' 'I' to 'Ì'
249compose '`' 'i' to 'ì'
250compose '\'' 'I' to 'Í'
251compose '\'' 'i' to 'í'
252compose '^' 'I' to 'Î'
253compose '^' 'i' to 'î'
254compose '"' 'I' to 'Ï'
255compose '"' 'i' to 'ï'
256compose '-' 'D' to 'Ð'
257compose '-' 'd' to 'ð'
258compose '~' 'N' to 'Ñ'
259compose '~' 'n' to 'ñ'
260compose '`' 'O' to 'Ò'
261compose '`' 'o' to 'ò'
262compose '\'' 'O' to 'Ó'
263compose '\'' 'o' to 'ó'
264compose '^' 'O' to 'Ô'
265compose '^' 'o' to 'ô'
266compose '~' 'O' to 'Õ'
267compose '~' 'o' to 'õ'
268compose '"' 'O' to 'Ö'
269compose '"' 'o' to 'ö'
270compose '/' 'O' to 'Ø'
271compose '/' 'o' to 'ø'
272compose '`' 'U' to 'Ù'
273compose '`' 'u' to 'ù'
274compose '\'' 'U' to 'Ú'
275compose '\'' 'u' to 'ú'
276compose '^' 'U' to 'Û'
277compose '^' 'u' to 'û'
278compose '"' 'U' to 'Ü'
279compose '"' 'u' to 'ü'
280compose '\'' 'Y' to 'Ý'
281compose '\'' 'y' to 'ý'
282compose 'T' 'H' to 'Þ'
283compose 't' 'h' to 'þ'
284compose 's' 's' to 'ß'
285compose '"' 'y' to 'ÿ'
286compose 's' 'z' to 'ß'
287compose 'i' 'j' to 'ÿ'
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig
index abcabb295592..0c68d0f0d8e5 100644
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -614,15 +614,6 @@ config BLK_DEV_PIIX
614 the kernel to change PIO, DMA and UDMA speeds and to configure 614 the kernel to change PIO, DMA and UDMA speeds and to configure
615 the chip to optimum performance. 615 the chip to optimum performance.
616 616
617config BLK_DEV_IT8172
618 bool "IT8172 IDE support"
619 depends on (MIPS_ITE8172 || MIPS_IVR)
620 help
621 Say Y here to support the on-board IDE controller on the Integrated
622 Technology Express, Inc. ITE8172 SBC. Vendor page at
623 <http://www.ite.com.tw/ia/brief_it8172bsp.htm>; picture of the
624 board at <http://www.mvista.com/partners/semiconductor/ite.html>.
625
626config BLK_DEV_IT821X 617config BLK_DEV_IT821X
627 tristate "IT821X IDE support" 618 tristate "IT821X IDE support"
628 help 619 help
diff --git a/drivers/ide/pci/Makefile b/drivers/ide/pci/Makefile
index 640a54b09b5a..fef08960aa4c 100644
--- a/drivers/ide/pci/Makefile
+++ b/drivers/ide/pci/Makefile
@@ -12,7 +12,6 @@ obj-$(CONFIG_BLK_DEV_CY82C693) += cy82c693.o
12obj-$(CONFIG_BLK_DEV_HPT34X) += hpt34x.o 12obj-$(CONFIG_BLK_DEV_HPT34X) += hpt34x.o
13obj-$(CONFIG_BLK_DEV_HPT366) += hpt366.o 13obj-$(CONFIG_BLK_DEV_HPT366) += hpt366.o
14#obj-$(CONFIG_BLK_DEV_HPT37X) += hpt37x.o 14#obj-$(CONFIG_BLK_DEV_HPT37X) += hpt37x.o
15obj-$(CONFIG_BLK_DEV_IT8172) += it8172.o
16obj-$(CONFIG_BLK_DEV_IT821X) += it821x.o 15obj-$(CONFIG_BLK_DEV_IT821X) += it821x.o
17obj-$(CONFIG_BLK_DEV_JMICRON) += jmicron.o 16obj-$(CONFIG_BLK_DEV_JMICRON) += jmicron.o
18obj-$(CONFIG_BLK_DEV_NS87415) += ns87415.o 17obj-$(CONFIG_BLK_DEV_NS87415) += ns87415.o
diff --git a/drivers/ide/pci/it8172.c b/drivers/ide/pci/it8172.c
deleted file mode 100644
index 0fc89fafad65..000000000000
--- a/drivers/ide/pci/it8172.c
+++ /dev/null
@@ -1,307 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * IT8172 IDE controller support
5 *
6 * Copyright 2000 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc.
8 * stevel@mvista.com or source@mvista.com
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30
31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/kernel.h>
34#include <linux/ioport.h>
35#include <linux/pci.h>
36#include <linux/hdreg.h>
37#include <linux/ide.h>
38#include <linux/delay.h>
39#include <linux/init.h>
40
41#include <asm/io.h>
42#include <asm/it8172/it8172_int.h>
43
44/*
45 * Prototypes
46 */
47static u8 it8172_ratemask (ide_drive_t *drive)
48{
49 return 1;
50}
51
52static void it8172_tune_drive (ide_drive_t *drive, u8 pio)
53{
54 ide_hwif_t *hwif = HWIF(drive);
55 struct pci_dev *dev = hwif->pci_dev;
56 int is_slave = (&hwif->drives[1] == drive);
57 unsigned long flags;
58 u16 drive_enables;
59 u32 drive_timing;
60
61 pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
62 spin_lock_irqsave(&ide_lock, flags);
63 pci_read_config_word(dev, 0x40, &drive_enables);
64 pci_read_config_dword(dev, 0x44, &drive_timing);
65
66 /*
67 * FIX! The DIOR/DIOW pulse width and recovery times in port 0x44
68 * are being left at the default values of 8 PCI clocks (242 nsec
69 * for a 33 MHz clock). These can be safely shortened at higher
70 * PIO modes. The DIOR/DIOW pulse width and recovery times only
71 * apply to PIO modes, not to the DMA modes.
72 */
73
74 /*
75 * Enable port 0x44. The IT8172G spec is confused; it calls
76 * this register the "Slave IDE Timing Register", but in fact,
77 * it controls timing for both master and slave drives.
78 */
79 drive_enables |= 0x4000;
80
81 if (is_slave) {
82 drive_enables &= 0xc006;
83 if (pio > 1)
84 /* enable prefetch and IORDY sample-point */
85 drive_enables |= 0x0060;
86 } else {
87 drive_enables &= 0xc060;
88 if (pio > 1)
89 /* enable prefetch and IORDY sample-point */
90 drive_enables |= 0x0006;
91 }
92
93 pci_write_config_word(dev, 0x40, drive_enables);
94 spin_unlock_irqrestore(&ide_lock, flags);
95}
96
97static u8 it8172_dma_2_pio (u8 xfer_rate)
98{
99 switch(xfer_rate) {
100 case XFER_UDMA_5:
101 case XFER_UDMA_4:
102 case XFER_UDMA_3:
103 case XFER_UDMA_2:
104 case XFER_UDMA_1:
105 case XFER_UDMA_0:
106 case XFER_MW_DMA_2:
107 case XFER_PIO_4:
108 return 4;
109 case XFER_MW_DMA_1:
110 case XFER_PIO_3:
111 return 3;
112 case XFER_SW_DMA_2:
113 case XFER_PIO_2:
114 return 2;
115 case XFER_MW_DMA_0:
116 case XFER_SW_DMA_1:
117 case XFER_SW_DMA_0:
118 case XFER_PIO_1:
119 case XFER_PIO_0:
120 case XFER_PIO_SLOW:
121 default:
122 return 0;
123 }
124}
125
126static int it8172_tune_chipset (ide_drive_t *drive, u8 xferspeed)
127{
128 ide_hwif_t *hwif = HWIF(drive);
129 struct pci_dev *dev = hwif->pci_dev;
130 u8 speed = ide_rate_filter(it8172_ratemask(drive), xferspeed);
131 int a_speed = 3 << (drive->dn * 4);
132 int u_flag = 1 << drive->dn;
133 int u_speed = 0;
134 u8 reg48, reg4a;
135
136 pci_read_config_byte(dev, 0x48, &reg48);
137 pci_read_config_byte(dev, 0x4a, &reg4a);
138
139 /*
140 * Setting the DMA cycle time to 2 or 3 PCI clocks (60 and 91 nsec
141 * at 33 MHz PCI clock) seems to cause BadCRC errors during DMA
142 * transfers on some drives, even though both numbers meet the minimum
143 * ATAPI-4 spec of 73 and 54 nsec for UDMA 1 and 2 respectively.
144 * So the faster times are just commented out here. The good news is
145 * that the slower cycle time has very little affect on transfer
146 * performance.
147 */
148
149 switch(speed) {
150 case XFER_UDMA_4:
151 case XFER_UDMA_2: //u_speed = 2 << (drive->dn * 4); break;
152 case XFER_UDMA_5:
153 case XFER_UDMA_3:
154 case XFER_UDMA_1: //u_speed = 1 << (drive->dn * 4); break;
155 case XFER_UDMA_0: u_speed = 0 << (drive->dn * 4); break;
156 case XFER_MW_DMA_2:
157 case XFER_MW_DMA_1:
158 case XFER_MW_DMA_0:
159 case XFER_SW_DMA_2: break;
160 case XFER_PIO_4:
161 case XFER_PIO_3:
162 case XFER_PIO_2:
163 case XFER_PIO_0: break;
164 default: return -1;
165 }
166
167 if (speed >= XFER_UDMA_0) {
168 pci_write_config_byte(dev, 0x48, reg48 | u_flag);
169 reg4a &= ~a_speed;
170 pci_write_config_byte(dev, 0x4a, reg4a | u_speed);
171 } else {
172 pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
173 pci_write_config_byte(dev, 0x4a, reg4a & ~a_speed);
174 }
175
176 it8172_tune_drive(drive, it8172_dma_2_pio(speed));
177 return (ide_config_drive_speed(drive, speed));
178}
179
180static int it8172_config_chipset_for_dma (ide_drive_t *drive)
181{
182 u8 speed = ide_dma_speed(drive, it8172_ratemask(drive));
183
184 if (!(speed)) {
185 u8 tspeed = ide_get_best_pio_mode(drive, 255, 4, NULL);
186 speed = it8172_dma_2_pio(XFER_PIO_0 + tspeed);
187 }
188
189 (void) it8172_tune_chipset(drive, speed);
190 return ide_dma_enable(drive);
191}
192
193static int it8172_config_drive_xfer_rate (ide_drive_t *drive)
194{
195 ide_hwif_t *hwif = HWIF(drive);
196 struct hd_driveid *id = drive->id;
197
198 drive->init_speed = 0;
199
200 if (id && (id->capability & 1) && drive->autodma) {
201
202 if (ide_use_dma(drive)) {
203 if (it8172_config_chipset_for_dma(drive))
204 return hwif->ide_dma_on(drive);
205 }
206
207 goto fast_ata_pio;
208
209 } else if ((id->capability & 8) || (id->field_valid & 2)) {
210fast_ata_pio:
211 it8172_tune_drive(drive, 5);
212 return hwif->ide_dma_off_quietly(drive);
213 }
214 /* IORDY not supported */
215 return 0;
216}
217
218static unsigned int __devinit init_chipset_it8172 (struct pci_dev *dev, const char *name)
219{
220 unsigned char progif;
221
222 /*
223 * Place both IDE interfaces into PCI "native" mode
224 */
225 pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
226 pci_write_config_byte(dev, PCI_CLASS_PROG, progif | 0x05);
227
228 return IT8172_IDE_IRQ;
229}
230
231
232static void __devinit init_hwif_it8172 (ide_hwif_t *hwif)
233{
234 struct pci_dev* dev = hwif->pci_dev;
235 unsigned long cmdBase, ctrlBase;
236
237 hwif->autodma = 0;
238 hwif->tuneproc = &it8172_tune_drive;
239 hwif->speedproc = &it8172_tune_chipset;
240
241 cmdBase = dev->resource[0].start;
242 ctrlBase = dev->resource[1].start;
243
244 ide_init_hwif_ports(&hwif->hw, cmdBase, ctrlBase | 2, NULL);
245 memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->io_ports));
246 hwif->noprobe = 0;
247
248 if (!hwif->dma_base) {
249 hwif->drives[0].autotune = 1;
250 hwif->drives[1].autotune = 1;
251 return;
252 }
253
254 hwif->atapi_dma = 1;
255 hwif->ultra_mask = 0x07;
256 hwif->mwdma_mask = 0x06;
257 hwif->swdma_mask = 0x04;
258
259 hwif->ide_dma_check = &it8172_config_drive_xfer_rate;
260 if (!noautodma)
261 hwif->autodma = 1;
262 hwif->drives[0].autodma = hwif->autodma;
263 hwif->drives[1].autodma = hwif->autodma;
264}
265
266static ide_pci_device_t it8172_chipsets[] __devinitdata = {
267 { /* 0 */
268 .name = "IT8172G",
269 .init_chipset = init_chipset_it8172,
270 .init_hwif = init_hwif_it8172,
271 .channels = 2,
272 .autodma = AUTODMA,
273 .enablebits = {{0x00,0x00,0x00}, {0x40,0x00,0x01}},
274 .bootable = ON_BOARD,
275 }
276};
277
278static int __devinit it8172_init_one(struct pci_dev *dev, const struct pci_device_id *id)
279{
280 if ((!(PCI_FUNC(dev->devfn) & 1) ||
281 (!((dev->class >> 8) == PCI_CLASS_STORAGE_IDE))))
282 return -ENODEV; /* IT8172 is more than an IDE controller */
283 return ide_setup_pci_device(dev, &it8172_chipsets[id->driver_data]);
284}
285
286static struct pci_device_id it8172_pci_tbl[] = {
287 { PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_IT8172G, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
288 { 0, },
289};
290MODULE_DEVICE_TABLE(pci, it8172_pci_tbl);
291
292static struct pci_driver driver = {
293 .name = "IT8172_IDE",
294 .id_table = it8172_pci_tbl,
295 .probe = it8172_init_one,
296};
297
298static int it8172_ide_init(void)
299{
300 return ide_pci_register_driver(&driver);
301}
302
303module_init(it8172_ide_init);
304
305MODULE_AUTHOR("SteveL@mvista.com");
306MODULE_DESCRIPTION("PCI driver module for ITE 8172 IDE");
307MODULE_LICENSE("GPL");
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-26 11:42:39 -0500