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authorJeff Garzik <jeff@garzik.org>2007-07-12 15:51:22 -0400
committerJeff Garzik <jeff@garzik.org>2007-07-12 15:51:22 -0400
commitee9ccdf70163ca6408f6965e0fbc65baeac7312c (patch)
treed8e8643c57656d2ea07e2a15c91735d2aeb0ab84 /drivers
parentbdd4dddee325a7dce3e84cf48201a06aa8508aa4 (diff)
[libata] sata_mv: Fix and clean up per-chip-generation tests
Due to a mistake in test logic, Gen-IIE chips were being treated as Gen-II chips in some cases. Fix this, and in the process, clean up IS_50XX/IS_60XX tests to the more uniform IS_GEN_{I,II,IIE} tests. Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ata/sata_mv.c29
1 files changed, 14 insertions, 15 deletions
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index d40c41c5f16c..8a77a0ae83ad 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -301,8 +301,9 @@ enum {
301 MV_HP_ERRATA_60X1B2 = (1 << 3), 301 MV_HP_ERRATA_60X1B2 = (1 << 3),
302 MV_HP_ERRATA_60X1C0 = (1 << 4), 302 MV_HP_ERRATA_60X1C0 = (1 << 4),
303 MV_HP_ERRATA_XX42A0 = (1 << 5), 303 MV_HP_ERRATA_XX42A0 = (1 << 5),
304 MV_HP_50XX = (1 << 6), 304 MV_HP_GEN_I = (1 << 6),
305 MV_HP_GEN_IIE = (1 << 7), 305 MV_HP_GEN_II = (1 << 7),
306 MV_HP_GEN_IIE = (1 << 8),
306 307
307 /* Port private flags (pp_flags) */ 308 /* Port private flags (pp_flags) */
308 MV_PP_FLAG_EDMA_EN = (1 << 0), 309 MV_PP_FLAG_EDMA_EN = (1 << 0),
@@ -310,10 +311,8 @@ enum {
310 MV_PP_FLAG_HAD_A_RESET = (1 << 2), 311 MV_PP_FLAG_HAD_A_RESET = (1 << 2),
311}; 312};
312 313
313#define IS_50XX(hpriv) ((hpriv)->hp_flags & MV_HP_50XX) 314#define IS_GEN_I(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_I)
314#define IS_60XX(hpriv) (((hpriv)->hp_flags & MV_HP_50XX) == 0) 315#define IS_GEN_II(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_II)
315#define IS_GEN_I(hpriv) IS_50XX(hpriv)
316#define IS_GEN_II(hpriv) IS_60XX(hpriv)
317#define IS_GEN_IIE(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_IIE) 316#define IS_GEN_IIE(hpriv) ((hpriv)->hp_flags & MV_HP_GEN_IIE)
318 317
319enum { 318enum {
@@ -1406,7 +1405,7 @@ static void mv_err_intr(struct ata_port *ap, struct ata_queued_cmd *qc)
1406 ", dev disconnect" : ", dev connect"); 1405 ", dev disconnect" : ", dev connect");
1407 } 1406 }
1408 1407
1409 if (IS_50XX(hpriv)) { 1408 if (IS_GEN_I(hpriv)) {
1410 eh_freeze_mask = EDMA_EH_FREEZE_5; 1409 eh_freeze_mask = EDMA_EH_FREEZE_5;
1411 1410
1412 if (edma_err_cause & EDMA_ERR_SELF_DIS_5) { 1411 if (edma_err_cause & EDMA_ERR_SELF_DIS_5) {
@@ -2100,7 +2099,7 @@ static void mv_channel_reset(struct mv_host_priv *hpriv, void __iomem *mmio,
2100 2099
2101 writelfl(ATA_RST, port_mmio + EDMA_CMD_OFS); 2100 writelfl(ATA_RST, port_mmio + EDMA_CMD_OFS);
2102 2101
2103 if (IS_60XX(hpriv)) { 2102 if (IS_GEN_II(hpriv)) {
2104 u32 ifctl = readl(port_mmio + SATA_INTERFACE_CTL); 2103 u32 ifctl = readl(port_mmio + SATA_INTERFACE_CTL);
2105 ifctl |= (1 << 7); /* enable gen2i speed */ 2104 ifctl |= (1 << 7); /* enable gen2i speed */
2106 ifctl = (ifctl & 0xfff) | 0x9b1000; /* from chip spec */ 2105 ifctl = (ifctl & 0xfff) | 0x9b1000; /* from chip spec */
@@ -2116,7 +2115,7 @@ static void mv_channel_reset(struct mv_host_priv *hpriv, void __iomem *mmio,
2116 2115
2117 hpriv->ops->phy_errata(hpriv, mmio, port_no); 2116 hpriv->ops->phy_errata(hpriv, mmio, port_no);
2118 2117
2119 if (IS_50XX(hpriv)) 2118 if (IS_GEN_I(hpriv))
2120 mdelay(1); 2119 mdelay(1);
2121} 2120}
2122 2121
@@ -2163,7 +2162,7 @@ comreset_retry:
2163 } while (time_before(jiffies, deadline)); 2162 } while (time_before(jiffies, deadline));
2164 2163
2165 /* work around errata */ 2164 /* work around errata */
2166 if (IS_60XX(hpriv) && 2165 if (IS_GEN_II(hpriv) &&
2167 (sstatus != 0x0) && (sstatus != 0x113) && (sstatus != 0x123) && 2166 (sstatus != 0x0) && (sstatus != 0x113) && (sstatus != 0x123) &&
2168 (retry-- > 0)) 2167 (retry-- > 0))
2169 goto comreset_retry; 2168 goto comreset_retry;
@@ -2396,7 +2395,7 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
2396 switch(board_idx) { 2395 switch(board_idx) {
2397 case chip_5080: 2396 case chip_5080:
2398 hpriv->ops = &mv5xxx_ops; 2397 hpriv->ops = &mv5xxx_ops;
2399 hp_flags |= MV_HP_50XX; 2398 hp_flags |= MV_HP_GEN_I;
2400 2399
2401 switch (rev_id) { 2400 switch (rev_id) {
2402 case 0x1: 2401 case 0x1:
@@ -2416,7 +2415,7 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
2416 case chip_504x: 2415 case chip_504x:
2417 case chip_508x: 2416 case chip_508x:
2418 hpriv->ops = &mv5xxx_ops; 2417 hpriv->ops = &mv5xxx_ops;
2419 hp_flags |= MV_HP_50XX; 2418 hp_flags |= MV_HP_GEN_I;
2420 2419
2421 switch (rev_id) { 2420 switch (rev_id) {
2422 case 0x0: 2421 case 0x0:
@@ -2436,6 +2435,7 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
2436 case chip_604x: 2435 case chip_604x:
2437 case chip_608x: 2436 case chip_608x:
2438 hpriv->ops = &mv6xxx_ops; 2437 hpriv->ops = &mv6xxx_ops;
2438 hp_flags |= MV_HP_GEN_II;
2439 2439
2440 switch (rev_id) { 2440 switch (rev_id) {
2441 case 0x7: 2441 case 0x7:
@@ -2455,7 +2455,6 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx)
2455 case chip_7042: 2455 case chip_7042:
2456 case chip_6042: 2456 case chip_6042:
2457 hpriv->ops = &mv6xxx_ops; 2457 hpriv->ops = &mv6xxx_ops;
2458
2459 hp_flags |= MV_HP_GEN_IIE; 2458 hp_flags |= MV_HP_GEN_IIE;
2460 2459
2461 switch (rev_id) { 2460 switch (rev_id) {
@@ -2522,7 +2521,7 @@ static int mv_init_host(struct ata_host *host, unsigned int board_idx)
2522 hpriv->ops->enable_leds(hpriv, mmio); 2521 hpriv->ops->enable_leds(hpriv, mmio);
2523 2522
2524 for (port = 0; port < host->n_ports; port++) { 2523 for (port = 0; port < host->n_ports; port++) {
2525 if (IS_60XX(hpriv)) { 2524 if (IS_GEN_II(hpriv)) {
2526 void __iomem *port_mmio = mv_port_base(mmio, port); 2525 void __iomem *port_mmio = mv_port_base(mmio, port);
2527 2526
2528 u32 ifctl = readl(port_mmio + SATA_INTERFACE_CTL); 2527 u32 ifctl = readl(port_mmio + SATA_INTERFACE_CTL);
@@ -2557,7 +2556,7 @@ static int mv_init_host(struct ata_host *host, unsigned int board_idx)
2557 /* and unmask interrupt generation for host regs */ 2556 /* and unmask interrupt generation for host regs */
2558 writelfl(PCI_UNMASK_ALL_IRQS, mmio + PCI_IRQ_MASK_OFS); 2557 writelfl(PCI_UNMASK_ALL_IRQS, mmio + PCI_IRQ_MASK_OFS);
2559 2558
2560 if (IS_50XX(hpriv)) 2559 if (IS_GEN_I(hpriv))
2561 writelfl(~HC_MAIN_MASKED_IRQS_5, mmio + HC_MAIN_IRQ_MASK_OFS); 2560 writelfl(~HC_MAIN_MASKED_IRQS_5, mmio + HC_MAIN_IRQ_MASK_OFS);
2562 else 2561 else
2563 writelfl(~HC_MAIN_MASKED_IRQS, mmio + HC_MAIN_IRQ_MASK_OFS); 2562 writelfl(~HC_MAIN_MASKED_IRQS, mmio + HC_MAIN_IRQ_MASK_OFS);