diff options
author | Sujith <Sujith.Manoharan@atheros.com> | 2008-12-07 11:13:36 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2008-12-12 13:48:25 -0500 |
commit | 8ee5afbc9d2162f0919dd089023fb690f7cf8134 (patch) | |
tree | 3a1dc4a38dd16ec0f9bd4375f1662d848427d525 /drivers | |
parent | f6688cd8af6260ad4717ce45d2a614633fcf5540 (diff) |
ath9k: Merge structures ath_atx, ath_node_aggr with ath_node
Signed-off-by: Sujith <Sujith.Manoharan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/wireless/ath9k/core.h | 160 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/xmit.c | 6 |
2 files changed, 72 insertions, 94 deletions
diff --git a/drivers/net/wireless/ath9k/core.h b/drivers/net/wireless/ath9k/core.h index 0e3c225c749e..41a87b99deaa 100644 --- a/drivers/net/wireless/ath9k/core.h +++ b/drivers/net/wireless/ath9k/core.h | |||
@@ -290,18 +290,9 @@ void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd, | |||
290 | /* RX / TX */ | 290 | /* RX / TX */ |
291 | /***********/ | 291 | /***********/ |
292 | 292 | ||
293 | #define ATH_MAX_ANTENNA 3 | 293 | #define ATH_MAX_ANTENNA 3 |
294 | #define ATH_RXBUF 512 | 294 | #define ATH_RXBUF 512 |
295 | #define WME_NUM_TID 16 | 295 | #define WME_NUM_TID 16 |
296 | |||
297 | int ath_startrecv(struct ath_softc *sc); | ||
298 | bool ath_stoprecv(struct ath_softc *sc); | ||
299 | void ath_flushrecv(struct ath_softc *sc); | ||
300 | u32 ath_calcrxfilter(struct ath_softc *sc); | ||
301 | int ath_rx_init(struct ath_softc *sc, int nbufs); | ||
302 | void ath_rx_cleanup(struct ath_softc *sc); | ||
303 | int ath_rx_tasklet(struct ath_softc *sc, int flush); | ||
304 | |||
305 | #define ATH_TXBUF 512 | 296 | #define ATH_TXBUF 512 |
306 | #define ATH_TXMAXTRY 13 | 297 | #define ATH_TXMAXTRY 13 |
307 | #define ATH_11N_TXMAXTRY 10 | 298 | #define ATH_11N_TXMAXTRY 10 |
@@ -309,19 +300,61 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush); | |||
309 | #define WME_BA_BMP_SIZE 64 | 300 | #define WME_BA_BMP_SIZE 64 |
310 | #define WME_MAX_BA WME_BA_BMP_SIZE | 301 | #define WME_MAX_BA WME_BA_BMP_SIZE |
311 | #define ATH_TID_MAX_BUFS (2 * WME_MAX_BA) | 302 | #define ATH_TID_MAX_BUFS (2 * WME_MAX_BA) |
303 | |||
312 | #define TID_TO_WME_AC(_tid) \ | 304 | #define TID_TO_WME_AC(_tid) \ |
313 | ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \ | 305 | ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \ |
314 | (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \ | 306 | (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \ |
315 | (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \ | 307 | (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \ |
316 | WME_AC_VO) | 308 | WME_AC_VO) |
317 | 309 | ||
318 | |||
319 | #define WME_AC_BE 0 | 310 | #define WME_AC_BE 0 |
320 | #define WME_AC_BK 1 | 311 | #define WME_AC_BK 1 |
321 | #define WME_AC_VI 2 | 312 | #define WME_AC_VI 2 |
322 | #define WME_AC_VO 3 | 313 | #define WME_AC_VO 3 |
323 | #define WME_NUM_AC 4 | 314 | #define WME_NUM_AC 4 |
324 | 315 | ||
316 | #define ADDBA_EXCHANGE_ATTEMPTS 10 | ||
317 | #define ATH_AGGR_DELIM_SZ 4 | ||
318 | #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */ | ||
319 | /* number of delimiters for encryption padding */ | ||
320 | #define ATH_AGGR_ENCRYPTDELIM 10 | ||
321 | /* minimum h/w qdepth to be sustained to maximize aggregation */ | ||
322 | #define ATH_AGGR_MIN_QDEPTH 2 | ||
323 | #define ATH_AMPDU_SUBFRAME_DEFAULT 32 | ||
324 | #define IEEE80211_SEQ_SEQ_SHIFT 4 | ||
325 | #define IEEE80211_SEQ_MAX 4096 | ||
326 | #define IEEE80211_MIN_AMPDU_BUF 0x8 | ||
327 | #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13 | ||
328 | |||
329 | /* return whether a bit at index _n in bitmap _bm is set | ||
330 | * _sz is the size of the bitmap */ | ||
331 | #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \ | ||
332 | ((_bm)[(_n) >> 5] & (1 << ((_n) & 31)))) | ||
333 | |||
334 | /* return block-ack bitmap index given sequence and starting sequence */ | ||
335 | #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1)) | ||
336 | |||
337 | /* returns delimiter padding required given the packet length */ | ||
338 | #define ATH_AGGR_GET_NDELIM(_len) \ | ||
339 | (((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ? \ | ||
340 | (ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2) | ||
341 | |||
342 | #define BAW_WITHIN(_start, _bawsz, _seqno) \ | ||
343 | ((((_seqno) - (_start)) & 4095) < (_bawsz)) | ||
344 | |||
345 | #define ATH_DS_BA_SEQ(_ds) ((_ds)->ds_us.tx.ts_seqnum) | ||
346 | #define ATH_DS_BA_BITMAP(_ds) (&(_ds)->ds_us.tx.ba_low) | ||
347 | #define ATH_DS_TX_BA(_ds) ((_ds)->ds_us.tx.ts_flags & ATH9K_TX_BA) | ||
348 | #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)]) | ||
349 | |||
350 | enum ATH_AGGR_STATUS { | ||
351 | ATH_AGGR_DONE, | ||
352 | ATH_AGGR_BAW_CLOSED, | ||
353 | ATH_AGGR_LIMITED, | ||
354 | ATH_AGGR_SHORTPKT, | ||
355 | ATH_AGGR_8K_LIMITED, | ||
356 | }; | ||
357 | |||
325 | struct ath_txq { | 358 | struct ath_txq { |
326 | u32 axq_qnum; /* hardware q number */ | 359 | u32 axq_qnum; /* hardware q number */ |
327 | u32 *axq_link; /* link ptr in last TX desc */ | 360 | u32 *axq_link; /* link ptr in last TX desc */ |
@@ -331,7 +364,6 @@ struct ath_txq { | |||
331 | u32 axq_depth; /* queue depth */ | 364 | u32 axq_depth; /* queue depth */ |
332 | u8 axq_aggr_depth; /* aggregates queued */ | 365 | u8 axq_aggr_depth; /* aggregates queued */ |
333 | u32 axq_totalqueued; /* total ever queued */ | 366 | u32 axq_totalqueued; /* total ever queued */ |
334 | |||
335 | bool stopped; /* Is mac80211 queue stopped ? */ | 367 | bool stopped; /* Is mac80211 queue stopped ? */ |
336 | struct ath_buf *axq_linkbuf; /* virtual addr of last buffer*/ | 368 | struct ath_buf *axq_linkbuf; /* virtual addr of last buffer*/ |
337 | 369 | ||
@@ -377,12 +409,6 @@ struct ath_atx_ac { | |||
377 | struct list_head tid_q; /* queue of TIDs with buffers */ | 409 | struct list_head tid_q; /* queue of TIDs with buffers */ |
378 | }; | 410 | }; |
379 | 411 | ||
380 | /* per dest tx state */ | ||
381 | struct ath_atx { | ||
382 | struct ath_atx_tid tid[WME_NUM_TID]; | ||
383 | struct ath_atx_ac ac[WME_NUM_AC]; | ||
384 | }; | ||
385 | |||
386 | /* per-frame tx control block */ | 412 | /* per-frame tx control block */ |
387 | struct ath_tx_control { | 413 | struct ath_tx_control { |
388 | struct ath_txq *txq; | 414 | struct ath_txq *txq; |
@@ -408,13 +434,32 @@ struct ath_tx_stat { | |||
408 | int rateKbps; | 434 | int rateKbps; |
409 | int ratecode; | 435 | int ratecode; |
410 | int flags; | 436 | int flags; |
411 | /* if any of ctl,extn chain rssis are valid */ | ||
412 | #define ATH_TX_CHAIN_RSSI_VALID 0x01 | ||
413 | /* if extn chain rssis are valid */ | ||
414 | #define ATH_TX_RSSI_EXTN_VALID 0x02 | ||
415 | u32 airtime; /* time on air per final tx rate */ | 437 | u32 airtime; /* time on air per final tx rate */ |
416 | }; | 438 | }; |
417 | 439 | ||
440 | struct aggr_rifs_param { | ||
441 | int param_max_frames; | ||
442 | int param_max_len; | ||
443 | int param_rl; | ||
444 | int param_al; | ||
445 | struct ath_rc_series *param_rcs; | ||
446 | }; | ||
447 | |||
448 | struct ath_node { | ||
449 | struct ath_softc *an_sc; | ||
450 | struct ath_atx_tid tid[WME_NUM_TID]; | ||
451 | struct ath_atx_ac ac[WME_NUM_AC]; | ||
452 | u16 maxampdu; | ||
453 | u8 mpdudensity; | ||
454 | }; | ||
455 | |||
456 | int ath_startrecv(struct ath_softc *sc); | ||
457 | bool ath_stoprecv(struct ath_softc *sc); | ||
458 | void ath_flushrecv(struct ath_softc *sc); | ||
459 | u32 ath_calcrxfilter(struct ath_softc *sc); | ||
460 | int ath_rx_init(struct ath_softc *sc, int nbufs); | ||
461 | void ath_rx_cleanup(struct ath_softc *sc); | ||
462 | int ath_rx_tasklet(struct ath_softc *sc, int flush); | ||
418 | struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype); | 463 | struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype); |
419 | void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq); | 464 | void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq); |
420 | int ath_tx_setup(struct ath_softc *sc, int haltype); | 465 | int ath_tx_setup(struct ath_softc *sc, int haltype); |
@@ -437,73 +482,6 @@ void ath_tx_tasklet(struct ath_softc *sc); | |||
437 | u32 ath_txq_depth(struct ath_softc *sc, int qnum); | 482 | u32 ath_txq_depth(struct ath_softc *sc, int qnum); |
438 | u32 ath_txq_aggr_depth(struct ath_softc *sc, int qnum); | 483 | u32 ath_txq_aggr_depth(struct ath_softc *sc, int qnum); |
439 | void ath_tx_cabq(struct ath_softc *sc, struct sk_buff *skb); | 484 | void ath_tx_cabq(struct ath_softc *sc, struct sk_buff *skb); |
440 | |||
441 | /**********************/ | ||
442 | /* Node / Aggregation */ | ||
443 | /**********************/ | ||
444 | |||
445 | #define ADDBA_EXCHANGE_ATTEMPTS 10 | ||
446 | #define ATH_AGGR_DELIM_SZ 4 | ||
447 | #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */ | ||
448 | /* number of delimiters for encryption padding */ | ||
449 | #define ATH_AGGR_ENCRYPTDELIM 10 | ||
450 | /* minimum h/w qdepth to be sustained to maximize aggregation */ | ||
451 | #define ATH_AGGR_MIN_QDEPTH 2 | ||
452 | #define ATH_AMPDU_SUBFRAME_DEFAULT 32 | ||
453 | #define IEEE80211_SEQ_SEQ_SHIFT 4 | ||
454 | #define IEEE80211_SEQ_MAX 4096 | ||
455 | #define IEEE80211_MIN_AMPDU_BUF 0x8 | ||
456 | #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13 | ||
457 | |||
458 | /* return whether a bit at index _n in bitmap _bm is set | ||
459 | * _sz is the size of the bitmap */ | ||
460 | #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \ | ||
461 | ((_bm)[(_n) >> 5] & (1 << ((_n) & 31)))) | ||
462 | |||
463 | /* return block-ack bitmap index given sequence and starting sequence */ | ||
464 | #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1)) | ||
465 | |||
466 | /* returns delimiter padding required given the packet length */ | ||
467 | #define ATH_AGGR_GET_NDELIM(_len) \ | ||
468 | (((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ? \ | ||
469 | (ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2) | ||
470 | |||
471 | #define BAW_WITHIN(_start, _bawsz, _seqno) \ | ||
472 | ((((_seqno) - (_start)) & 4095) < (_bawsz)) | ||
473 | |||
474 | #define ATH_DS_BA_SEQ(_ds) ((_ds)->ds_us.tx.ts_seqnum) | ||
475 | #define ATH_DS_BA_BITMAP(_ds) (&(_ds)->ds_us.tx.ba_low) | ||
476 | #define ATH_DS_TX_BA(_ds) ((_ds)->ds_us.tx.ts_flags & ATH9K_TX_BA) | ||
477 | #define ATH_AN_2_TID(_an, _tidno) (&(_an)->an_aggr.tx.tid[(_tidno)]) | ||
478 | |||
479 | enum ATH_AGGR_STATUS { | ||
480 | ATH_AGGR_DONE, | ||
481 | ATH_AGGR_BAW_CLOSED, | ||
482 | ATH_AGGR_LIMITED, | ||
483 | ATH_AGGR_SHORTPKT, | ||
484 | ATH_AGGR_8K_LIMITED, | ||
485 | }; | ||
486 | |||
487 | struct aggr_rifs_param { | ||
488 | int param_max_frames; | ||
489 | int param_max_len; | ||
490 | int param_rl; | ||
491 | int param_al; | ||
492 | struct ath_rc_series *param_rcs; | ||
493 | }; | ||
494 | |||
495 | /* Per-node aggregation state */ | ||
496 | struct ath_node_aggr { | ||
497 | struct ath_atx tx; | ||
498 | }; | ||
499 | |||
500 | struct ath_node { | ||
501 | struct ath_softc *an_sc; | ||
502 | struct ath_node_aggr an_aggr; | ||
503 | u16 maxampdu; | ||
504 | u8 mpdudensity; | ||
505 | }; | ||
506 | |||
507 | void ath_tx_resume_tid(struct ath_softc *sc, struct ath_atx_tid *tid); | 485 | void ath_tx_resume_tid(struct ath_softc *sc, struct ath_atx_tid *tid); |
508 | bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno); | 486 | bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno); |
509 | void ath_tx_aggr_teardown(struct ath_softc *sc, struct ath_node *an, u8 tidno); | 487 | void ath_tx_aggr_teardown(struct ath_softc *sc, struct ath_node *an, u8 tidno); |
diff --git a/drivers/net/wireless/ath9k/xmit.c b/drivers/net/wireless/ath9k/xmit.c index 353b7ed1c8a4..ec359c624831 100644 --- a/drivers/net/wireless/ath9k/xmit.c +++ b/drivers/net/wireless/ath9k/xmit.c | |||
@@ -2405,7 +2405,7 @@ void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an) | |||
2405 | /* | 2405 | /* |
2406 | * Init per tid tx state | 2406 | * Init per tid tx state |
2407 | */ | 2407 | */ |
2408 | for (tidno = 0, tid = &an->an_aggr.tx.tid[tidno]; | 2408 | for (tidno = 0, tid = &an->tid[tidno]; |
2409 | tidno < WME_NUM_TID; | 2409 | tidno < WME_NUM_TID; |
2410 | tidno++, tid++) { | 2410 | tidno++, tid++) { |
2411 | tid->an = an; | 2411 | tid->an = an; |
@@ -2419,7 +2419,7 @@ void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an) | |||
2419 | INIT_LIST_HEAD(&tid->buf_q); | 2419 | INIT_LIST_HEAD(&tid->buf_q); |
2420 | 2420 | ||
2421 | acno = TID_TO_WME_AC(tidno); | 2421 | acno = TID_TO_WME_AC(tidno); |
2422 | tid->ac = &an->an_aggr.tx.ac[acno]; | 2422 | tid->ac = &an->ac[acno]; |
2423 | 2423 | ||
2424 | /* ADDBA state */ | 2424 | /* ADDBA state */ |
2425 | tid->state &= ~AGGR_ADDBA_COMPLETE; | 2425 | tid->state &= ~AGGR_ADDBA_COMPLETE; |
@@ -2430,7 +2430,7 @@ void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an) | |||
2430 | /* | 2430 | /* |
2431 | * Init per ac tx state | 2431 | * Init per ac tx state |
2432 | */ | 2432 | */ |
2433 | for (acno = 0, ac = &an->an_aggr.tx.ac[acno]; | 2433 | for (acno = 0, ac = &an->ac[acno]; |
2434 | acno < WME_NUM_AC; acno++, ac++) { | 2434 | acno < WME_NUM_AC; acno++, ac++) { |
2435 | ac->sched = false; | 2435 | ac->sched = false; |
2436 | INIT_LIST_HEAD(&ac->tid_q); | 2436 | INIT_LIST_HEAD(&ac->tid_q); |